1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19
20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23
24 // expected-no-diagnostics
25 #ifndef HEADER
26 #define HEADER
27
28 template <typename T>
tmain()29 T tmain() {
30 T t_var = T();
31 T vec[] = {1, 2};
32 #pragma omp target
33 #pragma omp teams distribute parallel for reduction(+: t_var)
34 for (int i = 0; i < 2; ++i) {
35 t_var += (T) i;
36 }
37 return T();
38 }
39
main()40 int main() {
41 static int sivar;
42 #ifdef LAMBDA
43
44 [&]() {
45 #pragma omp target
46 #pragma omp teams distribute parallel for reduction(+: sivar)
47 for (int i = 0; i < 2; ++i) {
48
49 // Skip global and bound tid vars
50
51
52
53 // Skip global and bound tid vars, and prev lb and ub vars
54 // skip loop vars
55
56
57 sivar += i;
58
59 [&]() {
60
61 sivar += 4;
62
63 }();
64 }
65 }();
66 return 0;
67 #else
68 #pragma omp target
69 #pragma omp teams distribute parallel for reduction(+: sivar)
70 for (int i = 0; i < 2; ++i) {
71 sivar += i;
72 }
73 return tmain<int>();
74 #endif
75 }
76
77
78
79
80 // Skip global and bound tid vars
81
82
83 // Skip global and bound tid vars, and prev lb and ub
84 // skip loop vars
85
86
87
88
89 // Skip global and bound tid vars
90
91
92 // Skip global and bound tid vars, and prev lb and ub vars
93 // skip loop vars
94
95 #endif
96 // CHECK1-LABEL: define {{[^@]+}}@main
97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
98 // CHECK1-NEXT: entry:
99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8
101 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
102 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
103 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
105 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
106 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
107 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
108 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
109 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
110 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
111 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
112 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
113 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
114 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
115 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
116 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
117 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8
118 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
119 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
120 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
121 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
122 // CHECK1-NEXT: store i32 1, i32* [[TMP9]], align 4
123 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
124 // CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4
125 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
126 // CHECK1-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
127 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
128 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
129 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
130 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8
131 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
132 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8
133 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
134 // CHECK1-NEXT: store i8** null, i8*** [[TMP15]], align 8
135 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
136 // CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8
137 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
138 // CHECK1-NEXT: store i64 2, i64* [[TMP17]], align 8
139 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
140 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
141 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
142 // CHECK1: omp_offload.failed:
143 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
144 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
145 // CHECK1: omp_offload.cont:
146 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
147 // CHECK1-NEXT: ret i32 [[CALL]]
148 //
149 //
150 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
151 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
152 // CHECK1-NEXT: entry:
153 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
154 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
155 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
156 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
157 // CHECK1-NEXT: ret void
158 //
159 //
160 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
161 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
162 // CHECK1-NEXT: entry:
163 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
164 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
165 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
166 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
167 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
168 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
169 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
170 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
171 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
172 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
173 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
174 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
175 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
176 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
177 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
178 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
179 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4
180 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
181 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
182 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
183 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
184 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
185 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
186 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
187 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
188 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
189 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
190 // CHECK1: cond.true:
191 // CHECK1-NEXT: br label [[COND_END:%.*]]
192 // CHECK1: cond.false:
193 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
194 // CHECK1-NEXT: br label [[COND_END]]
195 // CHECK1: cond.end:
196 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
197 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
198 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
199 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
201 // CHECK1: omp.inner.for.cond:
202 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
203 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
204 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
205 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
206 // CHECK1: omp.inner.for.body:
207 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
208 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
209 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
210 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
211 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
212 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
213 // CHECK1: omp.inner.for.inc:
214 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
215 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
216 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
217 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
218 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
219 // CHECK1: omp.inner.for.end:
220 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
221 // CHECK1: omp.loop.exit:
222 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
223 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
224 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
225 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8
226 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
227 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
228 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
229 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
230 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
231 // CHECK1-NEXT: ]
232 // CHECK1: .omp.reduction.case1:
233 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
234 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
235 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
236 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
237 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
238 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
239 // CHECK1: .omp.reduction.case2:
240 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
241 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
242 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
243 // CHECK1: .omp.reduction.default:
244 // CHECK1-NEXT: ret void
245 //
246 //
247 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
248 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
249 // CHECK1-NEXT: entry:
250 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
251 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
252 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
253 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
254 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
255 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
256 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
258 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
259 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
260 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
261 // CHECK1-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
262 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
263 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
264 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
265 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
266 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
267 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
268 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
269 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
270 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
271 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
272 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
273 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
274 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
275 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
276 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
277 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
278 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
279 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
280 // CHECK1-NEXT: store i32 0, i32* [[SIVAR2]], align 4
281 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
282 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
283 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
284 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
285 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
286 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
287 // CHECK1: cond.true:
288 // CHECK1-NEXT: br label [[COND_END:%.*]]
289 // CHECK1: cond.false:
290 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
291 // CHECK1-NEXT: br label [[COND_END]]
292 // CHECK1: cond.end:
293 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
294 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
295 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
296 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
297 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
298 // CHECK1: omp.inner.for.cond:
299 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
300 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
301 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
302 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
303 // CHECK1: omp.inner.for.body:
304 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
305 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
306 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
307 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
308 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
309 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
310 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
311 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4
312 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
313 // CHECK1: omp.body.continue:
314 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
315 // CHECK1: omp.inner.for.inc:
316 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
317 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
318 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
319 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
320 // CHECK1: omp.inner.for.end:
321 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
322 // CHECK1: omp.loop.exit:
323 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
324 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
325 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR2]] to i8*
326 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8
327 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
328 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
329 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
330 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
331 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
332 // CHECK1-NEXT: ]
333 // CHECK1: .omp.reduction.case1:
334 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
335 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR2]], align 4
336 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
337 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
338 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
339 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
340 // CHECK1: .omp.reduction.case2:
341 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4
342 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
343 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
344 // CHECK1: .omp.reduction.default:
345 // CHECK1-NEXT: ret void
346 //
347 //
348 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
349 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
350 // CHECK1-NEXT: entry:
351 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
352 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
353 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
354 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
355 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
356 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
357 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
358 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
359 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
360 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
361 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
362 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
363 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
364 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
365 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
366 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
367 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
368 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
369 // CHECK1-NEXT: ret void
370 //
371 //
372 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
373 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
374 // CHECK1-NEXT: entry:
375 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
376 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
377 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
378 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
379 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
380 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
381 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
382 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
383 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
384 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
385 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
386 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
387 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
388 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
389 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
390 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
391 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
392 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
393 // CHECK1-NEXT: ret void
394 //
395 //
396 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
397 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
398 // CHECK1-NEXT: entry:
399 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
400 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
401 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
402 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
403 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
404 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
405 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
406 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4
407 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
408 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
409 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
410 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
411 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
412 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
413 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
414 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
415 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8
416 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
417 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
418 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8
419 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
420 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8
421 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
422 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
423 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
424 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
425 // CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4
426 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
427 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
428 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
429 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
430 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
431 // CHECK1-NEXT: store i8** [[TMP9]], i8*** [[TMP13]], align 8
432 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
433 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64** [[TMP14]], align 8
434 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
435 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i64** [[TMP15]], align 8
436 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
437 // CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8
438 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
439 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
440 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
441 // CHECK1-NEXT: store i64 2, i64* [[TMP18]], align 8
442 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
443 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
444 // CHECK1-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
445 // CHECK1: omp_offload.failed:
446 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]]
447 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
448 // CHECK1: omp_offload.cont:
449 // CHECK1-NEXT: ret i32 0
450 //
451 //
452 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
453 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
454 // CHECK1-NEXT: entry:
455 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
456 // CHECK1-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
457 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
458 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]])
459 // CHECK1-NEXT: ret void
460 //
461 //
462 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
463 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
464 // CHECK1-NEXT: entry:
465 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
466 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
467 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
468 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
469 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
470 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
471 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
472 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
473 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
474 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
475 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
476 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
477 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
478 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
479 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
480 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
481 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4
482 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
483 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
484 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
485 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
486 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
487 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
488 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
489 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
490 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
491 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
492 // CHECK1: cond.true:
493 // CHECK1-NEXT: br label [[COND_END:%.*]]
494 // CHECK1: cond.false:
495 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
496 // CHECK1-NEXT: br label [[COND_END]]
497 // CHECK1: cond.end:
498 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
499 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
500 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
501 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
502 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
503 // CHECK1: omp.inner.for.cond:
504 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
505 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
506 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
507 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
508 // CHECK1: omp.inner.for.body:
509 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
510 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
511 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
512 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
513 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[T_VAR1]])
514 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
515 // CHECK1: omp.inner.for.inc:
516 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
517 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
518 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
519 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
520 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
521 // CHECK1: omp.inner.for.end:
522 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
523 // CHECK1: omp.loop.exit:
524 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
525 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
526 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8*
527 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8
528 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
529 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
530 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
531 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
532 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
533 // CHECK1-NEXT: ]
534 // CHECK1: .omp.reduction.case1:
535 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
536 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
537 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
538 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
539 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
540 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
541 // CHECK1: .omp.reduction.case2:
542 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
543 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
544 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
545 // CHECK1: .omp.reduction.default:
546 // CHECK1-NEXT: ret void
547 //
548 //
549 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
550 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
551 // CHECK1-NEXT: entry:
552 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
553 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
554 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
555 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
556 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
557 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
558 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
559 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
560 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
561 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
562 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
565 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
566 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
567 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
568 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
569 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
570 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
571 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
572 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
573 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
574 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
575 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
576 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
577 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
578 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
579 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
580 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
581 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
582 // CHECK1-NEXT: store i32 0, i32* [[T_VAR2]], align 4
583 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
584 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
585 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
586 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
587 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
588 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
589 // CHECK1: cond.true:
590 // CHECK1-NEXT: br label [[COND_END:%.*]]
591 // CHECK1: cond.false:
592 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
593 // CHECK1-NEXT: br label [[COND_END]]
594 // CHECK1: cond.end:
595 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
596 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
597 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
598 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
599 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
600 // CHECK1: omp.inner.for.cond:
601 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
602 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
603 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
604 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
605 // CHECK1: omp.inner.for.body:
606 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
607 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
608 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
609 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
610 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
611 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4
612 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
613 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[T_VAR2]], align 4
614 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
615 // CHECK1: omp.body.continue:
616 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
617 // CHECK1: omp.inner.for.inc:
618 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
619 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
620 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
621 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
622 // CHECK1: omp.inner.for.end:
623 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
624 // CHECK1: omp.loop.exit:
625 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
626 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
627 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR2]] to i8*
628 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8
629 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
630 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
631 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
632 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
633 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
634 // CHECK1-NEXT: ]
635 // CHECK1: .omp.reduction.case1:
636 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
637 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR2]], align 4
638 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
639 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
640 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
641 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
642 // CHECK1: .omp.reduction.case2:
643 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4
644 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
645 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
646 // CHECK1: .omp.reduction.default:
647 // CHECK1-NEXT: ret void
648 //
649 //
650 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
651 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
652 // CHECK1-NEXT: entry:
653 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
654 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
655 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
656 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
657 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
658 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
659 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
660 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
661 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
662 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
663 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
664 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
665 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
666 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
667 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
668 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
669 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
670 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
671 // CHECK1-NEXT: ret void
672 //
673 //
674 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
675 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
676 // CHECK1-NEXT: entry:
677 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
678 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
679 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
680 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
681 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
682 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
683 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
684 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
685 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
686 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
687 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
688 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
689 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
690 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
691 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
692 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
693 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
694 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
695 // CHECK1-NEXT: ret void
696 //
697 //
698 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
699 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
700 // CHECK1-NEXT: entry:
701 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
702 // CHECK1-NEXT: ret void
703 //
704 //
705 // CHECK3-LABEL: define {{[^@]+}}@main
706 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
707 // CHECK3-NEXT: entry:
708 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
709 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4
710 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
711 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
712 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
713 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
714 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
715 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
716 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4
717 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4
718 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
719 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
720 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4
721 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
722 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
723 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
724 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
725 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4
726 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
727 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
728 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
729 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
730 // CHECK3-NEXT: store i32 1, i32* [[TMP9]], align 4
731 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
732 // CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4
733 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
734 // CHECK3-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 4
735 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
736 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 4
737 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
738 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 4
739 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
740 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 4
741 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
742 // CHECK3-NEXT: store i8** null, i8*** [[TMP15]], align 4
743 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
744 // CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 4
745 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
746 // CHECK3-NEXT: store i64 2, i64* [[TMP17]], align 8
747 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
748 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
749 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
750 // CHECK3: omp_offload.failed:
751 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
752 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
753 // CHECK3: omp_offload.cont:
754 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
755 // CHECK3-NEXT: ret i32 [[CALL]]
756 //
757 //
758 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
759 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
760 // CHECK3-NEXT: entry:
761 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4
762 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4
763 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]])
764 // CHECK3-NEXT: ret void
765 //
766 //
767 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
768 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
769 // CHECK3-NEXT: entry:
770 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
771 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
772 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
773 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
774 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
775 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
776 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
777 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
778 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
779 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
780 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
781 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
782 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
783 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
784 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
785 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
786 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4
787 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
788 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
789 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
790 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
791 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
792 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
793 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
794 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
795 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
796 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
797 // CHECK3: cond.true:
798 // CHECK3-NEXT: br label [[COND_END:%.*]]
799 // CHECK3: cond.false:
800 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
801 // CHECK3-NEXT: br label [[COND_END]]
802 // CHECK3: cond.end:
803 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
804 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
805 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
806 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
807 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
808 // CHECK3: omp.inner.for.cond:
809 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
810 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
811 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
812 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
813 // CHECK3: omp.inner.for.body:
814 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
815 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
816 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[SIVAR1]])
817 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
818 // CHECK3: omp.inner.for.inc:
819 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
820 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
821 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
822 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
823 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
824 // CHECK3: omp.inner.for.end:
825 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
826 // CHECK3: omp.loop.exit:
827 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
828 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
829 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8*
830 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4
831 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
832 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
833 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
834 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
835 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
836 // CHECK3-NEXT: ]
837 // CHECK3: .omp.reduction.case1:
838 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
839 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4
840 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
841 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
842 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
843 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
844 // CHECK3: .omp.reduction.case2:
845 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
846 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
847 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
848 // CHECK3: .omp.reduction.default:
849 // CHECK3-NEXT: ret void
850 //
851 //
852 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
853 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
854 // CHECK3-NEXT: entry:
855 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
856 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
857 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
858 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
859 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
860 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
861 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
862 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
863 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
864 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
865 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
866 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
867 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
868 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
869 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
870 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
871 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
872 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
873 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
874 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
875 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
876 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
877 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
878 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
879 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
880 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
881 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
882 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
883 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4
884 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
885 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
886 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
887 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
888 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
889 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
890 // CHECK3: cond.true:
891 // CHECK3-NEXT: br label [[COND_END:%.*]]
892 // CHECK3: cond.false:
893 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
894 // CHECK3-NEXT: br label [[COND_END]]
895 // CHECK3: cond.end:
896 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
897 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
898 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
899 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
900 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
901 // CHECK3: omp.inner.for.cond:
902 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
903 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
904 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
905 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
906 // CHECK3: omp.inner.for.body:
907 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
908 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
909 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
910 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
911 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
912 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR1]], align 4
913 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
914 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4
915 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
916 // CHECK3: omp.body.continue:
917 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
918 // CHECK3: omp.inner.for.inc:
919 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
920 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
921 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
922 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
923 // CHECK3: omp.inner.for.end:
924 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
925 // CHECK3: omp.loop.exit:
926 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
927 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
928 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
929 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
930 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
931 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
932 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
933 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
934 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
935 // CHECK3-NEXT: ]
936 // CHECK3: .omp.reduction.case1:
937 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
938 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
939 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
940 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
941 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
942 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
943 // CHECK3: .omp.reduction.case2:
944 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
945 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
946 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
947 // CHECK3: .omp.reduction.default:
948 // CHECK3-NEXT: ret void
949 //
950 //
951 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
952 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
953 // CHECK3-NEXT: entry:
954 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
955 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
956 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
957 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
958 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
959 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
960 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
961 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
962 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
963 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
964 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
965 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
966 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
967 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
968 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
969 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
970 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
971 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
972 // CHECK3-NEXT: ret void
973 //
974 //
975 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
976 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
977 // CHECK3-NEXT: entry:
978 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
979 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
980 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
981 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
982 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
983 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
984 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
985 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
986 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
987 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
988 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
989 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
990 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
991 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
992 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
993 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
994 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
995 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
996 // CHECK3-NEXT: ret void
997 //
998 //
999 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1000 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
1001 // CHECK3-NEXT: entry:
1002 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1003 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1004 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1005 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1006 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1007 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1008 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1009 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4
1010 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1011 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1012 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
1013 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4
1014 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1015 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1016 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
1017 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4
1018 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1019 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
1020 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4
1021 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1022 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4
1023 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1024 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1025 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1026 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1027 // CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4
1028 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1029 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
1030 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1031 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 4
1032 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1033 // CHECK3-NEXT: store i8** [[TMP9]], i8*** [[TMP13]], align 4
1034 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1035 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64** [[TMP14]], align 4
1036 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1037 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i64** [[TMP15]], align 4
1038 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1039 // CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 4
1040 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1041 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 4
1042 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1043 // CHECK3-NEXT: store i64 2, i64* [[TMP18]], align 8
1044 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1045 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1046 // CHECK3-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1047 // CHECK3: omp_offload.failed:
1048 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]]
1049 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1050 // CHECK3: omp_offload.cont:
1051 // CHECK3-NEXT: ret i32 0
1052 //
1053 //
1054 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
1055 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
1056 // CHECK3-NEXT: entry:
1057 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1058 // CHECK3-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1059 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]])
1060 // CHECK3-NEXT: ret void
1061 //
1062 //
1063 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1064 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1065 // CHECK3-NEXT: entry:
1066 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1067 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1068 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1069 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1070 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1071 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1072 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1073 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1074 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1075 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1076 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1077 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1078 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1079 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1080 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1081 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1082 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1083 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1084 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1085 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1086 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1087 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1088 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1089 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1090 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1091 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1092 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1093 // CHECK3: cond.true:
1094 // CHECK3-NEXT: br label [[COND_END:%.*]]
1095 // CHECK3: cond.false:
1096 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1097 // CHECK3-NEXT: br label [[COND_END]]
1098 // CHECK3: cond.end:
1099 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1100 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1101 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1102 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1103 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1104 // CHECK3: omp.inner.for.cond:
1105 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1106 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1107 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1108 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1109 // CHECK3: omp.inner.for.body:
1110 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1111 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1112 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[T_VAR1]])
1113 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1114 // CHECK3: omp.inner.for.inc:
1115 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1116 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1117 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1118 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1119 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1120 // CHECK3: omp.inner.for.end:
1121 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1122 // CHECK3: omp.loop.exit:
1123 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1124 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1125 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1126 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4
1127 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1128 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
1129 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1130 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1131 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1132 // CHECK3-NEXT: ]
1133 // CHECK3: .omp.reduction.case1:
1134 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
1135 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4
1136 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1137 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
1138 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1139 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1140 // CHECK3: .omp.reduction.case2:
1141 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4
1142 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
1143 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1144 // CHECK3: .omp.reduction.default:
1145 // CHECK3-NEXT: ret void
1146 //
1147 //
1148 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1149 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1150 // CHECK3-NEXT: entry:
1151 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1152 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1153 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1154 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1155 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1156 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1157 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1158 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1159 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1160 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1161 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1162 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1163 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1164 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1165 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1166 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1167 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1168 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1169 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1170 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1171 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1172 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1173 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1174 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1175 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1176 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1177 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1178 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1179 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1180 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1181 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1182 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1183 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1184 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1185 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1186 // CHECK3: cond.true:
1187 // CHECK3-NEXT: br label [[COND_END:%.*]]
1188 // CHECK3: cond.false:
1189 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1190 // CHECK3-NEXT: br label [[COND_END]]
1191 // CHECK3: cond.end:
1192 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1193 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1194 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1195 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1196 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1197 // CHECK3: omp.inner.for.cond:
1198 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1199 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1200 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1201 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1202 // CHECK3: omp.inner.for.body:
1203 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1204 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1205 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1206 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1207 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1208 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR1]], align 4
1209 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1210 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4
1211 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1212 // CHECK3: omp.body.continue:
1213 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1214 // CHECK3: omp.inner.for.inc:
1215 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1216 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
1217 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1218 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1219 // CHECK3: omp.inner.for.end:
1220 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1221 // CHECK3: omp.loop.exit:
1222 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1223 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1224 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1225 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
1226 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1227 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
1228 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1229 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1230 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1231 // CHECK3-NEXT: ]
1232 // CHECK3: .omp.reduction.case1:
1233 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
1234 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
1235 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1236 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1237 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1238 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1239 // CHECK3: .omp.reduction.case2:
1240 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
1241 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
1242 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1243 // CHECK3: .omp.reduction.default:
1244 // CHECK3-NEXT: ret void
1245 //
1246 //
1247 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
1248 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1249 // CHECK3-NEXT: entry:
1250 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1251 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1252 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1253 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1254 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1255 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1256 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1257 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1258 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1259 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1260 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1261 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1262 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1263 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1264 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1265 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1266 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1267 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1268 // CHECK3-NEXT: ret void
1269 //
1270 //
1271 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
1272 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1273 // CHECK3-NEXT: entry:
1274 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1275 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1276 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1277 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1278 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1279 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1280 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1281 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1282 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1283 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1284 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1285 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1286 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1287 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1288 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1289 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1290 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1291 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1292 // CHECK3-NEXT: ret void
1293 //
1294 //
1295 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1296 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] {
1297 // CHECK3-NEXT: entry:
1298 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1299 // CHECK3-NEXT: ret void
1300 //
1301 //
1302 // CHECK9-LABEL: define {{[^@]+}}@main
1303 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
1304 // CHECK9-NEXT: entry:
1305 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1306 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1307 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1308 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
1309 // CHECK9-NEXT: ret i32 0
1310 //
1311 //
1312 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
1313 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1314 // CHECK9-NEXT: entry:
1315 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
1316 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
1317 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
1318 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
1319 // CHECK9-NEXT: ret void
1320 //
1321 //
1322 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1323 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1324 // CHECK9-NEXT: entry:
1325 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1326 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1327 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1328 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1329 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1330 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1331 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1332 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1333 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1334 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1335 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1336 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1337 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1338 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1339 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1340 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1341 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1342 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1343 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1344 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1345 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1346 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1347 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1348 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1349 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1350 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1351 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1352 // CHECK9: cond.true:
1353 // CHECK9-NEXT: br label [[COND_END:%.*]]
1354 // CHECK9: cond.false:
1355 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1356 // CHECK9-NEXT: br label [[COND_END]]
1357 // CHECK9: cond.end:
1358 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1359 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1360 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1361 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1362 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1363 // CHECK9: omp.inner.for.cond:
1364 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1365 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1366 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1367 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1368 // CHECK9: omp.inner.for.body:
1369 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1370 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1371 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1372 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1373 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
1374 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1375 // CHECK9: omp.inner.for.inc:
1376 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1377 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1378 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1379 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1380 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1381 // CHECK9: omp.inner.for.end:
1382 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1383 // CHECK9: omp.loop.exit:
1384 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1385 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1386 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1387 // CHECK9-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8
1388 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1389 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1390 // CHECK9-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1391 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1392 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1393 // CHECK9-NEXT: ]
1394 // CHECK9: .omp.reduction.case1:
1395 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
1396 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
1397 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1398 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
1399 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1400 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1401 // CHECK9: .omp.reduction.case2:
1402 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
1403 // CHECK9-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
1404 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1405 // CHECK9: .omp.reduction.default:
1406 // CHECK9-NEXT: ret void
1407 //
1408 //
1409 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1410 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1411 // CHECK9-NEXT: entry:
1412 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1413 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1414 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1415 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1416 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1417 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1418 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1419 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1420 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1421 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1422 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1423 // CHECK9-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
1424 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1425 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1426 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1427 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1428 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1429 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1430 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1431 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1432 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1433 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1434 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1435 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1436 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1437 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1438 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1439 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1440 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1441 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1442 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1443 // CHECK9-NEXT: store i32 0, i32* [[SIVAR2]], align 4
1444 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1445 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1446 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1447 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1448 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1449 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1450 // CHECK9: cond.true:
1451 // CHECK9-NEXT: br label [[COND_END:%.*]]
1452 // CHECK9: cond.false:
1453 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1454 // CHECK9-NEXT: br label [[COND_END]]
1455 // CHECK9: cond.end:
1456 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1457 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1458 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1459 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1460 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1461 // CHECK9: omp.inner.for.cond:
1462 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1463 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1464 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1465 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1466 // CHECK9: omp.inner.for.body:
1467 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1468 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1469 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1470 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1471 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1472 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
1473 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1474 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4
1475 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1476 // CHECK9-NEXT: store i32* [[SIVAR2]], i32** [[TMP13]], align 8
1477 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])
1478 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1479 // CHECK9: omp.body.continue:
1480 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1481 // CHECK9: omp.inner.for.inc:
1482 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1483 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
1484 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
1485 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1486 // CHECK9: omp.inner.for.end:
1487 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1488 // CHECK9: omp.loop.exit:
1489 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1490 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1491 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i32* [[SIVAR2]] to i8*
1492 // CHECK9-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
1493 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1494 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP17]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1495 // CHECK9-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1496 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1497 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1498 // CHECK9-NEXT: ]
1499 // CHECK9: .omp.reduction.case1:
1500 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP0]], align 4
1501 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4
1502 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1503 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
1504 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1505 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1506 // CHECK9: .omp.reduction.case2:
1507 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR2]], align 4
1508 // CHECK9-NEXT: [[TMP22:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP21]] monotonic, align 4
1509 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1510 // CHECK9: .omp.reduction.default:
1511 // CHECK9-NEXT: ret void
1512 //
1513 //
1514 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1515 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
1516 // CHECK9-NEXT: entry:
1517 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1518 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1519 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1520 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1521 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1522 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1523 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1524 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1525 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1526 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1527 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1528 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1529 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1530 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1531 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1532 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1533 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1534 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1535 // CHECK9-NEXT: ret void
1536 //
1537 //
1538 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1539 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] {
1540 // CHECK9-NEXT: entry:
1541 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1542 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1543 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1544 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1545 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1546 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1547 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1548 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1549 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1550 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1551 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1552 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1553 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1554 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1555 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1556 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1557 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1558 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1559 // CHECK9-NEXT: ret void
1560 //
1561 //
1562 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1563 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1564 // CHECK9-NEXT: entry:
1565 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1566 // CHECK9-NEXT: ret void
1567 //
1568