1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8 
9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 
16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 
20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 
24 // expected-no-diagnostics
25 #ifndef HEADER
26 #define HEADER
27 
28 template <typename T>
29 T tmain() {
30   T t_var = T();
31   T vec[] = {1, 2};
32 #pragma omp target
33 #pragma omp teams distribute parallel for reduction(+: t_var)
34   for (int i = 0; i < 2; ++i) {
35     t_var += (T) i;
36   }
37   return T();
38 }
39 
40 int main() {
41   static int sivar;
42 #ifdef LAMBDA
43 
44   [&]() {
45 #pragma omp target
46 #pragma omp teams distribute parallel for reduction(+: sivar)
47   for (int i = 0; i < 2; ++i) {
48 
49     // Skip global and bound tid vars
50 
51 
52 
53     // Skip global and bound tid vars, and prev lb and ub vars
54     // skip loop vars
55 
56 
57     sivar += i;
58 
59     [&]() {
60 
61       sivar += 4;
62 
63     }();
64   }
65   }();
66   return 0;
67 #else
68 #pragma omp target
69 #pragma omp teams distribute parallel for reduction(+: sivar)
70   for (int i = 0; i < 2; ++i) {
71     sivar += i;
72   }
73   return tmain<int>();
74 #endif
75 }
76 
77 
78 
79 
80 // Skip global and bound tid vars
81 
82 
83 // Skip global and bound tid vars, and prev lb and ub
84 // skip loop vars
85 
86 
87 
88 
89 // Skip global and bound tid vars
90 
91 
92 // Skip global and bound tid vars, and prev lb and ub vars
93 // skip loop vars
94 
95 #endif
96 // CHECK1-LABEL: define {{[^@]+}}@main
97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
98 // CHECK1-NEXT:  entry:
99 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT:    [[SIVAR_CASTED:%.*]] = alloca i64, align 8
101 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
102 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
103 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
104 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
105 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
106 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
107 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
108 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[CONV]], align 4
109 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
110 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
111 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
112 // CHECK1-NEXT:    store i64 [[TMP1]], i64* [[TMP3]], align 8
113 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
114 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
115 // CHECK1-NEXT:    store i64 [[TMP1]], i64* [[TMP5]], align 8
116 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
117 // CHECK1-NEXT:    store i8* null, i8** [[TMP6]], align 8
118 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
119 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
120 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2)
121 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
122 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
123 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
124 // CHECK1:       omp_offload.failed:
125 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
126 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
127 // CHECK1:       omp_offload.cont:
128 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
129 // CHECK1-NEXT:    ret i32 [[CALL]]
130 //
131 //
132 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
133 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
134 // CHECK1-NEXT:  entry:
135 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i64, align 8
136 // CHECK1-NEXT:    store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
137 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
138 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
139 // CHECK1-NEXT:    ret void
140 //
141 //
142 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
143 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
144 // CHECK1-NEXT:  entry:
145 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
146 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
147 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
148 // CHECK1-NEXT:    [[SIVAR1:%.*]] = alloca i32, align 4
149 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
150 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
151 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
152 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
153 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
154 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
155 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
156 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
157 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
158 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
159 // CHECK1-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
160 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
161 // CHECK1-NEXT:    store i32 0, i32* [[SIVAR1]], align 4
162 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
163 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
164 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
165 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
166 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
167 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
168 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
169 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
170 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
171 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
172 // CHECK1:       cond.true:
173 // CHECK1-NEXT:    br label [[COND_END:%.*]]
174 // CHECK1:       cond.false:
175 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
176 // CHECK1-NEXT:    br label [[COND_END]]
177 // CHECK1:       cond.end:
178 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
179 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
180 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
181 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
182 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
183 // CHECK1:       omp.inner.for.cond:
184 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
185 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
186 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
187 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
188 // CHECK1:       omp.inner.for.body:
189 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
190 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
191 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
192 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
193 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
194 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
195 // CHECK1:       omp.inner.for.inc:
196 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
197 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
198 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
199 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
200 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
201 // CHECK1:       omp.inner.for.end:
202 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
203 // CHECK1:       omp.loop.exit:
204 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
205 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
206 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
207 // CHECK1-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
208 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
209 // CHECK1-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
210 // CHECK1-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
211 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
212 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
213 // CHECK1-NEXT:    ]
214 // CHECK1:       .omp.reduction.case1:
215 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
216 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
217 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
218 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[TMP0]], align 4
219 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
220 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
221 // CHECK1:       .omp.reduction.case2:
222 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
223 // CHECK1-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
224 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
225 // CHECK1:       .omp.reduction.default:
226 // CHECK1-NEXT:    ret void
227 //
228 //
229 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
230 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
231 // CHECK1-NEXT:  entry:
232 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
233 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
234 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
235 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
236 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
237 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
238 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
240 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
241 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
242 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT:    [[SIVAR2:%.*]] = alloca i32, align 4
244 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
245 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
246 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
247 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
248 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
249 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
250 // CHECK1-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
251 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
252 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
253 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
254 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
255 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
256 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
257 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
258 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
259 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
260 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
261 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
262 // CHECK1-NEXT:    store i32 0, i32* [[SIVAR2]], align 4
263 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
264 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
265 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
266 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
267 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
268 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
269 // CHECK1:       cond.true:
270 // CHECK1-NEXT:    br label [[COND_END:%.*]]
271 // CHECK1:       cond.false:
272 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
273 // CHECK1-NEXT:    br label [[COND_END]]
274 // CHECK1:       cond.end:
275 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
276 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
277 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
278 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
279 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
280 // CHECK1:       omp.inner.for.cond:
281 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
282 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
283 // CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
284 // CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
285 // CHECK1:       omp.inner.for.body:
286 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
287 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
288 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
289 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
290 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
291 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
292 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
293 // CHECK1-NEXT:    store i32 [[ADD4]], i32* [[SIVAR2]], align 4
294 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
295 // CHECK1:       omp.body.continue:
296 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
297 // CHECK1:       omp.inner.for.inc:
298 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
299 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
300 // CHECK1-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
301 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
302 // CHECK1:       omp.inner.for.end:
303 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
304 // CHECK1:       omp.loop.exit:
305 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
306 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
307 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR2]] to i8*
308 // CHECK1-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
309 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
310 // CHECK1-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
311 // CHECK1-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
312 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
313 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
314 // CHECK1-NEXT:    ]
315 // CHECK1:       .omp.reduction.case1:
316 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
317 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR2]], align 4
318 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
319 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[TMP0]], align 4
320 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
321 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
322 // CHECK1:       .omp.reduction.case2:
323 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4
324 // CHECK1-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
325 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
326 // CHECK1:       .omp.reduction.default:
327 // CHECK1-NEXT:    ret void
328 //
329 //
330 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
331 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
332 // CHECK1-NEXT:  entry:
333 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
334 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
335 // CHECK1-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
336 // CHECK1-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
337 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
338 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
339 // CHECK1-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
340 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
341 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
342 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
343 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
344 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
345 // CHECK1-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
346 // CHECK1-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
347 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
348 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
349 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
350 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
351 // CHECK1-NEXT:    ret void
352 //
353 //
354 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
355 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
356 // CHECK1-NEXT:  entry:
357 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
358 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
359 // CHECK1-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
360 // CHECK1-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
361 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
362 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
363 // CHECK1-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
364 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
365 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
366 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
367 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
368 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
369 // CHECK1-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
370 // CHECK1-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
371 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
372 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
373 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
374 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
375 // CHECK1-NEXT:    ret void
376 //
377 //
378 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
379 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
380 // CHECK1-NEXT:  entry:
381 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
382 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
383 // CHECK1-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
384 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
385 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
386 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
387 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
388 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 4
389 // CHECK1-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
390 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
391 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
392 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
393 // CHECK1-NEXT:    store i32 [[TMP1]], i32* [[CONV]], align 4
394 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
395 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
396 // CHECK1-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
397 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP4]], align 8
398 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
399 // CHECK1-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
400 // CHECK1-NEXT:    store i64 [[TMP2]], i64* [[TMP6]], align 8
401 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
402 // CHECK1-NEXT:    store i8* null, i8** [[TMP7]], align 8
403 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
404 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
405 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2)
406 // CHECK1-NEXT:    [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
407 // CHECK1-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
408 // CHECK1-NEXT:    br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
409 // CHECK1:       omp_offload.failed:
410 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]]
411 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
412 // CHECK1:       omp_offload.cont:
413 // CHECK1-NEXT:    ret i32 0
414 //
415 //
416 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
417 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
418 // CHECK1-NEXT:  entry:
419 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
420 // CHECK1-NEXT:    store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
421 // CHECK1-NEXT:    [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
422 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]])
423 // CHECK1-NEXT:    ret void
424 //
425 //
426 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
427 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
428 // CHECK1-NEXT:  entry:
429 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
430 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
431 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
432 // CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
433 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
434 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
435 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
436 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
437 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
438 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
439 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
440 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
441 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
442 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
443 // CHECK1-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
444 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
445 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR1]], align 4
446 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
447 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
448 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
449 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
450 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
451 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
452 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
453 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
454 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
455 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
456 // CHECK1:       cond.true:
457 // CHECK1-NEXT:    br label [[COND_END:%.*]]
458 // CHECK1:       cond.false:
459 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
460 // CHECK1-NEXT:    br label [[COND_END]]
461 // CHECK1:       cond.end:
462 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
463 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
464 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
465 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
466 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
467 // CHECK1:       omp.inner.for.cond:
468 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
469 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
470 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
471 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
472 // CHECK1:       omp.inner.for.body:
473 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
474 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
475 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
476 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
477 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[T_VAR1]])
478 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
479 // CHECK1:       omp.inner.for.inc:
480 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
481 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
482 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
483 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
484 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
485 // CHECK1:       omp.inner.for.end:
486 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
487 // CHECK1:       omp.loop.exit:
488 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
489 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
490 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8*
491 // CHECK1-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
492 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
493 // CHECK1-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
494 // CHECK1-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
495 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
496 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
497 // CHECK1-NEXT:    ]
498 // CHECK1:       .omp.reduction.case1:
499 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
500 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
501 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
502 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[TMP0]], align 4
503 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
504 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
505 // CHECK1:       .omp.reduction.case2:
506 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
507 // CHECK1-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
508 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
509 // CHECK1:       .omp.reduction.default:
510 // CHECK1-NEXT:    ret void
511 //
512 //
513 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
514 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
515 // CHECK1-NEXT:  entry:
516 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
517 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
518 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
519 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
520 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
521 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
522 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
523 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
524 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
525 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
526 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
527 // CHECK1-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
528 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
529 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
530 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
531 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
532 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
533 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
534 // CHECK1-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
535 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
536 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
537 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
538 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
539 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
540 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
541 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
542 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
543 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
544 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
545 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
546 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR2]], align 4
547 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
548 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
549 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
550 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
551 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
552 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
553 // CHECK1:       cond.true:
554 // CHECK1-NEXT:    br label [[COND_END:%.*]]
555 // CHECK1:       cond.false:
556 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
557 // CHECK1-NEXT:    br label [[COND_END]]
558 // CHECK1:       cond.end:
559 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
560 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
561 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
562 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
563 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
564 // CHECK1:       omp.inner.for.cond:
565 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
566 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
567 // CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
568 // CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
569 // CHECK1:       omp.inner.for.body:
570 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
571 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
572 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
573 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
574 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
575 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4
576 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
577 // CHECK1-NEXT:    store i32 [[ADD4]], i32* [[T_VAR2]], align 4
578 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
579 // CHECK1:       omp.body.continue:
580 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
581 // CHECK1:       omp.inner.for.inc:
582 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
583 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
584 // CHECK1-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
585 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
586 // CHECK1:       omp.inner.for.end:
587 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
588 // CHECK1:       omp.loop.exit:
589 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
590 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
591 // CHECK1-NEXT:    [[TMP15:%.*]] = bitcast i32* [[T_VAR2]] to i8*
592 // CHECK1-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
593 // CHECK1-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
594 // CHECK1-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
595 // CHECK1-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
596 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
597 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
598 // CHECK1-NEXT:    ]
599 // CHECK1:       .omp.reduction.case1:
600 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
601 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[T_VAR2]], align 4
602 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
603 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[TMP0]], align 4
604 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
605 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
606 // CHECK1:       .omp.reduction.case2:
607 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4
608 // CHECK1-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
609 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
610 // CHECK1:       .omp.reduction.default:
611 // CHECK1-NEXT:    ret void
612 //
613 //
614 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
615 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
616 // CHECK1-NEXT:  entry:
617 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
618 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
619 // CHECK1-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
620 // CHECK1-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
621 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
622 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
623 // CHECK1-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
624 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
625 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
626 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
627 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
628 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
629 // CHECK1-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
630 // CHECK1-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
631 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
632 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
633 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
634 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
635 // CHECK1-NEXT:    ret void
636 //
637 //
638 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
639 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
640 // CHECK1-NEXT:  entry:
641 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
642 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
643 // CHECK1-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
644 // CHECK1-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
645 // CHECK1-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
646 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
647 // CHECK1-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
648 // CHECK1-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
649 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
650 // CHECK1-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
651 // CHECK1-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
652 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
653 // CHECK1-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
654 // CHECK1-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
655 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
656 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
657 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
658 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
659 // CHECK1-NEXT:    ret void
660 //
661 //
662 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
663 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
664 // CHECK1-NEXT:  entry:
665 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
666 // CHECK1-NEXT:    ret void
667 //
668 //
669 // CHECK3-LABEL: define {{[^@]+}}@main
670 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
671 // CHECK3-NEXT:  entry:
672 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
673 // CHECK3-NEXT:    [[SIVAR_CASTED:%.*]] = alloca i32, align 4
674 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
675 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
676 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
677 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
678 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
679 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
680 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4
681 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4
682 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
683 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
684 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[TMP3]], align 4
685 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
686 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
687 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[TMP5]], align 4
688 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
689 // CHECK3-NEXT:    store i8* null, i8** [[TMP6]], align 4
690 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
691 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
692 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2)
693 // CHECK3-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
694 // CHECK3-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
695 // CHECK3-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
696 // CHECK3:       omp_offload.failed:
697 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
698 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
699 // CHECK3:       omp_offload.cont:
700 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
701 // CHECK3-NEXT:    ret i32 [[CALL]]
702 //
703 //
704 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
705 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
706 // CHECK3-NEXT:  entry:
707 // CHECK3-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32, align 4
708 // CHECK3-NEXT:    store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4
709 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]])
710 // CHECK3-NEXT:    ret void
711 //
712 //
713 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
714 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
715 // CHECK3-NEXT:  entry:
716 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
717 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
718 // CHECK3-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
719 // CHECK3-NEXT:    [[SIVAR1:%.*]] = alloca i32, align 4
720 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
721 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
722 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
723 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
724 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
725 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
726 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
727 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
728 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
729 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
730 // CHECK3-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
731 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
732 // CHECK3-NEXT:    store i32 0, i32* [[SIVAR1]], align 4
733 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
734 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
735 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
736 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
737 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
738 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
739 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
740 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
741 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
742 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
743 // CHECK3:       cond.true:
744 // CHECK3-NEXT:    br label [[COND_END:%.*]]
745 // CHECK3:       cond.false:
746 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
747 // CHECK3-NEXT:    br label [[COND_END]]
748 // CHECK3:       cond.end:
749 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
750 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
751 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
752 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
753 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
754 // CHECK3:       omp.inner.for.cond:
755 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
756 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
757 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
758 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
759 // CHECK3:       omp.inner.for.body:
760 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
761 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
762 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[SIVAR1]])
763 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
764 // CHECK3:       omp.inner.for.inc:
765 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
766 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
767 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
768 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
769 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
770 // CHECK3:       omp.inner.for.end:
771 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
772 // CHECK3:       omp.loop.exit:
773 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
774 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
775 // CHECK3-NEXT:    [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8*
776 // CHECK3-NEXT:    store i8* [[TMP13]], i8** [[TMP12]], align 4
777 // CHECK3-NEXT:    [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
778 // CHECK3-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
779 // CHECK3-NEXT:    switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
780 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
781 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
782 // CHECK3-NEXT:    ]
783 // CHECK3:       .omp.reduction.case1:
784 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
785 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4
786 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
787 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[TMP0]], align 4
788 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
789 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
790 // CHECK3:       .omp.reduction.case2:
791 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4
792 // CHECK3-NEXT:    [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
793 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
794 // CHECK3:       .omp.reduction.default:
795 // CHECK3-NEXT:    ret void
796 //
797 //
798 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
799 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
800 // CHECK3-NEXT:  entry:
801 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
802 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
803 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
804 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
805 // CHECK3-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
806 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
807 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
808 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
809 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
810 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
811 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
812 // CHECK3-NEXT:    [[SIVAR1:%.*]] = alloca i32, align 4
813 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
814 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
815 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
816 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
817 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
818 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
819 // CHECK3-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
820 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
821 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
822 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
823 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
824 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
825 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
826 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
827 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
828 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
829 // CHECK3-NEXT:    store i32 0, i32* [[SIVAR1]], align 4
830 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
831 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
832 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
833 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
834 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
835 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
836 // CHECK3:       cond.true:
837 // CHECK3-NEXT:    br label [[COND_END:%.*]]
838 // CHECK3:       cond.false:
839 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
840 // CHECK3-NEXT:    br label [[COND_END]]
841 // CHECK3:       cond.end:
842 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
843 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
844 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
845 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
846 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
847 // CHECK3:       omp.inner.for.cond:
848 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
849 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
850 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
851 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
852 // CHECK3:       omp.inner.for.body:
853 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
854 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
855 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
856 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
857 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
858 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR1]], align 4
859 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
860 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[SIVAR1]], align 4
861 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
862 // CHECK3:       omp.body.continue:
863 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
864 // CHECK3:       omp.inner.for.inc:
865 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
866 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
867 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
868 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
869 // CHECK3:       omp.inner.for.end:
870 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
871 // CHECK3:       omp.loop.exit:
872 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
873 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
874 // CHECK3-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
875 // CHECK3-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 4
876 // CHECK3-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
877 // CHECK3-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
878 // CHECK3-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
879 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
880 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
881 // CHECK3-NEXT:    ]
882 // CHECK3:       .omp.reduction.case1:
883 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
884 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
885 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
886 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[TMP0]], align 4
887 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
888 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
889 // CHECK3:       .omp.reduction.case2:
890 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
891 // CHECK3-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
892 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
893 // CHECK3:       .omp.reduction.default:
894 // CHECK3-NEXT:    ret void
895 //
896 //
897 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
898 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
899 // CHECK3-NEXT:  entry:
900 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
901 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
902 // CHECK3-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
903 // CHECK3-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
904 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
905 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
906 // CHECK3-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
907 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
908 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
909 // CHECK3-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
910 // CHECK3-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
911 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
912 // CHECK3-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
913 // CHECK3-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
914 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
915 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
916 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
917 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
918 // CHECK3-NEXT:    ret void
919 //
920 //
921 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
922 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
923 // CHECK3-NEXT:  entry:
924 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
925 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
926 // CHECK3-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
927 // CHECK3-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
928 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
929 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
930 // CHECK3-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
931 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
932 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
933 // CHECK3-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
934 // CHECK3-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
935 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
936 // CHECK3-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
937 // CHECK3-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
938 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
939 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
940 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
941 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
942 // CHECK3-NEXT:    ret void
943 //
944 //
945 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
946 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
947 // CHECK3-NEXT:  entry:
948 // CHECK3-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
949 // CHECK3-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
950 // CHECK3-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
951 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
952 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
953 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
954 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
955 // CHECK3-NEXT:    store i32 0, i32* [[T_VAR]], align 4
956 // CHECK3-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
957 // CHECK3-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
958 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
959 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4
960 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
961 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
962 // CHECK3-NEXT:    [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
963 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP4]], align 4
964 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
965 // CHECK3-NEXT:    [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
966 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[TMP6]], align 4
967 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
968 // CHECK3-NEXT:    store i8* null, i8** [[TMP7]], align 4
969 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
970 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
971 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2)
972 // CHECK3-NEXT:    [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
973 // CHECK3-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
974 // CHECK3-NEXT:    br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
975 // CHECK3:       omp_offload.failed:
976 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]]
977 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
978 // CHECK3:       omp_offload.cont:
979 // CHECK3-NEXT:    ret i32 0
980 //
981 //
982 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
983 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
984 // CHECK3-NEXT:  entry:
985 // CHECK3-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
986 // CHECK3-NEXT:    store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
987 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]])
988 // CHECK3-NEXT:    ret void
989 //
990 //
991 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
992 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
993 // CHECK3-NEXT:  entry:
994 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
995 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
996 // CHECK3-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
997 // CHECK3-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
998 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
999 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1000 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1001 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1002 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1003 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1004 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1005 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1006 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1007 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1008 // CHECK3-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1009 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1010 // CHECK3-NEXT:    store i32 0, i32* [[T_VAR1]], align 4
1011 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1012 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1013 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1014 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1015 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1016 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1017 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1018 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1019 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1020 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1021 // CHECK3:       cond.true:
1022 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1023 // CHECK3:       cond.false:
1024 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1025 // CHECK3-NEXT:    br label [[COND_END]]
1026 // CHECK3:       cond.end:
1027 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1028 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1029 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1030 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1031 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1032 // CHECK3:       omp.inner.for.cond:
1033 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1034 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1035 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1036 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1037 // CHECK3:       omp.inner.for.body:
1038 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1039 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1040 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[T_VAR1]])
1041 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1042 // CHECK3:       omp.inner.for.inc:
1043 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1044 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1045 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1046 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1047 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1048 // CHECK3:       omp.inner.for.end:
1049 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1050 // CHECK3:       omp.loop.exit:
1051 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1052 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1053 // CHECK3-NEXT:    [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1054 // CHECK3-NEXT:    store i8* [[TMP13]], i8** [[TMP12]], align 4
1055 // CHECK3-NEXT:    [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1056 // CHECK3-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
1057 // CHECK3-NEXT:    switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1058 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1059 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1060 // CHECK3-NEXT:    ]
1061 // CHECK3:       .omp.reduction.case1:
1062 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4
1063 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4
1064 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1065 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[TMP0]], align 4
1066 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1067 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1068 // CHECK3:       .omp.reduction.case2:
1069 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4
1070 // CHECK3-NEXT:    [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4
1071 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1072 // CHECK3:       .omp.reduction.default:
1073 // CHECK3-NEXT:    ret void
1074 //
1075 //
1076 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1077 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1078 // CHECK3-NEXT:  entry:
1079 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1080 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1081 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1082 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1083 // CHECK3-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1084 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1085 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1086 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1087 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1088 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1089 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1090 // CHECK3-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
1091 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1092 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1093 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1094 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1095 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1096 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1097 // CHECK3-NEXT:    store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1098 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1099 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1100 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1101 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1102 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1103 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1104 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1105 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1106 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1107 // CHECK3-NEXT:    store i32 0, i32* [[T_VAR1]], align 4
1108 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1109 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1110 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1111 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1112 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1113 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1114 // CHECK3:       cond.true:
1115 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1116 // CHECK3:       cond.false:
1117 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1118 // CHECK3-NEXT:    br label [[COND_END]]
1119 // CHECK3:       cond.end:
1120 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1121 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1122 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1123 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1124 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1125 // CHECK3:       omp.inner.for.cond:
1126 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1127 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1128 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1129 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1130 // CHECK3:       omp.inner.for.body:
1131 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1132 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1133 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1134 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1135 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1136 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[T_VAR1]], align 4
1137 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1138 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[T_VAR1]], align 4
1139 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1140 // CHECK3:       omp.body.continue:
1141 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1142 // CHECK3:       omp.inner.for.inc:
1143 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1144 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
1145 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
1146 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1147 // CHECK3:       omp.inner.for.end:
1148 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1149 // CHECK3:       omp.loop.exit:
1150 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1151 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1152 // CHECK3-NEXT:    [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1153 // CHECK3-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 4
1154 // CHECK3-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1155 // CHECK3-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
1156 // CHECK3-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1157 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1158 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1159 // CHECK3-NEXT:    ]
1160 // CHECK3:       .omp.reduction.case1:
1161 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
1162 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
1163 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1164 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[TMP0]], align 4
1165 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1166 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1167 // CHECK3:       .omp.reduction.case2:
1168 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
1169 // CHECK3-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
1170 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1171 // CHECK3:       .omp.reduction.default:
1172 // CHECK3-NEXT:    ret void
1173 //
1174 //
1175 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
1176 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1177 // CHECK3-NEXT:  entry:
1178 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
1179 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
1180 // CHECK3-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1181 // CHECK3-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1182 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1183 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1184 // CHECK3-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1185 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1186 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1187 // CHECK3-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1188 // CHECK3-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1189 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1190 // CHECK3-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1191 // CHECK3-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1192 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1193 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1194 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1195 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1196 // CHECK3-NEXT:    ret void
1197 //
1198 //
1199 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
1200 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1201 // CHECK3-NEXT:  entry:
1202 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 4
1203 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 4
1204 // CHECK3-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1205 // CHECK3-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1206 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1207 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1208 // CHECK3-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1209 // CHECK3-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1210 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1211 // CHECK3-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1212 // CHECK3-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1213 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1214 // CHECK3-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1215 // CHECK3-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1216 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1217 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1218 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1219 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1220 // CHECK3-NEXT:    ret void
1221 //
1222 //
1223 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1224 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] {
1225 // CHECK3-NEXT:  entry:
1226 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
1227 // CHECK3-NEXT:    ret void
1228 //
1229 //
1230 // CHECK9-LABEL: define {{[^@]+}}@main
1231 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
1232 // CHECK9-NEXT:  entry:
1233 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1234 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1235 // CHECK9-NEXT:    store i32 0, i32* [[RETVAL]], align 4
1236 // CHECK9-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
1237 // CHECK9-NEXT:    ret i32 0
1238 //
1239 //
1240 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
1241 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1242 // CHECK9-NEXT:  entry:
1243 // CHECK9-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i64, align 8
1244 // CHECK9-NEXT:    store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
1245 // CHECK9-NEXT:    [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
1246 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
1247 // CHECK9-NEXT:    ret void
1248 //
1249 //
1250 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1251 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1252 // CHECK9-NEXT:  entry:
1253 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1254 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1255 // CHECK9-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1256 // CHECK9-NEXT:    [[SIVAR1:%.*]] = alloca i32, align 4
1257 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1258 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1259 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1260 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1261 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1262 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1263 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1264 // CHECK9-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1265 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1266 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1267 // CHECK9-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1268 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1269 // CHECK9-NEXT:    store i32 0, i32* [[SIVAR1]], align 4
1270 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1271 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1272 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1273 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1274 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1275 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1276 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1277 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1278 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1279 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1280 // CHECK9:       cond.true:
1281 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1282 // CHECK9:       cond.false:
1283 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1284 // CHECK9-NEXT:    br label [[COND_END]]
1285 // CHECK9:       cond.end:
1286 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1287 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1288 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1289 // CHECK9-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1290 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1291 // CHECK9:       omp.inner.for.cond:
1292 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1293 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1294 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1295 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1296 // CHECK9:       omp.inner.for.body:
1297 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1298 // CHECK9-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1299 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1300 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1301 // CHECK9-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]])
1302 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1303 // CHECK9:       omp.inner.for.inc:
1304 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1305 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1306 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1307 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1308 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
1309 // CHECK9:       omp.inner.for.end:
1310 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1311 // CHECK9:       omp.loop.exit:
1312 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1313 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1314 // CHECK9-NEXT:    [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1315 // CHECK9-NEXT:    store i8* [[TMP15]], i8** [[TMP14]], align 8
1316 // CHECK9-NEXT:    [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1317 // CHECK9-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1318 // CHECK9-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1319 // CHECK9-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1320 // CHECK9-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1321 // CHECK9-NEXT:    ]
1322 // CHECK9:       .omp.reduction.case1:
1323 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
1324 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
1325 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1326 // CHECK9-NEXT:    store i32 [[ADD3]], i32* [[TMP0]], align 4
1327 // CHECK9-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1328 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1329 // CHECK9:       .omp.reduction.case2:
1330 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
1331 // CHECK9-NEXT:    [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
1332 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1333 // CHECK9:       .omp.reduction.default:
1334 // CHECK9-NEXT:    ret void
1335 //
1336 //
1337 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1338 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1339 // CHECK9-NEXT:  entry:
1340 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1341 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1342 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1343 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1344 // CHECK9-NEXT:    [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1345 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1346 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1347 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1348 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1349 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1350 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1351 // CHECK9-NEXT:    [[SIVAR2:%.*]] = alloca i32, align 4
1352 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1353 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1354 // CHECK9-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1355 // CHECK9-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1356 // CHECK9-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1357 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1358 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1359 // CHECK9-NEXT:    store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1360 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1361 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1362 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
1363 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1364 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1365 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1366 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1367 // CHECK9-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1368 // CHECK9-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1369 // CHECK9-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1370 // CHECK9-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1371 // CHECK9-NEXT:    store i32 0, i32* [[SIVAR2]], align 4
1372 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1373 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1374 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1375 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1376 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1377 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1378 // CHECK9:       cond.true:
1379 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1380 // CHECK9:       cond.false:
1381 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1382 // CHECK9-NEXT:    br label [[COND_END]]
1383 // CHECK9:       cond.end:
1384 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1385 // CHECK9-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1386 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1387 // CHECK9-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1388 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1389 // CHECK9:       omp.inner.for.cond:
1390 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1391 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1392 // CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1393 // CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1394 // CHECK9:       omp.inner.for.body:
1395 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1396 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1397 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1398 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1399 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1400 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4
1401 // CHECK9-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1402 // CHECK9-NEXT:    store i32 [[ADD4]], i32* [[SIVAR2]], align 4
1403 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1404 // CHECK9-NEXT:    store i32* [[SIVAR2]], i32** [[TMP13]], align 8
1405 // CHECK9-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])
1406 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1407 // CHECK9:       omp.body.continue:
1408 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1409 // CHECK9:       omp.inner.for.inc:
1410 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1411 // CHECK9-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
1412 // CHECK9-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4
1413 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
1414 // CHECK9:       omp.inner.for.end:
1415 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1416 // CHECK9:       omp.loop.exit:
1417 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1418 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1419 // CHECK9-NEXT:    [[TMP16:%.*]] = bitcast i32* [[SIVAR2]] to i8*
1420 // CHECK9-NEXT:    store i8* [[TMP16]], i8** [[TMP15]], align 8
1421 // CHECK9-NEXT:    [[TMP17:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1422 // CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP17]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1423 // CHECK9-NEXT:    switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1424 // CHECK9-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1425 // CHECK9-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1426 // CHECK9-NEXT:    ]
1427 // CHECK9:       .omp.reduction.case1:
1428 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP0]], align 4
1429 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4
1430 // CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1431 // CHECK9-NEXT:    store i32 [[ADD6]], i32* [[TMP0]], align 4
1432 // CHECK9-NEXT:    call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1433 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1434 // CHECK9:       .omp.reduction.case2:
1435 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, i32* [[SIVAR2]], align 4
1436 // CHECK9-NEXT:    [[TMP22:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP21]] monotonic, align 4
1437 // CHECK9-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1438 // CHECK9:       .omp.reduction.default:
1439 // CHECK9-NEXT:    ret void
1440 //
1441 //
1442 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1443 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
1444 // CHECK9-NEXT:  entry:
1445 // CHECK9-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
1446 // CHECK9-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
1447 // CHECK9-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1448 // CHECK9-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1449 // CHECK9-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1450 // CHECK9-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1451 // CHECK9-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1452 // CHECK9-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1453 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1454 // CHECK9-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1455 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1456 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1457 // CHECK9-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1458 // CHECK9-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1459 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1460 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1461 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1462 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1463 // CHECK9-NEXT:    ret void
1464 //
1465 //
1466 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1467 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] {
1468 // CHECK9-NEXT:  entry:
1469 // CHECK9-NEXT:    [[DOTADDR:%.*]] = alloca i8*, align 8
1470 // CHECK9-NEXT:    [[DOTADDR1:%.*]] = alloca i8*, align 8
1471 // CHECK9-NEXT:    store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1472 // CHECK9-NEXT:    store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1473 // CHECK9-NEXT:    [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1474 // CHECK9-NEXT:    [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1475 // CHECK9-NEXT:    [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1476 // CHECK9-NEXT:    [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1477 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1478 // CHECK9-NEXT:    [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1479 // CHECK9-NEXT:    [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1480 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1481 // CHECK9-NEXT:    [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1482 // CHECK9-NEXT:    [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1483 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1484 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1485 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1486 // CHECK9-NEXT:    store i32 [[ADD]], i32* [[TMP11]], align 4
1487 // CHECK9-NEXT:    ret void
1488 //
1489 //
1490 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1491 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1492 // CHECK9-NEXT:  entry:
1493 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1494 // CHECK9-NEXT:    ret void
1495 //
1496