1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // add -fopenmp-targets
3 
4 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
7 
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // expected-no-diagnostics
12 #ifndef HEADER
13 #define HEADER
14 
15 typedef __INTPTR_TYPE__ intptr_t;
16 
17 
18 void foo();
19 
20 struct S {
21   intptr_t a, b, c;
SS22   S(intptr_t a) : a(a) {}
operator charS23   operator char() { return a; }
~SS24   ~S() {}
25 };
26 
27 template <typename T>
tmain()28 T tmain() {
29 #pragma omp target
30 #pragma omp teams distribute parallel for proc_bind(master)
31   for(int i = 0; i < 1000; i++) {}
32   return T();
33 }
34 
main()35 int main() {
36 #pragma omp target
37 #pragma omp teams distribute parallel for proc_bind(spread)
38   for(int i = 0; i < 1000; i++) {}
39 #pragma omp target
40 #pragma omp teams distribute parallel for proc_bind(close)
41   for(int i = 0; i < 1000; i++) {}
42   return tmain<int>();
43 }
44 
45 
46 
47 
48 
49 
50 
51 
52 #endif
53 // CHECK1-LABEL: define {{[^@]+}}@main
54 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
55 // CHECK1-NEXT:  entry:
56 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
57 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
58 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
59 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
60 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
61 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
62 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
63 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
64 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
65 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
66 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
67 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
68 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
69 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
70 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
71 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
72 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
73 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
74 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
75 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
76 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
77 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
78 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
79 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
80 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
81 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
82 // CHECK1:       omp_offload.failed:
83 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36() #[[ATTR2:[0-9]+]]
84 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
85 // CHECK1:       omp_offload.cont:
86 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
87 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
88 // CHECK1-NEXT:    store i32 1, i32* [[TMP11]], align 4
89 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
90 // CHECK1-NEXT:    store i32 0, i32* [[TMP12]], align 4
91 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
92 // CHECK1-NEXT:    store i8** null, i8*** [[TMP13]], align 8
93 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
94 // CHECK1-NEXT:    store i8** null, i8*** [[TMP14]], align 8
95 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
96 // CHECK1-NEXT:    store i64* null, i64** [[TMP15]], align 8
97 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
98 // CHECK1-NEXT:    store i64* null, i64** [[TMP16]], align 8
99 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
100 // CHECK1-NEXT:    store i8** null, i8*** [[TMP17]], align 8
101 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
102 // CHECK1-NEXT:    store i8** null, i8*** [[TMP18]], align 8
103 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
104 // CHECK1-NEXT:    store i64 1000, i64* [[TMP19]], align 8
105 // CHECK1-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l39.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
106 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
107 // CHECK1-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
108 // CHECK1:       omp_offload.failed3:
109 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l39() #[[ATTR2]]
110 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
111 // CHECK1:       omp_offload.cont4:
112 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
113 // CHECK1-NEXT:    ret i32 [[CALL]]
114 //
115 //
116 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36
117 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
118 // CHECK1-NEXT:  entry:
119 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
120 // CHECK1-NEXT:    ret void
121 //
122 //
123 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
124 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
125 // CHECK1-NEXT:  entry:
126 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
127 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
128 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
129 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
130 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
131 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
132 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
133 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
134 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
135 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
136 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
137 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
138 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
139 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
140 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
141 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
142 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
143 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
144 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
145 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
146 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
147 // CHECK1:       cond.true:
148 // CHECK1-NEXT:    br label [[COND_END:%.*]]
149 // CHECK1:       cond.false:
150 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
151 // CHECK1-NEXT:    br label [[COND_END]]
152 // CHECK1:       cond.end:
153 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
154 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
155 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
156 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
157 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
158 // CHECK1:       omp.inner.for.cond:
159 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
160 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
161 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
162 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
163 // CHECK1:       omp.inner.for.body:
164 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 4)
165 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
166 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
167 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
168 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
169 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
170 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
171 // CHECK1:       omp.inner.for.inc:
172 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
173 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
174 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
175 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
176 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
177 // CHECK1:       omp.inner.for.end:
178 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
179 // CHECK1:       omp.loop.exit:
180 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
181 // CHECK1-NEXT:    ret void
182 //
183 //
184 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
185 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
186 // CHECK1-NEXT:  entry:
187 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
188 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
189 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
190 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
191 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
192 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
193 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
194 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
198 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
199 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
200 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
201 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
202 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
203 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
204 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
205 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
206 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
207 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
208 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
209 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
210 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
211 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
212 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
213 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
214 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
215 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
216 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
217 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
218 // CHECK1:       cond.true:
219 // CHECK1-NEXT:    br label [[COND_END:%.*]]
220 // CHECK1:       cond.false:
221 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
222 // CHECK1-NEXT:    br label [[COND_END]]
223 // CHECK1:       cond.end:
224 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
225 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
226 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
227 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
228 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
229 // CHECK1:       omp.inner.for.cond:
230 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
231 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
232 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
233 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
234 // CHECK1:       omp.inner.for.body:
235 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
236 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
237 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
238 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
239 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
240 // CHECK1:       omp.body.continue:
241 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
242 // CHECK1:       omp.inner.for.inc:
243 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
244 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
245 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
246 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
247 // CHECK1:       omp.inner.for.end:
248 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
249 // CHECK1:       omp.loop.exit:
250 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
251 // CHECK1-NEXT:    ret void
252 //
253 //
254 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l39
255 // CHECK1-SAME: () #[[ATTR1]] {
256 // CHECK1-NEXT:  entry:
257 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
258 // CHECK1-NEXT:    ret void
259 //
260 //
261 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
262 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
263 // CHECK1-NEXT:  entry:
264 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
265 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
266 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
267 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
269 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
271 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
272 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
273 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
274 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
275 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
276 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
277 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
278 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
279 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
280 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
281 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
282 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
283 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
284 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
285 // CHECK1:       cond.true:
286 // CHECK1-NEXT:    br label [[COND_END:%.*]]
287 // CHECK1:       cond.false:
288 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
289 // CHECK1-NEXT:    br label [[COND_END]]
290 // CHECK1:       cond.end:
291 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
292 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
293 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
294 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
295 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
296 // CHECK1:       omp.inner.for.cond:
297 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
298 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
299 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
300 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
301 // CHECK1:       omp.inner.for.body:
302 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 3)
303 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
304 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
305 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
306 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
307 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
308 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
309 // CHECK1:       omp.inner.for.inc:
310 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
311 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
312 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
313 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
314 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
315 // CHECK1:       omp.inner.for.end:
316 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
317 // CHECK1:       omp.loop.exit:
318 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
319 // CHECK1-NEXT:    ret void
320 //
321 //
322 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
323 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
324 // CHECK1-NEXT:  entry:
325 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
326 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
327 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
328 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
329 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
330 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
331 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
332 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
333 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
334 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
335 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
336 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
337 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
338 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
339 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
340 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
341 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
342 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
343 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
344 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
345 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
346 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
347 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
348 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
349 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
350 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
351 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
352 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
353 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
354 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
355 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
356 // CHECK1:       cond.true:
357 // CHECK1-NEXT:    br label [[COND_END:%.*]]
358 // CHECK1:       cond.false:
359 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
360 // CHECK1-NEXT:    br label [[COND_END]]
361 // CHECK1:       cond.end:
362 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
363 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
364 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
365 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
366 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
367 // CHECK1:       omp.inner.for.cond:
368 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
369 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
370 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
371 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
372 // CHECK1:       omp.inner.for.body:
373 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
374 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
375 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
376 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
377 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
378 // CHECK1:       omp.body.continue:
379 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
380 // CHECK1:       omp.inner.for.inc:
381 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
382 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
383 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
384 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
385 // CHECK1:       omp.inner.for.end:
386 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
387 // CHECK1:       omp.loop.exit:
388 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
389 // CHECK1-NEXT:    ret void
390 //
391 //
392 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
393 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat {
394 // CHECK1-NEXT:  entry:
395 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
396 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
397 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
398 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
399 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
400 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
401 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
402 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
403 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
404 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
405 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
406 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
407 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
408 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
409 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
410 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
411 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
412 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
413 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
414 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
415 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
416 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
417 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
418 // CHECK1:       omp_offload.failed:
419 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29() #[[ATTR2]]
420 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
421 // CHECK1:       omp_offload.cont:
422 // CHECK1-NEXT:    ret i32 0
423 //
424 //
425 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29
426 // CHECK1-SAME: () #[[ATTR1]] {
427 // CHECK1-NEXT:  entry:
428 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
429 // CHECK1-NEXT:    ret void
430 //
431 //
432 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
433 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
434 // CHECK1-NEXT:  entry:
435 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
436 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
437 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
438 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
439 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
440 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
443 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
444 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
445 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
446 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
447 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
448 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
449 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
450 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
451 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
452 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
453 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
454 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
455 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
456 // CHECK1:       cond.true:
457 // CHECK1-NEXT:    br label [[COND_END:%.*]]
458 // CHECK1:       cond.false:
459 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
460 // CHECK1-NEXT:    br label [[COND_END]]
461 // CHECK1:       cond.end:
462 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
463 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
464 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
465 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
466 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
467 // CHECK1:       omp.inner.for.cond:
468 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
469 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
470 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
471 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
472 // CHECK1:       omp.inner.for.body:
473 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
474 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
475 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
476 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
477 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
478 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
479 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
480 // CHECK1:       omp.inner.for.inc:
481 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
482 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
483 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
484 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
485 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
486 // CHECK1:       omp.inner.for.end:
487 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
488 // CHECK1:       omp.loop.exit:
489 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
490 // CHECK1-NEXT:    ret void
491 //
492 //
493 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
494 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
495 // CHECK1-NEXT:  entry:
496 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
497 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
498 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
499 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
500 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
501 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
502 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
503 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
504 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
505 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
506 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
507 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
508 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
509 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
510 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
511 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
512 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
513 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
514 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
515 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
516 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
517 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
518 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
519 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
520 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
521 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
522 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
523 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
524 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
525 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
526 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
527 // CHECK1:       cond.true:
528 // CHECK1-NEXT:    br label [[COND_END:%.*]]
529 // CHECK1:       cond.false:
530 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
531 // CHECK1-NEXT:    br label [[COND_END]]
532 // CHECK1:       cond.end:
533 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
534 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
535 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
536 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
537 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
538 // CHECK1:       omp.inner.for.cond:
539 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
540 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
541 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
542 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
543 // CHECK1:       omp.inner.for.body:
544 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
545 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
546 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
547 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
548 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
549 // CHECK1:       omp.body.continue:
550 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
551 // CHECK1:       omp.inner.for.inc:
552 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
553 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
554 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
555 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
556 // CHECK1:       omp.inner.for.end:
557 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
558 // CHECK1:       omp.loop.exit:
559 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
560 // CHECK1-NEXT:    ret void
561 //
562 //
563 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
564 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
565 // CHECK1-NEXT:  entry:
566 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
567 // CHECK1-NEXT:    ret void
568 //
569