1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X][Y]; 25 26 int foo(void) { 27 28 #pragma omp target 29 #pragma omp teams distribute collapse(2) 30 for(int i = 0; i < X; i++) { 31 for(int j = 0; j < Y; j++) { 32 a[i][j] = (T)0; 33 } 34 } 35 36 // discard loop variables not needed here 37 38 return a[0][0]; 39 } 40 }; 41 42 int teams_template_struct(void) { 43 SS<int, 123, 456> V; 44 return V.foo(); 45 46 } 47 #endif // CK1 48 49 // Test host codegen. 50 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 56 57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 63 #ifdef CK2 64 65 template <typename T, int n, int m> 66 int tmain(T argc) { 67 T a[n][m]; 68 #pragma omp target 69 #pragma omp teams distribute collapse(2) 70 for(int i = 0; i < n; i++) { 71 for(int j = 0; j < m; j++) { 72 a[i][j] = (T)0; 73 } 74 } 75 return 0; 76 } 77 78 int main (int argc, char **argv) { 79 int n = 100; 80 int m = 2; 81 int a[n][m]; 82 #pragma omp target 83 #pragma omp teams distribute collapse(2) 84 for(int i = 0; i < n; i++) { 85 for(int j = 0; j < m; j++) { 86 a[i][j] = 0; 87 } 88 } 89 return tmain<int, 10, 2>(argc); 90 } 91 92 93 94 95 96 // discard loop variables not needed here 97 98 #endif // CK2 99 #endif // #ifndef HEADER 100 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 101 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 102 // CHECK1-NEXT: entry: 103 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 104 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 105 // CHECK1-NEXT: ret i32 [[CALL]] 106 // 107 // 108 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 109 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 110 // CHECK1-NEXT: entry: 111 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 112 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 113 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 114 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 115 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 116 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 117 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 118 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 119 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 120 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 121 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 122 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 123 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 124 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 125 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8 126 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 127 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 128 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 129 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 130 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 56088) 131 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 132 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 133 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 134 // CHECK1: omp_offload.failed: 135 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 136 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 137 // CHECK1: omp_offload.cont: 138 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 139 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0 140 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0 141 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 142 // CHECK1-NEXT: ret i32 [[TMP9]] 143 // 144 // 145 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 146 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 147 // CHECK1-NEXT: entry: 148 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 150 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 151 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 152 // CHECK1-NEXT: ret void 153 // 154 // 155 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 156 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 157 // CHECK1-NEXT: entry: 158 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 159 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 160 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 161 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 162 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 163 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 164 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 165 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 166 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 167 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 168 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 169 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4 170 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 171 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 172 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 173 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 174 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 175 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 176 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 177 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 178 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 179 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 180 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 181 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 182 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 183 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 184 // CHECK1: cond.true: 185 // CHECK1-NEXT: br label [[COND_END:%.*]] 186 // CHECK1: cond.false: 187 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 188 // CHECK1-NEXT: br label [[COND_END]] 189 // CHECK1: cond.end: 190 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 191 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 192 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 193 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 194 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 195 // CHECK1: omp.inner.for.cond: 196 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 197 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 198 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 199 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 200 // CHECK1: omp.inner.for.body: 201 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 202 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456 203 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 204 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 205 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 206 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 207 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 208 // CHECK1-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456 209 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 210 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 211 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 212 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 213 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 214 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 215 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 216 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 217 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]] 218 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 219 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 220 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]] 221 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4 222 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 223 // CHECK1: omp.body.continue: 224 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 225 // CHECK1: omp.inner.for.inc: 226 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 227 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1 228 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 229 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 230 // CHECK1: omp.inner.for.end: 231 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 232 // CHECK1: omp.loop.exit: 233 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 234 // CHECK1-NEXT: ret void 235 // 236 // 237 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 238 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 239 // CHECK1-NEXT: entry: 240 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 241 // CHECK1-NEXT: ret void 242 // 243 // 244 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 245 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 246 // CHECK3-NEXT: entry: 247 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 248 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]]) 249 // CHECK3-NEXT: ret i32 [[CALL]] 250 // 251 // 252 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 253 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 254 // CHECK3-NEXT: entry: 255 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 256 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 257 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 258 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 259 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 260 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 261 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 262 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 263 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 264 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 265 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 266 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 267 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 268 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]** 269 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4 270 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 271 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 272 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 273 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 274 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 56088) 275 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 276 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 277 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 278 // CHECK3: omp_offload.failed: 279 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 280 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 281 // CHECK3: omp_offload.cont: 282 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 283 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0 284 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0 285 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4 286 // CHECK3-NEXT: ret i32 [[TMP9]] 287 // 288 // 289 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 290 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 291 // CHECK3-NEXT: entry: 292 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 293 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 294 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 295 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 296 // CHECK3-NEXT: ret void 297 // 298 // 299 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 300 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 301 // CHECK3-NEXT: entry: 302 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 303 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 304 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 305 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 306 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 307 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 308 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 309 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 310 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 311 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 312 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 313 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4 314 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 315 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 316 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 317 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 318 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 319 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4 320 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 321 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 322 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 323 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 324 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 325 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 326 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087 327 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 328 // CHECK3: cond.true: 329 // CHECK3-NEXT: br label [[COND_END:%.*]] 330 // CHECK3: cond.false: 331 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 332 // CHECK3-NEXT: br label [[COND_END]] 333 // CHECK3: cond.end: 334 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 335 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 336 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 337 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 338 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 339 // CHECK3: omp.inner.for.cond: 340 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 341 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 342 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 343 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 344 // CHECK3: omp.inner.for.body: 345 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 346 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456 347 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 348 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 349 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 350 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 351 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 352 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456 353 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456 354 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 355 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 356 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 357 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 358 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 359 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 360 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP11]] 361 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 362 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP12]] 363 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 364 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 365 // CHECK3: omp.body.continue: 366 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 367 // CHECK3: omp.inner.for.inc: 368 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 369 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 370 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 371 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 372 // CHECK3: omp.inner.for.end: 373 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 374 // CHECK3: omp.loop.exit: 375 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 376 // CHECK3-NEXT: ret void 377 // 378 // 379 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 380 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 381 // CHECK3-NEXT: entry: 382 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 383 // CHECK3-NEXT: ret void 384 // 385 // 386 // CHECK9-LABEL: define {{[^@]+}}@main 387 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 388 // CHECK9-NEXT: entry: 389 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 390 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 391 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 392 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 393 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4 394 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 395 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 396 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8 397 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 398 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 399 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8 400 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8 401 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8 402 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8 403 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 404 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 405 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 406 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 407 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8 408 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 409 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 410 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 411 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 412 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4 413 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 414 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 415 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4 416 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64 417 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave() 418 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8 419 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 420 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4 421 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 422 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8 423 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4 424 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 425 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4 426 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8 427 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4 428 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32* 429 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4 430 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8 431 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]] 432 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4 433 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 434 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false) 435 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 436 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64* 437 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8 438 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 439 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64* 440 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8 441 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 442 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8 443 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 444 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64* 445 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8 446 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 447 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 448 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8 449 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 450 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 451 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 452 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64* 453 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8 454 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 455 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64* 456 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8 457 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 458 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8 459 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 460 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64* 461 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8 462 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 463 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64* 464 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8 465 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3 466 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8 467 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 468 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32** 469 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8 470 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 471 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32** 472 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8 473 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 474 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8 475 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4 476 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8 477 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 478 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 479 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 480 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4 481 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4 482 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 483 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4 484 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 485 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0 486 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 487 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64 488 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 489 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0 490 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 491 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 492 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]] 493 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 494 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8 495 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8 496 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1 497 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[ADD]]) 498 // CHECK9-NEXT: [[TMP47:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, i32 5, i8** [[TMP39]], i8** [[TMP40]], i64* [[TMP41]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 499 // CHECK9-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 500 // CHECK9-NEXT: br i1 [[TMP48]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 501 // CHECK9: omp_offload.failed: 502 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 503 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 504 // CHECK9: omp_offload.cont: 505 // CHECK9-NEXT: [[TMP49:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 506 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP49]]) 507 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 508 // CHECK9-NEXT: [[TMP50:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 509 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP50]]) 510 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, i32* [[RETVAL]], align 4 511 // CHECK9-NEXT: ret i32 [[TMP51]] 512 // 513 // 514 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82 515 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 516 // CHECK9-NEXT: entry: 517 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 518 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 519 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 520 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 521 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 522 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 523 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 524 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 525 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 526 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 527 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 528 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32* 529 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 530 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 531 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 532 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 533 // CHECK9-NEXT: ret void 534 // 535 // 536 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 537 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 538 // CHECK9-NEXT: entry: 539 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 540 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 541 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 542 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8 543 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 544 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8 545 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 546 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 547 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 548 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 549 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 550 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 551 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 552 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 553 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 554 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 555 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 556 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 557 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 558 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4 559 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4 560 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 561 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 562 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 563 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8 564 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 565 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8 566 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 567 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 568 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8 569 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 570 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8 571 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8 572 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 573 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 574 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 575 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 576 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 577 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 578 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 579 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 580 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 581 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 582 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 583 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 584 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 585 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 586 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 587 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 588 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4 589 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 590 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 591 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 592 // CHECK9: land.lhs.true: 593 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 594 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 595 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 596 // CHECK9: omp.precond.then: 597 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 598 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 599 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 600 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 601 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 602 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 603 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 604 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 605 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 606 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 607 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 608 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 609 // CHECK9: cond.true: 610 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 611 // CHECK9-NEXT: br label [[COND_END:%.*]] 612 // CHECK9: cond.false: 613 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 614 // CHECK9-NEXT: br label [[COND_END]] 615 // CHECK9: cond.end: 616 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 617 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 618 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 619 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 620 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 621 // CHECK9: omp.inner.for.cond: 622 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 623 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 624 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 625 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 626 // CHECK9: omp.inner.for.body: 627 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 628 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 629 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0 630 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 631 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 632 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 633 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]] 634 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 635 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 636 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 637 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 638 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 639 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 640 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 641 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0 642 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 643 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 644 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 645 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]] 646 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 647 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0 648 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 649 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 650 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 651 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 652 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]] 653 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 654 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 655 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 656 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 657 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I11]], align 4 658 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64 659 // CHECK9-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]] 660 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP28]] 661 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[J12]], align 4 662 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP29]] to i64 663 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]] 664 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4 665 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 666 // CHECK9: omp.body.continue: 667 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 668 // CHECK9: omp.inner.for.inc: 669 // CHECK9-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 670 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP30]], 1 671 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8 672 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 673 // CHECK9: omp.inner.for.end: 674 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 675 // CHECK9: omp.loop.exit: 676 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 677 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4 678 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]]) 679 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 680 // CHECK9: omp.precond.end: 681 // CHECK9-NEXT: ret void 682 // 683 // 684 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 685 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 686 // CHECK9-NEXT: entry: 687 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 688 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 689 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 690 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 691 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 692 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 693 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 694 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 695 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 696 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 697 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8 698 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 699 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 700 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8 701 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 702 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 703 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 704 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 705 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 20) 706 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 707 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 708 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 709 // CHECK9: omp_offload.failed: 710 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 711 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 712 // CHECK9: omp_offload.cont: 713 // CHECK9-NEXT: ret i32 0 714 // 715 // 716 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68 717 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 718 // CHECK9-NEXT: entry: 719 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 720 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 721 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 722 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 723 // CHECK9-NEXT: ret void 724 // 725 // 726 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 727 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 728 // CHECK9-NEXT: entry: 729 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 730 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 731 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8 732 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 733 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 734 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 735 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 736 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 737 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 738 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 739 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 740 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4 741 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 742 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 743 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8 744 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8 745 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 746 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 747 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 748 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 749 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 750 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 751 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 752 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 753 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 754 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 755 // CHECK9: cond.true: 756 // CHECK9-NEXT: br label [[COND_END:%.*]] 757 // CHECK9: cond.false: 758 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 759 // CHECK9-NEXT: br label [[COND_END]] 760 // CHECK9: cond.end: 761 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 762 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 763 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 764 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 765 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 766 // CHECK9: omp.inner.for.cond: 767 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 768 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 769 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 770 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 771 // CHECK9: omp.inner.for.body: 772 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 773 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2 774 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 775 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 776 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 777 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 778 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 779 // CHECK9-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2 780 // CHECK9-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 781 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 782 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 783 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 784 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 785 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 786 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 787 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] 788 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 789 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64 790 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]] 791 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4 792 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 793 // CHECK9: omp.body.continue: 794 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 795 // CHECK9: omp.inner.for.inc: 796 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 797 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1 798 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 799 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 800 // CHECK9: omp.inner.for.end: 801 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 802 // CHECK9: omp.loop.exit: 803 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 804 // CHECK9-NEXT: ret void 805 // 806 // 807 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 808 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 809 // CHECK9-NEXT: entry: 810 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 811 // CHECK9-NEXT: ret void 812 // 813 // 814 // CHECK11-LABEL: define {{[^@]+}}@main 815 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 816 // CHECK11-NEXT: entry: 817 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 818 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 819 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 820 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 821 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4 822 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 823 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 824 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4 825 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 826 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 827 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4 828 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4 829 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4 830 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4 831 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 832 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 833 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 834 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 835 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8 836 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 837 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 838 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 839 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 840 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4 841 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 842 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4 843 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 844 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4 845 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 846 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4 847 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 848 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4 849 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4 850 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4 851 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4 852 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4 853 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4 854 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4 855 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]] 856 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4 857 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64 858 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 859 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false) 860 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 861 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 862 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4 863 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 864 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 865 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4 866 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 867 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 868 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 869 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32* 870 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4 871 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 872 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32* 873 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4 874 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 875 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4 876 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 877 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 878 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4 879 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 880 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32* 881 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4 882 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 883 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4 884 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3 885 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32* 886 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4 887 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3 888 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32* 889 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4 890 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3 891 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4 892 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4 893 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32** 894 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4 895 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4 896 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32** 897 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4 898 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4 899 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4 900 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4 901 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4 902 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 903 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 904 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 905 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4 906 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4 907 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4 908 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4 909 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 910 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0 911 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 912 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 913 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 914 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0 915 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1 916 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64 917 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]] 918 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1 919 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8 920 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8 921 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1 922 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[ADD]]) 923 // CHECK11-NEXT: [[TMP46:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, i32 5, i8** [[TMP38]], i8** [[TMP39]], i64* [[TMP40]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 924 // CHECK11-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0 925 // CHECK11-NEXT: br i1 [[TMP47]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 926 // CHECK11: omp_offload.failed: 927 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 928 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 929 // CHECK11: omp_offload.cont: 930 // CHECK11-NEXT: [[TMP48:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 931 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP48]]) 932 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 933 // CHECK11-NEXT: [[TMP49:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 934 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP49]]) 935 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, i32* [[RETVAL]], align 4 936 // CHECK11-NEXT: ret i32 [[TMP50]] 937 // 938 // 939 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82 940 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 941 // CHECK11-NEXT: entry: 942 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 943 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 944 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 945 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 946 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 947 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 948 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 949 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 950 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 951 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 952 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 953 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 954 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 955 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 956 // CHECK11-NEXT: ret void 957 // 958 // 959 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 960 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 961 // CHECK11-NEXT: entry: 962 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 963 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 964 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 965 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4 966 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 967 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4 968 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 969 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8 970 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 971 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 972 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 973 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 974 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8 975 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 976 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 977 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 978 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 979 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8 980 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 981 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4 982 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4 983 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 984 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 985 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 986 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4 987 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 988 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4 989 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 990 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 991 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4 992 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 993 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4 994 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4 995 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4 996 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4 997 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 998 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4 999 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1000 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0 1001 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1002 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64 1003 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1004 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0 1005 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 1006 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64 1007 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]] 1008 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1 1009 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8 1010 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 1011 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4 1012 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1013 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]] 1014 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]] 1015 // CHECK11: land.lhs.true: 1016 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1017 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]] 1018 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]] 1019 // CHECK11: omp.precond.then: 1020 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 1021 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1022 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8 1023 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8 1024 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1025 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1026 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 1027 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1) 1028 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1029 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1030 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]] 1031 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1032 // CHECK11: cond.true: 1033 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8 1034 // CHECK11-NEXT: br label [[COND_END:%.*]] 1035 // CHECK11: cond.false: 1036 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1037 // CHECK11-NEXT: br label [[COND_END]] 1038 // CHECK11: cond.end: 1039 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ] 1040 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8 1041 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 1042 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8 1043 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1044 // CHECK11: omp.inner.for.cond: 1045 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1046 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 1047 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]] 1048 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1049 // CHECK11: omp.inner.for.body: 1050 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1051 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1052 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0 1053 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 1054 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]] 1055 // CHECK11-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64 1056 // CHECK11-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]] 1057 // CHECK11-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1 1058 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]] 1059 // CHECK11-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32 1060 // CHECK11-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4 1061 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1062 // CHECK11-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1063 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1064 // CHECK11-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0 1065 // CHECK11-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1 1066 // CHECK11-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]] 1067 // CHECK11-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64 1068 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]] 1069 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1070 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0 1071 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1 1072 // CHECK11-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]] 1073 // CHECK11-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64 1074 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]] 1075 // CHECK11-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]] 1076 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1 1077 // CHECK11-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]] 1078 // CHECK11-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32 1079 // CHECK11-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4 1080 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I11]], align 4 1081 // CHECK11-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP3]] 1082 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP28]] 1083 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[J12]], align 4 1084 // CHECK11-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP29]] 1085 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX36]], align 4 1086 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1087 // CHECK11: omp.body.continue: 1088 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1089 // CHECK11: omp.inner.for.inc: 1090 // CHECK11-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8 1091 // CHECK11-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP30]], 1 1092 // CHECK11-NEXT: store i64 [[ADD37]], i64* [[DOTOMP_IV]], align 8 1093 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1094 // CHECK11: omp.inner.for.end: 1095 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1096 // CHECK11: omp.loop.exit: 1097 // CHECK11-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1098 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4 1099 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]]) 1100 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 1101 // CHECK11: omp.precond.end: 1102 // CHECK11-NEXT: ret void 1103 // 1104 // 1105 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_ 1106 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1107 // CHECK11-NEXT: entry: 1108 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1109 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4 1110 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1111 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1112 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1113 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1114 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1115 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1116 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1117 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]** 1118 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4 1119 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1120 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]** 1121 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4 1122 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1123 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 1124 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1125 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1126 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 20) 1127 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1128 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1129 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1130 // CHECK11: omp_offload.failed: 1131 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]] 1132 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1133 // CHECK11: omp_offload.cont: 1134 // CHECK11-NEXT: ret i32 0 1135 // 1136 // 1137 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68 1138 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1139 // CHECK11-NEXT: entry: 1140 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1141 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1142 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1143 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]]) 1144 // CHECK11-NEXT: ret void 1145 // 1146 // 1147 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 1148 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] { 1149 // CHECK11-NEXT: entry: 1150 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1151 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1152 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4 1153 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1154 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1155 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1156 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1157 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1158 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1159 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1160 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 1161 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4 1162 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1163 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1164 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4 1165 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4 1166 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1167 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4 1168 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1169 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1170 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1171 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1172 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1173 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1174 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19 1175 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1176 // CHECK11: cond.true: 1177 // CHECK11-NEXT: br label [[COND_END:%.*]] 1178 // CHECK11: cond.false: 1179 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1180 // CHECK11-NEXT: br label [[COND_END]] 1181 // CHECK11: cond.end: 1182 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1183 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1184 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1185 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1186 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1187 // CHECK11: omp.inner.for.cond: 1188 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1189 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1190 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1191 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1192 // CHECK11: omp.inner.for.body: 1193 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1194 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2 1195 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 1196 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1197 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1198 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1199 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1200 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2 1201 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2 1202 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]] 1203 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1 1204 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] 1205 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4 1206 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1207 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP11]] 1208 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 1209 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP12]] 1210 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4 1211 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1212 // CHECK11: omp.body.continue: 1213 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1214 // CHECK11: omp.inner.for.inc: 1215 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1216 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1 1217 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 1218 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 1219 // CHECK11: omp.inner.for.end: 1220 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1221 // CHECK11: omp.loop.exit: 1222 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1223 // CHECK11-NEXT: ret void 1224 // 1225 // 1226 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1227 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 1228 // CHECK11-NEXT: entry: 1229 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 1230 // CHECK11-NEXT: ret void 1231 // 1232