1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X][Y];
25
fooSS26 int foo(void) {
27
28 #pragma omp target
29 #pragma omp teams distribute collapse(2)
30 for(int i = 0; i < X; i++) {
31 for(int j = 0; j < Y; j++) {
32 a[i][j] = (T)0;
33 }
34 }
35
36 // discard loop variables not needed here
37
38 return a[0][0];
39 }
40 };
41
teams_template_struct(void)42 int teams_template_struct(void) {
43 SS<int, 123, 456> V;
44 return V.foo();
45
46 }
47 #endif // CK1
48
49 // Test host codegen.
50 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
56
57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
63 #ifdef CK2
64
65 template <typename T, int n, int m>
tmain(T argc)66 int tmain(T argc) {
67 T a[n][m];
68 #pragma omp target
69 #pragma omp teams distribute collapse(2)
70 for(int i = 0; i < n; i++) {
71 for(int j = 0; j < m; j++) {
72 a[i][j] = (T)0;
73 }
74 }
75 return 0;
76 }
77
main(int argc,char ** argv)78 int main (int argc, char **argv) {
79 int n = 100;
80 int m = 2;
81 int a[n][m];
82 #pragma omp target
83 #pragma omp teams distribute collapse(2)
84 for(int i = 0; i < n; i++) {
85 for(int j = 0; j < m; j++) {
86 a[i][j] = 0;
87 }
88 }
89 return tmain<int, 10, 2>(argc);
90 }
91
92
93
94
95
96 // discard loop variables not needed here
97
98 #endif // CK2
99 #endif // #ifndef HEADER
100 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
101 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
102 // CHECK1-NEXT: entry:
103 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
104 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
105 // CHECK1-NEXT: ret i32 [[CALL]]
106 //
107 //
108 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
109 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
110 // CHECK1-NEXT: entry:
111 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
112 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
113 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
114 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
115 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
116 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
117 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
118 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
119 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
120 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
121 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
122 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
123 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
124 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
125 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
126 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
127 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
128 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
129 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
130 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
131 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
132 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
133 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
134 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
135 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
136 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
137 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
138 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
139 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
140 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
141 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
142 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
143 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
144 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
145 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
146 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
147 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
148 // CHECK1-NEXT: store i64 56088, i64* [[TMP15]], align 8
149 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
150 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
151 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
152 // CHECK1: omp_offload.failed:
153 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
154 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
155 // CHECK1: omp_offload.cont:
156 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
157 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
158 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
159 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
160 // CHECK1-NEXT: ret i32 [[TMP18]]
161 //
162 //
163 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
164 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
165 // CHECK1-NEXT: entry:
166 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
167 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
168 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
169 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
170 // CHECK1-NEXT: ret void
171 //
172 //
173 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
174 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
175 // CHECK1-NEXT: entry:
176 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
177 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
178 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
179 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
180 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
181 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
182 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
183 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
184 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
185 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
186 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
187 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
188 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
189 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
190 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
191 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
192 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
193 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
194 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
195 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
196 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
197 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
198 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
199 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
200 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
201 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
202 // CHECK1: cond.true:
203 // CHECK1-NEXT: br label [[COND_END:%.*]]
204 // CHECK1: cond.false:
205 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
206 // CHECK1-NEXT: br label [[COND_END]]
207 // CHECK1: cond.end:
208 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
209 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
210 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
211 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
212 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
213 // CHECK1: omp.inner.for.cond:
214 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
215 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
216 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
217 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
218 // CHECK1: omp.inner.for.body:
219 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
220 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456
221 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
222 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
223 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
224 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
225 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
226 // CHECK1-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456
227 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
228 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
229 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
230 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
231 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
232 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
233 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
234 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
235 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
236 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
237 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64
238 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
239 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4
240 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
241 // CHECK1: omp.body.continue:
242 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
243 // CHECK1: omp.inner.for.inc:
244 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
245 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
246 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
247 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
248 // CHECK1: omp.inner.for.end:
249 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
250 // CHECK1: omp.loop.exit:
251 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
252 // CHECK1-NEXT: ret void
253 //
254 //
255 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
256 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
257 // CHECK1-NEXT: entry:
258 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
259 // CHECK1-NEXT: ret void
260 //
261 //
262 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
263 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
264 // CHECK3-NEXT: entry:
265 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
266 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
267 // CHECK3-NEXT: ret i32 [[CALL]]
268 //
269 //
270 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
271 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
272 // CHECK3-NEXT: entry:
273 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
274 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
275 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
276 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
277 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
278 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
279 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
280 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
281 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
282 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
283 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
284 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
285 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
286 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
287 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
288 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
289 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
290 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
291 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
292 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
293 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
294 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
295 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
296 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
297 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
298 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
299 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
300 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
301 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
302 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
303 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
304 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
305 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
306 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
307 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
308 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
309 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
310 // CHECK3-NEXT: store i64 56088, i64* [[TMP15]], align 8
311 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
312 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
313 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
314 // CHECK3: omp_offload.failed:
315 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
316 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
317 // CHECK3: omp_offload.cont:
318 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
319 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
320 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
321 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
322 // CHECK3-NEXT: ret i32 [[TMP18]]
323 //
324 //
325 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
326 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
327 // CHECK3-NEXT: entry:
328 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
329 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
330 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
331 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
332 // CHECK3-NEXT: ret void
333 //
334 //
335 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
336 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
337 // CHECK3-NEXT: entry:
338 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
339 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
340 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
341 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
342 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
343 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
344 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
345 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
346 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
347 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
348 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
349 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
350 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
351 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
352 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
353 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
354 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
355 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
356 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
357 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
358 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
359 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
360 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
361 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
362 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
363 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
364 // CHECK3: cond.true:
365 // CHECK3-NEXT: br label [[COND_END:%.*]]
366 // CHECK3: cond.false:
367 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
368 // CHECK3-NEXT: br label [[COND_END]]
369 // CHECK3: cond.end:
370 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
371 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
372 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
373 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
374 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
375 // CHECK3: omp.inner.for.cond:
376 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
377 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
378 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
379 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
380 // CHECK3: omp.inner.for.body:
381 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
382 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456
383 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
384 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
385 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
386 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
387 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
388 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456
389 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
390 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
391 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
392 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
393 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
394 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
395 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
396 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP11]]
397 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
398 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP12]]
399 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
400 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
401 // CHECK3: omp.body.continue:
402 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
403 // CHECK3: omp.inner.for.inc:
404 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
405 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1
406 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
407 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
408 // CHECK3: omp.inner.for.end:
409 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
410 // CHECK3: omp.loop.exit:
411 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
412 // CHECK3-NEXT: ret void
413 //
414 //
415 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
416 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
417 // CHECK3-NEXT: entry:
418 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
419 // CHECK3-NEXT: ret void
420 //
421 //
422 // CHECK9-LABEL: define {{[^@]+}}@main
423 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
424 // CHECK9-NEXT: entry:
425 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
426 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
427 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
428 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
429 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4
430 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
431 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
432 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
433 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
434 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
435 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
436 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
437 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
438 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
439 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
440 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
441 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
442 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
443 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
444 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
445 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
446 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
447 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
448 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4
449 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
450 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
451 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
452 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
453 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
454 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
455 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
456 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
457 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
458 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
459 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
460 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
461 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
462 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
463 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
464 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
465 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
466 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
467 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
468 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
469 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
470 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false)
471 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
472 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
473 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8
474 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
475 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
476 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8
477 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
478 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
479 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
480 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
481 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
482 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
483 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
484 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
485 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
486 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
487 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
488 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64*
489 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8
490 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
491 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
492 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8
493 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
494 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8
495 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
496 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
497 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8
498 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
499 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
500 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
501 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
502 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8
503 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
504 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32**
505 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8
506 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
507 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
508 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8
509 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
510 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8
511 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
512 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8
513 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
514 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
515 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
516 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4
517 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4
518 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
519 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4
520 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
521 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0
522 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
523 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
524 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
525 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0
526 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
527 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
528 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
529 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
530 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
531 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
532 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1
533 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
534 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
535 // CHECK9-NEXT: store i32 1, i32* [[TMP47]], align 4
536 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
537 // CHECK9-NEXT: store i32 5, i32* [[TMP48]], align 4
538 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
539 // CHECK9-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 8
540 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
541 // CHECK9-NEXT: store i8** [[TMP40]], i8*** [[TMP50]], align 8
542 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
543 // CHECK9-NEXT: store i64* [[TMP41]], i64** [[TMP51]], align 8
544 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
545 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP52]], align 8
546 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
547 // CHECK9-NEXT: store i8** null, i8*** [[TMP53]], align 8
548 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
549 // CHECK9-NEXT: store i8** null, i8*** [[TMP54]], align 8
550 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
551 // CHECK9-NEXT: store i64 [[ADD]], i64* [[TMP55]], align 8
552 // CHECK9-NEXT: [[TMP56:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
553 // CHECK9-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0
554 // CHECK9-NEXT: br i1 [[TMP57]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
555 // CHECK9: omp_offload.failed:
556 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
557 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
558 // CHECK9: omp_offload.cont:
559 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
560 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP58]])
561 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
562 // CHECK9-NEXT: [[TMP59:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
563 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP59]])
564 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[RETVAL]], align 4
565 // CHECK9-NEXT: ret i32 [[TMP60]]
566 //
567 //
568 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82
569 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
570 // CHECK9-NEXT: entry:
571 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
572 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
573 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
574 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
575 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
576 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
577 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
578 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
579 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
580 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
581 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
582 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
583 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
584 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
585 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
586 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
587 // CHECK9-NEXT: ret void
588 //
589 //
590 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
591 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
592 // CHECK9-NEXT: entry:
593 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
594 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
595 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
596 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8
597 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
598 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
599 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
600 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
601 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
602 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
603 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
604 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
605 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
606 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
607 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
608 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
609 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
610 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
611 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
612 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4
613 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4
614 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
615 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
616 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
617 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8
618 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
619 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
620 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
621 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
622 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8
623 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
624 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
625 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
626 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
627 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
628 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
629 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
630 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
631 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
632 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
633 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
634 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
635 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
636 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
637 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
638 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
639 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
640 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
641 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
642 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
643 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
644 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
645 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
646 // CHECK9: land.lhs.true:
647 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
648 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
649 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
650 // CHECK9: omp.precond.then:
651 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
652 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
653 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
654 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
655 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
656 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
657 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
658 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
659 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
660 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
661 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
662 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
663 // CHECK9: cond.true:
664 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
665 // CHECK9-NEXT: br label [[COND_END:%.*]]
666 // CHECK9: cond.false:
667 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
668 // CHECK9-NEXT: br label [[COND_END]]
669 // CHECK9: cond.end:
670 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
671 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
672 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
673 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
674 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
675 // CHECK9: omp.inner.for.cond:
676 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
677 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
678 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
679 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
680 // CHECK9: omp.inner.for.body:
681 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
682 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
683 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0
684 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
685 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
686 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
687 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]
688 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
689 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
690 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
691 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
692 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
693 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
694 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
695 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0
696 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
697 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
698 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
699 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]
700 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
701 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0
702 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
703 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
704 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
705 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
706 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]
707 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
708 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
709 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
710 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
711 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I11]], align 4
712 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64
713 // CHECK9-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
714 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP28]]
715 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[J12]], align 4
716 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP29]] to i64
717 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]]
718 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4
719 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
720 // CHECK9: omp.body.continue:
721 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
722 // CHECK9: omp.inner.for.inc:
723 // CHECK9-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
724 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP30]], 1
725 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
726 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
727 // CHECK9: omp.inner.for.end:
728 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
729 // CHECK9: omp.loop.exit:
730 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
731 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
732 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
733 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
734 // CHECK9: omp.precond.end:
735 // CHECK9-NEXT: ret void
736 //
737 //
738 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
739 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
740 // CHECK9-NEXT: entry:
741 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
742 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
743 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
744 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
745 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
746 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
747 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
748 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
749 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
750 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
751 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
752 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
753 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
754 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
755 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
756 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
757 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
758 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
759 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
760 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
761 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4
762 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
763 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
764 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
765 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
766 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
767 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
768 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
769 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP11]], align 8
770 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
771 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP12]], align 8
772 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
773 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
774 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
775 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
776 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
777 // CHECK9-NEXT: store i64 20, i64* [[TMP15]], align 8
778 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
779 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
780 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
781 // CHECK9: omp_offload.failed:
782 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
783 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
784 // CHECK9: omp_offload.cont:
785 // CHECK9-NEXT: ret i32 0
786 //
787 //
788 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
789 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
790 // CHECK9-NEXT: entry:
791 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
792 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
793 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
794 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
795 // CHECK9-NEXT: ret void
796 //
797 //
798 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
799 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
800 // CHECK9-NEXT: entry:
801 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
802 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
803 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
804 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
805 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
806 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
807 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
808 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
809 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
810 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
811 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
812 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
813 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
814 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
815 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
816 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
817 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
818 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
819 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
820 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
821 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
822 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
823 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
824 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
825 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
826 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
827 // CHECK9: cond.true:
828 // CHECK9-NEXT: br label [[COND_END:%.*]]
829 // CHECK9: cond.false:
830 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
831 // CHECK9-NEXT: br label [[COND_END]]
832 // CHECK9: cond.end:
833 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
834 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
835 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
836 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
837 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
838 // CHECK9: omp.inner.for.cond:
839 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
840 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
841 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
842 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
843 // CHECK9: omp.inner.for.body:
844 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
845 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2
846 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
847 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
848 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
849 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
850 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
851 // CHECK9-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2
852 // CHECK9-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
853 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
854 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
855 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
856 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
857 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
858 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
859 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
860 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
861 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64
862 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
863 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4
864 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
865 // CHECK9: omp.body.continue:
866 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
867 // CHECK9: omp.inner.for.inc:
868 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
869 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
870 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
871 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
872 // CHECK9: omp.inner.for.end:
873 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
874 // CHECK9: omp.loop.exit:
875 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
876 // CHECK9-NEXT: ret void
877 //
878 //
879 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
880 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
881 // CHECK9-NEXT: entry:
882 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
883 // CHECK9-NEXT: ret void
884 //
885 //
886 // CHECK11-LABEL: define {{[^@]+}}@main
887 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
888 // CHECK11-NEXT: entry:
889 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
890 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
891 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
892 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
893 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4
894 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
895 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
896 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
897 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
898 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
899 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
900 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
901 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
902 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
903 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
904 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
905 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
906 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
907 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
908 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
909 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
910 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
911 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
912 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4
913 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
914 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
915 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
916 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
917 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
918 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
919 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
920 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
921 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
922 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
923 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
924 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
925 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
926 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
927 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
928 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
929 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
930 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
931 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false)
932 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
933 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
934 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4
935 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
936 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
937 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4
938 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
939 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
940 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
941 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
942 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
943 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
944 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
945 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
946 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
947 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
948 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
949 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
950 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4
951 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
952 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
953 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4
954 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
955 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
956 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
957 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32*
958 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4
959 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
960 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
961 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
962 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
963 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4
964 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
965 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32**
966 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4
967 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
968 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32**
969 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4
970 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
971 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4
972 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
973 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4
974 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
975 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
976 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
977 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
978 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4
979 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4
980 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4
981 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
982 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0
983 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
984 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
985 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
986 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0
987 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
988 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
989 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
990 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
991 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
992 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
993 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1
994 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
995 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
996 // CHECK11-NEXT: store i32 1, i32* [[TMP46]], align 4
997 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
998 // CHECK11-NEXT: store i32 5, i32* [[TMP47]], align 4
999 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1000 // CHECK11-NEXT: store i8** [[TMP38]], i8*** [[TMP48]], align 4
1001 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1002 // CHECK11-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 4
1003 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1004 // CHECK11-NEXT: store i64* [[TMP40]], i64** [[TMP50]], align 4
1005 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1006 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP51]], align 4
1007 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1008 // CHECK11-NEXT: store i8** null, i8*** [[TMP52]], align 4
1009 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1010 // CHECK11-NEXT: store i8** null, i8*** [[TMP53]], align 4
1011 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1012 // CHECK11-NEXT: store i64 [[ADD]], i64* [[TMP54]], align 8
1013 // CHECK11-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1014 // CHECK11-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0
1015 // CHECK11-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1016 // CHECK11: omp_offload.failed:
1017 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1018 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1019 // CHECK11: omp_offload.cont:
1020 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1021 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP57]])
1022 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1023 // CHECK11-NEXT: [[TMP58:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
1024 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP58]])
1025 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, i32* [[RETVAL]], align 4
1026 // CHECK11-NEXT: ret i32 [[TMP59]]
1027 //
1028 //
1029 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82
1030 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1031 // CHECK11-NEXT: entry:
1032 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1033 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1034 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1035 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1036 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1037 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1038 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1039 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1040 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1041 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1042 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1043 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1044 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1045 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
1046 // CHECK11-NEXT: ret void
1047 //
1048 //
1049 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
1050 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1051 // CHECK11-NEXT: entry:
1052 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1053 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1054 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1055 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4
1056 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1057 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1058 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1059 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1060 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1061 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1062 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1063 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1064 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1065 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1066 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1067 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1068 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1069 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1070 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1071 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4
1072 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4
1073 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1074 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1075 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1076 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4
1077 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1078 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1079 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1080 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1081 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4
1082 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1083 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1084 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1085 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1086 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
1087 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
1088 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1089 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1090 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
1091 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1092 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1093 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1094 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
1095 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1096 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1097 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1098 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1099 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1100 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
1101 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
1102 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1103 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
1104 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1105 // CHECK11: land.lhs.true:
1106 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1107 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
1108 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1109 // CHECK11: omp.precond.then:
1110 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1111 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1112 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
1113 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1114 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1115 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1116 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1117 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1118 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1119 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1120 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1121 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1122 // CHECK11: cond.true:
1123 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1124 // CHECK11-NEXT: br label [[COND_END:%.*]]
1125 // CHECK11: cond.false:
1126 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1127 // CHECK11-NEXT: br label [[COND_END]]
1128 // CHECK11: cond.end:
1129 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1130 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1131 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1132 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1133 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1134 // CHECK11: omp.inner.for.cond:
1135 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1136 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1137 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1138 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1139 // CHECK11: omp.inner.for.body:
1140 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1141 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1142 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0
1143 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1144 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
1145 // CHECK11-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
1146 // CHECK11-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]
1147 // CHECK11-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
1148 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
1149 // CHECK11-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
1150 // CHECK11-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
1151 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1152 // CHECK11-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1153 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1154 // CHECK11-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0
1155 // CHECK11-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
1156 // CHECK11-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
1157 // CHECK11-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
1158 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]
1159 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1160 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0
1161 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
1162 // CHECK11-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
1163 // CHECK11-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
1164 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
1165 // CHECK11-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]
1166 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
1167 // CHECK11-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
1168 // CHECK11-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
1169 // CHECK11-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
1170 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I11]], align 4
1171 // CHECK11-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP3]]
1172 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP28]]
1173 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[J12]], align 4
1174 // CHECK11-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP29]]
1175 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX36]], align 4
1176 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1177 // CHECK11: omp.body.continue:
1178 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1179 // CHECK11: omp.inner.for.inc:
1180 // CHECK11-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1181 // CHECK11-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP30]], 1
1182 // CHECK11-NEXT: store i64 [[ADD37]], i64* [[DOTOMP_IV]], align 8
1183 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1184 // CHECK11: omp.inner.for.end:
1185 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1186 // CHECK11: omp.loop.exit:
1187 // CHECK11-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1188 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1189 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
1190 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1191 // CHECK11: omp.precond.end:
1192 // CHECK11-NEXT: ret void
1193 //
1194 //
1195 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1196 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1197 // CHECK11-NEXT: entry:
1198 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1199 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1200 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1201 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1202 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1203 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1204 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1205 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1206 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1207 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1208 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
1209 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1210 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1211 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
1212 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1213 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
1214 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1215 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1216 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1217 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1218 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4
1219 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1220 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
1221 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1222 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1223 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1224 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1225 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1226 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP11]], align 4
1227 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1228 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP12]], align 4
1229 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1230 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4
1231 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1232 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
1233 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1234 // CHECK11-NEXT: store i64 20, i64* [[TMP15]], align 8
1235 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1236 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1237 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1238 // CHECK11: omp_offload.failed:
1239 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1240 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1241 // CHECK11: omp_offload.cont:
1242 // CHECK11-NEXT: ret i32 0
1243 //
1244 //
1245 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
1246 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1247 // CHECK11-NEXT: entry:
1248 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
1249 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
1250 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
1251 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1252 // CHECK11-NEXT: ret void
1253 //
1254 //
1255 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
1256 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1257 // CHECK11-NEXT: entry:
1258 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1259 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1260 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
1261 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1262 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1263 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1264 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1265 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1266 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1267 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1268 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1269 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1270 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1271 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1272 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
1273 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
1274 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1275 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
1276 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1277 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1278 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1279 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1280 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1281 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1282 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1283 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1284 // CHECK11: cond.true:
1285 // CHECK11-NEXT: br label [[COND_END:%.*]]
1286 // CHECK11: cond.false:
1287 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1288 // CHECK11-NEXT: br label [[COND_END]]
1289 // CHECK11: cond.end:
1290 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1291 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1292 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1293 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1294 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1295 // CHECK11: omp.inner.for.cond:
1296 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1297 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1298 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1299 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1300 // CHECK11: omp.inner.for.body:
1301 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1302 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2
1303 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1304 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1305 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1306 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1307 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1308 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2
1309 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
1310 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
1311 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1312 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1313 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
1314 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1315 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP11]]
1316 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
1317 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP12]]
1318 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
1319 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1320 // CHECK11: omp.body.continue:
1321 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1322 // CHECK11: omp.inner.for.inc:
1323 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1324 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1
1325 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
1326 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1327 // CHECK11: omp.inner.for.end:
1328 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1329 // CHECK11: omp.loop.exit:
1330 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1331 // CHECK11-NEXT: ret void
1332 //
1333 //
1334 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1335 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
1336 // CHECK11-NEXT: entry:
1337 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
1338 // CHECK11-NEXT: ret void
1339 //
1340