1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target teams distribute simd 29 for(int i = 0; i < X; i++) { 30 a[i] = (T)0; 31 } 32 #pragma omp target teams distribute simd dist_schedule(static) 33 for(int i = 0; i < X; i++) { 34 a[i] = (T)0; 35 } 36 #pragma omp target teams distribute simd dist_schedule(static, X/2) 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 41 42 43 44 45 46 return a[0]; 47 } 48 }; 49 50 int teams_template_struct(void) { 51 SS<int, 123, 456> V; 52 return V.foo(); 53 54 } 55 #endif // CK1 56 57 // Test host codegen. 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 64 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 71 #ifdef CK2 72 73 template <typename T, int n> 74 int tmain(T argc) { 75 T a[n]; 76 #pragma omp target teams distribute simd 77 for(int i = 0; i < n; i++) { 78 a[i] = (T)0; 79 } 80 #pragma omp target teams distribute simd dist_schedule(static) 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target teams distribute simd dist_schedule(static, n) 85 for(int i = 0; i < n; i++) { 86 a[i] = (T)0; 87 } 88 return 0; 89 } 90 91 int main (int argc, char **argv) { 92 int n = 100; 93 int a[n]; 94 #pragma omp target teams distribute simd 95 for(int i = 0; i < n; i++) { 96 a[i] = 0; 97 } 98 #pragma omp target teams distribute simd dist_schedule(static) 99 for(int i = 0; i < n; i++) { 100 a[i] = 0; 101 } 102 #pragma omp target teams distribute simd dist_schedule(static, n) 103 for(int i = 0; i < n; i++) { 104 a[i] = 0; 105 } 106 return tmain<int, 10>(argc); 107 } 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 #endif // CK2 124 #endif // #ifndef HEADER 125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 127 // CHECK1-NEXT: entry: 128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 130 // CHECK1-NEXT: ret i32 [[CALL]] 131 // 132 // 133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 134 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 135 // CHECK1-NEXT: entry: 136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 162 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 163 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 164 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 165 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 166 // CHECK1: omp_offload.failed: 167 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]] 168 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 169 // CHECK1: omp_offload.cont: 170 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 172 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 173 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 174 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 175 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 176 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 177 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 178 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 179 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 181 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 182 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 183 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 184 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 185 // CHECK1: omp_offload.failed7: 186 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]] 187 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 188 // CHECK1: omp_offload.cont8: 189 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 190 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 191 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 192 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 193 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 194 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 195 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 196 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 197 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 198 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 200 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 201 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 202 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 203 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 204 // CHECK1: omp_offload.failed14: 205 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]] 206 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 207 // CHECK1: omp_offload.cont15: 208 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 209 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 210 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 211 // CHECK1-NEXT: ret i32 [[TMP27]] 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 215 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 218 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 219 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 220 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 221 // CHECK1-NEXT: ret void 222 // 223 // 224 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 225 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 226 // CHECK1-NEXT: entry: 227 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 228 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 230 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 232 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 238 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 239 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 240 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 242 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 243 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 244 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 245 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 246 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 247 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 248 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 249 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 250 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 251 // CHECK1: cond.true: 252 // CHECK1-NEXT: br label [[COND_END:%.*]] 253 // CHECK1: cond.false: 254 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 255 // CHECK1-NEXT: br label [[COND_END]] 256 // CHECK1: cond.end: 257 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 258 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 259 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 261 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 262 // CHECK1: omp.inner.for.cond: 263 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 264 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 265 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 266 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 267 // CHECK1: omp.inner.for.body: 268 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 269 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 270 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 271 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 272 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 273 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 274 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 275 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 276 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 277 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 278 // CHECK1: omp.body.continue: 279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 280 // CHECK1: omp.inner.for.inc: 281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 282 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 283 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 284 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 285 // CHECK1: omp.inner.for.end: 286 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 287 // CHECK1: omp.loop.exit: 288 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 289 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 290 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 291 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 292 // CHECK1: .omp.final.then: 293 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 294 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 295 // CHECK1: .omp.final.done: 296 // CHECK1-NEXT: ret void 297 // 298 // 299 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 300 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 301 // CHECK1-NEXT: entry: 302 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 303 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 304 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 305 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 306 // CHECK1-NEXT: ret void 307 // 308 // 309 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 310 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 311 // CHECK1-NEXT: entry: 312 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 313 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 314 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 315 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 316 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 317 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 318 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 319 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 320 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 321 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 322 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 323 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 324 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 325 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 326 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 327 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 328 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 329 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 330 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 331 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 332 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 333 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 334 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 335 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 336 // CHECK1: cond.true: 337 // CHECK1-NEXT: br label [[COND_END:%.*]] 338 // CHECK1: cond.false: 339 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 340 // CHECK1-NEXT: br label [[COND_END]] 341 // CHECK1: cond.end: 342 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 343 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 344 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 345 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 346 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 347 // CHECK1: omp.inner.for.cond: 348 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 349 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 350 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 351 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 352 // CHECK1: omp.inner.for.body: 353 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 354 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 355 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 356 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 357 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 358 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 359 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 360 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 361 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 362 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 363 // CHECK1: omp.body.continue: 364 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 365 // CHECK1: omp.inner.for.inc: 366 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 367 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 368 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 369 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 370 // CHECK1: omp.inner.for.end: 371 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 372 // CHECK1: omp.loop.exit: 373 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 374 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 375 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 376 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 377 // CHECK1: .omp.final.then: 378 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 379 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 380 // CHECK1: .omp.final.done: 381 // CHECK1-NEXT: ret void 382 // 383 // 384 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 385 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 386 // CHECK1-NEXT: entry: 387 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 388 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 389 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 390 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 391 // CHECK1-NEXT: ret void 392 // 393 // 394 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 395 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 396 // CHECK1-NEXT: entry: 397 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 398 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 399 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 400 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 407 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 408 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 409 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 410 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 411 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 412 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 413 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 414 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 415 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 416 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 417 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 418 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 419 // CHECK1: omp.dispatch.cond: 420 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 421 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 422 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 423 // CHECK1: cond.true: 424 // CHECK1-NEXT: br label [[COND_END:%.*]] 425 // CHECK1: cond.false: 426 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 427 // CHECK1-NEXT: br label [[COND_END]] 428 // CHECK1: cond.end: 429 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 430 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 431 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 432 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 433 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 434 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 435 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 436 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 437 // CHECK1: omp.dispatch.body: 438 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 439 // CHECK1: omp.inner.for.cond: 440 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 441 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 442 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 443 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 444 // CHECK1: omp.inner.for.body: 445 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 446 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 447 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 448 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 449 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 450 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 451 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 452 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 453 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 454 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 455 // CHECK1: omp.body.continue: 456 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 457 // CHECK1: omp.inner.for.inc: 458 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 459 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 460 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 461 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 462 // CHECK1: omp.inner.for.end: 463 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 464 // CHECK1: omp.dispatch.inc: 465 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 466 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 467 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 468 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 469 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 470 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 471 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 472 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 473 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 474 // CHECK1: omp.dispatch.end: 475 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 476 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 477 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 478 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 479 // CHECK1: .omp.final.then: 480 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 481 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 482 // CHECK1: .omp.final.done: 483 // CHECK1-NEXT: ret void 484 // 485 // 486 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 487 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 488 // CHECK1-NEXT: entry: 489 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 490 // CHECK1-NEXT: ret void 491 // 492 // 493 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 494 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 495 // CHECK3-NEXT: entry: 496 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 497 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 498 // CHECK3-NEXT: ret i32 [[CALL]] 499 // 500 // 501 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 502 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 503 // CHECK3-NEXT: entry: 504 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 505 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 506 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 507 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 508 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 509 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 510 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 511 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 512 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 513 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 514 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 515 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 516 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 517 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 518 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 519 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 520 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 521 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 522 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 523 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 524 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 525 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 526 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 527 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 528 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 529 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 530 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 531 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 532 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 533 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 534 // CHECK3: omp_offload.failed: 535 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]] 536 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 537 // CHECK3: omp_offload.cont: 538 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 539 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 540 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 541 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 542 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 543 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 544 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 545 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 546 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 547 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 548 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 549 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 550 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 551 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 552 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 553 // CHECK3: omp_offload.failed7: 554 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]] 555 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 556 // CHECK3: omp_offload.cont8: 557 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 558 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 559 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 560 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 561 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 562 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 563 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 564 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 565 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 566 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 567 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 568 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 569 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 570 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 571 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 572 // CHECK3: omp_offload.failed14: 573 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]] 574 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 575 // CHECK3: omp_offload.cont15: 576 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 577 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 578 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 579 // CHECK3-NEXT: ret i32 [[TMP27]] 580 // 581 // 582 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 583 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 584 // CHECK3-NEXT: entry: 585 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 586 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 587 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 588 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 589 // CHECK3-NEXT: ret void 590 // 591 // 592 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 593 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 594 // CHECK3-NEXT: entry: 595 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 596 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 597 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 598 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 599 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 600 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 601 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 602 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 603 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 604 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 605 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 606 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 607 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 608 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 609 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 610 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 611 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 612 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 613 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 614 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 615 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 616 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 617 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 618 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 619 // CHECK3: cond.true: 620 // CHECK3-NEXT: br label [[COND_END:%.*]] 621 // CHECK3: cond.false: 622 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 623 // CHECK3-NEXT: br label [[COND_END]] 624 // CHECK3: cond.end: 625 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 626 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 627 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 628 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 629 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 630 // CHECK3: omp.inner.for.cond: 631 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 632 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 633 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 634 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 635 // CHECK3: omp.inner.for.body: 636 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 637 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 638 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 639 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 640 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 641 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 642 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 643 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 644 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 645 // CHECK3: omp.body.continue: 646 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 647 // CHECK3: omp.inner.for.inc: 648 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 649 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 650 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 651 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 652 // CHECK3: omp.inner.for.end: 653 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 654 // CHECK3: omp.loop.exit: 655 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 656 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 657 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 658 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 659 // CHECK3: .omp.final.then: 660 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 661 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 662 // CHECK3: .omp.final.done: 663 // CHECK3-NEXT: ret void 664 // 665 // 666 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 667 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 668 // CHECK3-NEXT: entry: 669 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 670 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 671 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 672 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 673 // CHECK3-NEXT: ret void 674 // 675 // 676 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 677 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 678 // CHECK3-NEXT: entry: 679 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 680 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 681 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 682 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 683 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 684 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 685 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 686 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 687 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 688 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 689 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 690 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 691 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 692 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 693 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 694 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 695 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 696 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 697 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 698 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 699 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 700 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 701 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 702 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 703 // CHECK3: cond.true: 704 // CHECK3-NEXT: br label [[COND_END:%.*]] 705 // CHECK3: cond.false: 706 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 707 // CHECK3-NEXT: br label [[COND_END]] 708 // CHECK3: cond.end: 709 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 710 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 711 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 712 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 713 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 714 // CHECK3: omp.inner.for.cond: 715 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 716 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 717 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 718 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 719 // CHECK3: omp.inner.for.body: 720 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 721 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 722 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 723 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 724 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 725 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 726 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 727 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 728 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 729 // CHECK3: omp.body.continue: 730 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 731 // CHECK3: omp.inner.for.inc: 732 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 733 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 734 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 735 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 736 // CHECK3: omp.inner.for.end: 737 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 738 // CHECK3: omp.loop.exit: 739 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 740 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 741 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 742 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 743 // CHECK3: .omp.final.then: 744 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 745 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 746 // CHECK3: .omp.final.done: 747 // CHECK3-NEXT: ret void 748 // 749 // 750 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 751 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 752 // CHECK3-NEXT: entry: 753 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 754 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 755 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 756 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 757 // CHECK3-NEXT: ret void 758 // 759 // 760 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 761 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 762 // CHECK3-NEXT: entry: 763 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 764 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 765 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 766 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 767 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 768 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 769 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 770 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 771 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 772 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 773 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 774 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 775 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 776 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 777 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 778 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 779 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 780 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 781 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 782 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 783 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 784 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 785 // CHECK3: omp.dispatch.cond: 786 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 787 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 788 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 789 // CHECK3: cond.true: 790 // CHECK3-NEXT: br label [[COND_END:%.*]] 791 // CHECK3: cond.false: 792 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 793 // CHECK3-NEXT: br label [[COND_END]] 794 // CHECK3: cond.end: 795 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 796 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 797 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 798 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 799 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 800 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 801 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 802 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 803 // CHECK3: omp.dispatch.body: 804 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 805 // CHECK3: omp.inner.for.cond: 806 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 807 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 808 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 809 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 810 // CHECK3: omp.inner.for.body: 811 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 812 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 813 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 814 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 815 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 816 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 817 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 818 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 819 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 820 // CHECK3: omp.body.continue: 821 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 822 // CHECK3: omp.inner.for.inc: 823 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 824 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 825 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 826 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 827 // CHECK3: omp.inner.for.end: 828 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 829 // CHECK3: omp.dispatch.inc: 830 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 831 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 832 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 833 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 834 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 835 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 836 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 837 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 838 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 839 // CHECK3: omp.dispatch.end: 840 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 841 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 842 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 843 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 844 // CHECK3: .omp.final.then: 845 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 846 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 847 // CHECK3: .omp.final.done: 848 // CHECK3-NEXT: ret void 849 // 850 // 851 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 852 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 853 // CHECK3-NEXT: entry: 854 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 855 // CHECK3-NEXT: ret void 856 // 857 // 858 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 859 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 860 // CHECK5-NEXT: entry: 861 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 862 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 863 // CHECK5-NEXT: ret i32 [[CALL]] 864 // 865 // 866 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 867 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 868 // CHECK5-NEXT: entry: 869 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 870 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 871 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 872 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 873 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 874 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 875 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 876 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 877 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 878 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 879 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4 880 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 881 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 882 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 883 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 884 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 885 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 886 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 887 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 888 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 889 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 890 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 891 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 892 // CHECK5: omp.inner.for.cond: 893 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 894 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 895 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 896 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 897 // CHECK5: omp.inner.for.body: 898 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 899 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 900 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 901 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 902 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 903 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 904 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 905 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 906 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 907 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 908 // CHECK5: omp.body.continue: 909 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 910 // CHECK5: omp.inner.for.inc: 911 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 912 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 913 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 914 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 915 // CHECK5: omp.inner.for.end: 916 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 917 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 918 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 919 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 920 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 921 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 922 // CHECK5: omp.inner.for.cond8: 923 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 924 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6 925 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 926 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 927 // CHECK5: omp.inner.for.body10: 928 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 929 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 930 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 931 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6 932 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 933 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6 934 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 935 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]] 936 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6 937 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 938 // CHECK5: omp.body.continue16: 939 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 940 // CHECK5: omp.inner.for.inc17: 941 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 942 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 943 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 944 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 945 // CHECK5: omp.inner.for.end19: 946 // CHECK5-NEXT: store i32 123, i32* [[I7]], align 4 947 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4 948 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4 949 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4 950 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4 951 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 952 // CHECK5: omp.inner.for.cond25: 953 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 954 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9 955 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 956 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 957 // CHECK5: omp.inner.for.body27: 958 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 959 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 960 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 961 // CHECK5-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9 962 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 963 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9 964 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 965 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]] 966 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9 967 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 968 // CHECK5: omp.body.continue33: 969 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 970 // CHECK5: omp.inner.for.inc34: 971 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 972 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 973 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 974 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 975 // CHECK5: omp.inner.for.end36: 976 // CHECK5-NEXT: store i32 123, i32* [[I24]], align 4 977 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 978 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0 979 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4 980 // CHECK5-NEXT: ret i32 [[TMP18]] 981 // 982 // 983 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 984 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 985 // CHECK7-NEXT: entry: 986 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 987 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 988 // CHECK7-NEXT: ret i32 [[CALL]] 989 // 990 // 991 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 992 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 993 // CHECK7-NEXT: entry: 994 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 995 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 996 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 997 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 998 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 999 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1000 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1001 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1002 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1003 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1004 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4 1005 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 1006 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 1007 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 1008 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 1009 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4 1010 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1011 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1012 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1013 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1014 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1015 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1016 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1017 // CHECK7: omp.inner.for.cond: 1018 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1019 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 1020 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1021 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1022 // CHECK7: omp.inner.for.body: 1023 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1024 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1025 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1026 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 1027 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1028 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 1029 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]] 1030 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 1031 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1032 // CHECK7: omp.body.continue: 1033 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1034 // CHECK7: omp.inner.for.inc: 1035 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1036 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1037 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1038 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1039 // CHECK7: omp.inner.for.end: 1040 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 1041 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 1042 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 1043 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 1044 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 1045 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1046 // CHECK7: omp.inner.for.cond8: 1047 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1048 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7 1049 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1050 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 1051 // CHECK7: omp.inner.for.body10: 1052 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1053 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1054 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1055 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7 1056 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1057 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7 1058 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]] 1059 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7 1060 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 1061 // CHECK7: omp.body.continue15: 1062 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 1063 // CHECK7: omp.inner.for.inc16: 1064 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1065 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 1066 // CHECK7-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1067 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 1068 // CHECK7: omp.inner.for.end18: 1069 // CHECK7-NEXT: store i32 123, i32* [[I7]], align 4 1070 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4 1071 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4 1072 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4 1073 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4 1074 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 1075 // CHECK7: omp.inner.for.cond24: 1076 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1077 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10 1078 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1079 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 1080 // CHECK7: omp.inner.for.body26: 1081 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1082 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 1083 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 1084 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10 1085 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1086 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10 1087 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]] 1088 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10 1089 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 1090 // CHECK7: omp.body.continue31: 1091 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 1092 // CHECK7: omp.inner.for.inc32: 1093 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1094 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 1095 // CHECK7-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1096 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 1097 // CHECK7: omp.inner.for.end34: 1098 // CHECK7-NEXT: store i32 123, i32* [[I23]], align 4 1099 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1100 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0 1101 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4 1102 // CHECK7-NEXT: ret i32 [[TMP18]] 1103 // 1104 // 1105 // CHECK9-LABEL: define {{[^@]+}}@main 1106 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1107 // CHECK9-NEXT: entry: 1108 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1109 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1110 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1111 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1112 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1113 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1114 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1115 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1116 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1117 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1118 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1119 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1120 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1121 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1122 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 1123 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 1124 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 1125 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 1126 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 1127 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 1128 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1129 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 1130 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 1131 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 1132 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1133 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8 1134 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8 1135 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8 1136 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8 1137 // CHECK9-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 1138 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 1139 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4 1140 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1141 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1142 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1143 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1144 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1145 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1146 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1147 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1148 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1149 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1150 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1151 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1152 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1153 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1154 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1155 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1156 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 1157 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1158 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1159 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1160 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1161 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1162 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 1163 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1164 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1165 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1166 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1167 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1168 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1169 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1170 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1171 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1172 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1173 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1174 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1175 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 1176 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1177 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1178 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 1179 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1180 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 1181 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1182 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1183 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1184 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1185 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1186 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1187 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1188 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1189 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1190 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1191 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1192 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1193 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1194 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1195 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1196 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1197 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1198 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1199 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1200 // CHECK9: omp_offload.failed: 1201 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4:[0-9]+]] 1202 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1203 // CHECK9: omp_offload.cont: 1204 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 1205 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 1206 // CHECK9-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 1207 // CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 1208 // CHECK9-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 1209 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 1210 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 1211 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1212 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 1213 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 1214 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1215 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 1216 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 1217 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 1218 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 1219 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1220 // CHECK9-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 1221 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 1222 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1223 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 1224 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 1225 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 1226 // CHECK9-NEXT: store i8* null, i8** [[TMP45]], align 8 1227 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 1228 // CHECK9-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 1229 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 1230 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 1231 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 1232 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 1233 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 1234 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 1235 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 1236 // CHECK9-NEXT: store i8* null, i8** [[TMP51]], align 8 1237 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1238 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1239 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 1240 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 1241 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1242 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1243 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 1244 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 1245 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 1246 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 1247 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 1248 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 1249 // CHECK9-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 1250 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 1251 // CHECK9-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1252 // CHECK9-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 1253 // CHECK9-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1254 // CHECK9: omp_offload.failed16: 1255 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4]] 1256 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1257 // CHECK9: omp_offload.cont17: 1258 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 1259 // CHECK9-NEXT: store i32 [[TMP61]], i32* [[DOTCAPTURE_EXPR_18]], align 4 1260 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 1261 // CHECK9-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 1262 // CHECK9-NEXT: store i32 [[TMP62]], i32* [[CONV20]], align 4 1263 // CHECK9-NEXT: [[TMP63:%.*]] = load i64, i64* [[N_CASTED19]], align 8 1264 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 1265 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1266 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[CONV21]], align 4 1267 // CHECK9-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1268 // CHECK9-NEXT: [[TMP66:%.*]] = mul nuw i64 [[TMP1]], 4 1269 // CHECK9-NEXT: [[TMP67:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8* 1270 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false) 1271 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 1272 // CHECK9-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 1273 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP69]], align 8 1274 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 1275 // CHECK9-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 1276 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP71]], align 8 1277 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 1278 // CHECK9-NEXT: store i8* null, i8** [[TMP72]], align 8 1279 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 1280 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 1281 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP74]], align 8 1282 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 1283 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 1284 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8 1285 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1 1286 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 1287 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2 1288 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32** 1289 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP79]], align 8 1290 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2 1291 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 1292 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 8 1293 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2 1294 // CHECK9-NEXT: store i64 [[TMP66]], i64* [[TMP82]], align 8 1295 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2 1296 // CHECK9-NEXT: store i8* null, i8** [[TMP83]], align 8 1297 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3 1298 // CHECK9-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i64* 1299 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP85]], align 8 1300 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3 1301 // CHECK9-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64* 1302 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP87]], align 8 1303 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3 1304 // CHECK9-NEXT: store i8* null, i8** [[TMP88]], align 8 1305 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 1306 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 1307 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0 1308 // CHECK9-NEXT: [[TMP92:%.*]] = load i32, i32* [[N]], align 4 1309 // CHECK9-NEXT: store i32 [[TMP92]], i32* [[DOTCAPTURE_EXPR_27]], align 4 1310 // CHECK9-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 1311 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP93]], 0 1312 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 1313 // CHECK9-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1 1314 // CHECK9-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4 1315 // CHECK9-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4 1316 // CHECK9-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP94]], 1 1317 // CHECK9-NEXT: [[TMP95:%.*]] = zext i32 [[ADD32]] to i64 1318 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP95]]) 1319 // CHECK9-NEXT: [[TMP96:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP89]], i8** [[TMP90]], i64* [[TMP91]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1320 // CHECK9-NEXT: [[TMP97:%.*]] = icmp ne i32 [[TMP96]], 0 1321 // CHECK9-NEXT: br i1 [[TMP97]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 1322 // CHECK9: omp_offload.failed33: 1323 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP63]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP65]]) #[[ATTR4]] 1324 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT34]] 1325 // CHECK9: omp_offload.cont34: 1326 // CHECK9-NEXT: [[TMP98:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1327 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP98]]) 1328 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1329 // CHECK9-NEXT: [[TMP99:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1330 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP99]]) 1331 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[RETVAL]], align 4 1332 // CHECK9-NEXT: ret i32 [[TMP100]] 1333 // 1334 // 1335 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1336 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1337 // CHECK9-NEXT: entry: 1338 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1339 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1340 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1341 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1342 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1343 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1344 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1345 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1346 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1347 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1348 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1349 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1350 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 1351 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1352 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 1353 // CHECK9-NEXT: ret void 1354 // 1355 // 1356 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1357 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] { 1358 // CHECK9-NEXT: entry: 1359 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1360 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1361 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1362 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1363 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1364 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1365 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1366 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1367 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1368 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1369 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1370 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1371 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1372 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1373 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1374 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1375 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1376 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1377 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1378 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1379 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1380 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1381 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1382 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1383 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1384 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1385 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1386 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1387 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1388 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1389 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1390 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1391 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1392 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1393 // CHECK9: omp.precond.then: 1394 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1395 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1396 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1397 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1398 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1399 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1400 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1401 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1402 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1403 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1404 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1405 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1406 // CHECK9: cond.true: 1407 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1408 // CHECK9-NEXT: br label [[COND_END:%.*]] 1409 // CHECK9: cond.false: 1410 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1411 // CHECK9-NEXT: br label [[COND_END]] 1412 // CHECK9: cond.end: 1413 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1414 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1415 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1416 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1417 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1418 // CHECK9: omp.inner.for.cond: 1419 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1420 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1421 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1422 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1423 // CHECK9: omp.inner.for.body: 1424 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1425 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1426 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1427 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9 1428 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9 1429 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1430 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1431 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1432 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1433 // CHECK9: omp.body.continue: 1434 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1435 // CHECK9: omp.inner.for.inc: 1436 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1437 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1438 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1439 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1440 // CHECK9: omp.inner.for.end: 1441 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1442 // CHECK9: omp.loop.exit: 1443 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1444 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1445 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1446 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1447 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1448 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1449 // CHECK9: .omp.final.then: 1450 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1451 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 1452 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1453 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1454 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1455 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1456 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1457 // CHECK9: .omp.final.done: 1458 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1459 // CHECK9: omp.precond.end: 1460 // CHECK9-NEXT: ret void 1461 // 1462 // 1463 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 1464 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1465 // CHECK9-NEXT: entry: 1466 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1467 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1468 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1469 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1470 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1471 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1472 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1473 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1474 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1475 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1476 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1477 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1478 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 1479 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1480 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 1481 // CHECK9-NEXT: ret void 1482 // 1483 // 1484 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1485 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] { 1486 // CHECK9-NEXT: entry: 1487 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1488 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1489 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1490 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1491 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1492 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1493 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1494 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1495 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1496 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1497 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1498 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1499 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1500 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1501 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1502 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1503 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1504 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1505 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1506 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1507 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1508 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1509 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1510 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1511 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1512 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1513 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1514 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1515 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1516 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1517 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1518 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1519 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1520 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1521 // CHECK9: omp.precond.then: 1522 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1523 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1524 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1525 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1526 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1527 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1528 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1529 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1530 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1531 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1532 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1533 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1534 // CHECK9: cond.true: 1535 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1536 // CHECK9-NEXT: br label [[COND_END:%.*]] 1537 // CHECK9: cond.false: 1538 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1539 // CHECK9-NEXT: br label [[COND_END]] 1540 // CHECK9: cond.end: 1541 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1542 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1543 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1544 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1546 // CHECK9: omp.inner.for.cond: 1547 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1548 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 1549 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1550 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1551 // CHECK9: omp.inner.for.body: 1552 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1553 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1554 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1555 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 1556 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 1557 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1558 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1559 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 1560 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1561 // CHECK9: omp.body.continue: 1562 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1563 // CHECK9: omp.inner.for.inc: 1564 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1565 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1566 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 1567 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 1568 // CHECK9: omp.inner.for.end: 1569 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1570 // CHECK9: omp.loop.exit: 1571 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1572 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1573 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1574 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1575 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 1576 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1577 // CHECK9: .omp.final.then: 1578 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1579 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 1580 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 1581 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 1582 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 1583 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 1584 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1585 // CHECK9: .omp.final.done: 1586 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1587 // CHECK9: omp.precond.end: 1588 // CHECK9-NEXT: ret void 1589 // 1590 // 1591 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1592 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1593 // CHECK9-NEXT: entry: 1594 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1595 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1596 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1597 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1598 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1599 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1600 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1601 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1602 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1603 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1604 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1605 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1606 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1607 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1608 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1609 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1610 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4 1611 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1612 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4 1613 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1614 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 1615 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1616 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]]) 1617 // CHECK9-NEXT: ret void 1618 // 1619 // 1620 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1621 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] { 1622 // CHECK9-NEXT: entry: 1623 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1624 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1625 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1626 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1627 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1628 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1629 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1630 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1631 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1632 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1633 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1634 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1635 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1636 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1637 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1638 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 1639 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1640 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1641 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1642 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1643 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1644 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1645 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1646 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1647 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1648 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1649 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1650 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1651 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1652 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1653 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1654 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 1655 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1656 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1657 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1658 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1659 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1660 // CHECK9: omp.precond.then: 1661 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1662 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1663 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1664 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1665 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1666 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 1667 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1668 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1669 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 1670 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1671 // CHECK9: omp.dispatch.cond: 1672 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1673 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1674 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1675 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1676 // CHECK9: cond.true: 1677 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1678 // CHECK9-NEXT: br label [[COND_END:%.*]] 1679 // CHECK9: cond.false: 1680 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1681 // CHECK9-NEXT: br label [[COND_END]] 1682 // CHECK9: cond.end: 1683 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1684 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1685 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1686 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1687 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1688 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1689 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1690 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1691 // CHECK9: omp.dispatch.body: 1692 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1693 // CHECK9: omp.inner.for.cond: 1694 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1695 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 1696 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1697 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1698 // CHECK9: omp.inner.for.body: 1699 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1700 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1701 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1702 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !18 1703 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !18 1704 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1705 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1706 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 1707 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1708 // CHECK9: omp.body.continue: 1709 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1710 // CHECK9: omp.inner.for.inc: 1711 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1712 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 1713 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 1714 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 1715 // CHECK9: omp.inner.for.end: 1716 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1717 // CHECK9: omp.dispatch.inc: 1718 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1719 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1720 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1721 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4 1722 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1723 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1724 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 1725 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4 1726 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1727 // CHECK9: omp.dispatch.end: 1728 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1729 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1730 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1731 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1732 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 1733 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1734 // CHECK9: .omp.final.then: 1735 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1736 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP29]], 0 1737 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 1738 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1 1739 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 1740 // CHECK9-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4 1741 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1742 // CHECK9: .omp.final.done: 1743 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1744 // CHECK9: omp.precond.end: 1745 // CHECK9-NEXT: ret void 1746 // 1747 // 1748 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 1749 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat { 1750 // CHECK9-NEXT: entry: 1751 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1752 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 1753 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1754 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1755 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1756 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1757 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 1758 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 1759 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 1760 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1761 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 1762 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 1763 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 1764 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 1765 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1766 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1767 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 1768 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 1769 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1770 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 1771 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 1772 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1773 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1774 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1775 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1776 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1777 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1778 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1779 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1780 // CHECK9: omp_offload.failed: 1781 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]] 1782 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1783 // CHECK9: omp_offload.cont: 1784 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1785 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 1786 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 1787 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1788 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 1789 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 1790 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 1791 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 1792 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1793 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1794 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1795 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1796 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1797 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1798 // CHECK9: omp_offload.failed5: 1799 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]] 1800 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1801 // CHECK9: omp_offload.cont6: 1802 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1803 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 1804 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 1805 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1806 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 1807 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 1808 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 1809 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1810 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1811 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1812 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1813 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1814 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1815 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 1816 // CHECK9: omp_offload.failed11: 1817 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]] 1818 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]] 1819 // CHECK9: omp_offload.cont12: 1820 // CHECK9-NEXT: ret i32 0 1821 // 1822 // 1823 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 1824 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1825 // CHECK9-NEXT: entry: 1826 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1827 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1828 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1829 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1830 // CHECK9-NEXT: ret void 1831 // 1832 // 1833 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 1834 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 1835 // CHECK9-NEXT: entry: 1836 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1837 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1838 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1839 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1840 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1841 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1842 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1843 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1844 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1845 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1846 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1847 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1848 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1849 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1850 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1851 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1852 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1853 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1854 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1855 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1856 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1857 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1858 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1859 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1860 // CHECK9: cond.true: 1861 // CHECK9-NEXT: br label [[COND_END:%.*]] 1862 // CHECK9: cond.false: 1863 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1864 // CHECK9-NEXT: br label [[COND_END]] 1865 // CHECK9: cond.end: 1866 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1867 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1868 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1869 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1870 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1871 // CHECK9: omp.inner.for.cond: 1872 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1873 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 1874 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1875 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1876 // CHECK9: omp.inner.for.body: 1877 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1878 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1879 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1880 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 1881 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 1882 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1883 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1884 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 1885 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1886 // CHECK9: omp.body.continue: 1887 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1888 // CHECK9: omp.inner.for.inc: 1889 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1890 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1891 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 1892 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 1893 // CHECK9: omp.inner.for.end: 1894 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1895 // CHECK9: omp.loop.exit: 1896 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1897 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1898 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1899 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1900 // CHECK9: .omp.final.then: 1901 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 1902 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1903 // CHECK9: .omp.final.done: 1904 // CHECK9-NEXT: ret void 1905 // 1906 // 1907 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 1908 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1909 // CHECK9-NEXT: entry: 1910 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1911 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1912 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1913 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1914 // CHECK9-NEXT: ret void 1915 // 1916 // 1917 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 1918 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 1919 // CHECK9-NEXT: entry: 1920 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1921 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1922 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1923 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1924 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1925 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1926 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1927 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1928 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1929 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1930 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1931 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1932 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1933 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1934 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1935 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1936 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1937 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1938 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1939 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1940 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1941 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1942 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1943 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1944 // CHECK9: cond.true: 1945 // CHECK9-NEXT: br label [[COND_END:%.*]] 1946 // CHECK9: cond.false: 1947 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1948 // CHECK9-NEXT: br label [[COND_END]] 1949 // CHECK9: cond.end: 1950 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1951 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1952 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1953 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1954 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1955 // CHECK9: omp.inner.for.cond: 1956 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1957 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 1958 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1959 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1960 // CHECK9: omp.inner.for.body: 1961 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1962 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1963 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1964 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 1965 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 1966 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1967 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1968 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 1969 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1970 // CHECK9: omp.body.continue: 1971 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1972 // CHECK9: omp.inner.for.inc: 1973 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1974 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1975 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 1976 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 1977 // CHECK9: omp.inner.for.end: 1978 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1979 // CHECK9: omp.loop.exit: 1980 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1981 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1982 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1983 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1984 // CHECK9: .omp.final.then: 1985 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 1986 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 1987 // CHECK9: .omp.final.done: 1988 // CHECK9-NEXT: ret void 1989 // 1990 // 1991 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 1992 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1993 // CHECK9-NEXT: entry: 1994 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1995 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1996 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1997 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1998 // CHECK9-NEXT: ret void 1999 // 2000 // 2001 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 2002 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 2003 // CHECK9-NEXT: entry: 2004 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2005 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2006 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2007 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2008 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2009 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2010 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2011 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2012 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2013 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2014 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2015 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2016 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2017 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2018 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2019 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2020 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2021 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2022 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2023 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2024 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2025 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2026 // CHECK9: omp.dispatch.cond: 2027 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2028 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2029 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2030 // CHECK9: cond.true: 2031 // CHECK9-NEXT: br label [[COND_END:%.*]] 2032 // CHECK9: cond.false: 2033 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2034 // CHECK9-NEXT: br label [[COND_END]] 2035 // CHECK9: cond.end: 2036 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2037 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2038 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2039 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2040 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2041 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2042 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2043 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2044 // CHECK9: omp.dispatch.body: 2045 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2046 // CHECK9: omp.inner.for.cond: 2047 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2048 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 2049 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2050 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2051 // CHECK9: omp.inner.for.body: 2052 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2053 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2054 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2055 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 2056 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 2057 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2058 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2059 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 2060 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2061 // CHECK9: omp.body.continue: 2062 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2063 // CHECK9: omp.inner.for.inc: 2064 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2065 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2066 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 2067 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 2068 // CHECK9: omp.inner.for.end: 2069 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2070 // CHECK9: omp.dispatch.inc: 2071 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2072 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2073 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2074 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2075 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2076 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2077 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2078 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2079 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2080 // CHECK9: omp.dispatch.end: 2081 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2082 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2083 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 2084 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2085 // CHECK9: .omp.final.then: 2086 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 2087 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2088 // CHECK9: .omp.final.done: 2089 // CHECK9-NEXT: ret void 2090 // 2091 // 2092 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2093 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] { 2094 // CHECK9-NEXT: entry: 2095 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2096 // CHECK9-NEXT: ret void 2097 // 2098 // 2099 // CHECK11-LABEL: define {{[^@]+}}@main 2100 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2101 // CHECK11-NEXT: entry: 2102 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2103 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2104 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 2105 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 2106 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 2107 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 2108 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2109 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 2110 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 2111 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 2112 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 2113 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2114 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2115 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2116 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 2117 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 2118 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 2119 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 2120 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 2121 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 2122 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 2123 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 2124 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 2125 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 2126 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2127 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4 2128 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4 2129 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4 2130 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4 2131 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 2132 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 2133 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 2134 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 2135 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2136 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 2137 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 2138 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2139 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 2140 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 2141 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 2142 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 2143 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 2144 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2145 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2146 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 2147 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 2148 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2149 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 2150 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2151 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 2152 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 2153 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2154 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 2155 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 2156 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2157 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 2158 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2159 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 2160 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 2161 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2162 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 2163 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 2164 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 2165 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 2166 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2167 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2168 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 2169 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2170 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2171 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 2172 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2173 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 2174 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 2175 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2176 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2177 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2178 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2179 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2180 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2181 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2182 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2183 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2184 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2185 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2186 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2187 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2188 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2189 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2190 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2191 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2192 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2193 // CHECK11: omp_offload.failed: 2194 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4:[0-9]+]] 2195 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2196 // CHECK11: omp_offload.cont: 2197 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 2198 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 2199 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 2200 // CHECK11-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 2201 // CHECK11-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 2202 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 2203 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 2204 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2205 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 2206 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 2207 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2208 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 2209 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 2210 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 2211 // CHECK11-NEXT: store i8* null, i8** [[TMP41]], align 4 2212 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 2213 // CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 2214 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 2215 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 2216 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 2217 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 2218 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 2219 // CHECK11-NEXT: store i8* null, i8** [[TMP46]], align 4 2220 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 2221 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 2222 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 2223 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 2224 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 2225 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 2226 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 2227 // CHECK11-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 2228 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 2229 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 2230 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 2231 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 2232 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 2233 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 2234 // CHECK11-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 2235 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 2236 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 2237 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 2238 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 2239 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 2240 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 2241 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 2242 // CHECK11-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 2243 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 2244 // CHECK11-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2245 // CHECK11-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 2246 // CHECK11-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 2247 // CHECK11: omp_offload.failed15: 2248 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4]] 2249 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 2250 // CHECK11: omp_offload.cont16: 2251 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 2252 // CHECK11-NEXT: store i32 [[TMP62]], i32* [[DOTCAPTURE_EXPR_17]], align 4 2253 // CHECK11-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 2254 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[N_CASTED18]], align 4 2255 // CHECK11-NEXT: [[TMP64:%.*]] = load i32, i32* [[N_CASTED18]], align 4 2256 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4 2257 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2258 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2259 // CHECK11-NEXT: [[TMP67:%.*]] = mul nuw i32 [[TMP0]], 4 2260 // CHECK11-NEXT: [[TMP68:%.*]] = sext i32 [[TMP67]] to i64 2261 // CHECK11-NEXT: [[TMP69:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8* 2262 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP69]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false) 2263 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2264 // CHECK11-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 2265 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP71]], align 4 2266 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2267 // CHECK11-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 2268 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP73]], align 4 2269 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 2270 // CHECK11-NEXT: store i8* null, i8** [[TMP74]], align 4 2271 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 2272 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 2273 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP76]], align 4 2274 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 2275 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32* 2276 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4 2277 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 2278 // CHECK11-NEXT: store i8* null, i8** [[TMP79]], align 4 2279 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 2280 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 2281 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 4 2282 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 2283 // CHECK11-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 2284 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 4 2285 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2 2286 // CHECK11-NEXT: store i64 [[TMP68]], i64* [[TMP84]], align 4 2287 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 2288 // CHECK11-NEXT: store i8* null, i8** [[TMP85]], align 4 2289 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 2290 // CHECK11-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32* 2291 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP87]], align 4 2292 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 2293 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32* 2294 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP89]], align 4 2295 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3 2296 // CHECK11-NEXT: store i8* null, i8** [[TMP90]], align 4 2297 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 2298 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 2299 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 2300 // CHECK11-NEXT: [[TMP94:%.*]] = load i32, i32* [[N]], align 4 2301 // CHECK11-NEXT: store i32 [[TMP94]], i32* [[DOTCAPTURE_EXPR_24]], align 4 2302 // CHECK11-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 2303 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0 2304 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 2305 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 2306 // CHECK11-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 2307 // CHECK11-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 2308 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1 2309 // CHECK11-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i64 2310 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP97]]) 2311 // CHECK11-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP91]], i8** [[TMP92]], i64* [[TMP93]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2312 // CHECK11-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 2313 // CHECK11-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 2314 // CHECK11: omp_offload.failed30: 2315 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP64]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP66]]) #[[ATTR4]] 2316 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT31]] 2317 // CHECK11: omp_offload.cont31: 2318 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2319 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP100]]) 2320 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2321 // CHECK11-NEXT: [[TMP101:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 2322 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP101]]) 2323 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[RETVAL]], align 4 2324 // CHECK11-NEXT: ret i32 [[TMP102]] 2325 // 2326 // 2327 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 2328 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2329 // CHECK11-NEXT: entry: 2330 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2331 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2332 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2333 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2334 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2335 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2336 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2337 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2338 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2339 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2340 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2341 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2342 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 2343 // CHECK11-NEXT: ret void 2344 // 2345 // 2346 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2347 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] { 2348 // CHECK11-NEXT: entry: 2349 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2350 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2351 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2352 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2353 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2354 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2355 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2356 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2357 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2358 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2359 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2360 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2361 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2362 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2363 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2364 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2365 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2366 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2367 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2368 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2369 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2370 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2371 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2372 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2373 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2374 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2375 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2376 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2377 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2378 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2379 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2380 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2381 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2382 // CHECK11: omp.precond.then: 2383 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2384 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2385 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2386 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2387 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2388 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2389 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2390 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2391 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2392 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2393 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2394 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2395 // CHECK11: cond.true: 2396 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2397 // CHECK11-NEXT: br label [[COND_END:%.*]] 2398 // CHECK11: cond.false: 2399 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2400 // CHECK11-NEXT: br label [[COND_END]] 2401 // CHECK11: cond.end: 2402 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2403 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2404 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2405 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2406 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2407 // CHECK11: omp.inner.for.cond: 2408 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2409 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 2410 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2411 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2412 // CHECK11: omp.inner.for.body: 2413 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2414 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2415 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2416 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10 2417 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10 2418 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 2419 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 2420 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2421 // CHECK11: omp.body.continue: 2422 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2423 // CHECK11: omp.inner.for.inc: 2424 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2425 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2426 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2427 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2428 // CHECK11: omp.inner.for.end: 2429 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2430 // CHECK11: omp.loop.exit: 2431 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2432 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2433 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2434 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2435 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2436 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2437 // CHECK11: .omp.final.then: 2438 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2439 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 2440 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2441 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2442 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2443 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2444 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2445 // CHECK11: .omp.final.done: 2446 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2447 // CHECK11: omp.precond.end: 2448 // CHECK11-NEXT: ret void 2449 // 2450 // 2451 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 2452 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2453 // CHECK11-NEXT: entry: 2454 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2455 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2456 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2457 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2458 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2459 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2460 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2461 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2462 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2463 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2464 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2465 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2466 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 2467 // CHECK11-NEXT: ret void 2468 // 2469 // 2470 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2471 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] { 2472 // CHECK11-NEXT: entry: 2473 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2474 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2475 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2476 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2477 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2478 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2479 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2480 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2481 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2482 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2483 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2484 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2485 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2486 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2487 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2488 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2489 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2490 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2491 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2492 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2493 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2494 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2495 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2496 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2497 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2498 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2499 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2500 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2501 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2502 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2503 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2504 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2505 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2506 // CHECK11: omp.precond.then: 2507 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2508 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2509 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2510 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2511 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2512 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2513 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2514 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2515 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2516 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2517 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2518 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2519 // CHECK11: cond.true: 2520 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2521 // CHECK11-NEXT: br label [[COND_END:%.*]] 2522 // CHECK11: cond.false: 2523 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2524 // CHECK11-NEXT: br label [[COND_END]] 2525 // CHECK11: cond.end: 2526 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2527 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2528 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2529 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2530 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2531 // CHECK11: omp.inner.for.cond: 2532 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2533 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 2534 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2535 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2536 // CHECK11: omp.inner.for.body: 2537 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2538 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2539 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2540 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 2541 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 2542 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 2543 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 2544 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2545 // CHECK11: omp.body.continue: 2546 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2547 // CHECK11: omp.inner.for.inc: 2548 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2549 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2550 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 2551 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 2552 // CHECK11: omp.inner.for.end: 2553 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2554 // CHECK11: omp.loop.exit: 2555 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2556 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2557 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2558 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2559 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2560 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2561 // CHECK11: .omp.final.then: 2562 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2563 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 2564 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2565 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2566 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2567 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2568 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2569 // CHECK11: .omp.final.done: 2570 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2571 // CHECK11: omp.precond.end: 2572 // CHECK11-NEXT: ret void 2573 // 2574 // 2575 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2576 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2577 // CHECK11-NEXT: entry: 2578 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2579 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2580 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2581 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2582 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2583 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2584 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2585 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2586 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2587 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2588 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2589 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2590 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2591 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2592 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2593 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2594 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2595 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2596 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]]) 2597 // CHECK11-NEXT: ret void 2598 // 2599 // 2600 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 2601 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] { 2602 // CHECK11-NEXT: entry: 2603 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2604 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2605 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2606 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2607 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2608 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2609 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2610 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2611 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2612 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2613 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2614 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2615 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2616 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2617 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2618 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2619 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2620 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2621 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2622 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2623 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2624 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2625 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2626 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2627 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2628 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2629 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2630 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2631 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2632 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2633 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2634 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2635 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2636 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2637 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2638 // CHECK11: omp.precond.then: 2639 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2640 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2641 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2642 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2643 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2644 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2645 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2646 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2647 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 2648 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2649 // CHECK11: omp.dispatch.cond: 2650 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2651 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2652 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2653 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2654 // CHECK11: cond.true: 2655 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2656 // CHECK11-NEXT: br label [[COND_END:%.*]] 2657 // CHECK11: cond.false: 2658 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2659 // CHECK11-NEXT: br label [[COND_END]] 2660 // CHECK11: cond.end: 2661 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2662 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2663 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2664 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2665 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2666 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2667 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2668 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2669 // CHECK11: omp.dispatch.body: 2670 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2671 // CHECK11: omp.inner.for.cond: 2672 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2673 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 2674 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2675 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2676 // CHECK11: omp.inner.for.body: 2677 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2678 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2679 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2680 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 2681 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 2682 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]] 2683 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 2684 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2685 // CHECK11: omp.body.continue: 2686 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2687 // CHECK11: omp.inner.for.inc: 2688 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2689 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 2690 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 2691 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 2692 // CHECK11: omp.inner.for.end: 2693 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2694 // CHECK11: omp.dispatch.inc: 2695 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2696 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2697 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2698 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 2699 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2700 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2701 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 2702 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 2703 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2704 // CHECK11: omp.dispatch.end: 2705 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2706 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2707 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2708 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2709 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2710 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2711 // CHECK11: .omp.final.then: 2712 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2713 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0 2714 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 2715 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 2716 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 2717 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4 2718 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2719 // CHECK11: .omp.final.done: 2720 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2721 // CHECK11: omp.precond.end: 2722 // CHECK11-NEXT: ret void 2723 // 2724 // 2725 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2726 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat { 2727 // CHECK11-NEXT: entry: 2728 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2729 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2730 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2731 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2732 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2733 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2734 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 2735 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 2736 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 2737 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2738 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 2739 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 2740 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 2741 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 2742 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2743 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2744 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2745 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 2746 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2747 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2748 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 2749 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2750 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2751 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2752 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2753 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2754 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2755 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2756 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2757 // CHECK11: omp_offload.failed: 2758 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]] 2759 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2760 // CHECK11: omp_offload.cont: 2761 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2762 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 2763 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 2764 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2765 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 2766 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 2767 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 2768 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2769 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2770 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2771 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2772 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2773 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2774 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2775 // CHECK11: omp_offload.failed5: 2776 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]] 2777 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2778 // CHECK11: omp_offload.cont6: 2779 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2780 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 2781 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 2782 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2783 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 2784 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 2785 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 2786 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2787 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2788 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2789 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2790 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2791 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2792 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 2793 // CHECK11: omp_offload.failed11: 2794 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]] 2795 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]] 2796 // CHECK11: omp_offload.cont12: 2797 // CHECK11-NEXT: ret i32 0 2798 // 2799 // 2800 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 2801 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2802 // CHECK11-NEXT: entry: 2803 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2804 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2805 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2806 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2807 // CHECK11-NEXT: ret void 2808 // 2809 // 2810 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 2811 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 2812 // CHECK11-NEXT: entry: 2813 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2814 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2815 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2816 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2817 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2818 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2819 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2820 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2821 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2822 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2823 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2824 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2825 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2826 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2827 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2828 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2829 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2830 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2831 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2832 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2833 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2834 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2835 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2836 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2837 // CHECK11: cond.true: 2838 // CHECK11-NEXT: br label [[COND_END:%.*]] 2839 // CHECK11: cond.false: 2840 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2841 // CHECK11-NEXT: br label [[COND_END]] 2842 // CHECK11: cond.end: 2843 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2844 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2845 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2846 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2847 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2848 // CHECK11: omp.inner.for.cond: 2849 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2850 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 2851 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2852 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2853 // CHECK11: omp.inner.for.body: 2854 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2855 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2856 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2857 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 2858 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 2859 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2860 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 2861 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2862 // CHECK11: omp.body.continue: 2863 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2864 // CHECK11: omp.inner.for.inc: 2865 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2866 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2867 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 2868 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 2869 // CHECK11: omp.inner.for.end: 2870 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2871 // CHECK11: omp.loop.exit: 2872 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2873 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2874 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2875 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2876 // CHECK11: .omp.final.then: 2877 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 2878 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2879 // CHECK11: .omp.final.done: 2880 // CHECK11-NEXT: ret void 2881 // 2882 // 2883 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 2884 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2885 // CHECK11-NEXT: entry: 2886 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2887 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2888 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2889 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2890 // CHECK11-NEXT: ret void 2891 // 2892 // 2893 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 2894 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 2895 // CHECK11-NEXT: entry: 2896 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2897 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2898 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2899 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2900 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2901 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2902 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2903 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2904 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2905 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2906 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2907 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2908 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2909 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2910 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2911 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2912 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2913 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2914 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2915 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2916 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2917 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2918 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2919 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2920 // CHECK11: cond.true: 2921 // CHECK11-NEXT: br label [[COND_END:%.*]] 2922 // CHECK11: cond.false: 2923 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2924 // CHECK11-NEXT: br label [[COND_END]] 2925 // CHECK11: cond.end: 2926 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2927 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2928 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2929 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2930 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2931 // CHECK11: omp.inner.for.cond: 2932 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2933 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 2934 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2935 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2936 // CHECK11: omp.inner.for.body: 2937 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2938 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2939 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2940 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 2941 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 2942 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2943 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 2944 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2945 // CHECK11: omp.body.continue: 2946 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2947 // CHECK11: omp.inner.for.inc: 2948 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2949 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2950 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 2951 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 2952 // CHECK11: omp.inner.for.end: 2953 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2954 // CHECK11: omp.loop.exit: 2955 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2956 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2957 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2958 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2959 // CHECK11: .omp.final.then: 2960 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 2961 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 2962 // CHECK11: .omp.final.done: 2963 // CHECK11-NEXT: ret void 2964 // 2965 // 2966 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2967 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2968 // CHECK11-NEXT: entry: 2969 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2970 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2971 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2972 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2973 // CHECK11-NEXT: ret void 2974 // 2975 // 2976 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 2977 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 2978 // CHECK11-NEXT: entry: 2979 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2980 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2981 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2982 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2983 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2984 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2985 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2986 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2987 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2988 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2989 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2990 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2991 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2992 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2993 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2994 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2995 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2996 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2997 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2998 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2999 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 3000 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3001 // CHECK11: omp.dispatch.cond: 3002 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3003 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3004 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3005 // CHECK11: cond.true: 3006 // CHECK11-NEXT: br label [[COND_END:%.*]] 3007 // CHECK11: cond.false: 3008 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3009 // CHECK11-NEXT: br label [[COND_END]] 3010 // CHECK11: cond.end: 3011 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3012 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3013 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3014 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3015 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3016 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3017 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3018 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3019 // CHECK11: omp.dispatch.body: 3020 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3021 // CHECK11: omp.inner.for.cond: 3022 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3023 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 3024 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3025 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3026 // CHECK11: omp.inner.for.body: 3027 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3028 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3029 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3030 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28 3031 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28 3032 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 3033 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 3034 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3035 // CHECK11: omp.body.continue: 3036 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3037 // CHECK11: omp.inner.for.inc: 3038 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3039 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3040 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 3041 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 3042 // CHECK11: omp.inner.for.end: 3043 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3044 // CHECK11: omp.dispatch.inc: 3045 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3046 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3047 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3048 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3049 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3050 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3051 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 3052 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3053 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 3054 // CHECK11: omp.dispatch.end: 3055 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3056 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3057 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3058 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3059 // CHECK11: .omp.final.then: 3060 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 3061 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 3062 // CHECK11: .omp.final.done: 3063 // CHECK11-NEXT: ret void 3064 // 3065 // 3066 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3067 // CHECK11-SAME: () #[[ATTR7:[0-9]+]] { 3068 // CHECK11-NEXT: entry: 3069 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 3070 // CHECK11-NEXT: ret void 3071 // 3072 // 3073 // CHECK13-LABEL: define {{[^@]+}}@main 3074 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3075 // CHECK13-NEXT: entry: 3076 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3077 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3078 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3079 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 3080 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3081 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3082 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3083 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3084 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3085 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3086 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3087 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3088 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3089 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 3090 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3091 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3092 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3093 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3094 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3095 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4 3096 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3097 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3098 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 3099 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 3100 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3101 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 3102 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 3103 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 3104 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4 3105 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 3106 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4 3107 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3108 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3109 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3110 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 3111 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3112 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3113 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3114 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3115 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3116 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3117 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3118 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 3119 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3120 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 3121 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3122 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3123 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3124 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3125 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3126 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3127 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 3128 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3129 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 3130 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3131 // CHECK13: simd.if.then: 3132 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3133 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3134 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3135 // CHECK13: omp.inner.for.cond: 3136 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3137 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 3138 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3139 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3140 // CHECK13: omp.inner.for.body: 3141 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3142 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3143 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3144 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2 3145 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2 3146 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3147 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 3148 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 3149 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3150 // CHECK13: omp.body.continue: 3151 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3152 // CHECK13: omp.inner.for.inc: 3153 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3154 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 3155 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 3156 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 3157 // CHECK13: omp.inner.for.end: 3158 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3159 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 3160 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3161 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3162 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3163 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 3164 // CHECK13-NEXT: br label [[SIMD_IF_END]] 3165 // CHECK13: simd.if.end: 3166 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4 3167 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3168 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3169 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 3170 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3171 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3172 // CHECK13-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 3173 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 3174 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 3175 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4 3176 // CHECK13-NEXT: store i32 0, i32* [[I18]], align 4 3177 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3178 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 3179 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 3180 // CHECK13: simd.if.then20: 3181 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 3182 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4 3183 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3184 // CHECK13: omp.inner.for.cond23: 3185 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3186 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6 3187 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 3188 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3189 // CHECK13: omp.inner.for.body25: 3190 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3191 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 3192 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3193 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6 3194 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6 3195 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 3196 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]] 3197 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6 3198 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3199 // CHECK13: omp.body.continue30: 3200 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3201 // CHECK13: omp.inner.for.inc31: 3202 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3203 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 3204 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 3205 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 3206 // CHECK13: omp.inner.for.end33: 3207 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3208 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 3209 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 3210 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 3211 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 3212 // CHECK13-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4 3213 // CHECK13-NEXT: br label [[SIMD_IF_END38]] 3214 // CHECK13: simd.if.end38: 3215 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 3216 // CHECK13-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4 3217 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3218 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4 3219 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3220 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 3221 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 3222 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 3223 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 3224 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4 3225 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 3226 // CHECK13-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4 3227 // CHECK13-NEXT: store i32 0, i32* [[I48]], align 4 3228 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3229 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 3230 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 3231 // CHECK13: simd.if.then50: 3232 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4 3233 // CHECK13-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4 3234 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 3235 // CHECK13: omp.inner.for.cond53: 3236 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3237 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9 3238 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 3239 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 3240 // CHECK13: omp.inner.for.body55: 3241 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3242 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 3243 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 3244 // CHECK13-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9 3245 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9 3246 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 3247 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]] 3248 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9 3249 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 3250 // CHECK13: omp.body.continue60: 3251 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 3252 // CHECK13: omp.inner.for.inc61: 3253 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3254 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 3255 // CHECK13-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 3256 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 3257 // CHECK13: omp.inner.for.end63: 3258 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3259 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 3260 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 3261 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 3262 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 3263 // CHECK13-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4 3264 // CHECK13-NEXT: br label [[SIMD_IF_END68]] 3265 // CHECK13: simd.if.end68: 3266 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3267 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]]) 3268 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3269 // CHECK13-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3270 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 3271 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 3272 // CHECK13-NEXT: ret i32 [[TMP39]] 3273 // 3274 // 3275 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3276 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3277 // CHECK13-NEXT: entry: 3278 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3279 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3280 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3281 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3282 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3283 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3284 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3285 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3286 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3287 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3288 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3289 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 3290 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 3291 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 3292 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 3293 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3294 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 3295 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3296 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3297 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3298 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3299 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3300 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3301 // CHECK13: omp.inner.for.cond: 3302 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3303 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 3304 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3305 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3306 // CHECK13: omp.inner.for.body: 3307 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3308 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3309 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3310 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 3311 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 3312 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 3313 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 3314 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 3315 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3316 // CHECK13: omp.body.continue: 3317 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3318 // CHECK13: omp.inner.for.inc: 3319 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3320 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3321 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3322 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3323 // CHECK13: omp.inner.for.end: 3324 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 3325 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 3326 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 3327 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 3328 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 3329 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3330 // CHECK13: omp.inner.for.cond7: 3331 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3332 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15 3333 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3334 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 3335 // CHECK13: omp.inner.for.body9: 3336 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3337 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 3338 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3339 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15 3340 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 3341 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 3342 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]] 3343 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15 3344 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 3345 // CHECK13: omp.body.continue14: 3346 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 3347 // CHECK13: omp.inner.for.inc15: 3348 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3349 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 3350 // CHECK13-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 3351 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]] 3352 // CHECK13: omp.inner.for.end17: 3353 // CHECK13-NEXT: store i32 10, i32* [[I6]], align 4 3354 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4 3355 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4 3356 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4 3357 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4 3358 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3359 // CHECK13: omp.inner.for.cond23: 3360 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3361 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18 3362 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3363 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 3364 // CHECK13: omp.inner.for.body25: 3365 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3366 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1 3367 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3368 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18 3369 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18 3370 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64 3371 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]] 3372 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18 3373 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 3374 // CHECK13: omp.body.continue30: 3375 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 3376 // CHECK13: omp.inner.for.inc31: 3377 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3378 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1 3379 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 3380 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]] 3381 // CHECK13: omp.inner.for.end33: 3382 // CHECK13-NEXT: store i32 10, i32* [[I22]], align 4 3383 // CHECK13-NEXT: ret i32 0 3384 // 3385 // 3386 // CHECK15-LABEL: define {{[^@]+}}@main 3387 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3388 // CHECK15-NEXT: entry: 3389 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3390 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3391 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3392 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 3393 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3394 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3395 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3396 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3397 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3398 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3399 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3400 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3401 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3402 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 3403 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3404 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3405 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 3406 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 3407 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 3408 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4 3409 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 3410 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4 3411 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 3412 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 3413 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 3414 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3415 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 3416 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 3417 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4 3418 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 3419 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4 3420 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 3421 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3422 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3423 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 3424 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3425 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3426 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3427 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3428 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3429 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3430 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3431 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3432 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3433 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3434 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3435 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3436 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3437 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3438 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 3439 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 3440 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3441 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3442 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3443 // CHECK15: simd.if.then: 3444 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3445 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3446 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3447 // CHECK15: omp.inner.for.cond: 3448 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3449 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 3450 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3451 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3452 // CHECK15: omp.inner.for.body: 3453 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3454 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3455 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3456 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3 3457 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3 3458 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]] 3459 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 3460 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3461 // CHECK15: omp.body.continue: 3462 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3463 // CHECK15: omp.inner.for.inc: 3464 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3465 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 3466 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 3467 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 3468 // CHECK15: omp.inner.for.end: 3469 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3470 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 3471 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 3472 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 3473 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 3474 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 3475 // CHECK15-NEXT: br label [[SIMD_IF_END]] 3476 // CHECK15: simd.if.end: 3477 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4 3478 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3479 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3480 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 3481 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 3482 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 3483 // CHECK15-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 3484 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 3485 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 3486 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4 3487 // CHECK15-NEXT: store i32 0, i32* [[I18]], align 4 3488 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3489 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 3490 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 3491 // CHECK15: simd.if.then20: 3492 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 3493 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4 3494 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 3495 // CHECK15: omp.inner.for.cond23: 3496 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3497 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7 3498 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 3499 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 3500 // CHECK15: omp.inner.for.body25: 3501 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3502 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 3503 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 3504 // CHECK15-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7 3505 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7 3506 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]] 3507 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7 3508 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 3509 // CHECK15: omp.body.continue29: 3510 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 3511 // CHECK15: omp.inner.for.inc30: 3512 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3513 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 3514 // CHECK15-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 3515 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 3516 // CHECK15: omp.inner.for.end32: 3517 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3518 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 3519 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 3520 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 3521 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 3522 // CHECK15-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4 3523 // CHECK15-NEXT: br label [[SIMD_IF_END37]] 3524 // CHECK15: simd.if.end37: 3525 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4 3526 // CHECK15-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4 3527 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 3528 // CHECK15-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4 3529 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3530 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 3531 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 3532 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 3533 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4 3534 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4 3535 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 3536 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4 3537 // CHECK15-NEXT: store i32 0, i32* [[I47]], align 4 3538 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3539 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 3540 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 3541 // CHECK15: simd.if.then49: 3542 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4 3543 // CHECK15-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4 3544 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 3545 // CHECK15: omp.inner.for.cond52: 3546 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3547 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10 3548 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 3549 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 3550 // CHECK15: omp.inner.for.body54: 3551 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3552 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 3553 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 3554 // CHECK15-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10 3555 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10 3556 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]] 3557 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10 3558 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 3559 // CHECK15: omp.body.continue58: 3560 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 3561 // CHECK15: omp.inner.for.inc59: 3562 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3563 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 3564 // CHECK15-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 3565 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 3566 // CHECK15: omp.inner.for.end61: 3567 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 3568 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 3569 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 3570 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 3571 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 3572 // CHECK15-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4 3573 // CHECK15-NEXT: br label [[SIMD_IF_END66]] 3574 // CHECK15: simd.if.end66: 3575 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3576 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]]) 3577 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3578 // CHECK15-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3579 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP37]]) 3580 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4 3581 // CHECK15-NEXT: ret i32 [[TMP38]] 3582 // 3583 // 3584 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3585 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 3586 // CHECK15-NEXT: entry: 3587 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3588 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3589 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 3590 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3591 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3592 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3593 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 3594 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3595 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 3596 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 3597 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 3598 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 3599 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 3600 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 3601 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 3602 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 3603 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 3604 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3605 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3606 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3607 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3608 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 3609 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3610 // CHECK15: omp.inner.for.cond: 3611 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3612 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 3613 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 3614 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3615 // CHECK15: omp.inner.for.body: 3616 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3617 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 3618 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3619 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 3620 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 3621 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]] 3622 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 3623 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3624 // CHECK15: omp.body.continue: 3625 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3626 // CHECK15: omp.inner.for.inc: 3627 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3628 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 3629 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3630 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 3631 // CHECK15: omp.inner.for.end: 3632 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 3633 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 3634 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 3635 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 3636 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 3637 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 3638 // CHECK15: omp.inner.for.cond7: 3639 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3640 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16 3641 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3642 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 3643 // CHECK15: omp.inner.for.body9: 3644 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3645 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 3646 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 3647 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16 3648 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16 3649 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]] 3650 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16 3651 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 3652 // CHECK15: omp.body.continue13: 3653 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 3654 // CHECK15: omp.inner.for.inc14: 3655 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3656 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 3657 // CHECK15-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 3658 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]] 3659 // CHECK15: omp.inner.for.end16: 3660 // CHECK15-NEXT: store i32 10, i32* [[I6]], align 4 3661 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 3662 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4 3663 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 3664 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4 3665 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 3666 // CHECK15: omp.inner.for.cond22: 3667 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3668 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19 3669 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3670 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 3671 // CHECK15: omp.inner.for.body24: 3672 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3673 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1 3674 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 3675 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19 3676 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19 3677 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]] 3678 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19 3679 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 3680 // CHECK15: omp.body.continue28: 3681 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 3682 // CHECK15: omp.inner.for.inc29: 3683 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3684 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1 3685 // CHECK15-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 3686 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]] 3687 // CHECK15: omp.inner.for.end31: 3688 // CHECK15-NEXT: store i32 10, i32* [[I21]], align 4 3689 // CHECK15-NEXT: ret i32 0 3690 // 3691