1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X];
25 float b;
fooSS26 int foo(void) {
27
28 #pragma omp target teams distribute simd
29 for(int i = 0; i < X; i++) {
30 a[i] = (T)0;
31 }
32 #pragma omp target teams distribute simd dist_schedule(static)
33 for(int i = 0; i < X; i++) {
34 a[i] = (T)0;
35 }
36 #pragma omp target teams distribute simd dist_schedule(static, X/2)
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
39 }
40
41
42
43
44
45
46 return a[0];
47 }
48 };
49
teams_template_struct(void)50 int teams_template_struct(void) {
51 SS<int, 123, 456> V;
52 return V.foo();
53
54 }
55 #endif // CK1
56
57 // Test host codegen.
58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
64
65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
71 #ifdef CK2
72
73 template <typename T, int n>
tmain(T argc)74 int tmain(T argc) {
75 T a[n];
76 #pragma omp target teams distribute simd
77 for(int i = 0; i < n; i++) {
78 a[i] = (T)0;
79 }
80 #pragma omp target teams distribute simd dist_schedule(static)
81 for(int i = 0; i < n; i++) {
82 a[i] = (T)0;
83 }
84 #pragma omp target teams distribute simd dist_schedule(static, n)
85 for(int i = 0; i < n; i++) {
86 a[i] = (T)0;
87 }
88 return 0;
89 }
90
main(int argc,char ** argv)91 int main (int argc, char **argv) {
92 int n = 100;
93 int a[n];
94 #pragma omp target teams distribute simd
95 for(int i = 0; i < n; i++) {
96 a[i] = 0;
97 }
98 #pragma omp target teams distribute simd dist_schedule(static)
99 for(int i = 0; i < n; i++) {
100 a[i] = 0;
101 }
102 #pragma omp target teams distribute simd dist_schedule(static, n)
103 for(int i = 0; i < n; i++) {
104 a[i] = 0;
105 }
106 return tmain<int, 10>(argc);
107 }
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123 #endif // CK2
124 #endif // #ifndef HEADER
125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
127 // CHECK1-NEXT: entry:
128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
130 // CHECK1-NEXT: ret i32 [[CALL]]
131 //
132 //
133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
134 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
135 // CHECK1-NEXT: entry:
136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
148 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
162 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
163 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
164 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
165 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
166 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
167 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
168 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
169 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
170 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
171 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
172 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
173 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
174 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
175 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
176 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
177 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
178 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
179 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
180 // CHECK1-NEXT: store i64 123, i64* [[TMP15]], align 8
181 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
182 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
183 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
184 // CHECK1: omp_offload.failed:
185 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]]
186 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
187 // CHECK1: omp_offload.cont:
188 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
189 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
190 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
191 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
192 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
193 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
194 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
195 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
196 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
197 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
198 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
199 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
200 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
201 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4
202 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
203 // CHECK1-NEXT: store i32 1, i32* [[TMP26]], align 4
204 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
205 // CHECK1-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
206 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
207 // CHECK1-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
208 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
209 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP29]], align 8
210 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
211 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP30]], align 8
212 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
213 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8
214 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
215 // CHECK1-NEXT: store i8** null, i8*** [[TMP32]], align 8
216 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
217 // CHECK1-NEXT: store i64 123, i64* [[TMP33]], align 8
218 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
219 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
220 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
221 // CHECK1: omp_offload.failed8:
222 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]]
223 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
224 // CHECK1: omp_offload.cont9:
225 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
226 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
227 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
228 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
229 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
230 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
231 // CHECK1-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
232 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
233 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8
234 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
235 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
236 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
237 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
238 // CHECK1-NEXT: store i32 1, i32* [[TMP43]], align 4
239 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
240 // CHECK1-NEXT: store i32 1, i32* [[TMP44]], align 4
241 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
242 // CHECK1-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
243 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
244 // CHECK1-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
245 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
246 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP47]], align 8
247 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
248 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP48]], align 8
249 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
250 // CHECK1-NEXT: store i8** null, i8*** [[TMP49]], align 8
251 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
252 // CHECK1-NEXT: store i8** null, i8*** [[TMP50]], align 8
253 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
254 // CHECK1-NEXT: store i64 123, i64* [[TMP51]], align 8
255 // CHECK1-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
256 // CHECK1-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
257 // CHECK1-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
258 // CHECK1: omp_offload.failed16:
259 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]]
260 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]
261 // CHECK1: omp_offload.cont17:
262 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
263 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i64 0, i64 0
264 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
265 // CHECK1-NEXT: ret i32 [[TMP54]]
266 //
267 //
268 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
269 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
270 // CHECK1-NEXT: entry:
271 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
272 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
273 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
274 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
275 // CHECK1-NEXT: ret void
276 //
277 //
278 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
279 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
280 // CHECK1-NEXT: entry:
281 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
282 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
283 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
284 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
285 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
286 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
287 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
288 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
289 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
290 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
291 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
292 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
293 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
294 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
295 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
296 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
297 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
298 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
299 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
300 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
301 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
302 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
303 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
304 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
305 // CHECK1: cond.true:
306 // CHECK1-NEXT: br label [[COND_END:%.*]]
307 // CHECK1: cond.false:
308 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
309 // CHECK1-NEXT: br label [[COND_END]]
310 // CHECK1: cond.end:
311 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
312 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
313 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
314 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
316 // CHECK1: omp.inner.for.cond:
317 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
318 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
319 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
320 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
321 // CHECK1: omp.inner.for.body:
322 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
323 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
324 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
325 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
326 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
327 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
328 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
329 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
330 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
331 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
332 // CHECK1: omp.body.continue:
333 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
334 // CHECK1: omp.inner.for.inc:
335 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
336 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
337 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
338 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
339 // CHECK1: omp.inner.for.end:
340 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
341 // CHECK1: omp.loop.exit:
342 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
343 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
344 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
345 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
346 // CHECK1: .omp.final.then:
347 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
348 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
349 // CHECK1: .omp.final.done:
350 // CHECK1-NEXT: ret void
351 //
352 //
353 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
354 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
355 // CHECK1-NEXT: entry:
356 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
357 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
358 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
359 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
360 // CHECK1-NEXT: ret void
361 //
362 //
363 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
364 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] {
365 // CHECK1-NEXT: entry:
366 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
367 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
368 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
369 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
370 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
371 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
372 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
373 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
374 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
375 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
376 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
377 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
378 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
379 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
380 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
381 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
382 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
383 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
384 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
385 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
386 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
387 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
388 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
389 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
390 // CHECK1: cond.true:
391 // CHECK1-NEXT: br label [[COND_END:%.*]]
392 // CHECK1: cond.false:
393 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
394 // CHECK1-NEXT: br label [[COND_END]]
395 // CHECK1: cond.end:
396 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
397 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
398 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
399 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
401 // CHECK1: omp.inner.for.cond:
402 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
403 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
404 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
405 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
406 // CHECK1: omp.inner.for.body:
407 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
408 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
411 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
412 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
413 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
414 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
415 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
416 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
417 // CHECK1: omp.body.continue:
418 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
419 // CHECK1: omp.inner.for.inc:
420 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
421 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
422 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
423 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
424 // CHECK1: omp.inner.for.end:
425 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
426 // CHECK1: omp.loop.exit:
427 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
428 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
429 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
430 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
431 // CHECK1: .omp.final.then:
432 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
433 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
434 // CHECK1: .omp.final.done:
435 // CHECK1-NEXT: ret void
436 //
437 //
438 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
439 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
440 // CHECK1-NEXT: entry:
441 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
442 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
443 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
444 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
445 // CHECK1-NEXT: ret void
446 //
447 //
448 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
449 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] {
450 // CHECK1-NEXT: entry:
451 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
452 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
453 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
454 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
455 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
456 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
457 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
458 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
459 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
460 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
461 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
462 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
463 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
464 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
465 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
466 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
467 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
468 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
469 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
470 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
471 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
472 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
473 // CHECK1: omp.dispatch.cond:
474 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
475 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
476 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
477 // CHECK1: cond.true:
478 // CHECK1-NEXT: br label [[COND_END:%.*]]
479 // CHECK1: cond.false:
480 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
481 // CHECK1-NEXT: br label [[COND_END]]
482 // CHECK1: cond.end:
483 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
484 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
485 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
486 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
487 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
488 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
489 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
490 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
491 // CHECK1: omp.dispatch.body:
492 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
493 // CHECK1: omp.inner.for.cond:
494 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
495 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
496 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
497 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
498 // CHECK1: omp.inner.for.body:
499 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
500 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
501 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
502 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
503 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
504 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15
505 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
506 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
507 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
508 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
509 // CHECK1: omp.body.continue:
510 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
511 // CHECK1: omp.inner.for.inc:
512 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
513 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
514 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
515 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
516 // CHECK1: omp.inner.for.end:
517 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
518 // CHECK1: omp.dispatch.inc:
519 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
520 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
521 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
522 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
523 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
524 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
525 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
526 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
527 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
528 // CHECK1: omp.dispatch.end:
529 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
530 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
531 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
532 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
533 // CHECK1: .omp.final.then:
534 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
535 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
536 // CHECK1: .omp.final.done:
537 // CHECK1-NEXT: ret void
538 //
539 //
540 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
541 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
542 // CHECK1-NEXT: entry:
543 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
544 // CHECK1-NEXT: ret void
545 //
546 //
547 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
548 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
549 // CHECK3-NEXT: entry:
550 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
551 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
552 // CHECK3-NEXT: ret i32 [[CALL]]
553 //
554 //
555 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
556 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
557 // CHECK3-NEXT: entry:
558 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
559 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
560 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
561 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
562 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
563 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
564 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
565 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
566 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
567 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
568 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
569 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
570 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
571 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
572 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
573 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
574 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
575 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
576 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
577 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
578 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
579 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
580 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
581 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
582 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
583 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
584 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
585 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
586 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
587 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
588 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
589 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
590 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
591 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
592 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
593 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
594 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
595 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
596 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
597 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
598 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
599 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
600 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
601 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
602 // CHECK3-NEXT: store i64 123, i64* [[TMP15]], align 8
603 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
604 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
605 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
606 // CHECK3: omp_offload.failed:
607 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]]
608 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
609 // CHECK3: omp_offload.cont:
610 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
611 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
612 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
613 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
614 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
615 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
616 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
617 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
618 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
619 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
620 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
621 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
622 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
623 // CHECK3-NEXT: store i32 1, i32* [[TMP25]], align 4
624 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
625 // CHECK3-NEXT: store i32 1, i32* [[TMP26]], align 4
626 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
627 // CHECK3-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
628 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
629 // CHECK3-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
630 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
631 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP29]], align 4
632 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
633 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP30]], align 4
634 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
635 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 4
636 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
637 // CHECK3-NEXT: store i8** null, i8*** [[TMP32]], align 4
638 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
639 // CHECK3-NEXT: store i64 123, i64* [[TMP33]], align 8
640 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
641 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
642 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
643 // CHECK3: omp_offload.failed8:
644 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]]
645 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
646 // CHECK3: omp_offload.cont9:
647 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
648 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
649 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
650 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
651 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
652 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
653 // CHECK3-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
654 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
655 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4
656 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
657 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
658 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
659 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
660 // CHECK3-NEXT: store i32 1, i32* [[TMP43]], align 4
661 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
662 // CHECK3-NEXT: store i32 1, i32* [[TMP44]], align 4
663 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
664 // CHECK3-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
665 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
666 // CHECK3-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
667 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
668 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP47]], align 4
669 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
670 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP48]], align 4
671 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
672 // CHECK3-NEXT: store i8** null, i8*** [[TMP49]], align 4
673 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
674 // CHECK3-NEXT: store i8** null, i8*** [[TMP50]], align 4
675 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
676 // CHECK3-NEXT: store i64 123, i64* [[TMP51]], align 8
677 // CHECK3-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
678 // CHECK3-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
679 // CHECK3-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
680 // CHECK3: omp_offload.failed16:
681 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]]
682 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]
683 // CHECK3: omp_offload.cont17:
684 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
685 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i32 0, i32 0
686 // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
687 // CHECK3-NEXT: ret i32 [[TMP54]]
688 //
689 //
690 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
691 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
692 // CHECK3-NEXT: entry:
693 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
694 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
695 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
696 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
697 // CHECK3-NEXT: ret void
698 //
699 //
700 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
701 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
702 // CHECK3-NEXT: entry:
703 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
704 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
705 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
706 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
707 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
708 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
709 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
710 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
711 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
712 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
713 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
714 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
715 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
716 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
717 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
718 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
719 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
720 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
721 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
722 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
723 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
724 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
725 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
726 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
727 // CHECK3: cond.true:
728 // CHECK3-NEXT: br label [[COND_END:%.*]]
729 // CHECK3: cond.false:
730 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
731 // CHECK3-NEXT: br label [[COND_END]]
732 // CHECK3: cond.end:
733 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
734 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
735 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
736 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
737 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
738 // CHECK3: omp.inner.for.cond:
739 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
740 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
741 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
742 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
743 // CHECK3: omp.inner.for.body:
744 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
745 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
746 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
747 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
748 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
749 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
750 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
751 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
752 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
753 // CHECK3: omp.body.continue:
754 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
755 // CHECK3: omp.inner.for.inc:
756 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
757 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
758 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
759 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
760 // CHECK3: omp.inner.for.end:
761 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
762 // CHECK3: omp.loop.exit:
763 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
764 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
765 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
766 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
767 // CHECK3: .omp.final.then:
768 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
769 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
770 // CHECK3: .omp.final.done:
771 // CHECK3-NEXT: ret void
772 //
773 //
774 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
775 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
776 // CHECK3-NEXT: entry:
777 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
778 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
779 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
780 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
781 // CHECK3-NEXT: ret void
782 //
783 //
784 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
785 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] {
786 // CHECK3-NEXT: entry:
787 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
788 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
789 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
790 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
791 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
792 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
793 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
794 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
795 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
796 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
797 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
798 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
799 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
800 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
801 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
802 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
803 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
804 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
805 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
806 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
807 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
808 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
809 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
810 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
811 // CHECK3: cond.true:
812 // CHECK3-NEXT: br label [[COND_END:%.*]]
813 // CHECK3: cond.false:
814 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
815 // CHECK3-NEXT: br label [[COND_END]]
816 // CHECK3: cond.end:
817 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
818 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
819 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
820 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
821 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
822 // CHECK3: omp.inner.for.cond:
823 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
824 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
825 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
826 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
827 // CHECK3: omp.inner.for.body:
828 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
829 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
830 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
831 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
832 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
833 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
834 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
835 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
836 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
837 // CHECK3: omp.body.continue:
838 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
839 // CHECK3: omp.inner.for.inc:
840 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
841 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
842 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
843 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
844 // CHECK3: omp.inner.for.end:
845 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
846 // CHECK3: omp.loop.exit:
847 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
848 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
849 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
850 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
851 // CHECK3: .omp.final.then:
852 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
853 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
854 // CHECK3: .omp.final.done:
855 // CHECK3-NEXT: ret void
856 //
857 //
858 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
859 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
860 // CHECK3-NEXT: entry:
861 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
862 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
863 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
864 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
865 // CHECK3-NEXT: ret void
866 //
867 //
868 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
869 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] {
870 // CHECK3-NEXT: entry:
871 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
872 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
873 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
874 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
875 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
876 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
877 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
878 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
879 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
880 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
881 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
882 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
883 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
884 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
885 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
886 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
887 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
888 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
889 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
890 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
891 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
892 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
893 // CHECK3: omp.dispatch.cond:
894 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
895 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
896 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
897 // CHECK3: cond.true:
898 // CHECK3-NEXT: br label [[COND_END:%.*]]
899 // CHECK3: cond.false:
900 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
901 // CHECK3-NEXT: br label [[COND_END]]
902 // CHECK3: cond.end:
903 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
904 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
905 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
906 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
907 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
908 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
909 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
910 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
911 // CHECK3: omp.dispatch.body:
912 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
913 // CHECK3: omp.inner.for.cond:
914 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
915 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
916 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
917 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
918 // CHECK3: omp.inner.for.body:
919 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
920 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
921 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
922 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16
923 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
924 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16
925 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
926 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
927 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
928 // CHECK3: omp.body.continue:
929 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
930 // CHECK3: omp.inner.for.inc:
931 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
932 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
933 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
934 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
935 // CHECK3: omp.inner.for.end:
936 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
937 // CHECK3: omp.dispatch.inc:
938 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
939 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
940 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
941 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
942 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
943 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
944 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
945 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
946 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
947 // CHECK3: omp.dispatch.end:
948 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
949 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
950 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
951 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
952 // CHECK3: .omp.final.then:
953 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
954 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
955 // CHECK3: .omp.final.done:
956 // CHECK3-NEXT: ret void
957 //
958 //
959 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
960 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
961 // CHECK3-NEXT: entry:
962 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
963 // CHECK3-NEXT: ret void
964 //
965 //
966 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
967 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
968 // CHECK5-NEXT: entry:
969 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
970 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
971 // CHECK5-NEXT: ret i32 [[CALL]]
972 //
973 //
974 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
975 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
976 // CHECK5-NEXT: entry:
977 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
978 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
979 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
980 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
981 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
982 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
983 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
984 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
985 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
986 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
987 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4
988 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
989 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
990 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
991 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
992 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4
993 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
994 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
995 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
996 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
997 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
998 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
999 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1000 // CHECK5: omp.inner.for.cond:
1001 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1002 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
1003 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1004 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1005 // CHECK5: omp.inner.for.body:
1006 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1007 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1008 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1009 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
1010 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1011 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
1012 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
1013 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1014 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
1015 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1016 // CHECK5: omp.body.continue:
1017 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1018 // CHECK5: omp.inner.for.inc:
1019 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1020 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
1021 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1022 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1023 // CHECK5: omp.inner.for.end:
1024 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
1025 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
1026 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
1027 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
1028 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
1029 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
1030 // CHECK5: omp.inner.for.cond8:
1031 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1032 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
1033 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1034 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
1035 // CHECK5: omp.inner.for.body10:
1036 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1037 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
1038 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1039 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
1040 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1041 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6
1042 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64
1043 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]]
1044 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6
1045 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
1046 // CHECK5: omp.body.continue16:
1047 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
1048 // CHECK5: omp.inner.for.inc17:
1049 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1050 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
1051 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
1052 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
1053 // CHECK5: omp.inner.for.end19:
1054 // CHECK5-NEXT: store i32 123, i32* [[I7]], align 4
1055 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
1056 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4
1057 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
1058 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4
1059 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]]
1060 // CHECK5: omp.inner.for.cond25:
1061 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1062 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9
1063 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1064 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
1065 // CHECK5: omp.inner.for.body27:
1066 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1067 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1
1068 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
1069 // CHECK5-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9
1070 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1071 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9
1072 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64
1073 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]]
1074 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9
1075 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
1076 // CHECK5: omp.body.continue33:
1077 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
1078 // CHECK5: omp.inner.for.inc34:
1079 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1080 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1
1081 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
1082 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]
1083 // CHECK5: omp.inner.for.end36:
1084 // CHECK5-NEXT: store i32 123, i32* [[I24]], align 4
1085 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1086 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0
1087 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4
1088 // CHECK5-NEXT: ret i32 [[TMP18]]
1089 //
1090 //
1091 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1092 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
1093 // CHECK7-NEXT: entry:
1094 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1095 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
1096 // CHECK7-NEXT: ret i32 [[CALL]]
1097 //
1098 //
1099 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1100 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1101 // CHECK7-NEXT: entry:
1102 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1103 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
1104 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1105 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1106 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1107 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
1108 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1109 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1110 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1111 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1112 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4
1113 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
1114 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4
1115 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4
1116 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4
1117 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4
1118 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1119 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1120 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1121 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1122 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1123 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1124 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1125 // CHECK7: omp.inner.for.cond:
1126 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1127 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
1128 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1129 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1130 // CHECK7: omp.inner.for.body:
1131 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1132 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1133 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1134 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
1135 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1136 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
1137 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]]
1138 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
1139 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1140 // CHECK7: omp.body.continue:
1141 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1142 // CHECK7: omp.inner.for.inc:
1143 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1144 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
1145 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1146 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1147 // CHECK7: omp.inner.for.end:
1148 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
1149 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
1150 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
1151 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
1152 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
1153 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
1154 // CHECK7: omp.inner.for.cond8:
1155 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1156 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7
1157 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1158 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
1159 // CHECK7: omp.inner.for.body10:
1160 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1161 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
1162 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1163 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7
1164 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1165 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7
1166 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]]
1167 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7
1168 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
1169 // CHECK7: omp.body.continue15:
1170 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
1171 // CHECK7: omp.inner.for.inc16:
1172 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1173 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1
1174 // CHECK7-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
1175 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]
1176 // CHECK7: omp.inner.for.end18:
1177 // CHECK7-NEXT: store i32 123, i32* [[I7]], align 4
1178 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4
1179 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4
1180 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4
1181 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4
1182 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]]
1183 // CHECK7: omp.inner.for.cond24:
1184 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1185 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10
1186 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1187 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]
1188 // CHECK7: omp.inner.for.body26:
1189 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1190 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1
1191 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
1192 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10
1193 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1194 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10
1195 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]]
1196 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10
1197 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]]
1198 // CHECK7: omp.body.continue31:
1199 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]]
1200 // CHECK7: omp.inner.for.inc32:
1201 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1202 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1
1203 // CHECK7-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
1204 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]
1205 // CHECK7: omp.inner.for.end34:
1206 // CHECK7-NEXT: store i32 123, i32* [[I23]], align 4
1207 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1208 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0
1209 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4
1210 // CHECK7-NEXT: ret i32 [[TMP18]]
1211 //
1212 //
1213 // CHECK9-LABEL: define {{[^@]+}}@main
1214 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1215 // CHECK9-NEXT: entry:
1216 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1217 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1218 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
1219 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
1220 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
1221 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1222 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1223 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
1224 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
1225 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
1226 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
1227 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1228 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1229 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1230 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
1231 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
1232 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
1233 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
1234 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
1235 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
1236 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1237 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
1238 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
1239 // CHECK9-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
1240 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1241 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [4 x i8*], align 8
1242 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [4 x i8*], align 8
1243 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [4 x i8*], align 8
1244 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES26:%.*]] = alloca [4 x i64], align 8
1245 // CHECK9-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
1246 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
1247 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_29:%.*]] = alloca i32, align 4
1248 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1249 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1250 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
1251 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
1252 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1253 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1254 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
1255 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
1256 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
1257 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
1258 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
1259 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1260 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
1261 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1262 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
1263 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
1264 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
1265 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1266 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1267 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
1268 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1269 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1270 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
1271 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1272 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
1273 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1274 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1275 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
1276 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1277 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1278 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
1279 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1280 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
1281 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1282 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
1283 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
1284 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1285 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
1286 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
1287 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1288 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
1289 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1290 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
1291 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1292 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1293 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1294 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
1295 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
1296 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1297 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
1298 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1299 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1300 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1301 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1302 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
1303 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
1304 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1305 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1306 // CHECK9-NEXT: store i32 1, i32* [[TMP30]], align 4
1307 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1308 // CHECK9-NEXT: store i32 3, i32* [[TMP31]], align 4
1309 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1310 // CHECK9-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
1311 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1312 // CHECK9-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
1313 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1314 // CHECK9-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
1315 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1316 // CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
1317 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1318 // CHECK9-NEXT: store i8** null, i8*** [[TMP36]], align 8
1319 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1320 // CHECK9-NEXT: store i8** null, i8*** [[TMP37]], align 8
1321 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1322 // CHECK9-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
1323 // CHECK9-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1324 // CHECK9-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
1325 // CHECK9-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1326 // CHECK9: omp_offload.failed:
1327 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4:[0-9]+]]
1328 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1329 // CHECK9: omp_offload.cont:
1330 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
1331 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
1332 // CHECK9-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
1333 // CHECK9-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
1334 // CHECK9-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
1335 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
1336 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false)
1337 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1338 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
1339 // CHECK9-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
1340 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1341 // CHECK9-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
1342 // CHECK9-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
1343 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
1344 // CHECK9-NEXT: store i8* null, i8** [[TMP49]], align 8
1345 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
1346 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
1347 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
1348 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
1349 // CHECK9-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
1350 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
1351 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
1352 // CHECK9-NEXT: store i8* null, i8** [[TMP54]], align 8
1353 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
1354 // CHECK9-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
1355 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
1356 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
1357 // CHECK9-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
1358 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
1359 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
1360 // CHECK9-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
1361 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
1362 // CHECK9-NEXT: store i8* null, i8** [[TMP60]], align 8
1363 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1364 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1365 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
1366 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
1367 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
1368 // CHECK9-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
1369 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
1370 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
1371 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
1372 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
1373 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
1374 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
1375 // CHECK9-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
1376 // CHECK9-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1377 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
1378 // CHECK9-NEXT: store i32 1, i32* [[TMP68]], align 4
1379 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
1380 // CHECK9-NEXT: store i32 3, i32* [[TMP69]], align 4
1381 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
1382 // CHECK9-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
1383 // CHECK9-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
1384 // CHECK9-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
1385 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
1386 // CHECK9-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
1387 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
1388 // CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP73]], align 8
1389 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
1390 // CHECK9-NEXT: store i8** null, i8*** [[TMP74]], align 8
1391 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
1392 // CHECK9-NEXT: store i8** null, i8*** [[TMP75]], align 8
1393 // CHECK9-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
1394 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
1395 // CHECK9-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
1396 // CHECK9-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
1397 // CHECK9-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
1398 // CHECK9: omp_offload.failed17:
1399 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4]]
1400 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT18]]
1401 // CHECK9: omp_offload.cont18:
1402 // CHECK9-NEXT: [[TMP79:%.*]] = load i32, i32* [[N]], align 4
1403 // CHECK9-NEXT: store i32 [[TMP79]], i32* [[DOTCAPTURE_EXPR_19]], align 4
1404 // CHECK9-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
1405 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
1406 // CHECK9-NEXT: store i32 [[TMP80]], i32* [[CONV21]], align 4
1407 // CHECK9-NEXT: [[TMP81:%.*]] = load i64, i64* [[N_CASTED20]], align 8
1408 // CHECK9-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
1409 // CHECK9-NEXT: [[CONV22:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
1410 // CHECK9-NEXT: store i32 [[TMP82]], i32* [[CONV22]], align 4
1411 // CHECK9-NEXT: [[TMP83:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1412 // CHECK9-NEXT: [[TMP84:%.*]] = mul nuw i64 [[TMP1]], 4
1413 // CHECK9-NEXT: [[TMP85:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES26]] to i8*
1414 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP85]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false)
1415 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
1416 // CHECK9-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64*
1417 // CHECK9-NEXT: store i64 [[TMP81]], i64* [[TMP87]], align 8
1418 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
1419 // CHECK9-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
1420 // CHECK9-NEXT: store i64 [[TMP81]], i64* [[TMP89]], align 8
1421 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
1422 // CHECK9-NEXT: store i8* null, i8** [[TMP90]], align 8
1423 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
1424 // CHECK9-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i64*
1425 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP92]], align 8
1426 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
1427 // CHECK9-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i64*
1428 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP94]], align 8
1429 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
1430 // CHECK9-NEXT: store i8* null, i8** [[TMP95]], align 8
1431 // CHECK9-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
1432 // CHECK9-NEXT: [[TMP97:%.*]] = bitcast i8** [[TMP96]] to i32**
1433 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP97]], align 8
1434 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
1435 // CHECK9-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
1436 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 8
1437 // CHECK9-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 2
1438 // CHECK9-NEXT: store i64 [[TMP84]], i64* [[TMP100]], align 8
1439 // CHECK9-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 2
1440 // CHECK9-NEXT: store i8* null, i8** [[TMP101]], align 8
1441 // CHECK9-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
1442 // CHECK9-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i64*
1443 // CHECK9-NEXT: store i64 [[TMP83]], i64* [[TMP103]], align 8
1444 // CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
1445 // CHECK9-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
1446 // CHECK9-NEXT: store i64 [[TMP83]], i64* [[TMP105]], align 8
1447 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 3
1448 // CHECK9-NEXT: store i8* null, i8** [[TMP106]], align 8
1449 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
1450 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
1451 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 0
1452 // CHECK9-NEXT: [[TMP110:%.*]] = load i32, i32* [[N]], align 4
1453 // CHECK9-NEXT: store i32 [[TMP110]], i32* [[DOTCAPTURE_EXPR_28]], align 4
1454 // CHECK9-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
1455 // CHECK9-NEXT: [[SUB30:%.*]] = sub nsw i32 [[TMP111]], 0
1456 // CHECK9-NEXT: [[DIV31:%.*]] = sdiv i32 [[SUB30]], 1
1457 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i32 [[DIV31]], 1
1458 // CHECK9-NEXT: store i32 [[SUB32]], i32* [[DOTCAPTURE_EXPR_29]], align 4
1459 // CHECK9-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_29]], align 4
1460 // CHECK9-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP112]], 1
1461 // CHECK9-NEXT: [[TMP113:%.*]] = zext i32 [[ADD33]] to i64
1462 // CHECK9-NEXT: [[KERNEL_ARGS34:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1463 // CHECK9-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 0
1464 // CHECK9-NEXT: store i32 1, i32* [[TMP114]], align 4
1465 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 1
1466 // CHECK9-NEXT: store i32 4, i32* [[TMP115]], align 4
1467 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 2
1468 // CHECK9-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
1469 // CHECK9-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 3
1470 // CHECK9-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 8
1471 // CHECK9-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 4
1472 // CHECK9-NEXT: store i64* [[TMP109]], i64** [[TMP118]], align 8
1473 // CHECK9-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 5
1474 // CHECK9-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP119]], align 8
1475 // CHECK9-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 6
1476 // CHECK9-NEXT: store i8** null, i8*** [[TMP120]], align 8
1477 // CHECK9-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 7
1478 // CHECK9-NEXT: store i8** null, i8*** [[TMP121]], align 8
1479 // CHECK9-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 8
1480 // CHECK9-NEXT: store i64 [[TMP113]], i64* [[TMP122]], align 8
1481 // CHECK9-NEXT: [[TMP123:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]])
1482 // CHECK9-NEXT: [[TMP124:%.*]] = icmp ne i32 [[TMP123]], 0
1483 // CHECK9-NEXT: br i1 [[TMP124]], label [[OMP_OFFLOAD_FAILED35:%.*]], label [[OMP_OFFLOAD_CONT36:%.*]]
1484 // CHECK9: omp_offload.failed35:
1485 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP81]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP83]]) #[[ATTR4]]
1486 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT36]]
1487 // CHECK9: omp_offload.cont36:
1488 // CHECK9-NEXT: [[TMP125:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1489 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP125]])
1490 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1491 // CHECK9-NEXT: [[TMP126:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1492 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP126]])
1493 // CHECK9-NEXT: [[TMP127:%.*]] = load i32, i32* [[RETVAL]], align 4
1494 // CHECK9-NEXT: ret i32 [[TMP127]]
1495 //
1496 //
1497 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
1498 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1499 // CHECK9-NEXT: entry:
1500 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1501 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1502 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1503 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1504 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1505 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1506 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1507 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1508 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1509 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1510 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1511 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1512 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
1513 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1514 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
1515 // CHECK9-NEXT: ret void
1516 //
1517 //
1518 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1519 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
1520 // CHECK9-NEXT: entry:
1521 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1522 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1523 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1524 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1525 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1526 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1527 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1528 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1529 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1530 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1531 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1532 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1533 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1534 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1535 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1536 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1537 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1538 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1539 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1540 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1541 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1542 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1543 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1544 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1545 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1546 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1547 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1548 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1549 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1550 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1551 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1552 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1553 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1554 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1555 // CHECK9: omp.precond.then:
1556 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1557 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1558 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1559 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1560 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1561 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1562 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1563 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1564 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1565 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1566 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1567 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1568 // CHECK9: cond.true:
1569 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1570 // CHECK9-NEXT: br label [[COND_END:%.*]]
1571 // CHECK9: cond.false:
1572 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1573 // CHECK9-NEXT: br label [[COND_END]]
1574 // CHECK9: cond.end:
1575 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1576 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1577 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1578 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1579 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1580 // CHECK9: omp.inner.for.cond:
1581 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1582 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
1583 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1584 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1585 // CHECK9: omp.inner.for.body:
1586 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1587 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1588 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1589 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9
1590 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9
1591 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1592 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1593 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
1594 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1595 // CHECK9: omp.body.continue:
1596 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1597 // CHECK9: omp.inner.for.inc:
1598 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1599 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1600 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1601 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1602 // CHECK9: omp.inner.for.end:
1603 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1604 // CHECK9: omp.loop.exit:
1605 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1606 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1607 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1608 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1609 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1610 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1611 // CHECK9: .omp.final.then:
1612 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1613 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
1614 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1615 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1616 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1617 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
1618 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1619 // CHECK9: .omp.final.done:
1620 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1621 // CHECK9: omp.precond.end:
1622 // CHECK9-NEXT: ret void
1623 //
1624 //
1625 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
1626 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1627 // CHECK9-NEXT: entry:
1628 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1629 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1630 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1631 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1632 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1633 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1634 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1635 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1636 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1637 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1638 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1639 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1640 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
1641 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1642 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
1643 // CHECK9-NEXT: ret void
1644 //
1645 //
1646 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1647 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
1648 // CHECK9-NEXT: entry:
1649 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1650 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1651 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1652 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1653 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1654 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1655 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1656 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1657 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1658 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1659 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1660 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1661 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1662 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1663 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1664 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1665 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1666 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1667 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1668 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1669 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1670 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1671 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1672 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1673 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1674 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1675 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1676 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1677 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1678 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1679 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1680 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1681 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1682 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1683 // CHECK9: omp.precond.then:
1684 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1685 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1686 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1687 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1688 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1689 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1690 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1691 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1692 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1693 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1694 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1695 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1696 // CHECK9: cond.true:
1697 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1698 // CHECK9-NEXT: br label [[COND_END:%.*]]
1699 // CHECK9: cond.false:
1700 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1701 // CHECK9-NEXT: br label [[COND_END]]
1702 // CHECK9: cond.end:
1703 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1704 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1705 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1706 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1707 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1708 // CHECK9: omp.inner.for.cond:
1709 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
1710 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
1711 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1712 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1713 // CHECK9: omp.inner.for.body:
1714 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
1715 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1716 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1717 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15
1718 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15
1719 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1720 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1721 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
1722 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1723 // CHECK9: omp.body.continue:
1724 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1725 // CHECK9: omp.inner.for.inc:
1726 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
1727 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1728 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
1729 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1730 // CHECK9: omp.inner.for.end:
1731 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1732 // CHECK9: omp.loop.exit:
1733 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1734 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1735 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1736 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1737 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1738 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1739 // CHECK9: .omp.final.then:
1740 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1741 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
1742 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1743 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1744 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1745 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
1746 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1747 // CHECK9: .omp.final.done:
1748 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1749 // CHECK9: omp.precond.end:
1750 // CHECK9-NEXT: ret void
1751 //
1752 //
1753 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
1754 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1755 // CHECK9-NEXT: entry:
1756 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1757 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1758 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1759 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1760 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1761 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1762 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1763 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1764 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1765 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1766 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1767 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1768 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1769 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1770 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1771 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1772 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
1773 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1774 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
1775 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
1776 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
1777 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1778 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
1779 // CHECK9-NEXT: ret void
1780 //
1781 //
1782 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
1783 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
1784 // CHECK9-NEXT: entry:
1785 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1786 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1787 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1788 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1789 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1790 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1791 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1792 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1793 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1794 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1795 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1796 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1797 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1798 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1799 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1800 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
1801 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1802 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1803 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1804 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1805 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1806 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1807 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1808 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1809 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1810 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1811 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1812 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1813 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1814 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1815 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1816 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
1817 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1818 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1819 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1820 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1821 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1822 // CHECK9: omp.precond.then:
1823 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1824 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1825 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1826 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1827 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1828 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
1829 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1830 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1831 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
1832 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1833 // CHECK9: omp.dispatch.cond:
1834 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1835 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1836 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1837 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1838 // CHECK9: cond.true:
1839 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1840 // CHECK9-NEXT: br label [[COND_END:%.*]]
1841 // CHECK9: cond.false:
1842 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1843 // CHECK9-NEXT: br label [[COND_END]]
1844 // CHECK9: cond.end:
1845 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1846 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1847 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1848 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1849 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1850 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1851 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1852 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1853 // CHECK9: omp.dispatch.body:
1854 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1855 // CHECK9: omp.inner.for.cond:
1856 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1857 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
1858 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1859 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1860 // CHECK9: omp.inner.for.body:
1861 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1862 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1863 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1864 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !18
1865 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !18
1866 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
1867 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1868 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
1869 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1870 // CHECK9: omp.body.continue:
1871 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1872 // CHECK9: omp.inner.for.inc:
1873 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1874 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
1875 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1876 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
1877 // CHECK9: omp.inner.for.end:
1878 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1879 // CHECK9: omp.dispatch.inc:
1880 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1881 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1882 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1883 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4
1884 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1885 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1886 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
1887 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4
1888 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
1889 // CHECK9: omp.dispatch.end:
1890 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1891 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
1892 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
1893 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1894 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
1895 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1896 // CHECK9: .omp.final.then:
1897 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1898 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP29]], 0
1899 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
1900 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
1901 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
1902 // CHECK9-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4
1903 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1904 // CHECK9: .omp.final.done:
1905 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1906 // CHECK9: omp.precond.end:
1907 // CHECK9-NEXT: ret void
1908 //
1909 //
1910 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
1911 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
1912 // CHECK9-NEXT: entry:
1913 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1914 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
1915 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1916 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1917 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1918 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1919 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
1920 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
1921 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
1922 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1923 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x i8*], align 8
1924 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x i8*], align 8
1925 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x i8*], align 8
1926 // CHECK9-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
1927 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1928 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1929 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
1930 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
1931 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1932 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
1933 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
1934 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1935 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1936 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1937 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1938 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1939 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1940 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4
1941 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1942 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
1943 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1944 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
1945 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1946 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
1947 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1948 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP11]], align 8
1949 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1950 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP12]], align 8
1951 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1952 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
1953 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1954 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
1955 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1956 // CHECK9-NEXT: store i64 10, i64* [[TMP15]], align 8
1957 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1958 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1959 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1960 // CHECK9: omp_offload.failed:
1961 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]]
1962 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1963 // CHECK9: omp_offload.cont:
1964 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1965 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
1966 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
1967 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1968 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
1969 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
1970 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
1971 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
1972 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1973 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1974 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1975 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
1976 // CHECK9-NEXT: store i32 1, i32* [[TMP25]], align 4
1977 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
1978 // CHECK9-NEXT: store i32 1, i32* [[TMP26]], align 4
1979 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
1980 // CHECK9-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
1981 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
1982 // CHECK9-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
1983 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
1984 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP29]], align 8
1985 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
1986 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP30]], align 8
1987 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
1988 // CHECK9-NEXT: store i8** null, i8*** [[TMP31]], align 8
1989 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
1990 // CHECK9-NEXT: store i8** null, i8*** [[TMP32]], align 8
1991 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
1992 // CHECK9-NEXT: store i64 10, i64* [[TMP33]], align 8
1993 // CHECK9-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
1994 // CHECK9-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1995 // CHECK9-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1996 // CHECK9: omp_offload.failed6:
1997 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]]
1998 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]
1999 // CHECK9: omp_offload.cont7:
2000 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2001 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
2002 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
2003 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2004 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [10 x i32]**
2005 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP39]], align 8
2006 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
2007 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8
2008 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2009 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2010 // CHECK9-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2011 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
2012 // CHECK9-NEXT: store i32 1, i32* [[TMP43]], align 4
2013 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
2014 // CHECK9-NEXT: store i32 1, i32* [[TMP44]], align 4
2015 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
2016 // CHECK9-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
2017 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
2018 // CHECK9-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
2019 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
2020 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP47]], align 8
2021 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
2022 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP48]], align 8
2023 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
2024 // CHECK9-NEXT: store i8** null, i8*** [[TMP49]], align 8
2025 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
2026 // CHECK9-NEXT: store i8** null, i8*** [[TMP50]], align 8
2027 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
2028 // CHECK9-NEXT: store i64 10, i64* [[TMP51]], align 8
2029 // CHECK9-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
2030 // CHECK9-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
2031 // CHECK9-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
2032 // CHECK9: omp_offload.failed13:
2033 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]]
2034 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT14]]
2035 // CHECK9: omp_offload.cont14:
2036 // CHECK9-NEXT: ret i32 0
2037 //
2038 //
2039 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
2040 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2041 // CHECK9-NEXT: entry:
2042 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2043 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2044 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2045 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2046 // CHECK9-NEXT: ret void
2047 //
2048 //
2049 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
2050 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
2051 // CHECK9-NEXT: entry:
2052 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2053 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2054 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2055 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2056 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2057 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2058 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2059 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2060 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2061 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2062 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2063 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2064 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2065 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2066 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2067 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2068 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2069 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2070 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2071 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2072 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2073 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2074 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2075 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2076 // CHECK9: cond.true:
2077 // CHECK9-NEXT: br label [[COND_END:%.*]]
2078 // CHECK9: cond.false:
2079 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2080 // CHECK9-NEXT: br label [[COND_END]]
2081 // CHECK9: cond.end:
2082 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2083 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2084 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2085 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2086 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2087 // CHECK9: omp.inner.for.cond:
2088 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2089 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
2090 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2091 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2092 // CHECK9: omp.inner.for.body:
2093 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2094 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2095 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2096 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
2097 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
2098 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2099 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2100 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
2101 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2102 // CHECK9: omp.body.continue:
2103 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2104 // CHECK9: omp.inner.for.inc:
2105 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2106 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2107 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
2108 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
2109 // CHECK9: omp.inner.for.end:
2110 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2111 // CHECK9: omp.loop.exit:
2112 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2113 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2114 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2115 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2116 // CHECK9: .omp.final.then:
2117 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
2118 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2119 // CHECK9: .omp.final.done:
2120 // CHECK9-NEXT: ret void
2121 //
2122 //
2123 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
2124 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2125 // CHECK9-NEXT: entry:
2126 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2127 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2128 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2129 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2130 // CHECK9-NEXT: ret void
2131 //
2132 //
2133 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
2134 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
2135 // CHECK9-NEXT: entry:
2136 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2137 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2138 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2139 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2140 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2141 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2142 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2143 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2144 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2145 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2146 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2147 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2148 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2149 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2150 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2151 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2152 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2153 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2154 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2155 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2156 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2157 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2158 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2159 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2160 // CHECK9: cond.true:
2161 // CHECK9-NEXT: br label [[COND_END:%.*]]
2162 // CHECK9: cond.false:
2163 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2164 // CHECK9-NEXT: br label [[COND_END]]
2165 // CHECK9: cond.end:
2166 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2167 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2168 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2169 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2170 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2171 // CHECK9: omp.inner.for.cond:
2172 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2173 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
2174 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2175 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2176 // CHECK9: omp.inner.for.body:
2177 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2178 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2179 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2180 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
2181 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
2182 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2183 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2184 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
2185 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2186 // CHECK9: omp.body.continue:
2187 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2188 // CHECK9: omp.inner.for.inc:
2189 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2190 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2191 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
2192 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
2193 // CHECK9: omp.inner.for.end:
2194 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2195 // CHECK9: omp.loop.exit:
2196 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2197 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2198 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2199 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2200 // CHECK9: .omp.final.then:
2201 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
2202 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2203 // CHECK9: .omp.final.done:
2204 // CHECK9-NEXT: ret void
2205 //
2206 //
2207 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
2208 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2209 // CHECK9-NEXT: entry:
2210 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2211 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2212 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2213 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2214 // CHECK9-NEXT: ret void
2215 //
2216 //
2217 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
2218 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
2219 // CHECK9-NEXT: entry:
2220 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2221 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2222 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
2223 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2224 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2225 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2226 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2227 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2228 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2229 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2230 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2231 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2232 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
2233 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
2234 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2235 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2236 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2237 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2238 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2239 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2240 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
2241 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2242 // CHECK9: omp.dispatch.cond:
2243 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2244 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2245 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2246 // CHECK9: cond.true:
2247 // CHECK9-NEXT: br label [[COND_END:%.*]]
2248 // CHECK9: cond.false:
2249 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2250 // CHECK9-NEXT: br label [[COND_END]]
2251 // CHECK9: cond.end:
2252 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2253 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2254 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2255 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2256 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2257 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2258 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2259 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2260 // CHECK9: omp.dispatch.body:
2261 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2262 // CHECK9: omp.inner.for.cond:
2263 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2264 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
2265 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2266 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2267 // CHECK9: omp.inner.for.body:
2268 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2269 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2270 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2271 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
2272 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
2273 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2274 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2275 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
2276 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2277 // CHECK9: omp.body.continue:
2278 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2279 // CHECK9: omp.inner.for.inc:
2280 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2281 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2282 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
2283 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
2284 // CHECK9: omp.inner.for.end:
2285 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2286 // CHECK9: omp.dispatch.inc:
2287 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2288 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2289 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2290 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
2291 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2292 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2293 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2294 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
2295 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
2296 // CHECK9: omp.dispatch.end:
2297 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2298 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2299 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
2300 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2301 // CHECK9: .omp.final.then:
2302 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
2303 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2304 // CHECK9: .omp.final.done:
2305 // CHECK9-NEXT: ret void
2306 //
2307 //
2308 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2309 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] {
2310 // CHECK9-NEXT: entry:
2311 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
2312 // CHECK9-NEXT: ret void
2313 //
2314 //
2315 // CHECK11-LABEL: define {{[^@]+}}@main
2316 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2317 // CHECK11-NEXT: entry:
2318 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2319 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2320 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
2321 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
2322 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
2323 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2324 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2325 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
2326 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
2327 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
2328 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
2329 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2330 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2331 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2332 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
2333 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
2334 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
2335 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
2336 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
2337 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
2338 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
2339 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
2340 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
2341 // CHECK11-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4
2342 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2343 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x i8*], align 4
2344 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x i8*], align 4
2345 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x i8*], align 4
2346 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
2347 // CHECK11-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
2348 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
2349 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
2350 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2351 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2352 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
2353 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
2354 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2355 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
2356 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
2357 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
2358 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2359 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
2360 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2361 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2362 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
2363 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
2364 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
2365 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
2366 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2367 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2368 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
2369 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2370 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2371 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2372 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2373 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
2374 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2375 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
2376 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
2377 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2378 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
2379 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
2380 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2381 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
2382 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2383 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
2384 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
2385 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2386 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
2387 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
2388 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2389 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
2390 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2391 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
2392 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2393 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2394 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2395 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
2396 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
2397 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2398 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
2399 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2400 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2401 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2402 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2403 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
2404 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
2405 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2406 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2407 // CHECK11-NEXT: store i32 1, i32* [[TMP30]], align 4
2408 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2409 // CHECK11-NEXT: store i32 3, i32* [[TMP31]], align 4
2410 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2411 // CHECK11-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
2412 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2413 // CHECK11-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
2414 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2415 // CHECK11-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
2416 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2417 // CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
2418 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2419 // CHECK11-NEXT: store i8** null, i8*** [[TMP36]], align 4
2420 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2421 // CHECK11-NEXT: store i8** null, i8*** [[TMP37]], align 4
2422 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2423 // CHECK11-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
2424 // CHECK11-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2425 // CHECK11-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
2426 // CHECK11-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2427 // CHECK11: omp_offload.failed:
2428 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4:[0-9]+]]
2429 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2430 // CHECK11: omp_offload.cont:
2431 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
2432 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
2433 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
2434 // CHECK11-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
2435 // CHECK11-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
2436 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
2437 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false)
2438 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2439 // CHECK11-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
2440 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
2441 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2442 // CHECK11-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
2443 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
2444 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
2445 // CHECK11-NEXT: store i8* null, i8** [[TMP50]], align 4
2446 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
2447 // CHECK11-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
2448 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
2449 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
2450 // CHECK11-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
2451 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
2452 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
2453 // CHECK11-NEXT: store i8* null, i8** [[TMP55]], align 4
2454 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
2455 // CHECK11-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
2456 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
2457 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
2458 // CHECK11-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
2459 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
2460 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
2461 // CHECK11-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
2462 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
2463 // CHECK11-NEXT: store i8* null, i8** [[TMP61]], align 4
2464 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2465 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2466 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
2467 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
2468 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
2469 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
2470 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
2471 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2472 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
2473 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
2474 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
2475 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
2476 // CHECK11-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
2477 // CHECK11-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2478 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
2479 // CHECK11-NEXT: store i32 1, i32* [[TMP69]], align 4
2480 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
2481 // CHECK11-NEXT: store i32 3, i32* [[TMP70]], align 4
2482 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
2483 // CHECK11-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
2484 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
2485 // CHECK11-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
2486 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
2487 // CHECK11-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
2488 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
2489 // CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP74]], align 4
2490 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
2491 // CHECK11-NEXT: store i8** null, i8*** [[TMP75]], align 4
2492 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
2493 // CHECK11-NEXT: store i8** null, i8*** [[TMP76]], align 4
2494 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
2495 // CHECK11-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
2496 // CHECK11-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
2497 // CHECK11-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
2498 // CHECK11-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2499 // CHECK11: omp_offload.failed16:
2500 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4]]
2501 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2502 // CHECK11: omp_offload.cont17:
2503 // CHECK11-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
2504 // CHECK11-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_18]], align 4
2505 // CHECK11-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
2506 // CHECK11-NEXT: store i32 [[TMP81]], i32* [[N_CASTED19]], align 4
2507 // CHECK11-NEXT: [[TMP82:%.*]] = load i32, i32* [[N_CASTED19]], align 4
2508 // CHECK11-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
2509 // CHECK11-NEXT: store i32 [[TMP83]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2510 // CHECK11-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2511 // CHECK11-NEXT: [[TMP85:%.*]] = mul nuw i32 [[TMP0]], 4
2512 // CHECK11-NEXT: [[TMP86:%.*]] = sext i32 [[TMP85]] to i64
2513 // CHECK11-NEXT: [[TMP87:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES23]] to i8*
2514 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP87]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false)
2515 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2516 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
2517 // CHECK11-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
2518 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2519 // CHECK11-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
2520 // CHECK11-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
2521 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
2522 // CHECK11-NEXT: store i8* null, i8** [[TMP92]], align 4
2523 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
2524 // CHECK11-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32*
2525 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP94]], align 4
2526 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
2527 // CHECK11-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32*
2528 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP96]], align 4
2529 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
2530 // CHECK11-NEXT: store i8* null, i8** [[TMP97]], align 4
2531 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
2532 // CHECK11-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
2533 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 4
2534 // CHECK11-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
2535 // CHECK11-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
2536 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 4
2537 // CHECK11-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
2538 // CHECK11-NEXT: store i64 [[TMP86]], i64* [[TMP102]], align 4
2539 // CHECK11-NEXT: [[TMP103:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
2540 // CHECK11-NEXT: store i8* null, i8** [[TMP103]], align 4
2541 // CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
2542 // CHECK11-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32*
2543 // CHECK11-NEXT: store i32 [[TMP84]], i32* [[TMP105]], align 4
2544 // CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
2545 // CHECK11-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32*
2546 // CHECK11-NEXT: store i32 [[TMP84]], i32* [[TMP107]], align 4
2547 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
2548 // CHECK11-NEXT: store i8* null, i8** [[TMP108]], align 4
2549 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2550 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2551 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
2552 // CHECK11-NEXT: [[TMP112:%.*]] = load i32, i32* [[N]], align 4
2553 // CHECK11-NEXT: store i32 [[TMP112]], i32* [[DOTCAPTURE_EXPR_25]], align 4
2554 // CHECK11-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
2555 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP113]], 0
2556 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
2557 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
2558 // CHECK11-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
2559 // CHECK11-NEXT: [[TMP114:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
2560 // CHECK11-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP114]], 1
2561 // CHECK11-NEXT: [[TMP115:%.*]] = zext i32 [[ADD30]] to i64
2562 // CHECK11-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2563 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
2564 // CHECK11-NEXT: store i32 1, i32* [[TMP116]], align 4
2565 // CHECK11-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
2566 // CHECK11-NEXT: store i32 4, i32* [[TMP117]], align 4
2567 // CHECK11-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
2568 // CHECK11-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
2569 // CHECK11-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
2570 // CHECK11-NEXT: store i8** [[TMP110]], i8*** [[TMP119]], align 4
2571 // CHECK11-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
2572 // CHECK11-NEXT: store i64* [[TMP111]], i64** [[TMP120]], align 4
2573 // CHECK11-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
2574 // CHECK11-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP121]], align 4
2575 // CHECK11-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
2576 // CHECK11-NEXT: store i8** null, i8*** [[TMP122]], align 4
2577 // CHECK11-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
2578 // CHECK11-NEXT: store i8** null, i8*** [[TMP123]], align 4
2579 // CHECK11-NEXT: [[TMP124:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
2580 // CHECK11-NEXT: store i64 [[TMP115]], i64* [[TMP124]], align 8
2581 // CHECK11-NEXT: [[TMP125:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
2582 // CHECK11-NEXT: [[TMP126:%.*]] = icmp ne i32 [[TMP125]], 0
2583 // CHECK11-NEXT: br i1 [[TMP126]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2584 // CHECK11: omp_offload.failed32:
2585 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP82]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP84]]) #[[ATTR4]]
2586 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT33]]
2587 // CHECK11: omp_offload.cont33:
2588 // CHECK11-NEXT: [[TMP127:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2589 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP127]])
2590 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2591 // CHECK11-NEXT: [[TMP128:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
2592 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP128]])
2593 // CHECK11-NEXT: [[TMP129:%.*]] = load i32, i32* [[RETVAL]], align 4
2594 // CHECK11-NEXT: ret i32 [[TMP129]]
2595 //
2596 //
2597 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
2598 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2599 // CHECK11-NEXT: entry:
2600 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2601 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2602 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2603 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2604 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2605 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2606 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2607 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2608 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2609 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2610 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2611 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2612 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
2613 // CHECK11-NEXT: ret void
2614 //
2615 //
2616 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2617 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
2618 // CHECK11-NEXT: entry:
2619 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2620 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2621 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2622 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2623 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2624 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2625 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2626 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2627 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2628 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2629 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2630 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2631 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2632 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2633 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2634 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2635 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2636 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2637 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2638 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2639 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2640 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2641 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2642 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2643 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2644 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2645 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2646 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2647 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2648 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2649 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2650 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2651 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2652 // CHECK11: omp.precond.then:
2653 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2654 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2655 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2656 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2657 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2658 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2659 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2660 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2661 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2662 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2663 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2664 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2665 // CHECK11: cond.true:
2666 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2667 // CHECK11-NEXT: br label [[COND_END:%.*]]
2668 // CHECK11: cond.false:
2669 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2670 // CHECK11-NEXT: br label [[COND_END]]
2671 // CHECK11: cond.end:
2672 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2673 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2674 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2675 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2676 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2677 // CHECK11: omp.inner.for.cond:
2678 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2679 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
2680 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2681 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2682 // CHECK11: omp.inner.for.body:
2683 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2684 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2685 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2686 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10
2687 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10
2688 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
2689 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
2690 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2691 // CHECK11: omp.body.continue:
2692 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2693 // CHECK11: omp.inner.for.inc:
2694 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2695 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2696 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2697 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2698 // CHECK11: omp.inner.for.end:
2699 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2700 // CHECK11: omp.loop.exit:
2701 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2702 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2703 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2704 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2705 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2706 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2707 // CHECK11: .omp.final.then:
2708 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2709 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
2710 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2711 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2712 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2713 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2714 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2715 // CHECK11: .omp.final.done:
2716 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2717 // CHECK11: omp.precond.end:
2718 // CHECK11-NEXT: ret void
2719 //
2720 //
2721 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
2722 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2723 // CHECK11-NEXT: entry:
2724 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2725 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2726 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2727 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2728 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2729 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2730 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2731 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2732 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2733 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2734 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2735 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2736 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
2737 // CHECK11-NEXT: ret void
2738 //
2739 //
2740 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2741 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
2742 // CHECK11-NEXT: entry:
2743 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2744 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2745 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2746 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2747 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2748 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2749 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2750 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2751 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2752 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2753 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2754 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2755 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2756 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2757 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2758 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2759 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2760 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2761 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2762 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2763 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2764 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2765 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2766 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2767 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2768 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2769 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2770 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2771 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2772 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2773 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2774 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2775 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2776 // CHECK11: omp.precond.then:
2777 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2778 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2779 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2780 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2781 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2782 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2783 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2784 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2785 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2786 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2787 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2788 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2789 // CHECK11: cond.true:
2790 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2791 // CHECK11-NEXT: br label [[COND_END:%.*]]
2792 // CHECK11: cond.false:
2793 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2794 // CHECK11-NEXT: br label [[COND_END]]
2795 // CHECK11: cond.end:
2796 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2797 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2798 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2799 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2800 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2801 // CHECK11: omp.inner.for.cond:
2802 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2803 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
2804 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2805 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2806 // CHECK11: omp.inner.for.body:
2807 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2808 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2809 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2810 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
2811 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
2812 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
2813 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
2814 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2815 // CHECK11: omp.body.continue:
2816 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2817 // CHECK11: omp.inner.for.inc:
2818 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2819 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2820 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2821 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
2822 // CHECK11: omp.inner.for.end:
2823 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2824 // CHECK11: omp.loop.exit:
2825 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2826 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2827 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2828 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2829 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2830 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2831 // CHECK11: .omp.final.then:
2832 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2833 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0
2834 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2835 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2836 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2837 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
2838 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2839 // CHECK11: .omp.final.done:
2840 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2841 // CHECK11: omp.precond.end:
2842 // CHECK11-NEXT: ret void
2843 //
2844 //
2845 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
2846 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2847 // CHECK11-NEXT: entry:
2848 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2849 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2850 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2851 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2852 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2853 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2854 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2855 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2856 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2857 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2858 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2859 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2860 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2861 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2862 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2863 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2864 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2865 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2866 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
2867 // CHECK11-NEXT: ret void
2868 //
2869 //
2870 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
2871 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
2872 // CHECK11-NEXT: entry:
2873 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2874 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2875 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2876 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2877 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2878 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2879 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2880 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2881 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2882 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2883 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2884 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2885 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2886 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2887 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2888 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
2889 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2890 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2891 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2892 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2893 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2894 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2895 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2896 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2897 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2898 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2899 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2900 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2901 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2902 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2903 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2904 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2905 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2906 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2907 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2908 // CHECK11: omp.precond.then:
2909 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2910 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2911 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2912 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2913 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2914 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2915 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2916 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2917 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
2918 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2919 // CHECK11: omp.dispatch.cond:
2920 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2921 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2922 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2923 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2924 // CHECK11: cond.true:
2925 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2926 // CHECK11-NEXT: br label [[COND_END:%.*]]
2927 // CHECK11: cond.false:
2928 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2929 // CHECK11-NEXT: br label [[COND_END]]
2930 // CHECK11: cond.end:
2931 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2932 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2933 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2934 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2935 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2936 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2937 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2938 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2939 // CHECK11: omp.dispatch.body:
2940 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2941 // CHECK11: omp.inner.for.cond:
2942 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
2943 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
2944 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2945 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2946 // CHECK11: omp.inner.for.body:
2947 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
2948 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2949 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2950 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
2951 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
2952 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
2953 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
2954 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2955 // CHECK11: omp.body.continue:
2956 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2957 // CHECK11: omp.inner.for.inc:
2958 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
2959 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
2960 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
2961 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
2962 // CHECK11: omp.inner.for.end:
2963 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2964 // CHECK11: omp.dispatch.inc:
2965 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2966 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2967 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2968 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
2969 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2970 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2971 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
2972 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
2973 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
2974 // CHECK11: omp.dispatch.end:
2975 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2976 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
2977 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
2978 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2979 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
2980 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2981 // CHECK11: .omp.final.then:
2982 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2983 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0
2984 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2985 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
2986 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2987 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4
2988 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2989 // CHECK11: .omp.final.done:
2990 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2991 // CHECK11: omp.precond.end:
2992 // CHECK11-NEXT: ret void
2993 //
2994 //
2995 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
2996 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
2997 // CHECK11-NEXT: entry:
2998 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2999 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
3000 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3001 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3002 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3003 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3004 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
3005 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
3006 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
3007 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
3008 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x i8*], align 4
3009 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x i8*], align 4
3010 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x i8*], align 4
3011 // CHECK11-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
3012 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3013 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3014 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
3015 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
3016 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3017 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
3018 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
3019 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3020 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
3021 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3022 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3023 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3024 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3025 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4
3026 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3027 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
3028 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3029 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
3030 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3031 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
3032 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3033 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP11]], align 4
3034 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3035 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP12]], align 4
3036 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3037 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4
3038 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3039 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
3040 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3041 // CHECK11-NEXT: store i64 10, i64* [[TMP15]], align 8
3042 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3043 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3044 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3045 // CHECK11: omp_offload.failed:
3046 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]]
3047 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
3048 // CHECK11: omp_offload.cont:
3049 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3050 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
3051 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
3052 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3053 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
3054 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
3055 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
3056 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
3057 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3058 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3059 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3060 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
3061 // CHECK11-NEXT: store i32 1, i32* [[TMP25]], align 4
3062 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
3063 // CHECK11-NEXT: store i32 1, i32* [[TMP26]], align 4
3064 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
3065 // CHECK11-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
3066 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
3067 // CHECK11-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
3068 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
3069 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP29]], align 4
3070 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
3071 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP30]], align 4
3072 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
3073 // CHECK11-NEXT: store i8** null, i8*** [[TMP31]], align 4
3074 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
3075 // CHECK11-NEXT: store i8** null, i8*** [[TMP32]], align 4
3076 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
3077 // CHECK11-NEXT: store i64 10, i64* [[TMP33]], align 8
3078 // CHECK11-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
3079 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3080 // CHECK11-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3081 // CHECK11: omp_offload.failed6:
3082 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]]
3083 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]]
3084 // CHECK11: omp_offload.cont7:
3085 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
3086 // CHECK11-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
3087 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
3088 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
3089 // CHECK11-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [10 x i32]**
3090 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP39]], align 4
3091 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
3092 // CHECK11-NEXT: store i8* null, i8** [[TMP40]], align 4
3093 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
3094 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
3095 // CHECK11-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3096 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
3097 // CHECK11-NEXT: store i32 1, i32* [[TMP43]], align 4
3098 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
3099 // CHECK11-NEXT: store i32 1, i32* [[TMP44]], align 4
3100 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
3101 // CHECK11-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
3102 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
3103 // CHECK11-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
3104 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
3105 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP47]], align 4
3106 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
3107 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP48]], align 4
3108 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
3109 // CHECK11-NEXT: store i8** null, i8*** [[TMP49]], align 4
3110 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
3111 // CHECK11-NEXT: store i8** null, i8*** [[TMP50]], align 4
3112 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
3113 // CHECK11-NEXT: store i64 10, i64* [[TMP51]], align 8
3114 // CHECK11-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
3115 // CHECK11-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
3116 // CHECK11-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
3117 // CHECK11: omp_offload.failed13:
3118 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]]
3119 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT14]]
3120 // CHECK11: omp_offload.cont14:
3121 // CHECK11-NEXT: ret i32 0
3122 //
3123 //
3124 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
3125 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3126 // CHECK11-NEXT: entry:
3127 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
3128 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
3129 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
3130 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3131 // CHECK11-NEXT: ret void
3132 //
3133 //
3134 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
3135 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
3136 // CHECK11-NEXT: entry:
3137 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3138 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3139 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
3140 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3141 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3142 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3143 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3144 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3145 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3146 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3147 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3148 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3149 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
3150 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
3151 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3152 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3153 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3154 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3155 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3156 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3157 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3158 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3159 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3160 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3161 // CHECK11: cond.true:
3162 // CHECK11-NEXT: br label [[COND_END:%.*]]
3163 // CHECK11: cond.false:
3164 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3165 // CHECK11-NEXT: br label [[COND_END]]
3166 // CHECK11: cond.end:
3167 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3168 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3169 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3170 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3171 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3172 // CHECK11: omp.inner.for.cond:
3173 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3174 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
3175 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3176 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3177 // CHECK11: omp.inner.for.body:
3178 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3179 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3180 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3181 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
3182 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
3183 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
3184 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
3185 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3186 // CHECK11: omp.body.continue:
3187 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3188 // CHECK11: omp.inner.for.inc:
3189 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3190 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3191 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
3192 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
3193 // CHECK11: omp.inner.for.end:
3194 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3195 // CHECK11: omp.loop.exit:
3196 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3197 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3198 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3199 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3200 // CHECK11: .omp.final.then:
3201 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
3202 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
3203 // CHECK11: .omp.final.done:
3204 // CHECK11-NEXT: ret void
3205 //
3206 //
3207 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
3208 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3209 // CHECK11-NEXT: entry:
3210 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
3211 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
3212 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
3213 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3214 // CHECK11-NEXT: ret void
3215 //
3216 //
3217 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
3218 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
3219 // CHECK11-NEXT: entry:
3220 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3221 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3222 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
3223 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3224 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3225 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3226 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3227 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3228 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3229 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3230 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3231 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3232 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
3233 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
3234 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3235 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3236 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3237 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3238 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3239 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3240 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3241 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3242 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3243 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3244 // CHECK11: cond.true:
3245 // CHECK11-NEXT: br label [[COND_END:%.*]]
3246 // CHECK11: cond.false:
3247 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3248 // CHECK11-NEXT: br label [[COND_END]]
3249 // CHECK11: cond.end:
3250 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3251 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3252 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3253 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3254 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3255 // CHECK11: omp.inner.for.cond:
3256 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
3257 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
3258 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3259 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3260 // CHECK11: omp.inner.for.body:
3261 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
3262 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3263 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3264 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
3265 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
3266 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
3267 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
3268 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3269 // CHECK11: omp.body.continue:
3270 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3271 // CHECK11: omp.inner.for.inc:
3272 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
3273 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3274 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
3275 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
3276 // CHECK11: omp.inner.for.end:
3277 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3278 // CHECK11: omp.loop.exit:
3279 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3280 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3281 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3282 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3283 // CHECK11: .omp.final.then:
3284 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
3285 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
3286 // CHECK11: .omp.final.done:
3287 // CHECK11-NEXT: ret void
3288 //
3289 //
3290 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
3291 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3292 // CHECK11-NEXT: entry:
3293 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
3294 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
3295 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
3296 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
3297 // CHECK11-NEXT: ret void
3298 //
3299 //
3300 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13
3301 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
3302 // CHECK11-NEXT: entry:
3303 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3304 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3305 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
3306 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3307 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3308 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3309 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3310 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3311 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3312 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3313 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3314 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3315 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
3316 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
3317 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3318 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3319 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3320 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3321 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3322 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3323 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
3324 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3325 // CHECK11: omp.dispatch.cond:
3326 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3327 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3328 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3329 // CHECK11: cond.true:
3330 // CHECK11-NEXT: br label [[COND_END:%.*]]
3331 // CHECK11: cond.false:
3332 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3333 // CHECK11-NEXT: br label [[COND_END]]
3334 // CHECK11: cond.end:
3335 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3336 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3337 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3338 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3339 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3340 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3341 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3342 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3343 // CHECK11: omp.dispatch.body:
3344 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3345 // CHECK11: omp.inner.for.cond:
3346 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3347 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28
3348 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3349 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3350 // CHECK11: omp.inner.for.body:
3351 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3352 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3353 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3354 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28
3355 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28
3356 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
3357 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28
3358 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3359 // CHECK11: omp.body.continue:
3360 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3361 // CHECK11: omp.inner.for.inc:
3362 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3363 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3364 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
3365 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
3366 // CHECK11: omp.inner.for.end:
3367 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3368 // CHECK11: omp.dispatch.inc:
3369 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3370 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3371 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3372 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3373 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3374 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3375 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3376 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3377 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
3378 // CHECK11: omp.dispatch.end:
3379 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3380 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3381 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
3382 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3383 // CHECK11: .omp.final.then:
3384 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
3385 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
3386 // CHECK11: .omp.final.done:
3387 // CHECK11-NEXT: ret void
3388 //
3389 //
3390 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3391 // CHECK11-SAME: () #[[ATTR7:[0-9]+]] {
3392 // CHECK11-NEXT: entry:
3393 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
3394 // CHECK11-NEXT: ret void
3395 //
3396 //
3397 // CHECK13-LABEL: define {{[^@]+}}@main
3398 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3399 // CHECK13-NEXT: entry:
3400 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3401 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3402 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
3403 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
3404 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
3405 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3406 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
3407 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3408 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3409 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3410 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3411 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
3412 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3413 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
3414 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
3415 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
3416 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
3417 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
3418 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
3419 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4
3420 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
3421 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4
3422 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
3423 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
3424 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
3425 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
3426 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4
3427 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4
3428 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4
3429 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
3430 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4
3431 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
3432 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3433 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
3434 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
3435 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3436 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
3437 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3438 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
3439 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
3440 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
3441 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
3442 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3443 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3444 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3445 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3446 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3447 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3448 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3449 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3450 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
3451 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
3452 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3453 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3454 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3455 // CHECK13: simd.if.then:
3456 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3457 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3458 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3459 // CHECK13: omp.inner.for.cond:
3460 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3461 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
3462 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3463 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3464 // CHECK13: omp.inner.for.body:
3465 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3466 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3467 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3468 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
3469 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
3470 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3471 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
3472 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
3473 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3474 // CHECK13: omp.body.continue:
3475 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3476 // CHECK13: omp.inner.for.inc:
3477 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3478 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
3479 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3480 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3481 // CHECK13: omp.inner.for.end:
3482 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3483 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
3484 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3485 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3486 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3487 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
3488 // CHECK13-NEXT: br label [[SIMD_IF_END]]
3489 // CHECK13: simd.if.end:
3490 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4
3491 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
3492 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
3493 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0
3494 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
3495 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
3496 // CHECK13-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
3497 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
3498 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
3499 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4
3500 // CHECK13-NEXT: store i32 0, i32* [[I18]], align 4
3501 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
3502 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]
3503 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]
3504 // CHECK13: simd.if.then20:
3505 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
3506 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4
3507 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
3508 // CHECK13: omp.inner.for.cond23:
3509 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
3510 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6
3511 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
3512 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
3513 // CHECK13: omp.inner.for.body25:
3514 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
3515 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1
3516 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
3517 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6
3518 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6
3519 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64
3520 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]]
3521 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6
3522 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
3523 // CHECK13: omp.body.continue30:
3524 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
3525 // CHECK13: omp.inner.for.inc31:
3526 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
3527 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1
3528 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
3529 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
3530 // CHECK13: omp.inner.for.end33:
3531 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
3532 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0
3533 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1
3534 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1
3535 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]
3536 // CHECK13-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4
3537 // CHECK13-NEXT: br label [[SIMD_IF_END38]]
3538 // CHECK13: simd.if.end38:
3539 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
3540 // CHECK13-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4
3541 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
3542 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4
3543 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
3544 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0
3545 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
3546 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
3547 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
3548 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4
3549 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
3550 // CHECK13-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4
3551 // CHECK13-NEXT: store i32 0, i32* [[I48]], align 4
3552 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
3553 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]
3554 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]
3555 // CHECK13: simd.if.then50:
3556 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4
3557 // CHECK13-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4
3558 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
3559 // CHECK13: omp.inner.for.cond53:
3560 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
3561 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9
3562 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]
3563 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]
3564 // CHECK13: omp.inner.for.body55:
3565 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
3566 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1
3567 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
3568 // CHECK13-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9
3569 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9
3570 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64
3571 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]]
3572 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9
3573 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]]
3574 // CHECK13: omp.body.continue60:
3575 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]]
3576 // CHECK13: omp.inner.for.inc61:
3577 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
3578 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1
3579 // CHECK13-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
3580 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]
3581 // CHECK13: omp.inner.for.end63:
3582 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
3583 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0
3584 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1
3585 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1
3586 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]
3587 // CHECK13-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4
3588 // CHECK13-NEXT: br label [[SIMD_IF_END68]]
3589 // CHECK13: simd.if.end68:
3590 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
3591 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]])
3592 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3593 // CHECK13-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
3594 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP38]])
3595 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
3596 // CHECK13-NEXT: ret i32 [[TMP39]]
3597 //
3598 //
3599 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3600 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
3601 // CHECK13-NEXT: entry:
3602 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3603 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
3604 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
3605 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3606 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3607 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3608 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
3609 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3610 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3611 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3612 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3613 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
3614 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
3615 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
3616 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
3617 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
3618 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4
3619 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3620 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3621 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3622 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3623 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3624 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3625 // CHECK13: omp.inner.for.cond:
3626 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3627 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
3628 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3629 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3630 // CHECK13: omp.inner.for.body:
3631 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3632 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3633 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3634 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
3635 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
3636 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
3637 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3638 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
3639 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3640 // CHECK13: omp.body.continue:
3641 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3642 // CHECK13: omp.inner.for.inc:
3643 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3644 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
3645 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
3646 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3647 // CHECK13: omp.inner.for.end:
3648 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
3649 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3650 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
3651 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3652 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
3653 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3654 // CHECK13: omp.inner.for.cond7:
3655 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
3656 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15
3657 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3658 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
3659 // CHECK13: omp.inner.for.body9:
3660 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
3661 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
3662 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3663 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15
3664 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15
3665 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64
3666 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]]
3667 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15
3668 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
3669 // CHECK13: omp.body.continue14:
3670 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
3671 // CHECK13: omp.inner.for.inc15:
3672 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
3673 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1
3674 // CHECK13-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15
3675 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]]
3676 // CHECK13: omp.inner.for.end17:
3677 // CHECK13-NEXT: store i32 10, i32* [[I6]], align 4
3678 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
3679 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4
3680 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
3681 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4
3682 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
3683 // CHECK13: omp.inner.for.cond23:
3684 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
3685 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18
3686 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3687 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
3688 // CHECK13: omp.inner.for.body25:
3689 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
3690 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1
3691 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
3692 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18
3693 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18
3694 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64
3695 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]]
3696 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18
3697 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
3698 // CHECK13: omp.body.continue30:
3699 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
3700 // CHECK13: omp.inner.for.inc31:
3701 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
3702 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1
3703 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18
3704 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]]
3705 // CHECK13: omp.inner.for.end33:
3706 // CHECK13-NEXT: store i32 10, i32* [[I22]], align 4
3707 // CHECK13-NEXT: ret i32 0
3708 //
3709 //
3710 // CHECK15-LABEL: define {{[^@]+}}@main
3711 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3712 // CHECK15-NEXT: entry:
3713 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3714 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3715 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
3716 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
3717 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
3718 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3719 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
3720 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3721 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3722 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3723 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3724 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
3725 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3726 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
3727 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
3728 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
3729 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
3730 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
3731 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
3732 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4
3733 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
3734 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4
3735 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
3736 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
3737 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
3738 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
3739 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4
3740 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4
3741 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4
3742 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4
3743 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4
3744 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
3745 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3746 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
3747 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
3748 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3749 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
3750 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
3751 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
3752 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
3753 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
3754 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
3755 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3756 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3757 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3758 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3759 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3760 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3761 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3762 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3763 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
3764 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3765 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3766 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3767 // CHECK15: simd.if.then:
3768 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3769 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3770 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3771 // CHECK15: omp.inner.for.cond:
3772 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3773 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
3774 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3775 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3776 // CHECK15: omp.inner.for.body:
3777 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3778 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3779 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3780 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
3781 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
3782 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
3783 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
3784 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3785 // CHECK15: omp.body.continue:
3786 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3787 // CHECK15: omp.inner.for.inc:
3788 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3789 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
3790 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3791 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3792 // CHECK15: omp.inner.for.end:
3793 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3794 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
3795 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3796 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3797 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3798 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
3799 // CHECK15-NEXT: br label [[SIMD_IF_END]]
3800 // CHECK15: simd.if.end:
3801 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4
3802 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4
3803 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
3804 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0
3805 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
3806 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
3807 // CHECK15-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
3808 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
3809 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
3810 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4
3811 // CHECK15-NEXT: store i32 0, i32* [[I18]], align 4
3812 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
3813 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]
3814 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]
3815 // CHECK15: simd.if.then20:
3816 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
3817 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4
3818 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
3819 // CHECK15: omp.inner.for.cond23:
3820 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
3821 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7
3822 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
3823 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]
3824 // CHECK15: omp.inner.for.body25:
3825 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
3826 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1
3827 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
3828 // CHECK15-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7
3829 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7
3830 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
3831 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7
3832 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]]
3833 // CHECK15: omp.body.continue29:
3834 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]]
3835 // CHECK15: omp.inner.for.inc30:
3836 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
3837 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1
3838 // CHECK15-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
3839 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]
3840 // CHECK15: omp.inner.for.end32:
3841 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
3842 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0
3843 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1
3844 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1
3845 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]
3846 // CHECK15-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4
3847 // CHECK15-NEXT: br label [[SIMD_IF_END37]]
3848 // CHECK15: simd.if.end37:
3849 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4
3850 // CHECK15-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4
3851 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
3852 // CHECK15-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4
3853 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
3854 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0
3855 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
3856 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
3857 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
3858 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4
3859 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
3860 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4
3861 // CHECK15-NEXT: store i32 0, i32* [[I47]], align 4
3862 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
3863 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]
3864 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]
3865 // CHECK15: simd.if.then49:
3866 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4
3867 // CHECK15-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4
3868 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]]
3869 // CHECK15: omp.inner.for.cond52:
3870 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
3871 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10
3872 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]
3873 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]
3874 // CHECK15: omp.inner.for.body54:
3875 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
3876 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1
3877 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]
3878 // CHECK15-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10
3879 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10
3880 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]]
3881 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10
3882 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]]
3883 // CHECK15: omp.body.continue58:
3884 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]]
3885 // CHECK15: omp.inner.for.inc59:
3886 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
3887 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1
3888 // CHECK15-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
3889 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]
3890 // CHECK15: omp.inner.for.end61:
3891 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
3892 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0
3893 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
3894 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1
3895 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]
3896 // CHECK15-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4
3897 // CHECK15-NEXT: br label [[SIMD_IF_END66]]
3898 // CHECK15: simd.if.end66:
3899 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
3900 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]])
3901 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3902 // CHECK15-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3903 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP37]])
3904 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4
3905 // CHECK15-NEXT: ret i32 [[TMP38]]
3906 //
3907 //
3908 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3909 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
3910 // CHECK15-NEXT: entry:
3911 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3912 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
3913 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
3914 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3915 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3916 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3917 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
3918 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3919 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3920 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3921 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3922 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
3923 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4
3924 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
3925 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
3926 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4
3927 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4
3928 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3929 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3930 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3931 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3932 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3933 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3934 // CHECK15: omp.inner.for.cond:
3935 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3936 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
3937 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3938 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3939 // CHECK15: omp.inner.for.body:
3940 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3941 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3942 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3943 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
3944 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
3945 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
3946 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
3947 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3948 // CHECK15: omp.body.continue:
3949 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3950 // CHECK15: omp.inner.for.inc:
3951 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3952 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
3953 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3954 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3955 // CHECK15: omp.inner.for.end:
3956 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
3957 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3958 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
3959 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3960 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
3961 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3962 // CHECK15: omp.inner.for.cond7:
3963 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
3964 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16
3965 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3966 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
3967 // CHECK15: omp.inner.for.body9:
3968 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
3969 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
3970 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3971 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16
3972 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16
3973 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]]
3974 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16
3975 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
3976 // CHECK15: omp.body.continue13:
3977 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
3978 // CHECK15: omp.inner.for.inc14:
3979 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
3980 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1
3981 // CHECK15-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16
3982 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
3983 // CHECK15: omp.inner.for.end16:
3984 // CHECK15-NEXT: store i32 10, i32* [[I6]], align 4
3985 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
3986 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4
3987 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
3988 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4
3989 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
3990 // CHECK15: omp.inner.for.cond22:
3991 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
3992 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19
3993 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3994 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]
3995 // CHECK15: omp.inner.for.body24:
3996 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
3997 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
3998 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
3999 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19
4000 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19
4001 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]]
4002 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19
4003 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]]
4004 // CHECK15: omp.body.continue28:
4005 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]]
4006 // CHECK15: omp.inner.for.inc29:
4007 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
4008 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1
4009 // CHECK15-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19
4010 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]
4011 // CHECK15: omp.inner.for.end31:
4012 // CHECK15-NEXT: store i32 10, i32* [[I21]], align 4
4013 // CHECK15-NEXT: ret i32 0
4014 //
4015