1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target teams distribute simd 29 for(int i = 0; i < X; i++) { 30 a[i] = (T)0; 31 } 32 #pragma omp target teams distribute simd dist_schedule(static) 33 for(int i = 0; i < X; i++) { 34 a[i] = (T)0; 35 } 36 #pragma omp target teams distribute simd dist_schedule(static, X/2) 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 41 42 43 44 45 46 return a[0]; 47 } 48 }; 49 50 int teams_template_struct(void) { 51 SS<int, 123, 456> V; 52 return V.foo(); 53 54 } 55 #endif // CK1 56 57 // Test host codegen. 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 64 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 71 #ifdef CK2 72 73 template <typename T, int n> 74 int tmain(T argc) { 75 T a[n]; 76 #pragma omp target teams distribute simd 77 for(int i = 0; i < n; i++) { 78 a[i] = (T)0; 79 } 80 #pragma omp target teams distribute simd dist_schedule(static) 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target teams distribute simd dist_schedule(static, n) 85 for(int i = 0; i < n; i++) { 86 a[i] = (T)0; 87 } 88 return 0; 89 } 90 91 int main (int argc, char **argv) { 92 int n = 100; 93 int a[n]; 94 #pragma omp target teams distribute simd 95 for(int i = 0; i < n; i++) { 96 a[i] = 0; 97 } 98 #pragma omp target teams distribute simd dist_schedule(static) 99 for(int i = 0; i < n; i++) { 100 a[i] = 0; 101 } 102 #pragma omp target teams distribute simd dist_schedule(static, n) 103 for(int i = 0; i < n; i++) { 104 a[i] = 0; 105 } 106 return tmain<int, 10>(argc); 107 } 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 #endif // CK2 124 #endif // #ifndef HEADER 125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 127 // CHECK1-NEXT: entry: 128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 130 // CHECK1-NEXT: ret i32 [[CALL]] 131 // 132 // 133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 134 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 135 // CHECK1-NEXT: entry: 136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 162 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 163 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 164 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 165 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 166 // CHECK1: omp_offload.failed: 167 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]] 168 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 169 // CHECK1: omp_offload.cont: 170 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 172 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 173 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 174 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 175 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 176 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 177 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 178 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 179 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 181 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 182 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 183 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 184 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 185 // CHECK1: omp_offload.failed7: 186 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]] 187 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 188 // CHECK1: omp_offload.cont8: 189 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 190 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 191 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 192 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 193 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 194 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 195 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 196 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 197 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 198 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 200 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 201 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 202 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 203 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 204 // CHECK1: omp_offload.failed14: 205 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]] 206 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 207 // CHECK1: omp_offload.cont15: 208 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 209 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 210 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 211 // CHECK1-NEXT: ret i32 [[TMP27]] 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 215 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 218 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 219 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 220 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 221 // CHECK1-NEXT: ret void 222 // 223 // 224 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 225 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 226 // CHECK1-NEXT: entry: 227 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 228 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 230 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 232 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 238 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 239 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 240 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 242 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 243 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 244 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 245 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 246 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 247 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 248 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 249 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 250 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 251 // CHECK1: cond.true: 252 // CHECK1-NEXT: br label [[COND_END:%.*]] 253 // CHECK1: cond.false: 254 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 255 // CHECK1-NEXT: br label [[COND_END]] 256 // CHECK1: cond.end: 257 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 258 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 259 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 261 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 262 // CHECK1: omp.inner.for.cond: 263 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 264 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 265 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 266 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 267 // CHECK1: omp.inner.for.body: 268 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 269 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 270 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 271 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 272 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 273 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 274 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 275 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 276 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 277 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 278 // CHECK1: omp.body.continue: 279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 280 // CHECK1: omp.inner.for.inc: 281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 282 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 283 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 284 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 285 // CHECK1: omp.inner.for.end: 286 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 287 // CHECK1: omp.loop.exit: 288 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 289 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 290 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 291 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 292 // CHECK1: .omp.final.then: 293 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 294 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 295 // CHECK1: .omp.final.done: 296 // CHECK1-NEXT: ret void 297 // 298 // 299 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 300 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 301 // CHECK1-NEXT: entry: 302 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 303 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 304 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 305 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 306 // CHECK1-NEXT: ret void 307 // 308 // 309 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 310 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 311 // CHECK1-NEXT: entry: 312 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 313 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 314 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 315 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 316 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 317 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 318 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 319 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 320 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 321 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 322 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 323 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 324 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 325 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 326 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 327 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 328 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 329 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 330 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 331 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 332 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 333 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 334 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 335 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 336 // CHECK1: cond.true: 337 // CHECK1-NEXT: br label [[COND_END:%.*]] 338 // CHECK1: cond.false: 339 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 340 // CHECK1-NEXT: br label [[COND_END]] 341 // CHECK1: cond.end: 342 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 343 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 344 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 345 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 346 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 347 // CHECK1: omp.inner.for.cond: 348 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 349 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 350 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 351 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 352 // CHECK1: omp.inner.for.body: 353 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 354 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 355 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 356 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 357 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 358 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 359 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 360 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 361 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 362 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 363 // CHECK1: omp.body.continue: 364 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 365 // CHECK1: omp.inner.for.inc: 366 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 367 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 368 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 369 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 370 // CHECK1: omp.inner.for.end: 371 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 372 // CHECK1: omp.loop.exit: 373 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 374 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 375 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 376 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 377 // CHECK1: .omp.final.then: 378 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 379 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 380 // CHECK1: .omp.final.done: 381 // CHECK1-NEXT: ret void 382 // 383 // 384 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 385 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 386 // CHECK1-NEXT: entry: 387 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 388 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 389 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 390 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 391 // CHECK1-NEXT: ret void 392 // 393 // 394 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 395 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 396 // CHECK1-NEXT: entry: 397 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 398 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 399 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 400 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 401 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 402 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 403 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 404 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 405 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 406 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 407 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 408 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 409 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 410 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 411 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 412 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 413 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 414 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 415 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 416 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 417 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 418 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 419 // CHECK1: omp.dispatch.cond: 420 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 421 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 422 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 423 // CHECK1: cond.true: 424 // CHECK1-NEXT: br label [[COND_END:%.*]] 425 // CHECK1: cond.false: 426 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 427 // CHECK1-NEXT: br label [[COND_END]] 428 // CHECK1: cond.end: 429 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 430 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 431 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 432 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 433 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 434 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 435 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 436 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 437 // CHECK1: omp.dispatch.body: 438 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 439 // CHECK1: omp.inner.for.cond: 440 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 441 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 442 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 443 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 444 // CHECK1: omp.inner.for.body: 445 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 446 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 447 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 448 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 449 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 450 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 451 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 452 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 453 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 454 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 455 // CHECK1: omp.body.continue: 456 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 457 // CHECK1: omp.inner.for.inc: 458 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 459 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 460 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 461 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 462 // CHECK1: omp.inner.for.end: 463 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 464 // CHECK1: omp.dispatch.inc: 465 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 466 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 467 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 468 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 469 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 470 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 471 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 472 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 473 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 474 // CHECK1: omp.dispatch.end: 475 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 476 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 477 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 478 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 479 // CHECK1: .omp.final.then: 480 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4 481 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] 482 // CHECK1: .omp.final.done: 483 // CHECK1-NEXT: ret void 484 // 485 // 486 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 487 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] { 488 // CHECK1-NEXT: entry: 489 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 490 // CHECK1-NEXT: ret void 491 // 492 // 493 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv 494 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 495 // CHECK2-NEXT: entry: 496 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 497 // CHECK2-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 498 // CHECK2-NEXT: ret i32 [[CALL]] 499 // 500 // 501 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 502 // CHECK2-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 503 // CHECK2-NEXT: entry: 504 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 505 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 506 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 507 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 508 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 509 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 510 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 511 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 512 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 513 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 514 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 515 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 516 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 517 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 518 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 519 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 520 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 521 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 522 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 523 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 524 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 525 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 526 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 527 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 528 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 529 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 530 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 531 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 532 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 533 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 534 // CHECK2: omp_offload.failed: 535 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]] 536 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 537 // CHECK2: omp_offload.cont: 538 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 539 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 540 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 541 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 542 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 543 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 544 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 545 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 546 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 547 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 548 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 549 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 550 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 551 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 552 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 553 // CHECK2: omp_offload.failed7: 554 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]] 555 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]] 556 // CHECK2: omp_offload.cont8: 557 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 558 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 559 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 560 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 561 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 562 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 563 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 564 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 565 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8 566 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 567 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 568 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 569 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 570 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 571 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 572 // CHECK2: omp_offload.failed14: 573 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]] 574 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]] 575 // CHECK2: omp_offload.cont15: 576 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 577 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 578 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 579 // CHECK2-NEXT: ret i32 [[TMP27]] 580 // 581 // 582 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 583 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 584 // CHECK2-NEXT: entry: 585 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 586 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 587 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 588 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 589 // CHECK2-NEXT: ret void 590 // 591 // 592 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 593 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 594 // CHECK2-NEXT: entry: 595 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 596 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 597 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 598 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 599 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 600 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 601 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 602 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 603 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 604 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 605 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 606 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 607 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 608 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 609 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 610 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 611 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 612 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 613 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 614 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 615 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 616 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 617 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 618 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 619 // CHECK2: cond.true: 620 // CHECK2-NEXT: br label [[COND_END:%.*]] 621 // CHECK2: cond.false: 622 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 623 // CHECK2-NEXT: br label [[COND_END]] 624 // CHECK2: cond.end: 625 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 626 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 627 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 628 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 629 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 630 // CHECK2: omp.inner.for.cond: 631 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 632 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6 633 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 634 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 635 // CHECK2: omp.inner.for.body: 636 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 637 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 638 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 639 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6 640 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 641 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6 642 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 643 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 644 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !6 645 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 646 // CHECK2: omp.body.continue: 647 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 648 // CHECK2: omp.inner.for.inc: 649 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 650 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 651 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6 652 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]] 653 // CHECK2: omp.inner.for.end: 654 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 655 // CHECK2: omp.loop.exit: 656 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 657 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 658 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 659 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 660 // CHECK2: .omp.final.then: 661 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 662 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 663 // CHECK2: .omp.final.done: 664 // CHECK2-NEXT: ret void 665 // 666 // 667 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 668 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 669 // CHECK2-NEXT: entry: 670 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 671 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 672 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 673 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 674 // CHECK2-NEXT: ret void 675 // 676 // 677 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 678 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 679 // CHECK2-NEXT: entry: 680 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 681 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 682 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 683 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 684 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 685 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 686 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 687 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 688 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 689 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 690 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 691 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 692 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 693 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 694 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 695 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 696 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 697 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 698 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 699 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 700 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 701 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 702 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 703 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 704 // CHECK2: cond.true: 705 // CHECK2-NEXT: br label [[COND_END:%.*]] 706 // CHECK2: cond.false: 707 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 708 // CHECK2-NEXT: br label [[COND_END]] 709 // CHECK2: cond.end: 710 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 711 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 712 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 713 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 714 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 715 // CHECK2: omp.inner.for.cond: 716 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 717 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 718 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 719 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 720 // CHECK2: omp.inner.for.body: 721 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 722 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 723 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 724 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 725 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 726 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 727 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 728 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 729 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 730 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 731 // CHECK2: omp.body.continue: 732 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 733 // CHECK2: omp.inner.for.inc: 734 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 735 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 736 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 737 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 738 // CHECK2: omp.inner.for.end: 739 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 740 // CHECK2: omp.loop.exit: 741 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 742 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 743 // CHECK2-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 744 // CHECK2-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 745 // CHECK2: .omp.final.then: 746 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 747 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 748 // CHECK2: .omp.final.done: 749 // CHECK2-NEXT: ret void 750 // 751 // 752 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 753 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 754 // CHECK2-NEXT: entry: 755 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 756 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 757 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 758 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 759 // CHECK2-NEXT: ret void 760 // 761 // 762 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 763 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 764 // CHECK2-NEXT: entry: 765 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 766 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 767 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 768 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 769 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 770 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 771 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 772 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 773 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 774 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 775 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 776 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 777 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 778 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 779 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 780 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 781 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 782 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 783 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 784 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 785 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 786 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 787 // CHECK2: omp.dispatch.cond: 788 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 789 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 790 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 791 // CHECK2: cond.true: 792 // CHECK2-NEXT: br label [[COND_END:%.*]] 793 // CHECK2: cond.false: 794 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 795 // CHECK2-NEXT: br label [[COND_END]] 796 // CHECK2: cond.end: 797 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 798 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 799 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 800 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 801 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 802 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 803 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 804 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 805 // CHECK2: omp.dispatch.body: 806 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 807 // CHECK2: omp.inner.for.cond: 808 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 809 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 810 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 811 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 812 // CHECK2: omp.inner.for.body: 813 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 814 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 815 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 816 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 817 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 818 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 819 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 820 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 821 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 822 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 823 // CHECK2: omp.body.continue: 824 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 825 // CHECK2: omp.inner.for.inc: 826 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 827 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 828 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 829 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 830 // CHECK2: omp.inner.for.end: 831 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 832 // CHECK2: omp.dispatch.inc: 833 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 834 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 835 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 836 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 837 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 838 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 839 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 840 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 841 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 842 // CHECK2: omp.dispatch.end: 843 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 844 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 845 // CHECK2-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 846 // CHECK2-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 847 // CHECK2: .omp.final.then: 848 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4 849 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] 850 // CHECK2: .omp.final.done: 851 // CHECK2-NEXT: ret void 852 // 853 // 854 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 855 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] { 856 // CHECK2-NEXT: entry: 857 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 858 // CHECK2-NEXT: ret void 859 // 860 // 861 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 862 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 863 // CHECK3-NEXT: entry: 864 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 865 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 866 // CHECK3-NEXT: ret i32 [[CALL]] 867 // 868 // 869 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 870 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 871 // CHECK3-NEXT: entry: 872 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 873 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 874 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 875 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 876 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 877 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 878 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 879 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 880 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 881 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 882 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 883 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 884 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 885 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 886 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 887 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 888 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 889 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 890 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 891 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 892 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 893 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 894 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 895 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 896 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 897 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 898 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 899 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 900 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 901 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 902 // CHECK3: omp_offload.failed: 903 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]] 904 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 905 // CHECK3: omp_offload.cont: 906 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 907 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 908 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 909 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 910 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 911 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 912 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 913 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 914 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 915 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 916 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 917 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 918 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 919 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 920 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 921 // CHECK3: omp_offload.failed7: 922 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]] 923 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 924 // CHECK3: omp_offload.cont8: 925 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 926 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 927 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 928 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 929 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 930 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 931 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 932 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 933 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 934 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 935 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 936 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 937 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 938 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 939 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 940 // CHECK3: omp_offload.failed14: 941 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]] 942 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 943 // CHECK3: omp_offload.cont15: 944 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 945 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 946 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 947 // CHECK3-NEXT: ret i32 [[TMP27]] 948 // 949 // 950 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 951 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 952 // CHECK3-NEXT: entry: 953 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 954 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 955 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 956 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 957 // CHECK3-NEXT: ret void 958 // 959 // 960 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 961 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 962 // CHECK3-NEXT: entry: 963 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 964 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 965 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 966 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 967 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 968 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 969 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 970 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 971 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 972 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 973 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 974 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 975 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 976 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 977 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 978 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 979 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 980 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 981 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 982 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 983 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 984 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 985 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 986 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 987 // CHECK3: cond.true: 988 // CHECK3-NEXT: br label [[COND_END:%.*]] 989 // CHECK3: cond.false: 990 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 991 // CHECK3-NEXT: br label [[COND_END]] 992 // CHECK3: cond.end: 993 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 994 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 995 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 996 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 997 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 998 // CHECK3: omp.inner.for.cond: 999 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1000 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 1001 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1002 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1003 // CHECK3: omp.inner.for.body: 1004 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1005 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1006 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1007 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 1008 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1009 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 1010 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1011 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 1012 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1013 // CHECK3: omp.body.continue: 1014 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1015 // CHECK3: omp.inner.for.inc: 1016 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1017 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1018 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1019 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 1020 // CHECK3: omp.inner.for.end: 1021 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1022 // CHECK3: omp.loop.exit: 1023 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1024 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1025 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1026 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1027 // CHECK3: .omp.final.then: 1028 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 1029 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1030 // CHECK3: .omp.final.done: 1031 // CHECK3-NEXT: ret void 1032 // 1033 // 1034 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 1035 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1036 // CHECK3-NEXT: entry: 1037 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1038 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1039 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1040 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1041 // CHECK3-NEXT: ret void 1042 // 1043 // 1044 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1045 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 1046 // CHECK3-NEXT: entry: 1047 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1048 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1049 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1050 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1051 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1052 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1053 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1054 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1055 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1056 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1057 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1058 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1059 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1060 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1061 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1062 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1063 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1064 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1065 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1066 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1067 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1068 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1069 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1070 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1071 // CHECK3: cond.true: 1072 // CHECK3-NEXT: br label [[COND_END:%.*]] 1073 // CHECK3: cond.false: 1074 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1075 // CHECK3-NEXT: br label [[COND_END]] 1076 // CHECK3: cond.end: 1077 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1078 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1079 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1080 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1081 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1082 // CHECK3: omp.inner.for.cond: 1083 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1084 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 1085 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1086 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1087 // CHECK3: omp.inner.for.body: 1088 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1089 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1090 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1091 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 1092 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1093 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 1094 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1095 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 1096 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1097 // CHECK3: omp.body.continue: 1098 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1099 // CHECK3: omp.inner.for.inc: 1100 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1101 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1102 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1103 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 1104 // CHECK3: omp.inner.for.end: 1105 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1106 // CHECK3: omp.loop.exit: 1107 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1108 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1109 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1110 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1111 // CHECK3: .omp.final.then: 1112 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 1113 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1114 // CHECK3: .omp.final.done: 1115 // CHECK3-NEXT: ret void 1116 // 1117 // 1118 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 1119 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1120 // CHECK3-NEXT: entry: 1121 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1122 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1123 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1124 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1125 // CHECK3-NEXT: ret void 1126 // 1127 // 1128 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1129 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 1130 // CHECK3-NEXT: entry: 1131 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1132 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1133 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1134 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1135 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1136 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1137 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1138 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1139 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1140 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1141 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1142 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1143 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1144 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1145 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1146 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1147 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1148 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1149 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1150 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1151 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1152 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1153 // CHECK3: omp.dispatch.cond: 1154 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1155 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1156 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1157 // CHECK3: cond.true: 1158 // CHECK3-NEXT: br label [[COND_END:%.*]] 1159 // CHECK3: cond.false: 1160 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1161 // CHECK3-NEXT: br label [[COND_END]] 1162 // CHECK3: cond.end: 1163 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1164 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1165 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1166 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1167 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1168 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1169 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1170 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1171 // CHECK3: omp.dispatch.body: 1172 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1173 // CHECK3: omp.inner.for.cond: 1174 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1175 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 1176 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1177 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1178 // CHECK3: omp.inner.for.body: 1179 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1180 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1181 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1182 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 1183 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1184 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 1185 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1186 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 1187 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1188 // CHECK3: omp.body.continue: 1189 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1190 // CHECK3: omp.inner.for.inc: 1191 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1192 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1193 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1194 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 1195 // CHECK3: omp.inner.for.end: 1196 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1197 // CHECK3: omp.dispatch.inc: 1198 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1199 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1200 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1201 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1202 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1203 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1204 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1205 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1206 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 1207 // CHECK3: omp.dispatch.end: 1208 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1209 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1210 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1211 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1212 // CHECK3: .omp.final.then: 1213 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4 1214 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]] 1215 // CHECK3: .omp.final.done: 1216 // CHECK3-NEXT: ret void 1217 // 1218 // 1219 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1220 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] { 1221 // CHECK3-NEXT: entry: 1222 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1223 // CHECK3-NEXT: ret void 1224 // 1225 // 1226 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1227 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1228 // CHECK4-NEXT: entry: 1229 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1230 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1231 // CHECK4-NEXT: ret i32 [[CALL]] 1232 // 1233 // 1234 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1235 // CHECK4-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1236 // CHECK4-NEXT: entry: 1237 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1238 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1239 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1240 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1241 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1242 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 1243 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 1244 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 1245 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1246 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 1247 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 1248 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 1249 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 1250 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1251 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1252 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1253 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1254 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 1255 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 1256 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1257 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 1258 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 1259 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1260 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 1261 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1262 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1263 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 1264 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1265 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1266 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1267 // CHECK4: omp_offload.failed: 1268 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR3:[0-9]+]] 1269 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1270 // CHECK4: omp_offload.cont: 1271 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1272 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1273 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 1274 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 1275 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1276 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 1277 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 1278 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 1279 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 1280 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1281 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1282 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 1283 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1284 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1285 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1286 // CHECK4: omp_offload.failed7: 1287 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR3]] 1288 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1289 // CHECK4: omp_offload.cont8: 1290 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1291 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1292 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 1293 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 1294 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1295 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 1296 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 1297 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 1298 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4 1299 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1300 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1301 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 1302 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 1303 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1304 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 1305 // CHECK4: omp_offload.failed14: 1306 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR3]] 1307 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]] 1308 // CHECK4: omp_offload.cont15: 1309 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1310 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 1311 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1312 // CHECK4-NEXT: ret i32 [[TMP27]] 1313 // 1314 // 1315 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 1316 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1317 // CHECK4-NEXT: entry: 1318 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1319 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1320 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1321 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1322 // CHECK4-NEXT: ret void 1323 // 1324 // 1325 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1326 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] { 1327 // CHECK4-NEXT: entry: 1328 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1329 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1330 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1331 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1332 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1333 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1334 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1335 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1336 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1337 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1338 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1339 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1340 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1341 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1342 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1343 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1344 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1345 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1346 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1347 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1348 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1349 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1350 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1351 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1352 // CHECK4: cond.true: 1353 // CHECK4-NEXT: br label [[COND_END:%.*]] 1354 // CHECK4: cond.false: 1355 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1356 // CHECK4-NEXT: br label [[COND_END]] 1357 // CHECK4: cond.end: 1358 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1359 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1360 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1361 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1362 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1363 // CHECK4: omp.inner.for.cond: 1364 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1365 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7 1366 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1367 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1368 // CHECK4: omp.inner.for.body: 1369 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1370 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1371 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1372 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7 1373 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1374 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7 1375 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1376 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !7 1377 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1378 // CHECK4: omp.body.continue: 1379 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1380 // CHECK4: omp.inner.for.inc: 1381 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1382 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1383 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7 1384 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]] 1385 // CHECK4: omp.inner.for.end: 1386 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1387 // CHECK4: omp.loop.exit: 1388 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1389 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1390 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1391 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1392 // CHECK4: .omp.final.then: 1393 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 1394 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 1395 // CHECK4: .omp.final.done: 1396 // CHECK4-NEXT: ret void 1397 // 1398 // 1399 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 1400 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1401 // CHECK4-NEXT: entry: 1402 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1403 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1404 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1405 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1406 // CHECK4-NEXT: ret void 1407 // 1408 // 1409 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1410 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 1411 // CHECK4-NEXT: entry: 1412 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1413 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1414 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1415 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1416 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1417 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1418 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1419 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1420 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1421 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1422 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1423 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1424 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1425 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1426 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1427 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1428 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1429 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1430 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1431 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1432 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1433 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1434 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1435 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1436 // CHECK4: cond.true: 1437 // CHECK4-NEXT: br label [[COND_END:%.*]] 1438 // CHECK4: cond.false: 1439 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1440 // CHECK4-NEXT: br label [[COND_END]] 1441 // CHECK4: cond.end: 1442 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1443 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1444 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1445 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1446 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1447 // CHECK4: omp.inner.for.cond: 1448 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1449 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 1450 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1451 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1452 // CHECK4: omp.inner.for.body: 1453 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1454 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1455 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1456 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 1457 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1458 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 1459 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1460 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 1461 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1462 // CHECK4: omp.body.continue: 1463 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1464 // CHECK4: omp.inner.for.inc: 1465 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1466 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1467 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1468 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 1469 // CHECK4: omp.inner.for.end: 1470 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1471 // CHECK4: omp.loop.exit: 1472 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1473 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1474 // CHECK4-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 1475 // CHECK4-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1476 // CHECK4: .omp.final.then: 1477 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 1478 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 1479 // CHECK4: .omp.final.done: 1480 // CHECK4-NEXT: ret void 1481 // 1482 // 1483 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 1484 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1485 // CHECK4-NEXT: entry: 1486 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1487 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1488 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1489 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1490 // CHECK4-NEXT: ret void 1491 // 1492 // 1493 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4 1494 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR2]] { 1495 // CHECK4-NEXT: entry: 1496 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1497 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1498 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1499 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1500 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1501 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1502 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1503 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1504 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1505 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1506 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1507 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1508 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1509 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1510 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1511 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1512 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1513 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1514 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1515 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1516 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1517 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1518 // CHECK4: omp.dispatch.cond: 1519 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1520 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1521 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1522 // CHECK4: cond.true: 1523 // CHECK4-NEXT: br label [[COND_END:%.*]] 1524 // CHECK4: cond.false: 1525 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1526 // CHECK4-NEXT: br label [[COND_END]] 1527 // CHECK4: cond.end: 1528 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1529 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1530 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1531 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1532 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1533 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1534 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1535 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1536 // CHECK4: omp.dispatch.body: 1537 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1538 // CHECK4: omp.inner.for.cond: 1539 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1540 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 1541 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1542 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1543 // CHECK4: omp.inner.for.body: 1544 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1545 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1546 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1547 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !16 1548 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1549 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !16 1550 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1551 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 1552 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1553 // CHECK4: omp.body.continue: 1554 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1555 // CHECK4: omp.inner.for.inc: 1556 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1557 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1558 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 1559 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 1560 // CHECK4: omp.inner.for.end: 1561 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1562 // CHECK4: omp.dispatch.inc: 1563 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1564 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1565 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1566 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1567 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1568 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1569 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1570 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1571 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 1572 // CHECK4: omp.dispatch.end: 1573 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1574 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 1575 // CHECK4-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 1576 // CHECK4-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 1577 // CHECK4: .omp.final.then: 1578 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4 1579 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]] 1580 // CHECK4: .omp.final.done: 1581 // CHECK4-NEXT: ret void 1582 // 1583 // 1584 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1585 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] { 1586 // CHECK4-NEXT: entry: 1587 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1588 // CHECK4-NEXT: ret void 1589 // 1590 // 1591 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1592 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1593 // CHECK5-NEXT: entry: 1594 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1595 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1596 // CHECK5-NEXT: ret i32 [[CALL]] 1597 // 1598 // 1599 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1600 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1601 // CHECK5-NEXT: entry: 1602 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1603 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1604 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1605 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1606 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1607 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1608 // CHECK5-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1609 // CHECK5-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1610 // CHECK5-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1611 // CHECK5-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1612 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4 1613 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 1614 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 1615 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 1616 // CHECK5-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1617 // CHECK5-NEXT: [[I24:%.*]] = alloca i32, align 4 1618 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1619 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1620 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1621 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1622 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1623 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1624 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1625 // CHECK5: omp.inner.for.cond: 1626 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1627 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 1628 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1629 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1630 // CHECK5: omp.inner.for.body: 1631 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1632 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1633 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1634 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 1635 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1636 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 1637 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 1638 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1639 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 1640 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1641 // CHECK5: omp.body.continue: 1642 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1643 // CHECK5: omp.inner.for.inc: 1644 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1645 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1646 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1647 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1648 // CHECK5: omp.inner.for.end: 1649 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4 1650 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 1651 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 1652 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 1653 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 1654 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1655 // CHECK5: omp.inner.for.cond8: 1656 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1657 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6 1658 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1659 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 1660 // CHECK5: omp.inner.for.body10: 1661 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1662 // CHECK5-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1663 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1664 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6 1665 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1666 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6 1667 // CHECK5-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 1668 // CHECK5-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]] 1669 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6 1670 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 1671 // CHECK5: omp.body.continue16: 1672 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 1673 // CHECK5: omp.inner.for.inc17: 1674 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1675 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 1676 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1677 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 1678 // CHECK5: omp.inner.for.end19: 1679 // CHECK5-NEXT: store i32 123, i32* [[I7]], align 4 1680 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4 1681 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4 1682 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4 1683 // CHECK5-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4 1684 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 1685 // CHECK5: omp.inner.for.cond25: 1686 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1687 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9 1688 // CHECK5-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1689 // CHECK5-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1690 // CHECK5: omp.inner.for.body27: 1691 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1692 // CHECK5-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 1693 // CHECK5-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 1694 // CHECK5-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9 1695 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1696 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9 1697 // CHECK5-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 1698 // CHECK5-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]] 1699 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9 1700 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1701 // CHECK5: omp.body.continue33: 1702 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1703 // CHECK5: omp.inner.for.inc34: 1704 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1705 // CHECK5-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 1706 // CHECK5-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1707 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 1708 // CHECK5: omp.inner.for.end36: 1709 // CHECK5-NEXT: store i32 123, i32* [[I24]], align 4 1710 // CHECK5-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1711 // CHECK5-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0 1712 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4 1713 // CHECK5-NEXT: ret i32 [[TMP18]] 1714 // 1715 // 1716 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1717 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1718 // CHECK6-NEXT: entry: 1719 // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1720 // CHECK6-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1721 // CHECK6-NEXT: ret i32 [[CALL]] 1722 // 1723 // 1724 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1725 // CHECK6-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1726 // CHECK6-NEXT: entry: 1727 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1728 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 1729 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1730 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1731 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1732 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1733 // CHECK6-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1734 // CHECK6-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1735 // CHECK6-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1736 // CHECK6-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1737 // CHECK6-NEXT: [[I7:%.*]] = alloca i32, align 4 1738 // CHECK6-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 1739 // CHECK6-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4 1740 // CHECK6-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4 1741 // CHECK6-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4 1742 // CHECK6-NEXT: [[I24:%.*]] = alloca i32, align 4 1743 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1744 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1745 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1746 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1747 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1748 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1749 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1750 // CHECK6: omp.inner.for.cond: 1751 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1752 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 1753 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1754 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1755 // CHECK6: omp.inner.for.body: 1756 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1757 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1758 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1759 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2 1760 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1761 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2 1762 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 1763 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1764 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 1765 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1766 // CHECK6: omp.body.continue: 1767 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1768 // CHECK6: omp.inner.for.inc: 1769 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1770 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1771 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 1772 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 1773 // CHECK6: omp.inner.for.end: 1774 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4 1775 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 1776 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 1777 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 1778 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 1779 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1780 // CHECK6: omp.inner.for.cond8: 1781 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1782 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6 1783 // CHECK6-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1784 // CHECK6-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 1785 // CHECK6: omp.inner.for.body10: 1786 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1787 // CHECK6-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1788 // CHECK6-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1789 // CHECK6-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6 1790 // CHECK6-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1791 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6 1792 // CHECK6-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64 1793 // CHECK6-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]] 1794 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6 1795 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 1796 // CHECK6: omp.body.continue16: 1797 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 1798 // CHECK6: omp.inner.for.inc17: 1799 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1800 // CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 1801 // CHECK6-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6 1802 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]] 1803 // CHECK6: omp.inner.for.end19: 1804 // CHECK6-NEXT: store i32 123, i32* [[I7]], align 4 1805 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4 1806 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4 1807 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4 1808 // CHECK6-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4 1809 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]] 1810 // CHECK6: omp.inner.for.cond25: 1811 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1812 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9 1813 // CHECK6-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1814 // CHECK6-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]] 1815 // CHECK6: omp.inner.for.body27: 1816 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1817 // CHECK6-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1 1818 // CHECK6-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]] 1819 // CHECK6-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9 1820 // CHECK6-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1821 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9 1822 // CHECK6-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64 1823 // CHECK6-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]] 1824 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9 1825 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]] 1826 // CHECK6: omp.body.continue33: 1827 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]] 1828 // CHECK6: omp.inner.for.inc34: 1829 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1830 // CHECK6-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1 1831 // CHECK6-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9 1832 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]] 1833 // CHECK6: omp.inner.for.end36: 1834 // CHECK6-NEXT: store i32 123, i32* [[I24]], align 4 1835 // CHECK6-NEXT: [[A37:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1836 // CHECK6-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A37]], i64 0, i64 0 1837 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX38]], align 4 1838 // CHECK6-NEXT: ret i32 [[TMP18]] 1839 // 1840 // 1841 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1842 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1843 // CHECK7-NEXT: entry: 1844 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1845 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1846 // CHECK7-NEXT: ret i32 [[CALL]] 1847 // 1848 // 1849 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1850 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1851 // CHECK7-NEXT: entry: 1852 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1853 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 1854 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1855 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1856 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1857 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 1858 // CHECK7-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1859 // CHECK7-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1860 // CHECK7-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1861 // CHECK7-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1862 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4 1863 // CHECK7-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 1864 // CHECK7-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 1865 // CHECK7-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 1866 // CHECK7-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 1867 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4 1868 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1869 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1870 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1871 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1872 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1873 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1874 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1875 // CHECK7: omp.inner.for.cond: 1876 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1877 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 1878 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 1879 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1880 // CHECK7: omp.inner.for.body: 1881 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1882 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 1883 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1884 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 1885 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1886 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 1887 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]] 1888 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 1889 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1890 // CHECK7: omp.body.continue: 1891 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1892 // CHECK7: omp.inner.for.inc: 1893 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1894 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 1895 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1896 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 1897 // CHECK7: omp.inner.for.end: 1898 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4 1899 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 1900 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 1901 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 1902 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 1903 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 1904 // CHECK7: omp.inner.for.cond8: 1905 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1906 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7 1907 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1908 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 1909 // CHECK7: omp.inner.for.body10: 1910 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1911 // CHECK7-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 1912 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 1913 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7 1914 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1915 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7 1916 // CHECK7-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]] 1917 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7 1918 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 1919 // CHECK7: omp.body.continue15: 1920 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 1921 // CHECK7: omp.inner.for.inc16: 1922 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1923 // CHECK7-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 1924 // CHECK7-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 1925 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 1926 // CHECK7: omp.inner.for.end18: 1927 // CHECK7-NEXT: store i32 123, i32* [[I7]], align 4 1928 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4 1929 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4 1930 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4 1931 // CHECK7-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4 1932 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 1933 // CHECK7: omp.inner.for.cond24: 1934 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1935 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10 1936 // CHECK7-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1937 // CHECK7-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 1938 // CHECK7: omp.inner.for.body26: 1939 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1940 // CHECK7-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 1941 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 1942 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10 1943 // CHECK7-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1944 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10 1945 // CHECK7-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]] 1946 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10 1947 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 1948 // CHECK7: omp.body.continue31: 1949 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 1950 // CHECK7: omp.inner.for.inc32: 1951 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1952 // CHECK7-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 1953 // CHECK7-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 1954 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 1955 // CHECK7: omp.inner.for.end34: 1956 // CHECK7-NEXT: store i32 123, i32* [[I23]], align 4 1957 // CHECK7-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1958 // CHECK7-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0 1959 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4 1960 // CHECK7-NEXT: ret i32 [[TMP18]] 1961 // 1962 // 1963 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1964 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 1965 // CHECK8-NEXT: entry: 1966 // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1967 // CHECK8-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1968 // CHECK8-NEXT: ret i32 [[CALL]] 1969 // 1970 // 1971 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1972 // CHECK8-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1973 // CHECK8-NEXT: entry: 1974 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1975 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 1976 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1977 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1978 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1979 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 1980 // CHECK8-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1981 // CHECK8-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4 1982 // CHECK8-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4 1983 // CHECK8-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4 1984 // CHECK8-NEXT: [[I7:%.*]] = alloca i32, align 4 1985 // CHECK8-NEXT: [[_TMP19:%.*]] = alloca i32, align 4 1986 // CHECK8-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4 1987 // CHECK8-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4 1988 // CHECK8-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4 1989 // CHECK8-NEXT: [[I23:%.*]] = alloca i32, align 4 1990 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1991 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1992 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1993 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1994 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1995 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 1996 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1997 // CHECK8: omp.inner.for.cond: 1998 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 1999 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 2000 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 2001 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2002 // CHECK8: omp.inner.for.body: 2003 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 2004 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 2005 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2006 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3 2007 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2008 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3 2009 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]] 2010 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 2011 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2012 // CHECK8: omp.body.continue: 2013 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2014 // CHECK8: omp.inner.for.inc: 2015 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 2016 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 2017 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 2018 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2019 // CHECK8: omp.inner.for.end: 2020 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4 2021 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4 2022 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4 2023 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4 2024 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4 2025 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]] 2026 // CHECK8: omp.inner.for.cond8: 2027 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 2028 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7 2029 // CHECK8-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2030 // CHECK8-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]] 2031 // CHECK8: omp.inner.for.body10: 2032 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 2033 // CHECK8-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1 2034 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]] 2035 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7 2036 // CHECK8-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2037 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7 2038 // CHECK8-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]] 2039 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7 2040 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]] 2041 // CHECK8: omp.body.continue15: 2042 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]] 2043 // CHECK8: omp.inner.for.inc16: 2044 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 2045 // CHECK8-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1 2046 // CHECK8-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7 2047 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]] 2048 // CHECK8: omp.inner.for.end18: 2049 // CHECK8-NEXT: store i32 123, i32* [[I7]], align 4 2050 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4 2051 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4 2052 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4 2053 // CHECK8-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4 2054 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]] 2055 // CHECK8: omp.inner.for.cond24: 2056 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 2057 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10 2058 // CHECK8-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2059 // CHECK8-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]] 2060 // CHECK8: omp.inner.for.body26: 2061 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 2062 // CHECK8-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1 2063 // CHECK8-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]] 2064 // CHECK8-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10 2065 // CHECK8-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2066 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10 2067 // CHECK8-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]] 2068 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10 2069 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]] 2070 // CHECK8: omp.body.continue31: 2071 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]] 2072 // CHECK8: omp.inner.for.inc32: 2073 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 2074 // CHECK8-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1 2075 // CHECK8-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10 2076 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]] 2077 // CHECK8: omp.inner.for.end34: 2078 // CHECK8-NEXT: store i32 123, i32* [[I23]], align 4 2079 // CHECK8-NEXT: [[A35:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2080 // CHECK8-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A35]], i32 0, i32 0 2081 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX36]], align 4 2082 // CHECK8-NEXT: ret i32 [[TMP18]] 2083 // 2084 // 2085 // CHECK9-LABEL: define {{[^@]+}}@main 2086 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2087 // CHECK9-NEXT: entry: 2088 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2089 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2090 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 2091 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 2092 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2093 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2094 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2095 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2096 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2097 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2098 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 2099 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2100 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2101 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2102 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 2103 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 2104 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 2105 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 2106 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 2107 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 2108 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 2109 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 2110 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 2111 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 2112 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2113 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8 2114 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8 2115 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8 2116 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8 2117 // CHECK9-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 2118 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 2119 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4 2120 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2121 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2122 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 2123 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 2124 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2125 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2126 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2127 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2128 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2129 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2130 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2131 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2132 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 2133 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 2134 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 2135 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2136 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 2137 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2138 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2139 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 2140 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2141 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2142 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 2143 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2144 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 2145 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2146 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2147 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 2148 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2149 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2150 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 2151 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2152 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 2153 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2154 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2155 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 2156 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2157 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2158 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 2159 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2160 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 2161 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2162 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 2163 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2164 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2165 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2166 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2167 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2168 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2169 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2170 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2171 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2172 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2173 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2174 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2175 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2176 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2177 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2178 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2179 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2180 // CHECK9: omp_offload.failed: 2181 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4:[0-9]+]] 2182 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2183 // CHECK9: omp_offload.cont: 2184 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 2185 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 2186 // CHECK9-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 2187 // CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 2188 // CHECK9-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 2189 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 2190 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 2191 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2192 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 2193 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 2194 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2195 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 2196 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 2197 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 2198 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 2199 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 2200 // CHECK9-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 2201 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 2202 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 2203 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 2204 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 2205 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 2206 // CHECK9-NEXT: store i8* null, i8** [[TMP45]], align 8 2207 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 2208 // CHECK9-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 2209 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 2210 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 2211 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 2212 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 2213 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 2214 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 2215 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 2216 // CHECK9-NEXT: store i8* null, i8** [[TMP51]], align 8 2217 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2218 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2219 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 2220 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 2221 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 2222 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 2223 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 2224 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 2225 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 2226 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 2227 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 2228 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 2229 // CHECK9-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 2230 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 2231 // CHECK9-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2232 // CHECK9-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 2233 // CHECK9-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2234 // CHECK9: omp_offload.failed16: 2235 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4]] 2236 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2237 // CHECK9: omp_offload.cont17: 2238 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 2239 // CHECK9-NEXT: store i32 [[TMP61]], i32* [[DOTCAPTURE_EXPR_18]], align 4 2240 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 2241 // CHECK9-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 2242 // CHECK9-NEXT: store i32 [[TMP62]], i32* [[CONV20]], align 4 2243 // CHECK9-NEXT: [[TMP63:%.*]] = load i64, i64* [[N_CASTED19]], align 8 2244 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 2245 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2246 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[CONV21]], align 4 2247 // CHECK9-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2248 // CHECK9-NEXT: [[TMP66:%.*]] = mul nuw i64 [[TMP1]], 4 2249 // CHECK9-NEXT: [[TMP67:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8* 2250 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false) 2251 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 2252 // CHECK9-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 2253 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP69]], align 8 2254 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 2255 // CHECK9-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 2256 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP71]], align 8 2257 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 2258 // CHECK9-NEXT: store i8* null, i8** [[TMP72]], align 8 2259 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 2260 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 2261 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP74]], align 8 2262 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 2263 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 2264 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8 2265 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1 2266 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 2267 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2 2268 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32** 2269 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP79]], align 8 2270 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2 2271 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 2272 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 8 2273 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2 2274 // CHECK9-NEXT: store i64 [[TMP66]], i64* [[TMP82]], align 8 2275 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2 2276 // CHECK9-NEXT: store i8* null, i8** [[TMP83]], align 8 2277 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3 2278 // CHECK9-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i64* 2279 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP85]], align 8 2280 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3 2281 // CHECK9-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64* 2282 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP87]], align 8 2283 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3 2284 // CHECK9-NEXT: store i8* null, i8** [[TMP88]], align 8 2285 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 2286 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 2287 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0 2288 // CHECK9-NEXT: [[TMP92:%.*]] = load i32, i32* [[N]], align 4 2289 // CHECK9-NEXT: store i32 [[TMP92]], i32* [[DOTCAPTURE_EXPR_27]], align 4 2290 // CHECK9-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 2291 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP93]], 0 2292 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 2293 // CHECK9-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1 2294 // CHECK9-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4 2295 // CHECK9-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4 2296 // CHECK9-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP94]], 1 2297 // CHECK9-NEXT: [[TMP95:%.*]] = zext i32 [[ADD32]] to i64 2298 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP95]]) 2299 // CHECK9-NEXT: [[TMP96:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP89]], i8** [[TMP90]], i64* [[TMP91]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2300 // CHECK9-NEXT: [[TMP97:%.*]] = icmp ne i32 [[TMP96]], 0 2301 // CHECK9-NEXT: br i1 [[TMP97]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 2302 // CHECK9: omp_offload.failed33: 2303 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP63]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP65]]) #[[ATTR4]] 2304 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT34]] 2305 // CHECK9: omp_offload.cont34: 2306 // CHECK9-NEXT: [[TMP98:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2307 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP98]]) 2308 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2309 // CHECK9-NEXT: [[TMP99:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2310 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP99]]) 2311 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[RETVAL]], align 4 2312 // CHECK9-NEXT: ret i32 [[TMP100]] 2313 // 2314 // 2315 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 2316 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2317 // CHECK9-NEXT: entry: 2318 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2319 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2320 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2321 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2322 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2323 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2324 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2325 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2326 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2327 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2328 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2329 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2330 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 2331 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 2332 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 2333 // CHECK9-NEXT: ret void 2334 // 2335 // 2336 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 2337 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] { 2338 // CHECK9-NEXT: entry: 2339 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2340 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2341 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2342 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2343 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2344 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2345 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2346 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2347 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2348 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2349 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2350 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2351 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2352 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2353 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 2354 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2355 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2356 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2357 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2358 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2359 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2360 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2361 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2362 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2363 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2364 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2365 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2366 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2367 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2368 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2369 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2370 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2371 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2372 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2373 // CHECK9: omp.precond.then: 2374 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2375 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2376 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2377 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2378 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2379 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2380 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2381 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2382 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2383 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2384 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2385 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2386 // CHECK9: cond.true: 2387 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2388 // CHECK9-NEXT: br label [[COND_END:%.*]] 2389 // CHECK9: cond.false: 2390 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2391 // CHECK9-NEXT: br label [[COND_END]] 2392 // CHECK9: cond.end: 2393 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2394 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2395 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2396 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2397 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2398 // CHECK9: omp.inner.for.cond: 2399 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2400 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 2401 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2402 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2403 // CHECK9: omp.inner.for.body: 2404 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2405 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2406 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2407 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9 2408 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9 2409 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 2410 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 2411 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 2412 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2413 // CHECK9: omp.body.continue: 2414 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2415 // CHECK9: omp.inner.for.inc: 2416 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2417 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2418 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 2419 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 2420 // CHECK9: omp.inner.for.end: 2421 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2422 // CHECK9: omp.loop.exit: 2423 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2424 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2425 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2426 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2427 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2428 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2429 // CHECK9: .omp.final.then: 2430 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2431 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 2432 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2433 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2434 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2435 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2436 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2437 // CHECK9: .omp.final.done: 2438 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2439 // CHECK9: omp.precond.end: 2440 // CHECK9-NEXT: ret void 2441 // 2442 // 2443 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 2444 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2445 // CHECK9-NEXT: entry: 2446 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2447 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2448 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2449 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2450 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2451 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2452 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2453 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2454 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2455 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2456 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2457 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2458 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 2459 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 2460 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 2461 // CHECK9-NEXT: ret void 2462 // 2463 // 2464 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2465 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] { 2466 // CHECK9-NEXT: entry: 2467 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2468 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2469 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2470 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2471 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2472 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2473 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2474 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2475 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2476 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2477 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2478 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2479 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2480 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2481 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 2482 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2483 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2484 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2485 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2486 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2487 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2488 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2489 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2490 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2491 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2492 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2493 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2494 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2495 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2496 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2497 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2498 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2499 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2500 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2501 // CHECK9: omp.precond.then: 2502 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2503 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2504 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2505 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2506 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2507 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2508 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2509 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2510 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2511 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2512 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2513 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2514 // CHECK9: cond.true: 2515 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2516 // CHECK9-NEXT: br label [[COND_END:%.*]] 2517 // CHECK9: cond.false: 2518 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2519 // CHECK9-NEXT: br label [[COND_END]] 2520 // CHECK9: cond.end: 2521 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2522 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2523 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2524 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2525 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2526 // CHECK9: omp.inner.for.cond: 2527 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2528 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 2529 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2530 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2531 // CHECK9: omp.inner.for.body: 2532 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2533 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2534 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2535 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 2536 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 2537 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 2538 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 2539 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 2540 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2541 // CHECK9: omp.body.continue: 2542 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2543 // CHECK9: omp.inner.for.inc: 2544 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2545 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2546 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2547 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 2548 // CHECK9: omp.inner.for.end: 2549 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2550 // CHECK9: omp.loop.exit: 2551 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2552 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2553 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2554 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2555 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 2556 // CHECK9-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2557 // CHECK9: .omp.final.then: 2558 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2559 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 2560 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 2561 // CHECK9-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 2562 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 2563 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 2564 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2565 // CHECK9: .omp.final.done: 2566 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2567 // CHECK9: omp.precond.end: 2568 // CHECK9-NEXT: ret void 2569 // 2570 // 2571 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2572 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2573 // CHECK9-NEXT: entry: 2574 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2575 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2576 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2577 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2578 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2579 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2580 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2581 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2582 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2583 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2584 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2585 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2586 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2587 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2588 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2589 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2590 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4 2591 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 2592 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4 2593 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2594 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 2595 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2596 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]]) 2597 // CHECK9-NEXT: ret void 2598 // 2599 // 2600 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 2601 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] { 2602 // CHECK9-NEXT: entry: 2603 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2604 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2605 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2606 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2607 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2608 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2609 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2610 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2611 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2612 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2613 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2614 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2615 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2616 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2617 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2618 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 2619 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2620 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2621 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2622 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2623 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2624 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2625 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2626 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2627 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2628 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2629 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2630 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2631 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2632 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2633 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2634 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 2635 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 2636 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2637 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2638 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2639 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2640 // CHECK9: omp.precond.then: 2641 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2642 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2643 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2644 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2645 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2646 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 2647 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2648 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2649 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 2650 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2651 // CHECK9: omp.dispatch.cond: 2652 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2653 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2654 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2655 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2656 // CHECK9: cond.true: 2657 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2658 // CHECK9-NEXT: br label [[COND_END:%.*]] 2659 // CHECK9: cond.false: 2660 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2661 // CHECK9-NEXT: br label [[COND_END]] 2662 // CHECK9: cond.end: 2663 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2664 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2665 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2666 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2667 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2668 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2669 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2670 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2671 // CHECK9: omp.dispatch.body: 2672 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2673 // CHECK9: omp.inner.for.cond: 2674 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 2675 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 2676 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2677 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2678 // CHECK9: omp.inner.for.body: 2679 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 2680 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2681 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2682 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !18 2683 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !18 2684 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2685 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 2686 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 2687 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2688 // CHECK9: omp.body.continue: 2689 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2690 // CHECK9: omp.inner.for.inc: 2691 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 2692 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 2693 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 2694 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 2695 // CHECK9: omp.inner.for.end: 2696 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2697 // CHECK9: omp.dispatch.inc: 2698 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2699 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2700 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2701 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4 2702 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2703 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2704 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 2705 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4 2706 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2707 // CHECK9: omp.dispatch.end: 2708 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2709 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2710 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2711 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2712 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 2713 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2714 // CHECK9: .omp.final.then: 2715 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2716 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP29]], 0 2717 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 2718 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1 2719 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 2720 // CHECK9-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4 2721 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2722 // CHECK9: .omp.final.done: 2723 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2724 // CHECK9: omp.precond.end: 2725 // CHECK9-NEXT: ret void 2726 // 2727 // 2728 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2729 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat { 2730 // CHECK9-NEXT: entry: 2731 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2732 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2733 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2734 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2735 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2736 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2737 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 2738 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 2739 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 2740 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2741 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 2742 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 2743 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 2744 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 2745 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2746 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2747 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2748 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 2749 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2750 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2751 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 2752 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2753 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 2754 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2755 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2756 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2757 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2758 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2759 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2760 // CHECK9: omp_offload.failed: 2761 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]] 2762 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2763 // CHECK9: omp_offload.cont: 2764 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2765 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 2766 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 2767 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2768 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 2769 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 2770 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 2771 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 2772 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2773 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2774 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2775 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2776 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2777 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2778 // CHECK9: omp_offload.failed5: 2779 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]] 2780 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2781 // CHECK9: omp_offload.cont6: 2782 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2783 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 2784 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 2785 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2786 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 2787 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 2788 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 2789 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 2790 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2791 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2792 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2793 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 2794 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2795 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 2796 // CHECK9: omp_offload.failed11: 2797 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]] 2798 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]] 2799 // CHECK9: omp_offload.cont12: 2800 // CHECK9-NEXT: ret i32 0 2801 // 2802 // 2803 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 2804 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2805 // CHECK9-NEXT: entry: 2806 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2807 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2808 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2809 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2810 // CHECK9-NEXT: ret void 2811 // 2812 // 2813 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 2814 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 2815 // CHECK9-NEXT: entry: 2816 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2817 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2818 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2819 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2820 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2821 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2822 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2823 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2824 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2825 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2826 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2827 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2828 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2829 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2830 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2831 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2832 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2833 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2834 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2835 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2836 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2837 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2838 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2839 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2840 // CHECK9: cond.true: 2841 // CHECK9-NEXT: br label [[COND_END:%.*]] 2842 // CHECK9: cond.false: 2843 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2844 // CHECK9-NEXT: br label [[COND_END]] 2845 // CHECK9: cond.end: 2846 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2847 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2848 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2849 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2850 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2851 // CHECK9: omp.inner.for.cond: 2852 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2853 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 2854 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2855 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2856 // CHECK9: omp.inner.for.body: 2857 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2858 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2859 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2860 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 2861 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 2862 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2863 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2864 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 2865 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2866 // CHECK9: omp.body.continue: 2867 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2868 // CHECK9: omp.inner.for.inc: 2869 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2870 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2871 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 2872 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 2873 // CHECK9: omp.inner.for.end: 2874 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2875 // CHECK9: omp.loop.exit: 2876 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2877 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2878 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2879 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2880 // CHECK9: .omp.final.then: 2881 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 2882 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2883 // CHECK9: .omp.final.done: 2884 // CHECK9-NEXT: ret void 2885 // 2886 // 2887 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 2888 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2889 // CHECK9-NEXT: entry: 2890 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2891 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2892 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2893 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2894 // CHECK9-NEXT: ret void 2895 // 2896 // 2897 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 2898 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 2899 // CHECK9-NEXT: entry: 2900 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2901 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2902 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2903 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2904 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2905 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2906 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2907 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2908 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2909 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2910 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2911 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2912 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2913 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2914 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2915 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2916 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2917 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2918 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2919 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2920 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2921 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2922 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2923 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2924 // CHECK9: cond.true: 2925 // CHECK9-NEXT: br label [[COND_END:%.*]] 2926 // CHECK9: cond.false: 2927 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2928 // CHECK9-NEXT: br label [[COND_END]] 2929 // CHECK9: cond.end: 2930 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2931 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2932 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2933 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2934 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2935 // CHECK9: omp.inner.for.cond: 2936 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2937 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 2938 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2939 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2940 // CHECK9: omp.inner.for.body: 2941 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2942 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2943 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2944 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 2945 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 2946 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2947 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2948 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 2949 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2950 // CHECK9: omp.body.continue: 2951 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2952 // CHECK9: omp.inner.for.inc: 2953 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2954 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2955 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 2956 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 2957 // CHECK9: omp.inner.for.end: 2958 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2959 // CHECK9: omp.loop.exit: 2960 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2961 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 2962 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 2963 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 2964 // CHECK9: .omp.final.then: 2965 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 2966 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 2967 // CHECK9: .omp.final.done: 2968 // CHECK9-NEXT: ret void 2969 // 2970 // 2971 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2972 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2973 // CHECK9-NEXT: entry: 2974 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2975 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2976 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2977 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2978 // CHECK9-NEXT: ret void 2979 // 2980 // 2981 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 2982 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 2983 // CHECK9-NEXT: entry: 2984 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2985 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2986 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2987 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2988 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2989 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2990 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2991 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2992 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2993 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2994 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2995 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2996 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2997 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2998 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2999 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3000 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3001 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3002 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3003 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3004 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 3005 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3006 // CHECK9: omp.dispatch.cond: 3007 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3008 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3009 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3010 // CHECK9: cond.true: 3011 // CHECK9-NEXT: br label [[COND_END:%.*]] 3012 // CHECK9: cond.false: 3013 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3014 // CHECK9-NEXT: br label [[COND_END]] 3015 // CHECK9: cond.end: 3016 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3017 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3018 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3019 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3020 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3021 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3022 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3023 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3024 // CHECK9: omp.dispatch.body: 3025 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3026 // CHECK9: omp.inner.for.cond: 3027 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 3028 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 3029 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3030 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3031 // CHECK9: omp.inner.for.body: 3032 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 3033 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3034 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3035 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 3036 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 3037 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3038 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3039 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 3040 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3041 // CHECK9: omp.body.continue: 3042 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3043 // CHECK9: omp.inner.for.inc: 3044 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 3045 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3046 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 3047 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 3048 // CHECK9: omp.inner.for.end: 3049 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3050 // CHECK9: omp.dispatch.inc: 3051 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3052 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3053 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3054 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3055 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3056 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3057 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 3058 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3059 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 3060 // CHECK9: omp.dispatch.end: 3061 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3062 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3063 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 3064 // CHECK9-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3065 // CHECK9: .omp.final.then: 3066 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4 3067 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] 3068 // CHECK9: .omp.final.done: 3069 // CHECK9-NEXT: ret void 3070 // 3071 // 3072 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3073 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] { 3074 // CHECK9-NEXT: entry: 3075 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 3076 // CHECK9-NEXT: ret void 3077 // 3078 // 3079 // CHECK10-LABEL: define {{[^@]+}}@main 3080 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3081 // CHECK10-NEXT: entry: 3082 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3083 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3084 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3085 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 3086 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3087 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3088 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3089 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3090 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3091 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3092 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 3093 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3094 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3095 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3096 // CHECK10-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 3097 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 3098 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 3099 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 3100 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 3101 // CHECK10-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 3102 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 3103 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3104 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 3105 // CHECK10-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 3106 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 3107 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8 3108 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8 3109 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8 3110 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8 3111 // CHECK10-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 3112 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 3113 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4 3114 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 3115 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3116 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3117 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 3118 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3119 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3120 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3121 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3122 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3123 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3124 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3125 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3126 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 3127 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 3128 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 3129 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3130 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 3131 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3132 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 3133 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 3134 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3135 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3136 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 3137 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3138 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 3139 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3140 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 3141 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 3142 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3143 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 3144 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 3145 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3146 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 3147 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3148 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 3149 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 3150 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3151 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 3152 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 3153 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3154 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 3155 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3156 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 3157 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3158 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3159 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3160 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3161 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 3162 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3163 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 3164 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3165 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3166 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3167 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3168 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 3169 // CHECK10-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 3170 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 3171 // CHECK10-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3172 // CHECK10-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3173 // CHECK10-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3174 // CHECK10: omp_offload.failed: 3175 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4:[0-9]+]] 3176 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3177 // CHECK10: omp_offload.cont: 3178 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 3179 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 3180 // CHECK10-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 3181 // CHECK10-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 3182 // CHECK10-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 3183 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 3184 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 3185 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 3186 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 3187 // CHECK10-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 3188 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 3189 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 3190 // CHECK10-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 3191 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 3192 // CHECK10-NEXT: store i8* null, i8** [[TMP40]], align 8 3193 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 3194 // CHECK10-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 3195 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 3196 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 3197 // CHECK10-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 3198 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 3199 // CHECK10-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 3200 // CHECK10-NEXT: store i8* null, i8** [[TMP45]], align 8 3201 // CHECK10-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 3202 // CHECK10-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 3203 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 3204 // CHECK10-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 3205 // CHECK10-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 3206 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 3207 // CHECK10-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 3208 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 3209 // CHECK10-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 3210 // CHECK10-NEXT: store i8* null, i8** [[TMP51]], align 8 3211 // CHECK10-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 3212 // CHECK10-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 3213 // CHECK10-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 3214 // CHECK10-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 3215 // CHECK10-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 3216 // CHECK10-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 3217 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 3218 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 3219 // CHECK10-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 3220 // CHECK10-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3221 // CHECK10-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3222 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 3223 // CHECK10-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 3224 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 3225 // CHECK10-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3226 // CHECK10-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 3227 // CHECK10-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 3228 // CHECK10: omp_offload.failed16: 3229 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR4]] 3230 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT17]] 3231 // CHECK10: omp_offload.cont17: 3232 // CHECK10-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 3233 // CHECK10-NEXT: store i32 [[TMP61]], i32* [[DOTCAPTURE_EXPR_18]], align 4 3234 // CHECK10-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 3235 // CHECK10-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 3236 // CHECK10-NEXT: store i32 [[TMP62]], i32* [[CONV20]], align 4 3237 // CHECK10-NEXT: [[TMP63:%.*]] = load i64, i64* [[N_CASTED19]], align 8 3238 // CHECK10-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 3239 // CHECK10-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 3240 // CHECK10-NEXT: store i32 [[TMP64]], i32* [[CONV21]], align 4 3241 // CHECK10-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 3242 // CHECK10-NEXT: [[TMP66:%.*]] = mul nuw i64 [[TMP1]], 4 3243 // CHECK10-NEXT: [[TMP67:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8* 3244 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false) 3245 // CHECK10-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 3246 // CHECK10-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 3247 // CHECK10-NEXT: store i64 [[TMP63]], i64* [[TMP69]], align 8 3248 // CHECK10-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 3249 // CHECK10-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 3250 // CHECK10-NEXT: store i64 [[TMP63]], i64* [[TMP71]], align 8 3251 // CHECK10-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 3252 // CHECK10-NEXT: store i8* null, i8** [[TMP72]], align 8 3253 // CHECK10-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 3254 // CHECK10-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 3255 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP74]], align 8 3256 // CHECK10-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 3257 // CHECK10-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 3258 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8 3259 // CHECK10-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1 3260 // CHECK10-NEXT: store i8* null, i8** [[TMP77]], align 8 3261 // CHECK10-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2 3262 // CHECK10-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32** 3263 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP79]], align 8 3264 // CHECK10-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2 3265 // CHECK10-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 3266 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 8 3267 // CHECK10-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2 3268 // CHECK10-NEXT: store i64 [[TMP66]], i64* [[TMP82]], align 8 3269 // CHECK10-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2 3270 // CHECK10-NEXT: store i8* null, i8** [[TMP83]], align 8 3271 // CHECK10-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3 3272 // CHECK10-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i64* 3273 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP85]], align 8 3274 // CHECK10-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3 3275 // CHECK10-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64* 3276 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP87]], align 8 3277 // CHECK10-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3 3278 // CHECK10-NEXT: store i8* null, i8** [[TMP88]], align 8 3279 // CHECK10-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 3280 // CHECK10-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 3281 // CHECK10-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0 3282 // CHECK10-NEXT: [[TMP92:%.*]] = load i32, i32* [[N]], align 4 3283 // CHECK10-NEXT: store i32 [[TMP92]], i32* [[DOTCAPTURE_EXPR_27]], align 4 3284 // CHECK10-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3285 // CHECK10-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP93]], 0 3286 // CHECK10-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 3287 // CHECK10-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1 3288 // CHECK10-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4 3289 // CHECK10-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4 3290 // CHECK10-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP94]], 1 3291 // CHECK10-NEXT: [[TMP95:%.*]] = zext i32 [[ADD32]] to i64 3292 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP95]]) 3293 // CHECK10-NEXT: [[TMP96:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP89]], i8** [[TMP90]], i64* [[TMP91]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3294 // CHECK10-NEXT: [[TMP97:%.*]] = icmp ne i32 [[TMP96]], 0 3295 // CHECK10-NEXT: br i1 [[TMP97]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 3296 // CHECK10: omp_offload.failed33: 3297 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP63]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP65]]) #[[ATTR4]] 3298 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT34]] 3299 // CHECK10: omp_offload.cont34: 3300 // CHECK10-NEXT: [[TMP98:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3301 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP98]]) 3302 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3303 // CHECK10-NEXT: [[TMP99:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3304 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP99]]) 3305 // CHECK10-NEXT: [[TMP100:%.*]] = load i32, i32* [[RETVAL]], align 4 3306 // CHECK10-NEXT: ret i32 [[TMP100]] 3307 // 3308 // 3309 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 3310 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3311 // CHECK10-NEXT: entry: 3312 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3313 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3314 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3315 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3316 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3317 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3318 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3319 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3320 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3321 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3322 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3323 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3324 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3325 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 3326 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 3327 // CHECK10-NEXT: ret void 3328 // 3329 // 3330 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 3331 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] { 3332 // CHECK10-NEXT: entry: 3333 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3334 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3335 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3336 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3337 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3338 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3339 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3340 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3341 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3342 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3343 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3344 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3345 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3346 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3347 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 3348 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3349 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3350 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3351 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3352 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3353 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3354 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3355 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3356 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3357 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3358 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3359 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3360 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3361 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3362 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3363 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 3364 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3365 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 3366 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3367 // CHECK10: omp.precond.then: 3368 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3369 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3370 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3371 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3372 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3373 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3374 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3375 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3376 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3377 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3378 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 3379 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3380 // CHECK10: cond.true: 3381 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3382 // CHECK10-NEXT: br label [[COND_END:%.*]] 3383 // CHECK10: cond.false: 3384 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3385 // CHECK10-NEXT: br label [[COND_END]] 3386 // CHECK10: cond.end: 3387 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 3388 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3389 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3390 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 3391 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3392 // CHECK10: omp.inner.for.cond: 3393 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3394 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 3395 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3396 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3397 // CHECK10: omp.inner.for.body: 3398 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3399 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 3400 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3401 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !9 3402 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !9 3403 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 3404 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 3405 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 3406 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3407 // CHECK10: omp.body.continue: 3408 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3409 // CHECK10: omp.inner.for.inc: 3410 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3411 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 3412 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 3413 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 3414 // CHECK10: omp.inner.for.end: 3415 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3416 // CHECK10: omp.loop.exit: 3417 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3418 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 3419 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 3420 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3421 // CHECK10-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 3422 // CHECK10-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3423 // CHECK10: .omp.final.then: 3424 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3425 // CHECK10-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 3426 // CHECK10-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 3427 // CHECK10-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 3428 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 3429 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 3430 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 3431 // CHECK10: .omp.final.done: 3432 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3433 // CHECK10: omp.precond.end: 3434 // CHECK10-NEXT: ret void 3435 // 3436 // 3437 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 3438 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3439 // CHECK10-NEXT: entry: 3440 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3441 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3442 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3443 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3444 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3445 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3446 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3447 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3448 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3449 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3450 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3451 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3452 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 3453 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 3454 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 3455 // CHECK10-NEXT: ret void 3456 // 3457 // 3458 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 3459 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] { 3460 // CHECK10-NEXT: entry: 3461 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3462 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3463 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3464 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3465 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3466 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3467 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3468 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3469 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3470 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3471 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3472 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3473 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3474 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3475 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 3476 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3477 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3478 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3479 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3480 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3481 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3482 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3483 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3484 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3485 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3486 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3487 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3488 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3489 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3490 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3491 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 3492 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3493 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 3494 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3495 // CHECK10: omp.precond.then: 3496 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3497 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3498 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3499 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3500 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3501 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3502 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3503 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3504 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3505 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3506 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 3507 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3508 // CHECK10: cond.true: 3509 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3510 // CHECK10-NEXT: br label [[COND_END:%.*]] 3511 // CHECK10: cond.false: 3512 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3513 // CHECK10-NEXT: br label [[COND_END]] 3514 // CHECK10: cond.end: 3515 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 3516 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3517 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3518 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 3519 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3520 // CHECK10: omp.inner.for.cond: 3521 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3522 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 3523 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3524 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3525 // CHECK10: omp.inner.for.body: 3526 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3527 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 3528 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3529 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 3530 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 3531 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 3532 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 3533 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 3534 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3535 // CHECK10: omp.body.continue: 3536 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3537 // CHECK10: omp.inner.for.inc: 3538 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3539 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 3540 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 3541 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 3542 // CHECK10: omp.inner.for.end: 3543 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3544 // CHECK10: omp.loop.exit: 3545 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3546 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 3547 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 3548 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3549 // CHECK10-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 3550 // CHECK10-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3551 // CHECK10: .omp.final.then: 3552 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3553 // CHECK10-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 3554 // CHECK10-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 3555 // CHECK10-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 3556 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 3557 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 3558 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 3559 // CHECK10: .omp.final.done: 3560 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3561 // CHECK10: omp.precond.end: 3562 // CHECK10-NEXT: ret void 3563 // 3564 // 3565 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 3566 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3567 // CHECK10-NEXT: entry: 3568 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3569 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3570 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3571 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3572 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3573 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 3574 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3575 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3576 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3577 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 3578 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3579 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3580 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3581 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 3582 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3583 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3584 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4 3585 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 3586 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4 3587 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 3588 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 3589 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 3590 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]]) 3591 // CHECK10-NEXT: ret void 3592 // 3593 // 3594 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 3595 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] { 3596 // CHECK10-NEXT: entry: 3597 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3598 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3599 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 3600 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 3601 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3602 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3603 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3604 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3605 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3606 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3607 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3608 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3609 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3610 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3611 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3612 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 3613 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3614 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3615 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 3616 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 3617 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3618 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 3619 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 3620 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 3621 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3622 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 3623 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 3624 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3625 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3626 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3627 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3628 // CHECK10-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 3629 // CHECK10-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3630 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 3631 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3632 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 3633 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3634 // CHECK10: omp.precond.then: 3635 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3636 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3637 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3638 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3639 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3640 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 3641 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3642 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3643 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 3644 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3645 // CHECK10: omp.dispatch.cond: 3646 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3647 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3648 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3649 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3650 // CHECK10: cond.true: 3651 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3652 // CHECK10-NEXT: br label [[COND_END:%.*]] 3653 // CHECK10: cond.false: 3654 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3655 // CHECK10-NEXT: br label [[COND_END]] 3656 // CHECK10: cond.end: 3657 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3658 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3659 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3660 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3661 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3662 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3663 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3664 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3665 // CHECK10: omp.dispatch.body: 3666 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3667 // CHECK10: omp.inner.for.cond: 3668 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3669 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 3670 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3671 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3672 // CHECK10: omp.inner.for.body: 3673 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3674 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3675 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3676 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !18 3677 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !18 3678 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 3679 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 3680 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 3681 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3682 // CHECK10: omp.body.continue: 3683 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3684 // CHECK10: omp.inner.for.inc: 3685 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3686 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 3687 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 3688 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 3689 // CHECK10: omp.inner.for.end: 3690 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3691 // CHECK10: omp.dispatch.inc: 3692 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3693 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3694 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3695 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4 3696 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3697 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3698 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3699 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4 3700 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 3701 // CHECK10: omp.dispatch.end: 3702 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3703 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 3704 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 3705 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3706 // CHECK10-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 3707 // CHECK10-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3708 // CHECK10: .omp.final.then: 3709 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3710 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP29]], 0 3711 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 3712 // CHECK10-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1 3713 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 3714 // CHECK10-NEXT: store i32 [[ADD15]], i32* [[I5]], align 4 3715 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 3716 // CHECK10: .omp.final.done: 3717 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3718 // CHECK10: omp.precond.end: 3719 // CHECK10-NEXT: ret void 3720 // 3721 // 3722 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3723 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat { 3724 // CHECK10-NEXT: entry: 3725 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3726 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3727 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3728 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3729 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3730 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3731 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 3732 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 3733 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 3734 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3735 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 3736 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 3737 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 3738 // CHECK10-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3739 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3740 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3741 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 3742 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 3743 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3744 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 3745 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 3746 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3747 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8 3748 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3749 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3750 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3751 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3752 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3753 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3754 // CHECK10: omp_offload.failed: 3755 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]] 3756 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3757 // CHECK10: omp_offload.cont: 3758 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3759 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 3760 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 3761 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3762 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 3763 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 3764 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 3765 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 3766 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3767 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3768 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3769 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3770 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 3771 // CHECK10-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 3772 // CHECK10: omp_offload.failed5: 3773 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]] 3774 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]] 3775 // CHECK10: omp_offload.cont6: 3776 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3777 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 3778 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 3779 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3780 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 3781 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 3782 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 3783 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 3784 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3785 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3786 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3787 // CHECK10-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 3788 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3789 // CHECK10-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 3790 // CHECK10: omp_offload.failed11: 3791 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]] 3792 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT12]] 3793 // CHECK10: omp_offload.cont12: 3794 // CHECK10-NEXT: ret i32 0 3795 // 3796 // 3797 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 3798 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3799 // CHECK10-NEXT: entry: 3800 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3801 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3802 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3803 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3804 // CHECK10-NEXT: ret void 3805 // 3806 // 3807 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7 3808 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 3809 // CHECK10-NEXT: entry: 3810 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3811 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3812 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3813 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3814 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3815 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3816 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3817 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3818 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3819 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3820 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3821 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3822 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3823 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3824 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3825 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3826 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3827 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3828 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3829 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3830 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3831 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3832 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3833 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3834 // CHECK10: cond.true: 3835 // CHECK10-NEXT: br label [[COND_END:%.*]] 3836 // CHECK10: cond.false: 3837 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3838 // CHECK10-NEXT: br label [[COND_END]] 3839 // CHECK10: cond.end: 3840 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3841 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3842 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3843 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3844 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3845 // CHECK10: omp.inner.for.cond: 3846 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 3847 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 3848 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3849 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3850 // CHECK10: omp.inner.for.body: 3851 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 3852 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3853 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3854 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 3855 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 3856 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3857 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3858 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 3859 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3860 // CHECK10: omp.body.continue: 3861 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3862 // CHECK10: omp.inner.for.inc: 3863 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 3864 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3865 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 3866 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 3867 // CHECK10: omp.inner.for.end: 3868 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3869 // CHECK10: omp.loop.exit: 3870 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3871 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3872 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3873 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3874 // CHECK10: .omp.final.then: 3875 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4 3876 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 3877 // CHECK10: .omp.final.done: 3878 // CHECK10-NEXT: ret void 3879 // 3880 // 3881 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 3882 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3883 // CHECK10-NEXT: entry: 3884 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3885 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3886 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3887 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3888 // CHECK10-NEXT: ret void 3889 // 3890 // 3891 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10 3892 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 3893 // CHECK10-NEXT: entry: 3894 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3895 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3896 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3897 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3898 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3899 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3900 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3901 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3902 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3903 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3904 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3905 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3906 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3907 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3908 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3909 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3910 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3911 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3912 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3913 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3914 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3915 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3916 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3917 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3918 // CHECK10: cond.true: 3919 // CHECK10-NEXT: br label [[COND_END:%.*]] 3920 // CHECK10: cond.false: 3921 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3922 // CHECK10-NEXT: br label [[COND_END]] 3923 // CHECK10: cond.end: 3924 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3925 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3926 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3927 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3928 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3929 // CHECK10: omp.inner.for.cond: 3930 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 3931 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 3932 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3933 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3934 // CHECK10: omp.inner.for.body: 3935 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 3936 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3937 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3938 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 3939 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 3940 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3941 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3942 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 3943 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3944 // CHECK10: omp.body.continue: 3945 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3946 // CHECK10: omp.inner.for.inc: 3947 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 3948 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3949 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 3950 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 3951 // CHECK10: omp.inner.for.end: 3952 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3953 // CHECK10: omp.loop.exit: 3954 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3955 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 3956 // CHECK10-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 3957 // CHECK10-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 3958 // CHECK10: .omp.final.then: 3959 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4 3960 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 3961 // CHECK10: .omp.final.done: 3962 // CHECK10-NEXT: ret void 3963 // 3964 // 3965 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 3966 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3967 // CHECK10-NEXT: entry: 3968 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3969 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3970 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3971 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3972 // CHECK10-NEXT: ret void 3973 // 3974 // 3975 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..13 3976 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 3977 // CHECK10-NEXT: entry: 3978 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3979 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3980 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3981 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3982 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3983 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3984 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3985 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3986 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3987 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3988 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3989 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3990 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3991 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3992 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3993 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3994 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3995 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3996 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3997 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3998 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 3999 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4000 // CHECK10: omp.dispatch.cond: 4001 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4002 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4003 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4004 // CHECK10: cond.true: 4005 // CHECK10-NEXT: br label [[COND_END:%.*]] 4006 // CHECK10: cond.false: 4007 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4008 // CHECK10-NEXT: br label [[COND_END]] 4009 // CHECK10: cond.end: 4010 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4011 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4012 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4013 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4014 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4015 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4016 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4017 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4018 // CHECK10: omp.dispatch.body: 4019 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4020 // CHECK10: omp.inner.for.cond: 4021 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 4022 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27 4023 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4024 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4025 // CHECK10: omp.inner.for.body: 4026 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 4027 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4028 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4029 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27 4030 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27 4031 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4032 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 4033 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27 4034 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4035 // CHECK10: omp.body.continue: 4036 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4037 // CHECK10: omp.inner.for.inc: 4038 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 4039 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4040 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27 4041 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] 4042 // CHECK10: omp.inner.for.end: 4043 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4044 // CHECK10: omp.dispatch.inc: 4045 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4046 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4047 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 4048 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 4049 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4050 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4051 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 4052 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 4053 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 4054 // CHECK10: omp.dispatch.end: 4055 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4056 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4057 // CHECK10-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 4058 // CHECK10-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4059 // CHECK10: .omp.final.then: 4060 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4 4061 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] 4062 // CHECK10: .omp.final.done: 4063 // CHECK10-NEXT: ret void 4064 // 4065 // 4066 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4067 // CHECK10-SAME: () #[[ATTR7:[0-9]+]] { 4068 // CHECK10-NEXT: entry: 4069 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 4070 // CHECK10-NEXT: ret void 4071 // 4072 // 4073 // CHECK11-LABEL: define {{[^@]+}}@main 4074 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4075 // CHECK11-NEXT: entry: 4076 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4077 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4078 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4079 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 4080 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4081 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4082 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4083 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4084 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4085 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4086 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 4087 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4088 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4089 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4090 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 4091 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 4092 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 4093 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 4094 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 4095 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 4096 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 4097 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 4098 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 4099 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 4100 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4101 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4 4102 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4 4103 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4 4104 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4 4105 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 4106 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 4107 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 4108 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 4109 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4110 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4111 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 4112 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4113 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4114 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4115 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4116 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4117 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4118 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4119 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4120 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 4121 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 4122 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 4123 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 4124 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4125 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4126 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 4127 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4128 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4129 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4130 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4131 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 4132 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4133 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4134 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 4135 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4136 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4137 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 4138 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4139 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 4140 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4141 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 4142 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 4143 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4144 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 4145 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 4146 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4147 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 4148 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4149 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 4150 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4151 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4152 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4153 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 4154 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 4155 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4156 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 4157 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4158 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4159 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4160 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4161 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 4162 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 4163 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 4164 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4165 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 4166 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4167 // CHECK11: omp_offload.failed: 4168 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4:[0-9]+]] 4169 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4170 // CHECK11: omp_offload.cont: 4171 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 4172 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 4173 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 4174 // CHECK11-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 4175 // CHECK11-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 4176 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 4177 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 4178 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4179 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 4180 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 4181 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4182 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 4183 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 4184 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 4185 // CHECK11-NEXT: store i8* null, i8** [[TMP41]], align 4 4186 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 4187 // CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 4188 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 4189 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 4190 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 4191 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 4192 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 4193 // CHECK11-NEXT: store i8* null, i8** [[TMP46]], align 4 4194 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 4195 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 4196 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 4197 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 4198 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 4199 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 4200 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 4201 // CHECK11-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 4202 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 4203 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 4204 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4205 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4206 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 4207 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 4208 // CHECK11-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 4209 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 4210 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 4211 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 4212 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 4213 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 4214 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 4215 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 4216 // CHECK11-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 4217 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 4218 // CHECK11-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4219 // CHECK11-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 4220 // CHECK11-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 4221 // CHECK11: omp_offload.failed15: 4222 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4]] 4223 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 4224 // CHECK11: omp_offload.cont16: 4225 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 4226 // CHECK11-NEXT: store i32 [[TMP62]], i32* [[DOTCAPTURE_EXPR_17]], align 4 4227 // CHECK11-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 4228 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[N_CASTED18]], align 4 4229 // CHECK11-NEXT: [[TMP64:%.*]] = load i32, i32* [[N_CASTED18]], align 4 4230 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4 4231 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4232 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4233 // CHECK11-NEXT: [[TMP67:%.*]] = mul nuw i32 [[TMP0]], 4 4234 // CHECK11-NEXT: [[TMP68:%.*]] = sext i32 [[TMP67]] to i64 4235 // CHECK11-NEXT: [[TMP69:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8* 4236 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP69]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false) 4237 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 4238 // CHECK11-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 4239 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP71]], align 4 4240 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 4241 // CHECK11-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 4242 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP73]], align 4 4243 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 4244 // CHECK11-NEXT: store i8* null, i8** [[TMP74]], align 4 4245 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 4246 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 4247 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP76]], align 4 4248 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 4249 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32* 4250 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4 4251 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 4252 // CHECK11-NEXT: store i8* null, i8** [[TMP79]], align 4 4253 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 4254 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 4255 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 4 4256 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 4257 // CHECK11-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 4258 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 4 4259 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2 4260 // CHECK11-NEXT: store i64 [[TMP68]], i64* [[TMP84]], align 4 4261 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 4262 // CHECK11-NEXT: store i8* null, i8** [[TMP85]], align 4 4263 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 4264 // CHECK11-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32* 4265 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP87]], align 4 4266 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 4267 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32* 4268 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP89]], align 4 4269 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3 4270 // CHECK11-NEXT: store i8* null, i8** [[TMP90]], align 4 4271 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 4272 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 4273 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 4274 // CHECK11-NEXT: [[TMP94:%.*]] = load i32, i32* [[N]], align 4 4275 // CHECK11-NEXT: store i32 [[TMP94]], i32* [[DOTCAPTURE_EXPR_24]], align 4 4276 // CHECK11-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 4277 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0 4278 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 4279 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 4280 // CHECK11-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 4281 // CHECK11-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4282 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1 4283 // CHECK11-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i64 4284 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP97]]) 4285 // CHECK11-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP91]], i8** [[TMP92]], i64* [[TMP93]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4286 // CHECK11-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 4287 // CHECK11-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 4288 // CHECK11: omp_offload.failed30: 4289 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP64]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP66]]) #[[ATTR4]] 4290 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT31]] 4291 // CHECK11: omp_offload.cont31: 4292 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4293 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP100]]) 4294 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4295 // CHECK11-NEXT: [[TMP101:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4296 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP101]]) 4297 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[RETVAL]], align 4 4298 // CHECK11-NEXT: ret i32 [[TMP102]] 4299 // 4300 // 4301 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 4302 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4303 // CHECK11-NEXT: entry: 4304 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4305 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4306 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4307 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4308 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4309 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4310 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4311 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4312 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4313 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4314 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4315 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4316 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 4317 // CHECK11-NEXT: ret void 4318 // 4319 // 4320 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 4321 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] { 4322 // CHECK11-NEXT: entry: 4323 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4324 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4325 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4326 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4327 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4328 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4329 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4330 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4331 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4332 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4333 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4334 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4335 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4336 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4337 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 4338 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4339 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4340 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4341 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4342 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4343 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4344 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4345 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4346 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4347 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4348 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4349 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4350 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4351 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4352 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 4353 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4354 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4355 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4356 // CHECK11: omp.precond.then: 4357 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4358 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4359 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4360 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4361 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4362 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4363 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 4364 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4365 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4366 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4367 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 4368 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4369 // CHECK11: cond.true: 4370 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4371 // CHECK11-NEXT: br label [[COND_END:%.*]] 4372 // CHECK11: cond.false: 4373 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4374 // CHECK11-NEXT: br label [[COND_END]] 4375 // CHECK11: cond.end: 4376 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 4377 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4378 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4379 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 4380 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4381 // CHECK11: omp.inner.for.cond: 4382 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4383 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 4384 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4385 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4386 // CHECK11: omp.inner.for.body: 4387 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4388 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 4389 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4390 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10 4391 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10 4392 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 4393 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 4394 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4395 // CHECK11: omp.body.continue: 4396 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4397 // CHECK11: omp.inner.for.inc: 4398 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4399 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 4400 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4401 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 4402 // CHECK11: omp.inner.for.end: 4403 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4404 // CHECK11: omp.loop.exit: 4405 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4406 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 4407 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 4408 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4409 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 4410 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4411 // CHECK11: .omp.final.then: 4412 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4413 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 4414 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 4415 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 4416 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 4417 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 4418 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4419 // CHECK11: .omp.final.done: 4420 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 4421 // CHECK11: omp.precond.end: 4422 // CHECK11-NEXT: ret void 4423 // 4424 // 4425 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 4426 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4427 // CHECK11-NEXT: entry: 4428 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4429 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4430 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4431 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4432 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4433 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4434 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4435 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4436 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4437 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4438 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4439 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4440 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 4441 // CHECK11-NEXT: ret void 4442 // 4443 // 4444 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 4445 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] { 4446 // CHECK11-NEXT: entry: 4447 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4448 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4449 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4450 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4451 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4452 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4453 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4454 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4455 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4456 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4457 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4458 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4459 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4460 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4461 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 4462 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4463 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4464 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4465 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4466 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4467 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4468 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4469 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4470 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4471 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4472 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4473 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4474 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4475 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4476 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 4477 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4478 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4479 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4480 // CHECK11: omp.precond.then: 4481 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4482 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4483 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4484 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4485 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4486 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4487 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 4488 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4489 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4490 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4491 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 4492 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4493 // CHECK11: cond.true: 4494 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4495 // CHECK11-NEXT: br label [[COND_END:%.*]] 4496 // CHECK11: cond.false: 4497 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4498 // CHECK11-NEXT: br label [[COND_END]] 4499 // CHECK11: cond.end: 4500 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 4501 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4502 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4503 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 4504 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4505 // CHECK11: omp.inner.for.cond: 4506 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4507 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 4508 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4509 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4510 // CHECK11: omp.inner.for.body: 4511 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4512 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 4513 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4514 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 4515 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 4516 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 4517 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 4518 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4519 // CHECK11: omp.body.continue: 4520 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4521 // CHECK11: omp.inner.for.inc: 4522 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4523 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 4524 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 4525 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 4526 // CHECK11: omp.inner.for.end: 4527 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4528 // CHECK11: omp.loop.exit: 4529 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4530 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 4531 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 4532 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4533 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 4534 // CHECK11-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4535 // CHECK11: .omp.final.then: 4536 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4537 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 4538 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 4539 // CHECK11-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 4540 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 4541 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 4542 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4543 // CHECK11: .omp.final.done: 4544 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 4545 // CHECK11: omp.precond.end: 4546 // CHECK11-NEXT: ret void 4547 // 4548 // 4549 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 4550 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4551 // CHECK11-NEXT: entry: 4552 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4553 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4554 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4555 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4556 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4557 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4558 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4559 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4560 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4561 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4562 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4563 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4564 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4565 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4566 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4567 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4568 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4569 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4570 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]]) 4571 // CHECK11-NEXT: ret void 4572 // 4573 // 4574 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 4575 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] { 4576 // CHECK11-NEXT: entry: 4577 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4578 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4579 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4580 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4581 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4582 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4583 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4584 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4585 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4586 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4587 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4588 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4589 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4590 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4591 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4592 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 4593 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4594 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4595 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4596 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4597 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4598 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4599 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4600 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4601 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4602 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4603 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4604 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4605 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4606 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4607 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4608 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 4609 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4610 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4611 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4612 // CHECK11: omp.precond.then: 4613 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4614 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4615 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4616 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4617 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4618 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4619 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4620 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4621 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 4622 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4623 // CHECK11: omp.dispatch.cond: 4624 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4625 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4626 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4627 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4628 // CHECK11: cond.true: 4629 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4630 // CHECK11-NEXT: br label [[COND_END:%.*]] 4631 // CHECK11: cond.false: 4632 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4633 // CHECK11-NEXT: br label [[COND_END]] 4634 // CHECK11: cond.end: 4635 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4636 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4637 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4638 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4639 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4640 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4641 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4642 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4643 // CHECK11: omp.dispatch.body: 4644 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4645 // CHECK11: omp.inner.for.cond: 4646 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 4647 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 4648 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4649 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4650 // CHECK11: omp.inner.for.body: 4651 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 4652 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4653 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4654 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 4655 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 4656 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]] 4657 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 4658 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4659 // CHECK11: omp.body.continue: 4660 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4661 // CHECK11: omp.inner.for.inc: 4662 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 4663 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 4664 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 4665 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 4666 // CHECK11: omp.inner.for.end: 4667 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4668 // CHECK11: omp.dispatch.inc: 4669 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4670 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4671 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 4672 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 4673 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4674 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4675 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4676 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 4677 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 4678 // CHECK11: omp.dispatch.end: 4679 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4680 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 4681 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 4682 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4683 // CHECK11-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 4684 // CHECK11-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4685 // CHECK11: .omp.final.then: 4686 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4687 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0 4688 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 4689 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 4690 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 4691 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4 4692 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4693 // CHECK11: .omp.final.done: 4694 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 4695 // CHECK11: omp.precond.end: 4696 // CHECK11-NEXT: ret void 4697 // 4698 // 4699 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4700 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat { 4701 // CHECK11-NEXT: entry: 4702 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4703 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4704 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 4705 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 4706 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 4707 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4708 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 4709 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 4710 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 4711 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4712 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 4713 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 4714 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 4715 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 4716 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4717 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4718 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 4719 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 4720 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4721 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 4722 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 4723 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4724 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 4725 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4726 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4727 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4728 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4729 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4730 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4731 // CHECK11: omp_offload.failed: 4732 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]] 4733 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4734 // CHECK11: omp_offload.cont: 4735 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4736 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 4737 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 4738 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4739 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 4740 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 4741 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 4742 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 4743 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4744 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4745 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4746 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4747 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 4748 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 4749 // CHECK11: omp_offload.failed5: 4750 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]] 4751 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 4752 // CHECK11: omp_offload.cont6: 4753 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4754 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 4755 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 4756 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4757 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 4758 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 4759 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 4760 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 4761 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4762 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4763 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4764 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 4765 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 4766 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 4767 // CHECK11: omp_offload.failed11: 4768 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]] 4769 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]] 4770 // CHECK11: omp_offload.cont12: 4771 // CHECK11-NEXT: ret i32 0 4772 // 4773 // 4774 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 4775 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4776 // CHECK11-NEXT: entry: 4777 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4778 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4779 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4780 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4781 // CHECK11-NEXT: ret void 4782 // 4783 // 4784 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 4785 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 4786 // CHECK11-NEXT: entry: 4787 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4788 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4789 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4790 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4791 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4792 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4793 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4794 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4795 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4796 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4797 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4798 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4799 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4800 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4801 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4802 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4803 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4804 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4805 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4806 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4807 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4808 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4809 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4810 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4811 // CHECK11: cond.true: 4812 // CHECK11-NEXT: br label [[COND_END:%.*]] 4813 // CHECK11: cond.false: 4814 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4815 // CHECK11-NEXT: br label [[COND_END]] 4816 // CHECK11: cond.end: 4817 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4818 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4819 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4820 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4821 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4822 // CHECK11: omp.inner.for.cond: 4823 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 4824 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 4825 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4826 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4827 // CHECK11: omp.inner.for.body: 4828 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 4829 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4830 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4831 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 4832 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 4833 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4834 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 4835 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4836 // CHECK11: omp.body.continue: 4837 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4838 // CHECK11: omp.inner.for.inc: 4839 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 4840 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4841 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 4842 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 4843 // CHECK11: omp.inner.for.end: 4844 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4845 // CHECK11: omp.loop.exit: 4846 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4847 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4848 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 4849 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4850 // CHECK11: .omp.final.then: 4851 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 4852 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4853 // CHECK11: .omp.final.done: 4854 // CHECK11-NEXT: ret void 4855 // 4856 // 4857 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 4858 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4859 // CHECK11-NEXT: entry: 4860 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4861 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4862 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4863 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4864 // CHECK11-NEXT: ret void 4865 // 4866 // 4867 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 4868 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 4869 // CHECK11-NEXT: entry: 4870 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4871 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4872 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4873 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4874 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4875 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4876 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4877 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4878 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4879 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4880 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4881 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4882 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4883 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4884 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4885 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4886 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4887 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4888 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4889 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4890 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4891 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4892 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4893 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4894 // CHECK11: cond.true: 4895 // CHECK11-NEXT: br label [[COND_END:%.*]] 4896 // CHECK11: cond.false: 4897 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4898 // CHECK11-NEXT: br label [[COND_END]] 4899 // CHECK11: cond.end: 4900 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4901 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4902 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4903 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4904 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4905 // CHECK11: omp.inner.for.cond: 4906 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 4907 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 4908 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4909 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4910 // CHECK11: omp.inner.for.body: 4911 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 4912 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4913 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4914 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 4915 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 4916 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4917 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 4918 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4919 // CHECK11: omp.body.continue: 4920 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4921 // CHECK11: omp.inner.for.inc: 4922 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 4923 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4924 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 4925 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 4926 // CHECK11: omp.inner.for.end: 4927 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4928 // CHECK11: omp.loop.exit: 4929 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4930 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 4931 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 4932 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 4933 // CHECK11: .omp.final.then: 4934 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 4935 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 4936 // CHECK11: .omp.final.done: 4937 // CHECK11-NEXT: ret void 4938 // 4939 // 4940 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 4941 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4942 // CHECK11-NEXT: entry: 4943 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4944 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4945 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4946 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4947 // CHECK11-NEXT: ret void 4948 // 4949 // 4950 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 4951 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 4952 // CHECK11-NEXT: entry: 4953 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4954 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4955 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4956 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4957 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4958 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4959 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4960 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4961 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4962 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4963 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4964 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4965 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4966 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4967 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4968 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4969 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4970 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4971 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4972 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4973 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 4974 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4975 // CHECK11: omp.dispatch.cond: 4976 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4977 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4978 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4979 // CHECK11: cond.true: 4980 // CHECK11-NEXT: br label [[COND_END:%.*]] 4981 // CHECK11: cond.false: 4982 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4983 // CHECK11-NEXT: br label [[COND_END]] 4984 // CHECK11: cond.end: 4985 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4986 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4987 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4988 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4989 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4990 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4991 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4992 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4993 // CHECK11: omp.dispatch.body: 4994 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4995 // CHECK11: omp.inner.for.cond: 4996 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 4997 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 4998 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4999 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5000 // CHECK11: omp.inner.for.body: 5001 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 5002 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5003 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5004 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28 5005 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28 5006 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 5007 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 5008 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5009 // CHECK11: omp.body.continue: 5010 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5011 // CHECK11: omp.inner.for.inc: 5012 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 5013 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5014 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 5015 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 5016 // CHECK11: omp.inner.for.end: 5017 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5018 // CHECK11: omp.dispatch.inc: 5019 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5020 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5021 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 5022 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 5023 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5024 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5025 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 5026 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 5027 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 5028 // CHECK11: omp.dispatch.end: 5029 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5030 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5031 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 5032 // CHECK11-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5033 // CHECK11: .omp.final.then: 5034 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4 5035 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]] 5036 // CHECK11: .omp.final.done: 5037 // CHECK11-NEXT: ret void 5038 // 5039 // 5040 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5041 // CHECK11-SAME: () #[[ATTR7:[0-9]+]] { 5042 // CHECK11-NEXT: entry: 5043 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 5044 // CHECK11-NEXT: ret void 5045 // 5046 // 5047 // CHECK12-LABEL: define {{[^@]+}}@main 5048 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 5049 // CHECK12-NEXT: entry: 5050 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 5051 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5052 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 5053 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 5054 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 5055 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 5056 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 5057 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 5058 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 5059 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 5060 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 5061 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5062 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5063 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5064 // CHECK12-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 5065 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 5066 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 5067 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 5068 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 5069 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 5070 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 5071 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 5072 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 5073 // CHECK12-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 5074 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 5075 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4 5076 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4 5077 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4 5078 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4 5079 // CHECK12-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 5080 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 5081 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 5082 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 5083 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5084 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 5085 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 5086 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 5087 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 5088 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 5089 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 5090 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 5091 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 5092 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 5093 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 5094 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 5095 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 5096 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 5097 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 5098 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5099 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 5100 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 5101 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5102 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 5103 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 5104 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 5105 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 5106 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 5107 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 5108 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 5109 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 5110 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 5111 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 5112 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 5113 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 5114 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 5115 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 5116 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 5117 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 5118 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 5119 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 5120 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 5121 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 5122 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 5123 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 5124 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5125 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5126 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 5127 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 5128 // CHECK12-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 5129 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5130 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 5131 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5132 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5133 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5134 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5135 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 5136 // CHECK12-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 5137 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 5138 // CHECK12-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 5139 // CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 5140 // CHECK12-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5141 // CHECK12: omp_offload.failed: 5142 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4:[0-9]+]] 5143 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 5144 // CHECK12: omp_offload.cont: 5145 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 5146 // CHECK12-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 5147 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 5148 // CHECK12-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 5149 // CHECK12-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 5150 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 5151 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 5152 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 5153 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 5154 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 5155 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 5156 // CHECK12-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 5157 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 5158 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 5159 // CHECK12-NEXT: store i8* null, i8** [[TMP41]], align 4 5160 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 5161 // CHECK12-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 5162 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 5163 // CHECK12-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 5164 // CHECK12-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 5165 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 5166 // CHECK12-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 5167 // CHECK12-NEXT: store i8* null, i8** [[TMP46]], align 4 5168 // CHECK12-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 5169 // CHECK12-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 5170 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 5171 // CHECK12-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 5172 // CHECK12-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 5173 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 5174 // CHECK12-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 5175 // CHECK12-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 5176 // CHECK12-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 5177 // CHECK12-NEXT: store i8* null, i8** [[TMP52]], align 4 5178 // CHECK12-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 5179 // CHECK12-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 5180 // CHECK12-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 5181 // CHECK12-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 5182 // CHECK12-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 5183 // CHECK12-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 5184 // CHECK12-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 5185 // CHECK12-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 5186 // CHECK12-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 5187 // CHECK12-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 5188 // CHECK12-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 5189 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 5190 // CHECK12-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 5191 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 5192 // CHECK12-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 5193 // CHECK12-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 5194 // CHECK12-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 5195 // CHECK12: omp_offload.failed15: 5196 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR4]] 5197 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT16]] 5198 // CHECK12: omp_offload.cont16: 5199 // CHECK12-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 5200 // CHECK12-NEXT: store i32 [[TMP62]], i32* [[DOTCAPTURE_EXPR_17]], align 4 5201 // CHECK12-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 5202 // CHECK12-NEXT: store i32 [[TMP63]], i32* [[N_CASTED18]], align 4 5203 // CHECK12-NEXT: [[TMP64:%.*]] = load i32, i32* [[N_CASTED18]], align 4 5204 // CHECK12-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4 5205 // CHECK12-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5206 // CHECK12-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5207 // CHECK12-NEXT: [[TMP67:%.*]] = mul nuw i32 [[TMP0]], 4 5208 // CHECK12-NEXT: [[TMP68:%.*]] = sext i32 [[TMP67]] to i64 5209 // CHECK12-NEXT: [[TMP69:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8* 5210 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP69]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false) 5211 // CHECK12-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 5212 // CHECK12-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 5213 // CHECK12-NEXT: store i32 [[TMP64]], i32* [[TMP71]], align 4 5214 // CHECK12-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 5215 // CHECK12-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 5216 // CHECK12-NEXT: store i32 [[TMP64]], i32* [[TMP73]], align 4 5217 // CHECK12-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 5218 // CHECK12-NEXT: store i8* null, i8** [[TMP74]], align 4 5219 // CHECK12-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 5220 // CHECK12-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 5221 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP76]], align 4 5222 // CHECK12-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 5223 // CHECK12-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32* 5224 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4 5225 // CHECK12-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 5226 // CHECK12-NEXT: store i8* null, i8** [[TMP79]], align 4 5227 // CHECK12-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 5228 // CHECK12-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 5229 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 4 5230 // CHECK12-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 5231 // CHECK12-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 5232 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 4 5233 // CHECK12-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2 5234 // CHECK12-NEXT: store i64 [[TMP68]], i64* [[TMP84]], align 4 5235 // CHECK12-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 5236 // CHECK12-NEXT: store i8* null, i8** [[TMP85]], align 4 5237 // CHECK12-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 5238 // CHECK12-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32* 5239 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP87]], align 4 5240 // CHECK12-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 5241 // CHECK12-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32* 5242 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP89]], align 4 5243 // CHECK12-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3 5244 // CHECK12-NEXT: store i8* null, i8** [[TMP90]], align 4 5245 // CHECK12-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 5246 // CHECK12-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 5247 // CHECK12-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 5248 // CHECK12-NEXT: [[TMP94:%.*]] = load i32, i32* [[N]], align 4 5249 // CHECK12-NEXT: store i32 [[TMP94]], i32* [[DOTCAPTURE_EXPR_24]], align 4 5250 // CHECK12-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 5251 // CHECK12-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0 5252 // CHECK12-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 5253 // CHECK12-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 5254 // CHECK12-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 5255 // CHECK12-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 5256 // CHECK12-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1 5257 // CHECK12-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i64 5258 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP97]]) 5259 // CHECK12-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP91]], i8** [[TMP92]], i64* [[TMP93]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 5260 // CHECK12-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 5261 // CHECK12-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 5262 // CHECK12: omp_offload.failed30: 5263 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP64]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP66]]) #[[ATTR4]] 5264 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT31]] 5265 // CHECK12: omp_offload.cont31: 5266 // CHECK12-NEXT: [[TMP100:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 5267 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP100]]) 5268 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 5269 // CHECK12-NEXT: [[TMP101:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 5270 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP101]]) 5271 // CHECK12-NEXT: [[TMP102:%.*]] = load i32, i32* [[RETVAL]], align 4 5272 // CHECK12-NEXT: ret i32 [[TMP102]] 5273 // 5274 // 5275 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 5276 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 5277 // CHECK12-NEXT: entry: 5278 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5279 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5280 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 5281 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 5282 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5283 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5284 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 5285 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5286 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 5287 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 5288 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 5289 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 5290 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 5291 // CHECK12-NEXT: ret void 5292 // 5293 // 5294 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 5295 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] { 5296 // CHECK12-NEXT: entry: 5297 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5298 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5299 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5300 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5301 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 5302 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5303 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5304 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5305 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5306 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5307 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5308 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5309 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5310 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5311 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 5312 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5313 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5314 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5315 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5316 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 5317 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5318 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 5319 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 5320 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 5321 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5322 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5323 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5324 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5325 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5326 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 5327 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5328 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5329 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5330 // CHECK12: omp.precond.then: 5331 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5332 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5333 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 5334 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5335 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5336 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5337 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 5338 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5339 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5340 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5341 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5342 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5343 // CHECK12: cond.true: 5344 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5345 // CHECK12-NEXT: br label [[COND_END:%.*]] 5346 // CHECK12: cond.false: 5347 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5348 // CHECK12-NEXT: br label [[COND_END]] 5349 // CHECK12: cond.end: 5350 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5351 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5352 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5353 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 5354 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5355 // CHECK12: omp.inner.for.cond: 5356 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5357 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 5358 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5359 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5360 // CHECK12: omp.inner.for.body: 5361 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5362 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 5363 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5364 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !10 5365 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !10 5366 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 5367 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 5368 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5369 // CHECK12: omp.body.continue: 5370 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5371 // CHECK12: omp.inner.for.inc: 5372 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5373 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 5374 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5375 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 5376 // CHECK12: omp.inner.for.end: 5377 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5378 // CHECK12: omp.loop.exit: 5379 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5380 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 5381 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 5382 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5383 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 5384 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5385 // CHECK12: .omp.final.then: 5386 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5387 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 5388 // CHECK12-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 5389 // CHECK12-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 5390 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 5391 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 5392 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 5393 // CHECK12: .omp.final.done: 5394 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 5395 // CHECK12: omp.precond.end: 5396 // CHECK12-NEXT: ret void 5397 // 5398 // 5399 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 5400 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5401 // CHECK12-NEXT: entry: 5402 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5403 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5404 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 5405 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 5406 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5407 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5408 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 5409 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5410 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 5411 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 5412 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 5413 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 5414 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 5415 // CHECK12-NEXT: ret void 5416 // 5417 // 5418 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 5419 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] { 5420 // CHECK12-NEXT: entry: 5421 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5422 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5423 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5424 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5425 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 5426 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5427 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5428 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5429 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5430 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5431 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5432 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5433 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5434 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5435 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 5436 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5437 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5438 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5439 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5440 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 5441 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5442 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 5443 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 5444 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 5445 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5446 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5447 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5448 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5449 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5450 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 5451 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5452 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5453 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5454 // CHECK12: omp.precond.then: 5455 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5456 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5457 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 5458 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5459 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5460 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5461 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 5462 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5463 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5464 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5465 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 5466 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5467 // CHECK12: cond.true: 5468 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5469 // CHECK12-NEXT: br label [[COND_END:%.*]] 5470 // CHECK12: cond.false: 5471 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5472 // CHECK12-NEXT: br label [[COND_END]] 5473 // CHECK12: cond.end: 5474 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 5475 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5476 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5477 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 5478 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5479 // CHECK12: omp.inner.for.cond: 5480 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 5481 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 5482 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5483 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5484 // CHECK12: omp.inner.for.body: 5485 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 5486 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 5487 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5488 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 5489 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 5490 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 5491 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 5492 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5493 // CHECK12: omp.body.continue: 5494 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5495 // CHECK12: omp.inner.for.inc: 5496 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 5497 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 5498 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 5499 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 5500 // CHECK12: omp.inner.for.end: 5501 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5502 // CHECK12: omp.loop.exit: 5503 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5504 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 5505 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 5506 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5507 // CHECK12-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 5508 // CHECK12-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5509 // CHECK12: .omp.final.then: 5510 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5511 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP22]], 0 5512 // CHECK12-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1 5513 // CHECK12-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1 5514 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] 5515 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4 5516 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 5517 // CHECK12: .omp.final.done: 5518 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 5519 // CHECK12: omp.precond.end: 5520 // CHECK12-NEXT: ret void 5521 // 5522 // 5523 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 5524 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5525 // CHECK12-NEXT: entry: 5526 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5527 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5528 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 5529 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 5530 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 5531 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 5532 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5533 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5534 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 5535 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5536 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5537 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 5538 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 5539 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 5540 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 5541 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5542 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5543 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 5544 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]]) 5545 // CHECK12-NEXT: ret void 5546 // 5547 // 5548 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4 5549 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] { 5550 // CHECK12-NEXT: entry: 5551 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5552 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5553 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 5554 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 5555 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 5556 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 5557 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5558 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5559 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5560 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5561 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5562 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5563 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5564 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5565 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5566 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 5567 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5568 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5569 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 5570 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 5571 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 5572 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5573 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 5574 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 5575 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 5576 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5577 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5578 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 5579 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5580 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5581 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5582 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 5583 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5584 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 5585 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5586 // CHECK12: omp.precond.then: 5587 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5588 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5589 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 5590 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5591 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5592 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 5593 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5594 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 5595 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 5596 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5597 // CHECK12: omp.dispatch.cond: 5598 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5599 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5600 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 5601 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5602 // CHECK12: cond.true: 5603 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5604 // CHECK12-NEXT: br label [[COND_END:%.*]] 5605 // CHECK12: cond.false: 5606 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5607 // CHECK12-NEXT: br label [[COND_END]] 5608 // CHECK12: cond.end: 5609 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 5610 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5611 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5612 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 5613 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5614 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5615 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 5616 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5617 // CHECK12: omp.dispatch.body: 5618 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5619 // CHECK12: omp.inner.for.cond: 5620 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 5621 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 5622 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 5623 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5624 // CHECK12: omp.inner.for.body: 5625 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 5626 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 5627 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5628 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 5629 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 5630 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]] 5631 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 5632 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5633 // CHECK12: omp.body.continue: 5634 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5635 // CHECK12: omp.inner.for.inc: 5636 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 5637 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 5638 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 5639 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 5640 // CHECK12: omp.inner.for.end: 5641 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5642 // CHECK12: omp.dispatch.inc: 5643 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5644 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5645 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 5646 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 5647 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5648 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5649 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 5650 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 5651 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 5652 // CHECK12: omp.dispatch.end: 5653 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5654 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 5655 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 5656 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5657 // CHECK12-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 5658 // CHECK12-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5659 // CHECK12: .omp.final.then: 5660 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5661 // CHECK12-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP29]], 0 5662 // CHECK12-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 5663 // CHECK12-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1 5664 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]] 5665 // CHECK12-NEXT: store i32 [[ADD14]], i32* [[I4]], align 4 5666 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 5667 // CHECK12: .omp.final.done: 5668 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 5669 // CHECK12: omp.precond.end: 5670 // CHECK12-NEXT: ret void 5671 // 5672 // 5673 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5674 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat { 5675 // CHECK12-NEXT: entry: 5676 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5677 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5678 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 5679 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 5680 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 5681 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5682 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 5683 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 5684 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 5685 // CHECK12-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 5686 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 5687 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 5688 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 5689 // CHECK12-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 5690 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5691 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5692 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 5693 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 5694 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5695 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 5696 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 5697 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 5698 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4 5699 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5700 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5701 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 5702 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 5703 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 5704 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5705 // CHECK12: omp_offload.failed: 5706 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR4]] 5707 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 5708 // CHECK12: omp_offload.cont: 5709 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 5710 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 5711 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 5712 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 5713 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 5714 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 5715 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 5716 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 5717 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 5718 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 5719 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 5720 // CHECK12-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 5721 // CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 5722 // CHECK12-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 5723 // CHECK12: omp_offload.failed5: 5724 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR4]] 5725 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT6]] 5726 // CHECK12: omp_offload.cont6: 5727 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 5728 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 5729 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 5730 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 5731 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 5732 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 5733 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 5734 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 5735 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 5736 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 5737 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 5738 // CHECK12-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 1) 5739 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 5740 // CHECK12-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 5741 // CHECK12: omp_offload.failed11: 5742 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR4]] 5743 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT12]] 5744 // CHECK12: omp_offload.cont12: 5745 // CHECK12-NEXT: ret i32 0 5746 // 5747 // 5748 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 5749 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5750 // CHECK12-NEXT: entry: 5751 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5752 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5753 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5754 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5755 // CHECK12-NEXT: ret void 5756 // 5757 // 5758 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7 5759 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 5760 // CHECK12-NEXT: entry: 5761 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5762 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5763 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5764 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5765 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5766 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5767 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5768 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5769 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5770 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5771 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5772 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5773 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5774 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5775 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5776 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5777 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5778 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5779 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5780 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5781 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5782 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5783 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5784 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5785 // CHECK12: cond.true: 5786 // CHECK12-NEXT: br label [[COND_END:%.*]] 5787 // CHECK12: cond.false: 5788 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5789 // CHECK12-NEXT: br label [[COND_END]] 5790 // CHECK12: cond.end: 5791 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5792 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5793 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5794 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5795 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5796 // CHECK12: omp.inner.for.cond: 5797 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 5798 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 5799 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5800 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5801 // CHECK12: omp.inner.for.body: 5802 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 5803 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5804 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5805 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 5806 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 5807 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 5808 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 5809 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5810 // CHECK12: omp.body.continue: 5811 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5812 // CHECK12: omp.inner.for.inc: 5813 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 5814 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 5815 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 5816 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 5817 // CHECK12: omp.inner.for.end: 5818 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5819 // CHECK12: omp.loop.exit: 5820 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5821 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5822 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 5823 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5824 // CHECK12: .omp.final.then: 5825 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4 5826 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 5827 // CHECK12: .omp.final.done: 5828 // CHECK12-NEXT: ret void 5829 // 5830 // 5831 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 5832 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5833 // CHECK12-NEXT: entry: 5834 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5835 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5836 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5837 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5838 // CHECK12-NEXT: ret void 5839 // 5840 // 5841 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10 5842 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 5843 // CHECK12-NEXT: entry: 5844 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5845 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5846 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5847 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5848 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5849 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5850 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5851 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5852 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5853 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5854 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5855 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5856 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5857 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5858 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5859 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5860 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5861 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5862 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5863 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5864 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5865 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5866 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5867 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5868 // CHECK12: cond.true: 5869 // CHECK12-NEXT: br label [[COND_END:%.*]] 5870 // CHECK12: cond.false: 5871 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5872 // CHECK12-NEXT: br label [[COND_END]] 5873 // CHECK12: cond.end: 5874 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5875 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5876 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5877 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5878 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5879 // CHECK12: omp.inner.for.cond: 5880 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 5881 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 5882 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5883 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5884 // CHECK12: omp.inner.for.body: 5885 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 5886 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5887 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5888 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 5889 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 5890 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 5891 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 5892 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5893 // CHECK12: omp.body.continue: 5894 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5895 // CHECK12: omp.inner.for.inc: 5896 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 5897 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 5898 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 5899 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 5900 // CHECK12: omp.inner.for.end: 5901 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5902 // CHECK12: omp.loop.exit: 5903 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5904 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 5905 // CHECK12-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 5906 // CHECK12-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 5907 // CHECK12: .omp.final.then: 5908 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4 5909 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 5910 // CHECK12: .omp.final.done: 5911 // CHECK12-NEXT: ret void 5912 // 5913 // 5914 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 5915 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5916 // CHECK12-NEXT: entry: 5917 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5918 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5919 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5920 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5921 // CHECK12-NEXT: ret void 5922 // 5923 // 5924 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..13 5925 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] { 5926 // CHECK12-NEXT: entry: 5927 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5928 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5929 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5930 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5931 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5932 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5933 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5934 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5935 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5936 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5937 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5938 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5939 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5940 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5941 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5942 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5943 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5944 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5945 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5946 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5947 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 5948 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5949 // CHECK12: omp.dispatch.cond: 5950 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5951 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5952 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5953 // CHECK12: cond.true: 5954 // CHECK12-NEXT: br label [[COND_END:%.*]] 5955 // CHECK12: cond.false: 5956 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5957 // CHECK12-NEXT: br label [[COND_END]] 5958 // CHECK12: cond.end: 5959 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5960 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5961 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5962 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5963 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5964 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5965 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5966 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5967 // CHECK12: omp.dispatch.body: 5968 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5969 // CHECK12: omp.inner.for.cond: 5970 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 5971 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !28 5972 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5973 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5974 // CHECK12: omp.inner.for.body: 5975 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 5976 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5977 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5978 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !28 5979 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !28 5980 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 5981 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !28 5982 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5983 // CHECK12: omp.body.continue: 5984 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5985 // CHECK12: omp.inner.for.inc: 5986 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 5987 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5988 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28 5989 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] 5990 // CHECK12: omp.inner.for.end: 5991 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5992 // CHECK12: omp.dispatch.inc: 5993 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5994 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5995 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 5996 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 5997 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5998 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5999 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 6000 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 6001 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 6002 // CHECK12: omp.dispatch.end: 6003 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6004 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 6005 // CHECK12-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 6006 // CHECK12-NEXT: br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] 6007 // CHECK12: .omp.final.then: 6008 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4 6009 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]] 6010 // CHECK12: .omp.final.done: 6011 // CHECK12-NEXT: ret void 6012 // 6013 // 6014 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6015 // CHECK12-SAME: () #[[ATTR7:[0-9]+]] { 6016 // CHECK12-NEXT: entry: 6017 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 6018 // CHECK12-NEXT: ret void 6019 // 6020 // 6021 // CHECK13-LABEL: define {{[^@]+}}@main 6022 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6023 // CHECK13-NEXT: entry: 6024 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6025 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6026 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 6027 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 6028 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 6029 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 6030 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6031 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6032 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6033 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6034 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6035 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6036 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6037 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 6038 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 6039 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 6040 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 6041 // CHECK13-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 6042 // CHECK13-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 6043 // CHECK13-NEXT: [[I18:%.*]] = alloca i32, align 4 6044 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 6045 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 6046 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 6047 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 6048 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 6049 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 6050 // CHECK13-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 6051 // CHECK13-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 6052 // CHECK13-NEXT: [[I48:%.*]] = alloca i32, align 4 6053 // CHECK13-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 6054 // CHECK13-NEXT: [[I52:%.*]] = alloca i32, align 4 6055 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 6056 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6057 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 6058 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 6059 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6060 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 6061 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 6062 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 6063 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 6064 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 6065 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 6066 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6067 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6068 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6069 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6070 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6071 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6072 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6073 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6074 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 6075 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 6076 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6077 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6078 // CHECK13-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 6079 // CHECK13: simd.if.then: 6080 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6081 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6082 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6083 // CHECK13: omp.inner.for.cond: 6084 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6085 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 6086 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6087 // CHECK13-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6088 // CHECK13: omp.inner.for.body: 6089 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6090 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6091 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6092 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2 6093 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2 6094 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 6095 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 6096 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 6097 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6098 // CHECK13: omp.body.continue: 6099 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6100 // CHECK13: omp.inner.for.inc: 6101 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6102 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 6103 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6104 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 6105 // CHECK13: omp.inner.for.end: 6106 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6107 // CHECK13-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 6108 // CHECK13-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 6109 // CHECK13-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 6110 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 6111 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 6112 // CHECK13-NEXT: br label [[SIMD_IF_END]] 6113 // CHECK13: simd.if.end: 6114 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4 6115 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 6116 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6117 // CHECK13-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 6118 // CHECK13-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 6119 // CHECK13-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 6120 // CHECK13-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 6121 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 6122 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 6123 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4 6124 // CHECK13-NEXT: store i32 0, i32* [[I18]], align 4 6125 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6126 // CHECK13-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 6127 // CHECK13-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 6128 // CHECK13: simd.if.then20: 6129 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 6130 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4 6131 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 6132 // CHECK13: omp.inner.for.cond23: 6133 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6134 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6 6135 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 6136 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 6137 // CHECK13: omp.inner.for.body25: 6138 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6139 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 6140 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 6141 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6 6142 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6 6143 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 6144 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]] 6145 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6 6146 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 6147 // CHECK13: omp.body.continue30: 6148 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 6149 // CHECK13: omp.inner.for.inc31: 6150 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6151 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 6152 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6153 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 6154 // CHECK13: omp.inner.for.end33: 6155 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6156 // CHECK13-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 6157 // CHECK13-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 6158 // CHECK13-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 6159 // CHECK13-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 6160 // CHECK13-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4 6161 // CHECK13-NEXT: br label [[SIMD_IF_END38]] 6162 // CHECK13: simd.if.end38: 6163 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 6164 // CHECK13-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4 6165 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 6166 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4 6167 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 6168 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 6169 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 6170 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 6171 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 6172 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4 6173 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 6174 // CHECK13-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4 6175 // CHECK13-NEXT: store i32 0, i32* [[I48]], align 4 6176 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 6177 // CHECK13-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 6178 // CHECK13-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 6179 // CHECK13: simd.if.then50: 6180 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4 6181 // CHECK13-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4 6182 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 6183 // CHECK13: omp.inner.for.cond53: 6184 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6185 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9 6186 // CHECK13-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 6187 // CHECK13-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 6188 // CHECK13: omp.inner.for.body55: 6189 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6190 // CHECK13-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 6191 // CHECK13-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 6192 // CHECK13-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9 6193 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9 6194 // CHECK13-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 6195 // CHECK13-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]] 6196 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9 6197 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 6198 // CHECK13: omp.body.continue60: 6199 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 6200 // CHECK13: omp.inner.for.inc61: 6201 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6202 // CHECK13-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 6203 // CHECK13-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6204 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 6205 // CHECK13: omp.inner.for.end63: 6206 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 6207 // CHECK13-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 6208 // CHECK13-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 6209 // CHECK13-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 6210 // CHECK13-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 6211 // CHECK13-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4 6212 // CHECK13-NEXT: br label [[SIMD_IF_END68]] 6213 // CHECK13: simd.if.end68: 6214 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 6215 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]]) 6216 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6217 // CHECK13-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 6218 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 6219 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 6220 // CHECK13-NEXT: ret i32 [[TMP39]] 6221 // 6222 // 6223 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 6224 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 6225 // CHECK13-NEXT: entry: 6226 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6227 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 6228 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6229 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6230 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6231 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6232 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6233 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 6234 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 6235 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 6236 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 6237 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 6238 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 6239 // CHECK13-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 6240 // CHECK13-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 6241 // CHECK13-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 6242 // CHECK13-NEXT: [[I22:%.*]] = alloca i32, align 4 6243 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6244 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6245 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6246 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6247 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 6248 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6249 // CHECK13: omp.inner.for.cond: 6250 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6251 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 6252 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 6253 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6254 // CHECK13: omp.inner.for.body: 6255 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6256 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 6257 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6258 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 6259 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 6260 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 6261 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 6262 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 6263 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6264 // CHECK13: omp.body.continue: 6265 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6266 // CHECK13: omp.inner.for.inc: 6267 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6268 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 6269 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6270 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 6271 // CHECK13: omp.inner.for.end: 6272 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4 6273 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 6274 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 6275 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 6276 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 6277 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 6278 // CHECK13: omp.inner.for.cond7: 6279 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6280 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15 6281 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6282 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 6283 // CHECK13: omp.inner.for.body9: 6284 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6285 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 6286 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 6287 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15 6288 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 6289 // CHECK13-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 6290 // CHECK13-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]] 6291 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15 6292 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 6293 // CHECK13: omp.body.continue14: 6294 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 6295 // CHECK13: omp.inner.for.inc15: 6296 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6297 // CHECK13-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 6298 // CHECK13-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6299 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]] 6300 // CHECK13: omp.inner.for.end17: 6301 // CHECK13-NEXT: store i32 10, i32* [[I6]], align 4 6302 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4 6303 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4 6304 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4 6305 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4 6306 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 6307 // CHECK13: omp.inner.for.cond23: 6308 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6309 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18 6310 // CHECK13-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 6311 // CHECK13-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 6312 // CHECK13: omp.inner.for.body25: 6313 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6314 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1 6315 // CHECK13-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 6316 // CHECK13-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18 6317 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18 6318 // CHECK13-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64 6319 // CHECK13-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]] 6320 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18 6321 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 6322 // CHECK13: omp.body.continue30: 6323 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 6324 // CHECK13: omp.inner.for.inc31: 6325 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6326 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1 6327 // CHECK13-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6328 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]] 6329 // CHECK13: omp.inner.for.end33: 6330 // CHECK13-NEXT: store i32 10, i32* [[I22]], align 4 6331 // CHECK13-NEXT: ret i32 0 6332 // 6333 // 6334 // CHECK14-LABEL: define {{[^@]+}}@main 6335 // CHECK14-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6336 // CHECK14-NEXT: entry: 6337 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6338 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6339 // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 6340 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4 6341 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 6342 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 6343 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 6344 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6345 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6346 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6347 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6348 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 6349 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6350 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 6351 // CHECK14-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 6352 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 6353 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 6354 // CHECK14-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 6355 // CHECK14-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 6356 // CHECK14-NEXT: [[I18:%.*]] = alloca i32, align 4 6357 // CHECK14-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 6358 // CHECK14-NEXT: [[I22:%.*]] = alloca i32, align 4 6359 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4 6360 // CHECK14-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 6361 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 6362 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 6363 // CHECK14-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4 6364 // CHECK14-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4 6365 // CHECK14-NEXT: [[I48:%.*]] = alloca i32, align 4 6366 // CHECK14-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4 6367 // CHECK14-NEXT: [[I52:%.*]] = alloca i32, align 4 6368 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 6369 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6370 // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 6371 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4 6372 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6373 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 6374 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 6375 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 6376 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 6377 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 6378 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 6379 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6380 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6381 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6382 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6383 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6384 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6385 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6386 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6387 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 6388 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 6389 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6390 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]] 6391 // CHECK14-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 6392 // CHECK14: simd.if.then: 6393 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6394 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6395 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6396 // CHECK14: omp.inner.for.cond: 6397 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6398 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2 6399 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6400 // CHECK14-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6401 // CHECK14: omp.inner.for.body: 6402 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6403 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6404 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6405 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2 6406 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2 6407 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 6408 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]] 6409 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2 6410 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6411 // CHECK14: omp.body.continue: 6412 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6413 // CHECK14: omp.inner.for.inc: 6414 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6415 // CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1 6416 // CHECK14-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2 6417 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 6418 // CHECK14: omp.inner.for.end: 6419 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6420 // CHECK14-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0 6421 // CHECK14-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 6422 // CHECK14-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 6423 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 6424 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 6425 // CHECK14-NEXT: br label [[SIMD_IF_END]] 6426 // CHECK14: simd.if.end: 6427 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4 6428 // CHECK14-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 6429 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6430 // CHECK14-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0 6431 // CHECK14-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 6432 // CHECK14-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 6433 // CHECK14-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 6434 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 6435 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 6436 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4 6437 // CHECK14-NEXT: store i32 0, i32* [[I18]], align 4 6438 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6439 // CHECK14-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]] 6440 // CHECK14-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]] 6441 // CHECK14: simd.if.then20: 6442 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 6443 // CHECK14-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4 6444 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 6445 // CHECK14: omp.inner.for.cond23: 6446 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6447 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6 6448 // CHECK14-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] 6449 // CHECK14-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 6450 // CHECK14: omp.inner.for.body25: 6451 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6452 // CHECK14-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1 6453 // CHECK14-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 6454 // CHECK14-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6 6455 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6 6456 // CHECK14-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64 6457 // CHECK14-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]] 6458 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6 6459 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 6460 // CHECK14: omp.body.continue30: 6461 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 6462 // CHECK14: omp.inner.for.inc31: 6463 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6464 // CHECK14-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1 6465 // CHECK14-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6 6466 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]] 6467 // CHECK14: omp.inner.for.end33: 6468 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6469 // CHECK14-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0 6470 // CHECK14-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1 6471 // CHECK14-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1 6472 // CHECK14-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]] 6473 // CHECK14-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4 6474 // CHECK14-NEXT: br label [[SIMD_IF_END38]] 6475 // CHECK14: simd.if.end38: 6476 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 6477 // CHECK14-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4 6478 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 6479 // CHECK14-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4 6480 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 6481 // CHECK14-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0 6482 // CHECK14-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 6483 // CHECK14-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 6484 // CHECK14-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 6485 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4 6486 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 6487 // CHECK14-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4 6488 // CHECK14-NEXT: store i32 0, i32* [[I48]], align 4 6489 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 6490 // CHECK14-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]] 6491 // CHECK14-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]] 6492 // CHECK14: simd.if.then50: 6493 // CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4 6494 // CHECK14-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4 6495 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]] 6496 // CHECK14: omp.inner.for.cond53: 6497 // CHECK14-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6498 // CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9 6499 // CHECK14-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]] 6500 // CHECK14-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]] 6501 // CHECK14: omp.inner.for.body55: 6502 // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6503 // CHECK14-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1 6504 // CHECK14-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]] 6505 // CHECK14-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9 6506 // CHECK14-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9 6507 // CHECK14-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64 6508 // CHECK14-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]] 6509 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9 6510 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]] 6511 // CHECK14: omp.body.continue60: 6512 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]] 6513 // CHECK14: omp.inner.for.inc61: 6514 // CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6515 // CHECK14-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1 6516 // CHECK14-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9 6517 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]] 6518 // CHECK14: omp.inner.for.end63: 6519 // CHECK14-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 6520 // CHECK14-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0 6521 // CHECK14-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1 6522 // CHECK14-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1 6523 // CHECK14-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]] 6524 // CHECK14-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4 6525 // CHECK14-NEXT: br label [[SIMD_IF_END68]] 6526 // CHECK14: simd.if.end68: 6527 // CHECK14-NEXT: [[TMP37:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 6528 // CHECK14-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]]) 6529 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6530 // CHECK14-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 6531 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 6532 // CHECK14-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4 6533 // CHECK14-NEXT: ret i32 [[TMP39]] 6534 // 6535 // 6536 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 6537 // CHECK14-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 6538 // CHECK14-NEXT: entry: 6539 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6540 // CHECK14-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 6541 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 6542 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6543 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6544 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6545 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 6546 // CHECK14-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 6547 // CHECK14-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 6548 // CHECK14-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 6549 // CHECK14-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 6550 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4 6551 // CHECK14-NEXT: [[_TMP18:%.*]] = alloca i32, align 4 6552 // CHECK14-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4 6553 // CHECK14-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4 6554 // CHECK14-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 6555 // CHECK14-NEXT: [[I22:%.*]] = alloca i32, align 4 6556 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6557 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6558 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6559 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6560 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 6561 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6562 // CHECK14: omp.inner.for.cond: 6563 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6564 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 6565 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 6566 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6567 // CHECK14: omp.inner.for.body: 6568 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6569 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 6570 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6571 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 6572 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 6573 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64 6574 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 6575 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 6576 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6577 // CHECK14: omp.body.continue: 6578 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6579 // CHECK14: omp.inner.for.inc: 6580 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6581 // CHECK14-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 6582 // CHECK14-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 6583 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 6584 // CHECK14: omp.inner.for.end: 6585 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4 6586 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 6587 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 6588 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 6589 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 6590 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 6591 // CHECK14: omp.inner.for.cond7: 6592 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6593 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !15 6594 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6595 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]] 6596 // CHECK14: omp.inner.for.body9: 6597 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6598 // CHECK14-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 6599 // CHECK14-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 6600 // CHECK14-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !15 6601 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !15 6602 // CHECK14-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64 6603 // CHECK14-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]] 6604 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !15 6605 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]] 6606 // CHECK14: omp.body.continue14: 6607 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]] 6608 // CHECK14: omp.inner.for.inc15: 6609 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6610 // CHECK14-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1 6611 // CHECK14-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !15 6612 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]] 6613 // CHECK14: omp.inner.for.end17: 6614 // CHECK14-NEXT: store i32 10, i32* [[I6]], align 4 6615 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4 6616 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4 6617 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4 6618 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV21]], align 4 6619 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 6620 // CHECK14: omp.inner.for.cond23: 6621 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6622 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !18 6623 // CHECK14-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 6624 // CHECK14-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]] 6625 // CHECK14: omp.inner.for.body25: 6626 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6627 // CHECK14-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1 6628 // CHECK14-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 6629 // CHECK14-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !18 6630 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !18 6631 // CHECK14-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64 6632 // CHECK14-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]] 6633 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !18 6634 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]] 6635 // CHECK14: omp.body.continue30: 6636 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]] 6637 // CHECK14: omp.inner.for.inc31: 6638 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6639 // CHECK14-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1 6640 // CHECK14-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !18 6641 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]] 6642 // CHECK14: omp.inner.for.end33: 6643 // CHECK14-NEXT: store i32 10, i32* [[I22]], align 4 6644 // CHECK14-NEXT: ret i32 0 6645 // 6646 // 6647 // CHECK15-LABEL: define {{[^@]+}}@main 6648 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6649 // CHECK15-NEXT: entry: 6650 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6651 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6652 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 6653 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 6654 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 6655 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 6656 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6657 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6658 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6659 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6660 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6661 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6662 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6663 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 6664 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 6665 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 6666 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 6667 // CHECK15-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 6668 // CHECK15-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 6669 // CHECK15-NEXT: [[I18:%.*]] = alloca i32, align 4 6670 // CHECK15-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 6671 // CHECK15-NEXT: [[I22:%.*]] = alloca i32, align 4 6672 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 6673 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 6674 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 6675 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 6676 // CHECK15-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 6677 // CHECK15-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 6678 // CHECK15-NEXT: [[I47:%.*]] = alloca i32, align 4 6679 // CHECK15-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 6680 // CHECK15-NEXT: [[I51:%.*]] = alloca i32, align 4 6681 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 6682 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6683 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 6684 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 6685 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6686 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 6687 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 6688 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 6689 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 6690 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 6691 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 6692 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6693 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 6694 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6695 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6696 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6697 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6698 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6699 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 6700 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 6701 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6702 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6703 // CHECK15-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 6704 // CHECK15: simd.if.then: 6705 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6706 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 6707 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6708 // CHECK15: omp.inner.for.cond: 6709 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6710 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 6711 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6712 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6713 // CHECK15: omp.inner.for.body: 6714 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6715 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 6716 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6717 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3 6718 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3 6719 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]] 6720 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 6721 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6722 // CHECK15: omp.body.continue: 6723 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6724 // CHECK15: omp.inner.for.inc: 6725 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6726 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 6727 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 6728 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 6729 // CHECK15: omp.inner.for.end: 6730 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6731 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 6732 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 6733 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 6734 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 6735 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 6736 // CHECK15-NEXT: br label [[SIMD_IF_END]] 6737 // CHECK15: simd.if.end: 6738 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4 6739 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4 6740 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6741 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 6742 // CHECK15-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 6743 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 6744 // CHECK15-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 6745 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 6746 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 6747 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4 6748 // CHECK15-NEXT: store i32 0, i32* [[I18]], align 4 6749 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6750 // CHECK15-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 6751 // CHECK15-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 6752 // CHECK15: simd.if.then20: 6753 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 6754 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4 6755 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 6756 // CHECK15: omp.inner.for.cond23: 6757 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 6758 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7 6759 // CHECK15-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 6760 // CHECK15-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 6761 // CHECK15: omp.inner.for.body25: 6762 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 6763 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 6764 // CHECK15-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 6765 // CHECK15-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7 6766 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7 6767 // CHECK15-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]] 6768 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7 6769 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 6770 // CHECK15: omp.body.continue29: 6771 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 6772 // CHECK15: omp.inner.for.inc30: 6773 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 6774 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 6775 // CHECK15-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 6776 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 6777 // CHECK15: omp.inner.for.end32: 6778 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 6779 // CHECK15-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 6780 // CHECK15-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 6781 // CHECK15-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 6782 // CHECK15-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 6783 // CHECK15-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4 6784 // CHECK15-NEXT: br label [[SIMD_IF_END37]] 6785 // CHECK15: simd.if.end37: 6786 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4 6787 // CHECK15-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4 6788 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 6789 // CHECK15-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4 6790 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 6791 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 6792 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 6793 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 6794 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4 6795 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4 6796 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 6797 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4 6798 // CHECK15-NEXT: store i32 0, i32* [[I47]], align 4 6799 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 6800 // CHECK15-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 6801 // CHECK15-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 6802 // CHECK15: simd.if.then49: 6803 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4 6804 // CHECK15-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4 6805 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 6806 // CHECK15: omp.inner.for.cond52: 6807 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 6808 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10 6809 // CHECK15-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 6810 // CHECK15-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 6811 // CHECK15: omp.inner.for.body54: 6812 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 6813 // CHECK15-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 6814 // CHECK15-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 6815 // CHECK15-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10 6816 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10 6817 // CHECK15-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]] 6818 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10 6819 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 6820 // CHECK15: omp.body.continue58: 6821 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 6822 // CHECK15: omp.inner.for.inc59: 6823 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 6824 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 6825 // CHECK15-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 6826 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 6827 // CHECK15: omp.inner.for.end61: 6828 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 6829 // CHECK15-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 6830 // CHECK15-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 6831 // CHECK15-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 6832 // CHECK15-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 6833 // CHECK15-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4 6834 // CHECK15-NEXT: br label [[SIMD_IF_END66]] 6835 // CHECK15: simd.if.end66: 6836 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 6837 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]]) 6838 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6839 // CHECK15-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 6840 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP37]]) 6841 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4 6842 // CHECK15-NEXT: ret i32 [[TMP38]] 6843 // 6844 // 6845 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 6846 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 6847 // CHECK15-NEXT: entry: 6848 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6849 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 6850 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6851 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6852 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6853 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6854 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6855 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 6856 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 6857 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 6858 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 6859 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4 6860 // CHECK15-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 6861 // CHECK15-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 6862 // CHECK15-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 6863 // CHECK15-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 6864 // CHECK15-NEXT: [[I21:%.*]] = alloca i32, align 4 6865 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6866 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6867 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6868 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6869 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 6870 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6871 // CHECK15: omp.inner.for.cond: 6872 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6873 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 6874 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 6875 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6876 // CHECK15: omp.inner.for.body: 6877 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6878 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 6879 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6880 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 6881 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 6882 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]] 6883 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 6884 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6885 // CHECK15: omp.body.continue: 6886 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6887 // CHECK15: omp.inner.for.inc: 6888 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6889 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 6890 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6891 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 6892 // CHECK15: omp.inner.for.end: 6893 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4 6894 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 6895 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 6896 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 6897 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 6898 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 6899 // CHECK15: omp.inner.for.cond7: 6900 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 6901 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16 6902 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 6903 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 6904 // CHECK15: omp.inner.for.body9: 6905 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 6906 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 6907 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 6908 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16 6909 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16 6910 // CHECK15-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]] 6911 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16 6912 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 6913 // CHECK15: omp.body.continue13: 6914 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 6915 // CHECK15: omp.inner.for.inc14: 6916 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 6917 // CHECK15-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 6918 // CHECK15-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 6919 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]] 6920 // CHECK15: omp.inner.for.end16: 6921 // CHECK15-NEXT: store i32 10, i32* [[I6]], align 4 6922 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 6923 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4 6924 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 6925 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4 6926 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 6927 // CHECK15: omp.inner.for.cond22: 6928 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 6929 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19 6930 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 6931 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 6932 // CHECK15: omp.inner.for.body24: 6933 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 6934 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1 6935 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 6936 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19 6937 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19 6938 // CHECK15-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]] 6939 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19 6940 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 6941 // CHECK15: omp.body.continue28: 6942 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 6943 // CHECK15: omp.inner.for.inc29: 6944 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 6945 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1 6946 // CHECK15-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 6947 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]] 6948 // CHECK15: omp.inner.for.end31: 6949 // CHECK15-NEXT: store i32 10, i32* [[I21]], align 4 6950 // CHECK15-NEXT: ret i32 0 6951 // 6952 // 6953 // CHECK16-LABEL: define {{[^@]+}}@main 6954 // CHECK16-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6955 // CHECK16-NEXT: entry: 6956 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6957 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6958 // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 6959 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4 6960 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 6961 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 6962 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 6963 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6964 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6965 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6966 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6967 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 6968 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6969 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 6970 // CHECK16-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 6971 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 6972 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4 6973 // CHECK16-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4 6974 // CHECK16-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4 6975 // CHECK16-NEXT: [[I18:%.*]] = alloca i32, align 4 6976 // CHECK16-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4 6977 // CHECK16-NEXT: [[I22:%.*]] = alloca i32, align 4 6978 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 6979 // CHECK16-NEXT: [[_TMP39:%.*]] = alloca i32, align 4 6980 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4 6981 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 6982 // CHECK16-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4 6983 // CHECK16-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4 6984 // CHECK16-NEXT: [[I47:%.*]] = alloca i32, align 4 6985 // CHECK16-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4 6986 // CHECK16-NEXT: [[I51:%.*]] = alloca i32, align 4 6987 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 6988 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6989 // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 6990 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4 6991 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6992 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 6993 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 6994 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 6995 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 6996 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 6997 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 6998 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6999 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 7000 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7001 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7002 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7003 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7004 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7005 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4 7006 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 7007 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7008 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7009 // CHECK16-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 7010 // CHECK16: simd.if.then: 7011 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7012 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 7013 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7014 // CHECK16: omp.inner.for.cond: 7015 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 7016 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3 7017 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7018 // CHECK16-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7019 // CHECK16: omp.inner.for.body: 7020 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 7021 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 7022 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7023 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3 7024 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3 7025 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]] 7026 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3 7027 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7028 // CHECK16: omp.body.continue: 7029 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7030 // CHECK16: omp.inner.for.inc: 7031 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 7032 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1 7033 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3 7034 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 7035 // CHECK16: omp.inner.for.end: 7036 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7037 // CHECK16-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0 7038 // CHECK16-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1 7039 // CHECK16-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1 7040 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]] 7041 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4 7042 // CHECK16-NEXT: br label [[SIMD_IF_END]] 7043 // CHECK16: simd.if.end: 7044 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4 7045 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4 7046 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 7047 // CHECK16-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0 7048 // CHECK16-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1 7049 // CHECK16-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1 7050 // CHECK16-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4 7051 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4 7052 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4 7053 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4 7054 // CHECK16-NEXT: store i32 0, i32* [[I18]], align 4 7055 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 7056 // CHECK16-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]] 7057 // CHECK16-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]] 7058 // CHECK16: simd.if.then20: 7059 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4 7060 // CHECK16-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4 7061 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]] 7062 // CHECK16: omp.inner.for.cond23: 7063 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 7064 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7 7065 // CHECK16-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 7066 // CHECK16-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]] 7067 // CHECK16: omp.inner.for.body25: 7068 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 7069 // CHECK16-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1 7070 // CHECK16-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]] 7071 // CHECK16-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7 7072 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7 7073 // CHECK16-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]] 7074 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7 7075 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]] 7076 // CHECK16: omp.body.continue29: 7077 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]] 7078 // CHECK16: omp.inner.for.inc30: 7079 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 7080 // CHECK16-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1 7081 // CHECK16-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7 7082 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]] 7083 // CHECK16: omp.inner.for.end32: 7084 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 7085 // CHECK16-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0 7086 // CHECK16-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1 7087 // CHECK16-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1 7088 // CHECK16-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]] 7089 // CHECK16-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4 7090 // CHECK16-NEXT: br label [[SIMD_IF_END37]] 7091 // CHECK16: simd.if.end37: 7092 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[N]], align 4 7093 // CHECK16-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4 7094 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4 7095 // CHECK16-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4 7096 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 7097 // CHECK16-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0 7098 // CHECK16-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1 7099 // CHECK16-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1 7100 // CHECK16-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4 7101 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4 7102 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 7103 // CHECK16-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4 7104 // CHECK16-NEXT: store i32 0, i32* [[I47]], align 4 7105 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 7106 // CHECK16-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]] 7107 // CHECK16-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]] 7108 // CHECK16: simd.if.then49: 7109 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4 7110 // CHECK16-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4 7111 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]] 7112 // CHECK16: omp.inner.for.cond52: 7113 // CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 7114 // CHECK16-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10 7115 // CHECK16-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]] 7116 // CHECK16-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]] 7117 // CHECK16: omp.inner.for.body54: 7118 // CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 7119 // CHECK16-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1 7120 // CHECK16-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]] 7121 // CHECK16-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10 7122 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10 7123 // CHECK16-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]] 7124 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10 7125 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]] 7126 // CHECK16: omp.body.continue58: 7127 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]] 7128 // CHECK16: omp.inner.for.inc59: 7129 // CHECK16-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 7130 // CHECK16-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1 7131 // CHECK16-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10 7132 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]] 7133 // CHECK16: omp.inner.for.end61: 7134 // CHECK16-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4 7135 // CHECK16-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0 7136 // CHECK16-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1 7137 // CHECK16-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1 7138 // CHECK16-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]] 7139 // CHECK16-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4 7140 // CHECK16-NEXT: br label [[SIMD_IF_END66]] 7141 // CHECK16: simd.if.end66: 7142 // CHECK16-NEXT: [[TMP36:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 7143 // CHECK16-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]]) 7144 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 7145 // CHECK16-NEXT: [[TMP37:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 7146 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP37]]) 7147 // CHECK16-NEXT: [[TMP38:%.*]] = load i32, i32* [[RETVAL]], align 4 7148 // CHECK16-NEXT: ret i32 [[TMP38]] 7149 // 7150 // 7151 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 7152 // CHECK16-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat { 7153 // CHECK16-NEXT: entry: 7154 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7155 // CHECK16-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 7156 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 7157 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7158 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7159 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7160 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 7161 // CHECK16-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 7162 // CHECK16-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4 7163 // CHECK16-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4 7164 // CHECK16-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4 7165 // CHECK16-NEXT: [[I6:%.*]] = alloca i32, align 4 7166 // CHECK16-NEXT: [[_TMP17:%.*]] = alloca i32, align 4 7167 // CHECK16-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4 7168 // CHECK16-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4 7169 // CHECK16-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4 7170 // CHECK16-NEXT: [[I21:%.*]] = alloca i32, align 4 7171 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7172 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7173 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7174 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7175 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4 7176 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7177 // CHECK16: omp.inner.for.cond: 7178 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7179 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 7180 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]] 7181 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7182 // CHECK16: omp.inner.for.body: 7183 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7184 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1 7185 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7186 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 7187 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 7188 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]] 7189 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 7190 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7191 // CHECK16: omp.body.continue: 7192 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7193 // CHECK16: omp.inner.for.inc: 7194 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7195 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1 7196 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7197 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 7198 // CHECK16: omp.inner.for.end: 7199 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4 7200 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4 7201 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4 7202 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4 7203 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4 7204 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]] 7205 // CHECK16: omp.inner.for.cond7: 7206 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 7207 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !16 7208 // CHECK16-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 7209 // CHECK16-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]] 7210 // CHECK16: omp.inner.for.body9: 7211 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 7212 // CHECK16-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1 7213 // CHECK16-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]] 7214 // CHECK16-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !16 7215 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !16 7216 // CHECK16-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]] 7217 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !16 7218 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]] 7219 // CHECK16: omp.body.continue13: 7220 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]] 7221 // CHECK16: omp.inner.for.inc14: 7222 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 7223 // CHECK16-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1 7224 // CHECK16-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !16 7225 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]] 7226 // CHECK16: omp.inner.for.end16: 7227 // CHECK16-NEXT: store i32 10, i32* [[I6]], align 4 7228 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4 7229 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4 7230 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4 7231 // CHECK16-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV20]], align 4 7232 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]] 7233 // CHECK16: omp.inner.for.cond22: 7234 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 7235 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !19 7236 // CHECK16-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 7237 // CHECK16-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]] 7238 // CHECK16: omp.inner.for.body24: 7239 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 7240 // CHECK16-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1 7241 // CHECK16-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]] 7242 // CHECK16-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !19 7243 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !19 7244 // CHECK16-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP16]] 7245 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !19 7246 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]] 7247 // CHECK16: omp.body.continue28: 7248 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]] 7249 // CHECK16: omp.inner.for.inc29: 7250 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 7251 // CHECK16-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1 7252 // CHECK16-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !19 7253 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]] 7254 // CHECK16: omp.inner.for.end31: 7255 // CHECK16-NEXT: store i32 10, i32* [[I21]], align 4 7256 // CHECK16-NEXT: ret i32 0 7257 // 7258