1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
20
21 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
22 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
23 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
24 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
25 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
26 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
27
28 #ifdef CK1
29
30 template <typename T, int X, long long Y>
31 struct SS{
32 T a[X];
33 float b;
fooSS34 int foo(void) {
35
36 #pragma omp target teams distribute parallel for simd
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
39 }
40 #pragma omp target teams distribute parallel for simd schedule(static)
41 for(int i = 0; i < X; i++) {
42 a[i] = (T)0;
43 }
44 #pragma omp target teams distribute parallel for simd schedule(static, X/2)
45 for(int i = 0; i < X; i++) {
46 a[i] = (T)0;
47 }
48
49 #pragma omp target teams distribute parallel for simd schedule(dynamic)
50 for(int i = 0; i < X; i++) {
51 a[i] = (T)0;
52 }
53
54 #pragma omp target teams distribute parallel for simd schedule(dynamic, X/2)
55 for(int i = 0; i < X; i++) {
56 a[i] = (T)0;
57 }
58
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73
74 return a[0];
75 }
76 };
77
teams_template_struct(void)78 int teams_template_struct(void) {
79 SS<int, 123, 456> V;
80 return V.foo();
81
82 }
83 #endif // CK1
84
85 // Test host codegen.
86 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
87 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
88 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
89 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
90 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
91 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
92
93 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
94 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
95 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
96 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
97 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
98 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19
99
100 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21
101 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
102 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21
103 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23
104 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
105 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK23
106 #ifdef CK2
107
108 template <typename T, int n>
tmain(T argc)109 int tmain(T argc) {
110 T a[n];
111 int m = 10;
112 #pragma omp target teams distribute parallel for simd
113 for(int i = 0; i < n; i++) {
114 a[i] = (T)0;
115 }
116 #pragma omp target teams distribute parallel for simd schedule(static)
117 for(int i = 0; i < n; i++) {
118 a[i] = (T)0;
119 }
120 #pragma omp target teams distribute parallel for simd schedule(static, m)
121 for(int i = 0; i < n; i++) {
122 a[i] = (T)0;
123 }
124 #pragma omp target teams distribute parallel for simd schedule(dynamic)
125 for(int i = 0; i < n; i++) {
126 a[i] = (T)0;
127 }
128 #pragma omp target teams distribute parallel for simd schedule(dynamic, m)
129 for(int i = 0; i < n; i++) {
130 a[i] = (T)0;
131 }
132 return 0;
133 }
134
main(int argc,char ** argv)135 int main (int argc, char **argv) {
136 int n = 100;
137 int a[n];
138 int m = 10;
139 #pragma omp target teams distribute parallel for simd
140 for(int i = 0; i < n; i++) {
141 a[i] = 0;
142 }
143 #pragma omp target teams distribute parallel for simd dist_schedule(static)
144 for(int i = 0; i < n; i++) {
145 a[i] = 0;
146 }
147 #pragma omp target teams distribute parallel for simd dist_schedule(static, m)
148 for(int i = 0; i < n; i++) {
149 a[i] = 0;
150 }
151 #pragma omp target teams distribute parallel for simd schedule(dynamic)
152 for(int i = 0; i < n; i++) {
153 a[i] = 0;
154 }
155 #pragma omp target teams distribute parallel for simd schedule(dynamic, m)
156 for(int i = 0; i < n; i++) {
157 a[i] = 0;
158 }
159 return tmain<int, 10>(argc);
160 }
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195 #endif // CK2
196 #endif // #ifndef HEADER
197 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
198 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
199 // CHECK1-NEXT: entry:
200 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
201 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
202 // CHECK1-NEXT: ret i32 [[CALL]]
203 //
204 //
205 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
206 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
207 // CHECK1-NEXT: entry:
208 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
209 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
210 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
211 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
212 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
213 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
214 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
215 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
216 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
218 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
219 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
220 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
221 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 8
222 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 8
223 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 8
224 // CHECK1-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
225 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 8
226 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 8
227 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 8
228 // CHECK1-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
229 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
230 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
231 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
232 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
233 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
234 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
235 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
236 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
237 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
238 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
239 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
240 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
241 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
242 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
243 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
244 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
245 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
246 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
247 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
248 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
249 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
250 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
251 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
252 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
253 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
254 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
255 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
256 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
257 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
258 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
259 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
260 // CHECK1-NEXT: store i64 123, i64* [[TMP15]], align 8
261 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
262 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
263 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
264 // CHECK1: omp_offload.failed:
265 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
266 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
267 // CHECK1: omp_offload.cont:
268 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
269 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
270 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
271 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
272 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
273 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
274 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
275 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
276 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
277 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
278 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
279 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
280 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
281 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4
282 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
283 // CHECK1-NEXT: store i32 1, i32* [[TMP26]], align 4
284 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
285 // CHECK1-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
286 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
287 // CHECK1-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
288 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
289 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 8
290 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
291 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 8
292 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
293 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8
294 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
295 // CHECK1-NEXT: store i8** null, i8*** [[TMP32]], align 8
296 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
297 // CHECK1-NEXT: store i64 123, i64* [[TMP33]], align 8
298 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
299 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
300 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
301 // CHECK1: omp_offload.failed8:
302 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
303 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
304 // CHECK1: omp_offload.cont9:
305 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
306 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
307 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
308 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
309 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
310 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
311 // CHECK1-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
312 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
313 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8
314 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
315 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
316 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
317 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
318 // CHECK1-NEXT: store i32 1, i32* [[TMP43]], align 4
319 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
320 // CHECK1-NEXT: store i32 1, i32* [[TMP44]], align 4
321 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
322 // CHECK1-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
323 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
324 // CHECK1-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
325 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
326 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 8
327 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
328 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 8
329 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
330 // CHECK1-NEXT: store i8** null, i8*** [[TMP49]], align 8
331 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
332 // CHECK1-NEXT: store i8** null, i8*** [[TMP50]], align 8
333 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
334 // CHECK1-NEXT: store i64 123, i64* [[TMP51]], align 8
335 // CHECK1-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
336 // CHECK1-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
337 // CHECK1-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
338 // CHECK1: omp_offload.failed16:
339 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
340 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]
341 // CHECK1: omp_offload.cont17:
342 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
343 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
344 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
345 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 8
346 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
347 // CHECK1-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
348 // CHECK1-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 8
349 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
350 // CHECK1-NEXT: store i8* null, i8** [[TMP58]], align 8
351 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
352 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
353 // CHECK1-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
354 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
355 // CHECK1-NEXT: store i32 1, i32* [[TMP61]], align 4
356 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
357 // CHECK1-NEXT: store i32 1, i32* [[TMP62]], align 4
358 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
359 // CHECK1-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 8
360 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
361 // CHECK1-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 8
362 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
363 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 8
364 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
365 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 8
366 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
367 // CHECK1-NEXT: store i8** null, i8*** [[TMP67]], align 8
368 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
369 // CHECK1-NEXT: store i8** null, i8*** [[TMP68]], align 8
370 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
371 // CHECK1-NEXT: store i64 123, i64* [[TMP69]], align 8
372 // CHECK1-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
373 // CHECK1-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
374 // CHECK1-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
375 // CHECK1: omp_offload.failed24:
376 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
377 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT25]]
378 // CHECK1: omp_offload.cont25:
379 // CHECK1-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
380 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
381 // CHECK1-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
382 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 8
383 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
384 // CHECK1-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
385 // CHECK1-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 8
386 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
387 // CHECK1-NEXT: store i8* null, i8** [[TMP76]], align 8
388 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
389 // CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
390 // CHECK1-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
391 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
392 // CHECK1-NEXT: store i32 1, i32* [[TMP79]], align 4
393 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
394 // CHECK1-NEXT: store i32 1, i32* [[TMP80]], align 4
395 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
396 // CHECK1-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 8
397 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
398 // CHECK1-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 8
399 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
400 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 8
401 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
402 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 8
403 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
404 // CHECK1-NEXT: store i8** null, i8*** [[TMP85]], align 8
405 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
406 // CHECK1-NEXT: store i8** null, i8*** [[TMP86]], align 8
407 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
408 // CHECK1-NEXT: store i64 123, i64* [[TMP87]], align 8
409 // CHECK1-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
410 // CHECK1-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
411 // CHECK1-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
412 // CHECK1: omp_offload.failed32:
413 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
414 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT33]]
415 // CHECK1: omp_offload.cont33:
416 // CHECK1-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
417 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i64 0, i64 0
418 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
419 // CHECK1-NEXT: ret i32 [[TMP90]]
420 //
421 //
422 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
423 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
424 // CHECK1-NEXT: entry:
425 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
426 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
427 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
428 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
429 // CHECK1-NEXT: ret void
430 //
431 //
432 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
433 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
434 // CHECK1-NEXT: entry:
435 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
436 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
437 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
438 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
439 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
440 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
443 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
444 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
445 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
446 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
447 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
448 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
449 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
450 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
451 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
452 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
453 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
454 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
455 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
456 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
457 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
458 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
459 // CHECK1: cond.true:
460 // CHECK1-NEXT: br label [[COND_END:%.*]]
461 // CHECK1: cond.false:
462 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
463 // CHECK1-NEXT: br label [[COND_END]]
464 // CHECK1: cond.end:
465 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
466 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
467 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
468 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
469 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
470 // CHECK1: omp.inner.for.cond:
471 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
472 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
473 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
474 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
475 // CHECK1: omp.inner.for.body:
476 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8
477 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
478 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
479 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
480 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8
481 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
482 // CHECK1: omp.inner.for.inc:
483 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
484 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8
485 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
486 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
487 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
488 // CHECK1: omp.inner.for.end:
489 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
490 // CHECK1: omp.loop.exit:
491 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
492 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
493 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
494 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
495 // CHECK1: .omp.final.then:
496 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
497 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
498 // CHECK1: .omp.final.done:
499 // CHECK1-NEXT: ret void
500 //
501 //
502 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
503 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
504 // CHECK1-NEXT: entry:
505 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
506 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
507 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
508 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
509 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
510 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
511 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
512 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
513 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
514 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
515 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
516 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
517 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
518 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
519 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
520 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
521 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
522 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
523 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
524 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
525 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
526 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
527 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
528 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
529 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
530 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
531 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
532 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
533 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
534 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
535 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
536 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
537 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
538 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
539 // CHECK1: cond.true:
540 // CHECK1-NEXT: br label [[COND_END:%.*]]
541 // CHECK1: cond.false:
542 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
543 // CHECK1-NEXT: br label [[COND_END]]
544 // CHECK1: cond.end:
545 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
546 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
547 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
548 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
549 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
550 // CHECK1: omp.inner.for.cond:
551 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
552 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
553 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
554 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
555 // CHECK1: omp.inner.for.body:
556 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
557 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
558 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
559 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
560 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
561 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
562 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
563 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
564 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
565 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
566 // CHECK1: omp.body.continue:
567 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
568 // CHECK1: omp.inner.for.inc:
569 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
570 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
571 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
572 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
573 // CHECK1: omp.inner.for.end:
574 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
575 // CHECK1: omp.loop.exit:
576 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
577 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
578 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
579 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
580 // CHECK1: .omp.final.then:
581 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
582 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
583 // CHECK1: .omp.final.done:
584 // CHECK1-NEXT: ret void
585 //
586 //
587 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
588 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
589 // CHECK1-NEXT: entry:
590 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
591 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
592 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
593 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
594 // CHECK1-NEXT: ret void
595 //
596 //
597 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
598 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
599 // CHECK1-NEXT: entry:
600 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
601 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
602 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
603 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
604 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
605 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
606 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
607 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
608 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
609 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
610 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
611 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
612 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
613 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
614 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
615 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
616 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
617 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
618 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
619 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
620 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
621 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
622 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
623 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
624 // CHECK1: cond.true:
625 // CHECK1-NEXT: br label [[COND_END:%.*]]
626 // CHECK1: cond.false:
627 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
628 // CHECK1-NEXT: br label [[COND_END]]
629 // CHECK1: cond.end:
630 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
631 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
632 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
633 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
634 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
635 // CHECK1: omp.inner.for.cond:
636 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
637 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
638 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
639 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
640 // CHECK1: omp.inner.for.body:
641 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17
642 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
643 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
644 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
645 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17
646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
647 // CHECK1: omp.inner.for.inc:
648 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
649 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17
650 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
651 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
652 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
653 // CHECK1: omp.inner.for.end:
654 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
655 // CHECK1: omp.loop.exit:
656 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
657 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
658 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
659 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
660 // CHECK1: .omp.final.then:
661 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
662 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
663 // CHECK1: .omp.final.done:
664 // CHECK1-NEXT: ret void
665 //
666 //
667 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
668 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
669 // CHECK1-NEXT: entry:
670 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
671 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
672 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
673 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
674 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
675 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
676 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
677 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
678 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
679 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
680 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
681 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
682 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
683 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
684 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
685 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
686 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
687 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
688 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
689 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
690 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
691 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
692 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
693 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
694 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
695 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
696 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
697 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
698 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
699 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
700 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
701 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
702 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
703 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
704 // CHECK1: cond.true:
705 // CHECK1-NEXT: br label [[COND_END:%.*]]
706 // CHECK1: cond.false:
707 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
708 // CHECK1-NEXT: br label [[COND_END]]
709 // CHECK1: cond.end:
710 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
711 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
712 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
713 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
714 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
715 // CHECK1: omp.inner.for.cond:
716 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
717 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
718 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
719 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
720 // CHECK1: omp.inner.for.body:
721 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
722 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
723 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
724 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
725 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
726 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
727 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
728 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
729 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
730 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
731 // CHECK1: omp.body.continue:
732 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
733 // CHECK1: omp.inner.for.inc:
734 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
735 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
736 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
737 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
738 // CHECK1: omp.inner.for.end:
739 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
740 // CHECK1: omp.loop.exit:
741 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
742 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
743 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
744 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
745 // CHECK1: .omp.final.then:
746 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
747 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
748 // CHECK1: .omp.final.done:
749 // CHECK1-NEXT: ret void
750 //
751 //
752 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
753 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
754 // CHECK1-NEXT: entry:
755 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
756 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
757 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
758 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
759 // CHECK1-NEXT: ret void
760 //
761 //
762 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
763 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
764 // CHECK1-NEXT: entry:
765 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
766 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
767 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
768 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
769 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
770 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
771 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
772 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
773 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
774 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
775 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
776 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
777 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
778 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
779 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
780 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
781 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
782 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
783 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
784 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
785 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
786 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
787 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
788 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
789 // CHECK1: cond.true:
790 // CHECK1-NEXT: br label [[COND_END:%.*]]
791 // CHECK1: cond.false:
792 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
793 // CHECK1-NEXT: br label [[COND_END]]
794 // CHECK1: cond.end:
795 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
796 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
797 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
798 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
799 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
800 // CHECK1: omp.inner.for.cond:
801 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
802 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
803 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
804 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
805 // CHECK1: omp.inner.for.body:
806 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
807 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
808 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
809 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
810 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23
811 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
812 // CHECK1: omp.inner.for.inc:
813 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
814 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
815 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
816 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
817 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
818 // CHECK1: omp.inner.for.end:
819 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
820 // CHECK1: omp.loop.exit:
821 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
822 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
823 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
824 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
825 // CHECK1: .omp.final.then:
826 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
827 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
828 // CHECK1: .omp.final.done:
829 // CHECK1-NEXT: ret void
830 //
831 //
832 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
833 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
834 // CHECK1-NEXT: entry:
835 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
836 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
837 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
838 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
839 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
840 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
841 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
842 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
843 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
844 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
845 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
846 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
847 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
848 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
849 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
850 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
851 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
852 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
853 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
854 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
855 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
856 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
857 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
858 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
859 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
860 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
861 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
862 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
863 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
864 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
865 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
866 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
867 // CHECK1: omp.dispatch.cond:
868 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
869 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
870 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
871 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
872 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
873 // CHECK1: cond.true:
874 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
875 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
876 // CHECK1-NEXT: br label [[COND_END:%.*]]
877 // CHECK1: cond.false:
878 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
879 // CHECK1-NEXT: br label [[COND_END]]
880 // CHECK1: cond.end:
881 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
882 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
883 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
884 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
885 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
886 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
887 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
888 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
889 // CHECK1: omp.dispatch.body:
890 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
891 // CHECK1: omp.inner.for.cond:
892 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
893 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
894 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
895 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
896 // CHECK1: omp.inner.for.body:
897 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
898 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
899 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
900 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
901 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
902 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26
903 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
904 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
905 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
906 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
907 // CHECK1: omp.body.continue:
908 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
909 // CHECK1: omp.inner.for.inc:
910 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
911 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
912 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
913 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
914 // CHECK1: omp.inner.for.end:
915 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
916 // CHECK1: omp.dispatch.inc:
917 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
918 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
919 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
920 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
921 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
922 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
923 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
924 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
925 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
926 // CHECK1: omp.dispatch.end:
927 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
928 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
929 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
930 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
931 // CHECK1: .omp.final.then:
932 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
933 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
934 // CHECK1: .omp.final.done:
935 // CHECK1-NEXT: ret void
936 //
937 //
938 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
939 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
940 // CHECK1-NEXT: entry:
941 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
942 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
943 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
944 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
945 // CHECK1-NEXT: ret void
946 //
947 //
948 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
949 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
950 // CHECK1-NEXT: entry:
951 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
952 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
953 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
954 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
955 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
956 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
957 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
958 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
959 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
960 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
961 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
962 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
963 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
964 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
965 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
966 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
967 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
968 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
969 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
970 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
971 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
972 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
973 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
974 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
975 // CHECK1: cond.true:
976 // CHECK1-NEXT: br label [[COND_END:%.*]]
977 // CHECK1: cond.false:
978 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
979 // CHECK1-NEXT: br label [[COND_END]]
980 // CHECK1: cond.end:
981 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
982 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
983 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
984 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
985 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
986 // CHECK1: omp.inner.for.cond:
987 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
988 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
989 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
990 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
991 // CHECK1: omp.inner.for.body:
992 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
993 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
994 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
995 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
996 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29
997 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
998 // CHECK1: omp.inner.for.inc:
999 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
1000 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
1001 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1002 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
1003 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
1004 // CHECK1: omp.inner.for.end:
1005 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1006 // CHECK1: omp.loop.exit:
1007 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1008 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1009 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1010 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1011 // CHECK1: .omp.final.then:
1012 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
1013 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1014 // CHECK1: .omp.final.done:
1015 // CHECK1-NEXT: ret void
1016 //
1017 //
1018 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1019 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1020 // CHECK1-NEXT: entry:
1021 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1022 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1023 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1024 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1025 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1026 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1027 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1028 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1029 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1030 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1031 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1032 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1033 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1034 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1035 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1036 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1037 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1038 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1039 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1040 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1041 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1042 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1043 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1044 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1045 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1046 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1047 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1048 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1049 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1050 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1051 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1052 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1053 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1054 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1055 // CHECK1: omp.dispatch.cond:
1056 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1057 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1058 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1059 // CHECK1: omp.dispatch.body:
1060 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1061 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1062 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1063 // CHECK1: omp.inner.for.cond:
1064 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1065 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
1066 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1067 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1068 // CHECK1: omp.inner.for.body:
1069 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1070 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1071 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1072 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
1073 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1074 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32
1075 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1076 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1077 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
1078 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1079 // CHECK1: omp.body.continue:
1080 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1081 // CHECK1: omp.inner.for.inc:
1082 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1083 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1084 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
1085 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
1086 // CHECK1: omp.inner.for.end:
1087 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1088 // CHECK1: omp.dispatch.inc:
1089 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1090 // CHECK1: omp.dispatch.end:
1091 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1092 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1093 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1094 // CHECK1: .omp.final.then:
1095 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
1096 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1097 // CHECK1: .omp.final.done:
1098 // CHECK1-NEXT: ret void
1099 //
1100 //
1101 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
1102 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1103 // CHECK1-NEXT: entry:
1104 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1105 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1106 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1107 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1108 // CHECK1-NEXT: ret void
1109 //
1110 //
1111 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1112 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1113 // CHECK1-NEXT: entry:
1114 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1115 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1116 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1117 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1118 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1119 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1120 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1121 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1122 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1123 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1124 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1125 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1126 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1127 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1128 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1129 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1130 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1131 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1132 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1133 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1134 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1135 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1136 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1137 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1138 // CHECK1: cond.true:
1139 // CHECK1-NEXT: br label [[COND_END:%.*]]
1140 // CHECK1: cond.false:
1141 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1142 // CHECK1-NEXT: br label [[COND_END]]
1143 // CHECK1: cond.end:
1144 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1145 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1146 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1147 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1148 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1149 // CHECK1: omp.inner.for.cond:
1150 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
1151 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
1152 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1153 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1154 // CHECK1: omp.inner.for.body:
1155 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
1156 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1157 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
1158 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1159 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35
1160 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1161 // CHECK1: omp.inner.for.inc:
1162 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
1163 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
1164 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1165 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
1166 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
1167 // CHECK1: omp.inner.for.end:
1168 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1169 // CHECK1: omp.loop.exit:
1170 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1171 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1172 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1173 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1174 // CHECK1: .omp.final.then:
1175 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
1176 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1177 // CHECK1: .omp.final.done:
1178 // CHECK1-NEXT: ret void
1179 //
1180 //
1181 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1182 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1183 // CHECK1-NEXT: entry:
1184 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1185 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1186 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1187 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1188 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1189 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1190 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1191 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1192 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1193 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1194 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1195 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1196 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1197 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1198 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1199 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1200 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1201 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1202 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1203 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1204 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1205 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1206 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1207 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1208 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1209 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1210 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1211 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1212 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1213 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1214 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1215 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1216 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1217 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1218 // CHECK1: omp.dispatch.cond:
1219 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1220 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1221 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1222 // CHECK1: omp.dispatch.body:
1223 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1224 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1225 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1226 // CHECK1: omp.inner.for.cond:
1227 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1228 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
1229 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1230 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1231 // CHECK1: omp.inner.for.body:
1232 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1233 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1234 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1235 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
1236 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1237 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38
1238 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1239 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1240 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
1241 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1242 // CHECK1: omp.body.continue:
1243 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1244 // CHECK1: omp.inner.for.inc:
1245 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1246 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1247 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
1248 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
1249 // CHECK1: omp.inner.for.end:
1250 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1251 // CHECK1: omp.dispatch.inc:
1252 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1253 // CHECK1: omp.dispatch.end:
1254 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1255 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1256 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1257 // CHECK1: .omp.final.then:
1258 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
1259 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1260 // CHECK1: .omp.final.done:
1261 // CHECK1-NEXT: ret void
1262 //
1263 //
1264 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1265 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1266 // CHECK1-NEXT: entry:
1267 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1268 // CHECK1-NEXT: ret void
1269 //
1270 //
1271 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1272 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1273 // CHECK3-NEXT: entry:
1274 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1275 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
1276 // CHECK3-NEXT: ret i32 [[CALL]]
1277 //
1278 //
1279 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1280 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1281 // CHECK3-NEXT: entry:
1282 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1283 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1284 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1285 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1286 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1287 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1288 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1289 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1290 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
1291 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
1292 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
1293 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
1294 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
1295 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 4
1296 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 4
1297 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 4
1298 // CHECK3-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
1299 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 4
1300 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 4
1301 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 4
1302 // CHECK3-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
1303 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1304 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1305 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1306 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1307 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1308 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
1309 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1310 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1311 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
1312 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1313 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
1314 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1315 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1316 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1317 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1318 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
1319 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1320 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
1321 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1322 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1323 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1324 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1325 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1326 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
1327 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1328 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
1329 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1330 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
1331 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1332 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
1333 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1334 // CHECK3-NEXT: store i64 123, i64* [[TMP15]], align 8
1335 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1336 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1337 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1338 // CHECK3: omp_offload.failed:
1339 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1340 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1341 // CHECK3: omp_offload.cont:
1342 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1343 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1344 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1345 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
1346 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1347 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1348 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
1349 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1350 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
1351 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1352 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1353 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1354 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
1355 // CHECK3-NEXT: store i32 1, i32* [[TMP25]], align 4
1356 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
1357 // CHECK3-NEXT: store i32 1, i32* [[TMP26]], align 4
1358 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
1359 // CHECK3-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
1360 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
1361 // CHECK3-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
1362 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
1363 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 4
1364 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
1365 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 4
1366 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
1367 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 4
1368 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
1369 // CHECK3-NEXT: store i8** null, i8*** [[TMP32]], align 4
1370 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
1371 // CHECK3-NEXT: store i64 123, i64* [[TMP33]], align 8
1372 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
1373 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1374 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
1375 // CHECK3: omp_offload.failed8:
1376 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
1377 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
1378 // CHECK3: omp_offload.cont9:
1379 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1380 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1381 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
1382 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
1383 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1384 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
1385 // CHECK3-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
1386 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
1387 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4
1388 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1389 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1390 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1391 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
1392 // CHECK3-NEXT: store i32 1, i32* [[TMP43]], align 4
1393 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
1394 // CHECK3-NEXT: store i32 1, i32* [[TMP44]], align 4
1395 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
1396 // CHECK3-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
1397 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
1398 // CHECK3-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
1399 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
1400 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 4
1401 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
1402 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 4
1403 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
1404 // CHECK3-NEXT: store i8** null, i8*** [[TMP49]], align 4
1405 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
1406 // CHECK3-NEXT: store i8** null, i8*** [[TMP50]], align 4
1407 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
1408 // CHECK3-NEXT: store i64 123, i64* [[TMP51]], align 8
1409 // CHECK3-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
1410 // CHECK3-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
1411 // CHECK3-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1412 // CHECK3: omp_offload.failed16:
1413 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
1414 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]
1415 // CHECK3: omp_offload.cont17:
1416 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1417 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1418 // CHECK3-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
1419 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 4
1420 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1421 // CHECK3-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
1422 // CHECK3-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 4
1423 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
1424 // CHECK3-NEXT: store i8* null, i8** [[TMP58]], align 4
1425 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1426 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1427 // CHECK3-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1428 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
1429 // CHECK3-NEXT: store i32 1, i32* [[TMP61]], align 4
1430 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
1431 // CHECK3-NEXT: store i32 1, i32* [[TMP62]], align 4
1432 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
1433 // CHECK3-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 4
1434 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
1435 // CHECK3-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 4
1436 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
1437 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 4
1438 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
1439 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 4
1440 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
1441 // CHECK3-NEXT: store i8** null, i8*** [[TMP67]], align 4
1442 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
1443 // CHECK3-NEXT: store i8** null, i8*** [[TMP68]], align 4
1444 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
1445 // CHECK3-NEXT: store i64 123, i64* [[TMP69]], align 8
1446 // CHECK3-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
1447 // CHECK3-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
1448 // CHECK3-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
1449 // CHECK3: omp_offload.failed24:
1450 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
1451 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT25]]
1452 // CHECK3: omp_offload.cont25:
1453 // CHECK3-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1454 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1455 // CHECK3-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
1456 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 4
1457 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1458 // CHECK3-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
1459 // CHECK3-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 4
1460 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
1461 // CHECK3-NEXT: store i8* null, i8** [[TMP76]], align 4
1462 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1463 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1464 // CHECK3-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1465 // CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
1466 // CHECK3-NEXT: store i32 1, i32* [[TMP79]], align 4
1467 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
1468 // CHECK3-NEXT: store i32 1, i32* [[TMP80]], align 4
1469 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
1470 // CHECK3-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 4
1471 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
1472 // CHECK3-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 4
1473 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
1474 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 4
1475 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
1476 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 4
1477 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
1478 // CHECK3-NEXT: store i8** null, i8*** [[TMP85]], align 4
1479 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
1480 // CHECK3-NEXT: store i8** null, i8*** [[TMP86]], align 4
1481 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
1482 // CHECK3-NEXT: store i64 123, i64* [[TMP87]], align 8
1483 // CHECK3-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
1484 // CHECK3-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
1485 // CHECK3-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
1486 // CHECK3: omp_offload.failed32:
1487 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
1488 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT33]]
1489 // CHECK3: omp_offload.cont33:
1490 // CHECK3-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1491 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i32 0, i32 0
1492 // CHECK3-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1493 // CHECK3-NEXT: ret i32 [[TMP90]]
1494 //
1495 //
1496 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1497 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1498 // CHECK3-NEXT: entry:
1499 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1500 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1501 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1502 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1503 // CHECK3-NEXT: ret void
1504 //
1505 //
1506 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1507 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1508 // CHECK3-NEXT: entry:
1509 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1510 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1511 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1512 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1513 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1514 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1515 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1516 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1517 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1518 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1519 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1520 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1521 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1522 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1523 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1524 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1525 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1526 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1527 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1528 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1529 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1530 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1531 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1532 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1533 // CHECK3: cond.true:
1534 // CHECK3-NEXT: br label [[COND_END:%.*]]
1535 // CHECK3: cond.false:
1536 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1537 // CHECK3-NEXT: br label [[COND_END]]
1538 // CHECK3: cond.end:
1539 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1540 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1541 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1542 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1543 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1544 // CHECK3: omp.inner.for.cond:
1545 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1546 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
1547 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1548 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1549 // CHECK3: omp.inner.for.body:
1550 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
1551 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
1552 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9
1553 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1554 // CHECK3: omp.inner.for.inc:
1555 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1556 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
1557 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1558 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1559 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1560 // CHECK3: omp.inner.for.end:
1561 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1562 // CHECK3: omp.loop.exit:
1563 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1564 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1565 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1566 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1567 // CHECK3: .omp.final.then:
1568 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1569 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1570 // CHECK3: .omp.final.done:
1571 // CHECK3-NEXT: ret void
1572 //
1573 //
1574 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1575 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1576 // CHECK3-NEXT: entry:
1577 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1578 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1579 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1580 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1581 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1582 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1583 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1584 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1585 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1586 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1587 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1588 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1589 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1590 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1591 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1592 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1593 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1594 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1595 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1596 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1597 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1598 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1599 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1600 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1601 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1602 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1603 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1604 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1605 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1606 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1607 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1608 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1609 // CHECK3: cond.true:
1610 // CHECK3-NEXT: br label [[COND_END:%.*]]
1611 // CHECK3: cond.false:
1612 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1613 // CHECK3-NEXT: br label [[COND_END]]
1614 // CHECK3: cond.end:
1615 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1616 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1617 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1618 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1619 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1620 // CHECK3: omp.inner.for.cond:
1621 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1622 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1623 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1624 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1625 // CHECK3: omp.inner.for.body:
1626 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1627 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1628 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1629 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1630 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1631 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1632 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1633 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
1634 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1635 // CHECK3: omp.body.continue:
1636 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1637 // CHECK3: omp.inner.for.inc:
1638 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1639 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1640 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1641 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1642 // CHECK3: omp.inner.for.end:
1643 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1644 // CHECK3: omp.loop.exit:
1645 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1646 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1647 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1648 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1649 // CHECK3: .omp.final.then:
1650 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1651 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1652 // CHECK3: .omp.final.done:
1653 // CHECK3-NEXT: ret void
1654 //
1655 //
1656 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1657 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1658 // CHECK3-NEXT: entry:
1659 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1660 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1661 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1662 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1663 // CHECK3-NEXT: ret void
1664 //
1665 //
1666 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1667 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1668 // CHECK3-NEXT: entry:
1669 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1670 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1671 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1672 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1673 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1674 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1675 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1676 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1677 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1678 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1679 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1680 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1681 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1682 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1683 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1684 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1685 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1686 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1687 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1688 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1689 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1690 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1691 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1692 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1693 // CHECK3: cond.true:
1694 // CHECK3-NEXT: br label [[COND_END:%.*]]
1695 // CHECK3: cond.false:
1696 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1697 // CHECK3-NEXT: br label [[COND_END]]
1698 // CHECK3: cond.end:
1699 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1700 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1701 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1702 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1703 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1704 // CHECK3: omp.inner.for.cond:
1705 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1706 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
1707 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1708 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1709 // CHECK3: omp.inner.for.body:
1710 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
1711 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
1712 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18
1713 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1714 // CHECK3: omp.inner.for.inc:
1715 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1716 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
1717 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1718 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1719 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
1720 // CHECK3: omp.inner.for.end:
1721 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1722 // CHECK3: omp.loop.exit:
1723 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1724 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1725 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1726 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1727 // CHECK3: .omp.final.then:
1728 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1729 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1730 // CHECK3: .omp.final.done:
1731 // CHECK3-NEXT: ret void
1732 //
1733 //
1734 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1735 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1736 // CHECK3-NEXT: entry:
1737 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1738 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1739 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1740 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1741 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1742 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1743 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1744 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1745 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1746 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1747 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1748 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1749 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1750 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1751 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1752 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1753 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1754 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1755 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1756 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1757 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1758 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1759 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1760 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1761 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1762 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1763 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1764 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1765 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1766 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1767 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1768 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1769 // CHECK3: cond.true:
1770 // CHECK3-NEXT: br label [[COND_END:%.*]]
1771 // CHECK3: cond.false:
1772 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1773 // CHECK3-NEXT: br label [[COND_END]]
1774 // CHECK3: cond.end:
1775 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1776 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1777 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1778 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1779 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1780 // CHECK3: omp.inner.for.cond:
1781 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1782 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
1783 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1784 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1785 // CHECK3: omp.inner.for.body:
1786 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1787 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1788 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1789 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
1790 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1791 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
1792 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1793 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
1794 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1795 // CHECK3: omp.body.continue:
1796 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1797 // CHECK3: omp.inner.for.inc:
1798 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1799 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1800 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
1801 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
1802 // CHECK3: omp.inner.for.end:
1803 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1804 // CHECK3: omp.loop.exit:
1805 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1806 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1807 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1808 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1809 // CHECK3: .omp.final.then:
1810 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1811 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1812 // CHECK3: .omp.final.done:
1813 // CHECK3-NEXT: ret void
1814 //
1815 //
1816 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
1817 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1818 // CHECK3-NEXT: entry:
1819 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1820 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1821 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1822 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1823 // CHECK3-NEXT: ret void
1824 //
1825 //
1826 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
1827 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1828 // CHECK3-NEXT: entry:
1829 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1830 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1831 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1832 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1833 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1834 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1835 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1836 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1837 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1838 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1839 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1840 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1841 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1842 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1843 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1844 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1845 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1846 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1847 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1848 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1849 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1850 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1851 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1852 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1853 // CHECK3: cond.true:
1854 // CHECK3-NEXT: br label [[COND_END:%.*]]
1855 // CHECK3: cond.false:
1856 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1857 // CHECK3-NEXT: br label [[COND_END]]
1858 // CHECK3: cond.end:
1859 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1860 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1861 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1862 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1863 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1864 // CHECK3: omp.inner.for.cond:
1865 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
1866 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
1867 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1868 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1869 // CHECK3: omp.inner.for.body:
1870 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
1871 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
1872 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24
1873 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1874 // CHECK3: omp.inner.for.inc:
1875 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
1876 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
1877 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1878 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
1879 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
1880 // CHECK3: omp.inner.for.end:
1881 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1882 // CHECK3: omp.loop.exit:
1883 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1884 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1885 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1886 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1887 // CHECK3: .omp.final.then:
1888 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1889 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1890 // CHECK3: .omp.final.done:
1891 // CHECK3-NEXT: ret void
1892 //
1893 //
1894 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
1895 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1896 // CHECK3-NEXT: entry:
1897 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1898 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1899 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1900 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1901 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1902 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1903 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1904 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1905 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1906 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1907 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1908 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1909 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1910 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1911 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1912 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1913 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1914 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1915 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1916 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1917 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1918 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1919 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1920 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1921 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1922 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1923 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1924 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1925 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1926 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1927 // CHECK3: omp.dispatch.cond:
1928 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1929 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1930 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
1931 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1932 // CHECK3: cond.true:
1933 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1934 // CHECK3-NEXT: br label [[COND_END:%.*]]
1935 // CHECK3: cond.false:
1936 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1937 // CHECK3-NEXT: br label [[COND_END]]
1938 // CHECK3: cond.end:
1939 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1940 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1941 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1942 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1943 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1944 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1945 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1946 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1947 // CHECK3: omp.dispatch.body:
1948 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1949 // CHECK3: omp.inner.for.cond:
1950 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1951 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
1952 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1953 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1954 // CHECK3: omp.inner.for.body:
1955 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1956 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1957 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1958 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
1959 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1960 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
1961 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
1962 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
1963 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1964 // CHECK3: omp.body.continue:
1965 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1966 // CHECK3: omp.inner.for.inc:
1967 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1968 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
1969 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
1970 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
1971 // CHECK3: omp.inner.for.end:
1972 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1973 // CHECK3: omp.dispatch.inc:
1974 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1975 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1976 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1977 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1978 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1979 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1980 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1981 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1982 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
1983 // CHECK3: omp.dispatch.end:
1984 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1985 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1986 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1987 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1988 // CHECK3: .omp.final.then:
1989 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
1990 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1991 // CHECK3: .omp.final.done:
1992 // CHECK3-NEXT: ret void
1993 //
1994 //
1995 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
1996 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1997 // CHECK3-NEXT: entry:
1998 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1999 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2000 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2001 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2002 // CHECK3-NEXT: ret void
2003 //
2004 //
2005 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2006 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2007 // CHECK3-NEXT: entry:
2008 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2009 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2010 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2011 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2012 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2013 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2014 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2015 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2016 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2017 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2018 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2019 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2020 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2021 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2022 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2023 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2024 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2025 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2026 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2027 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2028 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2029 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2030 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2031 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2032 // CHECK3: cond.true:
2033 // CHECK3-NEXT: br label [[COND_END:%.*]]
2034 // CHECK3: cond.false:
2035 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2036 // CHECK3-NEXT: br label [[COND_END]]
2037 // CHECK3: cond.end:
2038 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2039 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2040 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2041 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2042 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2043 // CHECK3: omp.inner.for.cond:
2044 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2045 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
2046 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2047 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2048 // CHECK3: omp.inner.for.body:
2049 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
2050 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
2051 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30
2052 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2053 // CHECK3: omp.inner.for.inc:
2054 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2055 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
2056 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2057 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
2058 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
2059 // CHECK3: omp.inner.for.end:
2060 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2061 // CHECK3: omp.loop.exit:
2062 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2063 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2064 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
2065 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2066 // CHECK3: .omp.final.then:
2067 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2068 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2069 // CHECK3: .omp.final.done:
2070 // CHECK3-NEXT: ret void
2071 //
2072 //
2073 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
2074 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2075 // CHECK3-NEXT: entry:
2076 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2077 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2078 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2079 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2080 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2081 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2082 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2083 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2084 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2085 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2086 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2087 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2088 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2089 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2090 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2091 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2092 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2093 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2094 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2095 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2096 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2097 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2098 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2099 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2100 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2101 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2102 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2103 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2104 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2105 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2106 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2107 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2108 // CHECK3: omp.dispatch.cond:
2109 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2110 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2111 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2112 // CHECK3: omp.dispatch.body:
2113 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2114 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2115 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2116 // CHECK3: omp.inner.for.cond:
2117 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2118 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
2119 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2120 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2121 // CHECK3: omp.inner.for.body:
2122 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2123 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2124 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2125 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
2126 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2127 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33
2128 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2129 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33
2130 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2131 // CHECK3: omp.body.continue:
2132 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2133 // CHECK3: omp.inner.for.inc:
2134 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2135 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2136 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
2137 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2138 // CHECK3: omp.inner.for.end:
2139 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2140 // CHECK3: omp.dispatch.inc:
2141 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2142 // CHECK3: omp.dispatch.end:
2143 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2144 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2145 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2146 // CHECK3: .omp.final.then:
2147 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2148 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2149 // CHECK3: .omp.final.done:
2150 // CHECK3-NEXT: ret void
2151 //
2152 //
2153 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
2154 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2155 // CHECK3-NEXT: entry:
2156 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2157 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2158 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2159 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2160 // CHECK3-NEXT: ret void
2161 //
2162 //
2163 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
2164 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2165 // CHECK3-NEXT: entry:
2166 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2167 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2168 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2169 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2170 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2171 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2172 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2173 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2174 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2175 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2176 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2177 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2178 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2179 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2180 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2181 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2182 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2183 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2184 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2185 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2186 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2187 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2188 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2189 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2190 // CHECK3: cond.true:
2191 // CHECK3-NEXT: br label [[COND_END:%.*]]
2192 // CHECK3: cond.false:
2193 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2194 // CHECK3-NEXT: br label [[COND_END]]
2195 // CHECK3: cond.end:
2196 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2197 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2198 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2199 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2200 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2201 // CHECK3: omp.inner.for.cond:
2202 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2203 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
2204 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2205 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2206 // CHECK3: omp.inner.for.body:
2207 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
2208 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
2209 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36
2210 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2211 // CHECK3: omp.inner.for.inc:
2212 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2213 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
2214 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2215 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
2216 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
2217 // CHECK3: omp.inner.for.end:
2218 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2219 // CHECK3: omp.loop.exit:
2220 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2221 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2222 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
2223 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2224 // CHECK3: .omp.final.then:
2225 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2226 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2227 // CHECK3: .omp.final.done:
2228 // CHECK3-NEXT: ret void
2229 //
2230 //
2231 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
2232 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2233 // CHECK3-NEXT: entry:
2234 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2235 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2236 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2237 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2238 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2239 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2240 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2241 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2242 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2243 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2244 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2245 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2246 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2247 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2248 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2249 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2250 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2251 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2252 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2253 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2254 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2255 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2256 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2257 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2258 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2259 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2260 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2261 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2262 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2263 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2264 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2265 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2266 // CHECK3: omp.dispatch.cond:
2267 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2268 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2269 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2270 // CHECK3: omp.dispatch.body:
2271 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2272 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2273 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2274 // CHECK3: omp.inner.for.cond:
2275 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2276 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
2277 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2278 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2279 // CHECK3: omp.inner.for.body:
2280 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2281 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2282 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2283 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
2284 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2285 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39
2286 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2287 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39
2288 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2289 // CHECK3: omp.body.continue:
2290 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2291 // CHECK3: omp.inner.for.inc:
2292 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2293 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2294 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
2295 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2296 // CHECK3: omp.inner.for.end:
2297 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2298 // CHECK3: omp.dispatch.inc:
2299 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2300 // CHECK3: omp.dispatch.end:
2301 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2302 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2303 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2304 // CHECK3: .omp.final.then:
2305 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
2306 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2307 // CHECK3: .omp.final.done:
2308 // CHECK3-NEXT: ret void
2309 //
2310 //
2311 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2312 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2313 // CHECK3-NEXT: entry:
2314 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
2315 // CHECK3-NEXT: ret void
2316 //
2317 //
2318 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2319 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2320 // CHECK5-NEXT: entry:
2321 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2322 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
2323 // CHECK5-NEXT: ret i32 [[CALL]]
2324 //
2325 //
2326 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2327 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2328 // CHECK5-NEXT: entry:
2329 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2330 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2331 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2332 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2333 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2334 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
2335 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
2336 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
2337 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
2338 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
2339 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
2340 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
2341 // CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
2342 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 8
2343 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 8
2344 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 8
2345 // CHECK5-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
2346 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 8
2347 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 8
2348 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 8
2349 // CHECK5-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
2350 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2351 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2352 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2353 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2354 // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2355 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
2356 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2357 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2358 // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
2359 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2360 // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 8
2361 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2362 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2363 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2364 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2365 // CHECK5-NEXT: store i32 1, i32* [[TMP7]], align 4
2366 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2367 // CHECK5-NEXT: store i32 1, i32* [[TMP8]], align 4
2368 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2369 // CHECK5-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
2370 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2371 // CHECK5-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
2372 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2373 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
2374 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2375 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
2376 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2377 // CHECK5-NEXT: store i8** null, i8*** [[TMP13]], align 8
2378 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2379 // CHECK5-NEXT: store i8** null, i8*** [[TMP14]], align 8
2380 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2381 // CHECK5-NEXT: store i64 123, i64* [[TMP15]], align 8
2382 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2383 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2384 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2385 // CHECK5: omp_offload.failed:
2386 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2387 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
2388 // CHECK5: omp_offload.cont:
2389 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2390 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2391 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2392 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
2393 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2394 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2395 // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
2396 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
2397 // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 8
2398 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2399 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2400 // CHECK5-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2401 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
2402 // CHECK5-NEXT: store i32 1, i32* [[TMP25]], align 4
2403 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
2404 // CHECK5-NEXT: store i32 1, i32* [[TMP26]], align 4
2405 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
2406 // CHECK5-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
2407 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
2408 // CHECK5-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
2409 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
2410 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 8
2411 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
2412 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 8
2413 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
2414 // CHECK5-NEXT: store i8** null, i8*** [[TMP31]], align 8
2415 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
2416 // CHECK5-NEXT: store i8** null, i8*** [[TMP32]], align 8
2417 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
2418 // CHECK5-NEXT: store i64 123, i64* [[TMP33]], align 8
2419 // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
2420 // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2421 // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
2422 // CHECK5: omp_offload.failed8:
2423 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2424 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT9]]
2425 // CHECK5: omp_offload.cont9:
2426 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2427 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2428 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
2429 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
2430 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2431 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
2432 // CHECK5-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
2433 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
2434 // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 8
2435 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2436 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2437 // CHECK5-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2438 // CHECK5-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
2439 // CHECK5-NEXT: store i32 1, i32* [[TMP43]], align 4
2440 // CHECK5-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
2441 // CHECK5-NEXT: store i32 1, i32* [[TMP44]], align 4
2442 // CHECK5-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
2443 // CHECK5-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
2444 // CHECK5-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
2445 // CHECK5-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
2446 // CHECK5-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
2447 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 8
2448 // CHECK5-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
2449 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 8
2450 // CHECK5-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
2451 // CHECK5-NEXT: store i8** null, i8*** [[TMP49]], align 8
2452 // CHECK5-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
2453 // CHECK5-NEXT: store i8** null, i8*** [[TMP50]], align 8
2454 // CHECK5-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
2455 // CHECK5-NEXT: store i64 123, i64* [[TMP51]], align 8
2456 // CHECK5-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
2457 // CHECK5-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
2458 // CHECK5-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2459 // CHECK5: omp_offload.failed16:
2460 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
2461 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2462 // CHECK5: omp_offload.cont17:
2463 // CHECK5-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2464 // CHECK5-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2465 // CHECK5-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
2466 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 8
2467 // CHECK5-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2468 // CHECK5-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
2469 // CHECK5-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 8
2470 // CHECK5-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
2471 // CHECK5-NEXT: store i8* null, i8** [[TMP58]], align 8
2472 // CHECK5-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2473 // CHECK5-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2474 // CHECK5-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2475 // CHECK5-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
2476 // CHECK5-NEXT: store i32 1, i32* [[TMP61]], align 4
2477 // CHECK5-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
2478 // CHECK5-NEXT: store i32 1, i32* [[TMP62]], align 4
2479 // CHECK5-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
2480 // CHECK5-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 8
2481 // CHECK5-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
2482 // CHECK5-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 8
2483 // CHECK5-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
2484 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 8
2485 // CHECK5-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
2486 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 8
2487 // CHECK5-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
2488 // CHECK5-NEXT: store i8** null, i8*** [[TMP67]], align 8
2489 // CHECK5-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
2490 // CHECK5-NEXT: store i8** null, i8*** [[TMP68]], align 8
2491 // CHECK5-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
2492 // CHECK5-NEXT: store i64 123, i64* [[TMP69]], align 8
2493 // CHECK5-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
2494 // CHECK5-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
2495 // CHECK5-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
2496 // CHECK5: omp_offload.failed24:
2497 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
2498 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT25]]
2499 // CHECK5: omp_offload.cont25:
2500 // CHECK5-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2501 // CHECK5-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2502 // CHECK5-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
2503 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 8
2504 // CHECK5-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2505 // CHECK5-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
2506 // CHECK5-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 8
2507 // CHECK5-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
2508 // CHECK5-NEXT: store i8* null, i8** [[TMP76]], align 8
2509 // CHECK5-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2510 // CHECK5-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2511 // CHECK5-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2512 // CHECK5-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
2513 // CHECK5-NEXT: store i32 1, i32* [[TMP79]], align 4
2514 // CHECK5-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
2515 // CHECK5-NEXT: store i32 1, i32* [[TMP80]], align 4
2516 // CHECK5-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
2517 // CHECK5-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 8
2518 // CHECK5-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
2519 // CHECK5-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 8
2520 // CHECK5-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
2521 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 8
2522 // CHECK5-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
2523 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 8
2524 // CHECK5-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
2525 // CHECK5-NEXT: store i8** null, i8*** [[TMP85]], align 8
2526 // CHECK5-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
2527 // CHECK5-NEXT: store i8** null, i8*** [[TMP86]], align 8
2528 // CHECK5-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
2529 // CHECK5-NEXT: store i64 123, i64* [[TMP87]], align 8
2530 // CHECK5-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
2531 // CHECK5-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
2532 // CHECK5-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2533 // CHECK5: omp_offload.failed32:
2534 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
2535 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT33]]
2536 // CHECK5: omp_offload.cont33:
2537 // CHECK5-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2538 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i64 0, i64 0
2539 // CHECK5-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2540 // CHECK5-NEXT: ret i32 [[TMP90]]
2541 //
2542 //
2543 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
2544 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2545 // CHECK5-NEXT: entry:
2546 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2547 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2548 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2549 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2550 // CHECK5-NEXT: ret void
2551 //
2552 //
2553 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
2554 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2555 // CHECK5-NEXT: entry:
2556 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2557 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2558 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2559 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2560 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2561 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2562 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2563 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2564 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2565 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2566 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2567 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2568 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2569 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2570 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2571 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2572 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2573 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2574 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2575 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2576 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2577 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2578 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2579 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2580 // CHECK5: cond.true:
2581 // CHECK5-NEXT: br label [[COND_END:%.*]]
2582 // CHECK5: cond.false:
2583 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2584 // CHECK5-NEXT: br label [[COND_END]]
2585 // CHECK5: cond.end:
2586 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2587 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2588 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2589 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2590 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2591 // CHECK5: omp.inner.for.cond:
2592 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
2593 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
2594 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2595 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2596 // CHECK5: omp.inner.for.body:
2597 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !8
2598 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2599 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !8
2600 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2601 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !8
2602 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2603 // CHECK5: omp.inner.for.inc:
2604 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
2605 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !8
2606 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2607 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
2608 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
2609 // CHECK5: omp.inner.for.end:
2610 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2611 // CHECK5: omp.loop.exit:
2612 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2613 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2614 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2615 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2616 // CHECK5: .omp.final.then:
2617 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
2618 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2619 // CHECK5: .omp.final.done:
2620 // CHECK5-NEXT: ret void
2621 //
2622 //
2623 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
2624 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2625 // CHECK5-NEXT: entry:
2626 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2627 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2628 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2629 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2630 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2631 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2632 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2633 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2634 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2635 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2636 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2637 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2638 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2639 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2640 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2641 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2642 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2643 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2644 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2645 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2646 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2647 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2648 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2649 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2650 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2651 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2652 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2653 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2654 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2655 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2656 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2657 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2658 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2659 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2660 // CHECK5: cond.true:
2661 // CHECK5-NEXT: br label [[COND_END:%.*]]
2662 // CHECK5: cond.false:
2663 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2664 // CHECK5-NEXT: br label [[COND_END]]
2665 // CHECK5: cond.end:
2666 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2667 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2668 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2669 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2670 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2671 // CHECK5: omp.inner.for.cond:
2672 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2673 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
2674 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2675 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2676 // CHECK5: omp.inner.for.body:
2677 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2678 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2679 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2680 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
2681 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2682 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
2683 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2684 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2685 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
2686 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2687 // CHECK5: omp.body.continue:
2688 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2689 // CHECK5: omp.inner.for.inc:
2690 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2691 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2692 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2693 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2694 // CHECK5: omp.inner.for.end:
2695 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2696 // CHECK5: omp.loop.exit:
2697 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2698 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2699 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2700 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2701 // CHECK5: .omp.final.then:
2702 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
2703 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2704 // CHECK5: .omp.final.done:
2705 // CHECK5-NEXT: ret void
2706 //
2707 //
2708 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2709 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2710 // CHECK5-NEXT: entry:
2711 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2712 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2713 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2714 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2715 // CHECK5-NEXT: ret void
2716 //
2717 //
2718 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
2719 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2720 // CHECK5-NEXT: entry:
2721 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2722 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2723 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2724 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2725 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2726 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2727 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2728 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2729 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2730 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2731 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2732 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2733 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2734 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2735 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2736 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2737 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2738 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2739 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2740 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2741 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2742 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2743 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2744 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2745 // CHECK5: cond.true:
2746 // CHECK5-NEXT: br label [[COND_END:%.*]]
2747 // CHECK5: cond.false:
2748 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2749 // CHECK5-NEXT: br label [[COND_END]]
2750 // CHECK5: cond.end:
2751 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2752 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2753 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2754 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2755 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2756 // CHECK5: omp.inner.for.cond:
2757 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2758 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
2759 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2760 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2761 // CHECK5: omp.inner.for.body:
2762 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !17
2763 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2764 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !17
2765 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2766 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !17
2767 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2768 // CHECK5: omp.inner.for.inc:
2769 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2770 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !17
2771 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2772 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2773 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
2774 // CHECK5: omp.inner.for.end:
2775 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2776 // CHECK5: omp.loop.exit:
2777 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2778 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2779 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2780 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2781 // CHECK5: .omp.final.then:
2782 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
2783 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2784 // CHECK5: .omp.final.done:
2785 // CHECK5-NEXT: ret void
2786 //
2787 //
2788 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
2789 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2790 // CHECK5-NEXT: entry:
2791 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2792 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2793 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2794 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2795 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2796 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2797 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2798 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2799 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2800 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2801 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2802 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2803 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2804 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2805 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2806 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2807 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2808 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2809 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2810 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2811 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2812 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2813 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2814 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2815 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2816 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2817 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2818 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2819 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2820 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2821 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2822 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2823 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2824 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2825 // CHECK5: cond.true:
2826 // CHECK5-NEXT: br label [[COND_END:%.*]]
2827 // CHECK5: cond.false:
2828 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2829 // CHECK5-NEXT: br label [[COND_END]]
2830 // CHECK5: cond.end:
2831 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2832 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2833 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2834 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2835 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2836 // CHECK5: omp.inner.for.cond:
2837 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2838 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
2839 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2840 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2841 // CHECK5: omp.inner.for.body:
2842 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2843 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2844 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2845 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
2846 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2847 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
2848 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2849 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2850 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
2851 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2852 // CHECK5: omp.body.continue:
2853 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2854 // CHECK5: omp.inner.for.inc:
2855 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2856 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2857 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
2858 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
2859 // CHECK5: omp.inner.for.end:
2860 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2861 // CHECK5: omp.loop.exit:
2862 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2863 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2864 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2865 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2866 // CHECK5: .omp.final.then:
2867 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
2868 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2869 // CHECK5: .omp.final.done:
2870 // CHECK5-NEXT: ret void
2871 //
2872 //
2873 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
2874 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2875 // CHECK5-NEXT: entry:
2876 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2877 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2878 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2879 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2880 // CHECK5-NEXT: ret void
2881 //
2882 //
2883 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
2884 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2885 // CHECK5-NEXT: entry:
2886 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2887 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2888 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2889 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2890 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2891 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2892 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2893 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2894 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2895 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2896 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2897 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2898 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2899 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2900 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2901 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2902 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2903 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2904 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2905 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2906 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2907 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2908 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2909 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2910 // CHECK5: cond.true:
2911 // CHECK5-NEXT: br label [[COND_END:%.*]]
2912 // CHECK5: cond.false:
2913 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2914 // CHECK5-NEXT: br label [[COND_END]]
2915 // CHECK5: cond.end:
2916 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2917 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2918 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2919 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2920 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2921 // CHECK5: omp.inner.for.cond:
2922 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
2923 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
2924 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2925 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2926 // CHECK5: omp.inner.for.body:
2927 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
2928 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2929 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
2930 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2931 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !23
2932 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2933 // CHECK5: omp.inner.for.inc:
2934 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
2935 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
2936 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2937 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
2938 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
2939 // CHECK5: omp.inner.for.end:
2940 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2941 // CHECK5: omp.loop.exit:
2942 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2943 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2944 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2945 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2946 // CHECK5: .omp.final.then:
2947 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
2948 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2949 // CHECK5: .omp.final.done:
2950 // CHECK5-NEXT: ret void
2951 //
2952 //
2953 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
2954 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2955 // CHECK5-NEXT: entry:
2956 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2957 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2958 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2959 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2960 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2961 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2962 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2963 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2964 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2965 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2966 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2967 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2968 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2969 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2970 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2971 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2972 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2973 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2974 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2975 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2976 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2977 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2978 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2979 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2980 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2981 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2982 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2983 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2984 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2985 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2986 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
2987 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2988 // CHECK5: omp.dispatch.cond:
2989 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2990 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2991 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
2992 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
2993 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2994 // CHECK5: cond.true:
2995 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2996 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
2997 // CHECK5-NEXT: br label [[COND_END:%.*]]
2998 // CHECK5: cond.false:
2999 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3000 // CHECK5-NEXT: br label [[COND_END]]
3001 // CHECK5: cond.end:
3002 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3003 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3004 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3005 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3006 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3007 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3008 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3009 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3010 // CHECK5: omp.dispatch.body:
3011 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3012 // CHECK5: omp.inner.for.cond:
3013 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3014 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
3015 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3016 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3017 // CHECK5: omp.inner.for.body:
3018 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3019 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3020 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3021 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !26
3022 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3023 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !26
3024 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
3025 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3026 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
3027 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3028 // CHECK5: omp.body.continue:
3029 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3030 // CHECK5: omp.inner.for.inc:
3031 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3032 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
3033 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
3034 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
3035 // CHECK5: omp.inner.for.end:
3036 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3037 // CHECK5: omp.dispatch.inc:
3038 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3039 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3040 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3041 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
3042 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3043 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3044 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3045 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
3046 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
3047 // CHECK5: omp.dispatch.end:
3048 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3049 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3050 // CHECK5-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
3051 // CHECK5-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3052 // CHECK5: .omp.final.then:
3053 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
3054 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
3055 // CHECK5: .omp.final.done:
3056 // CHECK5-NEXT: ret void
3057 //
3058 //
3059 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
3060 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3061 // CHECK5-NEXT: entry:
3062 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3063 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3064 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3065 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3066 // CHECK5-NEXT: ret void
3067 //
3068 //
3069 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
3070 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3071 // CHECK5-NEXT: entry:
3072 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3073 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3074 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3075 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3076 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3077 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3078 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3079 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3080 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3081 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3082 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3083 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3084 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3085 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3086 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3087 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3088 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3089 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3090 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3091 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3092 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3093 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3094 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3095 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3096 // CHECK5: cond.true:
3097 // CHECK5-NEXT: br label [[COND_END:%.*]]
3098 // CHECK5: cond.false:
3099 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3100 // CHECK5-NEXT: br label [[COND_END]]
3101 // CHECK5: cond.end:
3102 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3103 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3104 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3105 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3106 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3107 // CHECK5: omp.inner.for.cond:
3108 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
3109 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
3110 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3111 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3112 // CHECK5: omp.inner.for.body:
3113 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
3114 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3115 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
3116 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3117 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !29
3118 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3119 // CHECK5: omp.inner.for.inc:
3120 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
3121 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
3122 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3123 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
3124 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
3125 // CHECK5: omp.inner.for.end:
3126 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3127 // CHECK5: omp.loop.exit:
3128 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3129 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3130 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3131 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3132 // CHECK5: .omp.final.then:
3133 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
3134 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
3135 // CHECK5: .omp.final.done:
3136 // CHECK5-NEXT: ret void
3137 //
3138 //
3139 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
3140 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3141 // CHECK5-NEXT: entry:
3142 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3143 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3144 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3145 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3146 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3147 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3148 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3149 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3150 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3151 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3152 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3153 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3154 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3155 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3156 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3157 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3158 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3159 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3160 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3161 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3162 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3163 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3164 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3165 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3166 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3167 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3168 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3169 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3170 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3171 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3172 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3173 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3174 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3175 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3176 // CHECK5: omp.dispatch.cond:
3177 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3178 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3179 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3180 // CHECK5: omp.dispatch.body:
3181 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3182 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3183 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3184 // CHECK5: omp.inner.for.cond:
3185 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3186 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
3187 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3188 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3189 // CHECK5: omp.inner.for.body:
3190 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3191 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3192 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3193 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !32
3194 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3195 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !32
3196 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3197 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3198 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
3199 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3200 // CHECK5: omp.body.continue:
3201 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3202 // CHECK5: omp.inner.for.inc:
3203 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3204 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3205 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
3206 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
3207 // CHECK5: omp.inner.for.end:
3208 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3209 // CHECK5: omp.dispatch.inc:
3210 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
3211 // CHECK5: omp.dispatch.end:
3212 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3213 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3214 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3215 // CHECK5: .omp.final.then:
3216 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
3217 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
3218 // CHECK5: .omp.final.done:
3219 // CHECK5-NEXT: ret void
3220 //
3221 //
3222 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
3223 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3224 // CHECK5-NEXT: entry:
3225 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3226 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3227 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3228 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3229 // CHECK5-NEXT: ret void
3230 //
3231 //
3232 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
3233 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3234 // CHECK5-NEXT: entry:
3235 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3236 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3237 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3238 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3239 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3240 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3241 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3242 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3243 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3244 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3245 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3246 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3247 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3248 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3249 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3250 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3251 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3252 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3253 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3254 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3255 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3256 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3257 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3258 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3259 // CHECK5: cond.true:
3260 // CHECK5-NEXT: br label [[COND_END:%.*]]
3261 // CHECK5: cond.false:
3262 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3263 // CHECK5-NEXT: br label [[COND_END]]
3264 // CHECK5: cond.end:
3265 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3266 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3267 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3268 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3269 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3270 // CHECK5: omp.inner.for.cond:
3271 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
3272 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
3273 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3274 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3275 // CHECK5: omp.inner.for.body:
3276 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
3277 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3278 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
3279 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3280 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !35
3281 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3282 // CHECK5: omp.inner.for.inc:
3283 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
3284 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
3285 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3286 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
3287 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
3288 // CHECK5: omp.inner.for.end:
3289 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3290 // CHECK5: omp.loop.exit:
3291 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3292 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3293 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3294 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3295 // CHECK5: .omp.final.then:
3296 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
3297 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
3298 // CHECK5: .omp.final.done:
3299 // CHECK5-NEXT: ret void
3300 //
3301 //
3302 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
3303 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3304 // CHECK5-NEXT: entry:
3305 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3306 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3307 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3308 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3309 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3310 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3311 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3312 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3313 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3314 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3315 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3316 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3317 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3318 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3319 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3320 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3321 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3322 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3323 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3324 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3325 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3326 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3327 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3328 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3329 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3330 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3331 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3332 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3333 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3334 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3335 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3336 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3337 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3338 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3339 // CHECK5: omp.dispatch.cond:
3340 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3341 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3342 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3343 // CHECK5: omp.dispatch.body:
3344 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3345 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3346 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3347 // CHECK5: omp.inner.for.cond:
3348 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3349 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
3350 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3351 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3352 // CHECK5: omp.inner.for.body:
3353 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3354 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3355 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3356 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !38
3357 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3358 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !38
3359 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3360 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3361 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
3362 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3363 // CHECK5: omp.body.continue:
3364 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3365 // CHECK5: omp.inner.for.inc:
3366 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3367 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3368 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
3369 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
3370 // CHECK5: omp.inner.for.end:
3371 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3372 // CHECK5: omp.dispatch.inc:
3373 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
3374 // CHECK5: omp.dispatch.end:
3375 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3376 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3377 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3378 // CHECK5: .omp.final.then:
3379 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
3380 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
3381 // CHECK5: .omp.final.done:
3382 // CHECK5-NEXT: ret void
3383 //
3384 //
3385 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3386 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3387 // CHECK5-NEXT: entry:
3388 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
3389 // CHECK5-NEXT: ret void
3390 //
3391 //
3392 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3393 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3394 // CHECK7-NEXT: entry:
3395 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3396 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
3397 // CHECK7-NEXT: ret i32 [[CALL]]
3398 //
3399 //
3400 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3401 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3402 // CHECK7-NEXT: entry:
3403 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3404 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3405 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3406 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3407 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3408 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
3409 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
3410 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
3411 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
3412 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
3413 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
3414 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
3415 // CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
3416 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 4
3417 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 4
3418 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 4
3419 // CHECK7-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
3420 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 4
3421 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 4
3422 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 4
3423 // CHECK7-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
3424 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3425 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3426 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3427 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3428 // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
3429 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
3430 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3431 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
3432 // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
3433 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3434 // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4
3435 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3436 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3437 // CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3438 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3439 // CHECK7-NEXT: store i32 1, i32* [[TMP7]], align 4
3440 // CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3441 // CHECK7-NEXT: store i32 1, i32* [[TMP8]], align 4
3442 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3443 // CHECK7-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
3444 // CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3445 // CHECK7-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
3446 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3447 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
3448 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3449 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
3450 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3451 // CHECK7-NEXT: store i8** null, i8*** [[TMP13]], align 4
3452 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3453 // CHECK7-NEXT: store i8** null, i8*** [[TMP14]], align 4
3454 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3455 // CHECK7-NEXT: store i64 123, i64* [[TMP15]], align 8
3456 // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3457 // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3458 // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3459 // CHECK7: omp_offload.failed:
3460 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3461 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
3462 // CHECK7: omp_offload.cont:
3463 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3464 // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3465 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3466 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
3467 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3468 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3469 // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
3470 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
3471 // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4
3472 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3473 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3474 // CHECK7-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3475 // CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
3476 // CHECK7-NEXT: store i32 1, i32* [[TMP25]], align 4
3477 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
3478 // CHECK7-NEXT: store i32 1, i32* [[TMP26]], align 4
3479 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
3480 // CHECK7-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
3481 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
3482 // CHECK7-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
3483 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
3484 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 4
3485 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
3486 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 4
3487 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
3488 // CHECK7-NEXT: store i8** null, i8*** [[TMP31]], align 4
3489 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
3490 // CHECK7-NEXT: store i8** null, i8*** [[TMP32]], align 4
3491 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
3492 // CHECK7-NEXT: store i64 123, i64* [[TMP33]], align 8
3493 // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
3494 // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3495 // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
3496 // CHECK7: omp_offload.failed8:
3497 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
3498 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT9]]
3499 // CHECK7: omp_offload.cont9:
3500 // CHECK7-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3501 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3502 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3503 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
3504 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3505 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3506 // CHECK7-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
3507 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
3508 // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4
3509 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3510 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3511 // CHECK7-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3512 // CHECK7-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
3513 // CHECK7-NEXT: store i32 1, i32* [[TMP43]], align 4
3514 // CHECK7-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
3515 // CHECK7-NEXT: store i32 1, i32* [[TMP44]], align 4
3516 // CHECK7-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
3517 // CHECK7-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
3518 // CHECK7-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
3519 // CHECK7-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
3520 // CHECK7-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
3521 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 4
3522 // CHECK7-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
3523 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 4
3524 // CHECK7-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
3525 // CHECK7-NEXT: store i8** null, i8*** [[TMP49]], align 4
3526 // CHECK7-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
3527 // CHECK7-NEXT: store i8** null, i8*** [[TMP50]], align 4
3528 // CHECK7-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
3529 // CHECK7-NEXT: store i64 123, i64* [[TMP51]], align 8
3530 // CHECK7-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
3531 // CHECK7-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
3532 // CHECK7-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
3533 // CHECK7: omp_offload.failed16:
3534 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
3535 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT17]]
3536 // CHECK7: omp_offload.cont17:
3537 // CHECK7-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3538 // CHECK7-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3539 // CHECK7-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
3540 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 4
3541 // CHECK7-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3542 // CHECK7-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
3543 // CHECK7-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 4
3544 // CHECK7-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
3545 // CHECK7-NEXT: store i8* null, i8** [[TMP58]], align 4
3546 // CHECK7-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3547 // CHECK7-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3548 // CHECK7-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3549 // CHECK7-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
3550 // CHECK7-NEXT: store i32 1, i32* [[TMP61]], align 4
3551 // CHECK7-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
3552 // CHECK7-NEXT: store i32 1, i32* [[TMP62]], align 4
3553 // CHECK7-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
3554 // CHECK7-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 4
3555 // CHECK7-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
3556 // CHECK7-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 4
3557 // CHECK7-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
3558 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 4
3559 // CHECK7-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
3560 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 4
3561 // CHECK7-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
3562 // CHECK7-NEXT: store i8** null, i8*** [[TMP67]], align 4
3563 // CHECK7-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
3564 // CHECK7-NEXT: store i8** null, i8*** [[TMP68]], align 4
3565 // CHECK7-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
3566 // CHECK7-NEXT: store i64 123, i64* [[TMP69]], align 8
3567 // CHECK7-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
3568 // CHECK7-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
3569 // CHECK7-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
3570 // CHECK7: omp_offload.failed24:
3571 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
3572 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT25]]
3573 // CHECK7: omp_offload.cont25:
3574 // CHECK7-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3575 // CHECK7-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3576 // CHECK7-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
3577 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 4
3578 // CHECK7-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3579 // CHECK7-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
3580 // CHECK7-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 4
3581 // CHECK7-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
3582 // CHECK7-NEXT: store i8* null, i8** [[TMP76]], align 4
3583 // CHECK7-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3584 // CHECK7-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3585 // CHECK7-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3586 // CHECK7-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
3587 // CHECK7-NEXT: store i32 1, i32* [[TMP79]], align 4
3588 // CHECK7-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
3589 // CHECK7-NEXT: store i32 1, i32* [[TMP80]], align 4
3590 // CHECK7-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
3591 // CHECK7-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 4
3592 // CHECK7-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
3593 // CHECK7-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 4
3594 // CHECK7-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
3595 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 4
3596 // CHECK7-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
3597 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 4
3598 // CHECK7-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
3599 // CHECK7-NEXT: store i8** null, i8*** [[TMP85]], align 4
3600 // CHECK7-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
3601 // CHECK7-NEXT: store i8** null, i8*** [[TMP86]], align 4
3602 // CHECK7-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
3603 // CHECK7-NEXT: store i64 123, i64* [[TMP87]], align 8
3604 // CHECK7-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
3605 // CHECK7-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
3606 // CHECK7-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
3607 // CHECK7: omp_offload.failed32:
3608 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
3609 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT33]]
3610 // CHECK7: omp_offload.cont33:
3611 // CHECK7-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3612 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i32 0, i32 0
3613 // CHECK7-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3614 // CHECK7-NEXT: ret i32 [[TMP90]]
3615 //
3616 //
3617 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
3618 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3619 // CHECK7-NEXT: entry:
3620 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3621 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3622 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3623 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3624 // CHECK7-NEXT: ret void
3625 //
3626 //
3627 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
3628 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3629 // CHECK7-NEXT: entry:
3630 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3631 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3632 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3633 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3634 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3635 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3636 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3637 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3638 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3639 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3640 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3641 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3642 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3643 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3644 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3645 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3646 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3647 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3648 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3649 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3650 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3651 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3652 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3653 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3654 // CHECK7: cond.true:
3655 // CHECK7-NEXT: br label [[COND_END:%.*]]
3656 // CHECK7: cond.false:
3657 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3658 // CHECK7-NEXT: br label [[COND_END]]
3659 // CHECK7: cond.end:
3660 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3661 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3662 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3663 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3664 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3665 // CHECK7: omp.inner.for.cond:
3666 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3667 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
3668 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3669 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3670 // CHECK7: omp.inner.for.body:
3671 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !9
3672 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !9
3673 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !9
3674 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3675 // CHECK7: omp.inner.for.inc:
3676 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3677 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !9
3678 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3679 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
3680 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3681 // CHECK7: omp.inner.for.end:
3682 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3683 // CHECK7: omp.loop.exit:
3684 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3685 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3686 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3687 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3688 // CHECK7: .omp.final.then:
3689 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
3690 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3691 // CHECK7: .omp.final.done:
3692 // CHECK7-NEXT: ret void
3693 //
3694 //
3695 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
3696 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3697 // CHECK7-NEXT: entry:
3698 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3699 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3700 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3701 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3702 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3703 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3704 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3705 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3706 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3707 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3708 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3709 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3710 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3711 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3712 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3713 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3714 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3715 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3716 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3717 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3718 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3719 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3720 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3721 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3722 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3723 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3724 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3725 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3726 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3727 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3728 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3729 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3730 // CHECK7: cond.true:
3731 // CHECK7-NEXT: br label [[COND_END:%.*]]
3732 // CHECK7: cond.false:
3733 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3734 // CHECK7-NEXT: br label [[COND_END]]
3735 // CHECK7: cond.end:
3736 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3737 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3738 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3739 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3740 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3741 // CHECK7: omp.inner.for.cond:
3742 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3743 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
3744 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3745 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3746 // CHECK7: omp.inner.for.body:
3747 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3748 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3749 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3750 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
3751 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3752 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
3753 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3754 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
3755 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3756 // CHECK7: omp.body.continue:
3757 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3758 // CHECK7: omp.inner.for.inc:
3759 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3760 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3761 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3762 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3763 // CHECK7: omp.inner.for.end:
3764 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3765 // CHECK7: omp.loop.exit:
3766 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3767 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3768 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3769 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3770 // CHECK7: .omp.final.then:
3771 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
3772 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3773 // CHECK7: .omp.final.done:
3774 // CHECK7-NEXT: ret void
3775 //
3776 //
3777 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3778 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3779 // CHECK7-NEXT: entry:
3780 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3781 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3782 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3783 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3784 // CHECK7-NEXT: ret void
3785 //
3786 //
3787 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
3788 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3789 // CHECK7-NEXT: entry:
3790 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3791 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3792 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3793 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3794 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3795 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3796 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3797 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3798 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3799 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3800 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3801 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3802 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3803 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3804 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3805 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3806 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3807 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3808 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3809 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3810 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3811 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3812 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3813 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3814 // CHECK7: cond.true:
3815 // CHECK7-NEXT: br label [[COND_END:%.*]]
3816 // CHECK7: cond.false:
3817 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3818 // CHECK7-NEXT: br label [[COND_END]]
3819 // CHECK7: cond.end:
3820 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3821 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3822 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3823 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3824 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3825 // CHECK7: omp.inner.for.cond:
3826 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3827 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
3828 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3829 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3830 // CHECK7: omp.inner.for.body:
3831 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !18
3832 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !18
3833 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !18
3834 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3835 // CHECK7: omp.inner.for.inc:
3836 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3837 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !18
3838 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3839 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
3840 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3841 // CHECK7: omp.inner.for.end:
3842 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3843 // CHECK7: omp.loop.exit:
3844 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3845 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3846 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3847 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3848 // CHECK7: .omp.final.then:
3849 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
3850 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3851 // CHECK7: .omp.final.done:
3852 // CHECK7-NEXT: ret void
3853 //
3854 //
3855 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
3856 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3857 // CHECK7-NEXT: entry:
3858 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3859 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3860 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3861 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3862 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3863 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3864 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3865 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3866 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3867 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3868 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3869 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3870 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3871 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3872 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3873 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3874 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3875 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3876 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3877 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3878 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3879 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3880 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3881 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3882 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3883 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3884 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3885 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3886 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3887 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3888 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3889 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3890 // CHECK7: cond.true:
3891 // CHECK7-NEXT: br label [[COND_END:%.*]]
3892 // CHECK7: cond.false:
3893 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3894 // CHECK7-NEXT: br label [[COND_END]]
3895 // CHECK7: cond.end:
3896 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3897 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3898 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3899 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3900 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3901 // CHECK7: omp.inner.for.cond:
3902 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3903 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
3904 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3905 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3906 // CHECK7: omp.inner.for.body:
3907 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3908 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3909 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3910 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
3911 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3912 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
3913 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3914 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
3915 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3916 // CHECK7: omp.body.continue:
3917 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3918 // CHECK7: omp.inner.for.inc:
3919 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3920 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3921 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
3922 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
3923 // CHECK7: omp.inner.for.end:
3924 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3925 // CHECK7: omp.loop.exit:
3926 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3927 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3928 // CHECK7-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3929 // CHECK7-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3930 // CHECK7: .omp.final.then:
3931 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
3932 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
3933 // CHECK7: .omp.final.done:
3934 // CHECK7-NEXT: ret void
3935 //
3936 //
3937 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
3938 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3939 // CHECK7-NEXT: entry:
3940 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3941 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3942 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3943 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3944 // CHECK7-NEXT: ret void
3945 //
3946 //
3947 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6
3948 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3949 // CHECK7-NEXT: entry:
3950 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3951 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3952 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3953 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3954 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3955 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3956 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3957 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3958 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3959 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3960 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3961 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3962 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3963 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3964 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3965 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3966 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3967 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3968 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3969 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3970 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3971 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3972 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3973 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3974 // CHECK7: cond.true:
3975 // CHECK7-NEXT: br label [[COND_END:%.*]]
3976 // CHECK7: cond.false:
3977 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3978 // CHECK7-NEXT: br label [[COND_END]]
3979 // CHECK7: cond.end:
3980 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3981 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3982 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3983 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3984 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3985 // CHECK7: omp.inner.for.cond:
3986 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3987 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
3988 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3989 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3990 // CHECK7: omp.inner.for.body:
3991 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !24
3992 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !24
3993 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !24
3994 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3995 // CHECK7: omp.inner.for.inc:
3996 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
3997 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !24
3998 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3999 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
4000 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
4001 // CHECK7: omp.inner.for.end:
4002 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4003 // CHECK7: omp.loop.exit:
4004 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4005 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4006 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4007 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4008 // CHECK7: .omp.final.then:
4009 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
4010 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4011 // CHECK7: .omp.final.done:
4012 // CHECK7-NEXT: ret void
4013 //
4014 //
4015 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7
4016 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4017 // CHECK7-NEXT: entry:
4018 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4019 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4020 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4021 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4022 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4023 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4024 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4025 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4026 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4027 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4028 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4029 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4030 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4031 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4032 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4033 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4034 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4035 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4036 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4037 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4038 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4039 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4040 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4041 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4042 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4043 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4044 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4045 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4046 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
4047 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4048 // CHECK7: omp.dispatch.cond:
4049 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4050 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4051 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
4052 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4053 // CHECK7: cond.true:
4054 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4055 // CHECK7-NEXT: br label [[COND_END:%.*]]
4056 // CHECK7: cond.false:
4057 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4058 // CHECK7-NEXT: br label [[COND_END]]
4059 // CHECK7: cond.end:
4060 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
4061 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4062 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4063 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4064 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4065 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4066 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
4067 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4068 // CHECK7: omp.dispatch.body:
4069 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4070 // CHECK7: omp.inner.for.cond:
4071 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4072 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !27
4073 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4074 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4075 // CHECK7: omp.inner.for.body:
4076 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4077 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
4078 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4079 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !27
4080 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4081 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !27
4082 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
4083 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !27
4084 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4085 // CHECK7: omp.body.continue:
4086 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4087 // CHECK7: omp.inner.for.inc:
4088 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4089 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
4090 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !27
4091 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
4092 // CHECK7: omp.inner.for.end:
4093 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4094 // CHECK7: omp.dispatch.inc:
4095 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4096 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4097 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4098 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
4099 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4100 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4101 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4102 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
4103 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
4104 // CHECK7: omp.dispatch.end:
4105 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4106 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4107 // CHECK7-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
4108 // CHECK7-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4109 // CHECK7: .omp.final.then:
4110 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
4111 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4112 // CHECK7: .omp.final.done:
4113 // CHECK7-NEXT: ret void
4114 //
4115 //
4116 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
4117 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4118 // CHECK7-NEXT: entry:
4119 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4120 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4121 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4122 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4123 // CHECK7-NEXT: ret void
4124 //
4125 //
4126 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10
4127 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4128 // CHECK7-NEXT: entry:
4129 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4130 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4131 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4132 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4133 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4134 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4135 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4136 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4137 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4138 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4139 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4140 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4141 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4142 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4143 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4144 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4145 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4146 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4147 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4148 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4149 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4150 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4151 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4152 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4153 // CHECK7: cond.true:
4154 // CHECK7-NEXT: br label [[COND_END:%.*]]
4155 // CHECK7: cond.false:
4156 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4157 // CHECK7-NEXT: br label [[COND_END]]
4158 // CHECK7: cond.end:
4159 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4160 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4161 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4162 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4163 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4164 // CHECK7: omp.inner.for.cond:
4165 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
4166 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
4167 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4168 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4169 // CHECK7: omp.inner.for.body:
4170 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !30
4171 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !30
4172 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !30
4173 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4174 // CHECK7: omp.inner.for.inc:
4175 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
4176 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !30
4177 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4178 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !30
4179 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
4180 // CHECK7: omp.inner.for.end:
4181 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4182 // CHECK7: omp.loop.exit:
4183 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4184 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4185 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4186 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4187 // CHECK7: .omp.final.then:
4188 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
4189 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4190 // CHECK7: .omp.final.done:
4191 // CHECK7-NEXT: ret void
4192 //
4193 //
4194 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11
4195 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4196 // CHECK7-NEXT: entry:
4197 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4198 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4199 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4200 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4201 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4202 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4203 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4204 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4205 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4206 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4207 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4208 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4209 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4210 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4211 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4212 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4213 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4214 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4215 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4216 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4217 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4218 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4219 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4220 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4221 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4222 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4223 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4224 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4225 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4226 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4227 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
4228 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4229 // CHECK7: omp.dispatch.cond:
4230 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4231 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4232 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4233 // CHECK7: omp.dispatch.body:
4234 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4235 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4236 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4237 // CHECK7: omp.inner.for.cond:
4238 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4239 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !33
4240 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4241 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4242 // CHECK7: omp.inner.for.body:
4243 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4244 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4245 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4246 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !33
4247 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4248 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !33
4249 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
4250 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !33
4251 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4252 // CHECK7: omp.body.continue:
4253 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4254 // CHECK7: omp.inner.for.inc:
4255 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4256 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4257 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !33
4258 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
4259 // CHECK7: omp.inner.for.end:
4260 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4261 // CHECK7: omp.dispatch.inc:
4262 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
4263 // CHECK7: omp.dispatch.end:
4264 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4265 // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4266 // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4267 // CHECK7: .omp.final.then:
4268 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
4269 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4270 // CHECK7: .omp.final.done:
4271 // CHECK7-NEXT: ret void
4272 //
4273 //
4274 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
4275 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4276 // CHECK7-NEXT: entry:
4277 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4278 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4279 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4280 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4281 // CHECK7-NEXT: ret void
4282 //
4283 //
4284 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14
4285 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4286 // CHECK7-NEXT: entry:
4287 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4288 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4289 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4290 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4291 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4292 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4293 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4294 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4295 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4296 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4297 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4298 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4299 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4300 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4301 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4302 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4303 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4304 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4305 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4306 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4307 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4308 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4309 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4310 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4311 // CHECK7: cond.true:
4312 // CHECK7-NEXT: br label [[COND_END:%.*]]
4313 // CHECK7: cond.false:
4314 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4315 // CHECK7-NEXT: br label [[COND_END]]
4316 // CHECK7: cond.end:
4317 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4318 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4319 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4320 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4321 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4322 // CHECK7: omp.inner.for.cond:
4323 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
4324 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
4325 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4326 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4327 // CHECK7: omp.inner.for.body:
4328 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !36
4329 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !36
4330 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !36
4331 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4332 // CHECK7: omp.inner.for.inc:
4333 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
4334 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !36
4335 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4336 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !36
4337 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
4338 // CHECK7: omp.inner.for.end:
4339 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4340 // CHECK7: omp.loop.exit:
4341 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4342 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4343 // CHECK7-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
4344 // CHECK7-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4345 // CHECK7: .omp.final.then:
4346 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
4347 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4348 // CHECK7: .omp.final.done:
4349 // CHECK7-NEXT: ret void
4350 //
4351 //
4352 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15
4353 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4354 // CHECK7-NEXT: entry:
4355 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4356 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4357 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4358 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4359 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4360 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4361 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4362 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4363 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4364 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4365 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4366 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4367 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4368 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4369 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4370 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4371 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4372 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4373 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4374 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4375 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4376 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4377 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4378 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4379 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4380 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4381 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4382 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4383 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4384 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4385 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4386 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4387 // CHECK7: omp.dispatch.cond:
4388 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4389 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4390 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4391 // CHECK7: omp.dispatch.body:
4392 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4393 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4394 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4395 // CHECK7: omp.inner.for.cond:
4396 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4397 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !39
4398 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4399 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4400 // CHECK7: omp.inner.for.body:
4401 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4402 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4403 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4404 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !39
4405 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4406 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !39
4407 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
4408 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !39
4409 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4410 // CHECK7: omp.body.continue:
4411 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4412 // CHECK7: omp.inner.for.inc:
4413 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4414 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4415 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !39
4416 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
4417 // CHECK7: omp.inner.for.end:
4418 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4419 // CHECK7: omp.dispatch.inc:
4420 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
4421 // CHECK7: omp.dispatch.end:
4422 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4423 // CHECK7-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4424 // CHECK7-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4425 // CHECK7: .omp.final.then:
4426 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
4427 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
4428 // CHECK7: .omp.final.done:
4429 // CHECK7-NEXT: ret void
4430 //
4431 //
4432 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4433 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
4434 // CHECK7-NEXT: entry:
4435 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1)
4436 // CHECK7-NEXT: ret void
4437 //
4438 //
4439 // CHECK9-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4440 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
4441 // CHECK9-NEXT: entry:
4442 // CHECK9-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4443 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
4444 // CHECK9-NEXT: ret i32 [[CALL]]
4445 //
4446 //
4447 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4448 // CHECK9-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4449 // CHECK9-NEXT: entry:
4450 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4451 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4452 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4453 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4454 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4455 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4456 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
4457 // CHECK9-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
4458 // CHECK9-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
4459 // CHECK9-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
4460 // CHECK9-NEXT: [[I7:%.*]] = alloca i32, align 4
4461 // CHECK9-NEXT: [[_TMP20:%.*]] = alloca i32, align 4
4462 // CHECK9-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
4463 // CHECK9-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
4464 // CHECK9-NEXT: [[DOTOMP_IV23:%.*]] = alloca i32, align 4
4465 // CHECK9-NEXT: [[I24:%.*]] = alloca i32, align 4
4466 // CHECK9-NEXT: [[_TMP37:%.*]] = alloca i32, align 4
4467 // CHECK9-NEXT: [[DOTOMP_LB38:%.*]] = alloca i32, align 4
4468 // CHECK9-NEXT: [[DOTOMP_UB39:%.*]] = alloca i32, align 4
4469 // CHECK9-NEXT: [[DOTOMP_IV40:%.*]] = alloca i32, align 4
4470 // CHECK9-NEXT: [[I41:%.*]] = alloca i32, align 4
4471 // CHECK9-NEXT: [[_TMP54:%.*]] = alloca i32, align 4
4472 // CHECK9-NEXT: [[DOTOMP_LB55:%.*]] = alloca i32, align 4
4473 // CHECK9-NEXT: [[DOTOMP_UB56:%.*]] = alloca i32, align 4
4474 // CHECK9-NEXT: [[DOTOMP_IV57:%.*]] = alloca i32, align 4
4475 // CHECK9-NEXT: [[I58:%.*]] = alloca i32, align 4
4476 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4477 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4478 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4479 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4480 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4481 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4482 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4483 // CHECK9: omp.inner.for.cond:
4484 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4485 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
4486 // CHECK9-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4487 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4488 // CHECK9: omp.inner.for.body:
4489 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4490 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4491 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4492 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
4493 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
4494 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
4495 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
4496 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4497 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
4498 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4499 // CHECK9: omp.body.continue:
4500 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4501 // CHECK9: omp.inner.for.inc:
4502 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4503 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
4504 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
4505 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4506 // CHECK9: omp.inner.for.end:
4507 // CHECK9-NEXT: store i32 123, i32* [[I]], align 4
4508 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
4509 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
4510 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
4511 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
4512 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
4513 // CHECK9: omp.inner.for.cond8:
4514 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
4515 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !6
4516 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4517 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
4518 // CHECK9: omp.inner.for.body10:
4519 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
4520 // CHECK9-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
4521 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
4522 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !6
4523 // CHECK9-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4524 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !6
4525 // CHECK9-NEXT: [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64
4526 // CHECK9-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i64 0, i64 [[IDXPROM14]]
4527 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX15]], align 4, !llvm.access.group !6
4528 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]]
4529 // CHECK9: omp.body.continue16:
4530 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]]
4531 // CHECK9: omp.inner.for.inc17:
4532 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
4533 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
4534 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !6
4535 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
4536 // CHECK9: omp.inner.for.end19:
4537 // CHECK9-NEXT: store i32 123, i32* [[I7]], align 4
4538 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
4539 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB22]], align 4
4540 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
4541 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV23]], align 4
4542 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25:%.*]]
4543 // CHECK9: omp.inner.for.cond25:
4544 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
4545 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !9
4546 // CHECK9-NEXT: [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4547 // CHECK9-NEXT: br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
4548 // CHECK9: omp.inner.for.body27:
4549 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
4550 // CHECK9-NEXT: [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1
4551 // CHECK9-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
4552 // CHECK9-NEXT: store i32 [[ADD29]], i32* [[I24]], align 4, !llvm.access.group !9
4553 // CHECK9-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4554 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I24]], align 4, !llvm.access.group !9
4555 // CHECK9-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64
4556 // CHECK9-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 [[IDXPROM31]]
4557 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX32]], align 4, !llvm.access.group !9
4558 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE33:%.*]]
4559 // CHECK9: omp.body.continue33:
4560 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC34:%.*]]
4561 // CHECK9: omp.inner.for.inc34:
4562 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
4563 // CHECK9-NEXT: [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1
4564 // CHECK9-NEXT: store i32 [[ADD35]], i32* [[DOTOMP_IV23]], align 4, !llvm.access.group !9
4565 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]
4566 // CHECK9: omp.inner.for.end36:
4567 // CHECK9-NEXT: store i32 123, i32* [[I24]], align 4
4568 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB38]], align 4
4569 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB39]], align 4
4570 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB38]], align 4
4571 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV40]], align 4
4572 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42:%.*]]
4573 // CHECK9: omp.inner.for.cond42:
4574 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
4575 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB39]], align 4, !llvm.access.group !12
4576 // CHECK9-NEXT: [[CMP43:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
4577 // CHECK9-NEXT: br i1 [[CMP43]], label [[OMP_INNER_FOR_BODY44:%.*]], label [[OMP_INNER_FOR_END53:%.*]]
4578 // CHECK9: omp.inner.for.body44:
4579 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
4580 // CHECK9-NEXT: [[MUL45:%.*]] = mul nsw i32 [[TMP21]], 1
4581 // CHECK9-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]]
4582 // CHECK9-NEXT: store i32 [[ADD46]], i32* [[I41]], align 4, !llvm.access.group !12
4583 // CHECK9-NEXT: [[A47:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4584 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[I41]], align 4, !llvm.access.group !12
4585 // CHECK9-NEXT: [[IDXPROM48:%.*]] = sext i32 [[TMP22]] to i64
4586 // CHECK9-NEXT: [[ARRAYIDX49:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A47]], i64 0, i64 [[IDXPROM48]]
4587 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX49]], align 4, !llvm.access.group !12
4588 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE50:%.*]]
4589 // CHECK9: omp.body.continue50:
4590 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC51:%.*]]
4591 // CHECK9: omp.inner.for.inc51:
4592 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
4593 // CHECK9-NEXT: [[ADD52:%.*]] = add nsw i32 [[TMP23]], 1
4594 // CHECK9-NEXT: store i32 [[ADD52]], i32* [[DOTOMP_IV40]], align 4, !llvm.access.group !12
4595 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND42]], !llvm.loop [[LOOP13:![0-9]+]]
4596 // CHECK9: omp.inner.for.end53:
4597 // CHECK9-NEXT: store i32 123, i32* [[I41]], align 4
4598 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB55]], align 4
4599 // CHECK9-NEXT: store i32 122, i32* [[DOTOMP_UB56]], align 4
4600 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB55]], align 4
4601 // CHECK9-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV57]], align 4
4602 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59:%.*]]
4603 // CHECK9: omp.inner.for.cond59:
4604 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
4605 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB56]], align 4, !llvm.access.group !15
4606 // CHECK9-NEXT: [[CMP60:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]]
4607 // CHECK9-NEXT: br i1 [[CMP60]], label [[OMP_INNER_FOR_BODY61:%.*]], label [[OMP_INNER_FOR_END70:%.*]]
4608 // CHECK9: omp.inner.for.body61:
4609 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
4610 // CHECK9-NEXT: [[MUL62:%.*]] = mul nsw i32 [[TMP27]], 1
4611 // CHECK9-NEXT: [[ADD63:%.*]] = add nsw i32 0, [[MUL62]]
4612 // CHECK9-NEXT: store i32 [[ADD63]], i32* [[I58]], align 4, !llvm.access.group !15
4613 // CHECK9-NEXT: [[A64:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4614 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I58]], align 4, !llvm.access.group !15
4615 // CHECK9-NEXT: [[IDXPROM65:%.*]] = sext i32 [[TMP28]] to i64
4616 // CHECK9-NEXT: [[ARRAYIDX66:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A64]], i64 0, i64 [[IDXPROM65]]
4617 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX66]], align 4, !llvm.access.group !15
4618 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE67:%.*]]
4619 // CHECK9: omp.body.continue67:
4620 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC68:%.*]]
4621 // CHECK9: omp.inner.for.inc68:
4622 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
4623 // CHECK9-NEXT: [[ADD69:%.*]] = add nsw i32 [[TMP29]], 1
4624 // CHECK9-NEXT: store i32 [[ADD69]], i32* [[DOTOMP_IV57]], align 4, !llvm.access.group !15
4625 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND59]], !llvm.loop [[LOOP16:![0-9]+]]
4626 // CHECK9: omp.inner.for.end70:
4627 // CHECK9-NEXT: store i32 123, i32* [[I58]], align 4
4628 // CHECK9-NEXT: [[A71:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4629 // CHECK9-NEXT: [[ARRAYIDX72:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A71]], i64 0, i64 0
4630 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX72]], align 4
4631 // CHECK9-NEXT: ret i32 [[TMP30]]
4632 //
4633 //
4634 // CHECK11-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4635 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
4636 // CHECK11-NEXT: entry:
4637 // CHECK11-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4638 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
4639 // CHECK11-NEXT: ret i32 [[CALL]]
4640 //
4641 //
4642 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4643 // CHECK11-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4644 // CHECK11-NEXT: entry:
4645 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4646 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4647 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4648 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4649 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4650 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4651 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
4652 // CHECK11-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
4653 // CHECK11-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
4654 // CHECK11-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
4655 // CHECK11-NEXT: [[I7:%.*]] = alloca i32, align 4
4656 // CHECK11-NEXT: [[_TMP19:%.*]] = alloca i32, align 4
4657 // CHECK11-NEXT: [[DOTOMP_LB20:%.*]] = alloca i32, align 4
4658 // CHECK11-NEXT: [[DOTOMP_UB21:%.*]] = alloca i32, align 4
4659 // CHECK11-NEXT: [[DOTOMP_IV22:%.*]] = alloca i32, align 4
4660 // CHECK11-NEXT: [[I23:%.*]] = alloca i32, align 4
4661 // CHECK11-NEXT: [[_TMP35:%.*]] = alloca i32, align 4
4662 // CHECK11-NEXT: [[DOTOMP_LB36:%.*]] = alloca i32, align 4
4663 // CHECK11-NEXT: [[DOTOMP_UB37:%.*]] = alloca i32, align 4
4664 // CHECK11-NEXT: [[DOTOMP_IV38:%.*]] = alloca i32, align 4
4665 // CHECK11-NEXT: [[I39:%.*]] = alloca i32, align 4
4666 // CHECK11-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
4667 // CHECK11-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4
4668 // CHECK11-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4
4669 // CHECK11-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4
4670 // CHECK11-NEXT: [[I55:%.*]] = alloca i32, align 4
4671 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4672 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4673 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4674 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4675 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4676 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4677 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4678 // CHECK11: omp.inner.for.cond:
4679 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4680 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
4681 // CHECK11-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4682 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4683 // CHECK11: omp.inner.for.body:
4684 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4685 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4686 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4687 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
4688 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
4689 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
4690 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP4]]
4691 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
4692 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4693 // CHECK11: omp.body.continue:
4694 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4695 // CHECK11: omp.inner.for.inc:
4696 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4697 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
4698 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
4699 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4700 // CHECK11: omp.inner.for.end:
4701 // CHECK11-NEXT: store i32 123, i32* [[I]], align 4
4702 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
4703 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB5]], align 4
4704 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
4705 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV6]], align 4
4706 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
4707 // CHECK11: omp.inner.for.cond8:
4708 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
4709 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group !7
4710 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4711 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
4712 // CHECK11: omp.inner.for.body10:
4713 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
4714 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
4715 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
4716 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group !7
4717 // CHECK11-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4718 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !7
4719 // CHECK11-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A13]], i32 0, i32 [[TMP10]]
4720 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !7
4721 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
4722 // CHECK11: omp.body.continue15:
4723 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
4724 // CHECK11: omp.inner.for.inc16:
4725 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
4726 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1
4727 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group !7
4728 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]
4729 // CHECK11: omp.inner.for.end18:
4730 // CHECK11-NEXT: store i32 123, i32* [[I7]], align 4
4731 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB20]], align 4
4732 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB21]], align 4
4733 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB20]], align 4
4734 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV22]], align 4
4735 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24:%.*]]
4736 // CHECK11: omp.inner.for.cond24:
4737 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
4738 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB21]], align 4, !llvm.access.group !10
4739 // CHECK11-NEXT: [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4740 // CHECK11-NEXT: br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]
4741 // CHECK11: omp.inner.for.body26:
4742 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
4743 // CHECK11-NEXT: [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1
4744 // CHECK11-NEXT: [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
4745 // CHECK11-NEXT: store i32 [[ADD28]], i32* [[I23]], align 4, !llvm.access.group !10
4746 // CHECK11-NEXT: [[A29:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4747 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I23]], align 4, !llvm.access.group !10
4748 // CHECK11-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A29]], i32 0, i32 [[TMP16]]
4749 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX30]], align 4, !llvm.access.group !10
4750 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE31:%.*]]
4751 // CHECK11: omp.body.continue31:
4752 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC32:%.*]]
4753 // CHECK11: omp.inner.for.inc32:
4754 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
4755 // CHECK11-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1
4756 // CHECK11-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV22]], align 4, !llvm.access.group !10
4757 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]
4758 // CHECK11: omp.inner.for.end34:
4759 // CHECK11-NEXT: store i32 123, i32* [[I23]], align 4
4760 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB36]], align 4
4761 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB37]], align 4
4762 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB36]], align 4
4763 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV38]], align 4
4764 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40:%.*]]
4765 // CHECK11: omp.inner.for.cond40:
4766 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
4767 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB37]], align 4, !llvm.access.group !13
4768 // CHECK11-NEXT: [[CMP41:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
4769 // CHECK11-NEXT: br i1 [[CMP41]], label [[OMP_INNER_FOR_BODY42:%.*]], label [[OMP_INNER_FOR_END50:%.*]]
4770 // CHECK11: omp.inner.for.body42:
4771 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
4772 // CHECK11-NEXT: [[MUL43:%.*]] = mul nsw i32 [[TMP21]], 1
4773 // CHECK11-NEXT: [[ADD44:%.*]] = add nsw i32 0, [[MUL43]]
4774 // CHECK11-NEXT: store i32 [[ADD44]], i32* [[I39]], align 4, !llvm.access.group !13
4775 // CHECK11-NEXT: [[A45:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4776 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[I39]], align 4, !llvm.access.group !13
4777 // CHECK11-NEXT: [[ARRAYIDX46:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A45]], i32 0, i32 [[TMP22]]
4778 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX46]], align 4, !llvm.access.group !13
4779 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE47:%.*]]
4780 // CHECK11: omp.body.continue47:
4781 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC48:%.*]]
4782 // CHECK11: omp.inner.for.inc48:
4783 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
4784 // CHECK11-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP23]], 1
4785 // CHECK11-NEXT: store i32 [[ADD49]], i32* [[DOTOMP_IV38]], align 4, !llvm.access.group !13
4786 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND40]], !llvm.loop [[LOOP14:![0-9]+]]
4787 // CHECK11: omp.inner.for.end50:
4788 // CHECK11-NEXT: store i32 123, i32* [[I39]], align 4
4789 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4
4790 // CHECK11-NEXT: store i32 122, i32* [[DOTOMP_UB53]], align 4
4791 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4
4792 // CHECK11-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV54]], align 4
4793 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]]
4794 // CHECK11: omp.inner.for.cond56:
4795 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
4796 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !16
4797 // CHECK11-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP25]], [[TMP26]]
4798 // CHECK11-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]]
4799 // CHECK11: omp.inner.for.body58:
4800 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
4801 // CHECK11-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP27]], 1
4802 // CHECK11-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]]
4803 // CHECK11-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !16
4804 // CHECK11-NEXT: [[A61:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4805 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !16
4806 // CHECK11-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A61]], i32 0, i32 [[TMP28]]
4807 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !16
4808 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]]
4809 // CHECK11: omp.body.continue63:
4810 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]]
4811 // CHECK11: omp.inner.for.inc64:
4812 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
4813 // CHECK11-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP29]], 1
4814 // CHECK11-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !16
4815 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP17:![0-9]+]]
4816 // CHECK11: omp.inner.for.end66:
4817 // CHECK11-NEXT: store i32 123, i32* [[I55]], align 4
4818 // CHECK11-NEXT: [[A67:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4819 // CHECK11-NEXT: [[ARRAYIDX68:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A67]], i32 0, i32 0
4820 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[ARRAYIDX68]], align 4
4821 // CHECK11-NEXT: ret i32 [[TMP30]]
4822 //
4823 //
4824 // CHECK13-LABEL: define {{[^@]+}}@main
4825 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4826 // CHECK13-NEXT: entry:
4827 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4828 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4829 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
4830 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
4831 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
4832 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4833 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
4834 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4835 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
4836 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
4837 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
4838 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
4839 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4840 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4841 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4842 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
4843 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
4844 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
4845 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
4846 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
4847 // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
4848 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4849 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
4850 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
4851 // CHECK13-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
4852 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4853 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [4 x i8*], align 8
4854 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [4 x i8*], align 8
4855 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [4 x i8*], align 8
4856 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES26:%.*]] = alloca [4 x i64], align 8
4857 // CHECK13-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
4858 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
4859 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_29:%.*]] = alloca i32, align 4
4860 // CHECK13-NEXT: [[N_CASTED37:%.*]] = alloca i64, align 8
4861 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS39:%.*]] = alloca [3 x i8*], align 8
4862 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS40:%.*]] = alloca [3 x i8*], align 8
4863 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS41:%.*]] = alloca [3 x i8*], align 8
4864 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES42:%.*]] = alloca [3 x i64], align 8
4865 // CHECK13-NEXT: [[_TMP43:%.*]] = alloca i32, align 4
4866 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_44:%.*]] = alloca i32, align 4
4867 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_45:%.*]] = alloca i32, align 4
4868 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
4869 // CHECK13-NEXT: [[N_CASTED54:%.*]] = alloca i64, align 8
4870 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED56:%.*]] = alloca i64, align 8
4871 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS58:%.*]] = alloca [4 x i8*], align 8
4872 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS59:%.*]] = alloca [4 x i8*], align 8
4873 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS60:%.*]] = alloca [4 x i8*], align 8
4874 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES61:%.*]] = alloca [4 x i64], align 8
4875 // CHECK13-NEXT: [[_TMP62:%.*]] = alloca i32, align 4
4876 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_63:%.*]] = alloca i32, align 4
4877 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_64:%.*]] = alloca i32, align 4
4878 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
4879 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4880 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
4881 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
4882 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4883 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4884 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4885 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
4886 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
4887 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
4888 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
4889 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
4890 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4891 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
4892 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
4893 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
4894 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
4895 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
4896 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4897 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
4898 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
4899 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4900 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
4901 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
4902 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4903 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8
4904 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4905 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
4906 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
4907 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4908 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
4909 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
4910 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
4911 // CHECK13-NEXT: store i8* null, i8** [[TMP16]], align 8
4912 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4913 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
4914 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
4915 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4916 // CHECK13-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
4917 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
4918 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4919 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
4920 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
4921 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8
4922 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4923 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4924 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4925 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
4926 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
4927 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4928 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
4929 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4930 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4931 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4932 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4933 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
4934 // CHECK13-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
4935 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4936 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4937 // CHECK13-NEXT: store i32 1, i32* [[TMP30]], align 4
4938 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4939 // CHECK13-NEXT: store i32 3, i32* [[TMP31]], align 4
4940 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4941 // CHECK13-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
4942 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4943 // CHECK13-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
4944 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4945 // CHECK13-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
4946 // CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4947 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
4948 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4949 // CHECK13-NEXT: store i8** null, i8*** [[TMP36]], align 8
4950 // CHECK13-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4951 // CHECK13-NEXT: store i8** null, i8*** [[TMP37]], align 8
4952 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4953 // CHECK13-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
4954 // CHECK13-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4955 // CHECK13-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
4956 // CHECK13-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4957 // CHECK13: omp_offload.failed:
4958 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
4959 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
4960 // CHECK13: omp_offload.cont:
4961 // CHECK13-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
4962 // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
4963 // CHECK13-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
4964 // CHECK13-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
4965 // CHECK13-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
4966 // CHECK13-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
4967 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false)
4968 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
4969 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
4970 // CHECK13-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
4971 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
4972 // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
4973 // CHECK13-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
4974 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
4975 // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8
4976 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
4977 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
4978 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
4979 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
4980 // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
4981 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
4982 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
4983 // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8
4984 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
4985 // CHECK13-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
4986 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
4987 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
4988 // CHECK13-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
4989 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
4990 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
4991 // CHECK13-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
4992 // CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
4993 // CHECK13-NEXT: store i8* null, i8** [[TMP60]], align 8
4994 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
4995 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
4996 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
4997 // CHECK13-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
4998 // CHECK13-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
4999 // CHECK13-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
5000 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
5001 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
5002 // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
5003 // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
5004 // CHECK13-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
5005 // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
5006 // CHECK13-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
5007 // CHECK13-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5008 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
5009 // CHECK13-NEXT: store i32 1, i32* [[TMP68]], align 4
5010 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
5011 // CHECK13-NEXT: store i32 3, i32* [[TMP69]], align 4
5012 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
5013 // CHECK13-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
5014 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
5015 // CHECK13-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
5016 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
5017 // CHECK13-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
5018 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
5019 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP73]], align 8
5020 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
5021 // CHECK13-NEXT: store i8** null, i8*** [[TMP74]], align 8
5022 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
5023 // CHECK13-NEXT: store i8** null, i8*** [[TMP75]], align 8
5024 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
5025 // CHECK13-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
5026 // CHECK13-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
5027 // CHECK13-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
5028 // CHECK13-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
5029 // CHECK13: omp_offload.failed17:
5030 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
5031 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]]
5032 // CHECK13: omp_offload.cont18:
5033 // CHECK13-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
5034 // CHECK13-NEXT: store i32 [[TMP79]], i32* [[DOTCAPTURE_EXPR_19]], align 4
5035 // CHECK13-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
5036 // CHECK13-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
5037 // CHECK13-NEXT: store i32 [[TMP80]], i32* [[CONV21]], align 4
5038 // CHECK13-NEXT: [[TMP81:%.*]] = load i64, i64* [[N_CASTED20]], align 8
5039 // CHECK13-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
5040 // CHECK13-NEXT: [[CONV22:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5041 // CHECK13-NEXT: store i32 [[TMP82]], i32* [[CONV22]], align 4
5042 // CHECK13-NEXT: [[TMP83:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5043 // CHECK13-NEXT: [[TMP84:%.*]] = mul nuw i64 [[TMP1]], 4
5044 // CHECK13-NEXT: [[TMP85:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES26]] to i8*
5045 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP85]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false)
5046 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
5047 // CHECK13-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64*
5048 // CHECK13-NEXT: store i64 [[TMP81]], i64* [[TMP87]], align 8
5049 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
5050 // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
5051 // CHECK13-NEXT: store i64 [[TMP81]], i64* [[TMP89]], align 8
5052 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
5053 // CHECK13-NEXT: store i8* null, i8** [[TMP90]], align 8
5054 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
5055 // CHECK13-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i64*
5056 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP92]], align 8
5057 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
5058 // CHECK13-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i64*
5059 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP94]], align 8
5060 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
5061 // CHECK13-NEXT: store i8* null, i8** [[TMP95]], align 8
5062 // CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
5063 // CHECK13-NEXT: [[TMP97:%.*]] = bitcast i8** [[TMP96]] to i32**
5064 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP97]], align 8
5065 // CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
5066 // CHECK13-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
5067 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 8
5068 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 2
5069 // CHECK13-NEXT: store i64 [[TMP84]], i64* [[TMP100]], align 8
5070 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 2
5071 // CHECK13-NEXT: store i8* null, i8** [[TMP101]], align 8
5072 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
5073 // CHECK13-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i64*
5074 // CHECK13-NEXT: store i64 [[TMP83]], i64* [[TMP103]], align 8
5075 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
5076 // CHECK13-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
5077 // CHECK13-NEXT: store i64 [[TMP83]], i64* [[TMP105]], align 8
5078 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 3
5079 // CHECK13-NEXT: store i8* null, i8** [[TMP106]], align 8
5080 // CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
5081 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
5082 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 0
5083 // CHECK13-NEXT: [[TMP110:%.*]] = load i32, i32* [[N]], align 4
5084 // CHECK13-NEXT: store i32 [[TMP110]], i32* [[DOTCAPTURE_EXPR_28]], align 4
5085 // CHECK13-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
5086 // CHECK13-NEXT: [[SUB30:%.*]] = sub nsw i32 [[TMP111]], 0
5087 // CHECK13-NEXT: [[DIV31:%.*]] = sdiv i32 [[SUB30]], 1
5088 // CHECK13-NEXT: [[SUB32:%.*]] = sub nsw i32 [[DIV31]], 1
5089 // CHECK13-NEXT: store i32 [[SUB32]], i32* [[DOTCAPTURE_EXPR_29]], align 4
5090 // CHECK13-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_29]], align 4
5091 // CHECK13-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP112]], 1
5092 // CHECK13-NEXT: [[TMP113:%.*]] = zext i32 [[ADD33]] to i64
5093 // CHECK13-NEXT: [[KERNEL_ARGS34:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5094 // CHECK13-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 0
5095 // CHECK13-NEXT: store i32 1, i32* [[TMP114]], align 4
5096 // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 1
5097 // CHECK13-NEXT: store i32 4, i32* [[TMP115]], align 4
5098 // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 2
5099 // CHECK13-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
5100 // CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 3
5101 // CHECK13-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 8
5102 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 4
5103 // CHECK13-NEXT: store i64* [[TMP109]], i64** [[TMP118]], align 8
5104 // CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 5
5105 // CHECK13-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP119]], align 8
5106 // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 6
5107 // CHECK13-NEXT: store i8** null, i8*** [[TMP120]], align 8
5108 // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 7
5109 // CHECK13-NEXT: store i8** null, i8*** [[TMP121]], align 8
5110 // CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 8
5111 // CHECK13-NEXT: store i64 [[TMP113]], i64* [[TMP122]], align 8
5112 // CHECK13-NEXT: [[TMP123:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]])
5113 // CHECK13-NEXT: [[TMP124:%.*]] = icmp ne i32 [[TMP123]], 0
5114 // CHECK13-NEXT: br i1 [[TMP124]], label [[OMP_OFFLOAD_FAILED35:%.*]], label [[OMP_OFFLOAD_CONT36:%.*]]
5115 // CHECK13: omp_offload.failed35:
5116 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP81]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP83]]) #[[ATTR3]]
5117 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT36]]
5118 // CHECK13: omp_offload.cont36:
5119 // CHECK13-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
5120 // CHECK13-NEXT: [[CONV38:%.*]] = bitcast i64* [[N_CASTED37]] to i32*
5121 // CHECK13-NEXT: store i32 [[TMP125]], i32* [[CONV38]], align 4
5122 // CHECK13-NEXT: [[TMP126:%.*]] = load i64, i64* [[N_CASTED37]], align 8
5123 // CHECK13-NEXT: [[TMP127:%.*]] = mul nuw i64 [[TMP1]], 4
5124 // CHECK13-NEXT: [[TMP128:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES42]] to i8*
5125 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP128]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false)
5126 // CHECK13-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
5127 // CHECK13-NEXT: [[TMP130:%.*]] = bitcast i8** [[TMP129]] to i64*
5128 // CHECK13-NEXT: store i64 [[TMP126]], i64* [[TMP130]], align 8
5129 // CHECK13-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
5130 // CHECK13-NEXT: [[TMP132:%.*]] = bitcast i8** [[TMP131]] to i64*
5131 // CHECK13-NEXT: store i64 [[TMP126]], i64* [[TMP132]], align 8
5132 // CHECK13-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 0
5133 // CHECK13-NEXT: store i8* null, i8** [[TMP133]], align 8
5134 // CHECK13-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 1
5135 // CHECK13-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
5136 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP135]], align 8
5137 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 1
5138 // CHECK13-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
5139 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP137]], align 8
5140 // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 1
5141 // CHECK13-NEXT: store i8* null, i8** [[TMP138]], align 8
5142 // CHECK13-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 2
5143 // CHECK13-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32**
5144 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP140]], align 8
5145 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 2
5146 // CHECK13-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32**
5147 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP142]], align 8
5148 // CHECK13-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 2
5149 // CHECK13-NEXT: store i64 [[TMP127]], i64* [[TMP143]], align 8
5150 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 2
5151 // CHECK13-NEXT: store i8* null, i8** [[TMP144]], align 8
5152 // CHECK13-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
5153 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
5154 // CHECK13-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 0
5155 // CHECK13-NEXT: [[TMP148:%.*]] = load i32, i32* [[N]], align 4
5156 // CHECK13-NEXT: store i32 [[TMP148]], i32* [[DOTCAPTURE_EXPR_44]], align 4
5157 // CHECK13-NEXT: [[TMP149:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_44]], align 4
5158 // CHECK13-NEXT: [[SUB46:%.*]] = sub nsw i32 [[TMP149]], 0
5159 // CHECK13-NEXT: [[DIV47:%.*]] = sdiv i32 [[SUB46]], 1
5160 // CHECK13-NEXT: [[SUB48:%.*]] = sub nsw i32 [[DIV47]], 1
5161 // CHECK13-NEXT: store i32 [[SUB48]], i32* [[DOTCAPTURE_EXPR_45]], align 4
5162 // CHECK13-NEXT: [[TMP150:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_45]], align 4
5163 // CHECK13-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP150]], 1
5164 // CHECK13-NEXT: [[TMP151:%.*]] = zext i32 [[ADD49]] to i64
5165 // CHECK13-NEXT: [[KERNEL_ARGS50:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5166 // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 0
5167 // CHECK13-NEXT: store i32 1, i32* [[TMP152]], align 4
5168 // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 1
5169 // CHECK13-NEXT: store i32 3, i32* [[TMP153]], align 4
5170 // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 2
5171 // CHECK13-NEXT: store i8** [[TMP145]], i8*** [[TMP154]], align 8
5172 // CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 3
5173 // CHECK13-NEXT: store i8** [[TMP146]], i8*** [[TMP155]], align 8
5174 // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 4
5175 // CHECK13-NEXT: store i64* [[TMP147]], i64** [[TMP156]], align 8
5176 // CHECK13-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 5
5177 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP157]], align 8
5178 // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 6
5179 // CHECK13-NEXT: store i8** null, i8*** [[TMP158]], align 8
5180 // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 7
5181 // CHECK13-NEXT: store i8** null, i8*** [[TMP159]], align 8
5182 // CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 8
5183 // CHECK13-NEXT: store i64 [[TMP151]], i64* [[TMP160]], align 8
5184 // CHECK13-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]])
5185 // CHECK13-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
5186 // CHECK13-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED51:%.*]], label [[OMP_OFFLOAD_CONT52:%.*]]
5187 // CHECK13: omp_offload.failed51:
5188 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP126]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
5189 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT52]]
5190 // CHECK13: omp_offload.cont52:
5191 // CHECK13-NEXT: [[TMP163:%.*]] = load i32, i32* [[M]], align 4
5192 // CHECK13-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_53]], align 4
5193 // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[N]], align 4
5194 // CHECK13-NEXT: [[CONV55:%.*]] = bitcast i64* [[N_CASTED54]] to i32*
5195 // CHECK13-NEXT: store i32 [[TMP164]], i32* [[CONV55]], align 4
5196 // CHECK13-NEXT: [[TMP165:%.*]] = load i64, i64* [[N_CASTED54]], align 8
5197 // CHECK13-NEXT: [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
5198 // CHECK13-NEXT: [[CONV57:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED56]] to i32*
5199 // CHECK13-NEXT: store i32 [[TMP166]], i32* [[CONV57]], align 4
5200 // CHECK13-NEXT: [[TMP167:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED56]], align 8
5201 // CHECK13-NEXT: [[TMP168:%.*]] = mul nuw i64 [[TMP1]], 4
5202 // CHECK13-NEXT: [[TMP169:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES61]] to i8*
5203 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP169]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false)
5204 // CHECK13-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
5205 // CHECK13-NEXT: [[TMP171:%.*]] = bitcast i8** [[TMP170]] to i64*
5206 // CHECK13-NEXT: store i64 [[TMP165]], i64* [[TMP171]], align 8
5207 // CHECK13-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
5208 // CHECK13-NEXT: [[TMP173:%.*]] = bitcast i8** [[TMP172]] to i64*
5209 // CHECK13-NEXT: store i64 [[TMP165]], i64* [[TMP173]], align 8
5210 // CHECK13-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 0
5211 // CHECK13-NEXT: store i8* null, i8** [[TMP174]], align 8
5212 // CHECK13-NEXT: [[TMP175:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 1
5213 // CHECK13-NEXT: [[TMP176:%.*]] = bitcast i8** [[TMP175]] to i64*
5214 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP176]], align 8
5215 // CHECK13-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 1
5216 // CHECK13-NEXT: [[TMP178:%.*]] = bitcast i8** [[TMP177]] to i64*
5217 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP178]], align 8
5218 // CHECK13-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 1
5219 // CHECK13-NEXT: store i8* null, i8** [[TMP179]], align 8
5220 // CHECK13-NEXT: [[TMP180:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 2
5221 // CHECK13-NEXT: [[TMP181:%.*]] = bitcast i8** [[TMP180]] to i32**
5222 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP181]], align 8
5223 // CHECK13-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 2
5224 // CHECK13-NEXT: [[TMP183:%.*]] = bitcast i8** [[TMP182]] to i32**
5225 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP183]], align 8
5226 // CHECK13-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 2
5227 // CHECK13-NEXT: store i64 [[TMP168]], i64* [[TMP184]], align 8
5228 // CHECK13-NEXT: [[TMP185:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 2
5229 // CHECK13-NEXT: store i8* null, i8** [[TMP185]], align 8
5230 // CHECK13-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 3
5231 // CHECK13-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64*
5232 // CHECK13-NEXT: store i64 [[TMP167]], i64* [[TMP187]], align 8
5233 // CHECK13-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 3
5234 // CHECK13-NEXT: [[TMP189:%.*]] = bitcast i8** [[TMP188]] to i64*
5235 // CHECK13-NEXT: store i64 [[TMP167]], i64* [[TMP189]], align 8
5236 // CHECK13-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 3
5237 // CHECK13-NEXT: store i8* null, i8** [[TMP190]], align 8
5238 // CHECK13-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
5239 // CHECK13-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
5240 // CHECK13-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 0
5241 // CHECK13-NEXT: [[TMP194:%.*]] = load i32, i32* [[N]], align 4
5242 // CHECK13-NEXT: store i32 [[TMP194]], i32* [[DOTCAPTURE_EXPR_63]], align 4
5243 // CHECK13-NEXT: [[TMP195:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_63]], align 4
5244 // CHECK13-NEXT: [[SUB65:%.*]] = sub nsw i32 [[TMP195]], 0
5245 // CHECK13-NEXT: [[DIV66:%.*]] = sdiv i32 [[SUB65]], 1
5246 // CHECK13-NEXT: [[SUB67:%.*]] = sub nsw i32 [[DIV66]], 1
5247 // CHECK13-NEXT: store i32 [[SUB67]], i32* [[DOTCAPTURE_EXPR_64]], align 4
5248 // CHECK13-NEXT: [[TMP196:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_64]], align 4
5249 // CHECK13-NEXT: [[ADD68:%.*]] = add nsw i32 [[TMP196]], 1
5250 // CHECK13-NEXT: [[TMP197:%.*]] = zext i32 [[ADD68]] to i64
5251 // CHECK13-NEXT: [[KERNEL_ARGS69:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5252 // CHECK13-NEXT: [[TMP198:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 0
5253 // CHECK13-NEXT: store i32 1, i32* [[TMP198]], align 4
5254 // CHECK13-NEXT: [[TMP199:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 1
5255 // CHECK13-NEXT: store i32 4, i32* [[TMP199]], align 4
5256 // CHECK13-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 2
5257 // CHECK13-NEXT: store i8** [[TMP191]], i8*** [[TMP200]], align 8
5258 // CHECK13-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 3
5259 // CHECK13-NEXT: store i8** [[TMP192]], i8*** [[TMP201]], align 8
5260 // CHECK13-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 4
5261 // CHECK13-NEXT: store i64* [[TMP193]], i64** [[TMP202]], align 8
5262 // CHECK13-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 5
5263 // CHECK13-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP203]], align 8
5264 // CHECK13-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 6
5265 // CHECK13-NEXT: store i8** null, i8*** [[TMP204]], align 8
5266 // CHECK13-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 7
5267 // CHECK13-NEXT: store i8** null, i8*** [[TMP205]], align 8
5268 // CHECK13-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 8
5269 // CHECK13-NEXT: store i64 [[TMP197]], i64* [[TMP206]], align 8
5270 // CHECK13-NEXT: [[TMP207:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]])
5271 // CHECK13-NEXT: [[TMP208:%.*]] = icmp ne i32 [[TMP207]], 0
5272 // CHECK13-NEXT: br i1 [[TMP208]], label [[OMP_OFFLOAD_FAILED70:%.*]], label [[OMP_OFFLOAD_CONT71:%.*]]
5273 // CHECK13: omp_offload.failed70:
5274 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP165]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP167]]) #[[ATTR3]]
5275 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT71]]
5276 // CHECK13: omp_offload.cont71:
5277 // CHECK13-NEXT: [[TMP209:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
5278 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP209]])
5279 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
5280 // CHECK13-NEXT: [[TMP210:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
5281 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP210]])
5282 // CHECK13-NEXT: [[TMP211:%.*]] = load i32, i32* [[RETVAL]], align 4
5283 // CHECK13-NEXT: ret i32 [[TMP211]]
5284 //
5285 //
5286 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
5287 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
5288 // CHECK13-NEXT: entry:
5289 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5290 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5291 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5292 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5293 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5294 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5295 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5296 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5297 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5298 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5299 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5300 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5301 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
5302 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
5303 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
5304 // CHECK13-NEXT: ret void
5305 //
5306 //
5307 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
5308 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5309 // CHECK13-NEXT: entry:
5310 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5311 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5312 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5313 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5314 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5315 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5316 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5317 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5318 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5319 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5320 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5321 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5322 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5323 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5324 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
5325 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5326 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5327 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5328 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5329 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5330 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5331 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5332 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5333 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5334 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5335 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5336 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5337 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5338 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5339 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5340 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5341 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5342 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5343 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5344 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5345 // CHECK13: omp.precond.then:
5346 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5347 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5348 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
5349 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5350 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5351 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5352 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
5353 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5354 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5355 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5356 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5357 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5358 // CHECK13: cond.true:
5359 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5360 // CHECK13-NEXT: br label [[COND_END:%.*]]
5361 // CHECK13: cond.false:
5362 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5363 // CHECK13-NEXT: br label [[COND_END]]
5364 // CHECK13: cond.end:
5365 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5366 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5367 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5368 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
5369 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5370 // CHECK13: omp.inner.for.cond:
5371 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5372 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
5373 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5374 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5375 // CHECK13: omp.inner.for.body:
5376 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
5377 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
5378 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
5379 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5380 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !13
5381 // CHECK13-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5382 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4, !llvm.access.group !13
5383 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !13
5384 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !13
5385 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5386 // CHECK13: omp.inner.for.inc:
5387 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5388 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
5389 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
5390 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5391 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
5392 // CHECK13: omp.inner.for.end:
5393 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5394 // CHECK13: omp.loop.exit:
5395 // CHECK13-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5396 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
5397 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
5398 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5399 // CHECK13-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5400 // CHECK13-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5401 // CHECK13: .omp.final.then:
5402 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5403 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
5404 // CHECK13-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
5405 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
5406 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
5407 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
5408 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5409 // CHECK13: .omp.final.done:
5410 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5411 // CHECK13: omp.precond.end:
5412 // CHECK13-NEXT: ret void
5413 //
5414 //
5415 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
5416 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5417 // CHECK13-NEXT: entry:
5418 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5419 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5420 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5421 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5422 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5423 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5424 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5425 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5426 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5427 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5428 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5429 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5430 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5431 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5432 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5433 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5434 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
5435 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5436 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5437 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5438 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5439 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5440 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5441 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5442 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5443 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5444 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5445 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5446 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5447 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5448 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5449 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5450 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5451 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5452 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5453 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5454 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5455 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5456 // CHECK13: omp.precond.then:
5457 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5458 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5459 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5460 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5461 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
5462 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5463 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5464 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
5465 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
5466 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5467 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5468 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5469 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5470 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5471 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5472 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5473 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5474 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5475 // CHECK13: cond.true:
5476 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5477 // CHECK13-NEXT: br label [[COND_END:%.*]]
5478 // CHECK13: cond.false:
5479 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5480 // CHECK13-NEXT: br label [[COND_END]]
5481 // CHECK13: cond.end:
5482 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5483 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5484 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5485 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
5486 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5487 // CHECK13: omp.inner.for.cond:
5488 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
5489 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
5490 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
5491 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5492 // CHECK13: omp.inner.for.body:
5493 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
5494 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
5495 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5496 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !17
5497 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !17
5498 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
5499 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
5500 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
5501 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5502 // CHECK13: omp.body.continue:
5503 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5504 // CHECK13: omp.inner.for.inc:
5505 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
5506 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
5507 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
5508 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
5509 // CHECK13: omp.inner.for.end:
5510 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5511 // CHECK13: omp.loop.exit:
5512 // CHECK13-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5513 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
5514 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
5515 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5516 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5517 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5518 // CHECK13: .omp.final.then:
5519 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5520 // CHECK13-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP24]], 0
5521 // CHECK13-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
5522 // CHECK13-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
5523 // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
5524 // CHECK13-NEXT: store i32 [[ADD12]], i32* [[I5]], align 4
5525 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5526 // CHECK13: .omp.final.done:
5527 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5528 // CHECK13: omp.precond.end:
5529 // CHECK13-NEXT: ret void
5530 //
5531 //
5532 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
5533 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5534 // CHECK13-NEXT: entry:
5535 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5536 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5537 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5538 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5539 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5540 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5541 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5542 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5543 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5544 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5545 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5546 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5547 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
5548 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
5549 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
5550 // CHECK13-NEXT: ret void
5551 //
5552 //
5553 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
5554 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5555 // CHECK13-NEXT: entry:
5556 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5557 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5558 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5559 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5560 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5561 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5562 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5563 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5564 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5565 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5566 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5567 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5568 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5569 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5570 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
5571 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5572 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5573 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5574 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5575 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5576 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5577 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5578 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5579 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5580 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5581 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5582 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5583 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5584 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5585 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5586 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5587 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5588 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5589 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5590 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5591 // CHECK13: omp.precond.then:
5592 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5593 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5594 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
5595 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5596 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5597 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5598 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
5599 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5600 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5601 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5602 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5603 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5604 // CHECK13: cond.true:
5605 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5606 // CHECK13-NEXT: br label [[COND_END:%.*]]
5607 // CHECK13: cond.false:
5608 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5609 // CHECK13-NEXT: br label [[COND_END]]
5610 // CHECK13: cond.end:
5611 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5612 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5613 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5614 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
5615 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5616 // CHECK13: omp.inner.for.cond:
5617 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5618 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
5619 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5620 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5621 // CHECK13: omp.inner.for.body:
5622 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
5623 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
5624 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
5625 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5626 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !22
5627 // CHECK13-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5628 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4, !llvm.access.group !22
5629 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !22
5630 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !22
5631 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5632 // CHECK13: omp.inner.for.inc:
5633 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5634 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
5635 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
5636 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
5637 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
5638 // CHECK13: omp.inner.for.end:
5639 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5640 // CHECK13: omp.loop.exit:
5641 // CHECK13-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5642 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
5643 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
5644 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5645 // CHECK13-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5646 // CHECK13-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5647 // CHECK13: .omp.final.then:
5648 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5649 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
5650 // CHECK13-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
5651 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
5652 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
5653 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
5654 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5655 // CHECK13: .omp.final.done:
5656 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5657 // CHECK13: omp.precond.end:
5658 // CHECK13-NEXT: ret void
5659 //
5660 //
5661 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
5662 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5663 // CHECK13-NEXT: entry:
5664 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5665 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5666 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5667 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5668 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5669 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5670 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5671 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5672 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5673 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5674 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5675 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5676 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5677 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5678 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5679 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5680 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
5681 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5682 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5683 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5684 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5685 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5686 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5687 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5688 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5689 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5690 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5691 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5692 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5693 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5694 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5695 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5696 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5697 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5698 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5699 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5700 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5701 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5702 // CHECK13: omp.precond.then:
5703 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5704 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5705 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5706 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5707 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
5708 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5709 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5710 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
5711 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
5712 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5713 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5714 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5715 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5716 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5717 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5718 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5719 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5720 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5721 // CHECK13: cond.true:
5722 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5723 // CHECK13-NEXT: br label [[COND_END:%.*]]
5724 // CHECK13: cond.false:
5725 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5726 // CHECK13-NEXT: br label [[COND_END]]
5727 // CHECK13: cond.end:
5728 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5729 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5730 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5731 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
5732 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5733 // CHECK13: omp.inner.for.cond:
5734 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5735 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
5736 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
5737 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5738 // CHECK13: omp.inner.for.body:
5739 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5740 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
5741 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5742 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !25
5743 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !25
5744 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
5745 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
5746 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
5747 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5748 // CHECK13: omp.body.continue:
5749 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5750 // CHECK13: omp.inner.for.inc:
5751 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5752 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
5753 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
5754 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
5755 // CHECK13: omp.inner.for.end:
5756 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5757 // CHECK13: omp.loop.exit:
5758 // CHECK13-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5759 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
5760 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
5761 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5762 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5763 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5764 // CHECK13: .omp.final.then:
5765 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5766 // CHECK13-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP24]], 0
5767 // CHECK13-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
5768 // CHECK13-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
5769 // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
5770 // CHECK13-NEXT: store i32 [[ADD12]], i32* [[I5]], align 4
5771 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5772 // CHECK13: .omp.final.done:
5773 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5774 // CHECK13: omp.precond.end:
5775 // CHECK13-NEXT: ret void
5776 //
5777 //
5778 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
5779 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5780 // CHECK13-NEXT: entry:
5781 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5782 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5783 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5784 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5785 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5786 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5787 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5788 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5789 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5790 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5791 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5792 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5793 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5794 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5795 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5796 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5797 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
5798 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
5799 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
5800 // CHECK13-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5801 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
5802 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5803 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
5804 // CHECK13-NEXT: ret void
5805 //
5806 //
5807 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
5808 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5809 // CHECK13-NEXT: entry:
5810 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5811 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5812 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5813 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5814 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5815 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5816 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5817 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5818 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5819 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5820 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5821 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5822 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5823 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5824 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5825 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
5826 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5827 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5828 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5829 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5830 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5831 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5832 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5833 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5834 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5835 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5836 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5837 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5838 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5839 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5840 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5841 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5842 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5843 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
5844 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5845 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5846 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5847 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5848 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5849 // CHECK13: omp.precond.then:
5850 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5851 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5852 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
5853 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5854 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5855 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
5856 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5857 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5858 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
5859 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5860 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5861 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5862 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5863 // CHECK13: cond.true:
5864 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5865 // CHECK13-NEXT: br label [[COND_END:%.*]]
5866 // CHECK13: cond.false:
5867 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5868 // CHECK13-NEXT: br label [[COND_END]]
5869 // CHECK13: cond.end:
5870 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5871 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5872 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5873 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5874 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5875 // CHECK13: omp.inner.for.cond:
5876 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5877 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !28
5878 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
5879 // CHECK13-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
5880 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5881 // CHECK13: omp.inner.for.body:
5882 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
5883 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5884 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
5885 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5886 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !28
5887 // CHECK13-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5888 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4, !llvm.access.group !28
5889 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !28
5890 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 4, !llvm.access.group !28
5891 // CHECK13-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5892 // CHECK13-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4, !llvm.access.group !28
5893 // CHECK13-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28
5894 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]]), !llvm.access.group !28
5895 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5896 // CHECK13: omp.inner.for.inc:
5897 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5898 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
5899 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
5900 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5901 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
5902 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
5903 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
5904 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
5905 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
5906 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
5907 // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
5908 // CHECK13-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
5909 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
5910 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !28
5911 // CHECK13-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
5912 // CHECK13-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
5913 // CHECK13: cond.true14:
5914 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !28
5915 // CHECK13-NEXT: br label [[COND_END16:%.*]]
5916 // CHECK13: cond.false15:
5917 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
5918 // CHECK13-NEXT: br label [[COND_END16]]
5919 // CHECK13: cond.end16:
5920 // CHECK13-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
5921 // CHECK13-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
5922 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
5923 // CHECK13-NEXT: store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
5924 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
5925 // CHECK13: omp.inner.for.end:
5926 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5927 // CHECK13: omp.loop.exit:
5928 // CHECK13-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5929 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
5930 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
5931 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5932 // CHECK13-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0
5933 // CHECK13-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5934 // CHECK13: .omp.final.then:
5935 // CHECK13-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5936 // CHECK13-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP39]], 0
5937 // CHECK13-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
5938 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV19]], 1
5939 // CHECK13-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL]]
5940 // CHECK13-NEXT: store i32 [[ADD20]], i32* [[I5]], align 4
5941 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5942 // CHECK13: .omp.final.done:
5943 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5944 // CHECK13: omp.precond.end:
5945 // CHECK13-NEXT: ret void
5946 //
5947 //
5948 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
5949 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5950 // CHECK13-NEXT: entry:
5951 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5952 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5953 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5954 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5955 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5956 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5957 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5958 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5959 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5960 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5961 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5962 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5963 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5964 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5965 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5966 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5967 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5968 // CHECK13-NEXT: [[I7:%.*]] = alloca i32, align 4
5969 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5970 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5971 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5972 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5973 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5974 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5975 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5976 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5977 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5978 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5979 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5980 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5981 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5982 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5983 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5984 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5985 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5986 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
5987 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5988 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5989 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5990 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5991 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5992 // CHECK13: omp.precond.then:
5993 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5994 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5995 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5996 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5997 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
5998 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5999 // CHECK13-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
6000 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
6001 // CHECK13-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
6002 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6003 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6004 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6005 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
6006 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6007 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6008 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6009 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
6010 // CHECK13-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6011 // CHECK13: cond.true:
6012 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6013 // CHECK13-NEXT: br label [[COND_END:%.*]]
6014 // CHECK13: cond.false:
6015 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6016 // CHECK13-NEXT: br label [[COND_END]]
6017 // CHECK13: cond.end:
6018 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
6019 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6020 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6021 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
6022 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6023 // CHECK13: omp.inner.for.cond:
6024 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6025 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
6026 // CHECK13-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
6027 // CHECK13-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6028 // CHECK13: omp.inner.for.body:
6029 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6030 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
6031 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6032 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !31
6033 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !31
6034 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
6035 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
6036 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31
6037 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6038 // CHECK13: omp.body.continue:
6039 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6040 // CHECK13: omp.inner.for.inc:
6041 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6042 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
6043 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
6044 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
6045 // CHECK13: omp.inner.for.end:
6046 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6047 // CHECK13: omp.loop.exit:
6048 // CHECK13-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6049 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
6050 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
6051 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6052 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
6053 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6054 // CHECK13: .omp.final.then:
6055 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6056 // CHECK13-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP24]], 0
6057 // CHECK13-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
6058 // CHECK13-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
6059 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6060 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[I7]], align 4
6061 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
6062 // CHECK13: .omp.final.done:
6063 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
6064 // CHECK13: omp.precond.end:
6065 // CHECK13-NEXT: ret void
6066 //
6067 //
6068 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
6069 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6070 // CHECK13-NEXT: entry:
6071 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6072 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6073 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6074 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
6075 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6076 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6077 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6078 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6079 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6080 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6081 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
6082 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
6083 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
6084 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
6085 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
6086 // CHECK13-NEXT: ret void
6087 //
6088 //
6089 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
6090 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6091 // CHECK13-NEXT: entry:
6092 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6093 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6094 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6095 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6096 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6097 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6098 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6099 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6100 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6101 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6102 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6103 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6104 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6105 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6106 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
6107 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
6108 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6109 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6110 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6111 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6112 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6113 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6114 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6115 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6116 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
6117 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
6118 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6119 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
6120 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6121 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6122 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6123 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
6124 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6125 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
6126 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6127 // CHECK13: omp.precond.then:
6128 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6129 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6130 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
6131 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6132 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6133 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6134 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
6135 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6136 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6137 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6138 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
6139 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6140 // CHECK13: cond.true:
6141 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6142 // CHECK13-NEXT: br label [[COND_END:%.*]]
6143 // CHECK13: cond.false:
6144 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6145 // CHECK13-NEXT: br label [[COND_END]]
6146 // CHECK13: cond.end:
6147 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
6148 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6149 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6150 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
6151 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6152 // CHECK13: omp.inner.for.cond:
6153 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
6154 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
6155 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6156 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6157 // CHECK13: omp.inner.for.body:
6158 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
6159 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
6160 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
6161 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
6162 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !34
6163 // CHECK13-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
6164 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4, !llvm.access.group !34
6165 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !34
6166 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !34
6167 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6168 // CHECK13: omp.inner.for.inc:
6169 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
6170 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
6171 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
6172 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
6173 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
6174 // CHECK13: omp.inner.for.end:
6175 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6176 // CHECK13: omp.loop.exit:
6177 // CHECK13-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6178 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
6179 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
6180 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6181 // CHECK13-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
6182 // CHECK13-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6183 // CHECK13: .omp.final.then:
6184 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6185 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
6186 // CHECK13-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
6187 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
6188 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
6189 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
6190 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
6191 // CHECK13: .omp.final.done:
6192 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
6193 // CHECK13: omp.precond.end:
6194 // CHECK13-NEXT: ret void
6195 //
6196 //
6197 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
6198 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
6199 // CHECK13-NEXT: entry:
6200 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6201 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6202 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6203 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6204 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6205 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6206 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6207 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6208 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6209 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6210 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6211 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6212 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6213 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6214 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6215 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6216 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
6217 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6218 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6219 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6220 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6221 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6222 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6223 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6224 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6225 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6226 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6227 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
6228 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
6229 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6230 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
6231 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6232 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6233 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6234 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
6235 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6236 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
6237 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6238 // CHECK13: omp.precond.then:
6239 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6240 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6241 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
6242 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6243 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
6244 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6245 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
6246 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
6247 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
6248 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6249 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6250 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6251 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6252 // CHECK13-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6253 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
6254 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
6255 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6256 // CHECK13: omp.dispatch.cond:
6257 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6258 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
6259 // CHECK13-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6260 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
6261 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6262 // CHECK13: omp.dispatch.body:
6263 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6264 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
6265 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6266 // CHECK13: omp.inner.for.cond:
6267 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
6268 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
6269 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
6270 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6271 // CHECK13: omp.inner.for.body:
6272 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
6273 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
6274 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6275 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !37
6276 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !37
6277 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
6278 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
6279 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37
6280 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6281 // CHECK13: omp.body.continue:
6282 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6283 // CHECK13: omp.inner.for.inc:
6284 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
6285 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
6286 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
6287 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
6288 // CHECK13: omp.inner.for.end:
6289 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6290 // CHECK13: omp.dispatch.inc:
6291 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6292 // CHECK13: omp.dispatch.end:
6293 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6294 // CHECK13-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
6295 // CHECK13-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6296 // CHECK13: .omp.final.then:
6297 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6298 // CHECK13-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP23]], 0
6299 // CHECK13-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
6300 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
6301 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
6302 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I5]], align 4
6303 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
6304 // CHECK13: .omp.final.done:
6305 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
6306 // CHECK13: omp.precond.end:
6307 // CHECK13-NEXT: ret void
6308 //
6309 //
6310 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
6311 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6312 // CHECK13-NEXT: entry:
6313 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6314 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6315 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6316 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6317 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
6318 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6319 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6320 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6321 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6322 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6323 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6324 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6325 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6326 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6327 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
6328 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
6329 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
6330 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
6331 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
6332 // CHECK13-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6333 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
6334 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6335 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
6336 // CHECK13-NEXT: ret void
6337 //
6338 //
6339 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
6340 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6341 // CHECK13-NEXT: entry:
6342 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6343 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6344 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6345 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6346 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6347 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6348 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6349 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6350 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6351 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
6352 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6353 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6354 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6355 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6356 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6357 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
6358 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
6359 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6360 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6361 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6362 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6363 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6364 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6365 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6366 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6367 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6368 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6369 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6370 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
6371 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
6372 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6373 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
6374 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6375 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
6376 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
6377 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
6378 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6379 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
6380 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6381 // CHECK13: omp.precond.then:
6382 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6383 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6384 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
6385 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6386 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6387 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6388 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
6389 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6390 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6391 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6392 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
6393 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6394 // CHECK13: cond.true:
6395 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6396 // CHECK13-NEXT: br label [[COND_END:%.*]]
6397 // CHECK13: cond.false:
6398 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6399 // CHECK13-NEXT: br label [[COND_END]]
6400 // CHECK13: cond.end:
6401 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
6402 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6403 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6404 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
6405 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6406 // CHECK13: omp.inner.for.cond:
6407 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
6408 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
6409 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6410 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6411 // CHECK13: omp.inner.for.body:
6412 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
6413 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
6414 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
6415 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
6416 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !40
6417 // CHECK13-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
6418 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV8]], align 4, !llvm.access.group !40
6419 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !40
6420 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 4, !llvm.access.group !40
6421 // CHECK13-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6422 // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV9]], align 4, !llvm.access.group !40
6423 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40
6424 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]]), !llvm.access.group !40
6425 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6426 // CHECK13: omp.inner.for.inc:
6427 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
6428 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
6429 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
6430 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
6431 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
6432 // CHECK13: omp.inner.for.end:
6433 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6434 // CHECK13: omp.loop.exit:
6435 // CHECK13-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6436 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
6437 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
6438 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6439 // CHECK13-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
6440 // CHECK13-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6441 // CHECK13: .omp.final.then:
6442 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6443 // CHECK13-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0
6444 // CHECK13-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
6445 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
6446 // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
6447 // CHECK13-NEXT: store i32 [[ADD12]], i32* [[I5]], align 4
6448 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
6449 // CHECK13: .omp.final.done:
6450 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
6451 // CHECK13: omp.precond.end:
6452 // CHECK13-NEXT: ret void
6453 //
6454 //
6455 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
6456 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6457 // CHECK13-NEXT: entry:
6458 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6459 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6460 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6461 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6462 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
6463 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
6464 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
6465 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6466 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6467 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6468 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
6469 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
6470 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6471 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6472 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6473 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6474 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6475 // CHECK13-NEXT: [[I7:%.*]] = alloca i32, align 4
6476 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6477 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6478 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6479 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6480 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
6481 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
6482 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
6483 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6484 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
6485 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
6486 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
6487 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6488 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
6489 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
6490 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6491 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
6492 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6493 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
6494 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
6495 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
6496 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6497 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
6498 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
6499 // CHECK13: omp.precond.then:
6500 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6501 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
6502 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
6503 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6504 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
6505 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6506 // CHECK13-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
6507 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
6508 // CHECK13-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
6509 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6510 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6511 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 4
6512 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6513 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6514 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6515 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
6516 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
6517 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6518 // CHECK13: omp.dispatch.cond:
6519 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6520 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
6521 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6522 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
6523 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6524 // CHECK13: omp.dispatch.body:
6525 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6526 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6527 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6528 // CHECK13: omp.inner.for.cond:
6529 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
6530 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
6531 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6532 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6533 // CHECK13: omp.inner.for.body:
6534 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
6535 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
6536 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6537 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !43
6538 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !43
6539 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
6540 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
6541 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43
6542 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6543 // CHECK13: omp.body.continue:
6544 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6545 // CHECK13: omp.inner.for.inc:
6546 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
6547 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
6548 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
6549 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
6550 // CHECK13: omp.inner.for.end:
6551 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6552 // CHECK13: omp.dispatch.inc:
6553 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6554 // CHECK13: omp.dispatch.end:
6555 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6556 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
6557 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6558 // CHECK13: .omp.final.then:
6559 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
6560 // CHECK13-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP24]], 0
6561 // CHECK13-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
6562 // CHECK13-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
6563 // CHECK13-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
6564 // CHECK13-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4
6565 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
6566 // CHECK13: .omp.final.done:
6567 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
6568 // CHECK13: omp.precond.end:
6569 // CHECK13-NEXT: ret void
6570 //
6571 //
6572 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
6573 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
6574 // CHECK13-NEXT: entry:
6575 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6576 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
6577 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
6578 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6579 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6580 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6581 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6582 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
6583 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
6584 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
6585 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
6586 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6587 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6588 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8
6589 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8
6590 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8
6591 // CHECK13-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
6592 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 8
6593 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 8
6594 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 8
6595 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
6596 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
6597 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8
6598 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS25:%.*]] = alloca [2 x i8*], align 8
6599 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS26:%.*]] = alloca [2 x i8*], align 8
6600 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS27:%.*]] = alloca [2 x i8*], align 8
6601 // CHECK13-NEXT: [[_TMP28:%.*]] = alloca i32, align 4
6602 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6603 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
6604 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6605 // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
6606 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
6607 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6608 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
6609 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
6610 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6611 // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8
6612 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6613 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6614 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6615 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6616 // CHECK13-NEXT: store i32 1, i32* [[TMP7]], align 4
6617 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6618 // CHECK13-NEXT: store i32 1, i32* [[TMP8]], align 4
6619 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6620 // CHECK13-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
6621 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6622 // CHECK13-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
6623 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6624 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 8
6625 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6626 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 8
6627 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6628 // CHECK13-NEXT: store i8** null, i8*** [[TMP13]], align 8
6629 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6630 // CHECK13-NEXT: store i8** null, i8*** [[TMP14]], align 8
6631 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6632 // CHECK13-NEXT: store i64 10, i64* [[TMP15]], align 8
6633 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6634 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6635 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6636 // CHECK13: omp_offload.failed:
6637 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
6638 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
6639 // CHECK13: omp_offload.cont:
6640 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
6641 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
6642 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
6643 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
6644 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
6645 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
6646 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
6647 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8
6648 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
6649 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
6650 // CHECK13-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6651 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
6652 // CHECK13-NEXT: store i32 1, i32* [[TMP25]], align 4
6653 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
6654 // CHECK13-NEXT: store i32 1, i32* [[TMP26]], align 4
6655 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
6656 // CHECK13-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
6657 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
6658 // CHECK13-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
6659 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
6660 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 8
6661 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
6662 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 8
6663 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
6664 // CHECK13-NEXT: store i8** null, i8*** [[TMP31]], align 8
6665 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
6666 // CHECK13-NEXT: store i8** null, i8*** [[TMP32]], align 8
6667 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
6668 // CHECK13-NEXT: store i64 10, i64* [[TMP33]], align 8
6669 // CHECK13-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
6670 // CHECK13-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
6671 // CHECK13-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
6672 // CHECK13: omp_offload.failed6:
6673 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
6674 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]]
6675 // CHECK13: omp_offload.cont7:
6676 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
6677 // CHECK13-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
6678 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6679 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6680 // CHECK13-NEXT: store i32 [[TMP37]], i32* [[CONV]], align 4
6681 // CHECK13-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6682 // CHECK13-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
6683 // CHECK13-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
6684 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 8
6685 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
6686 // CHECK13-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
6687 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 8
6688 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
6689 // CHECK13-NEXT: store i8* null, i8** [[TMP43]], align 8
6690 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
6691 // CHECK13-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
6692 // CHECK13-NEXT: store i64 [[TMP38]], i64* [[TMP45]], align 8
6693 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
6694 // CHECK13-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i64*
6695 // CHECK13-NEXT: store i64 [[TMP38]], i64* [[TMP47]], align 8
6696 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
6697 // CHECK13-NEXT: store i8* null, i8** [[TMP48]], align 8
6698 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
6699 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
6700 // CHECK13-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6701 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
6702 // CHECK13-NEXT: store i32 1, i32* [[TMP51]], align 4
6703 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
6704 // CHECK13-NEXT: store i32 2, i32* [[TMP52]], align 4
6705 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
6706 // CHECK13-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 8
6707 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
6708 // CHECK13-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 8
6709 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
6710 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 8
6711 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
6712 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 8
6713 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
6714 // CHECK13-NEXT: store i8** null, i8*** [[TMP57]], align 8
6715 // CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
6716 // CHECK13-NEXT: store i8** null, i8*** [[TMP58]], align 8
6717 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
6718 // CHECK13-NEXT: store i64 10, i64* [[TMP59]], align 8
6719 // CHECK13-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
6720 // CHECK13-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
6721 // CHECK13-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
6722 // CHECK13: omp_offload.failed13:
6723 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP38]]) #[[ATTR3]]
6724 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT14]]
6725 // CHECK13: omp_offload.cont14:
6726 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
6727 // CHECK13-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
6728 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 8
6729 // CHECK13-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
6730 // CHECK13-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
6731 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 8
6732 // CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
6733 // CHECK13-NEXT: store i8* null, i8** [[TMP66]], align 8
6734 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
6735 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
6736 // CHECK13-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6737 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
6738 // CHECK13-NEXT: store i32 1, i32* [[TMP69]], align 4
6739 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
6740 // CHECK13-NEXT: store i32 1, i32* [[TMP70]], align 4
6741 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
6742 // CHECK13-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 8
6743 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
6744 // CHECK13-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 8
6745 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
6746 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 8
6747 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
6748 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 8
6749 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
6750 // CHECK13-NEXT: store i8** null, i8*** [[TMP75]], align 8
6751 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
6752 // CHECK13-NEXT: store i8** null, i8*** [[TMP76]], align 8
6753 // CHECK13-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
6754 // CHECK13-NEXT: store i64 10, i64* [[TMP77]], align 8
6755 // CHECK13-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
6756 // CHECK13-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
6757 // CHECK13-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
6758 // CHECK13: omp_offload.failed20:
6759 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
6760 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT21]]
6761 // CHECK13: omp_offload.cont21:
6762 // CHECK13-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
6763 // CHECK13-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
6764 // CHECK13-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
6765 // CHECK13-NEXT: [[CONV24:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED23]] to i32*
6766 // CHECK13-NEXT: store i32 [[TMP81]], i32* [[CONV24]], align 4
6767 // CHECK13-NEXT: [[TMP82:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED23]], align 8
6768 // CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
6769 // CHECK13-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
6770 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 8
6771 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
6772 // CHECK13-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
6773 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 8
6774 // CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 0
6775 // CHECK13-NEXT: store i8* null, i8** [[TMP87]], align 8
6776 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 1
6777 // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
6778 // CHECK13-NEXT: store i64 [[TMP82]], i64* [[TMP89]], align 8
6779 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 1
6780 // CHECK13-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i64*
6781 // CHECK13-NEXT: store i64 [[TMP82]], i64* [[TMP91]], align 8
6782 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 1
6783 // CHECK13-NEXT: store i8* null, i8** [[TMP92]], align 8
6784 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
6785 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
6786 // CHECK13-NEXT: [[KERNEL_ARGS29:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6787 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 0
6788 // CHECK13-NEXT: store i32 1, i32* [[TMP95]], align 4
6789 // CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 1
6790 // CHECK13-NEXT: store i32 2, i32* [[TMP96]], align 4
6791 // CHECK13-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 2
6792 // CHECK13-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 8
6793 // CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 3
6794 // CHECK13-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 8
6795 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 4
6796 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 8
6797 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 5
6798 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 8
6799 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 6
6800 // CHECK13-NEXT: store i8** null, i8*** [[TMP101]], align 8
6801 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 7
6802 // CHECK13-NEXT: store i8** null, i8*** [[TMP102]], align 8
6803 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 8
6804 // CHECK13-NEXT: store i64 10, i64* [[TMP103]], align 8
6805 // CHECK13-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]])
6806 // CHECK13-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
6807 // CHECK13-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
6808 // CHECK13: omp_offload.failed30:
6809 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP82]]) #[[ATTR3]]
6810 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT31]]
6811 // CHECK13: omp_offload.cont31:
6812 // CHECK13-NEXT: ret i32 0
6813 //
6814 //
6815 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
6816 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6817 // CHECK13-NEXT: entry:
6818 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6819 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6820 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6821 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
6822 // CHECK13-NEXT: ret void
6823 //
6824 //
6825 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18
6826 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6827 // CHECK13-NEXT: entry:
6828 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6829 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6830 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6831 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6832 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6833 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6834 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6835 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6836 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6837 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6838 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6839 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6840 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6841 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6842 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6843 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6844 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6845 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6846 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6847 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6848 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6849 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6850 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6851 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6852 // CHECK13: cond.true:
6853 // CHECK13-NEXT: br label [[COND_END:%.*]]
6854 // CHECK13: cond.false:
6855 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6856 // CHECK13-NEXT: br label [[COND_END]]
6857 // CHECK13: cond.end:
6858 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6859 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6860 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6861 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6862 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6863 // CHECK13: omp.inner.for.cond:
6864 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
6865 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
6866 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6867 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6868 // CHECK13: omp.inner.for.body:
6869 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
6870 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6871 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
6872 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6873 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46
6874 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6875 // CHECK13: omp.inner.for.inc:
6876 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
6877 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
6878 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6879 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
6880 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
6881 // CHECK13: omp.inner.for.end:
6882 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6883 // CHECK13: omp.loop.exit:
6884 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6885 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6886 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6887 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6888 // CHECK13: .omp.final.then:
6889 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
6890 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
6891 // CHECK13: .omp.final.done:
6892 // CHECK13-NEXT: ret void
6893 //
6894 //
6895 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..19
6896 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6897 // CHECK13-NEXT: entry:
6898 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6899 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6900 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6901 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6902 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6903 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6904 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6905 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6906 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6907 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6908 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6909 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6910 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6911 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6912 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6913 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6914 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6915 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6916 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6917 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6918 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6919 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6920 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6921 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6922 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6923 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6924 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6925 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6926 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6927 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6928 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6929 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6930 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6931 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6932 // CHECK13: cond.true:
6933 // CHECK13-NEXT: br label [[COND_END:%.*]]
6934 // CHECK13: cond.false:
6935 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6936 // CHECK13-NEXT: br label [[COND_END]]
6937 // CHECK13: cond.end:
6938 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6939 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6940 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6941 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6942 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6943 // CHECK13: omp.inner.for.cond:
6944 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6945 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
6946 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6947 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6948 // CHECK13: omp.inner.for.body:
6949 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6950 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6951 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6952 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
6953 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49
6954 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6955 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6956 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49
6957 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6958 // CHECK13: omp.body.continue:
6959 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6960 // CHECK13: omp.inner.for.inc:
6961 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6962 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6963 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
6964 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
6965 // CHECK13: omp.inner.for.end:
6966 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6967 // CHECK13: omp.loop.exit:
6968 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6969 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6970 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6971 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6972 // CHECK13: .omp.final.then:
6973 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
6974 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
6975 // CHECK13: .omp.final.done:
6976 // CHECK13-NEXT: ret void
6977 //
6978 //
6979 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
6980 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6981 // CHECK13-NEXT: entry:
6982 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6983 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6984 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6985 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
6986 // CHECK13-NEXT: ret void
6987 //
6988 //
6989 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22
6990 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6991 // CHECK13-NEXT: entry:
6992 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6993 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6994 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6995 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6996 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6997 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6998 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6999 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7000 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7001 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7002 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7003 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7004 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7005 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7006 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7007 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
7008 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7009 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7010 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7011 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7012 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7013 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7014 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7015 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7016 // CHECK13: cond.true:
7017 // CHECK13-NEXT: br label [[COND_END:%.*]]
7018 // CHECK13: cond.false:
7019 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7020 // CHECK13-NEXT: br label [[COND_END]]
7021 // CHECK13: cond.end:
7022 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7023 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7024 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7025 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7026 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7027 // CHECK13: omp.inner.for.cond:
7028 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
7029 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
7030 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7031 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7032 // CHECK13: omp.inner.for.body:
7033 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
7034 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7035 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
7036 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7037 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52
7038 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7039 // CHECK13: omp.inner.for.inc:
7040 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
7041 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
7042 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7043 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
7044 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
7045 // CHECK13: omp.inner.for.end:
7046 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7047 // CHECK13: omp.loop.exit:
7048 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7049 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7050 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7051 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7052 // CHECK13: .omp.final.then:
7053 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7054 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7055 // CHECK13: .omp.final.done:
7056 // CHECK13-NEXT: ret void
7057 //
7058 //
7059 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..23
7060 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7061 // CHECK13-NEXT: entry:
7062 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7063 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7064 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7065 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7066 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7067 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7068 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7069 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7070 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7071 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7072 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7073 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7074 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7075 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7076 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7077 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7078 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7079 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7080 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7081 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7082 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7083 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
7084 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7085 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
7086 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7087 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7088 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7089 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7090 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7091 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7092 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7093 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7094 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
7095 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7096 // CHECK13: cond.true:
7097 // CHECK13-NEXT: br label [[COND_END:%.*]]
7098 // CHECK13: cond.false:
7099 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7100 // CHECK13-NEXT: br label [[COND_END]]
7101 // CHECK13: cond.end:
7102 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
7103 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7104 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7105 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
7106 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7107 // CHECK13: omp.inner.for.cond:
7108 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
7109 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
7110 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
7111 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7112 // CHECK13: omp.inner.for.body:
7113 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
7114 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
7115 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7116 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
7117 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55
7118 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
7119 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
7120 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55
7121 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7122 // CHECK13: omp.body.continue:
7123 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7124 // CHECK13: omp.inner.for.inc:
7125 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
7126 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
7127 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
7128 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
7129 // CHECK13: omp.inner.for.end:
7130 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7131 // CHECK13: omp.loop.exit:
7132 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7133 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7134 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7135 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7136 // CHECK13: .omp.final.then:
7137 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7138 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7139 // CHECK13: .omp.final.done:
7140 // CHECK13-NEXT: ret void
7141 //
7142 //
7143 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
7144 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7145 // CHECK13-NEXT: entry:
7146 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7147 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7148 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7149 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7150 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7151 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7152 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7153 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
7154 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
7155 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
7156 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7157 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
7158 // CHECK13-NEXT: ret void
7159 //
7160 //
7161 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26
7162 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7163 // CHECK13-NEXT: entry:
7164 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7165 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7166 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7167 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7168 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7169 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7170 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7171 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7172 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7173 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7174 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7175 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7176 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7177 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7178 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7179 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7180 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7181 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7182 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7183 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
7184 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7185 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7186 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7187 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7188 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7189 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7190 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7191 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7192 // CHECK13: cond.true:
7193 // CHECK13-NEXT: br label [[COND_END:%.*]]
7194 // CHECK13: cond.false:
7195 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7196 // CHECK13-NEXT: br label [[COND_END]]
7197 // CHECK13: cond.end:
7198 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7199 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7200 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7201 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7202 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7203 // CHECK13: omp.inner.for.cond:
7204 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
7205 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
7206 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7207 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7208 // CHECK13: omp.inner.for.body:
7209 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
7210 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7211 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
7212 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7213 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !58
7214 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
7215 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58
7216 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58
7217 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58
7218 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7219 // CHECK13: omp.inner.for.inc:
7220 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
7221 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
7222 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
7223 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
7224 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
7225 // CHECK13: omp.inner.for.end:
7226 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7227 // CHECK13: omp.loop.exit:
7228 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7229 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7230 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7231 // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7232 // CHECK13: .omp.final.then:
7233 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7234 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7235 // CHECK13: .omp.final.done:
7236 // CHECK13-NEXT: ret void
7237 //
7238 //
7239 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..27
7240 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7241 // CHECK13-NEXT: entry:
7242 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7243 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7244 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7245 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7246 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7247 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7248 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7249 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7250 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7251 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7252 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7253 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7254 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7255 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7256 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7257 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7258 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7259 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7260 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7261 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7262 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7263 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7264 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7265 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7266 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7267 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7268 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
7269 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
7270 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
7271 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7272 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7273 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
7274 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7275 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
7276 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
7277 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7278 // CHECK13: omp.dispatch.cond:
7279 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7280 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7281 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
7282 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
7283 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7284 // CHECK13: cond.true:
7285 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7286 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
7287 // CHECK13-NEXT: br label [[COND_END:%.*]]
7288 // CHECK13: cond.false:
7289 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7290 // CHECK13-NEXT: br label [[COND_END]]
7291 // CHECK13: cond.end:
7292 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
7293 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7294 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7295 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
7296 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7297 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7298 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
7299 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7300 // CHECK13: omp.dispatch.body:
7301 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7302 // CHECK13: omp.inner.for.cond:
7303 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
7304 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
7305 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7306 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7307 // CHECK13: omp.inner.for.body:
7308 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
7309 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
7310 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7311 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
7312 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61
7313 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
7314 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
7315 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61
7316 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7317 // CHECK13: omp.body.continue:
7318 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7319 // CHECK13: omp.inner.for.inc:
7320 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
7321 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
7322 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
7323 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
7324 // CHECK13: omp.inner.for.end:
7325 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7326 // CHECK13: omp.dispatch.inc:
7327 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7328 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7329 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
7330 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
7331 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7332 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7333 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
7334 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
7335 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
7336 // CHECK13: omp.dispatch.end:
7337 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
7338 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7339 // CHECK13-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
7340 // CHECK13-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7341 // CHECK13: .omp.final.then:
7342 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7343 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7344 // CHECK13: .omp.final.done:
7345 // CHECK13-NEXT: ret void
7346 //
7347 //
7348 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
7349 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7350 // CHECK13-NEXT: entry:
7351 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7352 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7353 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7354 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
7355 // CHECK13-NEXT: ret void
7356 //
7357 //
7358 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30
7359 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7360 // CHECK13-NEXT: entry:
7361 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7362 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7363 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7364 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7365 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7366 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7367 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7368 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7369 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7370 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7371 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7372 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7373 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7374 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7375 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7376 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
7377 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7378 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7379 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7380 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7381 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7382 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7383 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7384 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7385 // CHECK13: cond.true:
7386 // CHECK13-NEXT: br label [[COND_END:%.*]]
7387 // CHECK13: cond.false:
7388 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7389 // CHECK13-NEXT: br label [[COND_END]]
7390 // CHECK13: cond.end:
7391 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7392 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7393 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7394 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7395 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7396 // CHECK13: omp.inner.for.cond:
7397 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
7398 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
7399 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7400 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7401 // CHECK13: omp.inner.for.body:
7402 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64
7403 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7404 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
7405 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7406 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64
7407 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7408 // CHECK13: omp.inner.for.inc:
7409 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
7410 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64
7411 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7412 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
7413 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]]
7414 // CHECK13: omp.inner.for.end:
7415 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7416 // CHECK13: omp.loop.exit:
7417 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7418 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7419 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7420 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7421 // CHECK13: .omp.final.then:
7422 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7423 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7424 // CHECK13: .omp.final.done:
7425 // CHECK13-NEXT: ret void
7426 //
7427 //
7428 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..31
7429 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
7430 // CHECK13-NEXT: entry:
7431 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7432 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7433 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7434 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7435 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7436 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7437 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7438 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7439 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7440 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7441 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7442 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7443 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7444 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7445 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7446 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7447 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7448 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7449 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7450 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7451 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7452 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
7453 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7454 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
7455 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7456 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7457 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7458 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7459 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7460 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7461 // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7462 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7463 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
7464 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7465 // CHECK13: omp.dispatch.cond:
7466 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7467 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7468 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7469 // CHECK13: omp.dispatch.body:
7470 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7471 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7472 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7473 // CHECK13: omp.inner.for.cond:
7474 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
7475 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67
7476 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7477 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7478 // CHECK13: omp.inner.for.body:
7479 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
7480 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7481 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7482 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67
7483 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67
7484 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
7485 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
7486 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67
7487 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7488 // CHECK13: omp.body.continue:
7489 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7490 // CHECK13: omp.inner.for.inc:
7491 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
7492 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
7493 // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
7494 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]]
7495 // CHECK13: omp.inner.for.end:
7496 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7497 // CHECK13: omp.dispatch.inc:
7498 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
7499 // CHECK13: omp.dispatch.end:
7500 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7501 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7502 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7503 // CHECK13: .omp.final.then:
7504 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7505 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7506 // CHECK13: .omp.final.done:
7507 // CHECK13-NEXT: ret void
7508 //
7509 //
7510 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
7511 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7512 // CHECK13-NEXT: entry:
7513 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7514 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7515 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7516 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7517 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7518 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7519 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7520 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
7521 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
7522 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
7523 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7524 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
7525 // CHECK13-NEXT: ret void
7526 //
7527 //
7528 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..34
7529 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7530 // CHECK13-NEXT: entry:
7531 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7532 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7533 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7534 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7535 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7536 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7537 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7538 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7539 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7540 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7541 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7542 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7543 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7544 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7545 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7546 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7547 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7548 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7549 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7550 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
7551 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7552 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7553 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7554 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7555 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7556 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7557 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
7558 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7559 // CHECK13: cond.true:
7560 // CHECK13-NEXT: br label [[COND_END:%.*]]
7561 // CHECK13: cond.false:
7562 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7563 // CHECK13-NEXT: br label [[COND_END]]
7564 // CHECK13: cond.end:
7565 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7566 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7567 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7568 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7569 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7570 // CHECK13: omp.inner.for.cond:
7571 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
7572 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
7573 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7574 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7575 // CHECK13: omp.inner.for.body:
7576 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70
7577 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7578 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
7579 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7580 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !70
7581 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
7582 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70
7583 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70
7584 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70
7585 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7586 // CHECK13: omp.inner.for.inc:
7587 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
7588 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70
7589 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
7590 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
7591 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]]
7592 // CHECK13: omp.inner.for.end:
7593 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7594 // CHECK13: omp.loop.exit:
7595 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7596 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7597 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7598 // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7599 // CHECK13: .omp.final.then:
7600 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7601 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7602 // CHECK13: .omp.final.done:
7603 // CHECK13-NEXT: ret void
7604 //
7605 //
7606 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..35
7607 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7608 // CHECK13-NEXT: entry:
7609 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7610 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7611 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7612 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7613 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
7614 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7615 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7616 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7617 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7618 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7619 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7620 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7621 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7622 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7623 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7624 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7625 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7626 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
7627 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7628 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
7629 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
7630 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7631 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
7632 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7633 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7634 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7635 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
7636 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
7637 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
7638 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7639 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7640 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
7641 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7642 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7643 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7644 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
7645 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
7646 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
7647 // CHECK13: omp.dispatch.cond:
7648 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7649 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
7650 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7651 // CHECK13: omp.dispatch.body:
7652 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7653 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
7654 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7655 // CHECK13: omp.inner.for.cond:
7656 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
7657 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73
7658 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
7659 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7660 // CHECK13: omp.inner.for.body:
7661 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
7662 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
7663 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7664 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73
7665 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73
7666 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
7667 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
7668 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73
7669 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7670 // CHECK13: omp.body.continue:
7671 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7672 // CHECK13: omp.inner.for.inc:
7673 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
7674 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
7675 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
7676 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]]
7677 // CHECK13: omp.inner.for.end:
7678 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
7679 // CHECK13: omp.dispatch.inc:
7680 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
7681 // CHECK13: omp.dispatch.end:
7682 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7683 // CHECK13-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
7684 // CHECK13-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7685 // CHECK13: .omp.final.then:
7686 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
7687 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
7688 // CHECK13: .omp.final.done:
7689 // CHECK13-NEXT: ret void
7690 //
7691 //
7692 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7693 // CHECK13-SAME: () #[[ATTR6:[0-9]+]] {
7694 // CHECK13-NEXT: entry:
7695 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1)
7696 // CHECK13-NEXT: ret void
7697 //
7698 //
7699 // CHECK15-LABEL: define {{[^@]+}}@main
7700 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
7701 // CHECK15-NEXT: entry:
7702 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7703 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
7704 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
7705 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
7706 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
7707 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
7708 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
7709 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7710 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
7711 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
7712 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
7713 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
7714 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7715 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7716 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7717 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
7718 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
7719 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
7720 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
7721 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
7722 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
7723 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
7724 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
7725 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
7726 // CHECK15-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4
7727 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7728 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x i8*], align 4
7729 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x i8*], align 4
7730 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x i8*], align 4
7731 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
7732 // CHECK15-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
7733 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
7734 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
7735 // CHECK15-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4
7736 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x i8*], align 4
7737 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x i8*], align 4
7738 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x i8*], align 4
7739 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4
7740 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
7741 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
7742 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
7743 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
7744 // CHECK15-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4
7745 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4
7746 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x i8*], align 4
7747 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x i8*], align 4
7748 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x i8*], align 4
7749 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4
7750 // CHECK15-NEXT: [[_TMP56:%.*]] = alloca i32, align 4
7751 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
7752 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
7753 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
7754 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7755 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
7756 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
7757 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7758 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
7759 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
7760 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
7761 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
7762 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
7763 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
7764 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
7765 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
7766 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
7767 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
7768 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
7769 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
7770 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7771 // CHECK15-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
7772 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
7773 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7774 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
7775 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
7776 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
7777 // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 4
7778 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7779 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
7780 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
7781 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7782 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
7783 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
7784 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
7785 // CHECK15-NEXT: store i8* null, i8** [[TMP16]], align 4
7786 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7787 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
7788 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
7789 // CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7790 // CHECK15-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
7791 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
7792 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7793 // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
7794 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
7795 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4
7796 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7797 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7798 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7799 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
7800 // CHECK15-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
7801 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7802 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
7803 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7804 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7805 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7806 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7807 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
7808 // CHECK15-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
7809 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
7810 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
7811 // CHECK15-NEXT: store i32 1, i32* [[TMP30]], align 4
7812 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
7813 // CHECK15-NEXT: store i32 3, i32* [[TMP31]], align 4
7814 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
7815 // CHECK15-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
7816 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
7817 // CHECK15-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
7818 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
7819 // CHECK15-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
7820 // CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
7821 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
7822 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
7823 // CHECK15-NEXT: store i8** null, i8*** [[TMP36]], align 4
7824 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
7825 // CHECK15-NEXT: store i8** null, i8*** [[TMP37]], align 4
7826 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
7827 // CHECK15-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
7828 // CHECK15-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
7829 // CHECK15-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
7830 // CHECK15-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7831 // CHECK15: omp_offload.failed:
7832 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
7833 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
7834 // CHECK15: omp_offload.cont:
7835 // CHECK15-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
7836 // CHECK15-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
7837 // CHECK15-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
7838 // CHECK15-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
7839 // CHECK15-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
7840 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
7841 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false)
7842 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
7843 // CHECK15-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
7844 // CHECK15-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
7845 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
7846 // CHECK15-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
7847 // CHECK15-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
7848 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
7849 // CHECK15-NEXT: store i8* null, i8** [[TMP50]], align 4
7850 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
7851 // CHECK15-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
7852 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
7853 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
7854 // CHECK15-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
7855 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
7856 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
7857 // CHECK15-NEXT: store i8* null, i8** [[TMP55]], align 4
7858 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
7859 // CHECK15-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
7860 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
7861 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
7862 // CHECK15-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
7863 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
7864 // CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
7865 // CHECK15-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
7866 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
7867 // CHECK15-NEXT: store i8* null, i8** [[TMP61]], align 4
7868 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
7869 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
7870 // CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
7871 // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
7872 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
7873 // CHECK15-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
7874 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
7875 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
7876 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
7877 // CHECK15-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
7878 // CHECK15-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
7879 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
7880 // CHECK15-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
7881 // CHECK15-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7882 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
7883 // CHECK15-NEXT: store i32 1, i32* [[TMP69]], align 4
7884 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
7885 // CHECK15-NEXT: store i32 3, i32* [[TMP70]], align 4
7886 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
7887 // CHECK15-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
7888 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
7889 // CHECK15-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
7890 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
7891 // CHECK15-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
7892 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
7893 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP74]], align 4
7894 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
7895 // CHECK15-NEXT: store i8** null, i8*** [[TMP75]], align 4
7896 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
7897 // CHECK15-NEXT: store i8** null, i8*** [[TMP76]], align 4
7898 // CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
7899 // CHECK15-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
7900 // CHECK15-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
7901 // CHECK15-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
7902 // CHECK15-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
7903 // CHECK15: omp_offload.failed16:
7904 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
7905 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]]
7906 // CHECK15: omp_offload.cont17:
7907 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
7908 // CHECK15-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_18]], align 4
7909 // CHECK15-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
7910 // CHECK15-NEXT: store i32 [[TMP81]], i32* [[N_CASTED19]], align 4
7911 // CHECK15-NEXT: [[TMP82:%.*]] = load i32, i32* [[N_CASTED19]], align 4
7912 // CHECK15-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
7913 // CHECK15-NEXT: store i32 [[TMP83]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7914 // CHECK15-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7915 // CHECK15-NEXT: [[TMP85:%.*]] = mul nuw i32 [[TMP0]], 4
7916 // CHECK15-NEXT: [[TMP86:%.*]] = sext i32 [[TMP85]] to i64
7917 // CHECK15-NEXT: [[TMP87:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES23]] to i8*
7918 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP87]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false)
7919 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
7920 // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
7921 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
7922 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
7923 // CHECK15-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
7924 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
7925 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
7926 // CHECK15-NEXT: store i8* null, i8** [[TMP92]], align 4
7927 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
7928 // CHECK15-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32*
7929 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP94]], align 4
7930 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
7931 // CHECK15-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32*
7932 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP96]], align 4
7933 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
7934 // CHECK15-NEXT: store i8* null, i8** [[TMP97]], align 4
7935 // CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
7936 // CHECK15-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
7937 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 4
7938 // CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
7939 // CHECK15-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
7940 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 4
7941 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
7942 // CHECK15-NEXT: store i64 [[TMP86]], i64* [[TMP102]], align 4
7943 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
7944 // CHECK15-NEXT: store i8* null, i8** [[TMP103]], align 4
7945 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
7946 // CHECK15-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32*
7947 // CHECK15-NEXT: store i32 [[TMP84]], i32* [[TMP105]], align 4
7948 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
7949 // CHECK15-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32*
7950 // CHECK15-NEXT: store i32 [[TMP84]], i32* [[TMP107]], align 4
7951 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
7952 // CHECK15-NEXT: store i8* null, i8** [[TMP108]], align 4
7953 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
7954 // CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
7955 // CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
7956 // CHECK15-NEXT: [[TMP112:%.*]] = load i32, i32* [[N]], align 4
7957 // CHECK15-NEXT: store i32 [[TMP112]], i32* [[DOTCAPTURE_EXPR_25]], align 4
7958 // CHECK15-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
7959 // CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP113]], 0
7960 // CHECK15-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
7961 // CHECK15-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
7962 // CHECK15-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
7963 // CHECK15-NEXT: [[TMP114:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
7964 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP114]], 1
7965 // CHECK15-NEXT: [[TMP115:%.*]] = zext i32 [[ADD30]] to i64
7966 // CHECK15-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7967 // CHECK15-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
7968 // CHECK15-NEXT: store i32 1, i32* [[TMP116]], align 4
7969 // CHECK15-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
7970 // CHECK15-NEXT: store i32 4, i32* [[TMP117]], align 4
7971 // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
7972 // CHECK15-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
7973 // CHECK15-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
7974 // CHECK15-NEXT: store i8** [[TMP110]], i8*** [[TMP119]], align 4
7975 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
7976 // CHECK15-NEXT: store i64* [[TMP111]], i64** [[TMP120]], align 4
7977 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
7978 // CHECK15-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP121]], align 4
7979 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
7980 // CHECK15-NEXT: store i8** null, i8*** [[TMP122]], align 4
7981 // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
7982 // CHECK15-NEXT: store i8** null, i8*** [[TMP123]], align 4
7983 // CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
7984 // CHECK15-NEXT: store i64 [[TMP115]], i64* [[TMP124]], align 8
7985 // CHECK15-NEXT: [[TMP125:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
7986 // CHECK15-NEXT: [[TMP126:%.*]] = icmp ne i32 [[TMP125]], 0
7987 // CHECK15-NEXT: br i1 [[TMP126]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
7988 // CHECK15: omp_offload.failed32:
7989 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP82]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP84]]) #[[ATTR3]]
7990 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT33]]
7991 // CHECK15: omp_offload.cont33:
7992 // CHECK15-NEXT: [[TMP127:%.*]] = load i32, i32* [[N]], align 4
7993 // CHECK15-NEXT: store i32 [[TMP127]], i32* [[N_CASTED34]], align 4
7994 // CHECK15-NEXT: [[TMP128:%.*]] = load i32, i32* [[N_CASTED34]], align 4
7995 // CHECK15-NEXT: [[TMP129:%.*]] = mul nuw i32 [[TMP0]], 4
7996 // CHECK15-NEXT: [[TMP130:%.*]] = sext i32 [[TMP129]] to i64
7997 // CHECK15-NEXT: [[TMP131:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES38]] to i8*
7998 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP131]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false)
7999 // CHECK15-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
8000 // CHECK15-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32*
8001 // CHECK15-NEXT: store i32 [[TMP128]], i32* [[TMP133]], align 4
8002 // CHECK15-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
8003 // CHECK15-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
8004 // CHECK15-NEXT: store i32 [[TMP128]], i32* [[TMP135]], align 4
8005 // CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0
8006 // CHECK15-NEXT: store i8* null, i8** [[TMP136]], align 4
8007 // CHECK15-NEXT: [[TMP137:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
8008 // CHECK15-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i32*
8009 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP138]], align 4
8010 // CHECK15-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
8011 // CHECK15-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32*
8012 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP140]], align 4
8013 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1
8014 // CHECK15-NEXT: store i8* null, i8** [[TMP141]], align 4
8015 // CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
8016 // CHECK15-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32**
8017 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP143]], align 4
8018 // CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
8019 // CHECK15-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32**
8020 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP145]], align 4
8021 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
8022 // CHECK15-NEXT: store i64 [[TMP130]], i64* [[TMP146]], align 4
8023 // CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2
8024 // CHECK15-NEXT: store i8* null, i8** [[TMP147]], align 4
8025 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
8026 // CHECK15-NEXT: [[TMP149:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
8027 // CHECK15-NEXT: [[TMP150:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
8028 // CHECK15-NEXT: [[TMP151:%.*]] = load i32, i32* [[N]], align 4
8029 // CHECK15-NEXT: store i32 [[TMP151]], i32* [[DOTCAPTURE_EXPR_40]], align 4
8030 // CHECK15-NEXT: [[TMP152:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
8031 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP152]], 0
8032 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
8033 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
8034 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
8035 // CHECK15-NEXT: [[TMP153:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
8036 // CHECK15-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP153]], 1
8037 // CHECK15-NEXT: [[TMP154:%.*]] = zext i32 [[ADD45]] to i64
8038 // CHECK15-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8039 // CHECK15-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 0
8040 // CHECK15-NEXT: store i32 1, i32* [[TMP155]], align 4
8041 // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 1
8042 // CHECK15-NEXT: store i32 3, i32* [[TMP156]], align 4
8043 // CHECK15-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 2
8044 // CHECK15-NEXT: store i8** [[TMP148]], i8*** [[TMP157]], align 4
8045 // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 3
8046 // CHECK15-NEXT: store i8** [[TMP149]], i8*** [[TMP158]], align 4
8047 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 4
8048 // CHECK15-NEXT: store i64* [[TMP150]], i64** [[TMP159]], align 4
8049 // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 5
8050 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP160]], align 4
8051 // CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 6
8052 // CHECK15-NEXT: store i8** null, i8*** [[TMP161]], align 4
8053 // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 7
8054 // CHECK15-NEXT: store i8** null, i8*** [[TMP162]], align 4
8055 // CHECK15-NEXT: [[TMP163:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 8
8056 // CHECK15-NEXT: store i64 [[TMP154]], i64* [[TMP163]], align 8
8057 // CHECK15-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]])
8058 // CHECK15-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0
8059 // CHECK15-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
8060 // CHECK15: omp_offload.failed47:
8061 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP128]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
8062 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT48]]
8063 // CHECK15: omp_offload.cont48:
8064 // CHECK15-NEXT: [[TMP166:%.*]] = load i32, i32* [[M]], align 4
8065 // CHECK15-NEXT: store i32 [[TMP166]], i32* [[DOTCAPTURE_EXPR_49]], align 4
8066 // CHECK15-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
8067 // CHECK15-NEXT: store i32 [[TMP167]], i32* [[N_CASTED50]], align 4
8068 // CHECK15-NEXT: [[TMP168:%.*]] = load i32, i32* [[N_CASTED50]], align 4
8069 // CHECK15-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4
8070 // CHECK15-NEXT: store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
8071 // CHECK15-NEXT: [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
8072 // CHECK15-NEXT: [[TMP171:%.*]] = mul nuw i32 [[TMP0]], 4
8073 // CHECK15-NEXT: [[TMP172:%.*]] = sext i32 [[TMP171]] to i64
8074 // CHECK15-NEXT: [[TMP173:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES55]] to i8*
8075 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP173]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false)
8076 // CHECK15-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
8077 // CHECK15-NEXT: [[TMP175:%.*]] = bitcast i8** [[TMP174]] to i32*
8078 // CHECK15-NEXT: store i32 [[TMP168]], i32* [[TMP175]], align 4
8079 // CHECK15-NEXT: [[TMP176:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
8080 // CHECK15-NEXT: [[TMP177:%.*]] = bitcast i8** [[TMP176]] to i32*
8081 // CHECK15-NEXT: store i32 [[TMP168]], i32* [[TMP177]], align 4
8082 // CHECK15-NEXT: [[TMP178:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0
8083 // CHECK15-NEXT: store i8* null, i8** [[TMP178]], align 4
8084 // CHECK15-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
8085 // CHECK15-NEXT: [[TMP180:%.*]] = bitcast i8** [[TMP179]] to i32*
8086 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP180]], align 4
8087 // CHECK15-NEXT: [[TMP181:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
8088 // CHECK15-NEXT: [[TMP182:%.*]] = bitcast i8** [[TMP181]] to i32*
8089 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP182]], align 4
8090 // CHECK15-NEXT: [[TMP183:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1
8091 // CHECK15-NEXT: store i8* null, i8** [[TMP183]], align 4
8092 // CHECK15-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
8093 // CHECK15-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32**
8094 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP185]], align 4
8095 // CHECK15-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
8096 // CHECK15-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32**
8097 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP187]], align 4
8098 // CHECK15-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
8099 // CHECK15-NEXT: store i64 [[TMP172]], i64* [[TMP188]], align 4
8100 // CHECK15-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2
8101 // CHECK15-NEXT: store i8* null, i8** [[TMP189]], align 4
8102 // CHECK15-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
8103 // CHECK15-NEXT: [[TMP191:%.*]] = bitcast i8** [[TMP190]] to i32*
8104 // CHECK15-NEXT: store i32 [[TMP170]], i32* [[TMP191]], align 4
8105 // CHECK15-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
8106 // CHECK15-NEXT: [[TMP193:%.*]] = bitcast i8** [[TMP192]] to i32*
8107 // CHECK15-NEXT: store i32 [[TMP170]], i32* [[TMP193]], align 4
8108 // CHECK15-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3
8109 // CHECK15-NEXT: store i8* null, i8** [[TMP194]], align 4
8110 // CHECK15-NEXT: [[TMP195:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
8111 // CHECK15-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
8112 // CHECK15-NEXT: [[TMP197:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
8113 // CHECK15-NEXT: [[TMP198:%.*]] = load i32, i32* [[N]], align 4
8114 // CHECK15-NEXT: store i32 [[TMP198]], i32* [[DOTCAPTURE_EXPR_57]], align 4
8115 // CHECK15-NEXT: [[TMP199:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_57]], align 4
8116 // CHECK15-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP199]], 0
8117 // CHECK15-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
8118 // CHECK15-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
8119 // CHECK15-NEXT: store i32 [[SUB61]], i32* [[DOTCAPTURE_EXPR_58]], align 4
8120 // CHECK15-NEXT: [[TMP200:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
8121 // CHECK15-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP200]], 1
8122 // CHECK15-NEXT: [[TMP201:%.*]] = zext i32 [[ADD62]] to i64
8123 // CHECK15-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8124 // CHECK15-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 0
8125 // CHECK15-NEXT: store i32 1, i32* [[TMP202]], align 4
8126 // CHECK15-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 1
8127 // CHECK15-NEXT: store i32 4, i32* [[TMP203]], align 4
8128 // CHECK15-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 2
8129 // CHECK15-NEXT: store i8** [[TMP195]], i8*** [[TMP204]], align 4
8130 // CHECK15-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 3
8131 // CHECK15-NEXT: store i8** [[TMP196]], i8*** [[TMP205]], align 4
8132 // CHECK15-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 4
8133 // CHECK15-NEXT: store i64* [[TMP197]], i64** [[TMP206]], align 4
8134 // CHECK15-NEXT: [[TMP207:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 5
8135 // CHECK15-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP207]], align 4
8136 // CHECK15-NEXT: [[TMP208:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 6
8137 // CHECK15-NEXT: store i8** null, i8*** [[TMP208]], align 4
8138 // CHECK15-NEXT: [[TMP209:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 7
8139 // CHECK15-NEXT: store i8** null, i8*** [[TMP209]], align 4
8140 // CHECK15-NEXT: [[TMP210:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 8
8141 // CHECK15-NEXT: store i64 [[TMP201]], i64* [[TMP210]], align 8
8142 // CHECK15-NEXT: [[TMP211:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]])
8143 // CHECK15-NEXT: [[TMP212:%.*]] = icmp ne i32 [[TMP211]], 0
8144 // CHECK15-NEXT: br i1 [[TMP212]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
8145 // CHECK15: omp_offload.failed64:
8146 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP168]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP170]]) #[[ATTR3]]
8147 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT65]]
8148 // CHECK15: omp_offload.cont65:
8149 // CHECK15-NEXT: [[TMP213:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8150 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP213]])
8151 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
8152 // CHECK15-NEXT: [[TMP214:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
8153 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP214]])
8154 // CHECK15-NEXT: [[TMP215:%.*]] = load i32, i32* [[RETVAL]], align 4
8155 // CHECK15-NEXT: ret i32 [[TMP215]]
8156 //
8157 //
8158 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
8159 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
8160 // CHECK15-NEXT: entry:
8161 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8162 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8163 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8164 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8165 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8166 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8167 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8168 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8169 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8170 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8171 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
8172 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
8173 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
8174 // CHECK15-NEXT: ret void
8175 //
8176 //
8177 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
8178 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8179 // CHECK15-NEXT: entry:
8180 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8181 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8182 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8183 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8184 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8185 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8186 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8187 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8188 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8189 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8190 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8191 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8192 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8193 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8194 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8195 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8196 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8197 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8198 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8199 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8200 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8201 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8202 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8203 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8204 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8205 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8206 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8207 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8208 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8209 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8210 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8211 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8212 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8213 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8214 // CHECK15: omp.precond.then:
8215 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8216 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8217 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8218 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8219 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8220 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8221 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8222 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8223 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8224 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8225 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8226 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8227 // CHECK15: cond.true:
8228 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8229 // CHECK15-NEXT: br label [[COND_END:%.*]]
8230 // CHECK15: cond.false:
8231 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8232 // CHECK15-NEXT: br label [[COND_END]]
8233 // CHECK15: cond.end:
8234 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8235 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8236 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8237 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8238 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8239 // CHECK15: omp.inner.for.cond:
8240 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8241 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
8242 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8243 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8244 // CHECK15: omp.inner.for.body:
8245 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
8246 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
8247 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !14
8248 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !14
8249 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !14
8250 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !14
8251 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8252 // CHECK15: omp.inner.for.inc:
8253 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8254 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
8255 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
8256 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
8257 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
8258 // CHECK15: omp.inner.for.end:
8259 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8260 // CHECK15: omp.loop.exit:
8261 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8262 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8263 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8264 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8265 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
8266 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8267 // CHECK15: .omp.final.then:
8268 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8269 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
8270 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
8271 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
8272 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
8273 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
8274 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
8275 // CHECK15: .omp.final.done:
8276 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8277 // CHECK15: omp.precond.end:
8278 // CHECK15-NEXT: ret void
8279 //
8280 //
8281 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
8282 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8283 // CHECK15-NEXT: entry:
8284 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8285 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8286 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8287 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8288 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8289 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8290 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8291 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8292 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8293 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8294 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8295 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8296 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8297 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8298 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8299 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8300 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8301 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8302 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8303 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8304 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8305 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8306 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8307 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8308 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8309 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8310 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8311 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8312 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8313 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8314 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8315 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8316 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8317 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8318 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8319 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8320 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8321 // CHECK15: omp.precond.then:
8322 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8323 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8324 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8325 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8326 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8327 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
8328 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
8329 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8330 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8331 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8332 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8333 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8334 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8335 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8336 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8337 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8338 // CHECK15: cond.true:
8339 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8340 // CHECK15-NEXT: br label [[COND_END:%.*]]
8341 // CHECK15: cond.false:
8342 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8343 // CHECK15-NEXT: br label [[COND_END]]
8344 // CHECK15: cond.end:
8345 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8346 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8347 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8348 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8349 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8350 // CHECK15: omp.inner.for.cond:
8351 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8352 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
8353 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8354 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8355 // CHECK15: omp.inner.for.body:
8356 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8357 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8358 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8359 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !18
8360 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !18
8361 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
8362 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
8363 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8364 // CHECK15: omp.body.continue:
8365 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8366 // CHECK15: omp.inner.for.inc:
8367 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8368 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
8369 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8370 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
8371 // CHECK15: omp.inner.for.end:
8372 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8373 // CHECK15: omp.loop.exit:
8374 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8375 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
8376 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
8377 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8378 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
8379 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8380 // CHECK15: .omp.final.then:
8381 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8382 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
8383 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
8384 // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
8385 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
8386 // CHECK15-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
8387 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
8388 // CHECK15: .omp.final.done:
8389 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8390 // CHECK15: omp.precond.end:
8391 // CHECK15-NEXT: ret void
8392 //
8393 //
8394 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
8395 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8396 // CHECK15-NEXT: entry:
8397 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8398 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8399 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8400 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8401 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8402 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8403 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8404 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8405 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8406 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8407 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
8408 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
8409 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
8410 // CHECK15-NEXT: ret void
8411 //
8412 //
8413 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
8414 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8415 // CHECK15-NEXT: entry:
8416 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8417 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8418 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8419 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8420 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8421 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8422 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8423 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8424 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8425 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8426 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8427 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8428 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8429 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8430 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8431 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8432 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8433 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8434 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8435 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8436 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8437 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8438 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8439 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8440 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8441 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8442 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8443 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8444 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8445 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8446 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8447 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8448 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8449 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8450 // CHECK15: omp.precond.then:
8451 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8452 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8453 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8454 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8455 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8456 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8457 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8458 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8459 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8460 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8461 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8462 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8463 // CHECK15: cond.true:
8464 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8465 // CHECK15-NEXT: br label [[COND_END:%.*]]
8466 // CHECK15: cond.false:
8467 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8468 // CHECK15-NEXT: br label [[COND_END]]
8469 // CHECK15: cond.end:
8470 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8471 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8472 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8473 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8474 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8475 // CHECK15: omp.inner.for.cond:
8476 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
8477 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
8478 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8479 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8480 // CHECK15: omp.inner.for.body:
8481 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
8482 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
8483 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !23
8484 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !23
8485 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !23
8486 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !23
8487 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8488 // CHECK15: omp.inner.for.inc:
8489 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
8490 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
8491 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
8492 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
8493 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
8494 // CHECK15: omp.inner.for.end:
8495 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8496 // CHECK15: omp.loop.exit:
8497 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8498 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8499 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8500 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8501 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
8502 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8503 // CHECK15: .omp.final.then:
8504 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8505 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
8506 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
8507 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
8508 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
8509 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
8510 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
8511 // CHECK15: .omp.final.done:
8512 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8513 // CHECK15: omp.precond.end:
8514 // CHECK15-NEXT: ret void
8515 //
8516 //
8517 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
8518 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8519 // CHECK15-NEXT: entry:
8520 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8521 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8522 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8523 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8524 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8525 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8526 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8527 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8528 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8529 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8530 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8531 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8532 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8533 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8534 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8535 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8536 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8537 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8538 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8539 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8540 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8541 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8542 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8543 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8544 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8545 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8546 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8547 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8548 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8549 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8550 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8551 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8552 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8553 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8554 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8555 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8556 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8557 // CHECK15: omp.precond.then:
8558 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8559 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8560 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8561 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8562 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8563 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
8564 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
8565 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8566 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8567 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8568 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8569 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8570 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8571 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8572 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8573 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8574 // CHECK15: cond.true:
8575 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8576 // CHECK15-NEXT: br label [[COND_END:%.*]]
8577 // CHECK15: cond.false:
8578 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8579 // CHECK15-NEXT: br label [[COND_END]]
8580 // CHECK15: cond.end:
8581 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8582 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8583 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8584 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8585 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8586 // CHECK15: omp.inner.for.cond:
8587 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
8588 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
8589 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8590 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8591 // CHECK15: omp.inner.for.body:
8592 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
8593 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8594 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8595 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26
8596 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26
8597 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
8598 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
8599 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8600 // CHECK15: omp.body.continue:
8601 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8602 // CHECK15: omp.inner.for.inc:
8603 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
8604 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
8605 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
8606 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
8607 // CHECK15: omp.inner.for.end:
8608 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8609 // CHECK15: omp.loop.exit:
8610 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8611 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
8612 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
8613 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8614 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
8615 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8616 // CHECK15: .omp.final.then:
8617 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8618 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
8619 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
8620 // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
8621 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
8622 // CHECK15-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
8623 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
8624 // CHECK15: .omp.final.done:
8625 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8626 // CHECK15: omp.precond.end:
8627 // CHECK15-NEXT: ret void
8628 //
8629 //
8630 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
8631 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8632 // CHECK15-NEXT: entry:
8633 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8634 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8635 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8636 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8637 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8638 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8639 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8640 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8641 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8642 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8643 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8644 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8645 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8646 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
8647 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
8648 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8649 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8650 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8651 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
8652 // CHECK15-NEXT: ret void
8653 //
8654 //
8655 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6
8656 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8657 // CHECK15-NEXT: entry:
8658 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8659 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8660 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8661 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8662 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8663 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8664 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8665 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8666 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8667 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8668 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8669 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8670 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8671 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8672 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8673 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
8674 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8675 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8676 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8677 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8678 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8679 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8680 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8681 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8682 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8683 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8684 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8685 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8686 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8687 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8688 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8689 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8690 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8691 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8692 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8693 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8694 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8695 // CHECK15: omp.precond.then:
8696 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8697 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8698 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8699 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8700 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8701 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8702 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8703 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8704 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
8705 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8706 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8707 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8708 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8709 // CHECK15: cond.true:
8710 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8711 // CHECK15-NEXT: br label [[COND_END:%.*]]
8712 // CHECK15: cond.false:
8713 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8714 // CHECK15-NEXT: br label [[COND_END]]
8715 // CHECK15: cond.end:
8716 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8717 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8718 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8719 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8720 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8721 // CHECK15: omp.inner.for.cond:
8722 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
8723 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
8724 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
8725 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
8726 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8727 // CHECK15: omp.inner.for.body:
8728 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
8729 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
8730 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !29
8731 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4, !llvm.access.group !29
8732 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !29
8733 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !29
8734 // CHECK15-NEXT: store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
8735 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
8736 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]]), !llvm.access.group !29
8737 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8738 // CHECK15: omp.inner.for.inc:
8739 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
8740 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
8741 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
8742 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
8743 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
8744 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
8745 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
8746 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
8747 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
8748 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
8749 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
8750 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
8751 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
8752 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
8753 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
8754 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
8755 // CHECK15: cond.true11:
8756 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
8757 // CHECK15-NEXT: br label [[COND_END13:%.*]]
8758 // CHECK15: cond.false12:
8759 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
8760 // CHECK15-NEXT: br label [[COND_END13]]
8761 // CHECK15: cond.end13:
8762 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
8763 // CHECK15-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
8764 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
8765 // CHECK15-NEXT: store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
8766 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
8767 // CHECK15: omp.inner.for.end:
8768 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8769 // CHECK15: omp.loop.exit:
8770 // CHECK15-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8771 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
8772 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
8773 // CHECK15-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8774 // CHECK15-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
8775 // CHECK15-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8776 // CHECK15: .omp.final.then:
8777 // CHECK15-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8778 // CHECK15-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP37]], 0
8779 // CHECK15-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
8780 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
8781 // CHECK15-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
8782 // CHECK15-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
8783 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
8784 // CHECK15: .omp.final.done:
8785 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8786 // CHECK15: omp.precond.end:
8787 // CHECK15-NEXT: ret void
8788 //
8789 //
8790 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..7
8791 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8792 // CHECK15-NEXT: entry:
8793 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8794 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8795 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8796 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8797 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8798 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8799 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8800 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8801 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8802 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8803 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8804 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8805 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8806 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8807 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8808 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8809 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8810 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
8811 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8812 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8813 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8814 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8815 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8816 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8817 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8818 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8819 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8820 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8821 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8822 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8823 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8824 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8825 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8826 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8827 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8828 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8829 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8830 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8831 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8832 // CHECK15: omp.precond.then:
8833 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8834 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8835 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8836 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8837 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8838 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
8839 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
8840 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8841 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8842 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8843 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8844 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8845 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8846 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8847 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8848 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8849 // CHECK15: cond.true:
8850 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8851 // CHECK15-NEXT: br label [[COND_END:%.*]]
8852 // CHECK15: cond.false:
8853 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8854 // CHECK15-NEXT: br label [[COND_END]]
8855 // CHECK15: cond.end:
8856 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8857 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8858 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8859 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8860 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8861 // CHECK15: omp.inner.for.cond:
8862 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
8863 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
8864 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8865 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8866 // CHECK15: omp.inner.for.body:
8867 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
8868 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8869 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8870 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !32
8871 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !32
8872 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
8873 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
8874 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8875 // CHECK15: omp.body.continue:
8876 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8877 // CHECK15: omp.inner.for.inc:
8878 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
8879 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
8880 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
8881 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
8882 // CHECK15: omp.inner.for.end:
8883 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8884 // CHECK15: omp.loop.exit:
8885 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8886 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
8887 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
8888 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
8889 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
8890 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
8891 // CHECK15: .omp.final.then:
8892 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8893 // CHECK15-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0
8894 // CHECK15-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
8895 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
8896 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8897 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
8898 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
8899 // CHECK15: .omp.final.done:
8900 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8901 // CHECK15: omp.precond.end:
8902 // CHECK15-NEXT: ret void
8903 //
8904 //
8905 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
8906 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8907 // CHECK15-NEXT: entry:
8908 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8909 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8910 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8911 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8912 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8913 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8914 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8915 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8916 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8917 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8918 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
8919 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
8920 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
8921 // CHECK15-NEXT: ret void
8922 //
8923 //
8924 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..10
8925 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8926 // CHECK15-NEXT: entry:
8927 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8928 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8929 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8930 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8931 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8932 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8933 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8934 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8935 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8936 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8937 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8938 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8939 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8940 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8941 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8942 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8943 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8944 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8945 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8946 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8947 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8948 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8949 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8950 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8951 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8952 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8953 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8954 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8955 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8956 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8957 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8958 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8959 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8960 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8961 // CHECK15: omp.precond.then:
8962 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8963 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8964 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8965 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8966 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8967 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8968 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8969 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8970 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8971 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8972 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8973 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8974 // CHECK15: cond.true:
8975 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8976 // CHECK15-NEXT: br label [[COND_END:%.*]]
8977 // CHECK15: cond.false:
8978 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8979 // CHECK15-NEXT: br label [[COND_END]]
8980 // CHECK15: cond.end:
8981 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8982 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8983 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8984 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8985 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8986 // CHECK15: omp.inner.for.cond:
8987 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
8988 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
8989 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8990 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8991 // CHECK15: omp.inner.for.body:
8992 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
8993 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
8994 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !35
8995 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !35
8996 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !35
8997 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !35
8998 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8999 // CHECK15: omp.inner.for.inc:
9000 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
9001 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
9002 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
9003 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
9004 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
9005 // CHECK15: omp.inner.for.end:
9006 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9007 // CHECK15: omp.loop.exit:
9008 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9009 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
9010 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
9011 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9012 // CHECK15-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
9013 // CHECK15-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9014 // CHECK15: .omp.final.then:
9015 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9016 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
9017 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9018 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
9019 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
9020 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
9021 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9022 // CHECK15: .omp.final.done:
9023 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
9024 // CHECK15: omp.precond.end:
9025 // CHECK15-NEXT: ret void
9026 //
9027 //
9028 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11
9029 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9030 // CHECK15-NEXT: entry:
9031 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9032 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9033 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9034 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9035 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
9036 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9037 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
9038 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9039 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9040 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9041 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9042 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9043 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9044 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9045 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9046 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9047 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
9048 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9049 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9050 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9051 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9052 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
9053 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9054 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
9055 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9056 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
9057 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
9058 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9059 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9060 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9061 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9062 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9063 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9064 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
9065 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9066 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
9067 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9068 // CHECK15: omp.precond.then:
9069 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9070 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9071 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
9072 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9073 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9074 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
9075 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
9076 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9077 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9078 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9079 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9080 // CHECK15-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9081 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
9082 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
9083 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9084 // CHECK15: omp.dispatch.cond:
9085 // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9086 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
9087 // CHECK15-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9088 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
9089 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9090 // CHECK15: omp.dispatch.body:
9091 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9092 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
9093 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9094 // CHECK15: omp.inner.for.cond:
9095 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
9096 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
9097 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
9098 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9099 // CHECK15: omp.inner.for.body:
9100 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
9101 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
9102 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9103 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !38
9104 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !38
9105 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
9106 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
9107 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9108 // CHECK15: omp.body.continue:
9109 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9110 // CHECK15: omp.inner.for.inc:
9111 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
9112 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
9113 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
9114 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
9115 // CHECK15: omp.inner.for.end:
9116 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9117 // CHECK15: omp.dispatch.inc:
9118 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9119 // CHECK15: omp.dispatch.end:
9120 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9121 // CHECK15-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
9122 // CHECK15-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9123 // CHECK15: .omp.final.then:
9124 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9125 // CHECK15-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 0
9126 // CHECK15-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
9127 // CHECK15-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
9128 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
9129 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
9130 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9131 // CHECK15: .omp.final.done:
9132 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
9133 // CHECK15: omp.precond.end:
9134 // CHECK15-NEXT: ret void
9135 //
9136 //
9137 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
9138 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9139 // CHECK15-NEXT: entry:
9140 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
9141 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9142 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
9143 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9144 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
9145 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9146 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
9147 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9148 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
9149 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9150 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9151 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
9152 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
9153 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
9154 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
9155 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9156 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9157 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9158 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
9159 // CHECK15-NEXT: ret void
9160 //
9161 //
9162 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14
9163 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9164 // CHECK15-NEXT: entry:
9165 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9166 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9167 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
9168 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9169 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
9170 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9171 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9172 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9173 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9174 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9175 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9176 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9177 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9178 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9179 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9180 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
9181 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
9182 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9183 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9184 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9185 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
9186 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9187 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
9188 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9189 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9190 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
9191 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
9192 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9193 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9194 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9195 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9196 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9197 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9198 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
9199 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9200 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
9201 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9202 // CHECK15: omp.precond.then:
9203 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9204 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9205 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
9206 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9207 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9208 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9209 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
9210 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9211 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9212 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9213 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
9214 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9215 // CHECK15: cond.true:
9216 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9217 // CHECK15-NEXT: br label [[COND_END:%.*]]
9218 // CHECK15: cond.false:
9219 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9220 // CHECK15-NEXT: br label [[COND_END]]
9221 // CHECK15: cond.end:
9222 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
9223 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9224 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9225 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
9226 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9227 // CHECK15: omp.inner.for.cond:
9228 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
9229 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
9230 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9231 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9232 // CHECK15: omp.inner.for.body:
9233 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !41
9234 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
9235 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !41
9236 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !41
9237 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !41
9238 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !41
9239 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
9240 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
9241 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]]), !llvm.access.group !41
9242 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9243 // CHECK15: omp.inner.for.inc:
9244 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
9245 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !41
9246 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
9247 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
9248 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
9249 // CHECK15: omp.inner.for.end:
9250 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9251 // CHECK15: omp.loop.exit:
9252 // CHECK15-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9253 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
9254 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
9255 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9256 // CHECK15-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
9257 // CHECK15-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9258 // CHECK15: .omp.final.then:
9259 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9260 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
9261 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
9262 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
9263 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
9264 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[I4]], align 4
9265 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9266 // CHECK15: .omp.final.done:
9267 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
9268 // CHECK15: omp.precond.end:
9269 // CHECK15-NEXT: ret void
9270 //
9271 //
9272 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15
9273 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9274 // CHECK15-NEXT: entry:
9275 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9276 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9277 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9278 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9279 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
9280 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
9281 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
9282 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9283 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9284 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9285 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9286 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9287 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9288 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9289 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9290 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9291 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9292 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
9293 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9294 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9295 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9296 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9297 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
9298 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
9299 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
9300 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9301 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
9302 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
9303 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
9304 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9305 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9306 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9307 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9308 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9309 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9310 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
9311 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9312 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
9313 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9314 // CHECK15: omp.precond.then:
9315 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9316 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9317 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
9318 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9319 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9320 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
9321 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
9322 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9323 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9324 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9325 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9326 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9327 // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9328 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
9329 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
9330 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9331 // CHECK15: omp.dispatch.cond:
9332 // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9333 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
9334 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9335 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
9336 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9337 // CHECK15: omp.dispatch.body:
9338 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9339 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
9340 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9341 // CHECK15: omp.inner.for.cond:
9342 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
9343 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !44
9344 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
9345 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9346 // CHECK15: omp.inner.for.body:
9347 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
9348 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
9349 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9350 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !44
9351 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !44
9352 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
9353 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !44
9354 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9355 // CHECK15: omp.body.continue:
9356 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9357 // CHECK15: omp.inner.for.inc:
9358 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
9359 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
9360 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
9361 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
9362 // CHECK15: omp.inner.for.end:
9363 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9364 // CHECK15: omp.dispatch.inc:
9365 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9366 // CHECK15: omp.dispatch.end:
9367 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9368 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
9369 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9370 // CHECK15: .omp.final.then:
9371 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9372 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
9373 // CHECK15-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
9374 // CHECK15-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
9375 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
9376 // CHECK15-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
9377 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9378 // CHECK15: .omp.final.done:
9379 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
9380 // CHECK15: omp.precond.end:
9381 // CHECK15-NEXT: ret void
9382 //
9383 //
9384 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9385 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
9386 // CHECK15-NEXT: entry:
9387 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9388 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
9389 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
9390 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
9391 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
9392 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
9393 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9394 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
9395 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
9396 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
9397 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
9398 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9399 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9400 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 4
9401 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 4
9402 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 4
9403 // CHECK15-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
9404 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 4
9405 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 4
9406 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 4
9407 // CHECK15-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
9408 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
9409 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4
9410 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x i8*], align 4
9411 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x i8*], align 4
9412 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x i8*], align 4
9413 // CHECK15-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
9414 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9415 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
9416 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9417 // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
9418 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
9419 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9420 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
9421 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
9422 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
9423 // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 4
9424 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9425 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9426 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
9427 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
9428 // CHECK15-NEXT: store i32 1, i32* [[TMP7]], align 4
9429 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
9430 // CHECK15-NEXT: store i32 1, i32* [[TMP8]], align 4
9431 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
9432 // CHECK15-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
9433 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
9434 // CHECK15-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
9435 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
9436 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 4
9437 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
9438 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 4
9439 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
9440 // CHECK15-NEXT: store i8** null, i8*** [[TMP13]], align 4
9441 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
9442 // CHECK15-NEXT: store i8** null, i8*** [[TMP14]], align 4
9443 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
9444 // CHECK15-NEXT: store i64 10, i64* [[TMP15]], align 8
9445 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
9446 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9447 // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9448 // CHECK15: omp_offload.failed:
9449 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
9450 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
9451 // CHECK15: omp_offload.cont:
9452 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
9453 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
9454 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
9455 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
9456 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
9457 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
9458 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
9459 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4
9460 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
9461 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
9462 // CHECK15-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9463 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
9464 // CHECK15-NEXT: store i32 1, i32* [[TMP25]], align 4
9465 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
9466 // CHECK15-NEXT: store i32 1, i32* [[TMP26]], align 4
9467 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
9468 // CHECK15-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
9469 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
9470 // CHECK15-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
9471 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
9472 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 4
9473 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
9474 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 4
9475 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
9476 // CHECK15-NEXT: store i8** null, i8*** [[TMP31]], align 4
9477 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
9478 // CHECK15-NEXT: store i8** null, i8*** [[TMP32]], align 4
9479 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
9480 // CHECK15-NEXT: store i64 10, i64* [[TMP33]], align 8
9481 // CHECK15-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
9482 // CHECK15-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
9483 // CHECK15-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
9484 // CHECK15: omp_offload.failed6:
9485 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
9486 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT7]]
9487 // CHECK15: omp_offload.cont7:
9488 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
9489 // CHECK15-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
9490 // CHECK15-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9491 // CHECK15-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9492 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9493 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
9494 // CHECK15-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
9495 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 4
9496 // CHECK15-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
9497 // CHECK15-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
9498 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 4
9499 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
9500 // CHECK15-NEXT: store i8* null, i8** [[TMP43]], align 4
9501 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
9502 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32*
9503 // CHECK15-NEXT: store i32 [[TMP38]], i32* [[TMP45]], align 4
9504 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
9505 // CHECK15-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
9506 // CHECK15-NEXT: store i32 [[TMP38]], i32* [[TMP47]], align 4
9507 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
9508 // CHECK15-NEXT: store i8* null, i8** [[TMP48]], align 4
9509 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
9510 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
9511 // CHECK15-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9512 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
9513 // CHECK15-NEXT: store i32 1, i32* [[TMP51]], align 4
9514 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
9515 // CHECK15-NEXT: store i32 2, i32* [[TMP52]], align 4
9516 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
9517 // CHECK15-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 4
9518 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
9519 // CHECK15-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 4
9520 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
9521 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 4
9522 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
9523 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 4
9524 // CHECK15-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
9525 // CHECK15-NEXT: store i8** null, i8*** [[TMP57]], align 4
9526 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
9527 // CHECK15-NEXT: store i8** null, i8*** [[TMP58]], align 4
9528 // CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
9529 // CHECK15-NEXT: store i64 10, i64* [[TMP59]], align 8
9530 // CHECK15-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
9531 // CHECK15-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
9532 // CHECK15-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
9533 // CHECK15: omp_offload.failed13:
9534 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP38]]) #[[ATTR3]]
9535 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT14]]
9536 // CHECK15: omp_offload.cont14:
9537 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
9538 // CHECK15-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
9539 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 4
9540 // CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
9541 // CHECK15-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
9542 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 4
9543 // CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
9544 // CHECK15-NEXT: store i8* null, i8** [[TMP66]], align 4
9545 // CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
9546 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
9547 // CHECK15-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9548 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
9549 // CHECK15-NEXT: store i32 1, i32* [[TMP69]], align 4
9550 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
9551 // CHECK15-NEXT: store i32 1, i32* [[TMP70]], align 4
9552 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
9553 // CHECK15-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 4
9554 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
9555 // CHECK15-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 4
9556 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
9557 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 4
9558 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
9559 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 4
9560 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
9561 // CHECK15-NEXT: store i8** null, i8*** [[TMP75]], align 4
9562 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
9563 // CHECK15-NEXT: store i8** null, i8*** [[TMP76]], align 4
9564 // CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
9565 // CHECK15-NEXT: store i64 10, i64* [[TMP77]], align 8
9566 // CHECK15-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
9567 // CHECK15-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
9568 // CHECK15-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
9569 // CHECK15: omp_offload.failed20:
9570 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
9571 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT21]]
9572 // CHECK15: omp_offload.cont21:
9573 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
9574 // CHECK15-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
9575 // CHECK15-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
9576 // CHECK15-NEXT: store i32 [[TMP81]], i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
9577 // CHECK15-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
9578 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
9579 // CHECK15-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
9580 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 4
9581 // CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
9582 // CHECK15-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
9583 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 4
9584 // CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
9585 // CHECK15-NEXT: store i8* null, i8** [[TMP87]], align 4
9586 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
9587 // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
9588 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
9589 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
9590 // CHECK15-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
9591 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
9592 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1
9593 // CHECK15-NEXT: store i8* null, i8** [[TMP92]], align 4
9594 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
9595 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
9596 // CHECK15-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9597 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 0
9598 // CHECK15-NEXT: store i32 1, i32* [[TMP95]], align 4
9599 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 1
9600 // CHECK15-NEXT: store i32 2, i32* [[TMP96]], align 4
9601 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 2
9602 // CHECK15-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 4
9603 // CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 3
9604 // CHECK15-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 4
9605 // CHECK15-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 4
9606 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 4
9607 // CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 5
9608 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 4
9609 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 6
9610 // CHECK15-NEXT: store i8** null, i8*** [[TMP101]], align 4
9611 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 7
9612 // CHECK15-NEXT: store i8** null, i8*** [[TMP102]], align 4
9613 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 8
9614 // CHECK15-NEXT: store i64 10, i64* [[TMP103]], align 8
9615 // CHECK15-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]])
9616 // CHECK15-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
9617 // CHECK15-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
9618 // CHECK15: omp_offload.failed29:
9619 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP82]]) #[[ATTR3]]
9620 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT30]]
9621 // CHECK15: omp_offload.cont30:
9622 // CHECK15-NEXT: ret i32 0
9623 //
9624 //
9625 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
9626 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9627 // CHECK15-NEXT: entry:
9628 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9629 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9630 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9631 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9632 // CHECK15-NEXT: ret void
9633 //
9634 //
9635 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18
9636 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9637 // CHECK15-NEXT: entry:
9638 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9639 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9640 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9641 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9642 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9643 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9644 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9645 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9646 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9647 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9648 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9649 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9650 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9651 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9652 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9653 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9654 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9655 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9656 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9657 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9658 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9659 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9660 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9661 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9662 // CHECK15: cond.true:
9663 // CHECK15-NEXT: br label [[COND_END:%.*]]
9664 // CHECK15: cond.false:
9665 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9666 // CHECK15-NEXT: br label [[COND_END]]
9667 // CHECK15: cond.end:
9668 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9669 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9670 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9671 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9672 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9673 // CHECK15: omp.inner.for.cond:
9674 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
9675 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
9676 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9677 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9678 // CHECK15: omp.inner.for.body:
9679 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !47
9680 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
9681 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !47
9682 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9683 // CHECK15: omp.inner.for.inc:
9684 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
9685 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !47
9686 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
9687 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
9688 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
9689 // CHECK15: omp.inner.for.end:
9690 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9691 // CHECK15: omp.loop.exit:
9692 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9693 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9694 // CHECK15-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
9695 // CHECK15-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9696 // CHECK15: .omp.final.then:
9697 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
9698 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9699 // CHECK15: .omp.final.done:
9700 // CHECK15-NEXT: ret void
9701 //
9702 //
9703 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..19
9704 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9705 // CHECK15-NEXT: entry:
9706 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9707 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9708 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9709 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9710 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9711 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9712 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9713 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9714 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9715 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9716 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9717 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9718 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9719 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9720 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9721 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9722 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9723 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9724 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9725 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9726 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9727 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9728 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9729 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9730 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9731 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9732 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9733 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9734 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9735 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9736 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9737 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9738 // CHECK15: cond.true:
9739 // CHECK15-NEXT: br label [[COND_END:%.*]]
9740 // CHECK15: cond.false:
9741 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9742 // CHECK15-NEXT: br label [[COND_END]]
9743 // CHECK15: cond.end:
9744 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9745 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9746 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9747 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9748 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9749 // CHECK15: omp.inner.for.cond:
9750 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
9751 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !50
9752 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9753 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9754 // CHECK15: omp.inner.for.body:
9755 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
9756 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9757 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9758 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !50
9759 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !50
9760 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
9761 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !50
9762 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9763 // CHECK15: omp.body.continue:
9764 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9765 // CHECK15: omp.inner.for.inc:
9766 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
9767 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
9768 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
9769 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
9770 // CHECK15: omp.inner.for.end:
9771 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9772 // CHECK15: omp.loop.exit:
9773 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9774 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9775 // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
9776 // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9777 // CHECK15: .omp.final.then:
9778 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
9779 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9780 // CHECK15: .omp.final.done:
9781 // CHECK15-NEXT: ret void
9782 //
9783 //
9784 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
9785 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9786 // CHECK15-NEXT: entry:
9787 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9788 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9789 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9790 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9791 // CHECK15-NEXT: ret void
9792 //
9793 //
9794 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22
9795 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9796 // CHECK15-NEXT: entry:
9797 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9798 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9799 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9800 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9801 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9802 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9803 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9804 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9805 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9806 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9807 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9808 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9809 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9810 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9811 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9812 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9813 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9814 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9815 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9816 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9817 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9818 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9819 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9820 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9821 // CHECK15: cond.true:
9822 // CHECK15-NEXT: br label [[COND_END:%.*]]
9823 // CHECK15: cond.false:
9824 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9825 // CHECK15-NEXT: br label [[COND_END]]
9826 // CHECK15: cond.end:
9827 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9828 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9829 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9830 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9831 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9832 // CHECK15: omp.inner.for.cond:
9833 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
9834 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
9835 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9836 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9837 // CHECK15: omp.inner.for.body:
9838 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !53
9839 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
9840 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !53
9841 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9842 // CHECK15: omp.inner.for.inc:
9843 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
9844 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !53
9845 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
9846 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
9847 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
9848 // CHECK15: omp.inner.for.end:
9849 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9850 // CHECK15: omp.loop.exit:
9851 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9852 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9853 // CHECK15-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
9854 // CHECK15-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9855 // CHECK15: .omp.final.then:
9856 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
9857 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9858 // CHECK15: .omp.final.done:
9859 // CHECK15-NEXT: ret void
9860 //
9861 //
9862 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..23
9863 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9864 // CHECK15-NEXT: entry:
9865 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9866 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9867 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9868 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9869 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9870 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9871 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9872 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9873 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9874 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9875 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9876 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9877 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9878 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9879 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9880 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9881 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9882 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9883 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9884 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9885 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9886 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9887 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9888 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9889 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9890 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9891 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9892 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9893 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9894 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9895 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9896 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9897 // CHECK15: cond.true:
9898 // CHECK15-NEXT: br label [[COND_END:%.*]]
9899 // CHECK15: cond.false:
9900 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9901 // CHECK15-NEXT: br label [[COND_END]]
9902 // CHECK15: cond.end:
9903 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9904 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9905 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9906 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9907 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9908 // CHECK15: omp.inner.for.cond:
9909 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
9910 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !56
9911 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9912 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9913 // CHECK15: omp.inner.for.body:
9914 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
9915 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9916 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9917 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !56
9918 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !56
9919 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
9920 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !56
9921 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9922 // CHECK15: omp.body.continue:
9923 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9924 // CHECK15: omp.inner.for.inc:
9925 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
9926 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
9927 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
9928 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
9929 // CHECK15: omp.inner.for.end:
9930 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9931 // CHECK15: omp.loop.exit:
9932 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9933 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
9934 // CHECK15-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
9935 // CHECK15-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
9936 // CHECK15: .omp.final.then:
9937 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
9938 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
9939 // CHECK15: .omp.final.done:
9940 // CHECK15-NEXT: ret void
9941 //
9942 //
9943 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
9944 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9945 // CHECK15-NEXT: entry:
9946 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9947 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9948 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9949 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9950 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9951 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9952 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9953 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9954 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9955 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
9956 // CHECK15-NEXT: ret void
9957 //
9958 //
9959 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26
9960 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9961 // CHECK15-NEXT: entry:
9962 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9963 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9964 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9965 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9966 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9967 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9968 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9969 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9970 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9971 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9972 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9973 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9974 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9975 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9976 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9977 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9978 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9979 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9980 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9981 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9982 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9983 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9984 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9985 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9986 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9987 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9988 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9989 // CHECK15: cond.true:
9990 // CHECK15-NEXT: br label [[COND_END:%.*]]
9991 // CHECK15: cond.false:
9992 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9993 // CHECK15-NEXT: br label [[COND_END]]
9994 // CHECK15: cond.end:
9995 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9996 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9997 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9998 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9999 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10000 // CHECK15: omp.inner.for.cond:
10001 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
10002 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
10003 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10004 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10005 // CHECK15: omp.inner.for.body:
10006 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !59
10007 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
10008 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !59
10009 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
10010 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
10011 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !59
10012 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10013 // CHECK15: omp.inner.for.inc:
10014 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
10015 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !59
10016 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10017 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
10018 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
10019 // CHECK15: omp.inner.for.end:
10020 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10021 // CHECK15: omp.loop.exit:
10022 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10023 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10024 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10025 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10026 // CHECK15: .omp.final.then:
10027 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
10028 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
10029 // CHECK15: .omp.final.done:
10030 // CHECK15-NEXT: ret void
10031 //
10032 //
10033 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..27
10034 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10035 // CHECK15-NEXT: entry:
10036 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10037 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10038 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10039 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10040 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
10041 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
10042 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10043 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
10044 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10045 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10046 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10047 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10048 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
10049 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10050 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10051 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10052 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10053 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
10054 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
10055 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
10056 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10057 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10058 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10059 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10060 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
10061 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
10062 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10063 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10064 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
10065 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10066 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
10067 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
10068 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10069 // CHECK15: omp.dispatch.cond:
10070 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10071 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10072 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
10073 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10074 // CHECK15: cond.true:
10075 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10076 // CHECK15-NEXT: br label [[COND_END:%.*]]
10077 // CHECK15: cond.false:
10078 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10079 // CHECK15-NEXT: br label [[COND_END]]
10080 // CHECK15: cond.end:
10081 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
10082 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10083 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10084 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
10085 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10086 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10087 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
10088 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10089 // CHECK15: omp.dispatch.body:
10090 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10091 // CHECK15: omp.inner.for.cond:
10092 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
10093 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !62
10094 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10095 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10096 // CHECK15: omp.inner.for.body:
10097 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
10098 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
10099 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10100 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !62
10101 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !62
10102 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
10103 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !62
10104 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10105 // CHECK15: omp.body.continue:
10106 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10107 // CHECK15: omp.inner.for.inc:
10108 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
10109 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
10110 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
10111 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
10112 // CHECK15: omp.inner.for.end:
10113 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10114 // CHECK15: omp.dispatch.inc:
10115 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10116 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10117 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
10118 // CHECK15-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
10119 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10120 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10121 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10122 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
10123 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
10124 // CHECK15: omp.dispatch.end:
10125 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
10126 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10127 // CHECK15-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
10128 // CHECK15-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10129 // CHECK15: .omp.final.then:
10130 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
10131 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
10132 // CHECK15: .omp.final.done:
10133 // CHECK15-NEXT: ret void
10134 //
10135 //
10136 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
10137 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10138 // CHECK15-NEXT: entry:
10139 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
10140 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
10141 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
10142 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
10143 // CHECK15-NEXT: ret void
10144 //
10145 //
10146 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30
10147 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10148 // CHECK15-NEXT: entry:
10149 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10150 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10151 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
10152 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10153 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
10154 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10155 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10156 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10157 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10158 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
10159 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10160 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10161 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
10162 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
10163 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10164 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10165 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10166 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10167 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10168 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10169 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10170 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10171 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10172 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10173 // CHECK15: cond.true:
10174 // CHECK15-NEXT: br label [[COND_END:%.*]]
10175 // CHECK15: cond.false:
10176 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10177 // CHECK15-NEXT: br label [[COND_END]]
10178 // CHECK15: cond.end:
10179 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10180 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10181 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10182 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10183 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10184 // CHECK15: omp.inner.for.cond:
10185 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
10186 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
10187 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10188 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10189 // CHECK15: omp.inner.for.body:
10190 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !65
10191 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
10192 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !65
10193 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10194 // CHECK15: omp.inner.for.inc:
10195 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
10196 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !65
10197 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
10198 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
10199 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]]
10200 // CHECK15: omp.inner.for.end:
10201 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10202 // CHECK15: omp.loop.exit:
10203 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10204 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10205 // CHECK15-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
10206 // CHECK15-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10207 // CHECK15: .omp.final.then:
10208 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
10209 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
10210 // CHECK15: .omp.final.done:
10211 // CHECK15-NEXT: ret void
10212 //
10213 //
10214 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..31
10215 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10216 // CHECK15-NEXT: entry:
10217 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10218 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10219 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10220 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10221 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
10222 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10223 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
10224 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10225 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10226 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10227 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10228 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
10229 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10230 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10231 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10232 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10233 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
10234 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
10235 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10236 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10237 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10238 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10239 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
10240 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
10241 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10242 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10243 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10244 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10245 // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10246 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
10247 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
10248 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10249 // CHECK15: omp.dispatch.cond:
10250 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10251 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
10252 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10253 // CHECK15: omp.dispatch.body:
10254 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10255 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
10256 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10257 // CHECK15: omp.inner.for.cond:
10258 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
10259 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !68
10260 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
10261 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10262 // CHECK15: omp.inner.for.body:
10263 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
10264 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
10265 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10266 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !68
10267 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !68
10268 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
10269 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !68
10270 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10271 // CHECK15: omp.body.continue:
10272 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10273 // CHECK15: omp.inner.for.inc:
10274 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
10275 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
10276 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
10277 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]]
10278 // CHECK15: omp.inner.for.end:
10279 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10280 // CHECK15: omp.dispatch.inc:
10281 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
10282 // CHECK15: omp.dispatch.end:
10283 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10284 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10285 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10286 // CHECK15: .omp.final.then:
10287 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
10288 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
10289 // CHECK15: .omp.final.done:
10290 // CHECK15-NEXT: ret void
10291 //
10292 //
10293 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
10294 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10295 // CHECK15-NEXT: entry:
10296 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
10297 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
10298 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
10299 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
10300 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
10301 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
10302 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
10303 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
10304 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
10305 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
10306 // CHECK15-NEXT: ret void
10307 //
10308 //
10309 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..34
10310 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10311 // CHECK15-NEXT: entry:
10312 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10313 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10314 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
10315 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
10316 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10317 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
10318 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10319 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10320 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10321 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10322 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
10323 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
10324 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10325 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10326 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
10327 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
10328 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
10329 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10330 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10331 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10332 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10333 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10334 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10335 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10336 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10337 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10338 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10339 // CHECK15: cond.true:
10340 // CHECK15-NEXT: br label [[COND_END:%.*]]
10341 // CHECK15: cond.false:
10342 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10343 // CHECK15-NEXT: br label [[COND_END]]
10344 // CHECK15: cond.end:
10345 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10346 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10347 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10348 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10349 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10350 // CHECK15: omp.inner.for.cond:
10351 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
10352 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
10353 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10354 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10355 // CHECK15: omp.inner.for.body:
10356 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !71
10357 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
10358 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !71
10359 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
10360 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
10361 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !71
10362 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10363 // CHECK15: omp.inner.for.inc:
10364 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
10365 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !71
10366 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10367 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
10368 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]]
10369 // CHECK15: omp.inner.for.end:
10370 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10371 // CHECK15: omp.loop.exit:
10372 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10373 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10374 // CHECK15-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
10375 // CHECK15-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10376 // CHECK15: .omp.final.then:
10377 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
10378 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
10379 // CHECK15: .omp.final.done:
10380 // CHECK15-NEXT: ret void
10381 //
10382 //
10383 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..35
10384 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10385 // CHECK15-NEXT: entry:
10386 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
10387 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
10388 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
10389 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
10390 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
10391 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
10392 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10393 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
10394 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10395 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10396 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10397 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10398 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
10399 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
10400 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
10401 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10402 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10403 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
10404 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
10405 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
10406 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10407 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
10408 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
10409 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
10410 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
10411 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
10412 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10413 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10414 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
10415 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10416 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10417 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
10418 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
10419 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
10420 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10421 // CHECK15: omp.dispatch.cond:
10422 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10423 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
10424 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10425 // CHECK15: omp.dispatch.body:
10426 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10427 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
10428 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10429 // CHECK15: omp.inner.for.cond:
10430 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
10431 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !74
10432 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
10433 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10434 // CHECK15: omp.inner.for.body:
10435 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
10436 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
10437 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10438 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !74
10439 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !74
10440 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
10441 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !74
10442 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10443 // CHECK15: omp.body.continue:
10444 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10445 // CHECK15: omp.inner.for.inc:
10446 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
10447 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
10448 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
10449 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]]
10450 // CHECK15: omp.inner.for.end:
10451 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10452 // CHECK15: omp.dispatch.inc:
10453 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
10454 // CHECK15: omp.dispatch.end:
10455 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
10456 // CHECK15-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
10457 // CHECK15-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
10458 // CHECK15: .omp.final.then:
10459 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
10460 // CHECK15-NEXT: br label [[DOTOMP_FINAL_DONE]]
10461 // CHECK15: .omp.final.done:
10462 // CHECK15-NEXT: ret void
10463 //
10464 //
10465 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
10466 // CHECK15-SAME: () #[[ATTR6:[0-9]+]] {
10467 // CHECK15-NEXT: entry:
10468 // CHECK15-NEXT: call void @__tgt_register_requires(i64 1)
10469 // CHECK15-NEXT: ret void
10470 //
10471 //
10472 // CHECK17-LABEL: define {{[^@]+}}@main
10473 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
10474 // CHECK17-NEXT: entry:
10475 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
10476 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
10477 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
10478 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4
10479 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
10480 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
10481 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
10482 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10483 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
10484 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
10485 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
10486 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
10487 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10488 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10489 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10490 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
10491 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
10492 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
10493 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
10494 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
10495 // CHECK17-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
10496 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
10497 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
10498 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
10499 // CHECK17-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
10500 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10501 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [4 x i8*], align 8
10502 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [4 x i8*], align 8
10503 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [4 x i8*], align 8
10504 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES26:%.*]] = alloca [4 x i64], align 8
10505 // CHECK17-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
10506 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
10507 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_29:%.*]] = alloca i32, align 4
10508 // CHECK17-NEXT: [[N_CASTED37:%.*]] = alloca i64, align 8
10509 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS39:%.*]] = alloca [3 x i8*], align 8
10510 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS40:%.*]] = alloca [3 x i8*], align 8
10511 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS41:%.*]] = alloca [3 x i8*], align 8
10512 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES42:%.*]] = alloca [3 x i64], align 8
10513 // CHECK17-NEXT: [[_TMP43:%.*]] = alloca i32, align 4
10514 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_44:%.*]] = alloca i32, align 4
10515 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_45:%.*]] = alloca i32, align 4
10516 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
10517 // CHECK17-NEXT: [[N_CASTED54:%.*]] = alloca i64, align 8
10518 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED56:%.*]] = alloca i64, align 8
10519 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS58:%.*]] = alloca [4 x i8*], align 8
10520 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS59:%.*]] = alloca [4 x i8*], align 8
10521 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS60:%.*]] = alloca [4 x i8*], align 8
10522 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES61:%.*]] = alloca [4 x i64], align 8
10523 // CHECK17-NEXT: [[_TMP62:%.*]] = alloca i32, align 4
10524 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_63:%.*]] = alloca i32, align 4
10525 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_64:%.*]] = alloca i32, align 4
10526 // CHECK17-NEXT: store i32 0, i32* [[RETVAL]], align 4
10527 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
10528 // CHECK17-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
10529 // CHECK17-NEXT: store i32 100, i32* [[N]], align 4
10530 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
10531 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
10532 // CHECK17-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
10533 // CHECK17-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
10534 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
10535 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
10536 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
10537 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
10538 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10539 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
10540 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
10541 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
10542 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
10543 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
10544 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10545 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
10546 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
10547 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10548 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
10549 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
10550 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10551 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8
10552 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
10553 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
10554 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
10555 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
10556 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
10557 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
10558 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
10559 // CHECK17-NEXT: store i8* null, i8** [[TMP16]], align 8
10560 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
10561 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
10562 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
10563 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
10564 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
10565 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
10566 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
10567 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
10568 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
10569 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8
10570 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10571 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10572 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
10573 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
10574 // CHECK17-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
10575 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10576 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
10577 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10578 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10579 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10580 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10581 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
10582 // CHECK17-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
10583 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
10584 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
10585 // CHECK17-NEXT: store i32 1, i32* [[TMP30]], align 4
10586 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
10587 // CHECK17-NEXT: store i32 3, i32* [[TMP31]], align 4
10588 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
10589 // CHECK17-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
10590 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
10591 // CHECK17-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
10592 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
10593 // CHECK17-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
10594 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
10595 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
10596 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
10597 // CHECK17-NEXT: store i8** null, i8*** [[TMP36]], align 8
10598 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
10599 // CHECK17-NEXT: store i8** null, i8*** [[TMP37]], align 8
10600 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
10601 // CHECK17-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
10602 // CHECK17-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
10603 // CHECK17-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
10604 // CHECK17-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10605 // CHECK17: omp_offload.failed:
10606 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
10607 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
10608 // CHECK17: omp_offload.cont:
10609 // CHECK17-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
10610 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
10611 // CHECK17-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
10612 // CHECK17-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
10613 // CHECK17-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
10614 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
10615 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false)
10616 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10617 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
10618 // CHECK17-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
10619 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10620 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
10621 // CHECK17-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
10622 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
10623 // CHECK17-NEXT: store i8* null, i8** [[TMP49]], align 8
10624 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
10625 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
10626 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
10627 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
10628 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
10629 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
10630 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
10631 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 8
10632 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
10633 // CHECK17-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
10634 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
10635 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
10636 // CHECK17-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
10637 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
10638 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
10639 // CHECK17-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
10640 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
10641 // CHECK17-NEXT: store i8* null, i8** [[TMP60]], align 8
10642 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10643 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10644 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
10645 // CHECK17-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
10646 // CHECK17-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
10647 // CHECK17-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
10648 // CHECK17-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
10649 // CHECK17-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
10650 // CHECK17-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
10651 // CHECK17-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
10652 // CHECK17-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
10653 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
10654 // CHECK17-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
10655 // CHECK17-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
10656 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
10657 // CHECK17-NEXT: store i32 1, i32* [[TMP68]], align 4
10658 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
10659 // CHECK17-NEXT: store i32 3, i32* [[TMP69]], align 4
10660 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
10661 // CHECK17-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
10662 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
10663 // CHECK17-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
10664 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
10665 // CHECK17-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
10666 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
10667 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP73]], align 8
10668 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
10669 // CHECK17-NEXT: store i8** null, i8*** [[TMP74]], align 8
10670 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
10671 // CHECK17-NEXT: store i8** null, i8*** [[TMP75]], align 8
10672 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
10673 // CHECK17-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
10674 // CHECK17-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
10675 // CHECK17-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
10676 // CHECK17-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
10677 // CHECK17: omp_offload.failed17:
10678 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10679 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT18]]
10680 // CHECK17: omp_offload.cont18:
10681 // CHECK17-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
10682 // CHECK17-NEXT: store i32 [[TMP79]], i32* [[DOTCAPTURE_EXPR_19]], align 4
10683 // CHECK17-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
10684 // CHECK17-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
10685 // CHECK17-NEXT: store i32 [[TMP80]], i32* [[CONV21]], align 4
10686 // CHECK17-NEXT: [[TMP81:%.*]] = load i64, i64* [[N_CASTED20]], align 8
10687 // CHECK17-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
10688 // CHECK17-NEXT: [[CONV22:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10689 // CHECK17-NEXT: store i32 [[TMP82]], i32* [[CONV22]], align 4
10690 // CHECK17-NEXT: [[TMP83:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10691 // CHECK17-NEXT: [[TMP84:%.*]] = mul nuw i64 [[TMP1]], 4
10692 // CHECK17-NEXT: [[TMP85:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES26]] to i8*
10693 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP85]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false)
10694 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
10695 // CHECK17-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64*
10696 // CHECK17-NEXT: store i64 [[TMP81]], i64* [[TMP87]], align 8
10697 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
10698 // CHECK17-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
10699 // CHECK17-NEXT: store i64 [[TMP81]], i64* [[TMP89]], align 8
10700 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
10701 // CHECK17-NEXT: store i8* null, i8** [[TMP90]], align 8
10702 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
10703 // CHECK17-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i64*
10704 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP92]], align 8
10705 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
10706 // CHECK17-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i64*
10707 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP94]], align 8
10708 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
10709 // CHECK17-NEXT: store i8* null, i8** [[TMP95]], align 8
10710 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
10711 // CHECK17-NEXT: [[TMP97:%.*]] = bitcast i8** [[TMP96]] to i32**
10712 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP97]], align 8
10713 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
10714 // CHECK17-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
10715 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 8
10716 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 2
10717 // CHECK17-NEXT: store i64 [[TMP84]], i64* [[TMP100]], align 8
10718 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 2
10719 // CHECK17-NEXT: store i8* null, i8** [[TMP101]], align 8
10720 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
10721 // CHECK17-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i64*
10722 // CHECK17-NEXT: store i64 [[TMP83]], i64* [[TMP103]], align 8
10723 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
10724 // CHECK17-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
10725 // CHECK17-NEXT: store i64 [[TMP83]], i64* [[TMP105]], align 8
10726 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 3
10727 // CHECK17-NEXT: store i8* null, i8** [[TMP106]], align 8
10728 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
10729 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
10730 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 0
10731 // CHECK17-NEXT: [[TMP110:%.*]] = load i32, i32* [[N]], align 4
10732 // CHECK17-NEXT: store i32 [[TMP110]], i32* [[DOTCAPTURE_EXPR_28]], align 4
10733 // CHECK17-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
10734 // CHECK17-NEXT: [[SUB30:%.*]] = sub nsw i32 [[TMP111]], 0
10735 // CHECK17-NEXT: [[DIV31:%.*]] = sdiv i32 [[SUB30]], 1
10736 // CHECK17-NEXT: [[SUB32:%.*]] = sub nsw i32 [[DIV31]], 1
10737 // CHECK17-NEXT: store i32 [[SUB32]], i32* [[DOTCAPTURE_EXPR_29]], align 4
10738 // CHECK17-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_29]], align 4
10739 // CHECK17-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP112]], 1
10740 // CHECK17-NEXT: [[TMP113:%.*]] = zext i32 [[ADD33]] to i64
10741 // CHECK17-NEXT: [[KERNEL_ARGS34:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
10742 // CHECK17-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 0
10743 // CHECK17-NEXT: store i32 1, i32* [[TMP114]], align 4
10744 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 1
10745 // CHECK17-NEXT: store i32 4, i32* [[TMP115]], align 4
10746 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 2
10747 // CHECK17-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
10748 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 3
10749 // CHECK17-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 8
10750 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 4
10751 // CHECK17-NEXT: store i64* [[TMP109]], i64** [[TMP118]], align 8
10752 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 5
10753 // CHECK17-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP119]], align 8
10754 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 6
10755 // CHECK17-NEXT: store i8** null, i8*** [[TMP120]], align 8
10756 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 7
10757 // CHECK17-NEXT: store i8** null, i8*** [[TMP121]], align 8
10758 // CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 8
10759 // CHECK17-NEXT: store i64 [[TMP113]], i64* [[TMP122]], align 8
10760 // CHECK17-NEXT: [[TMP123:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]])
10761 // CHECK17-NEXT: [[TMP124:%.*]] = icmp ne i32 [[TMP123]], 0
10762 // CHECK17-NEXT: br i1 [[TMP124]], label [[OMP_OFFLOAD_FAILED35:%.*]], label [[OMP_OFFLOAD_CONT36:%.*]]
10763 // CHECK17: omp_offload.failed35:
10764 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP81]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP83]]) #[[ATTR3]]
10765 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT36]]
10766 // CHECK17: omp_offload.cont36:
10767 // CHECK17-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
10768 // CHECK17-NEXT: [[CONV38:%.*]] = bitcast i64* [[N_CASTED37]] to i32*
10769 // CHECK17-NEXT: store i32 [[TMP125]], i32* [[CONV38]], align 4
10770 // CHECK17-NEXT: [[TMP126:%.*]] = load i64, i64* [[N_CASTED37]], align 8
10771 // CHECK17-NEXT: [[TMP127:%.*]] = mul nuw i64 [[TMP1]], 4
10772 // CHECK17-NEXT: [[TMP128:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES42]] to i8*
10773 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP128]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false)
10774 // CHECK17-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
10775 // CHECK17-NEXT: [[TMP130:%.*]] = bitcast i8** [[TMP129]] to i64*
10776 // CHECK17-NEXT: store i64 [[TMP126]], i64* [[TMP130]], align 8
10777 // CHECK17-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
10778 // CHECK17-NEXT: [[TMP132:%.*]] = bitcast i8** [[TMP131]] to i64*
10779 // CHECK17-NEXT: store i64 [[TMP126]], i64* [[TMP132]], align 8
10780 // CHECK17-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 0
10781 // CHECK17-NEXT: store i8* null, i8** [[TMP133]], align 8
10782 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 1
10783 // CHECK17-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
10784 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP135]], align 8
10785 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 1
10786 // CHECK17-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
10787 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP137]], align 8
10788 // CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 1
10789 // CHECK17-NEXT: store i8* null, i8** [[TMP138]], align 8
10790 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 2
10791 // CHECK17-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32**
10792 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP140]], align 8
10793 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 2
10794 // CHECK17-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32**
10795 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP142]], align 8
10796 // CHECK17-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 2
10797 // CHECK17-NEXT: store i64 [[TMP127]], i64* [[TMP143]], align 8
10798 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 2
10799 // CHECK17-NEXT: store i8* null, i8** [[TMP144]], align 8
10800 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
10801 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
10802 // CHECK17-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 0
10803 // CHECK17-NEXT: [[TMP148:%.*]] = load i32, i32* [[N]], align 4
10804 // CHECK17-NEXT: store i32 [[TMP148]], i32* [[DOTCAPTURE_EXPR_44]], align 4
10805 // CHECK17-NEXT: [[TMP149:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_44]], align 4
10806 // CHECK17-NEXT: [[SUB46:%.*]] = sub nsw i32 [[TMP149]], 0
10807 // CHECK17-NEXT: [[DIV47:%.*]] = sdiv i32 [[SUB46]], 1
10808 // CHECK17-NEXT: [[SUB48:%.*]] = sub nsw i32 [[DIV47]], 1
10809 // CHECK17-NEXT: store i32 [[SUB48]], i32* [[DOTCAPTURE_EXPR_45]], align 4
10810 // CHECK17-NEXT: [[TMP150:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_45]], align 4
10811 // CHECK17-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP150]], 1
10812 // CHECK17-NEXT: [[TMP151:%.*]] = zext i32 [[ADD49]] to i64
10813 // CHECK17-NEXT: [[KERNEL_ARGS50:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
10814 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 0
10815 // CHECK17-NEXT: store i32 1, i32* [[TMP152]], align 4
10816 // CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 1
10817 // CHECK17-NEXT: store i32 3, i32* [[TMP153]], align 4
10818 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 2
10819 // CHECK17-NEXT: store i8** [[TMP145]], i8*** [[TMP154]], align 8
10820 // CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 3
10821 // CHECK17-NEXT: store i8** [[TMP146]], i8*** [[TMP155]], align 8
10822 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 4
10823 // CHECK17-NEXT: store i64* [[TMP147]], i64** [[TMP156]], align 8
10824 // CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 5
10825 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP157]], align 8
10826 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 6
10827 // CHECK17-NEXT: store i8** null, i8*** [[TMP158]], align 8
10828 // CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 7
10829 // CHECK17-NEXT: store i8** null, i8*** [[TMP159]], align 8
10830 // CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 8
10831 // CHECK17-NEXT: store i64 [[TMP151]], i64* [[TMP160]], align 8
10832 // CHECK17-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]])
10833 // CHECK17-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
10834 // CHECK17-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED51:%.*]], label [[OMP_OFFLOAD_CONT52:%.*]]
10835 // CHECK17: omp_offload.failed51:
10836 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP126]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10837 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT52]]
10838 // CHECK17: omp_offload.cont52:
10839 // CHECK17-NEXT: [[TMP163:%.*]] = load i32, i32* [[M]], align 4
10840 // CHECK17-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_53]], align 4
10841 // CHECK17-NEXT: [[TMP164:%.*]] = load i32, i32* [[N]], align 4
10842 // CHECK17-NEXT: [[CONV55:%.*]] = bitcast i64* [[N_CASTED54]] to i32*
10843 // CHECK17-NEXT: store i32 [[TMP164]], i32* [[CONV55]], align 4
10844 // CHECK17-NEXT: [[TMP165:%.*]] = load i64, i64* [[N_CASTED54]], align 8
10845 // CHECK17-NEXT: [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
10846 // CHECK17-NEXT: [[CONV57:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED56]] to i32*
10847 // CHECK17-NEXT: store i32 [[TMP166]], i32* [[CONV57]], align 4
10848 // CHECK17-NEXT: [[TMP167:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED56]], align 8
10849 // CHECK17-NEXT: [[TMP168:%.*]] = mul nuw i64 [[TMP1]], 4
10850 // CHECK17-NEXT: [[TMP169:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES61]] to i8*
10851 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP169]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false)
10852 // CHECK17-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
10853 // CHECK17-NEXT: [[TMP171:%.*]] = bitcast i8** [[TMP170]] to i64*
10854 // CHECK17-NEXT: store i64 [[TMP165]], i64* [[TMP171]], align 8
10855 // CHECK17-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
10856 // CHECK17-NEXT: [[TMP173:%.*]] = bitcast i8** [[TMP172]] to i64*
10857 // CHECK17-NEXT: store i64 [[TMP165]], i64* [[TMP173]], align 8
10858 // CHECK17-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 0
10859 // CHECK17-NEXT: store i8* null, i8** [[TMP174]], align 8
10860 // CHECK17-NEXT: [[TMP175:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 1
10861 // CHECK17-NEXT: [[TMP176:%.*]] = bitcast i8** [[TMP175]] to i64*
10862 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP176]], align 8
10863 // CHECK17-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 1
10864 // CHECK17-NEXT: [[TMP178:%.*]] = bitcast i8** [[TMP177]] to i64*
10865 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP178]], align 8
10866 // CHECK17-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 1
10867 // CHECK17-NEXT: store i8* null, i8** [[TMP179]], align 8
10868 // CHECK17-NEXT: [[TMP180:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 2
10869 // CHECK17-NEXT: [[TMP181:%.*]] = bitcast i8** [[TMP180]] to i32**
10870 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP181]], align 8
10871 // CHECK17-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 2
10872 // CHECK17-NEXT: [[TMP183:%.*]] = bitcast i8** [[TMP182]] to i32**
10873 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP183]], align 8
10874 // CHECK17-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 2
10875 // CHECK17-NEXT: store i64 [[TMP168]], i64* [[TMP184]], align 8
10876 // CHECK17-NEXT: [[TMP185:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 2
10877 // CHECK17-NEXT: store i8* null, i8** [[TMP185]], align 8
10878 // CHECK17-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 3
10879 // CHECK17-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64*
10880 // CHECK17-NEXT: store i64 [[TMP167]], i64* [[TMP187]], align 8
10881 // CHECK17-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 3
10882 // CHECK17-NEXT: [[TMP189:%.*]] = bitcast i8** [[TMP188]] to i64*
10883 // CHECK17-NEXT: store i64 [[TMP167]], i64* [[TMP189]], align 8
10884 // CHECK17-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 3
10885 // CHECK17-NEXT: store i8* null, i8** [[TMP190]], align 8
10886 // CHECK17-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
10887 // CHECK17-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
10888 // CHECK17-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 0
10889 // CHECK17-NEXT: [[TMP194:%.*]] = load i32, i32* [[N]], align 4
10890 // CHECK17-NEXT: store i32 [[TMP194]], i32* [[DOTCAPTURE_EXPR_63]], align 4
10891 // CHECK17-NEXT: [[TMP195:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_63]], align 4
10892 // CHECK17-NEXT: [[SUB65:%.*]] = sub nsw i32 [[TMP195]], 0
10893 // CHECK17-NEXT: [[DIV66:%.*]] = sdiv i32 [[SUB65]], 1
10894 // CHECK17-NEXT: [[SUB67:%.*]] = sub nsw i32 [[DIV66]], 1
10895 // CHECK17-NEXT: store i32 [[SUB67]], i32* [[DOTCAPTURE_EXPR_64]], align 4
10896 // CHECK17-NEXT: [[TMP196:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_64]], align 4
10897 // CHECK17-NEXT: [[ADD68:%.*]] = add nsw i32 [[TMP196]], 1
10898 // CHECK17-NEXT: [[TMP197:%.*]] = zext i32 [[ADD68]] to i64
10899 // CHECK17-NEXT: [[KERNEL_ARGS69:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
10900 // CHECK17-NEXT: [[TMP198:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 0
10901 // CHECK17-NEXT: store i32 1, i32* [[TMP198]], align 4
10902 // CHECK17-NEXT: [[TMP199:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 1
10903 // CHECK17-NEXT: store i32 4, i32* [[TMP199]], align 4
10904 // CHECK17-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 2
10905 // CHECK17-NEXT: store i8** [[TMP191]], i8*** [[TMP200]], align 8
10906 // CHECK17-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 3
10907 // CHECK17-NEXT: store i8** [[TMP192]], i8*** [[TMP201]], align 8
10908 // CHECK17-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 4
10909 // CHECK17-NEXT: store i64* [[TMP193]], i64** [[TMP202]], align 8
10910 // CHECK17-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 5
10911 // CHECK17-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP203]], align 8
10912 // CHECK17-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 6
10913 // CHECK17-NEXT: store i8** null, i8*** [[TMP204]], align 8
10914 // CHECK17-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 7
10915 // CHECK17-NEXT: store i8** null, i8*** [[TMP205]], align 8
10916 // CHECK17-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 8
10917 // CHECK17-NEXT: store i64 [[TMP197]], i64* [[TMP206]], align 8
10918 // CHECK17-NEXT: [[TMP207:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]])
10919 // CHECK17-NEXT: [[TMP208:%.*]] = icmp ne i32 [[TMP207]], 0
10920 // CHECK17-NEXT: br i1 [[TMP208]], label [[OMP_OFFLOAD_FAILED70:%.*]], label [[OMP_OFFLOAD_CONT71:%.*]]
10921 // CHECK17: omp_offload.failed70:
10922 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP165]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP167]]) #[[ATTR3]]
10923 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT71]]
10924 // CHECK17: omp_offload.cont71:
10925 // CHECK17-NEXT: [[TMP209:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
10926 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP209]])
10927 // CHECK17-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
10928 // CHECK17-NEXT: [[TMP210:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
10929 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP210]])
10930 // CHECK17-NEXT: [[TMP211:%.*]] = load i32, i32* [[RETVAL]], align 4
10931 // CHECK17-NEXT: ret i32 [[TMP211]]
10932 //
10933 //
10934 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
10935 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
10936 // CHECK17-NEXT: entry:
10937 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10938 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10939 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10940 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10941 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10942 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10943 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10944 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10945 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10946 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10947 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10948 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10949 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
10950 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10951 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
10952 // CHECK17-NEXT: ret void
10953 //
10954 //
10955 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
10956 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10957 // CHECK17-NEXT: entry:
10958 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10959 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10960 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10961 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10962 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10963 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10964 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10965 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10966 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10967 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10968 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10969 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10970 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10971 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10972 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
10973 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10974 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10975 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10976 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10977 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10978 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10979 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10980 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10981 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10982 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10983 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10984 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10985 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10986 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10987 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10988 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10989 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10990 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10991 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10992 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10993 // CHECK17: omp.precond.then:
10994 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10995 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10996 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10997 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10998 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10999 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11000 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
11001 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11002 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11003 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11004 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
11005 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11006 // CHECK17: cond.true:
11007 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11008 // CHECK17-NEXT: br label [[COND_END:%.*]]
11009 // CHECK17: cond.false:
11010 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11011 // CHECK17-NEXT: br label [[COND_END]]
11012 // CHECK17: cond.end:
11013 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
11014 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11015 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11016 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
11017 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11018 // CHECK17: omp.inner.for.cond:
11019 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11020 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
11021 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11022 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11023 // CHECK17: omp.inner.for.body:
11024 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
11025 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
11026 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
11027 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
11028 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !13
11029 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11030 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4, !llvm.access.group !13
11031 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !13
11032 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !13
11033 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11034 // CHECK17: omp.inner.for.inc:
11035 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11036 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
11037 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
11038 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
11039 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
11040 // CHECK17: omp.inner.for.end:
11041 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11042 // CHECK17: omp.loop.exit:
11043 // CHECK17-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11044 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
11045 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
11046 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11047 // CHECK17-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
11048 // CHECK17-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11049 // CHECK17: .omp.final.then:
11050 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11051 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
11052 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
11053 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
11054 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
11055 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
11056 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11057 // CHECK17: .omp.final.done:
11058 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11059 // CHECK17: omp.precond.end:
11060 // CHECK17-NEXT: ret void
11061 //
11062 //
11063 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
11064 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11065 // CHECK17-NEXT: entry:
11066 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11067 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11068 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11069 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11070 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11071 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11072 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11073 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11074 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11075 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11076 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11077 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11078 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11079 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11080 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11081 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11082 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
11083 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11084 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11085 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11086 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11087 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11088 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11089 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11090 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11091 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11092 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11093 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11094 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11095 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11096 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11097 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11098 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11099 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11100 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
11101 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11102 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11103 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11104 // CHECK17: omp.precond.then:
11105 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11106 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11107 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
11108 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11109 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
11110 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11111 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11112 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
11113 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
11114 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11115 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11116 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11117 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
11118 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11119 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11120 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11121 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
11122 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11123 // CHECK17: cond.true:
11124 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11125 // CHECK17-NEXT: br label [[COND_END:%.*]]
11126 // CHECK17: cond.false:
11127 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11128 // CHECK17-NEXT: br label [[COND_END]]
11129 // CHECK17: cond.end:
11130 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
11131 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11132 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11133 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
11134 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11135 // CHECK17: omp.inner.for.cond:
11136 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11137 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
11138 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
11139 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11140 // CHECK17: omp.inner.for.body:
11141 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11142 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
11143 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11144 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !17
11145 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !17
11146 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
11147 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
11148 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
11149 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11150 // CHECK17: omp.body.continue:
11151 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11152 // CHECK17: omp.inner.for.inc:
11153 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11154 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
11155 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11156 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
11157 // CHECK17: omp.inner.for.end:
11158 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11159 // CHECK17: omp.loop.exit:
11160 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11161 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
11162 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
11163 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11164 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
11165 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11166 // CHECK17: .omp.final.then:
11167 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11168 // CHECK17-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP24]], 0
11169 // CHECK17-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
11170 // CHECK17-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
11171 // CHECK17-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
11172 // CHECK17-NEXT: store i32 [[ADD12]], i32* [[I5]], align 4
11173 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11174 // CHECK17: .omp.final.done:
11175 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11176 // CHECK17: omp.precond.end:
11177 // CHECK17-NEXT: ret void
11178 //
11179 //
11180 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
11181 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11182 // CHECK17-NEXT: entry:
11183 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11184 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11185 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11186 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11187 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11188 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11189 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11190 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11191 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11192 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11193 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11194 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11195 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
11196 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
11197 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
11198 // CHECK17-NEXT: ret void
11199 //
11200 //
11201 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
11202 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11203 // CHECK17-NEXT: entry:
11204 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11205 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11206 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11207 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11208 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11209 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11210 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11211 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11212 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11213 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11214 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11215 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11216 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11217 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11218 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
11219 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11220 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11221 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11222 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11223 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11224 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11225 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11226 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11227 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11228 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11229 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11230 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11231 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11232 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11233 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11234 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11235 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
11236 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11237 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11238 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11239 // CHECK17: omp.precond.then:
11240 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11241 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11242 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
11243 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11244 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11245 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11246 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
11247 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11248 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11249 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11250 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
11251 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11252 // CHECK17: cond.true:
11253 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11254 // CHECK17-NEXT: br label [[COND_END:%.*]]
11255 // CHECK17: cond.false:
11256 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11257 // CHECK17-NEXT: br label [[COND_END]]
11258 // CHECK17: cond.end:
11259 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
11260 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11261 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11262 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
11263 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11264 // CHECK17: omp.inner.for.cond:
11265 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11266 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
11267 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11268 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11269 // CHECK17: omp.inner.for.body:
11270 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !22
11271 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
11272 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !22
11273 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
11274 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !22
11275 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11276 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4, !llvm.access.group !22
11277 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !22
11278 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !22
11279 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11280 // CHECK17: omp.inner.for.inc:
11281 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11282 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !22
11283 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
11284 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
11285 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
11286 // CHECK17: omp.inner.for.end:
11287 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11288 // CHECK17: omp.loop.exit:
11289 // CHECK17-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11290 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
11291 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
11292 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11293 // CHECK17-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
11294 // CHECK17-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11295 // CHECK17: .omp.final.then:
11296 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11297 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
11298 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
11299 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
11300 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
11301 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
11302 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11303 // CHECK17: .omp.final.done:
11304 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11305 // CHECK17: omp.precond.end:
11306 // CHECK17-NEXT: ret void
11307 //
11308 //
11309 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
11310 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11311 // CHECK17-NEXT: entry:
11312 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11313 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11314 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11315 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11316 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11317 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11318 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11319 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11320 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11321 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11322 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11323 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11324 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11325 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11326 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11327 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11328 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
11329 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11330 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11331 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11332 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11333 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11334 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11335 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11336 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11337 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11338 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11339 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11340 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11341 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11342 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11343 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11344 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11345 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11346 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
11347 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11348 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11349 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11350 // CHECK17: omp.precond.then:
11351 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11352 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11353 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
11354 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11355 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
11356 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11357 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11358 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
11359 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
11360 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11361 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11362 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11363 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
11364 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11365 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11366 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11367 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
11368 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11369 // CHECK17: cond.true:
11370 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11371 // CHECK17-NEXT: br label [[COND_END:%.*]]
11372 // CHECK17: cond.false:
11373 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11374 // CHECK17-NEXT: br label [[COND_END]]
11375 // CHECK17: cond.end:
11376 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
11377 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11378 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11379 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
11380 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11381 // CHECK17: omp.inner.for.cond:
11382 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11383 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
11384 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
11385 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11386 // CHECK17: omp.inner.for.body:
11387 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11388 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
11389 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11390 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !25
11391 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !25
11392 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
11393 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
11394 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
11395 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11396 // CHECK17: omp.body.continue:
11397 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11398 // CHECK17: omp.inner.for.inc:
11399 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11400 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
11401 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
11402 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
11403 // CHECK17: omp.inner.for.end:
11404 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11405 // CHECK17: omp.loop.exit:
11406 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11407 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
11408 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
11409 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11410 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
11411 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11412 // CHECK17: .omp.final.then:
11413 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11414 // CHECK17-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP24]], 0
11415 // CHECK17-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
11416 // CHECK17-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
11417 // CHECK17-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
11418 // CHECK17-NEXT: store i32 [[ADD12]], i32* [[I5]], align 4
11419 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11420 // CHECK17: .omp.final.done:
11421 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11422 // CHECK17: omp.precond.end:
11423 // CHECK17-NEXT: ret void
11424 //
11425 //
11426 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
11427 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11428 // CHECK17-NEXT: entry:
11429 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11430 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11431 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11432 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11433 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11434 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11435 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11436 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11437 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11438 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11439 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11440 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11441 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11442 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11443 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11444 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11445 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
11446 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
11447 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
11448 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11449 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
11450 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11451 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
11452 // CHECK17-NEXT: ret void
11453 //
11454 //
11455 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
11456 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11457 // CHECK17-NEXT: entry:
11458 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11459 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11460 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11461 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11462 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11463 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11464 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11465 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11466 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11467 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
11468 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11469 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11470 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11471 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11472 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11473 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
11474 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11475 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11476 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11477 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11478 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11479 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11480 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11481 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11482 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11483 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11484 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11485 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11486 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11487 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11488 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11489 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11490 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11491 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
11492 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
11493 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
11494 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11495 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11496 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11497 // CHECK17: omp.precond.then:
11498 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11499 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11500 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
11501 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11502 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11503 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
11504 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11505 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11506 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
11507 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11508 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11509 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11510 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11511 // CHECK17: cond.true:
11512 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11513 // CHECK17-NEXT: br label [[COND_END:%.*]]
11514 // CHECK17: cond.false:
11515 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11516 // CHECK17-NEXT: br label [[COND_END]]
11517 // CHECK17: cond.end:
11518 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11519 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11520 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11521 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11522 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11523 // CHECK17: omp.inner.for.cond:
11524 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11525 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !28
11526 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
11527 // CHECK17-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
11528 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11529 // CHECK17: omp.inner.for.body:
11530 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
11531 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
11532 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11533 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
11534 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !28
11535 // CHECK17-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11536 // CHECK17-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4, !llvm.access.group !28
11537 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !28
11538 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 4, !llvm.access.group !28
11539 // CHECK17-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11540 // CHECK17-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4, !llvm.access.group !28
11541 // CHECK17-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !28
11542 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]]), !llvm.access.group !28
11543 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11544 // CHECK17: omp.inner.for.inc:
11545 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11546 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
11547 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
11548 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11549 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
11550 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
11551 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
11552 // CHECK17-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
11553 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11554 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !28
11555 // CHECK17-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
11556 // CHECK17-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11557 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11558 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !28
11559 // CHECK17-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
11560 // CHECK17-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
11561 // CHECK17: cond.true14:
11562 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group !28
11563 // CHECK17-NEXT: br label [[COND_END16:%.*]]
11564 // CHECK17: cond.false15:
11565 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11566 // CHECK17-NEXT: br label [[COND_END16]]
11567 // CHECK17: cond.end16:
11568 // CHECK17-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
11569 // CHECK17-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !28
11570 // CHECK17-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !28
11571 // CHECK17-NEXT: store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !28
11572 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
11573 // CHECK17: omp.inner.for.end:
11574 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11575 // CHECK17: omp.loop.exit:
11576 // CHECK17-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11577 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
11578 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
11579 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11580 // CHECK17-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0
11581 // CHECK17-NEXT: br i1 [[TMP38]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11582 // CHECK17: .omp.final.then:
11583 // CHECK17-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11584 // CHECK17-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP39]], 0
11585 // CHECK17-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
11586 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV19]], 1
11587 // CHECK17-NEXT: [[ADD20:%.*]] = add nsw i32 0, [[MUL]]
11588 // CHECK17-NEXT: store i32 [[ADD20]], i32* [[I5]], align 4
11589 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11590 // CHECK17: .omp.final.done:
11591 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11592 // CHECK17: omp.precond.end:
11593 // CHECK17-NEXT: ret void
11594 //
11595 //
11596 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7
11597 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11598 // CHECK17-NEXT: entry:
11599 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11600 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11601 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11602 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11603 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11604 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11605 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11606 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11607 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11608 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11609 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11610 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
11611 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11612 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11613 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11614 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11615 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11616 // CHECK17-NEXT: [[I7:%.*]] = alloca i32, align 4
11617 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11618 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11619 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11620 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11621 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11622 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11623 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11624 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11625 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11626 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11627 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11628 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11629 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11630 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11631 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11632 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11633 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11634 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
11635 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
11636 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
11637 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11638 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11639 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11640 // CHECK17: omp.precond.then:
11641 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11642 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11643 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
11644 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11645 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
11646 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11647 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
11648 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
11649 // CHECK17-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
11650 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11651 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11652 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11653 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
11654 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11655 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11656 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11657 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
11658 // CHECK17-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11659 // CHECK17: cond.true:
11660 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
11661 // CHECK17-NEXT: br label [[COND_END:%.*]]
11662 // CHECK17: cond.false:
11663 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11664 // CHECK17-NEXT: br label [[COND_END]]
11665 // CHECK17: cond.end:
11666 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
11667 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11668 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11669 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
11670 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11671 // CHECK17: omp.inner.for.cond:
11672 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11673 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !31
11674 // CHECK17-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
11675 // CHECK17-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11676 // CHECK17: omp.inner.for.body:
11677 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11678 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
11679 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11680 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !31
11681 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !31
11682 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
11683 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
11684 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !31
11685 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11686 // CHECK17: omp.body.continue:
11687 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11688 // CHECK17: omp.inner.for.inc:
11689 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11690 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
11691 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !31
11692 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
11693 // CHECK17: omp.inner.for.end:
11694 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11695 // CHECK17: omp.loop.exit:
11696 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11697 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
11698 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
11699 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11700 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
11701 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11702 // CHECK17: .omp.final.then:
11703 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11704 // CHECK17-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP24]], 0
11705 // CHECK17-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
11706 // CHECK17-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
11707 // CHECK17-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
11708 // CHECK17-NEXT: store i32 [[ADD14]], i32* [[I7]], align 4
11709 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11710 // CHECK17: .omp.final.done:
11711 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11712 // CHECK17: omp.precond.end:
11713 // CHECK17-NEXT: ret void
11714 //
11715 //
11716 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
11717 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11718 // CHECK17-NEXT: entry:
11719 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11720 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11721 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11722 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11723 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11724 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11725 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11726 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11727 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11728 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11729 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11730 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11731 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
11732 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
11733 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
11734 // CHECK17-NEXT: ret void
11735 //
11736 //
11737 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..10
11738 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11739 // CHECK17-NEXT: entry:
11740 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11741 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11742 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11743 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11744 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11745 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11746 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11747 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11748 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11749 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11750 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11751 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11752 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11753 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11754 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
11755 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11756 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11757 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11758 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11759 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11760 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11761 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11762 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11763 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11764 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11765 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11766 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11767 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11768 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11769 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11770 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11771 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
11772 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11773 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11774 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11775 // CHECK17: omp.precond.then:
11776 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11777 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11778 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
11779 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11780 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11781 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11782 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
11783 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11784 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11785 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11786 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
11787 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11788 // CHECK17: cond.true:
11789 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11790 // CHECK17-NEXT: br label [[COND_END:%.*]]
11791 // CHECK17: cond.false:
11792 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11793 // CHECK17-NEXT: br label [[COND_END]]
11794 // CHECK17: cond.end:
11795 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
11796 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11797 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11798 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
11799 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11800 // CHECK17: omp.inner.for.cond:
11801 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11802 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
11803 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11804 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11805 // CHECK17: omp.inner.for.body:
11806 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !34
11807 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
11808 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !34
11809 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
11810 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !34
11811 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11812 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4, !llvm.access.group !34
11813 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !34
11814 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !34
11815 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11816 // CHECK17: omp.inner.for.inc:
11817 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11818 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !34
11819 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
11820 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !34
11821 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
11822 // CHECK17: omp.inner.for.end:
11823 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11824 // CHECK17: omp.loop.exit:
11825 // CHECK17-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11826 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
11827 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
11828 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11829 // CHECK17-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
11830 // CHECK17-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11831 // CHECK17: .omp.final.then:
11832 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11833 // CHECK17-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
11834 // CHECK17-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
11835 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
11836 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
11837 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
11838 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11839 // CHECK17: .omp.final.done:
11840 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11841 // CHECK17: omp.precond.end:
11842 // CHECK17-NEXT: ret void
11843 //
11844 //
11845 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
11846 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11847 // CHECK17-NEXT: entry:
11848 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11849 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11850 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11851 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11852 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11853 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11854 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11855 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11856 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11857 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11858 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11859 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11860 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11861 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11862 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11863 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11864 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
11865 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11866 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11867 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11868 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11869 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11870 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11871 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11872 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11873 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11874 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11875 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11876 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11877 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11878 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11879 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11880 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11881 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11882 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
11883 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11884 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11885 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11886 // CHECK17: omp.precond.then:
11887 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11888 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11889 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
11890 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11891 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
11892 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11893 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11894 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
11895 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
11896 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11897 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11898 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11899 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11900 // CHECK17-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11901 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
11902 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
11903 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11904 // CHECK17: omp.dispatch.cond:
11905 // CHECK17-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11906 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
11907 // CHECK17-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11908 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
11909 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11910 // CHECK17: omp.dispatch.body:
11911 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11912 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
11913 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11914 // CHECK17: omp.inner.for.cond:
11915 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11916 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !37
11917 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
11918 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11919 // CHECK17: omp.inner.for.body:
11920 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11921 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
11922 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11923 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !37
11924 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !37
11925 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
11926 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
11927 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !37
11928 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11929 // CHECK17: omp.body.continue:
11930 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11931 // CHECK17: omp.inner.for.inc:
11932 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11933 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
11934 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !37
11935 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP38:![0-9]+]]
11936 // CHECK17: omp.inner.for.end:
11937 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11938 // CHECK17: omp.dispatch.inc:
11939 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11940 // CHECK17: omp.dispatch.end:
11941 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
11942 // CHECK17-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
11943 // CHECK17-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
11944 // CHECK17: .omp.final.then:
11945 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11946 // CHECK17-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP23]], 0
11947 // CHECK17-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
11948 // CHECK17-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
11949 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
11950 // CHECK17-NEXT: store i32 [[ADD11]], i32* [[I5]], align 4
11951 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
11952 // CHECK17: .omp.final.done:
11953 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11954 // CHECK17: omp.precond.end:
11955 // CHECK17-NEXT: ret void
11956 //
11957 //
11958 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
11959 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11960 // CHECK17-NEXT: entry:
11961 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11962 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11963 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11964 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11965 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
11966 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11967 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
11968 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11969 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
11970 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11971 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11972 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11973 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11974 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11975 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
11976 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
11977 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
11978 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
11979 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
11980 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11981 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
11982 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11983 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
11984 // CHECK17-NEXT: ret void
11985 //
11986 //
11987 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14
11988 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11989 // CHECK17-NEXT: entry:
11990 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11991 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11992 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
11993 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
11994 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
11995 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11996 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11997 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11998 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11999 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
12000 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12001 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12002 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12003 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12004 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12005 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
12006 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
12007 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12008 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12009 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12010 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
12011 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12012 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12013 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12014 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
12015 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12016 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12017 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12018 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
12019 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12020 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12021 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12022 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12023 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
12024 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
12025 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
12026 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12027 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12028 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12029 // CHECK17: omp.precond.then:
12030 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12031 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
12032 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
12033 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12034 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12035 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12036 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12037 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12038 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12039 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
12040 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
12041 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12042 // CHECK17: cond.true:
12043 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
12044 // CHECK17-NEXT: br label [[COND_END:%.*]]
12045 // CHECK17: cond.false:
12046 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12047 // CHECK17-NEXT: br label [[COND_END]]
12048 // CHECK17: cond.end:
12049 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
12050 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12051 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12052 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
12053 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12054 // CHECK17: omp.inner.for.cond:
12055 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
12056 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
12057 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12058 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12059 // CHECK17: omp.inner.for.body:
12060 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !40
12061 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
12062 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !40
12063 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
12064 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !40
12065 // CHECK17-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
12066 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV8]], align 4, !llvm.access.group !40
12067 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !40
12068 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 4, !llvm.access.group !40
12069 // CHECK17-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12070 // CHECK17-NEXT: store i32 [[TMP21]], i32* [[CONV9]], align 4, !llvm.access.group !40
12071 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !40
12072 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]]), !llvm.access.group !40
12073 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12074 // CHECK17: omp.inner.for.inc:
12075 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
12076 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !40
12077 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
12078 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40
12079 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]]
12080 // CHECK17: omp.inner.for.end:
12081 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12082 // CHECK17: omp.loop.exit:
12083 // CHECK17-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12084 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
12085 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
12086 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12087 // CHECK17-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
12088 // CHECK17-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12089 // CHECK17: .omp.final.then:
12090 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12091 // CHECK17-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP29]], 0
12092 // CHECK17-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
12093 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
12094 // CHECK17-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
12095 // CHECK17-NEXT: store i32 [[ADD12]], i32* [[I5]], align 4
12096 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12097 // CHECK17: .omp.final.done:
12098 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
12099 // CHECK17: omp.precond.end:
12100 // CHECK17-NEXT: ret void
12101 //
12102 //
12103 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15
12104 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12105 // CHECK17-NEXT: entry:
12106 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12107 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12108 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12109 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12110 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
12111 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
12112 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
12113 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12114 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12115 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12116 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
12117 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
12118 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12119 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12120 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12121 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12122 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12123 // CHECK17-NEXT: [[I7:%.*]] = alloca i32, align 4
12124 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12125 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12126 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12127 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12128 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
12129 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
12130 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
12131 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12132 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
12133 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
12134 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
12135 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12136 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
12137 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12138 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12139 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12140 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12141 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
12142 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
12143 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
12144 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12145 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12146 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12147 // CHECK17: omp.precond.then:
12148 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12149 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
12150 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
12151 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12152 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
12153 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12154 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
12155 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
12156 // CHECK17-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
12157 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12158 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12159 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 4
12160 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12161 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12162 // CHECK17-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12163 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
12164 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
12165 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12166 // CHECK17: omp.dispatch.cond:
12167 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12168 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
12169 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12170 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
12171 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12172 // CHECK17: omp.dispatch.body:
12173 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12174 // CHECK17-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
12175 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12176 // CHECK17: omp.inner.for.cond:
12177 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
12178 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !43
12179 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
12180 // CHECK17-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12181 // CHECK17: omp.inner.for.body:
12182 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
12183 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
12184 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12185 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !43
12186 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !43
12187 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
12188 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
12189 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !43
12190 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12191 // CHECK17: omp.body.continue:
12192 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12193 // CHECK17: omp.inner.for.inc:
12194 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
12195 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
12196 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !43
12197 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
12198 // CHECK17: omp.inner.for.end:
12199 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
12200 // CHECK17: omp.dispatch.inc:
12201 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
12202 // CHECK17: omp.dispatch.end:
12203 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12204 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
12205 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12206 // CHECK17: .omp.final.then:
12207 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12208 // CHECK17-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP24]], 0
12209 // CHECK17-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
12210 // CHECK17-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
12211 // CHECK17-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
12212 // CHECK17-NEXT: store i32 [[ADD13]], i32* [[I7]], align 4
12213 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12214 // CHECK17: .omp.final.done:
12215 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
12216 // CHECK17: omp.precond.end:
12217 // CHECK17-NEXT: ret void
12218 //
12219 //
12220 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
12221 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
12222 // CHECK17-NEXT: entry:
12223 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
12224 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
12225 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
12226 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
12227 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
12228 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
12229 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12230 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
12231 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
12232 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
12233 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
12234 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12235 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12236 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8
12237 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8
12238 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8
12239 // CHECK17-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
12240 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 8
12241 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 8
12242 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 8
12243 // CHECK17-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
12244 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
12245 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8
12246 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS25:%.*]] = alloca [2 x i8*], align 8
12247 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS26:%.*]] = alloca [2 x i8*], align 8
12248 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS27:%.*]] = alloca [2 x i8*], align 8
12249 // CHECK17-NEXT: [[_TMP28:%.*]] = alloca i32, align 4
12250 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
12251 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
12252 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12253 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
12254 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
12255 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12256 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
12257 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
12258 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
12259 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8
12260 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12261 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12262 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
12263 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
12264 // CHECK17-NEXT: store i32 1, i32* [[TMP7]], align 4
12265 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
12266 // CHECK17-NEXT: store i32 1, i32* [[TMP8]], align 4
12267 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
12268 // CHECK17-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
12269 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
12270 // CHECK17-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
12271 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
12272 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 8
12273 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
12274 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 8
12275 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
12276 // CHECK17-NEXT: store i8** null, i8*** [[TMP13]], align 8
12277 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
12278 // CHECK17-NEXT: store i8** null, i8*** [[TMP14]], align 8
12279 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
12280 // CHECK17-NEXT: store i64 10, i64* [[TMP15]], align 8
12281 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
12282 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
12283 // CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12284 // CHECK17: omp_offload.failed:
12285 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
12286 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
12287 // CHECK17: omp_offload.cont:
12288 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
12289 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
12290 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
12291 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
12292 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
12293 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
12294 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
12295 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8
12296 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
12297 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
12298 // CHECK17-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12299 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
12300 // CHECK17-NEXT: store i32 1, i32* [[TMP25]], align 4
12301 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
12302 // CHECK17-NEXT: store i32 1, i32* [[TMP26]], align 4
12303 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
12304 // CHECK17-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
12305 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
12306 // CHECK17-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
12307 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
12308 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 8
12309 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
12310 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 8
12311 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
12312 // CHECK17-NEXT: store i8** null, i8*** [[TMP31]], align 8
12313 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
12314 // CHECK17-NEXT: store i8** null, i8*** [[TMP32]], align 8
12315 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
12316 // CHECK17-NEXT: store i64 10, i64* [[TMP33]], align 8
12317 // CHECK17-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
12318 // CHECK17-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
12319 // CHECK17-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
12320 // CHECK17: omp_offload.failed6:
12321 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
12322 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT7]]
12323 // CHECK17: omp_offload.cont7:
12324 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
12325 // CHECK17-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
12326 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12327 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12328 // CHECK17-NEXT: store i32 [[TMP37]], i32* [[CONV]], align 4
12329 // CHECK17-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12330 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
12331 // CHECK17-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
12332 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 8
12333 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
12334 // CHECK17-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
12335 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 8
12336 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
12337 // CHECK17-NEXT: store i8* null, i8** [[TMP43]], align 8
12338 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
12339 // CHECK17-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
12340 // CHECK17-NEXT: store i64 [[TMP38]], i64* [[TMP45]], align 8
12341 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
12342 // CHECK17-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i64*
12343 // CHECK17-NEXT: store i64 [[TMP38]], i64* [[TMP47]], align 8
12344 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
12345 // CHECK17-NEXT: store i8* null, i8** [[TMP48]], align 8
12346 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
12347 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
12348 // CHECK17-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12349 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
12350 // CHECK17-NEXT: store i32 1, i32* [[TMP51]], align 4
12351 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
12352 // CHECK17-NEXT: store i32 2, i32* [[TMP52]], align 4
12353 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
12354 // CHECK17-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 8
12355 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
12356 // CHECK17-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 8
12357 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
12358 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 8
12359 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
12360 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 8
12361 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
12362 // CHECK17-NEXT: store i8** null, i8*** [[TMP57]], align 8
12363 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
12364 // CHECK17-NEXT: store i8** null, i8*** [[TMP58]], align 8
12365 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
12366 // CHECK17-NEXT: store i64 10, i64* [[TMP59]], align 8
12367 // CHECK17-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
12368 // CHECK17-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
12369 // CHECK17-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
12370 // CHECK17: omp_offload.failed13:
12371 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP38]]) #[[ATTR3]]
12372 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT14]]
12373 // CHECK17: omp_offload.cont14:
12374 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
12375 // CHECK17-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
12376 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 8
12377 // CHECK17-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
12378 // CHECK17-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
12379 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 8
12380 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
12381 // CHECK17-NEXT: store i8* null, i8** [[TMP66]], align 8
12382 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
12383 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
12384 // CHECK17-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12385 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
12386 // CHECK17-NEXT: store i32 1, i32* [[TMP69]], align 4
12387 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
12388 // CHECK17-NEXT: store i32 1, i32* [[TMP70]], align 4
12389 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
12390 // CHECK17-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 8
12391 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
12392 // CHECK17-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 8
12393 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
12394 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 8
12395 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
12396 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 8
12397 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
12398 // CHECK17-NEXT: store i8** null, i8*** [[TMP75]], align 8
12399 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
12400 // CHECK17-NEXT: store i8** null, i8*** [[TMP76]], align 8
12401 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
12402 // CHECK17-NEXT: store i64 10, i64* [[TMP77]], align 8
12403 // CHECK17-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
12404 // CHECK17-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
12405 // CHECK17-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
12406 // CHECK17: omp_offload.failed20:
12407 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
12408 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]]
12409 // CHECK17: omp_offload.cont21:
12410 // CHECK17-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
12411 // CHECK17-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
12412 // CHECK17-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
12413 // CHECK17-NEXT: [[CONV24:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED23]] to i32*
12414 // CHECK17-NEXT: store i32 [[TMP81]], i32* [[CONV24]], align 4
12415 // CHECK17-NEXT: [[TMP82:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED23]], align 8
12416 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
12417 // CHECK17-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
12418 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 8
12419 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
12420 // CHECK17-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
12421 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 8
12422 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 0
12423 // CHECK17-NEXT: store i8* null, i8** [[TMP87]], align 8
12424 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 1
12425 // CHECK17-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
12426 // CHECK17-NEXT: store i64 [[TMP82]], i64* [[TMP89]], align 8
12427 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 1
12428 // CHECK17-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i64*
12429 // CHECK17-NEXT: store i64 [[TMP82]], i64* [[TMP91]], align 8
12430 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 1
12431 // CHECK17-NEXT: store i8* null, i8** [[TMP92]], align 8
12432 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
12433 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
12434 // CHECK17-NEXT: [[KERNEL_ARGS29:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12435 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 0
12436 // CHECK17-NEXT: store i32 1, i32* [[TMP95]], align 4
12437 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 1
12438 // CHECK17-NEXT: store i32 2, i32* [[TMP96]], align 4
12439 // CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 2
12440 // CHECK17-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 8
12441 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 3
12442 // CHECK17-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 8
12443 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 4
12444 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 8
12445 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 5
12446 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 8
12447 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 6
12448 // CHECK17-NEXT: store i8** null, i8*** [[TMP101]], align 8
12449 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 7
12450 // CHECK17-NEXT: store i8** null, i8*** [[TMP102]], align 8
12451 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 8
12452 // CHECK17-NEXT: store i64 10, i64* [[TMP103]], align 8
12453 // CHECK17-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]])
12454 // CHECK17-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
12455 // CHECK17-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
12456 // CHECK17: omp_offload.failed30:
12457 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP82]]) #[[ATTR3]]
12458 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT31]]
12459 // CHECK17: omp_offload.cont31:
12460 // CHECK17-NEXT: ret i32 0
12461 //
12462 //
12463 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
12464 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12465 // CHECK17-NEXT: entry:
12466 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12467 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12468 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12469 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
12470 // CHECK17-NEXT: ret void
12471 //
12472 //
12473 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18
12474 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12475 // CHECK17-NEXT: entry:
12476 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12477 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12478 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12479 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12480 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12481 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12482 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12483 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12484 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12485 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12486 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12487 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12488 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12489 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12490 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12491 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12492 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12493 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12494 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12495 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12496 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12497 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12498 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12499 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12500 // CHECK17: cond.true:
12501 // CHECK17-NEXT: br label [[COND_END:%.*]]
12502 // CHECK17: cond.false:
12503 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12504 // CHECK17-NEXT: br label [[COND_END]]
12505 // CHECK17: cond.end:
12506 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12507 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12508 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12509 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12510 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12511 // CHECK17: omp.inner.for.cond:
12512 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
12513 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
12514 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12515 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12516 // CHECK17: omp.inner.for.body:
12517 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !46
12518 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12519 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !46
12520 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12521 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !46
12522 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12523 // CHECK17: omp.inner.for.inc:
12524 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
12525 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !46
12526 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12527 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !46
12528 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
12529 // CHECK17: omp.inner.for.end:
12530 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12531 // CHECK17: omp.loop.exit:
12532 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12533 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12534 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
12535 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12536 // CHECK17: .omp.final.then:
12537 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
12538 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12539 // CHECK17: .omp.final.done:
12540 // CHECK17-NEXT: ret void
12541 //
12542 //
12543 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..19
12544 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12545 // CHECK17-NEXT: entry:
12546 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12547 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12548 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12549 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12550 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12551 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12552 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12553 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12554 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12555 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12556 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12557 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12558 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12559 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12560 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12561 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12562 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12563 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12564 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12565 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12566 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12567 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12568 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12569 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12570 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12571 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12572 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12573 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12574 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12575 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
12576 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12577 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12578 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
12579 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12580 // CHECK17: cond.true:
12581 // CHECK17-NEXT: br label [[COND_END:%.*]]
12582 // CHECK17: cond.false:
12583 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12584 // CHECK17-NEXT: br label [[COND_END]]
12585 // CHECK17: cond.end:
12586 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
12587 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12588 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12589 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
12590 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12591 // CHECK17: omp.inner.for.cond:
12592 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
12593 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !49
12594 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
12595 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12596 // CHECK17: omp.inner.for.body:
12597 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
12598 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
12599 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12600 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !49
12601 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !49
12602 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
12603 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12604 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !49
12605 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12606 // CHECK17: omp.body.continue:
12607 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12608 // CHECK17: omp.inner.for.inc:
12609 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
12610 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
12611 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !49
12612 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
12613 // CHECK17: omp.inner.for.end:
12614 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12615 // CHECK17: omp.loop.exit:
12616 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
12617 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12618 // CHECK17-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
12619 // CHECK17-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12620 // CHECK17: .omp.final.then:
12621 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
12622 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12623 // CHECK17: .omp.final.done:
12624 // CHECK17-NEXT: ret void
12625 //
12626 //
12627 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
12628 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12629 // CHECK17-NEXT: entry:
12630 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12631 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12632 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12633 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
12634 // CHECK17-NEXT: ret void
12635 //
12636 //
12637 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22
12638 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12639 // CHECK17-NEXT: entry:
12640 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12641 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12642 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12643 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12644 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12645 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12646 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12647 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12648 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12649 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12650 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12651 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12652 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12653 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12654 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12655 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12656 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12657 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12658 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12659 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12660 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12661 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12662 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12663 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12664 // CHECK17: cond.true:
12665 // CHECK17-NEXT: br label [[COND_END:%.*]]
12666 // CHECK17: cond.false:
12667 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12668 // CHECK17-NEXT: br label [[COND_END]]
12669 // CHECK17: cond.end:
12670 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12671 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12672 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12673 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12674 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12675 // CHECK17: omp.inner.for.cond:
12676 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
12677 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
12678 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12679 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12680 // CHECK17: omp.inner.for.body:
12681 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !52
12682 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12683 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !52
12684 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12685 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !52
12686 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12687 // CHECK17: omp.inner.for.inc:
12688 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
12689 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !52
12690 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12691 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !52
12692 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
12693 // CHECK17: omp.inner.for.end:
12694 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12695 // CHECK17: omp.loop.exit:
12696 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12697 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12698 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
12699 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12700 // CHECK17: .omp.final.then:
12701 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
12702 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12703 // CHECK17: .omp.final.done:
12704 // CHECK17-NEXT: ret void
12705 //
12706 //
12707 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..23
12708 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12709 // CHECK17-NEXT: entry:
12710 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12711 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12712 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12713 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12714 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12715 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12716 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12717 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12718 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12719 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12720 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12721 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12722 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12723 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12724 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12725 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12726 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12727 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12728 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12729 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12730 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12731 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12732 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12733 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12734 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12735 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12736 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12737 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12738 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12739 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
12740 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12741 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12742 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
12743 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12744 // CHECK17: cond.true:
12745 // CHECK17-NEXT: br label [[COND_END:%.*]]
12746 // CHECK17: cond.false:
12747 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12748 // CHECK17-NEXT: br label [[COND_END]]
12749 // CHECK17: cond.end:
12750 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
12751 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12752 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12753 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
12754 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12755 // CHECK17: omp.inner.for.cond:
12756 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
12757 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !55
12758 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
12759 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12760 // CHECK17: omp.inner.for.body:
12761 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
12762 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
12763 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12764 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !55
12765 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !55
12766 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
12767 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12768 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !55
12769 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12770 // CHECK17: omp.body.continue:
12771 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12772 // CHECK17: omp.inner.for.inc:
12773 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
12774 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
12775 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !55
12776 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
12777 // CHECK17: omp.inner.for.end:
12778 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12779 // CHECK17: omp.loop.exit:
12780 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
12781 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12782 // CHECK17-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
12783 // CHECK17-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12784 // CHECK17: .omp.final.then:
12785 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
12786 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12787 // CHECK17: .omp.final.done:
12788 // CHECK17-NEXT: ret void
12789 //
12790 //
12791 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
12792 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12793 // CHECK17-NEXT: entry:
12794 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12795 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12796 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12797 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12798 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12799 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12800 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12801 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
12802 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12803 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
12804 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12805 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
12806 // CHECK17-NEXT: ret void
12807 //
12808 //
12809 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26
12810 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12811 // CHECK17-NEXT: entry:
12812 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12813 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12814 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12815 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12816 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12817 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12818 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12819 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12820 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12821 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12822 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12823 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12824 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12825 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12826 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12827 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12828 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12829 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12830 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12831 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12832 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12833 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12834 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12835 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12836 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12837 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12838 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12839 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12840 // CHECK17: cond.true:
12841 // CHECK17-NEXT: br label [[COND_END:%.*]]
12842 // CHECK17: cond.false:
12843 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12844 // CHECK17-NEXT: br label [[COND_END]]
12845 // CHECK17: cond.end:
12846 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12847 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12848 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12849 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12850 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12851 // CHECK17: omp.inner.for.cond:
12852 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
12853 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
12854 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12855 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12856 // CHECK17: omp.inner.for.body:
12857 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !58
12858 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12859 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !58
12860 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12861 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !58
12862 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12863 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !58
12864 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !58
12865 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !58
12866 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12867 // CHECK17: omp.inner.for.inc:
12868 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
12869 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !58
12870 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12871 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !58
12872 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
12873 // CHECK17: omp.inner.for.end:
12874 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12875 // CHECK17: omp.loop.exit:
12876 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12877 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12878 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
12879 // CHECK17-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12880 // CHECK17: .omp.final.then:
12881 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
12882 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12883 // CHECK17: .omp.final.done:
12884 // CHECK17-NEXT: ret void
12885 //
12886 //
12887 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..27
12888 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12889 // CHECK17-NEXT: entry:
12890 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12891 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12892 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12893 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12894 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12895 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12896 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12897 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12898 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12899 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12900 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12901 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12902 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12903 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12904 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12905 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12906 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12907 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12908 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12909 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12910 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12911 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12912 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12913 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12914 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12915 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12916 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
12917 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12918 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12919 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12920 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12921 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
12922 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12923 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
12924 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
12925 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12926 // CHECK17: omp.dispatch.cond:
12927 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12928 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12929 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
12930 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
12931 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12932 // CHECK17: cond.true:
12933 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12934 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
12935 // CHECK17-NEXT: br label [[COND_END:%.*]]
12936 // CHECK17: cond.false:
12937 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12938 // CHECK17-NEXT: br label [[COND_END]]
12939 // CHECK17: cond.end:
12940 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
12941 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12942 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12943 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
12944 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12945 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12946 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
12947 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12948 // CHECK17: omp.dispatch.body:
12949 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12950 // CHECK17: omp.inner.for.cond:
12951 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12952 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61
12953 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12954 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12955 // CHECK17: omp.inner.for.body:
12956 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12957 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
12958 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12959 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !61
12960 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !61
12961 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
12962 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12963 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !61
12964 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12965 // CHECK17: omp.body.continue:
12966 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12967 // CHECK17: omp.inner.for.inc:
12968 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12969 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
12970 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61
12971 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]]
12972 // CHECK17: omp.inner.for.end:
12973 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
12974 // CHECK17: omp.dispatch.inc:
12975 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12976 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12977 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12978 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
12979 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12980 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12981 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12982 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
12983 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
12984 // CHECK17: omp.dispatch.end:
12985 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
12986 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
12987 // CHECK17-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
12988 // CHECK17-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
12989 // CHECK17: .omp.final.then:
12990 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
12991 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
12992 // CHECK17: .omp.final.done:
12993 // CHECK17-NEXT: ret void
12994 //
12995 //
12996 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
12997 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12998 // CHECK17-NEXT: entry:
12999 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13000 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13001 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13002 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13003 // CHECK17-NEXT: ret void
13004 //
13005 //
13006 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30
13007 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13008 // CHECK17-NEXT: entry:
13009 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13010 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13011 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13012 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13013 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
13014 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13015 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13016 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13017 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13018 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
13019 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13020 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13021 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13022 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13023 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13024 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13025 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13026 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13027 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13028 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13029 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13030 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13031 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13032 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13033 // CHECK17: cond.true:
13034 // CHECK17-NEXT: br label [[COND_END:%.*]]
13035 // CHECK17: cond.false:
13036 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13037 // CHECK17-NEXT: br label [[COND_END]]
13038 // CHECK17: cond.end:
13039 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13040 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13041 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13042 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13043 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13044 // CHECK17: omp.inner.for.cond:
13045 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
13046 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
13047 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13048 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13049 // CHECK17: omp.inner.for.body:
13050 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !64
13051 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13052 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !64
13053 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13054 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]), !llvm.access.group !64
13055 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13056 // CHECK17: omp.inner.for.inc:
13057 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
13058 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !64
13059 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
13060 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !64
13061 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP65:![0-9]+]]
13062 // CHECK17: omp.inner.for.end:
13063 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13064 // CHECK17: omp.loop.exit:
13065 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13066 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13067 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13068 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13069 // CHECK17: .omp.final.then:
13070 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
13071 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
13072 // CHECK17: .omp.final.done:
13073 // CHECK17-NEXT: ret void
13074 //
13075 //
13076 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..31
13077 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13078 // CHECK17-NEXT: entry:
13079 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13080 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13081 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13082 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13083 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13084 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13085 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
13086 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13087 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13088 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13089 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13090 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
13091 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13092 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13093 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13094 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13095 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13096 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13097 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13098 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13099 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13100 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
13101 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13102 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
13103 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
13104 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
13105 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13106 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13107 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13108 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13109 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13110 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
13111 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
13112 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13113 // CHECK17: omp.dispatch.cond:
13114 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13115 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
13116 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13117 // CHECK17: omp.dispatch.body:
13118 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13119 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
13120 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13121 // CHECK17: omp.inner.for.cond:
13122 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13123 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !67
13124 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
13125 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13126 // CHECK17: omp.inner.for.body:
13127 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13128 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
13129 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13130 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !67
13131 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !67
13132 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
13133 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
13134 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !67
13135 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13136 // CHECK17: omp.body.continue:
13137 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13138 // CHECK17: omp.inner.for.inc:
13139 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13140 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
13141 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !67
13142 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP68:![0-9]+]]
13143 // CHECK17: omp.inner.for.end:
13144 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13145 // CHECK17: omp.dispatch.inc:
13146 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
13147 // CHECK17: omp.dispatch.end:
13148 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13149 // CHECK17-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
13150 // CHECK17-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13151 // CHECK17: .omp.final.then:
13152 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
13153 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
13154 // CHECK17: .omp.final.done:
13155 // CHECK17-NEXT: ret void
13156 //
13157 //
13158 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
13159 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13160 // CHECK17-NEXT: entry:
13161 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13162 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13163 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13164 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13165 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13166 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13167 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
13168 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
13169 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
13170 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
13171 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
13172 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
13173 // CHECK17-NEXT: ret void
13174 //
13175 //
13176 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..34
13177 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13178 // CHECK17-NEXT: entry:
13179 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13180 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13181 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13182 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13183 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13184 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
13185 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13186 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13187 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13188 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13189 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
13190 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
13191 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13192 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13193 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13194 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13195 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13196 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
13197 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13198 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13199 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13200 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13201 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13202 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13203 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13204 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13205 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13206 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13207 // CHECK17: cond.true:
13208 // CHECK17-NEXT: br label [[COND_END:%.*]]
13209 // CHECK17: cond.false:
13210 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13211 // CHECK17-NEXT: br label [[COND_END]]
13212 // CHECK17: cond.end:
13213 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13214 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13215 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13216 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13217 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13218 // CHECK17: omp.inner.for.cond:
13219 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
13220 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
13221 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13222 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13223 // CHECK17: omp.inner.for.body:
13224 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !70
13225 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
13226 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !70
13227 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
13228 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !70
13229 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
13230 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4, !llvm.access.group !70
13231 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group !70
13232 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]), !llvm.access.group !70
13233 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13234 // CHECK17: omp.inner.for.inc:
13235 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
13236 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !70
13237 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
13238 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !70
13239 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP71:![0-9]+]]
13240 // CHECK17: omp.inner.for.end:
13241 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13242 // CHECK17: omp.loop.exit:
13243 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13244 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13245 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13246 // CHECK17-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13247 // CHECK17: .omp.final.then:
13248 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
13249 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
13250 // CHECK17: .omp.final.done:
13251 // CHECK17-NEXT: ret void
13252 //
13253 //
13254 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..35
13255 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13256 // CHECK17-NEXT: entry:
13257 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
13258 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
13259 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
13260 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
13261 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
13262 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
13263 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13264 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
13265 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13266 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13267 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13268 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13269 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
13270 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
13271 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
13272 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13273 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13274 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
13275 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
13276 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
13277 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
13278 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13279 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13280 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
13281 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
13282 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
13283 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
13284 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
13285 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
13286 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13287 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13288 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
13289 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13290 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13291 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
13292 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
13293 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
13294 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13295 // CHECK17: omp.dispatch.cond:
13296 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13297 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
13298 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13299 // CHECK17: omp.dispatch.body:
13300 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13301 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
13302 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13303 // CHECK17: omp.inner.for.cond:
13304 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
13305 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !73
13306 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
13307 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13308 // CHECK17: omp.inner.for.body:
13309 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
13310 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
13311 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13312 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !73
13313 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !73
13314 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
13315 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
13316 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !73
13317 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13318 // CHECK17: omp.body.continue:
13319 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13320 // CHECK17: omp.inner.for.inc:
13321 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
13322 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
13323 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !73
13324 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP74:![0-9]+]]
13325 // CHECK17: omp.inner.for.end:
13326 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13327 // CHECK17: omp.dispatch.inc:
13328 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
13329 // CHECK17: omp.dispatch.end:
13330 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13331 // CHECK17-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
13332 // CHECK17-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13333 // CHECK17: .omp.final.then:
13334 // CHECK17-NEXT: store i32 10, i32* [[I]], align 4
13335 // CHECK17-NEXT: br label [[DOTOMP_FINAL_DONE]]
13336 // CHECK17: .omp.final.done:
13337 // CHECK17-NEXT: ret void
13338 //
13339 //
13340 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
13341 // CHECK17-SAME: () #[[ATTR6:[0-9]+]] {
13342 // CHECK17-NEXT: entry:
13343 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
13344 // CHECK17-NEXT: ret void
13345 //
13346 //
13347 // CHECK19-LABEL: define {{[^@]+}}@main
13348 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
13349 // CHECK19-NEXT: entry:
13350 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
13351 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
13352 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
13353 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4
13354 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
13355 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
13356 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
13357 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13358 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
13359 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
13360 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
13361 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
13362 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13363 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13364 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13365 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
13366 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
13367 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
13368 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
13369 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
13370 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
13371 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
13372 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
13373 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
13374 // CHECK19-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4
13375 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13376 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x i8*], align 4
13377 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x i8*], align 4
13378 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x i8*], align 4
13379 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
13380 // CHECK19-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
13381 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
13382 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
13383 // CHECK19-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4
13384 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x i8*], align 4
13385 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x i8*], align 4
13386 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x i8*], align 4
13387 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4
13388 // CHECK19-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
13389 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
13390 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
13391 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
13392 // CHECK19-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4
13393 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4
13394 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x i8*], align 4
13395 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x i8*], align 4
13396 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x i8*], align 4
13397 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4
13398 // CHECK19-NEXT: [[_TMP56:%.*]] = alloca i32, align 4
13399 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
13400 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
13401 // CHECK19-NEXT: store i32 0, i32* [[RETVAL]], align 4
13402 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
13403 // CHECK19-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
13404 // CHECK19-NEXT: store i32 100, i32* [[N]], align 4
13405 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
13406 // CHECK19-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
13407 // CHECK19-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
13408 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
13409 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
13410 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
13411 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
13412 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13413 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13414 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
13415 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
13416 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
13417 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
13418 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13419 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
13420 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
13421 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13422 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
13423 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
13424 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13425 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4
13426 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
13427 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
13428 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
13429 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
13430 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
13431 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
13432 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
13433 // CHECK19-NEXT: store i8* null, i8** [[TMP16]], align 4
13434 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
13435 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
13436 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
13437 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
13438 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
13439 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
13440 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
13441 // CHECK19-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
13442 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
13443 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4
13444 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13445 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13446 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
13447 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
13448 // CHECK19-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
13449 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13450 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
13451 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13452 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13453 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13454 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13455 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
13456 // CHECK19-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
13457 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
13458 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
13459 // CHECK19-NEXT: store i32 1, i32* [[TMP30]], align 4
13460 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
13461 // CHECK19-NEXT: store i32 3, i32* [[TMP31]], align 4
13462 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
13463 // CHECK19-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
13464 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
13465 // CHECK19-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
13466 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
13467 // CHECK19-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
13468 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
13469 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
13470 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
13471 // CHECK19-NEXT: store i8** null, i8*** [[TMP36]], align 4
13472 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
13473 // CHECK19-NEXT: store i8** null, i8*** [[TMP37]], align 4
13474 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
13475 // CHECK19-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
13476 // CHECK19-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
13477 // CHECK19-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
13478 // CHECK19-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13479 // CHECK19: omp_offload.failed:
13480 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
13481 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
13482 // CHECK19: omp_offload.cont:
13483 // CHECK19-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
13484 // CHECK19-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
13485 // CHECK19-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
13486 // CHECK19-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
13487 // CHECK19-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
13488 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
13489 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false)
13490 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
13491 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
13492 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
13493 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
13494 // CHECK19-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
13495 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
13496 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
13497 // CHECK19-NEXT: store i8* null, i8** [[TMP50]], align 4
13498 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
13499 // CHECK19-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
13500 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
13501 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
13502 // CHECK19-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
13503 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
13504 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
13505 // CHECK19-NEXT: store i8* null, i8** [[TMP55]], align 4
13506 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
13507 // CHECK19-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
13508 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
13509 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
13510 // CHECK19-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
13511 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
13512 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
13513 // CHECK19-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
13514 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
13515 // CHECK19-NEXT: store i8* null, i8** [[TMP61]], align 4
13516 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
13517 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
13518 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
13519 // CHECK19-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
13520 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
13521 // CHECK19-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
13522 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
13523 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
13524 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
13525 // CHECK19-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
13526 // CHECK19-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
13527 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
13528 // CHECK19-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
13529 // CHECK19-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13530 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
13531 // CHECK19-NEXT: store i32 1, i32* [[TMP69]], align 4
13532 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
13533 // CHECK19-NEXT: store i32 3, i32* [[TMP70]], align 4
13534 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
13535 // CHECK19-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
13536 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
13537 // CHECK19-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
13538 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
13539 // CHECK19-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
13540 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
13541 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP74]], align 4
13542 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
13543 // CHECK19-NEXT: store i8** null, i8*** [[TMP75]], align 4
13544 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
13545 // CHECK19-NEXT: store i8** null, i8*** [[TMP76]], align 4
13546 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
13547 // CHECK19-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
13548 // CHECK19-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
13549 // CHECK19-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
13550 // CHECK19-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
13551 // CHECK19: omp_offload.failed16:
13552 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
13553 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]]
13554 // CHECK19: omp_offload.cont17:
13555 // CHECK19-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
13556 // CHECK19-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_18]], align 4
13557 // CHECK19-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
13558 // CHECK19-NEXT: store i32 [[TMP81]], i32* [[N_CASTED19]], align 4
13559 // CHECK19-NEXT: [[TMP82:%.*]] = load i32, i32* [[N_CASTED19]], align 4
13560 // CHECK19-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
13561 // CHECK19-NEXT: store i32 [[TMP83]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13562 // CHECK19-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13563 // CHECK19-NEXT: [[TMP85:%.*]] = mul nuw i32 [[TMP0]], 4
13564 // CHECK19-NEXT: [[TMP86:%.*]] = sext i32 [[TMP85]] to i64
13565 // CHECK19-NEXT: [[TMP87:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES23]] to i8*
13566 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP87]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false)
13567 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
13568 // CHECK19-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
13569 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
13570 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
13571 // CHECK19-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
13572 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
13573 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
13574 // CHECK19-NEXT: store i8* null, i8** [[TMP92]], align 4
13575 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
13576 // CHECK19-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32*
13577 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP94]], align 4
13578 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
13579 // CHECK19-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32*
13580 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP96]], align 4
13581 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
13582 // CHECK19-NEXT: store i8* null, i8** [[TMP97]], align 4
13583 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
13584 // CHECK19-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
13585 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 4
13586 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
13587 // CHECK19-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
13588 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 4
13589 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
13590 // CHECK19-NEXT: store i64 [[TMP86]], i64* [[TMP102]], align 4
13591 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
13592 // CHECK19-NEXT: store i8* null, i8** [[TMP103]], align 4
13593 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
13594 // CHECK19-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32*
13595 // CHECK19-NEXT: store i32 [[TMP84]], i32* [[TMP105]], align 4
13596 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
13597 // CHECK19-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32*
13598 // CHECK19-NEXT: store i32 [[TMP84]], i32* [[TMP107]], align 4
13599 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
13600 // CHECK19-NEXT: store i8* null, i8** [[TMP108]], align 4
13601 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
13602 // CHECK19-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
13603 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
13604 // CHECK19-NEXT: [[TMP112:%.*]] = load i32, i32* [[N]], align 4
13605 // CHECK19-NEXT: store i32 [[TMP112]], i32* [[DOTCAPTURE_EXPR_25]], align 4
13606 // CHECK19-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
13607 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP113]], 0
13608 // CHECK19-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
13609 // CHECK19-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
13610 // CHECK19-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
13611 // CHECK19-NEXT: [[TMP114:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
13612 // CHECK19-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP114]], 1
13613 // CHECK19-NEXT: [[TMP115:%.*]] = zext i32 [[ADD30]] to i64
13614 // CHECK19-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13615 // CHECK19-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
13616 // CHECK19-NEXT: store i32 1, i32* [[TMP116]], align 4
13617 // CHECK19-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
13618 // CHECK19-NEXT: store i32 4, i32* [[TMP117]], align 4
13619 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
13620 // CHECK19-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
13621 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
13622 // CHECK19-NEXT: store i8** [[TMP110]], i8*** [[TMP119]], align 4
13623 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
13624 // CHECK19-NEXT: store i64* [[TMP111]], i64** [[TMP120]], align 4
13625 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
13626 // CHECK19-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP121]], align 4
13627 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
13628 // CHECK19-NEXT: store i8** null, i8*** [[TMP122]], align 4
13629 // CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
13630 // CHECK19-NEXT: store i8** null, i8*** [[TMP123]], align 4
13631 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
13632 // CHECK19-NEXT: store i64 [[TMP115]], i64* [[TMP124]], align 8
13633 // CHECK19-NEXT: [[TMP125:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
13634 // CHECK19-NEXT: [[TMP126:%.*]] = icmp ne i32 [[TMP125]], 0
13635 // CHECK19-NEXT: br i1 [[TMP126]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
13636 // CHECK19: omp_offload.failed32:
13637 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP82]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP84]]) #[[ATTR3]]
13638 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT33]]
13639 // CHECK19: omp_offload.cont33:
13640 // CHECK19-NEXT: [[TMP127:%.*]] = load i32, i32* [[N]], align 4
13641 // CHECK19-NEXT: store i32 [[TMP127]], i32* [[N_CASTED34]], align 4
13642 // CHECK19-NEXT: [[TMP128:%.*]] = load i32, i32* [[N_CASTED34]], align 4
13643 // CHECK19-NEXT: [[TMP129:%.*]] = mul nuw i32 [[TMP0]], 4
13644 // CHECK19-NEXT: [[TMP130:%.*]] = sext i32 [[TMP129]] to i64
13645 // CHECK19-NEXT: [[TMP131:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES38]] to i8*
13646 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP131]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false)
13647 // CHECK19-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
13648 // CHECK19-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32*
13649 // CHECK19-NEXT: store i32 [[TMP128]], i32* [[TMP133]], align 4
13650 // CHECK19-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
13651 // CHECK19-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
13652 // CHECK19-NEXT: store i32 [[TMP128]], i32* [[TMP135]], align 4
13653 // CHECK19-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0
13654 // CHECK19-NEXT: store i8* null, i8** [[TMP136]], align 4
13655 // CHECK19-NEXT: [[TMP137:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
13656 // CHECK19-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i32*
13657 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP138]], align 4
13658 // CHECK19-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
13659 // CHECK19-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32*
13660 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP140]], align 4
13661 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1
13662 // CHECK19-NEXT: store i8* null, i8** [[TMP141]], align 4
13663 // CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
13664 // CHECK19-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32**
13665 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP143]], align 4
13666 // CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
13667 // CHECK19-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32**
13668 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP145]], align 4
13669 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
13670 // CHECK19-NEXT: store i64 [[TMP130]], i64* [[TMP146]], align 4
13671 // CHECK19-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2
13672 // CHECK19-NEXT: store i8* null, i8** [[TMP147]], align 4
13673 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
13674 // CHECK19-NEXT: [[TMP149:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
13675 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
13676 // CHECK19-NEXT: [[TMP151:%.*]] = load i32, i32* [[N]], align 4
13677 // CHECK19-NEXT: store i32 [[TMP151]], i32* [[DOTCAPTURE_EXPR_40]], align 4
13678 // CHECK19-NEXT: [[TMP152:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
13679 // CHECK19-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP152]], 0
13680 // CHECK19-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
13681 // CHECK19-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
13682 // CHECK19-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
13683 // CHECK19-NEXT: [[TMP153:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
13684 // CHECK19-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP153]], 1
13685 // CHECK19-NEXT: [[TMP154:%.*]] = zext i32 [[ADD45]] to i64
13686 // CHECK19-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13687 // CHECK19-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 0
13688 // CHECK19-NEXT: store i32 1, i32* [[TMP155]], align 4
13689 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 1
13690 // CHECK19-NEXT: store i32 3, i32* [[TMP156]], align 4
13691 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 2
13692 // CHECK19-NEXT: store i8** [[TMP148]], i8*** [[TMP157]], align 4
13693 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 3
13694 // CHECK19-NEXT: store i8** [[TMP149]], i8*** [[TMP158]], align 4
13695 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 4
13696 // CHECK19-NEXT: store i64* [[TMP150]], i64** [[TMP159]], align 4
13697 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 5
13698 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP160]], align 4
13699 // CHECK19-NEXT: [[TMP161:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 6
13700 // CHECK19-NEXT: store i8** null, i8*** [[TMP161]], align 4
13701 // CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 7
13702 // CHECK19-NEXT: store i8** null, i8*** [[TMP162]], align 4
13703 // CHECK19-NEXT: [[TMP163:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 8
13704 // CHECK19-NEXT: store i64 [[TMP154]], i64* [[TMP163]], align 8
13705 // CHECK19-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]])
13706 // CHECK19-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0
13707 // CHECK19-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
13708 // CHECK19: omp_offload.failed47:
13709 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP128]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
13710 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT48]]
13711 // CHECK19: omp_offload.cont48:
13712 // CHECK19-NEXT: [[TMP166:%.*]] = load i32, i32* [[M]], align 4
13713 // CHECK19-NEXT: store i32 [[TMP166]], i32* [[DOTCAPTURE_EXPR_49]], align 4
13714 // CHECK19-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
13715 // CHECK19-NEXT: store i32 [[TMP167]], i32* [[N_CASTED50]], align 4
13716 // CHECK19-NEXT: [[TMP168:%.*]] = load i32, i32* [[N_CASTED50]], align 4
13717 // CHECK19-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4
13718 // CHECK19-NEXT: store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
13719 // CHECK19-NEXT: [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
13720 // CHECK19-NEXT: [[TMP171:%.*]] = mul nuw i32 [[TMP0]], 4
13721 // CHECK19-NEXT: [[TMP172:%.*]] = sext i32 [[TMP171]] to i64
13722 // CHECK19-NEXT: [[TMP173:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES55]] to i8*
13723 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP173]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false)
13724 // CHECK19-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
13725 // CHECK19-NEXT: [[TMP175:%.*]] = bitcast i8** [[TMP174]] to i32*
13726 // CHECK19-NEXT: store i32 [[TMP168]], i32* [[TMP175]], align 4
13727 // CHECK19-NEXT: [[TMP176:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
13728 // CHECK19-NEXT: [[TMP177:%.*]] = bitcast i8** [[TMP176]] to i32*
13729 // CHECK19-NEXT: store i32 [[TMP168]], i32* [[TMP177]], align 4
13730 // CHECK19-NEXT: [[TMP178:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0
13731 // CHECK19-NEXT: store i8* null, i8** [[TMP178]], align 4
13732 // CHECK19-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
13733 // CHECK19-NEXT: [[TMP180:%.*]] = bitcast i8** [[TMP179]] to i32*
13734 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP180]], align 4
13735 // CHECK19-NEXT: [[TMP181:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
13736 // CHECK19-NEXT: [[TMP182:%.*]] = bitcast i8** [[TMP181]] to i32*
13737 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP182]], align 4
13738 // CHECK19-NEXT: [[TMP183:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1
13739 // CHECK19-NEXT: store i8* null, i8** [[TMP183]], align 4
13740 // CHECK19-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
13741 // CHECK19-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32**
13742 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP185]], align 4
13743 // CHECK19-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
13744 // CHECK19-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32**
13745 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP187]], align 4
13746 // CHECK19-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
13747 // CHECK19-NEXT: store i64 [[TMP172]], i64* [[TMP188]], align 4
13748 // CHECK19-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2
13749 // CHECK19-NEXT: store i8* null, i8** [[TMP189]], align 4
13750 // CHECK19-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
13751 // CHECK19-NEXT: [[TMP191:%.*]] = bitcast i8** [[TMP190]] to i32*
13752 // CHECK19-NEXT: store i32 [[TMP170]], i32* [[TMP191]], align 4
13753 // CHECK19-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
13754 // CHECK19-NEXT: [[TMP193:%.*]] = bitcast i8** [[TMP192]] to i32*
13755 // CHECK19-NEXT: store i32 [[TMP170]], i32* [[TMP193]], align 4
13756 // CHECK19-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3
13757 // CHECK19-NEXT: store i8* null, i8** [[TMP194]], align 4
13758 // CHECK19-NEXT: [[TMP195:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
13759 // CHECK19-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
13760 // CHECK19-NEXT: [[TMP197:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
13761 // CHECK19-NEXT: [[TMP198:%.*]] = load i32, i32* [[N]], align 4
13762 // CHECK19-NEXT: store i32 [[TMP198]], i32* [[DOTCAPTURE_EXPR_57]], align 4
13763 // CHECK19-NEXT: [[TMP199:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_57]], align 4
13764 // CHECK19-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP199]], 0
13765 // CHECK19-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
13766 // CHECK19-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
13767 // CHECK19-NEXT: store i32 [[SUB61]], i32* [[DOTCAPTURE_EXPR_58]], align 4
13768 // CHECK19-NEXT: [[TMP200:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
13769 // CHECK19-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP200]], 1
13770 // CHECK19-NEXT: [[TMP201:%.*]] = zext i32 [[ADD62]] to i64
13771 // CHECK19-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13772 // CHECK19-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 0
13773 // CHECK19-NEXT: store i32 1, i32* [[TMP202]], align 4
13774 // CHECK19-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 1
13775 // CHECK19-NEXT: store i32 4, i32* [[TMP203]], align 4
13776 // CHECK19-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 2
13777 // CHECK19-NEXT: store i8** [[TMP195]], i8*** [[TMP204]], align 4
13778 // CHECK19-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 3
13779 // CHECK19-NEXT: store i8** [[TMP196]], i8*** [[TMP205]], align 4
13780 // CHECK19-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 4
13781 // CHECK19-NEXT: store i64* [[TMP197]], i64** [[TMP206]], align 4
13782 // CHECK19-NEXT: [[TMP207:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 5
13783 // CHECK19-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP207]], align 4
13784 // CHECK19-NEXT: [[TMP208:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 6
13785 // CHECK19-NEXT: store i8** null, i8*** [[TMP208]], align 4
13786 // CHECK19-NEXT: [[TMP209:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 7
13787 // CHECK19-NEXT: store i8** null, i8*** [[TMP209]], align 4
13788 // CHECK19-NEXT: [[TMP210:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 8
13789 // CHECK19-NEXT: store i64 [[TMP201]], i64* [[TMP210]], align 8
13790 // CHECK19-NEXT: [[TMP211:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]])
13791 // CHECK19-NEXT: [[TMP212:%.*]] = icmp ne i32 [[TMP211]], 0
13792 // CHECK19-NEXT: br i1 [[TMP212]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
13793 // CHECK19: omp_offload.failed64:
13794 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP168]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP170]]) #[[ATTR3]]
13795 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT65]]
13796 // CHECK19: omp_offload.cont65:
13797 // CHECK19-NEXT: [[TMP213:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
13798 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP213]])
13799 // CHECK19-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
13800 // CHECK19-NEXT: [[TMP214:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
13801 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP214]])
13802 // CHECK19-NEXT: [[TMP215:%.*]] = load i32, i32* [[RETVAL]], align 4
13803 // CHECK19-NEXT: ret i32 [[TMP215]]
13804 //
13805 //
13806 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
13807 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
13808 // CHECK19-NEXT: entry:
13809 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13810 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13811 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13812 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13813 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13814 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13815 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13816 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13817 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13818 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13819 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13820 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13821 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
13822 // CHECK19-NEXT: ret void
13823 //
13824 //
13825 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
13826 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13827 // CHECK19-NEXT: entry:
13828 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13829 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13830 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13831 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13832 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13833 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13834 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13835 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13836 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13837 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13838 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13839 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13840 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13841 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13842 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
13843 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13844 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13845 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13846 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13847 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13848 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13849 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13850 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13851 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13852 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13853 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13854 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13855 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13856 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13857 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13858 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13859 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13860 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13861 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13862 // CHECK19: omp.precond.then:
13863 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13864 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13865 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13866 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13867 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13868 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13869 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
13870 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13871 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13872 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13873 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13874 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13875 // CHECK19: cond.true:
13876 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13877 // CHECK19-NEXT: br label [[COND_END:%.*]]
13878 // CHECK19: cond.false:
13879 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13880 // CHECK19-NEXT: br label [[COND_END]]
13881 // CHECK19: cond.end:
13882 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13883 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13884 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13885 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
13886 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13887 // CHECK19: omp.inner.for.cond:
13888 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
13889 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
13890 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13891 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13892 // CHECK19: omp.inner.for.body:
13893 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
13894 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
13895 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !14
13896 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !14
13897 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !14
13898 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !14
13899 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13900 // CHECK19: omp.inner.for.inc:
13901 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
13902 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
13903 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
13904 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
13905 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
13906 // CHECK19: omp.inner.for.end:
13907 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13908 // CHECK19: omp.loop.exit:
13909 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13910 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13911 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13912 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
13913 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
13914 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
13915 // CHECK19: .omp.final.then:
13916 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13917 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
13918 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
13919 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
13920 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
13921 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
13922 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
13923 // CHECK19: .omp.final.done:
13924 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13925 // CHECK19: omp.precond.end:
13926 // CHECK19-NEXT: ret void
13927 //
13928 //
13929 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
13930 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13931 // CHECK19-NEXT: entry:
13932 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13933 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13934 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13935 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13936 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13937 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13938 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13939 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13940 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13941 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13942 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13943 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13944 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13945 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13946 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13947 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13948 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
13949 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13950 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13951 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13952 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13953 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13954 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13955 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13956 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13957 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13958 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13959 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13960 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13961 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13962 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13963 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13964 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13965 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13966 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13967 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13968 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13969 // CHECK19: omp.precond.then:
13970 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13971 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13972 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13973 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13974 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13975 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13976 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13977 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13978 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13979 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13980 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
13981 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13982 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13983 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13984 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13985 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13986 // CHECK19: cond.true:
13987 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13988 // CHECK19-NEXT: br label [[COND_END:%.*]]
13989 // CHECK19: cond.false:
13990 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13991 // CHECK19-NEXT: br label [[COND_END]]
13992 // CHECK19: cond.end:
13993 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13994 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13995 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13996 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
13997 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13998 // CHECK19: omp.inner.for.cond:
13999 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14000 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
14001 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
14002 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14003 // CHECK19: omp.inner.for.body:
14004 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14005 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
14006 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14007 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !18
14008 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !18
14009 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
14010 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
14011 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14012 // CHECK19: omp.body.continue:
14013 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14014 // CHECK19: omp.inner.for.inc:
14015 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14016 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
14017 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14018 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
14019 // CHECK19: omp.inner.for.end:
14020 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14021 // CHECK19: omp.loop.exit:
14022 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14023 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
14024 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
14025 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14026 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
14027 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14028 // CHECK19: .omp.final.then:
14029 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14030 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
14031 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
14032 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
14033 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
14034 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
14035 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14036 // CHECK19: .omp.final.done:
14037 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14038 // CHECK19: omp.precond.end:
14039 // CHECK19-NEXT: ret void
14040 //
14041 //
14042 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
14043 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14044 // CHECK19-NEXT: entry:
14045 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14046 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14047 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14048 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14049 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14050 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14051 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14052 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14053 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14054 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14055 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
14056 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
14057 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
14058 // CHECK19-NEXT: ret void
14059 //
14060 //
14061 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
14062 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14063 // CHECK19-NEXT: entry:
14064 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14065 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14066 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14067 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14068 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14069 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14070 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14071 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14072 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14073 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14074 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14075 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14076 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14077 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14078 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
14079 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14080 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14081 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14082 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14083 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14084 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14085 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14086 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14087 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14088 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
14089 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14090 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14091 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14092 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14093 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14094 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14095 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14096 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14097 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14098 // CHECK19: omp.precond.then:
14099 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14100 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14101 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
14102 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14103 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14104 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14105 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14106 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14107 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14108 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14109 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
14110 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14111 // CHECK19: cond.true:
14112 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14113 // CHECK19-NEXT: br label [[COND_END:%.*]]
14114 // CHECK19: cond.false:
14115 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14116 // CHECK19-NEXT: br label [[COND_END]]
14117 // CHECK19: cond.end:
14118 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
14119 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14120 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14121 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
14122 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14123 // CHECK19: omp.inner.for.cond:
14124 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14125 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
14126 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14127 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14128 // CHECK19: omp.inner.for.body:
14129 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !23
14130 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !23
14131 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !23
14132 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !23
14133 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !23
14134 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !23
14135 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14136 // CHECK19: omp.inner.for.inc:
14137 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14138 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !23
14139 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
14140 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
14141 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
14142 // CHECK19: omp.inner.for.end:
14143 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14144 // CHECK19: omp.loop.exit:
14145 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14146 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
14147 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
14148 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14149 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
14150 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14151 // CHECK19: .omp.final.then:
14152 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14153 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
14154 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
14155 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
14156 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
14157 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
14158 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14159 // CHECK19: .omp.final.done:
14160 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14161 // CHECK19: omp.precond.end:
14162 // CHECK19-NEXT: ret void
14163 //
14164 //
14165 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
14166 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14167 // CHECK19-NEXT: entry:
14168 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14169 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14170 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14171 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14172 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14173 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14174 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14175 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14176 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14177 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14178 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14179 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14180 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14181 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14182 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14183 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14184 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
14185 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14186 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14187 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14188 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14189 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14190 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14191 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14192 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14193 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14194 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14195 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
14196 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14197 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14198 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14199 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14200 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14201 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14202 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14203 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14204 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14205 // CHECK19: omp.precond.then:
14206 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14207 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14208 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
14209 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14210 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14211 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
14212 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
14213 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14214 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14215 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14216 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
14217 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14218 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14219 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14220 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
14221 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14222 // CHECK19: cond.true:
14223 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14224 // CHECK19-NEXT: br label [[COND_END:%.*]]
14225 // CHECK19: cond.false:
14226 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14227 // CHECK19-NEXT: br label [[COND_END]]
14228 // CHECK19: cond.end:
14229 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
14230 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14231 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14232 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
14233 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14234 // CHECK19: omp.inner.for.cond:
14235 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
14236 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26
14237 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
14238 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14239 // CHECK19: omp.inner.for.body:
14240 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
14241 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
14242 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14243 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !26
14244 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !26
14245 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
14246 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !26
14247 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14248 // CHECK19: omp.body.continue:
14249 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14250 // CHECK19: omp.inner.for.inc:
14251 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
14252 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
14253 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26
14254 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
14255 // CHECK19: omp.inner.for.end:
14256 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14257 // CHECK19: omp.loop.exit:
14258 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14259 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
14260 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
14261 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14262 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
14263 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14264 // CHECK19: .omp.final.then:
14265 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14266 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
14267 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
14268 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
14269 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
14270 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I3]], align 4
14271 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14272 // CHECK19: .omp.final.done:
14273 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14274 // CHECK19: omp.precond.end:
14275 // CHECK19-NEXT: ret void
14276 //
14277 //
14278 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
14279 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14280 // CHECK19-NEXT: entry:
14281 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14282 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14283 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14284 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14285 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14286 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14287 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14288 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14289 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14290 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14291 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14292 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14293 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14294 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
14295 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
14296 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14297 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14298 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14299 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
14300 // CHECK19-NEXT: ret void
14301 //
14302 //
14303 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
14304 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14305 // CHECK19-NEXT: entry:
14306 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14307 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14308 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14309 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14310 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14311 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14312 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14313 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14314 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14315 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
14316 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14317 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14318 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14319 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14320 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14321 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
14322 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14323 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14324 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14325 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14326 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14327 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14328 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14329 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14330 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14331 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14332 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14333 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14334 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14335 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14336 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14337 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
14338 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
14339 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14340 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14341 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14342 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14343 // CHECK19: omp.precond.then:
14344 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14345 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14346 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
14347 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14348 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14349 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14350 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14351 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
14352 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
14353 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14354 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14355 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
14356 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14357 // CHECK19: cond.true:
14358 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14359 // CHECK19-NEXT: br label [[COND_END:%.*]]
14360 // CHECK19: cond.false:
14361 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14362 // CHECK19-NEXT: br label [[COND_END]]
14363 // CHECK19: cond.end:
14364 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
14365 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14366 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14367 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
14368 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14369 // CHECK19: omp.inner.for.cond:
14370 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
14371 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
14372 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
14373 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
14374 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14375 // CHECK19: omp.inner.for.body:
14376 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
14377 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
14378 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !29
14379 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4, !llvm.access.group !29
14380 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !29
14381 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !29
14382 // CHECK19-NEXT: store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
14383 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !29
14384 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]]), !llvm.access.group !29
14385 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14386 // CHECK19: omp.inner.for.inc:
14387 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
14388 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
14389 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
14390 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
14391 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
14392 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
14393 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
14394 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
14395 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
14396 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !29
14397 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
14398 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
14399 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
14400 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
14401 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
14402 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
14403 // CHECK19: cond.true11:
14404 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !29
14405 // CHECK19-NEXT: br label [[COND_END13:%.*]]
14406 // CHECK19: cond.false12:
14407 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
14408 // CHECK19-NEXT: br label [[COND_END13]]
14409 // CHECK19: cond.end13:
14410 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
14411 // CHECK19-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !29
14412 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !29
14413 // CHECK19-NEXT: store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !29
14414 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
14415 // CHECK19: omp.inner.for.end:
14416 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14417 // CHECK19: omp.loop.exit:
14418 // CHECK19-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14419 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
14420 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
14421 // CHECK19-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14422 // CHECK19-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
14423 // CHECK19-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14424 // CHECK19: .omp.final.then:
14425 // CHECK19-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14426 // CHECK19-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP37]], 0
14427 // CHECK19-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
14428 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV16]], 1
14429 // CHECK19-NEXT: [[ADD17:%.*]] = add nsw i32 0, [[MUL]]
14430 // CHECK19-NEXT: store i32 [[ADD17]], i32* [[I4]], align 4
14431 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14432 // CHECK19: .omp.final.done:
14433 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14434 // CHECK19: omp.precond.end:
14435 // CHECK19-NEXT: ret void
14436 //
14437 //
14438 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7
14439 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14440 // CHECK19-NEXT: entry:
14441 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14442 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14443 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14444 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14445 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14446 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14447 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14448 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14449 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14450 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14451 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14452 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
14453 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14454 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14455 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14456 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14457 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14458 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
14459 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14460 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14461 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14462 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14463 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14464 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14465 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14466 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14467 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14468 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14469 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14470 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14471 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14472 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14473 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14474 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
14475 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
14476 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14477 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14478 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14479 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14480 // CHECK19: omp.precond.then:
14481 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14482 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14483 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
14484 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14485 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14486 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
14487 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
14488 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14489 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14490 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14491 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
14492 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14493 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14494 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14495 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
14496 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14497 // CHECK19: cond.true:
14498 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14499 // CHECK19-NEXT: br label [[COND_END:%.*]]
14500 // CHECK19: cond.false:
14501 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14502 // CHECK19-NEXT: br label [[COND_END]]
14503 // CHECK19: cond.end:
14504 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
14505 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14506 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14507 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
14508 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14509 // CHECK19: omp.inner.for.cond:
14510 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
14511 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !32
14512 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
14513 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14514 // CHECK19: omp.inner.for.body:
14515 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
14516 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
14517 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14518 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !32
14519 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !32
14520 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
14521 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !32
14522 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14523 // CHECK19: omp.body.continue:
14524 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14525 // CHECK19: omp.inner.for.inc:
14526 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
14527 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
14528 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !32
14529 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
14530 // CHECK19: omp.inner.for.end:
14531 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14532 // CHECK19: omp.loop.exit:
14533 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14534 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
14535 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
14536 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14537 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
14538 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14539 // CHECK19: .omp.final.then:
14540 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14541 // CHECK19-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP24]], 0
14542 // CHECK19-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
14543 // CHECK19-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
14544 // CHECK19-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
14545 // CHECK19-NEXT: store i32 [[ADD11]], i32* [[I4]], align 4
14546 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14547 // CHECK19: .omp.final.done:
14548 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14549 // CHECK19: omp.precond.end:
14550 // CHECK19-NEXT: ret void
14551 //
14552 //
14553 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
14554 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14555 // CHECK19-NEXT: entry:
14556 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14557 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14558 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14559 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14560 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14561 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14562 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14563 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14564 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14565 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14566 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
14567 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
14568 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
14569 // CHECK19-NEXT: ret void
14570 //
14571 //
14572 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..10
14573 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14574 // CHECK19-NEXT: entry:
14575 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14576 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14577 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14578 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14579 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14580 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14581 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14582 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14583 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14584 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14585 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14586 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14587 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14588 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14589 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
14590 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14591 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14592 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14593 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14594 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14595 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14596 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14597 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14598 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14599 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
14600 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14601 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14602 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14603 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14604 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14605 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14606 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14607 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14608 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14609 // CHECK19: omp.precond.then:
14610 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14611 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14612 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
14613 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14614 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14615 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14616 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14617 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14618 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14619 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14620 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
14621 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14622 // CHECK19: cond.true:
14623 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14624 // CHECK19-NEXT: br label [[COND_END:%.*]]
14625 // CHECK19: cond.false:
14626 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14627 // CHECK19-NEXT: br label [[COND_END]]
14628 // CHECK19: cond.end:
14629 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
14630 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14631 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14632 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
14633 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14634 // CHECK19: omp.inner.for.cond:
14635 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
14636 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
14637 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14638 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14639 // CHECK19: omp.inner.for.body:
14640 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !35
14641 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !35
14642 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !35
14643 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !35
14644 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !35
14645 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]]), !llvm.access.group !35
14646 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14647 // CHECK19: omp.inner.for.inc:
14648 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
14649 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !35
14650 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
14651 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !35
14652 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
14653 // CHECK19: omp.inner.for.end:
14654 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14655 // CHECK19: omp.loop.exit:
14656 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14657 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
14658 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
14659 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14660 // CHECK19-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
14661 // CHECK19-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14662 // CHECK19: .omp.final.then:
14663 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14664 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
14665 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
14666 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
14667 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
14668 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
14669 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14670 // CHECK19: .omp.final.done:
14671 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14672 // CHECK19: omp.precond.end:
14673 // CHECK19-NEXT: ret void
14674 //
14675 //
14676 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
14677 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14678 // CHECK19-NEXT: entry:
14679 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14680 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14681 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14682 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14683 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14684 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14685 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14686 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14687 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14688 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14689 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14690 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14691 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14692 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14693 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14694 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14695 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
14696 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14697 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14698 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14699 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14700 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14701 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14702 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14703 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14704 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14705 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14706 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
14707 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14708 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14709 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14710 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14711 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14712 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14713 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14714 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14715 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14716 // CHECK19: omp.precond.then:
14717 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14718 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14719 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
14720 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14721 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14722 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
14723 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
14724 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14725 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14726 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14727 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14728 // CHECK19-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14729 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
14730 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
14731 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14732 // CHECK19: omp.dispatch.cond:
14733 // CHECK19-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14734 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
14735 // CHECK19-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14736 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
14737 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14738 // CHECK19: omp.dispatch.body:
14739 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14740 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
14741 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14742 // CHECK19: omp.inner.for.cond:
14743 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
14744 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !38
14745 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
14746 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14747 // CHECK19: omp.inner.for.body:
14748 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
14749 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
14750 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14751 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !38
14752 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !38
14753 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
14754 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !38
14755 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14756 // CHECK19: omp.body.continue:
14757 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14758 // CHECK19: omp.inner.for.inc:
14759 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
14760 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
14761 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !38
14762 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
14763 // CHECK19: omp.inner.for.end:
14764 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14765 // CHECK19: omp.dispatch.inc:
14766 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14767 // CHECK19: omp.dispatch.end:
14768 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14769 // CHECK19-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
14770 // CHECK19-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14771 // CHECK19: .omp.final.then:
14772 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14773 // CHECK19-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP23]], 0
14774 // CHECK19-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
14775 // CHECK19-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
14776 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
14777 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
14778 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14779 // CHECK19: .omp.final.done:
14780 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14781 // CHECK19: omp.precond.end:
14782 // CHECK19-NEXT: ret void
14783 //
14784 //
14785 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
14786 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14787 // CHECK19-NEXT: entry:
14788 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14789 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14790 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14791 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14792 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14793 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14794 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14795 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14796 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14797 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14798 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14799 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14800 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14801 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
14802 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
14803 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14804 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14805 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14806 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
14807 // CHECK19-NEXT: ret void
14808 //
14809 //
14810 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14
14811 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14812 // CHECK19-NEXT: entry:
14813 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14814 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14815 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14816 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14817 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14818 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14819 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14820 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14821 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14822 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
14823 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14824 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14825 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14826 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14827 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14828 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
14829 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
14830 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14831 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14832 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14833 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14834 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14835 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14836 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14837 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14838 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14839 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14840 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14841 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14842 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14843 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14844 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
14845 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
14846 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14847 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14848 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14849 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14850 // CHECK19: omp.precond.then:
14851 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14852 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14853 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
14854 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14855 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14856 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14857 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14858 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14859 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14860 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14861 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
14862 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14863 // CHECK19: cond.true:
14864 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14865 // CHECK19-NEXT: br label [[COND_END:%.*]]
14866 // CHECK19: cond.false:
14867 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14868 // CHECK19-NEXT: br label [[COND_END]]
14869 // CHECK19: cond.end:
14870 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
14871 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14872 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14873 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
14874 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14875 // CHECK19: omp.inner.for.cond:
14876 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
14877 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
14878 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14879 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14880 // CHECK19: omp.inner.for.body:
14881 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !41
14882 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !41
14883 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !41
14884 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4, !llvm.access.group !41
14885 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !41
14886 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !41
14887 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
14888 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !41
14889 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]]), !llvm.access.group !41
14890 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14891 // CHECK19: omp.inner.for.inc:
14892 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
14893 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !41
14894 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
14895 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !41
14896 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
14897 // CHECK19: omp.inner.for.end:
14898 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14899 // CHECK19: omp.loop.exit:
14900 // CHECK19-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14901 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
14902 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
14903 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
14904 // CHECK19-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
14905 // CHECK19-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
14906 // CHECK19: .omp.final.then:
14907 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14908 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
14909 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
14910 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
14911 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
14912 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[I4]], align 4
14913 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
14914 // CHECK19: .omp.final.done:
14915 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
14916 // CHECK19: omp.precond.end:
14917 // CHECK19-NEXT: ret void
14918 //
14919 //
14920 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15
14921 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14922 // CHECK19-NEXT: entry:
14923 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14924 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14925 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14926 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14927 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
14928 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
14929 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
14930 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14931 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14932 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14933 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14934 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
14935 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14936 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14937 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14938 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14939 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14940 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
14941 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14942 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14943 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14944 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14945 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
14946 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14947 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
14948 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14949 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14950 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14951 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
14952 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14953 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14954 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
14955 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14956 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
14957 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
14958 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
14959 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14960 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
14961 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14962 // CHECK19: omp.precond.then:
14963 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14964 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14965 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
14966 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14967 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14968 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
14969 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
14970 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14971 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14972 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14973 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14974 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14975 // CHECK19-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14976 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
14977 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
14978 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14979 // CHECK19: omp.dispatch.cond:
14980 // CHECK19-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14981 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
14982 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14983 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
14984 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14985 // CHECK19: omp.dispatch.body:
14986 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14987 // CHECK19-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
14988 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14989 // CHECK19: omp.inner.for.cond:
14990 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
14991 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !44
14992 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
14993 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14994 // CHECK19: omp.inner.for.body:
14995 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
14996 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
14997 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14998 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !44
14999 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !44
15000 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
15001 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !44
15002 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15003 // CHECK19: omp.body.continue:
15004 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15005 // CHECK19: omp.inner.for.inc:
15006 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
15007 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
15008 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !44
15009 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
15010 // CHECK19: omp.inner.for.end:
15011 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15012 // CHECK19: omp.dispatch.inc:
15013 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
15014 // CHECK19: omp.dispatch.end:
15015 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15016 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
15017 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15018 // CHECK19: .omp.final.then:
15019 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15020 // CHECK19-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP24]], 0
15021 // CHECK19-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
15022 // CHECK19-NEXT: [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
15023 // CHECK19-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
15024 // CHECK19-NEXT: store i32 [[ADD10]], i32* [[I4]], align 4
15025 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15026 // CHECK19: .omp.final.done:
15027 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
15028 // CHECK19: omp.precond.end:
15029 // CHECK19-NEXT: ret void
15030 //
15031 //
15032 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
15033 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
15034 // CHECK19-NEXT: entry:
15035 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
15036 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
15037 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
15038 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
15039 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
15040 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
15041 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15042 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
15043 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
15044 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
15045 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
15046 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15047 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15048 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 4
15049 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 4
15050 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 4
15051 // CHECK19-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
15052 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 4
15053 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 4
15054 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 4
15055 // CHECK19-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
15056 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
15057 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4
15058 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x i8*], align 4
15059 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x i8*], align 4
15060 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x i8*], align 4
15061 // CHECK19-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
15062 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
15063 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
15064 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15065 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
15066 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
15067 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15068 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
15069 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
15070 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
15071 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4
15072 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15073 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15074 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
15075 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
15076 // CHECK19-NEXT: store i32 1, i32* [[TMP7]], align 4
15077 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
15078 // CHECK19-NEXT: store i32 1, i32* [[TMP8]], align 4
15079 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
15080 // CHECK19-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
15081 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
15082 // CHECK19-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
15083 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
15084 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 4
15085 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
15086 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 4
15087 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
15088 // CHECK19-NEXT: store i8** null, i8*** [[TMP13]], align 4
15089 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
15090 // CHECK19-NEXT: store i8** null, i8*** [[TMP14]], align 4
15091 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
15092 // CHECK19-NEXT: store i64 10, i64* [[TMP15]], align 8
15093 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
15094 // CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
15095 // CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
15096 // CHECK19: omp_offload.failed:
15097 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
15098 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
15099 // CHECK19: omp_offload.cont:
15100 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
15101 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
15102 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
15103 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
15104 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
15105 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
15106 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
15107 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4
15108 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
15109 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
15110 // CHECK19-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
15111 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
15112 // CHECK19-NEXT: store i32 1, i32* [[TMP25]], align 4
15113 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
15114 // CHECK19-NEXT: store i32 1, i32* [[TMP26]], align 4
15115 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
15116 // CHECK19-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
15117 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
15118 // CHECK19-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
15119 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
15120 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 4
15121 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
15122 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 4
15123 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
15124 // CHECK19-NEXT: store i8** null, i8*** [[TMP31]], align 4
15125 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
15126 // CHECK19-NEXT: store i8** null, i8*** [[TMP32]], align 4
15127 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
15128 // CHECK19-NEXT: store i64 10, i64* [[TMP33]], align 8
15129 // CHECK19-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
15130 // CHECK19-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
15131 // CHECK19-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
15132 // CHECK19: omp_offload.failed6:
15133 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
15134 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT7]]
15135 // CHECK19: omp_offload.cont7:
15136 // CHECK19-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
15137 // CHECK19-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
15138 // CHECK19-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15139 // CHECK19-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15140 // CHECK19-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15141 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
15142 // CHECK19-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
15143 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 4
15144 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
15145 // CHECK19-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
15146 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 4
15147 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
15148 // CHECK19-NEXT: store i8* null, i8** [[TMP43]], align 4
15149 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
15150 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32*
15151 // CHECK19-NEXT: store i32 [[TMP38]], i32* [[TMP45]], align 4
15152 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
15153 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
15154 // CHECK19-NEXT: store i32 [[TMP38]], i32* [[TMP47]], align 4
15155 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
15156 // CHECK19-NEXT: store i8* null, i8** [[TMP48]], align 4
15157 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
15158 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
15159 // CHECK19-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
15160 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
15161 // CHECK19-NEXT: store i32 1, i32* [[TMP51]], align 4
15162 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
15163 // CHECK19-NEXT: store i32 2, i32* [[TMP52]], align 4
15164 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
15165 // CHECK19-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 4
15166 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
15167 // CHECK19-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 4
15168 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
15169 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 4
15170 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
15171 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 4
15172 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
15173 // CHECK19-NEXT: store i8** null, i8*** [[TMP57]], align 4
15174 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
15175 // CHECK19-NEXT: store i8** null, i8*** [[TMP58]], align 4
15176 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
15177 // CHECK19-NEXT: store i64 10, i64* [[TMP59]], align 8
15178 // CHECK19-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
15179 // CHECK19-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
15180 // CHECK19-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
15181 // CHECK19: omp_offload.failed13:
15182 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP38]]) #[[ATTR3]]
15183 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT14]]
15184 // CHECK19: omp_offload.cont14:
15185 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
15186 // CHECK19-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
15187 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 4
15188 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
15189 // CHECK19-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
15190 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 4
15191 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
15192 // CHECK19-NEXT: store i8* null, i8** [[TMP66]], align 4
15193 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
15194 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
15195 // CHECK19-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
15196 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
15197 // CHECK19-NEXT: store i32 1, i32* [[TMP69]], align 4
15198 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
15199 // CHECK19-NEXT: store i32 1, i32* [[TMP70]], align 4
15200 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
15201 // CHECK19-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 4
15202 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
15203 // CHECK19-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 4
15204 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
15205 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 4
15206 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
15207 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 4
15208 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
15209 // CHECK19-NEXT: store i8** null, i8*** [[TMP75]], align 4
15210 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
15211 // CHECK19-NEXT: store i8** null, i8*** [[TMP76]], align 4
15212 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
15213 // CHECK19-NEXT: store i64 10, i64* [[TMP77]], align 8
15214 // CHECK19-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
15215 // CHECK19-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
15216 // CHECK19-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
15217 // CHECK19: omp_offload.failed20:
15218 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
15219 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT21]]
15220 // CHECK19: omp_offload.cont21:
15221 // CHECK19-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
15222 // CHECK19-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
15223 // CHECK19-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
15224 // CHECK19-NEXT: store i32 [[TMP81]], i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
15225 // CHECK19-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
15226 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
15227 // CHECK19-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
15228 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 4
15229 // CHECK19-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
15230 // CHECK19-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
15231 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 4
15232 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
15233 // CHECK19-NEXT: store i8* null, i8** [[TMP87]], align 4
15234 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
15235 // CHECK19-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
15236 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
15237 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
15238 // CHECK19-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
15239 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
15240 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1
15241 // CHECK19-NEXT: store i8* null, i8** [[TMP92]], align 4
15242 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
15243 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
15244 // CHECK19-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
15245 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 0
15246 // CHECK19-NEXT: store i32 1, i32* [[TMP95]], align 4
15247 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 1
15248 // CHECK19-NEXT: store i32 2, i32* [[TMP96]], align 4
15249 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 2
15250 // CHECK19-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 4
15251 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 3
15252 // CHECK19-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 4
15253 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 4
15254 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 4
15255 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 5
15256 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 4
15257 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 6
15258 // CHECK19-NEXT: store i8** null, i8*** [[TMP101]], align 4
15259 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 7
15260 // CHECK19-NEXT: store i8** null, i8*** [[TMP102]], align 4
15261 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 8
15262 // CHECK19-NEXT: store i64 10, i64* [[TMP103]], align 8
15263 // CHECK19-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]])
15264 // CHECK19-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
15265 // CHECK19-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
15266 // CHECK19: omp_offload.failed29:
15267 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP82]]) #[[ATTR3]]
15268 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]]
15269 // CHECK19: omp_offload.cont30:
15270 // CHECK19-NEXT: ret i32 0
15271 //
15272 //
15273 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
15274 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15275 // CHECK19-NEXT: entry:
15276 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15277 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15278 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15279 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
15280 // CHECK19-NEXT: ret void
15281 //
15282 //
15283 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18
15284 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15285 // CHECK19-NEXT: entry:
15286 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15287 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15288 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15289 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15290 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15291 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15292 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15293 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15294 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15295 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15296 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15297 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15298 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15299 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15300 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15301 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
15302 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15303 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15304 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15305 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15306 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15307 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15308 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15309 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15310 // CHECK19: cond.true:
15311 // CHECK19-NEXT: br label [[COND_END:%.*]]
15312 // CHECK19: cond.false:
15313 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15314 // CHECK19-NEXT: br label [[COND_END]]
15315 // CHECK19: cond.end:
15316 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15317 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15318 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15319 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15320 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15321 // CHECK19: omp.inner.for.cond:
15322 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
15323 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
15324 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15325 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15326 // CHECK19: omp.inner.for.body:
15327 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !47
15328 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !47
15329 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !47
15330 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15331 // CHECK19: omp.inner.for.inc:
15332 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
15333 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !47
15334 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
15335 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47
15336 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
15337 // CHECK19: omp.inner.for.end:
15338 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15339 // CHECK19: omp.loop.exit:
15340 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
15341 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15342 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
15343 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15344 // CHECK19: .omp.final.then:
15345 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15346 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15347 // CHECK19: .omp.final.done:
15348 // CHECK19-NEXT: ret void
15349 //
15350 //
15351 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..19
15352 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15353 // CHECK19-NEXT: entry:
15354 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15355 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15356 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15357 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15358 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15359 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15360 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15361 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15362 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15363 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15364 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15365 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15366 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15367 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15368 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15369 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15370 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15371 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15372 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15373 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15374 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15375 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15376 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
15377 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
15378 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15379 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15380 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15381 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
15382 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15383 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15384 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
15385 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15386 // CHECK19: cond.true:
15387 // CHECK19-NEXT: br label [[COND_END:%.*]]
15388 // CHECK19: cond.false:
15389 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15390 // CHECK19-NEXT: br label [[COND_END]]
15391 // CHECK19: cond.end:
15392 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
15393 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15394 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15395 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
15396 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15397 // CHECK19: omp.inner.for.cond:
15398 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
15399 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !50
15400 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
15401 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15402 // CHECK19: omp.inner.for.body:
15403 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
15404 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
15405 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15406 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !50
15407 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !50
15408 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
15409 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !50
15410 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15411 // CHECK19: omp.body.continue:
15412 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15413 // CHECK19: omp.inner.for.inc:
15414 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
15415 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
15416 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !50
15417 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
15418 // CHECK19: omp.inner.for.end:
15419 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15420 // CHECK19: omp.loop.exit:
15421 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
15422 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15423 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
15424 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15425 // CHECK19: .omp.final.then:
15426 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15427 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15428 // CHECK19: .omp.final.done:
15429 // CHECK19-NEXT: ret void
15430 //
15431 //
15432 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
15433 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15434 // CHECK19-NEXT: entry:
15435 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15436 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15437 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15438 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
15439 // CHECK19-NEXT: ret void
15440 //
15441 //
15442 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22
15443 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15444 // CHECK19-NEXT: entry:
15445 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15446 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15447 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15448 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15449 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15450 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15451 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15452 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15453 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15454 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15455 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15456 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15457 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15458 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15459 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15460 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
15461 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15462 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15463 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15464 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15465 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15466 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15467 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15468 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15469 // CHECK19: cond.true:
15470 // CHECK19-NEXT: br label [[COND_END:%.*]]
15471 // CHECK19: cond.false:
15472 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15473 // CHECK19-NEXT: br label [[COND_END]]
15474 // CHECK19: cond.end:
15475 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15476 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15477 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15478 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15479 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15480 // CHECK19: omp.inner.for.cond:
15481 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
15482 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
15483 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15484 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15485 // CHECK19: omp.inner.for.body:
15486 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !53
15487 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !53
15488 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !53
15489 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15490 // CHECK19: omp.inner.for.inc:
15491 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
15492 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !53
15493 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
15494 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !53
15495 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
15496 // CHECK19: omp.inner.for.end:
15497 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15498 // CHECK19: omp.loop.exit:
15499 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
15500 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15501 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
15502 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15503 // CHECK19: .omp.final.then:
15504 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15505 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15506 // CHECK19: .omp.final.done:
15507 // CHECK19-NEXT: ret void
15508 //
15509 //
15510 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..23
15511 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15512 // CHECK19-NEXT: entry:
15513 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15514 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15515 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15516 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15517 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15518 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15519 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15520 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15521 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15522 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15523 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15524 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15525 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15526 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15527 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15528 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15529 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15530 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15531 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15532 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15533 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15534 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15535 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
15536 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
15537 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15538 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15539 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15540 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
15541 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15542 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15543 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
15544 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15545 // CHECK19: cond.true:
15546 // CHECK19-NEXT: br label [[COND_END:%.*]]
15547 // CHECK19: cond.false:
15548 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15549 // CHECK19-NEXT: br label [[COND_END]]
15550 // CHECK19: cond.end:
15551 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
15552 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15553 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15554 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
15555 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15556 // CHECK19: omp.inner.for.cond:
15557 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
15558 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !56
15559 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
15560 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15561 // CHECK19: omp.inner.for.body:
15562 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
15563 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
15564 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15565 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !56
15566 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !56
15567 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
15568 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !56
15569 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15570 // CHECK19: omp.body.continue:
15571 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15572 // CHECK19: omp.inner.for.inc:
15573 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
15574 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
15575 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !56
15576 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
15577 // CHECK19: omp.inner.for.end:
15578 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15579 // CHECK19: omp.loop.exit:
15580 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
15581 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15582 // CHECK19-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
15583 // CHECK19-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15584 // CHECK19: .omp.final.then:
15585 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15586 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15587 // CHECK19: .omp.final.done:
15588 // CHECK19-NEXT: ret void
15589 //
15590 //
15591 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
15592 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15593 // CHECK19-NEXT: entry:
15594 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15595 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15596 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15597 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15598 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15599 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15600 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15601 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15602 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15603 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
15604 // CHECK19-NEXT: ret void
15605 //
15606 //
15607 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26
15608 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15609 // CHECK19-NEXT: entry:
15610 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15611 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15612 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15613 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15614 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15615 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15616 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15617 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15618 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15619 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15620 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15621 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15622 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15623 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15624 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15625 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15626 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15627 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15628 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
15629 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15630 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15631 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15632 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15633 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15634 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15635 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15636 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15637 // CHECK19: cond.true:
15638 // CHECK19-NEXT: br label [[COND_END:%.*]]
15639 // CHECK19: cond.false:
15640 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15641 // CHECK19-NEXT: br label [[COND_END]]
15642 // CHECK19: cond.end:
15643 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15644 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15645 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15646 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15647 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15648 // CHECK19: omp.inner.for.cond:
15649 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
15650 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
15651 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15652 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15653 // CHECK19: omp.inner.for.body:
15654 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !59
15655 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !59
15656 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !59
15657 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
15658 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !59
15659 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !59
15660 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15661 // CHECK19: omp.inner.for.inc:
15662 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
15663 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !59
15664 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
15665 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !59
15666 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
15667 // CHECK19: omp.inner.for.end:
15668 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15669 // CHECK19: omp.loop.exit:
15670 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
15671 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15672 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
15673 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15674 // CHECK19: .omp.final.then:
15675 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15676 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15677 // CHECK19: .omp.final.done:
15678 // CHECK19-NEXT: ret void
15679 //
15680 //
15681 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..27
15682 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15683 // CHECK19-NEXT: entry:
15684 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15685 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15686 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15687 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15688 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15689 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15690 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15691 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15692 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15693 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15694 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15695 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15696 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15697 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15698 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15699 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15700 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15701 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15702 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15703 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15704 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15705 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15706 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15707 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15708 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
15709 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
15710 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15711 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15712 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15713 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15714 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
15715 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
15716 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15717 // CHECK19: omp.dispatch.cond:
15718 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15719 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15720 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
15721 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15722 // CHECK19: cond.true:
15723 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15724 // CHECK19-NEXT: br label [[COND_END:%.*]]
15725 // CHECK19: cond.false:
15726 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15727 // CHECK19-NEXT: br label [[COND_END]]
15728 // CHECK19: cond.end:
15729 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
15730 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15731 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15732 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
15733 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15734 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15735 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
15736 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15737 // CHECK19: omp.dispatch.body:
15738 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15739 // CHECK19: omp.inner.for.cond:
15740 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
15741 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !62
15742 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
15743 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15744 // CHECK19: omp.inner.for.body:
15745 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
15746 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
15747 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15748 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !62
15749 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !62
15750 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
15751 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !62
15752 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15753 // CHECK19: omp.body.continue:
15754 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15755 // CHECK19: omp.inner.for.inc:
15756 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
15757 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
15758 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !62
15759 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP63:![0-9]+]]
15760 // CHECK19: omp.inner.for.end:
15761 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15762 // CHECK19: omp.dispatch.inc:
15763 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15764 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15765 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
15766 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
15767 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15768 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15769 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
15770 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
15771 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
15772 // CHECK19: omp.dispatch.end:
15773 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
15774 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15775 // CHECK19-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
15776 // CHECK19-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15777 // CHECK19: .omp.final.then:
15778 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15779 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15780 // CHECK19: .omp.final.done:
15781 // CHECK19-NEXT: ret void
15782 //
15783 //
15784 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
15785 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15786 // CHECK19-NEXT: entry:
15787 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15788 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15789 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15790 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
15791 // CHECK19-NEXT: ret void
15792 //
15793 //
15794 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30
15795 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15796 // CHECK19-NEXT: entry:
15797 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15798 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15799 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15800 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15801 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15802 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15803 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15804 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15805 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15806 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15807 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15808 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15809 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15810 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15811 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15812 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
15813 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15814 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15815 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15816 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15817 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15818 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15819 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15820 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15821 // CHECK19: cond.true:
15822 // CHECK19-NEXT: br label [[COND_END:%.*]]
15823 // CHECK19: cond.false:
15824 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15825 // CHECK19-NEXT: br label [[COND_END]]
15826 // CHECK19: cond.end:
15827 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15828 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15829 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15830 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15831 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15832 // CHECK19: omp.inner.for.cond:
15833 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
15834 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
15835 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15836 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15837 // CHECK19: omp.inner.for.body:
15838 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !65
15839 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !65
15840 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]), !llvm.access.group !65
15841 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15842 // CHECK19: omp.inner.for.inc:
15843 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
15844 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !65
15845 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
15846 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !65
15847 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP66:![0-9]+]]
15848 // CHECK19: omp.inner.for.end:
15849 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
15850 // CHECK19: omp.loop.exit:
15851 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
15852 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15853 // CHECK19-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
15854 // CHECK19-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15855 // CHECK19: .omp.final.then:
15856 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15857 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15858 // CHECK19: .omp.final.done:
15859 // CHECK19-NEXT: ret void
15860 //
15861 //
15862 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..31
15863 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15864 // CHECK19-NEXT: entry:
15865 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15866 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15867 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15868 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15869 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15870 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15871 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15872 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
15873 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
15874 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15875 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15876 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15877 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15878 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15879 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15880 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15881 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15882 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15883 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
15884 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
15885 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15886 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15887 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
15888 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
15889 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15890 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15891 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15892 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15893 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15894 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
15895 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
15896 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
15897 // CHECK19: omp.dispatch.cond:
15898 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
15899 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
15900 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15901 // CHECK19: omp.dispatch.body:
15902 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15903 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
15904 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15905 // CHECK19: omp.inner.for.cond:
15906 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
15907 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !68
15908 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
15909 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15910 // CHECK19: omp.inner.for.body:
15911 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
15912 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
15913 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15914 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !68
15915 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !68
15916 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
15917 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !68
15918 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
15919 // CHECK19: omp.body.continue:
15920 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
15921 // CHECK19: omp.inner.for.inc:
15922 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
15923 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
15924 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !68
15925 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP69:![0-9]+]]
15926 // CHECK19: omp.inner.for.end:
15927 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
15928 // CHECK19: omp.dispatch.inc:
15929 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
15930 // CHECK19: omp.dispatch.end:
15931 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
15932 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
15933 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
15934 // CHECK19: .omp.final.then:
15935 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
15936 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
15937 // CHECK19: .omp.final.done:
15938 // CHECK19-NEXT: ret void
15939 //
15940 //
15941 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
15942 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15943 // CHECK19-NEXT: entry:
15944 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15945 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15946 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15947 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15948 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15949 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15950 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15951 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15952 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15953 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
15954 // CHECK19-NEXT: ret void
15955 //
15956 //
15957 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..34
15958 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15959 // CHECK19-NEXT: entry:
15960 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15961 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15962 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15963 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15964 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
15965 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
15966 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15967 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15968 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15969 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15970 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
15971 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15972 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15973 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15974 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15975 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15976 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15977 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15978 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
15979 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15980 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15981 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15982 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15983 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15984 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15985 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15986 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15987 // CHECK19: cond.true:
15988 // CHECK19-NEXT: br label [[COND_END:%.*]]
15989 // CHECK19: cond.false:
15990 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15991 // CHECK19-NEXT: br label [[COND_END]]
15992 // CHECK19: cond.end:
15993 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15994 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15995 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15996 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15997 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
15998 // CHECK19: omp.inner.for.cond:
15999 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
16000 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
16001 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16002 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16003 // CHECK19: omp.inner.for.body:
16004 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !71
16005 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !71
16006 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4, !llvm.access.group !71
16007 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
16008 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group !71
16009 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]), !llvm.access.group !71
16010 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16011 // CHECK19: omp.inner.for.inc:
16012 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
16013 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !71
16014 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
16015 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !71
16016 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP72:![0-9]+]]
16017 // CHECK19: omp.inner.for.end:
16018 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
16019 // CHECK19: omp.loop.exit:
16020 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16021 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16022 // CHECK19-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
16023 // CHECK19-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16024 // CHECK19: .omp.final.then:
16025 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
16026 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
16027 // CHECK19: .omp.final.done:
16028 // CHECK19-NEXT: ret void
16029 //
16030 //
16031 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..35
16032 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16033 // CHECK19-NEXT: entry:
16034 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16035 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16036 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16037 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16038 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16039 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16040 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16041 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
16042 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16043 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16044 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16045 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16046 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
16047 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16048 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16049 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16050 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16051 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16052 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16053 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16054 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16055 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16056 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16057 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16058 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16059 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16060 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16061 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16062 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16063 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16064 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16065 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16066 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
16067 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
16068 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
16069 // CHECK19: omp.dispatch.cond:
16070 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16071 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
16072 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16073 // CHECK19: omp.dispatch.body:
16074 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16075 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
16076 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16077 // CHECK19: omp.inner.for.cond:
16078 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
16079 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !74
16080 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
16081 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16082 // CHECK19: omp.inner.for.body:
16083 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
16084 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
16085 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16086 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !74
16087 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !74
16088 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
16089 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !74
16090 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16091 // CHECK19: omp.body.continue:
16092 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16093 // CHECK19: omp.inner.for.inc:
16094 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
16095 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
16096 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !74
16097 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP75:![0-9]+]]
16098 // CHECK19: omp.inner.for.end:
16099 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
16100 // CHECK19: omp.dispatch.inc:
16101 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
16102 // CHECK19: omp.dispatch.end:
16103 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
16104 // CHECK19-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
16105 // CHECK19-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
16106 // CHECK19: .omp.final.then:
16107 // CHECK19-NEXT: store i32 10, i32* [[I]], align 4
16108 // CHECK19-NEXT: br label [[DOTOMP_FINAL_DONE]]
16109 // CHECK19: .omp.final.done:
16110 // CHECK19-NEXT: ret void
16111 //
16112 //
16113 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
16114 // CHECK19-SAME: () #[[ATTR6:[0-9]+]] {
16115 // CHECK19-NEXT: entry:
16116 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
16117 // CHECK19-NEXT: ret void
16118 //
16119 //
16120 // CHECK21-LABEL: define {{[^@]+}}@main
16121 // CHECK21-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
16122 // CHECK21-NEXT: entry:
16123 // CHECK21-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
16124 // CHECK21-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
16125 // CHECK21-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
16126 // CHECK21-NEXT: [[N:%.*]] = alloca i32, align 4
16127 // CHECK21-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
16128 // CHECK21-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
16129 // CHECK21-NEXT: [[M:%.*]] = alloca i32, align 4
16130 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4
16131 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16132 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16133 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16134 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16135 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4
16136 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16137 // CHECK21-NEXT: [[I3:%.*]] = alloca i32, align 4
16138 // CHECK21-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
16139 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
16140 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
16141 // CHECK21-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
16142 // CHECK21-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
16143 // CHECK21-NEXT: [[I18:%.*]] = alloca i32, align 4
16144 // CHECK21-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
16145 // CHECK21-NEXT: [[I22:%.*]] = alloca i32, align 4
16146 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
16147 // CHECK21-NEXT: [[_TMP40:%.*]] = alloca i32, align 4
16148 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
16149 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
16150 // CHECK21-NEXT: [[DOTOMP_LB46:%.*]] = alloca i32, align 4
16151 // CHECK21-NEXT: [[DOTOMP_UB47:%.*]] = alloca i32, align 4
16152 // CHECK21-NEXT: [[I48:%.*]] = alloca i32, align 4
16153 // CHECK21-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
16154 // CHECK21-NEXT: [[I52:%.*]] = alloca i32, align 4
16155 // CHECK21-NEXT: [[_TMP69:%.*]] = alloca i32, align 4
16156 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_70:%.*]] = alloca i32, align 4
16157 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_71:%.*]] = alloca i32, align 4
16158 // CHECK21-NEXT: [[DOTOMP_LB75:%.*]] = alloca i32, align 4
16159 // CHECK21-NEXT: [[DOTOMP_UB76:%.*]] = alloca i32, align 4
16160 // CHECK21-NEXT: [[I77:%.*]] = alloca i32, align 4
16161 // CHECK21-NEXT: [[DOTOMP_IV80:%.*]] = alloca i32, align 4
16162 // CHECK21-NEXT: [[I81:%.*]] = alloca i32, align 4
16163 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4
16164 // CHECK21-NEXT: [[_TMP99:%.*]] = alloca i32, align 4
16165 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_100:%.*]] = alloca i32, align 4
16166 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_101:%.*]] = alloca i32, align 4
16167 // CHECK21-NEXT: [[DOTOMP_LB105:%.*]] = alloca i32, align 4
16168 // CHECK21-NEXT: [[DOTOMP_UB106:%.*]] = alloca i32, align 4
16169 // CHECK21-NEXT: [[I107:%.*]] = alloca i32, align 4
16170 // CHECK21-NEXT: [[DOTOMP_IV110:%.*]] = alloca i32, align 4
16171 // CHECK21-NEXT: [[I111:%.*]] = alloca i32, align 4
16172 // CHECK21-NEXT: store i32 0, i32* [[RETVAL]], align 4
16173 // CHECK21-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16174 // CHECK21-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
16175 // CHECK21-NEXT: store i32 100, i32* [[N]], align 4
16176 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
16177 // CHECK21-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
16178 // CHECK21-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
16179 // CHECK21-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
16180 // CHECK21-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
16181 // CHECK21-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
16182 // CHECK21-NEXT: store i32 10, i32* [[M]], align 4
16183 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
16184 // CHECK21-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
16185 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16186 // CHECK21-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16187 // CHECK21-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16188 // CHECK21-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
16189 // CHECK21-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16190 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16191 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16192 // CHECK21-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
16193 // CHECK21-NEXT: store i32 0, i32* [[I]], align 4
16194 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16195 // CHECK21-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
16196 // CHECK21-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
16197 // CHECK21: simd.if.then:
16198 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16199 // CHECK21-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
16200 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16201 // CHECK21: omp.inner.for.cond:
16202 // CHECK21-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
16203 // CHECK21-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
16204 // CHECK21-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
16205 // CHECK21-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16206 // CHECK21: omp.inner.for.body:
16207 // CHECK21-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
16208 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
16209 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16210 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !2
16211 // CHECK21-NEXT: [[TMP11:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !2
16212 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
16213 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
16214 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
16215 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16216 // CHECK21: omp.body.continue:
16217 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16218 // CHECK21: omp.inner.for.inc:
16219 // CHECK21-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
16220 // CHECK21-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
16221 // CHECK21-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
16222 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
16223 // CHECK21: omp.inner.for.end:
16224 // CHECK21-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16225 // CHECK21-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
16226 // CHECK21-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
16227 // CHECK21-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
16228 // CHECK21-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
16229 // CHECK21-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
16230 // CHECK21-NEXT: br label [[SIMD_IF_END]]
16231 // CHECK21: simd.if.end:
16232 // CHECK21-NEXT: [[TMP14:%.*]] = load i32, i32* [[N]], align 4
16233 // CHECK21-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
16234 // CHECK21-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
16235 // CHECK21-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0
16236 // CHECK21-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
16237 // CHECK21-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
16238 // CHECK21-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
16239 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
16240 // CHECK21-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
16241 // CHECK21-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_UB17]], align 4
16242 // CHECK21-NEXT: store i32 0, i32* [[I18]], align 4
16243 // CHECK21-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
16244 // CHECK21-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]
16245 // CHECK21-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]
16246 // CHECK21: simd.if.then20:
16247 // CHECK21-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
16248 // CHECK21-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_IV21]], align 4
16249 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
16250 // CHECK21: omp.inner.for.cond23:
16251 // CHECK21-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
16252 // CHECK21-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !6
16253 // CHECK21-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
16254 // CHECK21-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
16255 // CHECK21: omp.inner.for.body25:
16256 // CHECK21-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
16257 // CHECK21-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1
16258 // CHECK21-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
16259 // CHECK21-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !6
16260 // CHECK21-NEXT: [[TMP22:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !6
16261 // CHECK21-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64
16262 // CHECK21-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM28]]
16263 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !6
16264 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
16265 // CHECK21: omp.body.continue30:
16266 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
16267 // CHECK21: omp.inner.for.inc31:
16268 // CHECK21-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
16269 // CHECK21-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1
16270 // CHECK21-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !6
16271 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
16272 // CHECK21: omp.inner.for.end33:
16273 // CHECK21-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
16274 // CHECK21-NEXT: [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0
16275 // CHECK21-NEXT: [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1
16276 // CHECK21-NEXT: [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1
16277 // CHECK21-NEXT: [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]
16278 // CHECK21-NEXT: store i32 [[ADD37]], i32* [[I22]], align 4
16279 // CHECK21-NEXT: br label [[SIMD_IF_END38]]
16280 // CHECK21: simd.if.end38:
16281 // CHECK21-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
16282 // CHECK21-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_39]], align 4
16283 // CHECK21-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
16284 // CHECK21-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_41]], align 4
16285 // CHECK21-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
16286 // CHECK21-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0
16287 // CHECK21-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
16288 // CHECK21-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
16289 // CHECK21-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
16290 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB46]], align 4
16291 // CHECK21-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
16292 // CHECK21-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_UB47]], align 4
16293 // CHECK21-NEXT: store i32 0, i32* [[I48]], align 4
16294 // CHECK21-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
16295 // CHECK21-NEXT: [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]
16296 // CHECK21-NEXT: br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]
16297 // CHECK21: simd.if.then50:
16298 // CHECK21-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_LB46]], align 4
16299 // CHECK21-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV51]], align 4
16300 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
16301 // CHECK21: omp.inner.for.cond53:
16302 // CHECK21-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
16303 // CHECK21-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_UB47]], align 4, !llvm.access.group !9
16304 // CHECK21-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]
16305 // CHECK21-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]
16306 // CHECK21: omp.inner.for.body55:
16307 // CHECK21-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
16308 // CHECK21-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1
16309 // CHECK21-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
16310 // CHECK21-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !9
16311 // CHECK21-NEXT: [[TMP34:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !9
16312 // CHECK21-NEXT: [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64
16313 // CHECK21-NEXT: [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM58]]
16314 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX59]], align 4, !llvm.access.group !9
16315 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE60:%.*]]
16316 // CHECK21: omp.body.continue60:
16317 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC61:%.*]]
16318 // CHECK21: omp.inner.for.inc61:
16319 // CHECK21-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
16320 // CHECK21-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1
16321 // CHECK21-NEXT: store i32 [[ADD62]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !9
16322 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]
16323 // CHECK21: omp.inner.for.end63:
16324 // CHECK21-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
16325 // CHECK21-NEXT: [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0
16326 // CHECK21-NEXT: [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1
16327 // CHECK21-NEXT: [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1
16328 // CHECK21-NEXT: [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]
16329 // CHECK21-NEXT: store i32 [[ADD67]], i32* [[I52]], align 4
16330 // CHECK21-NEXT: br label [[SIMD_IF_END68]]
16331 // CHECK21: simd.if.end68:
16332 // CHECK21-NEXT: [[TMP37:%.*]] = load i32, i32* [[N]], align 4
16333 // CHECK21-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR_70]], align 4
16334 // CHECK21-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
16335 // CHECK21-NEXT: [[SUB72:%.*]] = sub nsw i32 [[TMP38]], 0
16336 // CHECK21-NEXT: [[DIV73:%.*]] = sdiv i32 [[SUB72]], 1
16337 // CHECK21-NEXT: [[SUB74:%.*]] = sub nsw i32 [[DIV73]], 1
16338 // CHECK21-NEXT: store i32 [[SUB74]], i32* [[DOTCAPTURE_EXPR_71]], align 4
16339 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB75]], align 4
16340 // CHECK21-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_71]], align 4
16341 // CHECK21-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_UB76]], align 4
16342 // CHECK21-NEXT: store i32 0, i32* [[I77]], align 4
16343 // CHECK21-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
16344 // CHECK21-NEXT: [[CMP78:%.*]] = icmp slt i32 0, [[TMP40]]
16345 // CHECK21-NEXT: br i1 [[CMP78]], label [[SIMD_IF_THEN79:%.*]], label [[SIMD_IF_END97:%.*]]
16346 // CHECK21: simd.if.then79:
16347 // CHECK21-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_LB75]], align 4
16348 // CHECK21-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV80]], align 4
16349 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND82:%.*]]
16350 // CHECK21: omp.inner.for.cond82:
16351 // CHECK21-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
16352 // CHECK21-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_UB76]], align 4, !llvm.access.group !12
16353 // CHECK21-NEXT: [[CMP83:%.*]] = icmp sle i32 [[TMP42]], [[TMP43]]
16354 // CHECK21-NEXT: br i1 [[CMP83]], label [[OMP_INNER_FOR_BODY84:%.*]], label [[OMP_INNER_FOR_END92:%.*]]
16355 // CHECK21: omp.inner.for.body84:
16356 // CHECK21-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
16357 // CHECK21-NEXT: [[MUL85:%.*]] = mul nsw i32 [[TMP44]], 1
16358 // CHECK21-NEXT: [[ADD86:%.*]] = add nsw i32 0, [[MUL85]]
16359 // CHECK21-NEXT: store i32 [[ADD86]], i32* [[I81]], align 4, !llvm.access.group !12
16360 // CHECK21-NEXT: [[TMP45:%.*]] = load i32, i32* [[I81]], align 4, !llvm.access.group !12
16361 // CHECK21-NEXT: [[IDXPROM87:%.*]] = sext i32 [[TMP45]] to i64
16362 // CHECK21-NEXT: [[ARRAYIDX88:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM87]]
16363 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX88]], align 4, !llvm.access.group !12
16364 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE89:%.*]]
16365 // CHECK21: omp.body.continue89:
16366 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC90:%.*]]
16367 // CHECK21: omp.inner.for.inc90:
16368 // CHECK21-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
16369 // CHECK21-NEXT: [[ADD91:%.*]] = add nsw i32 [[TMP46]], 1
16370 // CHECK21-NEXT: store i32 [[ADD91]], i32* [[DOTOMP_IV80]], align 4, !llvm.access.group !12
16371 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND82]], !llvm.loop [[LOOP13:![0-9]+]]
16372 // CHECK21: omp.inner.for.end92:
16373 // CHECK21-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_70]], align 4
16374 // CHECK21-NEXT: [[SUB93:%.*]] = sub nsw i32 [[TMP47]], 0
16375 // CHECK21-NEXT: [[DIV94:%.*]] = sdiv i32 [[SUB93]], 1
16376 // CHECK21-NEXT: [[MUL95:%.*]] = mul nsw i32 [[DIV94]], 1
16377 // CHECK21-NEXT: [[ADD96:%.*]] = add nsw i32 0, [[MUL95]]
16378 // CHECK21-NEXT: store i32 [[ADD96]], i32* [[I81]], align 4
16379 // CHECK21-NEXT: br label [[SIMD_IF_END97]]
16380 // CHECK21: simd.if.end97:
16381 // CHECK21-NEXT: [[TMP48:%.*]] = load i32, i32* [[M]], align 4
16382 // CHECK21-NEXT: store i32 [[TMP48]], i32* [[DOTCAPTURE_EXPR_98]], align 4
16383 // CHECK21-NEXT: [[TMP49:%.*]] = load i32, i32* [[N]], align 4
16384 // CHECK21-NEXT: store i32 [[TMP49]], i32* [[DOTCAPTURE_EXPR_100]], align 4
16385 // CHECK21-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
16386 // CHECK21-NEXT: [[SUB102:%.*]] = sub nsw i32 [[TMP50]], 0
16387 // CHECK21-NEXT: [[DIV103:%.*]] = sdiv i32 [[SUB102]], 1
16388 // CHECK21-NEXT: [[SUB104:%.*]] = sub nsw i32 [[DIV103]], 1
16389 // CHECK21-NEXT: store i32 [[SUB104]], i32* [[DOTCAPTURE_EXPR_101]], align 4
16390 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB105]], align 4
16391 // CHECK21-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_101]], align 4
16392 // CHECK21-NEXT: store i32 [[TMP51]], i32* [[DOTOMP_UB106]], align 4
16393 // CHECK21-NEXT: store i32 0, i32* [[I107]], align 4
16394 // CHECK21-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
16395 // CHECK21-NEXT: [[CMP108:%.*]] = icmp slt i32 0, [[TMP52]]
16396 // CHECK21-NEXT: br i1 [[CMP108]], label [[SIMD_IF_THEN109:%.*]], label [[SIMD_IF_END127:%.*]]
16397 // CHECK21: simd.if.then109:
16398 // CHECK21-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_LB105]], align 4
16399 // CHECK21-NEXT: store i32 [[TMP53]], i32* [[DOTOMP_IV110]], align 4
16400 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND112:%.*]]
16401 // CHECK21: omp.inner.for.cond112:
16402 // CHECK21-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
16403 // CHECK21-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_UB106]], align 4, !llvm.access.group !15
16404 // CHECK21-NEXT: [[CMP113:%.*]] = icmp sle i32 [[TMP54]], [[TMP55]]
16405 // CHECK21-NEXT: br i1 [[CMP113]], label [[OMP_INNER_FOR_BODY114:%.*]], label [[OMP_INNER_FOR_END122:%.*]]
16406 // CHECK21: omp.inner.for.body114:
16407 // CHECK21-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
16408 // CHECK21-NEXT: [[MUL115:%.*]] = mul nsw i32 [[TMP56]], 1
16409 // CHECK21-NEXT: [[ADD116:%.*]] = add nsw i32 0, [[MUL115]]
16410 // CHECK21-NEXT: store i32 [[ADD116]], i32* [[I111]], align 4, !llvm.access.group !15
16411 // CHECK21-NEXT: [[TMP57:%.*]] = load i32, i32* [[I111]], align 4, !llvm.access.group !15
16412 // CHECK21-NEXT: [[IDXPROM117:%.*]] = sext i32 [[TMP57]] to i64
16413 // CHECK21-NEXT: [[ARRAYIDX118:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM117]]
16414 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX118]], align 4, !llvm.access.group !15
16415 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE119:%.*]]
16416 // CHECK21: omp.body.continue119:
16417 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC120:%.*]]
16418 // CHECK21: omp.inner.for.inc120:
16419 // CHECK21-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
16420 // CHECK21-NEXT: [[ADD121:%.*]] = add nsw i32 [[TMP58]], 1
16421 // CHECK21-NEXT: store i32 [[ADD121]], i32* [[DOTOMP_IV110]], align 4, !llvm.access.group !15
16422 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND112]], !llvm.loop [[LOOP16:![0-9]+]]
16423 // CHECK21: omp.inner.for.end122:
16424 // CHECK21-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_100]], align 4
16425 // CHECK21-NEXT: [[SUB123:%.*]] = sub nsw i32 [[TMP59]], 0
16426 // CHECK21-NEXT: [[DIV124:%.*]] = sdiv i32 [[SUB123]], 1
16427 // CHECK21-NEXT: [[MUL125:%.*]] = mul nsw i32 [[DIV124]], 1
16428 // CHECK21-NEXT: [[ADD126:%.*]] = add nsw i32 0, [[MUL125]]
16429 // CHECK21-NEXT: store i32 [[ADD126]], i32* [[I111]], align 4
16430 // CHECK21-NEXT: br label [[SIMD_IF_END127]]
16431 // CHECK21: simd.if.end127:
16432 // CHECK21-NEXT: [[TMP60:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
16433 // CHECK21-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP60]])
16434 // CHECK21-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
16435 // CHECK21-NEXT: [[TMP61:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
16436 // CHECK21-NEXT: call void @llvm.stackrestore(i8* [[TMP61]])
16437 // CHECK21-NEXT: [[TMP62:%.*]] = load i32, i32* [[RETVAL]], align 4
16438 // CHECK21-NEXT: ret i32 [[TMP62]]
16439 //
16440 //
16441 // CHECK21-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
16442 // CHECK21-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
16443 // CHECK21-NEXT: entry:
16444 // CHECK21-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
16445 // CHECK21-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
16446 // CHECK21-NEXT: [[M:%.*]] = alloca i32, align 4
16447 // CHECK21-NEXT: [[TMP:%.*]] = alloca i32, align 4
16448 // CHECK21-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16449 // CHECK21-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16450 // CHECK21-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16451 // CHECK21-NEXT: [[I:%.*]] = alloca i32, align 4
16452 // CHECK21-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
16453 // CHECK21-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
16454 // CHECK21-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
16455 // CHECK21-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
16456 // CHECK21-NEXT: [[I6:%.*]] = alloca i32, align 4
16457 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16458 // CHECK21-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
16459 // CHECK21-NEXT: [[DOTOMP_LB19:%.*]] = alloca i32, align 4
16460 // CHECK21-NEXT: [[DOTOMP_UB20:%.*]] = alloca i32, align 4
16461 // CHECK21-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
16462 // CHECK21-NEXT: [[I22:%.*]] = alloca i32, align 4
16463 // CHECK21-NEXT: [[_TMP34:%.*]] = alloca i32, align 4
16464 // CHECK21-NEXT: [[DOTOMP_LB35:%.*]] = alloca i32, align 4
16465 // CHECK21-NEXT: [[DOTOMP_UB36:%.*]] = alloca i32, align 4
16466 // CHECK21-NEXT: [[DOTOMP_IV37:%.*]] = alloca i32, align 4
16467 // CHECK21-NEXT: [[I38:%.*]] = alloca i32, align 4
16468 // CHECK21-NEXT: [[DOTCAPTURE_EXPR_50:%.*]] = alloca i32, align 4
16469 // CHECK21-NEXT: [[_TMP51:%.*]] = alloca i32, align 4
16470 // CHECK21-NEXT: [[DOTOMP_LB52:%.*]] = alloca i32, align 4
16471 // CHECK21-NEXT: [[DOTOMP_UB53:%.*]] = alloca i32, align 4
16472 // CHECK21-NEXT: [[DOTOMP_IV54:%.*]] = alloca i32, align 4
16473 // CHECK21-NEXT: [[I55:%.*]] = alloca i32, align 4
16474 // CHECK21-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16475 // CHECK21-NEXT: store i32 10, i32* [[M]], align 4
16476 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16477 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16478 // CHECK21-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16479 // CHECK21-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
16480 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16481 // CHECK21: omp.inner.for.cond:
16482 // CHECK21-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16483 // CHECK21-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
16484 // CHECK21-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
16485 // CHECK21-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16486 // CHECK21: omp.inner.for.body:
16487 // CHECK21-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16488 // CHECK21-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
16489 // CHECK21-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16490 // CHECK21-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
16491 // CHECK21-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
16492 // CHECK21-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
16493 // CHECK21-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
16494 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
16495 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16496 // CHECK21: omp.body.continue:
16497 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16498 // CHECK21: omp.inner.for.inc:
16499 // CHECK21-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16500 // CHECK21-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
16501 // CHECK21-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16502 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
16503 // CHECK21: omp.inner.for.end:
16504 // CHECK21-NEXT: store i32 10, i32* [[I]], align 4
16505 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
16506 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
16507 // CHECK21-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
16508 // CHECK21-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
16509 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
16510 // CHECK21: omp.inner.for.cond7:
16511 // CHECK21-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
16512 // CHECK21-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !21
16513 // CHECK21-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
16514 // CHECK21-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
16515 // CHECK21: omp.inner.for.body9:
16516 // CHECK21-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
16517 // CHECK21-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
16518 // CHECK21-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
16519 // CHECK21-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !21
16520 // CHECK21-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !21
16521 // CHECK21-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64
16522 // CHECK21-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM12]]
16523 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !21
16524 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
16525 // CHECK21: omp.body.continue14:
16526 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
16527 // CHECK21: omp.inner.for.inc15:
16528 // CHECK21-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
16529 // CHECK21-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1
16530 // CHECK21-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !21
16531 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
16532 // CHECK21: omp.inner.for.end17:
16533 // CHECK21-NEXT: store i32 10, i32* [[I6]], align 4
16534 // CHECK21-NEXT: [[TMP12:%.*]] = load i32, i32* [[M]], align 4
16535 // CHECK21-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_]], align 4
16536 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB19]], align 4
16537 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB20]], align 4
16538 // CHECK21-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB19]], align 4
16539 // CHECK21-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV21]], align 4
16540 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
16541 // CHECK21: omp.inner.for.cond23:
16542 // CHECK21-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
16543 // CHECK21-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB20]], align 4, !llvm.access.group !24
16544 // CHECK21-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
16545 // CHECK21-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
16546 // CHECK21: omp.inner.for.body25:
16547 // CHECK21-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
16548 // CHECK21-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP16]], 1
16549 // CHECK21-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
16550 // CHECK21-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !24
16551 // CHECK21-NEXT: [[TMP17:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !24
16552 // CHECK21-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP17]] to i64
16553 // CHECK21-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM28]]
16554 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX29]], align 4, !llvm.access.group !24
16555 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE30:%.*]]
16556 // CHECK21: omp.body.continue30:
16557 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC31:%.*]]
16558 // CHECK21: omp.inner.for.inc31:
16559 // CHECK21-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
16560 // CHECK21-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP18]], 1
16561 // CHECK21-NEXT: store i32 [[ADD32]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !24
16562 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP25:![0-9]+]]
16563 // CHECK21: omp.inner.for.end33:
16564 // CHECK21-NEXT: store i32 10, i32* [[I22]], align 4
16565 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB35]], align 4
16566 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB36]], align 4
16567 // CHECK21-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB35]], align 4
16568 // CHECK21-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV37]], align 4
16569 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND39:%.*]]
16570 // CHECK21: omp.inner.for.cond39:
16571 // CHECK21-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
16572 // CHECK21-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB36]], align 4, !llvm.access.group !27
16573 // CHECK21-NEXT: [[CMP40:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
16574 // CHECK21-NEXT: br i1 [[CMP40]], label [[OMP_INNER_FOR_BODY41:%.*]], label [[OMP_INNER_FOR_END49:%.*]]
16575 // CHECK21: omp.inner.for.body41:
16576 // CHECK21-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
16577 // CHECK21-NEXT: [[MUL42:%.*]] = mul nsw i32 [[TMP22]], 1
16578 // CHECK21-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
16579 // CHECK21-NEXT: store i32 [[ADD43]], i32* [[I38]], align 4, !llvm.access.group !27
16580 // CHECK21-NEXT: [[TMP23:%.*]] = load i32, i32* [[I38]], align 4, !llvm.access.group !27
16581 // CHECK21-NEXT: [[IDXPROM44:%.*]] = sext i32 [[TMP23]] to i64
16582 // CHECK21-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM44]]
16583 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX45]], align 4, !llvm.access.group !27
16584 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE46:%.*]]
16585 // CHECK21: omp.body.continue46:
16586 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC47:%.*]]
16587 // CHECK21: omp.inner.for.inc47:
16588 // CHECK21-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
16589 // CHECK21-NEXT: [[ADD48:%.*]] = add nsw i32 [[TMP24]], 1
16590 // CHECK21-NEXT: store i32 [[ADD48]], i32* [[DOTOMP_IV37]], align 4, !llvm.access.group !27
16591 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND39]], !llvm.loop [[LOOP28:![0-9]+]]
16592 // CHECK21: omp.inner.for.end49:
16593 // CHECK21-NEXT: store i32 10, i32* [[I38]], align 4
16594 // CHECK21-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
16595 // CHECK21-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_50]], align 4
16596 // CHECK21-NEXT: store i32 0, i32* [[DOTOMP_LB52]], align 4
16597 // CHECK21-NEXT: store i32 9, i32* [[DOTOMP_UB53]], align 4
16598 // CHECK21-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_LB52]], align 4
16599 // CHECK21-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV54]], align 4
16600 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND56:%.*]]
16601 // CHECK21: omp.inner.for.cond56:
16602 // CHECK21-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
16603 // CHECK21-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_UB53]], align 4, !llvm.access.group !30
16604 // CHECK21-NEXT: [[CMP57:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]]
16605 // CHECK21-NEXT: br i1 [[CMP57]], label [[OMP_INNER_FOR_BODY58:%.*]], label [[OMP_INNER_FOR_END66:%.*]]
16606 // CHECK21: omp.inner.for.body58:
16607 // CHECK21-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
16608 // CHECK21-NEXT: [[MUL59:%.*]] = mul nsw i32 [[TMP29]], 1
16609 // CHECK21-NEXT: [[ADD60:%.*]] = add nsw i32 0, [[MUL59]]
16610 // CHECK21-NEXT: store i32 [[ADD60]], i32* [[I55]], align 4, !llvm.access.group !30
16611 // CHECK21-NEXT: [[TMP30:%.*]] = load i32, i32* [[I55]], align 4, !llvm.access.group !30
16612 // CHECK21-NEXT: [[IDXPROM61:%.*]] = sext i32 [[TMP30]] to i64
16613 // CHECK21-NEXT: [[ARRAYIDX62:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM61]]
16614 // CHECK21-NEXT: store i32 0, i32* [[ARRAYIDX62]], align 4, !llvm.access.group !30
16615 // CHECK21-NEXT: br label [[OMP_BODY_CONTINUE63:%.*]]
16616 // CHECK21: omp.body.continue63:
16617 // CHECK21-NEXT: br label [[OMP_INNER_FOR_INC64:%.*]]
16618 // CHECK21: omp.inner.for.inc64:
16619 // CHECK21-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
16620 // CHECK21-NEXT: [[ADD65:%.*]] = add nsw i32 [[TMP31]], 1
16621 // CHECK21-NEXT: store i32 [[ADD65]], i32* [[DOTOMP_IV54]], align 4, !llvm.access.group !30
16622 // CHECK21-NEXT: br label [[OMP_INNER_FOR_COND56]], !llvm.loop [[LOOP31:![0-9]+]]
16623 // CHECK21: omp.inner.for.end66:
16624 // CHECK21-NEXT: store i32 10, i32* [[I55]], align 4
16625 // CHECK21-NEXT: ret i32 0
16626 //
16627 //
16628 // CHECK23-LABEL: define {{[^@]+}}@main
16629 // CHECK23-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
16630 // CHECK23-NEXT: entry:
16631 // CHECK23-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
16632 // CHECK23-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
16633 // CHECK23-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
16634 // CHECK23-NEXT: [[N:%.*]] = alloca i32, align 4
16635 // CHECK23-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
16636 // CHECK23-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
16637 // CHECK23-NEXT: [[M:%.*]] = alloca i32, align 4
16638 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4
16639 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16640 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16641 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16642 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16643 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4
16644 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16645 // CHECK23-NEXT: [[I3:%.*]] = alloca i32, align 4
16646 // CHECK23-NEXT: [[_TMP10:%.*]] = alloca i32, align 4
16647 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
16648 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
16649 // CHECK23-NEXT: [[DOTOMP_LB16:%.*]] = alloca i32, align 4
16650 // CHECK23-NEXT: [[DOTOMP_UB17:%.*]] = alloca i32, align 4
16651 // CHECK23-NEXT: [[I18:%.*]] = alloca i32, align 4
16652 // CHECK23-NEXT: [[DOTOMP_IV21:%.*]] = alloca i32, align 4
16653 // CHECK23-NEXT: [[I22:%.*]] = alloca i32, align 4
16654 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
16655 // CHECK23-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
16656 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
16657 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
16658 // CHECK23-NEXT: [[DOTOMP_LB45:%.*]] = alloca i32, align 4
16659 // CHECK23-NEXT: [[DOTOMP_UB46:%.*]] = alloca i32, align 4
16660 // CHECK23-NEXT: [[I47:%.*]] = alloca i32, align 4
16661 // CHECK23-NEXT: [[DOTOMP_IV50:%.*]] = alloca i32, align 4
16662 // CHECK23-NEXT: [[I51:%.*]] = alloca i32, align 4
16663 // CHECK23-NEXT: [[_TMP67:%.*]] = alloca i32, align 4
16664 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_68:%.*]] = alloca i32, align 4
16665 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_69:%.*]] = alloca i32, align 4
16666 // CHECK23-NEXT: [[DOTOMP_LB73:%.*]] = alloca i32, align 4
16667 // CHECK23-NEXT: [[DOTOMP_UB74:%.*]] = alloca i32, align 4
16668 // CHECK23-NEXT: [[I75:%.*]] = alloca i32, align 4
16669 // CHECK23-NEXT: [[DOTOMP_IV78:%.*]] = alloca i32, align 4
16670 // CHECK23-NEXT: [[I79:%.*]] = alloca i32, align 4
16671 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_95:%.*]] = alloca i32, align 4
16672 // CHECK23-NEXT: [[_TMP96:%.*]] = alloca i32, align 4
16673 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_97:%.*]] = alloca i32, align 4
16674 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_98:%.*]] = alloca i32, align 4
16675 // CHECK23-NEXT: [[DOTOMP_LB102:%.*]] = alloca i32, align 4
16676 // CHECK23-NEXT: [[DOTOMP_UB103:%.*]] = alloca i32, align 4
16677 // CHECK23-NEXT: [[I104:%.*]] = alloca i32, align 4
16678 // CHECK23-NEXT: [[DOTOMP_IV107:%.*]] = alloca i32, align 4
16679 // CHECK23-NEXT: [[I108:%.*]] = alloca i32, align 4
16680 // CHECK23-NEXT: store i32 0, i32* [[RETVAL]], align 4
16681 // CHECK23-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16682 // CHECK23-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
16683 // CHECK23-NEXT: store i32 100, i32* [[N]], align 4
16684 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
16685 // CHECK23-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
16686 // CHECK23-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
16687 // CHECK23-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
16688 // CHECK23-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
16689 // CHECK23-NEXT: store i32 10, i32* [[M]], align 4
16690 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
16691 // CHECK23-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
16692 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16693 // CHECK23-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
16694 // CHECK23-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16695 // CHECK23-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
16696 // CHECK23-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16697 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16698 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16699 // CHECK23-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
16700 // CHECK23-NEXT: store i32 0, i32* [[I]], align 4
16701 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16702 // CHECK23-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16703 // CHECK23-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
16704 // CHECK23: simd.if.then:
16705 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16706 // CHECK23-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
16707 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16708 // CHECK23: omp.inner.for.cond:
16709 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
16710 // CHECK23-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
16711 // CHECK23-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
16712 // CHECK23-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16713 // CHECK23: omp.inner.for.body:
16714 // CHECK23-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
16715 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
16716 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16717 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !3
16718 // CHECK23-NEXT: [[TMP10:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !3
16719 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP10]]
16720 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
16721 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16722 // CHECK23: omp.body.continue:
16723 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16724 // CHECK23: omp.inner.for.inc:
16725 // CHECK23-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
16726 // CHECK23-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
16727 // CHECK23-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
16728 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
16729 // CHECK23: omp.inner.for.end:
16730 // CHECK23-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16731 // CHECK23-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
16732 // CHECK23-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
16733 // CHECK23-NEXT: [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
16734 // CHECK23-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
16735 // CHECK23-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
16736 // CHECK23-NEXT: br label [[SIMD_IF_END]]
16737 // CHECK23: simd.if.end:
16738 // CHECK23-NEXT: [[TMP13:%.*]] = load i32, i32* [[N]], align 4
16739 // CHECK23-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_11]], align 4
16740 // CHECK23-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
16741 // CHECK23-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0
16742 // CHECK23-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
16743 // CHECK23-NEXT: [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
16744 // CHECK23-NEXT: store i32 [[SUB15]], i32* [[DOTCAPTURE_EXPR_12]], align 4
16745 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB16]], align 4
16746 // CHECK23-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
16747 // CHECK23-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_UB17]], align 4
16748 // CHECK23-NEXT: store i32 0, i32* [[I18]], align 4
16749 // CHECK23-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
16750 // CHECK23-NEXT: [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]
16751 // CHECK23-NEXT: br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]
16752 // CHECK23: simd.if.then20:
16753 // CHECK23-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB16]], align 4
16754 // CHECK23-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV21]], align 4
16755 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND23:%.*]]
16756 // CHECK23: omp.inner.for.cond23:
16757 // CHECK23-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
16758 // CHECK23-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB17]], align 4, !llvm.access.group !7
16759 // CHECK23-NEXT: [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
16760 // CHECK23-NEXT: br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]
16761 // CHECK23: omp.inner.for.body25:
16762 // CHECK23-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
16763 // CHECK23-NEXT: [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1
16764 // CHECK23-NEXT: [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
16765 // CHECK23-NEXT: store i32 [[ADD27]], i32* [[I22]], align 4, !llvm.access.group !7
16766 // CHECK23-NEXT: [[TMP21:%.*]] = load i32, i32* [[I22]], align 4, !llvm.access.group !7
16767 // CHECK23-NEXT: [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
16768 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX28]], align 4, !llvm.access.group !7
16769 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE29:%.*]]
16770 // CHECK23: omp.body.continue29:
16771 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC30:%.*]]
16772 // CHECK23: omp.inner.for.inc30:
16773 // CHECK23-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
16774 // CHECK23-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1
16775 // CHECK23-NEXT: store i32 [[ADD31]], i32* [[DOTOMP_IV21]], align 4, !llvm.access.group !7
16776 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]
16777 // CHECK23: omp.inner.for.end32:
16778 // CHECK23-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
16779 // CHECK23-NEXT: [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0
16780 // CHECK23-NEXT: [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1
16781 // CHECK23-NEXT: [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1
16782 // CHECK23-NEXT: [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]
16783 // CHECK23-NEXT: store i32 [[ADD36]], i32* [[I22]], align 4
16784 // CHECK23-NEXT: br label [[SIMD_IF_END37]]
16785 // CHECK23: simd.if.end37:
16786 // CHECK23-NEXT: [[TMP24:%.*]] = load i32, i32* [[M]], align 4
16787 // CHECK23-NEXT: store i32 [[TMP24]], i32* [[DOTCAPTURE_EXPR_38]], align 4
16788 // CHECK23-NEXT: [[TMP25:%.*]] = load i32, i32* [[N]], align 4
16789 // CHECK23-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_40]], align 4
16790 // CHECK23-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
16791 // CHECK23-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0
16792 // CHECK23-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
16793 // CHECK23-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
16794 // CHECK23-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
16795 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB45]], align 4
16796 // CHECK23-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
16797 // CHECK23-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_UB46]], align 4
16798 // CHECK23-NEXT: store i32 0, i32* [[I47]], align 4
16799 // CHECK23-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
16800 // CHECK23-NEXT: [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]
16801 // CHECK23-NEXT: br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]
16802 // CHECK23: simd.if.then49:
16803 // CHECK23-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_LB45]], align 4
16804 // CHECK23-NEXT: store i32 [[TMP29]], i32* [[DOTOMP_IV50]], align 4
16805 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND52:%.*]]
16806 // CHECK23: omp.inner.for.cond52:
16807 // CHECK23-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
16808 // CHECK23-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_UB46]], align 4, !llvm.access.group !10
16809 // CHECK23-NEXT: [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]
16810 // CHECK23-NEXT: br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]
16811 // CHECK23: omp.inner.for.body54:
16812 // CHECK23-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
16813 // CHECK23-NEXT: [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1
16814 // CHECK23-NEXT: [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]
16815 // CHECK23-NEXT: store i32 [[ADD56]], i32* [[I51]], align 4, !llvm.access.group !10
16816 // CHECK23-NEXT: [[TMP33:%.*]] = load i32, i32* [[I51]], align 4, !llvm.access.group !10
16817 // CHECK23-NEXT: [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP33]]
16818 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX57]], align 4, !llvm.access.group !10
16819 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE58:%.*]]
16820 // CHECK23: omp.body.continue58:
16821 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC59:%.*]]
16822 // CHECK23: omp.inner.for.inc59:
16823 // CHECK23-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
16824 // CHECK23-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1
16825 // CHECK23-NEXT: store i32 [[ADD60]], i32* [[DOTOMP_IV50]], align 4, !llvm.access.group !10
16826 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]
16827 // CHECK23: omp.inner.for.end61:
16828 // CHECK23-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
16829 // CHECK23-NEXT: [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0
16830 // CHECK23-NEXT: [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
16831 // CHECK23-NEXT: [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1
16832 // CHECK23-NEXT: [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]
16833 // CHECK23-NEXT: store i32 [[ADD65]], i32* [[I51]], align 4
16834 // CHECK23-NEXT: br label [[SIMD_IF_END66]]
16835 // CHECK23: simd.if.end66:
16836 // CHECK23-NEXT: [[TMP36:%.*]] = load i32, i32* [[N]], align 4
16837 // CHECK23-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_68]], align 4
16838 // CHECK23-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
16839 // CHECK23-NEXT: [[SUB70:%.*]] = sub nsw i32 [[TMP37]], 0
16840 // CHECK23-NEXT: [[DIV71:%.*]] = sdiv i32 [[SUB70]], 1
16841 // CHECK23-NEXT: [[SUB72:%.*]] = sub nsw i32 [[DIV71]], 1
16842 // CHECK23-NEXT: store i32 [[SUB72]], i32* [[DOTCAPTURE_EXPR_69]], align 4
16843 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB73]], align 4
16844 // CHECK23-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_69]], align 4
16845 // CHECK23-NEXT: store i32 [[TMP38]], i32* [[DOTOMP_UB74]], align 4
16846 // CHECK23-NEXT: store i32 0, i32* [[I75]], align 4
16847 // CHECK23-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
16848 // CHECK23-NEXT: [[CMP76:%.*]] = icmp slt i32 0, [[TMP39]]
16849 // CHECK23-NEXT: br i1 [[CMP76]], label [[SIMD_IF_THEN77:%.*]], label [[SIMD_IF_END94:%.*]]
16850 // CHECK23: simd.if.then77:
16851 // CHECK23-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_LB73]], align 4
16852 // CHECK23-NEXT: store i32 [[TMP40]], i32* [[DOTOMP_IV78]], align 4
16853 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND80:%.*]]
16854 // CHECK23: omp.inner.for.cond80:
16855 // CHECK23-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
16856 // CHECK23-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_UB74]], align 4, !llvm.access.group !13
16857 // CHECK23-NEXT: [[CMP81:%.*]] = icmp sle i32 [[TMP41]], [[TMP42]]
16858 // CHECK23-NEXT: br i1 [[CMP81]], label [[OMP_INNER_FOR_BODY82:%.*]], label [[OMP_INNER_FOR_END89:%.*]]
16859 // CHECK23: omp.inner.for.body82:
16860 // CHECK23-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
16861 // CHECK23-NEXT: [[MUL83:%.*]] = mul nsw i32 [[TMP43]], 1
16862 // CHECK23-NEXT: [[ADD84:%.*]] = add nsw i32 0, [[MUL83]]
16863 // CHECK23-NEXT: store i32 [[ADD84]], i32* [[I79]], align 4, !llvm.access.group !13
16864 // CHECK23-NEXT: [[TMP44:%.*]] = load i32, i32* [[I79]], align 4, !llvm.access.group !13
16865 // CHECK23-NEXT: [[ARRAYIDX85:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP44]]
16866 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX85]], align 4, !llvm.access.group !13
16867 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE86:%.*]]
16868 // CHECK23: omp.body.continue86:
16869 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC87:%.*]]
16870 // CHECK23: omp.inner.for.inc87:
16871 // CHECK23-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
16872 // CHECK23-NEXT: [[ADD88:%.*]] = add nsw i32 [[TMP45]], 1
16873 // CHECK23-NEXT: store i32 [[ADD88]], i32* [[DOTOMP_IV78]], align 4, !llvm.access.group !13
16874 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND80]], !llvm.loop [[LOOP14:![0-9]+]]
16875 // CHECK23: omp.inner.for.end89:
16876 // CHECK23-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_68]], align 4
16877 // CHECK23-NEXT: [[SUB90:%.*]] = sub nsw i32 [[TMP46]], 0
16878 // CHECK23-NEXT: [[DIV91:%.*]] = sdiv i32 [[SUB90]], 1
16879 // CHECK23-NEXT: [[MUL92:%.*]] = mul nsw i32 [[DIV91]], 1
16880 // CHECK23-NEXT: [[ADD93:%.*]] = add nsw i32 0, [[MUL92]]
16881 // CHECK23-NEXT: store i32 [[ADD93]], i32* [[I79]], align 4
16882 // CHECK23-NEXT: br label [[SIMD_IF_END94]]
16883 // CHECK23: simd.if.end94:
16884 // CHECK23-NEXT: [[TMP47:%.*]] = load i32, i32* [[M]], align 4
16885 // CHECK23-NEXT: store i32 [[TMP47]], i32* [[DOTCAPTURE_EXPR_95]], align 4
16886 // CHECK23-NEXT: [[TMP48:%.*]] = load i32, i32* [[N]], align 4
16887 // CHECK23-NEXT: store i32 [[TMP48]], i32* [[DOTCAPTURE_EXPR_97]], align 4
16888 // CHECK23-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
16889 // CHECK23-NEXT: [[SUB99:%.*]] = sub nsw i32 [[TMP49]], 0
16890 // CHECK23-NEXT: [[DIV100:%.*]] = sdiv i32 [[SUB99]], 1
16891 // CHECK23-NEXT: [[SUB101:%.*]] = sub nsw i32 [[DIV100]], 1
16892 // CHECK23-NEXT: store i32 [[SUB101]], i32* [[DOTCAPTURE_EXPR_98]], align 4
16893 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB102]], align 4
16894 // CHECK23-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_98]], align 4
16895 // CHECK23-NEXT: store i32 [[TMP50]], i32* [[DOTOMP_UB103]], align 4
16896 // CHECK23-NEXT: store i32 0, i32* [[I104]], align 4
16897 // CHECK23-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
16898 // CHECK23-NEXT: [[CMP105:%.*]] = icmp slt i32 0, [[TMP51]]
16899 // CHECK23-NEXT: br i1 [[CMP105]], label [[SIMD_IF_THEN106:%.*]], label [[SIMD_IF_END123:%.*]]
16900 // CHECK23: simd.if.then106:
16901 // CHECK23-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_LB102]], align 4
16902 // CHECK23-NEXT: store i32 [[TMP52]], i32* [[DOTOMP_IV107]], align 4
16903 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND109:%.*]]
16904 // CHECK23: omp.inner.for.cond109:
16905 // CHECK23-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
16906 // CHECK23-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_UB103]], align 4, !llvm.access.group !16
16907 // CHECK23-NEXT: [[CMP110:%.*]] = icmp sle i32 [[TMP53]], [[TMP54]]
16908 // CHECK23-NEXT: br i1 [[CMP110]], label [[OMP_INNER_FOR_BODY111:%.*]], label [[OMP_INNER_FOR_END118:%.*]]
16909 // CHECK23: omp.inner.for.body111:
16910 // CHECK23-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
16911 // CHECK23-NEXT: [[MUL112:%.*]] = mul nsw i32 [[TMP55]], 1
16912 // CHECK23-NEXT: [[ADD113:%.*]] = add nsw i32 0, [[MUL112]]
16913 // CHECK23-NEXT: store i32 [[ADD113]], i32* [[I108]], align 4, !llvm.access.group !16
16914 // CHECK23-NEXT: [[TMP56:%.*]] = load i32, i32* [[I108]], align 4, !llvm.access.group !16
16915 // CHECK23-NEXT: [[ARRAYIDX114:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP56]]
16916 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX114]], align 4, !llvm.access.group !16
16917 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE115:%.*]]
16918 // CHECK23: omp.body.continue115:
16919 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC116:%.*]]
16920 // CHECK23: omp.inner.for.inc116:
16921 // CHECK23-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
16922 // CHECK23-NEXT: [[ADD117:%.*]] = add nsw i32 [[TMP57]], 1
16923 // CHECK23-NEXT: store i32 [[ADD117]], i32* [[DOTOMP_IV107]], align 4, !llvm.access.group !16
16924 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND109]], !llvm.loop [[LOOP17:![0-9]+]]
16925 // CHECK23: omp.inner.for.end118:
16926 // CHECK23-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_97]], align 4
16927 // CHECK23-NEXT: [[SUB119:%.*]] = sub nsw i32 [[TMP58]], 0
16928 // CHECK23-NEXT: [[DIV120:%.*]] = sdiv i32 [[SUB119]], 1
16929 // CHECK23-NEXT: [[MUL121:%.*]] = mul nsw i32 [[DIV120]], 1
16930 // CHECK23-NEXT: [[ADD122:%.*]] = add nsw i32 0, [[MUL121]]
16931 // CHECK23-NEXT: store i32 [[ADD122]], i32* [[I108]], align 4
16932 // CHECK23-NEXT: br label [[SIMD_IF_END123]]
16933 // CHECK23: simd.if.end123:
16934 // CHECK23-NEXT: [[TMP59:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
16935 // CHECK23-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP59]])
16936 // CHECK23-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
16937 // CHECK23-NEXT: [[TMP60:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
16938 // CHECK23-NEXT: call void @llvm.stackrestore(i8* [[TMP60]])
16939 // CHECK23-NEXT: [[TMP61:%.*]] = load i32, i32* [[RETVAL]], align 4
16940 // CHECK23-NEXT: ret i32 [[TMP61]]
16941 //
16942 //
16943 // CHECK23-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
16944 // CHECK23-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
16945 // CHECK23-NEXT: entry:
16946 // CHECK23-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
16947 // CHECK23-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
16948 // CHECK23-NEXT: [[M:%.*]] = alloca i32, align 4
16949 // CHECK23-NEXT: [[TMP:%.*]] = alloca i32, align 4
16950 // CHECK23-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
16951 // CHECK23-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
16952 // CHECK23-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
16953 // CHECK23-NEXT: [[I:%.*]] = alloca i32, align 4
16954 // CHECK23-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
16955 // CHECK23-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
16956 // CHECK23-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
16957 // CHECK23-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
16958 // CHECK23-NEXT: [[I6:%.*]] = alloca i32, align 4
16959 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16960 // CHECK23-NEXT: [[_TMP17:%.*]] = alloca i32, align 4
16961 // CHECK23-NEXT: [[DOTOMP_LB18:%.*]] = alloca i32, align 4
16962 // CHECK23-NEXT: [[DOTOMP_UB19:%.*]] = alloca i32, align 4
16963 // CHECK23-NEXT: [[DOTOMP_IV20:%.*]] = alloca i32, align 4
16964 // CHECK23-NEXT: [[I21:%.*]] = alloca i32, align 4
16965 // CHECK23-NEXT: [[_TMP32:%.*]] = alloca i32, align 4
16966 // CHECK23-NEXT: [[DOTOMP_LB33:%.*]] = alloca i32, align 4
16967 // CHECK23-NEXT: [[DOTOMP_UB34:%.*]] = alloca i32, align 4
16968 // CHECK23-NEXT: [[DOTOMP_IV35:%.*]] = alloca i32, align 4
16969 // CHECK23-NEXT: [[I36:%.*]] = alloca i32, align 4
16970 // CHECK23-NEXT: [[DOTCAPTURE_EXPR_47:%.*]] = alloca i32, align 4
16971 // CHECK23-NEXT: [[_TMP48:%.*]] = alloca i32, align 4
16972 // CHECK23-NEXT: [[DOTOMP_LB49:%.*]] = alloca i32, align 4
16973 // CHECK23-NEXT: [[DOTOMP_UB50:%.*]] = alloca i32, align 4
16974 // CHECK23-NEXT: [[DOTOMP_IV51:%.*]] = alloca i32, align 4
16975 // CHECK23-NEXT: [[I52:%.*]] = alloca i32, align 4
16976 // CHECK23-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16977 // CHECK23-NEXT: store i32 10, i32* [[M]], align 4
16978 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
16979 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
16980 // CHECK23-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16981 // CHECK23-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
16982 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
16983 // CHECK23: omp.inner.for.cond:
16984 // CHECK23-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16985 // CHECK23-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
16986 // CHECK23-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
16987 // CHECK23-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16988 // CHECK23: omp.inner.for.body:
16989 // CHECK23-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16990 // CHECK23-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
16991 // CHECK23-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16992 // CHECK23-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !19
16993 // CHECK23-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !19
16994 // CHECK23-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
16995 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
16996 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
16997 // CHECK23: omp.body.continue:
16998 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
16999 // CHECK23: omp.inner.for.inc:
17000 // CHECK23-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
17001 // CHECK23-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
17002 // CHECK23-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
17003 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
17004 // CHECK23: omp.inner.for.end:
17005 // CHECK23-NEXT: store i32 10, i32* [[I]], align 4
17006 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
17007 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB4]], align 4
17008 // CHECK23-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
17009 // CHECK23-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV5]], align 4
17010 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
17011 // CHECK23: omp.inner.for.cond7:
17012 // CHECK23-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
17013 // CHECK23-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !22
17014 // CHECK23-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
17015 // CHECK23-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
17016 // CHECK23: omp.inner.for.body9:
17017 // CHECK23-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
17018 // CHECK23-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
17019 // CHECK23-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
17020 // CHECK23-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !22
17021 // CHECK23-NEXT: [[TMP10:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !22
17022 // CHECK23-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP10]]
17023 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX12]], align 4, !llvm.access.group !22
17024 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
17025 // CHECK23: omp.body.continue13:
17026 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
17027 // CHECK23: omp.inner.for.inc14:
17028 // CHECK23-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
17029 // CHECK23-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1
17030 // CHECK23-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !22
17031 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP23:![0-9]+]]
17032 // CHECK23: omp.inner.for.end16:
17033 // CHECK23-NEXT: store i32 10, i32* [[I6]], align 4
17034 // CHECK23-NEXT: [[TMP12:%.*]] = load i32, i32* [[M]], align 4
17035 // CHECK23-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_]], align 4
17036 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB18]], align 4
17037 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB19]], align 4
17038 // CHECK23-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB18]], align 4
17039 // CHECK23-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV20]], align 4
17040 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
17041 // CHECK23: omp.inner.for.cond22:
17042 // CHECK23-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
17043 // CHECK23-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB19]], align 4, !llvm.access.group !25
17044 // CHECK23-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
17045 // CHECK23-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]
17046 // CHECK23: omp.inner.for.body24:
17047 // CHECK23-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
17048 // CHECK23-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP16]], 1
17049 // CHECK23-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
17050 // CHECK23-NEXT: store i32 [[ADD26]], i32* [[I21]], align 4, !llvm.access.group !25
17051 // CHECK23-NEXT: [[TMP17:%.*]] = load i32, i32* [[I21]], align 4, !llvm.access.group !25
17052 // CHECK23-NEXT: [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP17]]
17053 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX27]], align 4, !llvm.access.group !25
17054 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE28:%.*]]
17055 // CHECK23: omp.body.continue28:
17056 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC29:%.*]]
17057 // CHECK23: omp.inner.for.inc29:
17058 // CHECK23-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
17059 // CHECK23-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP18]], 1
17060 // CHECK23-NEXT: store i32 [[ADD30]], i32* [[DOTOMP_IV20]], align 4, !llvm.access.group !25
17061 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP26:![0-9]+]]
17062 // CHECK23: omp.inner.for.end31:
17063 // CHECK23-NEXT: store i32 10, i32* [[I21]], align 4
17064 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB33]], align 4
17065 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB34]], align 4
17066 // CHECK23-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB33]], align 4
17067 // CHECK23-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV35]], align 4
17068 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND37:%.*]]
17069 // CHECK23: omp.inner.for.cond37:
17070 // CHECK23-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
17071 // CHECK23-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB34]], align 4, !llvm.access.group !28
17072 // CHECK23-NEXT: [[CMP38:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
17073 // CHECK23-NEXT: br i1 [[CMP38]], label [[OMP_INNER_FOR_BODY39:%.*]], label [[OMP_INNER_FOR_END46:%.*]]
17074 // CHECK23: omp.inner.for.body39:
17075 // CHECK23-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
17076 // CHECK23-NEXT: [[MUL40:%.*]] = mul nsw i32 [[TMP22]], 1
17077 // CHECK23-NEXT: [[ADD41:%.*]] = add nsw i32 0, [[MUL40]]
17078 // CHECK23-NEXT: store i32 [[ADD41]], i32* [[I36]], align 4, !llvm.access.group !28
17079 // CHECK23-NEXT: [[TMP23:%.*]] = load i32, i32* [[I36]], align 4, !llvm.access.group !28
17080 // CHECK23-NEXT: [[ARRAYIDX42:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP23]]
17081 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX42]], align 4, !llvm.access.group !28
17082 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE43:%.*]]
17083 // CHECK23: omp.body.continue43:
17084 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC44:%.*]]
17085 // CHECK23: omp.inner.for.inc44:
17086 // CHECK23-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
17087 // CHECK23-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP24]], 1
17088 // CHECK23-NEXT: store i32 [[ADD45]], i32* [[DOTOMP_IV35]], align 4, !llvm.access.group !28
17089 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND37]], !llvm.loop [[LOOP29:![0-9]+]]
17090 // CHECK23: omp.inner.for.end46:
17091 // CHECK23-NEXT: store i32 10, i32* [[I36]], align 4
17092 // CHECK23-NEXT: [[TMP25:%.*]] = load i32, i32* [[M]], align 4
17093 // CHECK23-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR_47]], align 4
17094 // CHECK23-NEXT: store i32 0, i32* [[DOTOMP_LB49]], align 4
17095 // CHECK23-NEXT: store i32 9, i32* [[DOTOMP_UB50]], align 4
17096 // CHECK23-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_LB49]], align 4
17097 // CHECK23-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV51]], align 4
17098 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND53:%.*]]
17099 // CHECK23: omp.inner.for.cond53:
17100 // CHECK23-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
17101 // CHECK23-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_UB50]], align 4, !llvm.access.group !31
17102 // CHECK23-NEXT: [[CMP54:%.*]] = icmp sle i32 [[TMP27]], [[TMP28]]
17103 // CHECK23-NEXT: br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END62:%.*]]
17104 // CHECK23: omp.inner.for.body55:
17105 // CHECK23-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
17106 // CHECK23-NEXT: [[MUL56:%.*]] = mul nsw i32 [[TMP29]], 1
17107 // CHECK23-NEXT: [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
17108 // CHECK23-NEXT: store i32 [[ADD57]], i32* [[I52]], align 4, !llvm.access.group !31
17109 // CHECK23-NEXT: [[TMP30:%.*]] = load i32, i32* [[I52]], align 4, !llvm.access.group !31
17110 // CHECK23-NEXT: [[ARRAYIDX58:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP30]]
17111 // CHECK23-NEXT: store i32 0, i32* [[ARRAYIDX58]], align 4, !llvm.access.group !31
17112 // CHECK23-NEXT: br label [[OMP_BODY_CONTINUE59:%.*]]
17113 // CHECK23: omp.body.continue59:
17114 // CHECK23-NEXT: br label [[OMP_INNER_FOR_INC60:%.*]]
17115 // CHECK23: omp.inner.for.inc60:
17116 // CHECK23-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
17117 // CHECK23-NEXT: [[ADD61:%.*]] = add nsw i32 [[TMP31]], 1
17118 // CHECK23-NEXT: store i32 [[ADD61]], i32* [[DOTOMP_IV51]], align 4, !llvm.access.group !31
17119 // CHECK23-NEXT: br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP32:![0-9]+]]
17120 // CHECK23: omp.inner.for.end62:
17121 // CHECK23-NEXT: store i32 10, i32* [[I52]], align 4
17122 // CHECK23-NEXT: ret i32 0
17123 //
17124