1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
15
16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
22
23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
29
30 // expected-no-diagnostics
31 #ifndef HEADER
32 #define HEADER
33
34 template <class T>
35 struct S {
36 T f;
SS37 S(T a) : f(a) {}
SS38 S() : f() {}
operator TS39 operator T() { return T(); }
~SS40 ~S() {}
41 };
42
43 template <typename T>
tmain()44 T tmain() {
45 S<T> test;
46 T t_var = T();
47 T vec[] = {1, 2};
48 S<T> s_arr[] = {1, 2};
49 S<T> &var = test;
50 #pragma omp target teams distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var)
51 for (int i = 0; i < 2; ++i) {
52 vec[i] = t_var;
53 s_arr[i] = var;
54 }
55 return T();
56 }
57
main()58 int main() {
59 static int svar;
60 volatile double g;
61 volatile double &g1 = g;
62
63 #ifdef LAMBDA
64 [&]() {
65 static float sfvar;
66
67 #pragma omp target teams distribute parallel for simd lastprivate(g, g1, svar, sfvar)
68 for (int i = 0; i < 2; ++i) {
69 // skip gbl and bound tid
70 // loop variables
71
72
73
74 g1 = 1;
75 svar = 3;
76 sfvar = 4.0;
77
78
79
80 // skip tid and prev variables
81 // loop variables
82
83
84
85
86
87
88
89 [&]() {
90 g = 2;
91 g1 = 2;
92 svar = 4;
93 sfvar = 8.0;
94
95 }();
96 }
97 }();
98 return 0;
99 #else
100 S<float> test;
101 int t_var = 0;
102 int vec[] = {1, 2};
103 S<float> s_arr[] = {1, 2};
104 S<float> &var = test;
105
106 #pragma omp target teams distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
107 for (int i = 0; i < 2; ++i) {
108 vec[i] = t_var;
109 s_arr[i] = var;
110 }
111 int i;
112
113 return tmain<int>();
114 #endif
115 }
116
117
118 // skip loop variables
119
120 // copy from parameters to local address variables
121
122 // prepare lastprivate targets
123
124 // the distribute loop
125
126 // lastprivates
127
128
129
130 // gbl and bound tid vars, prev lb and ub vars
131
132 // skip loop variables
133
134 // copy from parameters to local address variables
135
136 // prepare lastprivate targets
137
138 // the distribute loop
139 // skip body: code generation routine is same as distribute parallel for lastprivate
140
141 // lastprivates
142
143
144 // template tmain
145
146
147 // skip alloca of global_tid and bound_tid
148 // skip loop variables
149
150 // copy from parameters to local address variables
151
152 // prepare lastprivate targets
153
154
155 // lastprivates
156
157
158 // skip alloca of global_tid and bound_tid, and prev lb and ub vars
159
160 // skip loop variables
161
162 // copy from parameters to local address variables
163
164 // prepare lastprivate targets
165
166 // skip body: code generation routine is same as distribute parallel for lastprivate
167
168 // lastprivates
169
170
171 #endif
172 // CHECK1-LABEL: define {{[^@]+}}@main
173 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
174 // CHECK1-NEXT: entry:
175 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
176 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
177 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
178 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
179 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
180 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
181 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
182 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8
183 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
184 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
185 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
186 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
187 // CHECK1-NEXT: ret i32 0
188 //
189 //
190 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
191 // CHECK1-SAME: (i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR2:[0-9]+]] {
192 // CHECK1-NEXT: entry:
193 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
194 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
195 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
196 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
197 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
198 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8
199 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
200 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8
201 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8
202 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
203 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
204 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
205 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
206 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G1_ADDR]] to double*
207 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
208 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
209 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[G_ADDR]] to double*
210 // CHECK1-NEXT: store double* [[CONV]], double** [[TMP]], align 8
211 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
212 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile double, double* [[TMP0]], align 8
213 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[G1_CASTED]] to double*
214 // CHECK1-NEXT: store double [[TMP1]], double* [[CONV4]], align 8
215 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[G1_CASTED]], align 8
216 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4
217 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
218 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV5]], align 4
219 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
220 // CHECK1-NEXT: [[TMP5:%.*]] = load float, float* [[CONV2]], align 4
221 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
222 // CHECK1-NEXT: store float [[TMP5]], float* [[CONV6]], align 4
223 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8
224 // CHECK1-NEXT: [[TMP7:%.*]] = load double, double* [[CONV3]], align 8
225 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[G_CASTED]] to double*
226 // CHECK1-NEXT: store double [[TMP7]], double* [[CONV7]], align 8
227 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[G_CASTED]], align 8
228 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]])
229 // CHECK1-NEXT: ret void
230 //
231 //
232 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
233 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR2]] {
234 // CHECK1-NEXT: entry:
235 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
236 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
237 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
238 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
239 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
240 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
241 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
242 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
244 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
245 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
246 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
247 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
248 // CHECK1-NEXT: [[G5:%.*]] = alloca double, align 8
249 // CHECK1-NEXT: [[G16:%.*]] = alloca double, align 8
250 // CHECK1-NEXT: [[_TMP7:%.*]] = alloca double*, align 8
251 // CHECK1-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT: [[SFVAR9:%.*]] = alloca float, align 4
253 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
254 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8
255 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
256 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8
257 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8
258 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
259 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
260 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
261 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
262 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
263 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
264 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G1_ADDR]] to double*
265 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
266 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
267 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[G_ADDR]] to double*
268 // CHECK1-NEXT: store double* [[CONV]], double** [[TMP]], align 8
269 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
270 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
271 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
272 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
273 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
274 // CHECK1-NEXT: store double* [[G16]], double** [[_TMP7]], align 8
275 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
276 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
277 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
278 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
279 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
280 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
281 // CHECK1: cond.true:
282 // CHECK1-NEXT: br label [[COND_END:%.*]]
283 // CHECK1: cond.false:
284 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
285 // CHECK1-NEXT: br label [[COND_END]]
286 // CHECK1: cond.end:
287 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
288 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
289 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
290 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
291 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
292 // CHECK1: omp.inner.for.cond:
293 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
294 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
295 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
296 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
297 // CHECK1: omp.inner.for.body:
298 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4
299 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
300 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
301 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
302 // CHECK1-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP7]], align 8, !llvm.access.group !4
303 // CHECK1-NEXT: [[TMP13:%.*]] = load volatile double, double* [[TMP12]], align 8, !llvm.access.group !4
304 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[G1_CASTED]] to double*
305 // CHECK1-NEXT: store double [[TMP13]], double* [[CONV11]], align 8, !llvm.access.group !4
306 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[G1_CASTED]], align 8, !llvm.access.group !4
307 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[SVAR8]], align 4, !llvm.access.group !4
308 // CHECK1-NEXT: [[CONV12:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
309 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[CONV12]], align 4, !llvm.access.group !4
310 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8, !llvm.access.group !4
311 // CHECK1-NEXT: [[TMP17:%.*]] = load float, float* [[SFVAR9]], align 4, !llvm.access.group !4
312 // CHECK1-NEXT: [[CONV13:%.*]] = bitcast i64* [[SFVAR_CASTED]] to float*
313 // CHECK1-NEXT: store float [[TMP17]], float* [[CONV13]], align 4, !llvm.access.group !4
314 // CHECK1-NEXT: [[TMP18:%.*]] = load i64, i64* [[SFVAR_CASTED]], align 8, !llvm.access.group !4
315 // CHECK1-NEXT: [[TMP19:%.*]] = load double, double* [[G5]], align 8, !llvm.access.group !4
316 // CHECK1-NEXT: [[CONV14:%.*]] = bitcast i64* [[G_CASTED]] to double*
317 // CHECK1-NEXT: store double [[TMP19]], double* [[CONV14]], align 8, !llvm.access.group !4
318 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, i64* [[G_CASTED]], align 8, !llvm.access.group !4
319 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP14]], i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]]), !llvm.access.group !4
320 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
321 // CHECK1: omp.inner.for.inc:
322 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
323 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4
324 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
325 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
326 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
327 // CHECK1: omp.inner.for.end:
328 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
329 // CHECK1: omp.loop.exit:
330 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
331 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
332 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
333 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
334 // CHECK1: .omp.final.then:
335 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
336 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
337 // CHECK1: .omp.final.done:
338 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
339 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
340 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
341 // CHECK1: .omp.lastprivate.then:
342 // CHECK1-NEXT: [[TMP27:%.*]] = load double, double* [[G5]], align 8
343 // CHECK1-NEXT: store volatile double [[TMP27]], double* [[CONV3]], align 8
344 // CHECK1-NEXT: [[TMP28:%.*]] = load double*, double** [[_TMP7]], align 8
345 // CHECK1-NEXT: [[TMP29:%.*]] = load double, double* [[TMP28]], align 8
346 // CHECK1-NEXT: store volatile double [[TMP29]], double* [[TMP0]], align 8
347 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[SVAR8]], align 4
348 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[CONV1]], align 4
349 // CHECK1-NEXT: [[TMP31:%.*]] = load float, float* [[SFVAR9]], align 4
350 // CHECK1-NEXT: store float [[TMP31]], float* [[CONV2]], align 4
351 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
352 // CHECK1: .omp.lastprivate.done:
353 // CHECK1-NEXT: ret void
354 //
355 //
356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
357 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]], i64 noundef [[G:%.*]]) #[[ATTR2]] {
358 // CHECK1-NEXT: entry:
359 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
360 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
361 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
362 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
363 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
364 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
365 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
366 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
367 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
368 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
369 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
370 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
371 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
372 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
373 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
374 // CHECK1-NEXT: [[G7:%.*]] = alloca double, align 8
375 // CHECK1-NEXT: [[G18:%.*]] = alloca double, align 8
376 // CHECK1-NEXT: [[_TMP9:%.*]] = alloca double*, align 8
377 // CHECK1-NEXT: [[SVAR10:%.*]] = alloca i32, align 4
378 // CHECK1-NEXT: [[SFVAR11:%.*]] = alloca float, align 4
379 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
380 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
381 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
382 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
383 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
384 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
385 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
386 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
387 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
388 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
389 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G1_ADDR]] to double*
390 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
391 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
392 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[G_ADDR]] to double*
393 // CHECK1-NEXT: store double* [[CONV]], double** [[TMP]], align 8
394 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
395 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
396 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
397 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP0]] to i32
398 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
399 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP1]] to i32
400 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
401 // CHECK1-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
402 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
403 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
404 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 8
405 // CHECK1-NEXT: store double* [[G18]], double** [[_TMP9]], align 8
406 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
407 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
408 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
409 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
410 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
411 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
412 // CHECK1: cond.true:
413 // CHECK1-NEXT: br label [[COND_END:%.*]]
414 // CHECK1: cond.false:
415 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
416 // CHECK1-NEXT: br label [[COND_END]]
417 // CHECK1: cond.end:
418 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
419 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
420 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
421 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
422 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
423 // CHECK1: omp.inner.for.cond:
424 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
425 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
426 // CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
427 // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
428 // CHECK1: omp.inner.for.body:
429 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
430 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
431 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
432 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
433 // CHECK1-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP9]], align 8, !llvm.access.group !8
434 // CHECK1-NEXT: store volatile double 1.000000e+00, double* [[TMP11]], align 8, !llvm.access.group !8
435 // CHECK1-NEXT: store i32 3, i32* [[SVAR10]], align 4, !llvm.access.group !8
436 // CHECK1-NEXT: store float 4.000000e+00, float* [[SFVAR11]], align 4, !llvm.access.group !8
437 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
438 // CHECK1-NEXT: store double* [[G7]], double** [[TMP12]], align 8, !llvm.access.group !8
439 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
440 // CHECK1-NEXT: [[TMP14:%.*]] = load double*, double** [[_TMP9]], align 8, !llvm.access.group !8
441 // CHECK1-NEXT: store double* [[TMP14]], double** [[TMP13]], align 8, !llvm.access.group !8
442 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
443 // CHECK1-NEXT: store i32* [[SVAR10]], i32** [[TMP15]], align 8, !llvm.access.group !8
444 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
445 // CHECK1-NEXT: store float* [[SFVAR11]], float** [[TMP16]], align 8, !llvm.access.group !8
446 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group !8
447 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
448 // CHECK1: omp.body.continue:
449 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
450 // CHECK1: omp.inner.for.inc:
451 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
452 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP17]], 1
453 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
454 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
455 // CHECK1: omp.inner.for.end:
456 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
457 // CHECK1: omp.loop.exit:
458 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
459 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
460 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
461 // CHECK1-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
462 // CHECK1: .omp.final.then:
463 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
464 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
465 // CHECK1: .omp.final.done:
466 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
467 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
468 // CHECK1-NEXT: br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
469 // CHECK1: .omp.lastprivate.then:
470 // CHECK1-NEXT: [[TMP22:%.*]] = load double, double* [[G7]], align 8
471 // CHECK1-NEXT: store volatile double [[TMP22]], double* [[CONV3]], align 8
472 // CHECK1-NEXT: [[TMP23:%.*]] = load double*, double** [[_TMP9]], align 8
473 // CHECK1-NEXT: [[TMP24:%.*]] = load double, double* [[TMP23]], align 8
474 // CHECK1-NEXT: store volatile double [[TMP24]], double* [[TMP2]], align 8
475 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[SVAR10]], align 4
476 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[CONV1]], align 4
477 // CHECK1-NEXT: [[TMP26:%.*]] = load float, float* [[SFVAR11]], align 4
478 // CHECK1-NEXT: store float [[TMP26]], float* [[CONV2]], align 4
479 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
480 // CHECK1: .omp.lastprivate.done:
481 // CHECK1-NEXT: ret void
482 //
483 //
484 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
485 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
486 // CHECK1-NEXT: entry:
487 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
488 // CHECK1-NEXT: ret void
489 //
490 //
491 // CHECK3-LABEL: define {{[^@]+}}@main
492 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
493 // CHECK3-NEXT: entry:
494 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
495 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
496 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
497 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
498 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
499 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
500 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
501 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4
502 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
503 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
504 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
505 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
506 // CHECK3-NEXT: ret i32 0
507 //
508 //
509 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
510 // CHECK3-SAME: (double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR2:[0-9]+]] {
511 // CHECK3-NEXT: entry:
512 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
513 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
514 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
515 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
516 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
517 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
518 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4
519 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
520 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
521 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
522 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
523 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G1_ADDR]], align 4
524 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
525 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G_ADDR]], align 4
526 // CHECK3-NEXT: store double* [[TMP0]], double** [[TMP]], align 4
527 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4
528 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4
529 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[SVAR_CASTED]], align 4
530 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
531 // CHECK3-NEXT: [[TMP5:%.*]] = load float, float* [[CONV]], align 4
532 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float*
533 // CHECK3-NEXT: store float [[TMP5]], float* [[CONV1]], align 4
534 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4
535 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, i32, i32, double*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], double* [[TMP1]])
536 // CHECK3-NEXT: ret void
537 //
538 //
539 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
540 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR2]] {
541 // CHECK3-NEXT: entry:
542 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
543 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
544 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
545 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
546 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
547 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
548 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
549 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
550 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
551 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
552 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
553 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
554 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
555 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
556 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
557 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
558 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4
559 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4
560 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
561 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
562 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4
563 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
564 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
565 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
566 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
567 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
568 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
569 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G1_ADDR]], align 4
570 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
571 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G_ADDR]], align 4
572 // CHECK3-NEXT: store double* [[TMP0]], double** [[TMP]], align 4
573 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
574 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
575 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
576 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
577 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[TMP]], align 4
578 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
579 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
580 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
581 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
582 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
583 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
584 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
585 // CHECK3: cond.true:
586 // CHECK3-NEXT: br label [[COND_END:%.*]]
587 // CHECK3: cond.false:
588 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
589 // CHECK3-NEXT: br label [[COND_END]]
590 // CHECK3: cond.end:
591 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
592 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
593 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
594 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
595 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
596 // CHECK3: omp.inner.for.cond:
597 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
598 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
599 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
600 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
601 // CHECK3: omp.inner.for.body:
602 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5
603 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
604 // CHECK3-NEXT: [[TMP12:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !5
605 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[SVAR5]], align 4, !llvm.access.group !5
606 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[SVAR_CASTED]], align 4, !llvm.access.group !5
607 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4, !llvm.access.group !5
608 // CHECK3-NEXT: [[TMP15:%.*]] = load float, float* [[SFVAR6]], align 4, !llvm.access.group !5
609 // CHECK3-NEXT: [[CONV8:%.*]] = bitcast i32* [[SFVAR_CASTED]] to float*
610 // CHECK3-NEXT: store float [[TMP15]], float* [[CONV8]], align 4, !llvm.access.group !5
611 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[SFVAR_CASTED]], align 4, !llvm.access.group !5
612 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, double*, i32, i32, double*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP10]], i32 [[TMP11]], double* [[TMP12]], i32 [[TMP14]], i32 [[TMP16]], double* [[G2]]), !llvm.access.group !5
613 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
614 // CHECK3: omp.inner.for.inc:
615 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
616 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5
617 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
618 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
619 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
620 // CHECK3: omp.inner.for.end:
621 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
622 // CHECK3: omp.loop.exit:
623 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
624 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
625 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
626 // CHECK3-NEXT: br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
627 // CHECK3: .omp.final.then:
628 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
629 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
630 // CHECK3: .omp.final.done:
631 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
632 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
633 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
634 // CHECK3: .omp.lastprivate.then:
635 // CHECK3-NEXT: [[TMP23:%.*]] = load double, double* [[G2]], align 8
636 // CHECK3-NEXT: store volatile double [[TMP23]], double* [[TMP1]], align 8
637 // CHECK3-NEXT: [[TMP24:%.*]] = load double*, double** [[_TMP4]], align 4
638 // CHECK3-NEXT: [[TMP25:%.*]] = load double, double* [[TMP24]], align 4
639 // CHECK3-NEXT: store volatile double [[TMP25]], double* [[TMP2]], align 4
640 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[SVAR5]], align 4
641 // CHECK3-NEXT: store i32 [[TMP26]], i32* [[SVAR_ADDR]], align 4
642 // CHECK3-NEXT: [[TMP27:%.*]] = load float, float* [[SFVAR6]], align 4
643 // CHECK3-NEXT: store float [[TMP27]], float* [[CONV]], align 4
644 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
645 // CHECK3: .omp.lastprivate.done:
646 // CHECK3-NEXT: ret void
647 //
648 //
649 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
650 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]], double* noundef nonnull align 4 dereferenceable(8) [[G:%.*]]) #[[ATTR2]] {
651 // CHECK3-NEXT: entry:
652 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
653 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
654 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
655 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
656 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
657 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
658 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
659 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
660 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
661 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
662 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
663 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
664 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
665 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
666 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
667 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
668 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
669 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
670 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4
671 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4
672 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
673 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
674 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
675 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
676 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
677 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
678 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
679 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
680 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
681 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
682 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G1_ADDR]], align 4
683 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
684 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G_ADDR]], align 4
685 // CHECK3-NEXT: store double* [[TMP0]], double** [[TMP]], align 4
686 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
687 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
688 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
689 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
690 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_LB]], align 4
691 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_UB]], align 4
692 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
693 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
694 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
695 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
696 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
697 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
698 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
699 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
700 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
701 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
702 // CHECK3: cond.true:
703 // CHECK3-NEXT: br label [[COND_END:%.*]]
704 // CHECK3: cond.false:
705 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
706 // CHECK3-NEXT: br label [[COND_END]]
707 // CHECK3: cond.end:
708 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
709 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
710 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
711 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
712 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
713 // CHECK3: omp.inner.for.cond:
714 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
715 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
716 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
717 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
718 // CHECK3: omp.inner.for.body:
719 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
720 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
721 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
722 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
723 // CHECK3-NEXT: [[TMP13:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !9
724 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP13]], align 4, !llvm.access.group !9
725 // CHECK3-NEXT: store i32 3, i32* [[SVAR5]], align 4, !llvm.access.group !9
726 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR6]], align 4, !llvm.access.group !9
727 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
728 // CHECK3-NEXT: store double* [[G2]], double** [[TMP14]], align 4, !llvm.access.group !9
729 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
730 // CHECK3-NEXT: [[TMP16:%.*]] = load double*, double** [[_TMP4]], align 4, !llvm.access.group !9
731 // CHECK3-NEXT: store double* [[TMP16]], double** [[TMP15]], align 4, !llvm.access.group !9
732 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
733 // CHECK3-NEXT: store i32* [[SVAR5]], i32** [[TMP17]], align 4, !llvm.access.group !9
734 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
735 // CHECK3-NEXT: store float* [[SFVAR6]], float** [[TMP18]], align 4, !llvm.access.group !9
736 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group !9
737 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
738 // CHECK3: omp.body.continue:
739 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
740 // CHECK3: omp.inner.for.inc:
741 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
742 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
743 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
744 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
745 // CHECK3: omp.inner.for.end:
746 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
747 // CHECK3: omp.loop.exit:
748 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]])
749 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
750 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
751 // CHECK3-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
752 // CHECK3: .omp.final.then:
753 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
754 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
755 // CHECK3: .omp.final.done:
756 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
757 // CHECK3-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
758 // CHECK3-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
759 // CHECK3: .omp.lastprivate.then:
760 // CHECK3-NEXT: [[TMP24:%.*]] = load double, double* [[G2]], align 8
761 // CHECK3-NEXT: store volatile double [[TMP24]], double* [[TMP1]], align 8
762 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP4]], align 4
763 // CHECK3-NEXT: [[TMP26:%.*]] = load double, double* [[TMP25]], align 4
764 // CHECK3-NEXT: store volatile double [[TMP26]], double* [[TMP4]], align 4
765 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR5]], align 4
766 // CHECK3-NEXT: store i32 [[TMP27]], i32* [[SVAR_ADDR]], align 4
767 // CHECK3-NEXT: [[TMP28:%.*]] = load float, float* [[SFVAR6]], align 4
768 // CHECK3-NEXT: store float [[TMP28]], float* [[CONV]], align 4
769 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
770 // CHECK3: .omp.lastprivate.done:
771 // CHECK3-NEXT: ret void
772 //
773 //
774 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
775 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
776 // CHECK3-NEXT: entry:
777 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
778 // CHECK3-NEXT: ret void
779 //
780 //
781 // CHECK5-LABEL: define {{[^@]+}}@main
782 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
783 // CHECK5-NEXT: entry:
784 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
785 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8
786 // CHECK5-NEXT: [[G1:%.*]] = alloca double*, align 8
787 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
788 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
789 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
790 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
791 // CHECK5-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
792 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
793 // CHECK5-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
794 // CHECK5-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
795 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
796 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
797 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
798 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
799 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
800 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
801 // CHECK5-NEXT: store double* [[G]], double** [[G1]], align 8
802 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
803 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4
804 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
805 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
806 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
807 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
808 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
809 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
810 // CHECK5-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
811 // CHECK5-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
812 // CHECK5-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
813 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
814 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
815 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
816 // CHECK5-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
817 // CHECK5-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
818 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
819 // CHECK5-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
820 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
821 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
822 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
823 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
824 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8
825 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
826 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]**
827 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 8
828 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
829 // CHECK5-NEXT: store i8* null, i8** [[TMP11]], align 8
830 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
831 // CHECK5-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
832 // CHECK5-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8
833 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
834 // CHECK5-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
835 // CHECK5-NEXT: store i64 [[TMP3]], i64* [[TMP15]], align 8
836 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
837 // CHECK5-NEXT: store i8* null, i8** [[TMP16]], align 8
838 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
839 // CHECK5-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]**
840 // CHECK5-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 8
841 // CHECK5-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
842 // CHECK5-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
843 // CHECK5-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
844 // CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
845 // CHECK5-NEXT: store i8* null, i8** [[TMP21]], align 8
846 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
847 // CHECK5-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S**
848 // CHECK5-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 8
849 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
850 // CHECK5-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
851 // CHECK5-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 8
852 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
853 // CHECK5-NEXT: store i8* null, i8** [[TMP26]], align 8
854 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
855 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i64*
856 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP28]], align 8
857 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
858 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
859 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
860 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
861 // CHECK5-NEXT: store i8* null, i8** [[TMP31]], align 8
862 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
863 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
864 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
865 // CHECK5-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
866 // CHECK5-NEXT: store i32 1, i32* [[TMP34]], align 4
867 // CHECK5-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
868 // CHECK5-NEXT: store i32 5, i32* [[TMP35]], align 4
869 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
870 // CHECK5-NEXT: store i8** [[TMP32]], i8*** [[TMP36]], align 8
871 // CHECK5-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
872 // CHECK5-NEXT: store i8** [[TMP33]], i8*** [[TMP37]], align 8
873 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
874 // CHECK5-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8
875 // CHECK5-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
876 // CHECK5-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8
877 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
878 // CHECK5-NEXT: store i8** null, i8*** [[TMP40]], align 8
879 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
880 // CHECK5-NEXT: store i8** null, i8*** [[TMP41]], align 8
881 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
882 // CHECK5-NEXT: store i64 2, i64* [[TMP42]], align 8
883 // CHECK5-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
884 // CHECK5-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
885 // CHECK5-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
886 // CHECK5: omp_offload.failed:
887 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
888 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
889 // CHECK5: omp_offload.cont:
890 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
891 // CHECK5-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
892 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
893 // CHECK5-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
894 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
895 // CHECK5: arraydestroy.body:
896 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP45]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
897 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
898 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
899 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
900 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
901 // CHECK5: arraydestroy.done3:
902 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
903 // CHECK5-NEXT: [[TMP46:%.*]] = load i32, i32* [[RETVAL]], align 4
904 // CHECK5-NEXT: ret i32 [[TMP46]]
905 //
906 //
907 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
908 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
909 // CHECK5-NEXT: entry:
910 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
911 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
912 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
913 // CHECK5-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
914 // CHECK5-NEXT: ret void
915 //
916 //
917 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
918 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
919 // CHECK5-NEXT: entry:
920 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
921 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
922 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
923 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4
924 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
925 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
926 // CHECK5-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
927 // CHECK5-NEXT: ret void
928 //
929 //
930 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106
931 // CHECK5-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
932 // CHECK5-NEXT: entry:
933 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
934 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
935 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
936 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
937 // CHECK5-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
938 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
939 // CHECK5-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
940 // CHECK5-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
941 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
942 // CHECK5-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
943 // CHECK5-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
944 // CHECK5-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
945 // CHECK5-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
946 // CHECK5-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
947 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
948 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
949 // CHECK5-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
950 // CHECK5-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
951 // CHECK5-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
952 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
953 // CHECK5-NEXT: [[CONV2:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
954 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
955 // CHECK5-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
956 // CHECK5-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
957 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
958 // CHECK5-NEXT: [[CONV3:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
959 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[CONV3]], align 4
960 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
961 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i64 [[TMP7]])
962 // CHECK5-NEXT: ret void
963 //
964 //
965 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
966 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
967 // CHECK5-NEXT: entry:
968 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
969 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
970 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
971 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
972 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
973 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
974 // CHECK5-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
975 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
976 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
977 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
978 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
979 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
980 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
981 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
982 // CHECK5-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
983 // CHECK5-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
984 // CHECK5-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
985 // CHECK5-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
986 // CHECK5-NEXT: [[_TMP7:%.*]] = alloca %struct.S*, align 8
987 // CHECK5-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
988 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
989 // CHECK5-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
990 // CHECK5-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
991 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
992 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
993 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
994 // CHECK5-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
995 // CHECK5-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
996 // CHECK5-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
997 // CHECK5-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
998 // CHECK5-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
999 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1000 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1001 // CHECK5-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1002 // CHECK5-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1003 // CHECK5-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1004 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1005 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1006 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1007 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1008 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1009 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1010 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1011 // CHECK5: arrayctor.loop:
1012 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1013 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1014 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1015 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1016 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1017 // CHECK5: arrayctor.cont:
1018 // CHECK5-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1019 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1020 // CHECK5-NEXT: store %struct.S* [[VAR6]], %struct.S** [[_TMP7]], align 8
1021 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1022 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1023 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1024 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1025 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1026 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1027 // CHECK5: cond.true:
1028 // CHECK5-NEXT: br label [[COND_END:%.*]]
1029 // CHECK5: cond.false:
1030 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1031 // CHECK5-NEXT: br label [[COND_END]]
1032 // CHECK5: cond.end:
1033 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1034 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1035 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1036 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1037 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1038 // CHECK5: omp.inner.for.cond:
1039 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1040 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
1041 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1042 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1043 // CHECK5: omp.inner.for.cond.cleanup:
1044 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1045 // CHECK5: omp.inner.for.body:
1046 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5
1047 // CHECK5-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
1048 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
1049 // CHECK5-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
1050 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR3]], align 4, !llvm.access.group !5
1051 // CHECK5-NEXT: [[CONV10:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1052 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[CONV10]], align 4, !llvm.access.group !5
1053 // CHECK5-NEXT: [[TMP16:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8, !llvm.access.group !5
1054 // CHECK5-NEXT: [[TMP17:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8, !llvm.access.group !5
1055 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[SVAR8]], align 4, !llvm.access.group !5
1056 // CHECK5-NEXT: [[CONV11:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1057 // CHECK5-NEXT: store i32 [[TMP18]], i32* [[CONV11]], align 4, !llvm.access.group !5
1058 // CHECK5-NEXT: [[TMP19:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8, !llvm.access.group !5
1059 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S]*, %struct.S*, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP12]], i64 [[TMP14]], [2 x i32]* [[VEC4]], i64 [[TMP16]], [2 x %struct.S]* [[S_ARR5]], %struct.S* [[TMP17]], i64 [[TMP19]]), !llvm.access.group !5
1060 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1061 // CHECK5: omp.inner.for.inc:
1062 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1063 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5
1064 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1065 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
1066 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1067 // CHECK5: omp.inner.for.end:
1068 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1069 // CHECK5: omp.loop.exit:
1070 // CHECK5-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1071 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1072 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1073 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1074 // CHECK5-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1075 // CHECK5-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1076 // CHECK5: .omp.final.then:
1077 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
1078 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1079 // CHECK5: .omp.final.done:
1080 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1081 // CHECK5-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
1082 // CHECK5-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1083 // CHECK5: .omp.lastprivate.then:
1084 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[T_VAR3]], align 4
1085 // CHECK5-NEXT: store i32 [[TMP28]], i32* [[CONV]], align 4
1086 // CHECK5-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1087 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1088 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 8, i1 false)
1089 // CHECK5-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0
1090 // CHECK5-NEXT: [[TMP31:%.*]] = bitcast [2 x %struct.S]* [[S_ARR5]] to %struct.S*
1091 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
1092 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN12]], [[TMP32]]
1093 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1094 // CHECK5: omp.arraycpy.body:
1095 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP31]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1096 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1097 // CHECK5-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1098 // CHECK5-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1099 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false)
1100 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1101 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1102 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP32]]
1103 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1104 // CHECK5: omp.arraycpy.done13:
1105 // CHECK5-NEXT: [[TMP35:%.*]] = load %struct.S*, %struct.S** [[_TMP7]], align 8
1106 // CHECK5-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP3]] to i8*
1107 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast %struct.S* [[TMP35]] to i8*
1108 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP36]], i8* align 4 [[TMP37]], i64 4, i1 false)
1109 // CHECK5-NEXT: [[TMP38:%.*]] = load i32, i32* [[SVAR8]], align 4
1110 // CHECK5-NEXT: store i32 [[TMP38]], i32* [[CONV1]], align 4
1111 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1112 // CHECK5: .omp.lastprivate.done:
1113 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1114 // CHECK5-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1115 // CHECK5-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
1116 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1117 // CHECK5: arraydestroy.body:
1118 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP39]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1119 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1120 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1121 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1122 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1123 // CHECK5: arraydestroy.done15:
1124 // CHECK5-NEXT: ret void
1125 //
1126 //
1127 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
1128 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
1129 // CHECK5-NEXT: entry:
1130 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1131 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1132 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1133 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1134 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1135 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1136 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1137 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1138 // CHECK5-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
1139 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1140 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1141 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1142 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1143 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1144 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1145 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1146 // CHECK5-NEXT: [[T_VAR5:%.*]] = alloca i32, align 4
1147 // CHECK5-NEXT: [[VEC6:%.*]] = alloca [2 x i32], align 4
1148 // CHECK5-NEXT: [[S_ARR7:%.*]] = alloca [2 x %struct.S], align 4
1149 // CHECK5-NEXT: [[VAR8:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1150 // CHECK5-NEXT: [[_TMP9:%.*]] = alloca %struct.S*, align 8
1151 // CHECK5-NEXT: [[SVAR10:%.*]] = alloca i32, align 4
1152 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1153 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1154 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1155 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1156 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1157 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1158 // CHECK5-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1159 // CHECK5-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1160 // CHECK5-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1161 // CHECK5-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1162 // CHECK5-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1163 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1164 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1165 // CHECK5-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1166 // CHECK5-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1167 // CHECK5-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1168 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1169 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1170 // CHECK5-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1171 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP3]] to i32
1172 // CHECK5-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1173 // CHECK5-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP4]] to i32
1174 // CHECK5-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
1175 // CHECK5-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
1176 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1177 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1178 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR7]], i32 0, i32 0
1179 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1180 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1181 // CHECK5: arrayctor.loop:
1182 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1183 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1184 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
1185 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1186 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1187 // CHECK5: arrayctor.cont:
1188 // CHECK5-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1189 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR8]])
1190 // CHECK5-NEXT: store %struct.S* [[VAR8]], %struct.S** [[_TMP9]], align 8
1191 // CHECK5-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1192 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1193 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1194 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1195 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1196 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1197 // CHECK5: cond.true:
1198 // CHECK5-NEXT: br label [[COND_END:%.*]]
1199 // CHECK5: cond.false:
1200 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1201 // CHECK5-NEXT: br label [[COND_END]]
1202 // CHECK5: cond.end:
1203 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1204 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1205 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1206 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1207 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1208 // CHECK5: omp.inner.for.cond:
1209 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1210 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
1211 // CHECK5-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1212 // CHECK5-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1213 // CHECK5: omp.inner.for.cond.cleanup:
1214 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1215 // CHECK5: omp.inner.for.body:
1216 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1217 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1218 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1219 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
1220 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR5]], align 4, !llvm.access.group !9
1221 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
1222 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1223 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC6]], i64 0, i64 [[IDXPROM]]
1224 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
1225 // CHECK5-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8, !llvm.access.group !9
1226 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
1227 // CHECK5-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP17]] to i64
1228 // CHECK5-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR7]], i64 0, i64 [[IDXPROM12]]
1229 // CHECK5-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX13]] to i8*
1230 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8*
1231 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false), !llvm.access.group !9
1232 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1233 // CHECK5: omp.body.continue:
1234 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1235 // CHECK5: omp.inner.for.inc:
1236 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1237 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP20]], 1
1238 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1239 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1240 // CHECK5: omp.inner.for.end:
1241 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1242 // CHECK5: omp.loop.exit:
1243 // CHECK5-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1244 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1245 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1246 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1247 // CHECK5-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1248 // CHECK5-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1249 // CHECK5: .omp.final.then:
1250 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
1251 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1252 // CHECK5: .omp.final.done:
1253 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1254 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1255 // CHECK5-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1256 // CHECK5: .omp.lastprivate.then:
1257 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR5]], align 4
1258 // CHECK5-NEXT: store i32 [[TMP27]], i32* [[CONV]], align 4
1259 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1260 // CHECK5-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC6]] to i8*
1261 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
1262 // CHECK5-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0
1263 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR7]] to %struct.S*
1264 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
1265 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN15]], [[TMP31]]
1266 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE16:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1267 // CHECK5: omp.arraycpy.body:
1268 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1269 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN15]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1270 // CHECK5-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1271 // CHECK5-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1272 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
1273 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1274 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1275 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
1276 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE16]], label [[OMP_ARRAYCPY_BODY]]
1277 // CHECK5: omp.arraycpy.done16:
1278 // CHECK5-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP9]], align 8
1279 // CHECK5-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
1280 // CHECK5-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
1281 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
1282 // CHECK5-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR10]], align 4
1283 // CHECK5-NEXT: store i32 [[TMP37]], i32* [[CONV1]], align 4
1284 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1285 // CHECK5: .omp.lastprivate.done:
1286 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR8]]) #[[ATTR4]]
1287 // CHECK5-NEXT: [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR7]], i32 0, i32 0
1288 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN17]], i64 2
1289 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1290 // CHECK5: arraydestroy.body:
1291 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1292 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1293 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1294 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN17]]
1295 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE18:%.*]], label [[ARRAYDESTROY_BODY]]
1296 // CHECK5: arraydestroy.done18:
1297 // CHECK5-NEXT: ret void
1298 //
1299 //
1300 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1301 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1302 // CHECK5-NEXT: entry:
1303 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1304 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1305 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1306 // CHECK5-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1307 // CHECK5-NEXT: ret void
1308 //
1309 //
1310 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1311 // CHECK5-SAME: () #[[ATTR5:[0-9]+]] comdat {
1312 // CHECK5-NEXT: entry:
1313 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1314 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1315 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1316 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1317 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1318 // CHECK5-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1319 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1320 // CHECK5-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1321 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1322 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1323 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1324 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1325 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1326 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4
1327 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1328 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1329 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1330 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1331 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1332 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1333 // CHECK5-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1334 // CHECK5-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1335 // CHECK5-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1336 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1337 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1338 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1339 // CHECK5-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1340 // CHECK5-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1341 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1342 // CHECK5-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]**
1343 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 8
1344 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1345 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
1346 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 8
1347 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1348 // CHECK5-NEXT: store i8* null, i8** [[TMP9]], align 8
1349 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1350 // CHECK5-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i64*
1351 // CHECK5-NEXT: store i64 [[TMP3]], i64* [[TMP11]], align 8
1352 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1353 // CHECK5-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1354 // CHECK5-NEXT: store i64 [[TMP3]], i64* [[TMP13]], align 8
1355 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1356 // CHECK5-NEXT: store i8* null, i8** [[TMP14]], align 8
1357 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1358 // CHECK5-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]**
1359 // CHECK5-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 8
1360 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1361 // CHECK5-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1362 // CHECK5-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1363 // CHECK5-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1364 // CHECK5-NEXT: store i8* null, i8** [[TMP19]], align 8
1365 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1366 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0**
1367 // CHECK5-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 8
1368 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1369 // CHECK5-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1370 // CHECK5-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 8
1371 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1372 // CHECK5-NEXT: store i8* null, i8** [[TMP24]], align 8
1373 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1374 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1375 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1376 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1377 // CHECK5-NEXT: store i32 1, i32* [[TMP27]], align 4
1378 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1379 // CHECK5-NEXT: store i32 4, i32* [[TMP28]], align 4
1380 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1381 // CHECK5-NEXT: store i8** [[TMP25]], i8*** [[TMP29]], align 8
1382 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1383 // CHECK5-NEXT: store i8** [[TMP26]], i8*** [[TMP30]], align 8
1384 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1385 // CHECK5-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP31]], align 8
1386 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1387 // CHECK5-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP32]], align 8
1388 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1389 // CHECK5-NEXT: store i8** null, i8*** [[TMP33]], align 8
1390 // CHECK5-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1391 // CHECK5-NEXT: store i8** null, i8*** [[TMP34]], align 8
1392 // CHECK5-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1393 // CHECK5-NEXT: store i64 2, i64* [[TMP35]], align 8
1394 // CHECK5-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1395 // CHECK5-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1396 // CHECK5-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1397 // CHECK5: omp_offload.failed:
1398 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50([2 x i32]* [[VEC]], i64 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1399 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
1400 // CHECK5: omp_offload.cont:
1401 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
1402 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1403 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1404 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1405 // CHECK5: arraydestroy.body:
1406 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1407 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1408 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1409 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1410 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1411 // CHECK5: arraydestroy.done2:
1412 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1413 // CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1414 // CHECK5-NEXT: ret i32 [[TMP39]]
1415 //
1416 //
1417 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1418 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1419 // CHECK5-NEXT: entry:
1420 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1421 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1422 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1423 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1424 // CHECK5-NEXT: store float 0.000000e+00, float* [[F]], align 4
1425 // CHECK5-NEXT: ret void
1426 //
1427 //
1428 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1429 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1430 // CHECK5-NEXT: entry:
1431 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1432 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1433 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1434 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1435 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1436 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1437 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1438 // CHECK5-NEXT: store float [[TMP0]], float* [[F]], align 4
1439 // CHECK5-NEXT: ret void
1440 //
1441 //
1442 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1443 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1444 // CHECK5-NEXT: entry:
1445 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1446 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1447 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1448 // CHECK5-NEXT: ret void
1449 //
1450 //
1451 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1452 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1453 // CHECK5-NEXT: entry:
1454 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1455 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1456 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1457 // CHECK5-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1458 // CHECK5-NEXT: ret void
1459 //
1460 //
1461 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1462 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1463 // CHECK5-NEXT: entry:
1464 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1465 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1466 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1467 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1468 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1469 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1470 // CHECK5-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1471 // CHECK5-NEXT: ret void
1472 //
1473 //
1474 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50
1475 // CHECK5-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1476 // CHECK5-NEXT: entry:
1477 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1478 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1479 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1480 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1481 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1482 // CHECK5-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1483 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1484 // CHECK5-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1485 // CHECK5-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1486 // CHECK5-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1487 // CHECK5-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1488 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1489 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1490 // CHECK5-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1491 // CHECK5-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1492 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
1493 // CHECK5-NEXT: [[CONV1:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1494 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
1495 // CHECK5-NEXT: [[TMP4:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1496 // CHECK5-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1497 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i64 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]])
1498 // CHECK5-NEXT: ret void
1499 //
1500 //
1501 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
1502 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1503 // CHECK5-NEXT: entry:
1504 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1505 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1506 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1507 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1508 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1509 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1510 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1511 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1512 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1513 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1514 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1515 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1516 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1517 // CHECK5-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
1518 // CHECK5-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
1519 // CHECK5-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1520 // CHECK5-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1521 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
1522 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1523 // CHECK5-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1524 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1525 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1526 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1527 // CHECK5-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1528 // CHECK5-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1529 // CHECK5-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1530 // CHECK5-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1531 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1532 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1533 // CHECK5-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1534 // CHECK5-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1535 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1536 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1537 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1538 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1539 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1540 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1541 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1542 // CHECK5: arrayctor.loop:
1543 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1544 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1545 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1546 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1547 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1548 // CHECK5: arrayctor.cont:
1549 // CHECK5-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1550 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1551 // CHECK5-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
1552 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1553 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1554 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1555 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1556 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1557 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1558 // CHECK5: cond.true:
1559 // CHECK5-NEXT: br label [[COND_END:%.*]]
1560 // CHECK5: cond.false:
1561 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1562 // CHECK5-NEXT: br label [[COND_END]]
1563 // CHECK5: cond.end:
1564 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1565 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1566 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1567 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1568 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1569 // CHECK5: omp.inner.for.cond:
1570 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1571 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
1572 // CHECK5-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1573 // CHECK5-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1574 // CHECK5: omp.inner.for.cond.cleanup:
1575 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1576 // CHECK5: omp.inner.for.body:
1577 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
1578 // CHECK5-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
1579 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
1580 // CHECK5-NEXT: [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
1581 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !14
1582 // CHECK5-NEXT: [[CONV8:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1583 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[CONV8]], align 4, !llvm.access.group !14
1584 // CHECK5-NEXT: [[TMP16:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8, !llvm.access.group !14
1585 // CHECK5-NEXT: [[TMP17:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !14
1586 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [2 x i32]*, i64, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP12]], i64 [[TMP14]], [2 x i32]* [[VEC3]], i64 [[TMP16]], [2 x %struct.S.0]* [[S_ARR4]], %struct.S.0* [[TMP17]]), !llvm.access.group !14
1587 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1588 // CHECK5: omp.inner.for.inc:
1589 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1590 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
1591 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1592 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1593 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1594 // CHECK5: omp.inner.for.end:
1595 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1596 // CHECK5: omp.loop.exit:
1597 // CHECK5-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1598 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
1599 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
1600 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1601 // CHECK5-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1602 // CHECK5-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1603 // CHECK5: .omp.final.then:
1604 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
1605 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1606 // CHECK5: .omp.final.done:
1607 // CHECK5-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1608 // CHECK5-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1609 // CHECK5-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1610 // CHECK5: .omp.lastprivate.then:
1611 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
1612 // CHECK5-NEXT: store i32 [[TMP26]], i32* [[CONV]], align 4
1613 // CHECK5-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1614 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
1615 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 8, i1 false)
1616 // CHECK5-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0
1617 // CHECK5-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
1618 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2
1619 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP30]]
1620 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1621 // CHECK5: omp.arraycpy.body:
1622 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1623 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1624 // CHECK5-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1625 // CHECK5-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1626 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i64 4, i1 false)
1627 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1628 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1629 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
1630 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
1631 // CHECK5: omp.arraycpy.done10:
1632 // CHECK5-NEXT: [[TMP33:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8
1633 // CHECK5-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8*
1634 // CHECK5-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP33]] to i8*
1635 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
1636 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1637 // CHECK5: .omp.lastprivate.done:
1638 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1639 // CHECK5-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
1640 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i64 2
1641 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1642 // CHECK5: arraydestroy.body:
1643 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP36]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1644 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1645 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1646 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1647 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1648 // CHECK5: arraydestroy.done12:
1649 // CHECK5-NEXT: ret void
1650 //
1651 //
1652 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
1653 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1654 // CHECK5-NEXT: entry:
1655 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1656 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1657 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1658 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1659 // CHECK5-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1660 // CHECK5-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1661 // CHECK5-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1662 // CHECK5-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1663 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1664 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1665 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1666 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1667 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1668 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1669 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1670 // CHECK5-NEXT: [[T_VAR4:%.*]] = alloca i32, align 4
1671 // CHECK5-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
1672 // CHECK5-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
1673 // CHECK5-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1674 // CHECK5-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
1675 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1676 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1677 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1678 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1679 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1680 // CHECK5-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1681 // CHECK5-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1682 // CHECK5-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1683 // CHECK5-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1684 // CHECK5-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1685 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1686 // CHECK5-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1687 // CHECK5-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1688 // CHECK5-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1689 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1690 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1691 // CHECK5-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1692 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP3]] to i32
1693 // CHECK5-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1694 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP4]] to i32
1695 // CHECK5-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
1696 // CHECK5-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
1697 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1698 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1699 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
1700 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1701 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1702 // CHECK5: arrayctor.loop:
1703 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1704 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1705 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
1706 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1707 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1708 // CHECK5: arrayctor.cont:
1709 // CHECK5-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1710 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]])
1711 // CHECK5-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
1712 // CHECK5-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1713 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1714 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1715 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1716 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1717 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1718 // CHECK5: cond.true:
1719 // CHECK5-NEXT: br label [[COND_END:%.*]]
1720 // CHECK5: cond.false:
1721 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1722 // CHECK5-NEXT: br label [[COND_END]]
1723 // CHECK5: cond.end:
1724 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1725 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1726 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1727 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
1728 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1729 // CHECK5: omp.inner.for.cond:
1730 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1731 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
1732 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1733 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1734 // CHECK5: omp.inner.for.cond.cleanup:
1735 // CHECK5-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1736 // CHECK5: omp.inner.for.body:
1737 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1738 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1739 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1740 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
1741 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR4]], align 4, !llvm.access.group !17
1742 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17
1743 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1744 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC5]], i64 0, i64 [[IDXPROM]]
1745 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
1746 // CHECK5-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8, !llvm.access.group !17
1747 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17
1748 // CHECK5-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP17]] to i64
1749 // CHECK5-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i64 0, i64 [[IDXPROM10]]
1750 // CHECK5-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8*
1751 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
1752 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 4, i1 false), !llvm.access.group !17
1753 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1754 // CHECK5: omp.body.continue:
1755 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1756 // CHECK5: omp.inner.for.inc:
1757 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1758 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP20]], 1
1759 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1760 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1761 // CHECK5: omp.inner.for.end:
1762 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1763 // CHECK5: omp.loop.exit:
1764 // CHECK5-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1765 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1766 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1767 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1768 // CHECK5-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1769 // CHECK5-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1770 // CHECK5: .omp.final.then:
1771 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
1772 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1773 // CHECK5: .omp.final.done:
1774 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1775 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1776 // CHECK5-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1777 // CHECK5: .omp.lastprivate.then:
1778 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR4]], align 4
1779 // CHECK5-NEXT: store i32 [[TMP27]], i32* [[CONV]], align 4
1780 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
1781 // CHECK5-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC5]] to i8*
1782 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i64 8, i1 false)
1783 // CHECK5-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0
1784 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR6]] to %struct.S.0*
1785 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
1786 // CHECK5-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN13]], [[TMP31]]
1787 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1788 // CHECK5: omp.arraycpy.body:
1789 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1790 // CHECK5-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1791 // CHECK5-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1792 // CHECK5-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1793 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
1794 // CHECK5-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1795 // CHECK5-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1796 // CHECK5-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
1797 // CHECK5-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1798 // CHECK5: omp.arraycpy.done14:
1799 // CHECK5-NEXT: [[TMP34:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
1800 // CHECK5-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
1801 // CHECK5-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[TMP34]] to i8*
1802 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
1803 // CHECK5-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1804 // CHECK5: .omp.lastprivate.done:
1805 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1806 // CHECK5-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR6]], i32 0, i32 0
1807 // CHECK5-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN15]], i64 2
1808 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1809 // CHECK5: arraydestroy.body:
1810 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1811 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1812 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1813 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1814 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1815 // CHECK5: arraydestroy.done16:
1816 // CHECK5-NEXT: ret void
1817 //
1818 //
1819 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1820 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1821 // CHECK5-NEXT: entry:
1822 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1823 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1824 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1825 // CHECK5-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1826 // CHECK5-NEXT: ret void
1827 //
1828 //
1829 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1830 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1831 // CHECK5-NEXT: entry:
1832 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1833 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1834 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1835 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1836 // CHECK5-NEXT: store i32 0, i32* [[F]], align 4
1837 // CHECK5-NEXT: ret void
1838 //
1839 //
1840 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1841 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1842 // CHECK5-NEXT: entry:
1843 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1844 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1845 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1846 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1847 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1848 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1849 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1850 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1851 // CHECK5-NEXT: ret void
1852 //
1853 //
1854 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1855 // CHECK5-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1856 // CHECK5-NEXT: entry:
1857 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1858 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1859 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1860 // CHECK5-NEXT: ret void
1861 //
1862 //
1863 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1864 // CHECK5-SAME: () #[[ATTR6:[0-9]+]] {
1865 // CHECK5-NEXT: entry:
1866 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
1867 // CHECK5-NEXT: ret void
1868 //
1869 //
1870 // CHECK7-LABEL: define {{[^@]+}}@main
1871 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
1872 // CHECK7-NEXT: entry:
1873 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1874 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8
1875 // CHECK7-NEXT: [[G1:%.*]] = alloca double*, align 4
1876 // CHECK7-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1877 // CHECK7-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1878 // CHECK7-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1879 // CHECK7-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1880 // CHECK7-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
1881 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
1882 // CHECK7-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1883 // CHECK7-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1884 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1885 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1886 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1887 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1888 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
1889 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
1890 // CHECK7-NEXT: store double* [[G]], double** [[G1]], align 4
1891 // CHECK7-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1892 // CHECK7-NEXT: store i32 0, i32* [[T_VAR]], align 4
1893 // CHECK7-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1894 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
1895 // CHECK7-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1896 // CHECK7-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1897 // CHECK7-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
1898 // CHECK7-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1899 // CHECK7-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
1900 // CHECK7-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
1901 // CHECK7-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
1902 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1903 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
1904 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1905 // CHECK7-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
1906 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1907 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
1908 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
1909 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1910 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
1911 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4
1912 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1913 // CHECK7-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [2 x i32]**
1914 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP10]], align 4
1915 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1916 // CHECK7-NEXT: store i8* null, i8** [[TMP11]], align 4
1917 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1918 // CHECK7-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1919 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4
1920 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1921 // CHECK7-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1922 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[TMP15]], align 4
1923 // CHECK7-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1924 // CHECK7-NEXT: store i8* null, i8** [[TMP16]], align 4
1925 // CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1926 // CHECK7-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S]**
1927 // CHECK7-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP18]], align 4
1928 // CHECK7-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1929 // CHECK7-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1930 // CHECK7-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
1931 // CHECK7-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1932 // CHECK7-NEXT: store i8* null, i8** [[TMP21]], align 4
1933 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1934 // CHECK7-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S**
1935 // CHECK7-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP23]], align 4
1936 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1937 // CHECK7-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1938 // CHECK7-NEXT: store %struct.S* [[TMP4]], %struct.S** [[TMP25]], align 4
1939 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1940 // CHECK7-NEXT: store i8* null, i8** [[TMP26]], align 4
1941 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1942 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32*
1943 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[TMP28]], align 4
1944 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1945 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1946 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
1947 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1948 // CHECK7-NEXT: store i8* null, i8** [[TMP31]], align 4
1949 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1950 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1951 // CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1952 // CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1953 // CHECK7-NEXT: store i32 1, i32* [[TMP34]], align 4
1954 // CHECK7-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1955 // CHECK7-NEXT: store i32 5, i32* [[TMP35]], align 4
1956 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1957 // CHECK7-NEXT: store i8** [[TMP32]], i8*** [[TMP36]], align 4
1958 // CHECK7-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1959 // CHECK7-NEXT: store i8** [[TMP33]], i8*** [[TMP37]], align 4
1960 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1961 // CHECK7-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 4
1962 // CHECK7-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1963 // CHECK7-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 4
1964 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1965 // CHECK7-NEXT: store i8** null, i8*** [[TMP40]], align 4
1966 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1967 // CHECK7-NEXT: store i8** null, i8*** [[TMP41]], align 4
1968 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1969 // CHECK7-NEXT: store i64 2, i64* [[TMP42]], align 8
1970 // CHECK7-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1971 // CHECK7-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
1972 // CHECK7-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1973 // CHECK7: omp_offload.failed:
1974 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
1975 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
1976 // CHECK7: omp_offload.cont:
1977 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1978 // CHECK7-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1979 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1980 // CHECK7-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1981 // CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1982 // CHECK7: arraydestroy.body:
1983 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP45]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1984 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1985 // CHECK7-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1986 // CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1987 // CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1988 // CHECK7: arraydestroy.done2:
1989 // CHECK7-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1990 // CHECK7-NEXT: [[TMP46:%.*]] = load i32, i32* [[RETVAL]], align 4
1991 // CHECK7-NEXT: ret i32 [[TMP46]]
1992 //
1993 //
1994 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1995 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1996 // CHECK7-NEXT: entry:
1997 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1998 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1999 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2000 // CHECK7-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2001 // CHECK7-NEXT: ret void
2002 //
2003 //
2004 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2005 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2006 // CHECK7-NEXT: entry:
2007 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2008 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2009 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2010 // CHECK7-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2011 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2012 // CHECK7-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2013 // CHECK7-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2014 // CHECK7-NEXT: ret void
2015 //
2016 //
2017 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l106
2018 // CHECK7-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2019 // CHECK7-NEXT: entry:
2020 // CHECK7-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2021 // CHECK7-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2022 // CHECK7-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2023 // CHECK7-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2024 // CHECK7-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
2025 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2026 // CHECK7-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2027 // CHECK7-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
2028 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2029 // CHECK7-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2030 // CHECK7-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2031 // CHECK7-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2032 // CHECK7-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2033 // CHECK7-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2034 // CHECK7-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2035 // CHECK7-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2036 // CHECK7-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2037 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
2038 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4
2039 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2040 // CHECK7-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2041 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_ADDR]], align 4
2042 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[SVAR_CASTED]], align 4
2043 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2044 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined. to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP5]], i32 [[TMP7]])
2045 // CHECK7-NEXT: ret void
2046 //
2047 //
2048 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
2049 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
2050 // CHECK7-NEXT: entry:
2051 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2052 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2053 // CHECK7-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2054 // CHECK7-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2055 // CHECK7-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2056 // CHECK7-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2057 // CHECK7-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
2058 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2059 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2060 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2061 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2062 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2063 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2064 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2065 // CHECK7-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
2066 // CHECK7-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
2067 // CHECK7-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2068 // CHECK7-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2069 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
2070 // CHECK7-NEXT: [[SVAR7:%.*]] = alloca i32, align 4
2071 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
2072 // CHECK7-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2073 // CHECK7-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
2074 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2075 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2076 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2077 // CHECK7-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2078 // CHECK7-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2079 // CHECK7-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2080 // CHECK7-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2081 // CHECK7-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2082 // CHECK7-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2083 // CHECK7-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2084 // CHECK7-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2085 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2086 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2087 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2088 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2089 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
2090 // CHECK7-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2091 // CHECK7-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2092 // CHECK7: arrayctor.loop:
2093 // CHECK7-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2094 // CHECK7-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2095 // CHECK7-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2096 // CHECK7-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2097 // CHECK7-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2098 // CHECK7: arrayctor.cont:
2099 // CHECK7-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2100 // CHECK7-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2101 // CHECK7-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
2102 // CHECK7-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2103 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
2104 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2105 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2106 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
2107 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2108 // CHECK7: cond.true:
2109 // CHECK7-NEXT: br label [[COND_END:%.*]]
2110 // CHECK7: cond.false:
2111 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2112 // CHECK7-NEXT: br label [[COND_END]]
2113 // CHECK7: cond.end:
2114 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2115 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2116 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2117 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2118 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2119 // CHECK7: omp.inner.for.cond:
2120 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2121 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6
2122 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2123 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2124 // CHECK7: omp.inner.for.cond.cleanup:
2125 // CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2126 // CHECK7: omp.inner.for.body:
2127 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6
2128 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6
2129 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
2130 // CHECK7-NEXT: store i32 [[TMP13]], i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !6
2131 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !6
2132 // CHECK7-NEXT: [[TMP15:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !6
2133 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[SVAR7]], align 4, !llvm.access.group !6
2134 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[SVAR_CASTED]], align 4, !llvm.access.group !6
2135 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4, !llvm.access.group !6
2136 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S]*, %struct.S*, i32)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP11]], i32 [[TMP12]], [2 x i32]* [[VEC3]], i32 [[TMP14]], [2 x %struct.S]* [[S_ARR4]], %struct.S* [[TMP15]], i32 [[TMP17]]), !llvm.access.group !6
2137 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2138 // CHECK7: omp.inner.for.inc:
2139 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2140 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6
2141 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2142 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2143 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2144 // CHECK7: omp.inner.for.end:
2145 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2146 // CHECK7: omp.loop.exit:
2147 // CHECK7-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2148 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2149 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
2150 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2151 // CHECK7-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2152 // CHECK7-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2153 // CHECK7: .omp.final.then:
2154 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
2155 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
2156 // CHECK7: .omp.final.done:
2157 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2158 // CHECK7-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2159 // CHECK7-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2160 // CHECK7: .omp.lastprivate.then:
2161 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[T_VAR2]], align 4
2162 // CHECK7-NEXT: store i32 [[TMP26]], i32* [[T_VAR_ADDR]], align 4
2163 // CHECK7-NEXT: [[TMP27:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2164 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
2165 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 8, i1 false)
2166 // CHECK7-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0
2167 // CHECK7-NEXT: [[TMP29:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
2168 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2
2169 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP30]]
2170 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2171 // CHECK7: omp.arraycpy.body:
2172 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP29]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2173 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2174 // CHECK7-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2175 // CHECK7-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2176 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP31]], i8* align 4 [[TMP32]], i32 4, i1 false)
2177 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2178 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2179 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP30]]
2180 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
2181 // CHECK7: omp.arraycpy.done10:
2182 // CHECK7-NEXT: [[TMP33:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
2183 // CHECK7-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP3]] to i8*
2184 // CHECK7-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP33]] to i8*
2185 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i32 4, i1 false)
2186 // CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[SVAR7]], align 4
2187 // CHECK7-NEXT: store i32 [[TMP36]], i32* [[SVAR_ADDR]], align 4
2188 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2189 // CHECK7: .omp.lastprivate.done:
2190 // CHECK7-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2191 // CHECK7-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
2192 // CHECK7-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
2193 // CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2194 // CHECK7: arraydestroy.body:
2195 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2196 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2197 // CHECK7-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2198 // CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
2199 // CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
2200 // CHECK7: arraydestroy.done12:
2201 // CHECK7-NEXT: ret void
2202 //
2203 //
2204 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
2205 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
2206 // CHECK7-NEXT: entry:
2207 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2208 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2209 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2210 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2211 // CHECK7-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2212 // CHECK7-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2213 // CHECK7-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2214 // CHECK7-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2215 // CHECK7-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
2216 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2217 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2218 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2219 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2220 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2221 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2222 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2223 // CHECK7-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
2224 // CHECK7-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
2225 // CHECK7-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2226 // CHECK7-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2227 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
2228 // CHECK7-NEXT: [[SVAR7:%.*]] = alloca i32, align 4
2229 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
2230 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2231 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2232 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2233 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2234 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2235 // CHECK7-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2236 // CHECK7-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2237 // CHECK7-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2238 // CHECK7-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2239 // CHECK7-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2240 // CHECK7-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2241 // CHECK7-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2242 // CHECK7-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2243 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2244 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2245 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2246 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2247 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
2248 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2249 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2250 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2251 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
2252 // CHECK7-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2253 // CHECK7-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2254 // CHECK7: arrayctor.loop:
2255 // CHECK7-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2256 // CHECK7-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2257 // CHECK7-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
2258 // CHECK7-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2259 // CHECK7-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2260 // CHECK7: arrayctor.cont:
2261 // CHECK7-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2262 // CHECK7-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2263 // CHECK7-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
2264 // CHECK7-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2265 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2266 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2267 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2268 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2269 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2270 // CHECK7: cond.true:
2271 // CHECK7-NEXT: br label [[COND_END:%.*]]
2272 // CHECK7: cond.false:
2273 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2274 // CHECK7-NEXT: br label [[COND_END]]
2275 // CHECK7: cond.end:
2276 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2277 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2278 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2279 // CHECK7-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2280 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2281 // CHECK7: omp.inner.for.cond:
2282 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2283 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
2284 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2285 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2286 // CHECK7: omp.inner.for.cond.cleanup:
2287 // CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2288 // CHECK7: omp.inner.for.body:
2289 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2290 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2291 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2292 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
2293 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !10
2294 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
2295 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]]
2296 // CHECK7-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
2297 // CHECK7-NEXT: [[TMP16:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !10
2298 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
2299 // CHECK7-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP17]]
2300 // CHECK7-NEXT: [[TMP18:%.*]] = bitcast %struct.S* [[ARRAYIDX9]] to i8*
2301 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[TMP16]] to i8*
2302 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false), !llvm.access.group !10
2303 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2304 // CHECK7: omp.body.continue:
2305 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2306 // CHECK7: omp.inner.for.inc:
2307 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2308 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
2309 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2310 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2311 // CHECK7: omp.inner.for.end:
2312 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2313 // CHECK7: omp.loop.exit:
2314 // CHECK7-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2315 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2316 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2317 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2318 // CHECK7-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2319 // CHECK7-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2320 // CHECK7: .omp.final.then:
2321 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
2322 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
2323 // CHECK7: .omp.final.done:
2324 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2325 // CHECK7-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2326 // CHECK7-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2327 // CHECK7: .omp.lastprivate.then:
2328 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
2329 // CHECK7-NEXT: store i32 [[TMP27]], i32* [[T_VAR_ADDR]], align 4
2330 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2331 // CHECK7-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
2332 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
2333 // CHECK7-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP1]], i32 0, i32 0
2334 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
2335 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
2336 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN11]], [[TMP31]]
2337 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2338 // CHECK7: omp.arraycpy.body:
2339 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2340 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2341 // CHECK7-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2342 // CHECK7-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2343 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
2344 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2345 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2346 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
2347 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2348 // CHECK7: omp.arraycpy.done12:
2349 // CHECK7-NEXT: [[TMP34:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
2350 // CHECK7-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP5]] to i8*
2351 // CHECK7-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[TMP34]] to i8*
2352 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
2353 // CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[SVAR7]], align 4
2354 // CHECK7-NEXT: store i32 [[TMP37]], i32* [[SVAR_ADDR]], align 4
2355 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2356 // CHECK7: .omp.lastprivate.done:
2357 // CHECK7-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2358 // CHECK7-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
2359 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
2360 // CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2361 // CHECK7: arraydestroy.body:
2362 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2363 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2364 // CHECK7-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2365 // CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2366 // CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2367 // CHECK7: arraydestroy.done14:
2368 // CHECK7-NEXT: ret void
2369 //
2370 //
2371 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2372 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2373 // CHECK7-NEXT: entry:
2374 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2375 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2376 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2377 // CHECK7-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2378 // CHECK7-NEXT: ret void
2379 //
2380 //
2381 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2382 // CHECK7-SAME: () #[[ATTR5:[0-9]+]] comdat {
2383 // CHECK7-NEXT: entry:
2384 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2385 // CHECK7-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2386 // CHECK7-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2387 // CHECK7-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2388 // CHECK7-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2389 // CHECK7-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
2390 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2391 // CHECK7-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2392 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
2393 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
2394 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
2395 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2396 // CHECK7-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
2397 // CHECK7-NEXT: store i32 0, i32* [[T_VAR]], align 4
2398 // CHECK7-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2399 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2400 // CHECK7-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2401 // CHECK7-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
2402 // CHECK7-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2403 // CHECK7-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2404 // CHECK7-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2405 // CHECK7-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
2406 // CHECK7-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
2407 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2408 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2409 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2410 // CHECK7-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2411 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2412 // CHECK7-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to [2 x i32]**
2413 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP6]], align 4
2414 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2415 // CHECK7-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to [2 x i32]**
2416 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP8]], align 4
2417 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2418 // CHECK7-NEXT: store i8* null, i8** [[TMP9]], align 4
2419 // CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2420 // CHECK7-NEXT: [[TMP11:%.*]] = bitcast i8** [[TMP10]] to i32*
2421 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[TMP11]], align 4
2422 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2423 // CHECK7-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
2424 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[TMP13]], align 4
2425 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2426 // CHECK7-NEXT: store i8* null, i8** [[TMP14]], align 4
2427 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2428 // CHECK7-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to [2 x %struct.S.0]**
2429 // CHECK7-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP16]], align 4
2430 // CHECK7-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2431 // CHECK7-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2432 // CHECK7-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
2433 // CHECK7-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2434 // CHECK7-NEXT: store i8* null, i8** [[TMP19]], align 4
2435 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2436 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to %struct.S.0**
2437 // CHECK7-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP21]], align 4
2438 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2439 // CHECK7-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2440 // CHECK7-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[TMP23]], align 4
2441 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2442 // CHECK7-NEXT: store i8* null, i8** [[TMP24]], align 4
2443 // CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2444 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2445 // CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2446 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2447 // CHECK7-NEXT: store i32 1, i32* [[TMP27]], align 4
2448 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2449 // CHECK7-NEXT: store i32 4, i32* [[TMP28]], align 4
2450 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2451 // CHECK7-NEXT: store i8** [[TMP25]], i8*** [[TMP29]], align 4
2452 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2453 // CHECK7-NEXT: store i8** [[TMP26]], i8*** [[TMP30]], align 4
2454 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2455 // CHECK7-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP31]], align 4
2456 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2457 // CHECK7-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP32]], align 4
2458 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2459 // CHECK7-NEXT: store i8** null, i8*** [[TMP33]], align 4
2460 // CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2461 // CHECK7-NEXT: store i8** null, i8*** [[TMP34]], align 4
2462 // CHECK7-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2463 // CHECK7-NEXT: store i64 2, i64* [[TMP35]], align 8
2464 // CHECK7-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2465 // CHECK7-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2466 // CHECK7-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2467 // CHECK7: omp_offload.failed:
2468 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50([2 x i32]* [[VEC]], i32 [[TMP3]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2469 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
2470 // CHECK7: omp_offload.cont:
2471 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
2472 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2473 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2474 // CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2475 // CHECK7: arraydestroy.body:
2476 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2477 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2478 // CHECK7-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2479 // CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2480 // CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2481 // CHECK7: arraydestroy.done2:
2482 // CHECK7-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2483 // CHECK7-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2484 // CHECK7-NEXT: ret i32 [[TMP39]]
2485 //
2486 //
2487 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2488 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2489 // CHECK7-NEXT: entry:
2490 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2491 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2492 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2493 // CHECK7-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2494 // CHECK7-NEXT: store float 0.000000e+00, float* [[F]], align 4
2495 // CHECK7-NEXT: ret void
2496 //
2497 //
2498 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2499 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2500 // CHECK7-NEXT: entry:
2501 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2502 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2503 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2504 // CHECK7-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2505 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2506 // CHECK7-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2507 // CHECK7-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2508 // CHECK7-NEXT: store float [[TMP0]], float* [[F]], align 4
2509 // CHECK7-NEXT: ret void
2510 //
2511 //
2512 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2513 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2514 // CHECK7-NEXT: entry:
2515 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2516 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2517 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2518 // CHECK7-NEXT: ret void
2519 //
2520 //
2521 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2522 // CHECK7-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2523 // CHECK7-NEXT: entry:
2524 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2525 // CHECK7-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2526 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2527 // CHECK7-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2528 // CHECK7-NEXT: ret void
2529 //
2530 //
2531 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2532 // CHECK7-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2533 // CHECK7-NEXT: entry:
2534 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2535 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2536 // CHECK7-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2537 // CHECK7-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2538 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2539 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2540 // CHECK7-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2541 // CHECK7-NEXT: ret void
2542 //
2543 //
2544 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l50
2545 // CHECK7-SAME: ([2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2546 // CHECK7-NEXT: entry:
2547 // CHECK7-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2548 // CHECK7-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2549 // CHECK7-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2550 // CHECK7-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2551 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2552 // CHECK7-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2553 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2554 // CHECK7-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2555 // CHECK7-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2556 // CHECK7-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2557 // CHECK7-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2558 // CHECK7-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2559 // CHECK7-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2560 // CHECK7-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2561 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_ADDR]], align 4
2562 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[T_VAR_CASTED]], align 4
2563 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2564 // CHECK7-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2565 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [2 x i32]* [[TMP0]], i32 [[TMP4]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP5]])
2566 // CHECK7-NEXT: ret void
2567 //
2568 //
2569 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
2570 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2571 // CHECK7-NEXT: entry:
2572 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2573 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2574 // CHECK7-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2575 // CHECK7-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2576 // CHECK7-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2577 // CHECK7-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2578 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2579 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2580 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2581 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2582 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2583 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2584 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2585 // CHECK7-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
2586 // CHECK7-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
2587 // CHECK7-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2588 // CHECK7-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2589 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
2590 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
2591 // CHECK7-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2592 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2593 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2594 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2595 // CHECK7-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2596 // CHECK7-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2597 // CHECK7-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2598 // CHECK7-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2599 // CHECK7-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2600 // CHECK7-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2601 // CHECK7-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2602 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2603 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
2604 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2605 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2606 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2607 // CHECK7-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2608 // CHECK7-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2609 // CHECK7: arrayctor.loop:
2610 // CHECK7-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2611 // CHECK7-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2612 // CHECK7-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2613 // CHECK7-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2614 // CHECK7-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2615 // CHECK7: arrayctor.cont:
2616 // CHECK7-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2617 // CHECK7-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2618 // CHECK7-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
2619 // CHECK7-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2620 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
2621 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2622 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2623 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
2624 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2625 // CHECK7: cond.true:
2626 // CHECK7-NEXT: br label [[COND_END:%.*]]
2627 // CHECK7: cond.false:
2628 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2629 // CHECK7-NEXT: br label [[COND_END]]
2630 // CHECK7: cond.end:
2631 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2632 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2633 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2634 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2635 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2636 // CHECK7: omp.inner.for.cond:
2637 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2638 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
2639 // CHECK7-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2640 // CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2641 // CHECK7: omp.inner.for.cond.cleanup:
2642 // CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2643 // CHECK7: omp.inner.for.body:
2644 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15
2645 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
2646 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !15
2647 // CHECK7-NEXT: store i32 [[TMP13]], i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !15
2648 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4, !llvm.access.group !15
2649 // CHECK7-NEXT: [[TMP15:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !15
2650 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [2 x i32]*, i32, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP11]], i32 [[TMP12]], [2 x i32]* [[VEC3]], i32 [[TMP14]], [2 x %struct.S.0]* [[S_ARR4]], %struct.S.0* [[TMP15]]), !llvm.access.group !15
2651 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2652 // CHECK7: omp.inner.for.inc:
2653 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2654 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15
2655 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2656 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2657 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2658 // CHECK7: omp.inner.for.end:
2659 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2660 // CHECK7: omp.loop.exit:
2661 // CHECK7-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2662 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2663 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2664 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2665 // CHECK7-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2666 // CHECK7-NEXT: br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2667 // CHECK7: .omp.final.then:
2668 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
2669 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
2670 // CHECK7: .omp.final.done:
2671 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2672 // CHECK7-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2673 // CHECK7-NEXT: br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2674 // CHECK7: .omp.lastprivate.then:
2675 // CHECK7-NEXT: [[TMP24:%.*]] = load i32, i32* [[T_VAR2]], align 4
2676 // CHECK7-NEXT: store i32 [[TMP24]], i32* [[T_VAR_ADDR]], align 4
2677 // CHECK7-NEXT: [[TMP25:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2678 // CHECK7-NEXT: [[TMP26:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
2679 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 8, i1 false)
2680 // CHECK7-NEXT: [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0
2681 // CHECK7-NEXT: [[TMP27:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
2682 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN8]], i32 2
2683 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN8]], [[TMP28]]
2684 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2685 // CHECK7: omp.arraycpy.body:
2686 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2687 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN8]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2688 // CHECK7-NEXT: [[TMP29:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2689 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2690 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false)
2691 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2692 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2693 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
2694 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
2695 // CHECK7: omp.arraycpy.done9:
2696 // CHECK7-NEXT: [[TMP31:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
2697 // CHECK7-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8*
2698 // CHECK7-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[TMP31]] to i8*
2699 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
2700 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2701 // CHECK7: .omp.lastprivate.done:
2702 // CHECK7-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2703 // CHECK7-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2704 // CHECK7-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
2705 // CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2706 // CHECK7: arraydestroy.body:
2707 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP34]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2708 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2709 // CHECK7-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2710 // CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2711 // CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2712 // CHECK7: arraydestroy.done11:
2713 // CHECK7-NEXT: ret void
2714 //
2715 //
2716 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
2717 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2718 // CHECK7-NEXT: entry:
2719 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2720 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2721 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2722 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2723 // CHECK7-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2724 // CHECK7-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2725 // CHECK7-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2726 // CHECK7-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2727 // CHECK7-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2728 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2729 // CHECK7-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2730 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2731 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2732 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2733 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2734 // CHECK7-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
2735 // CHECK7-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
2736 // CHECK7-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2737 // CHECK7-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2738 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
2739 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
2740 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2741 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2742 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2743 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2744 // CHECK7-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2745 // CHECK7-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2746 // CHECK7-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2747 // CHECK7-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2748 // CHECK7-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2749 // CHECK7-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2750 // CHECK7-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2751 // CHECK7-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2752 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2753 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2754 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2755 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2756 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_LB]], align 4
2757 // CHECK7-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2758 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2759 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2760 // CHECK7-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2761 // CHECK7-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2762 // CHECK7-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2763 // CHECK7: arrayctor.loop:
2764 // CHECK7-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2765 // CHECK7-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2766 // CHECK7-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
2767 // CHECK7-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2768 // CHECK7-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2769 // CHECK7: arrayctor.cont:
2770 // CHECK7-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2771 // CHECK7-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2772 // CHECK7-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
2773 // CHECK7-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2774 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2775 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP7]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2776 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2777 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2778 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2779 // CHECK7: cond.true:
2780 // CHECK7-NEXT: br label [[COND_END:%.*]]
2781 // CHECK7: cond.false:
2782 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2783 // CHECK7-NEXT: br label [[COND_END]]
2784 // CHECK7: cond.end:
2785 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2786 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2787 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2788 // CHECK7-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
2789 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2790 // CHECK7: omp.inner.for.cond:
2791 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2792 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
2793 // CHECK7-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2794 // CHECK7-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2795 // CHECK7: omp.inner.for.cond.cleanup:
2796 // CHECK7-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2797 // CHECK7: omp.inner.for.body:
2798 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2799 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
2800 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2801 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
2802 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !18
2803 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
2804 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP15]]
2805 // CHECK7-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
2806 // CHECK7-NEXT: [[TMP16:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !18
2807 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
2808 // CHECK7-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP17]]
2809 // CHECK7-NEXT: [[TMP18:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
2810 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast %struct.S.0* [[TMP16]] to i8*
2811 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 4, i1 false), !llvm.access.group !18
2812 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2813 // CHECK7: omp.body.continue:
2814 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2815 // CHECK7: omp.inner.for.inc:
2816 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2817 // CHECK7-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
2818 // CHECK7-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2819 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
2820 // CHECK7: omp.inner.for.end:
2821 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2822 // CHECK7: omp.loop.exit:
2823 // CHECK7-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2824 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2825 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2826 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2827 // CHECK7-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2828 // CHECK7-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2829 // CHECK7: .omp.final.then:
2830 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
2831 // CHECK7-NEXT: br label [[DOTOMP_FINAL_DONE]]
2832 // CHECK7: .omp.final.done:
2833 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2834 // CHECK7-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2835 // CHECK7-NEXT: br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2836 // CHECK7: .omp.lastprivate.then:
2837 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[T_VAR2]], align 4
2838 // CHECK7-NEXT: store i32 [[TMP27]], i32* [[T_VAR_ADDR]], align 4
2839 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast [2 x i32]* [[TMP0]] to i8*
2840 // CHECK7-NEXT: [[TMP29:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
2841 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP28]], i8* align 4 [[TMP29]], i32 8, i1 false)
2842 // CHECK7-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP1]], i32 0, i32 0
2843 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
2844 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i32 2
2845 // CHECK7-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP31]]
2846 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2847 // CHECK7: omp.arraycpy.body:
2848 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP30]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2849 // CHECK7-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2850 // CHECK7-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2851 // CHECK7-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2852 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i32 4, i1 false)
2853 // CHECK7-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2854 // CHECK7-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2855 // CHECK7-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP31]]
2856 // CHECK7-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
2857 // CHECK7: omp.arraycpy.done11:
2858 // CHECK7-NEXT: [[TMP34:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
2859 // CHECK7-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP5]] to i8*
2860 // CHECK7-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[TMP34]] to i8*
2861 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i32 4, i1 false)
2862 // CHECK7-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
2863 // CHECK7: .omp.lastprivate.done:
2864 // CHECK7-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2865 // CHECK7-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
2866 // CHECK7-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
2867 // CHECK7-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2868 // CHECK7: arraydestroy.body:
2869 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP37]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2870 // CHECK7-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2871 // CHECK7-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2872 // CHECK7-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2873 // CHECK7-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2874 // CHECK7: arraydestroy.done13:
2875 // CHECK7-NEXT: ret void
2876 //
2877 //
2878 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2879 // CHECK7-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2880 // CHECK7-NEXT: entry:
2881 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2882 // CHECK7-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2883 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2884 // CHECK7-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2885 // CHECK7-NEXT: ret void
2886 //
2887 //
2888 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2889 // CHECK7-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2890 // CHECK7-NEXT: entry:
2891 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2892 // CHECK7-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2893 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2894 // CHECK7-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2895 // CHECK7-NEXT: store i32 0, i32* [[F]], align 4
2896 // CHECK7-NEXT: ret void
2897 //
2898 //
2899 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2900 // CHECK7-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2901 // CHECK7-NEXT: entry:
2902 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2903 // CHECK7-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2904 // CHECK7-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2905 // CHECK7-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2906 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2907 // CHECK7-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2908 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2909 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2910 // CHECK7-NEXT: ret void
2911 //
2912 //
2913 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2914 // CHECK7-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2915 // CHECK7-NEXT: entry:
2916 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2917 // CHECK7-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2918 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2919 // CHECK7-NEXT: ret void
2920 //
2921 //
2922 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2923 // CHECK7-SAME: () #[[ATTR6:[0-9]+]] {
2924 // CHECK7-NEXT: entry:
2925 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1)
2926 // CHECK7-NEXT: ret void
2927 //
2928 //
2929 // CHECK9-LABEL: define {{[^@]+}}@main
2930 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
2931 // CHECK9-NEXT: entry:
2932 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2933 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
2934 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8
2935 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
2936 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
2937 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8
2938 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
2939 // CHECK9-NEXT: store double* [[G]], double** [[TMP0]], align 8
2940 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
2941 // CHECK9-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
2942 // CHECK9-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
2943 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
2944 // CHECK9-NEXT: ret i32 0
2945 //
2946 //
2947 // CHECK11-LABEL: define {{[^@]+}}@main
2948 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
2949 // CHECK11-NEXT: entry:
2950 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2951 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
2952 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4
2953 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
2954 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2955 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4
2956 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
2957 // CHECK11-NEXT: store double* [[G]], double** [[TMP0]], align 4
2958 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
2959 // CHECK11-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
2960 // CHECK11-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
2961 // CHECK11-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
2962 // CHECK11-NEXT: ret i32 0
2963 //
2964 //
2965 // CHECK13-LABEL: define {{[^@]+}}@main
2966 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
2967 // CHECK13-NEXT: entry:
2968 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2969 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8
2970 // CHECK13-NEXT: [[G1:%.*]] = alloca double*, align 8
2971 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2972 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2973 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2974 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2975 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
2976 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
2977 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2978 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2979 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2980 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2981 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
2982 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
2983 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
2984 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2985 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4
2986 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 8
2987 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4
2988 // CHECK13-NEXT: [[I14:%.*]] = alloca i32, align 4
2989 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
2990 // CHECK13-NEXT: store double* [[G]], double** [[G1]], align 8
2991 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
2992 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4
2993 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2994 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
2995 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
2996 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2997 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
2998 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2999 // CHECK13-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
3000 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3001 // CHECK13-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
3002 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3003 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3004 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
3005 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3006 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3007 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3008 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3009 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3010 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
3011 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3012 // CHECK13: arrayctor.loop:
3013 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3014 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3015 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
3016 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3017 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3018 // CHECK13: arrayctor.cont:
3019 // CHECK13-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
3020 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
3021 // CHECK13-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 8
3022 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3023 // CHECK13: omp.inner.for.cond:
3024 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3025 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
3026 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3027 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3028 // CHECK13: omp.inner.for.cond.cleanup:
3029 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3030 // CHECK13: omp.inner.for.body:
3031 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3032 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3033 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3034 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
3035 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !2
3036 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3037 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3038 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
3039 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !2
3040 // CHECK13-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8, !llvm.access.group !2
3041 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
3042 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP13]] to i64
3043 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
3044 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX8]] to i8*
3045 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
3046 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !2
3047 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3048 // CHECK13: omp.body.continue:
3049 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3050 // CHECK13: omp.inner.for.inc:
3051 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3052 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 1
3053 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
3054 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3055 // CHECK13: omp.inner.for.end:
3056 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4
3057 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR2]], align 4
3058 // CHECK13-NEXT: store i32 [[TMP17]], i32* [[T_VAR]], align 4
3059 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3060 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
3061 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 8, i1 false)
3062 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3063 // CHECK13-NEXT: [[TMP20:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
3064 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN10]], i64 2
3065 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN10]], [[TMP21]]
3066 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3067 // CHECK13: omp.arraycpy.body:
3068 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3069 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3070 // CHECK13-NEXT: [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3071 // CHECK13-NEXT: [[TMP23:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3072 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false)
3073 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3074 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3075 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
3076 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
3077 // CHECK13: omp.arraycpy.done11:
3078 // CHECK13-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 8
3079 // CHECK13-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
3080 // CHECK13-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
3081 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 4, i1 false)
3082 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR]], align 4
3083 // CHECK13-NEXT: store i32 [[TMP27]], i32* @_ZZ4mainE4svar, align 4
3084 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]]
3085 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3086 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN12]], i64 2
3087 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3088 // CHECK13: arraydestroy.body:
3089 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3090 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3091 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3092 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
3093 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
3094 // CHECK13: arraydestroy.done13:
3095 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
3096 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3097 // CHECK13-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3098 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN15]], i64 2
3099 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]]
3100 // CHECK13: arraydestroy.body16:
3101 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi %struct.S* [ [[TMP29]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
3102 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1
3103 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
3104 // CHECK13-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
3105 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
3106 // CHECK13: arraydestroy.done20:
3107 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3108 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
3109 // CHECK13-NEXT: ret i32 [[TMP30]]
3110 //
3111 //
3112 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3113 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3114 // CHECK13-NEXT: entry:
3115 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3116 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3117 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3118 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3119 // CHECK13-NEXT: ret void
3120 //
3121 //
3122 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3123 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3124 // CHECK13-NEXT: entry:
3125 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3126 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3127 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3128 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3129 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3130 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3131 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
3132 // CHECK13-NEXT: ret void
3133 //
3134 //
3135 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3136 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3137 // CHECK13-NEXT: entry:
3138 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3139 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3140 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3141 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3142 // CHECK13-NEXT: ret void
3143 //
3144 //
3145 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3146 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat {
3147 // CHECK13-NEXT: entry:
3148 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3149 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3150 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3151 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3152 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3153 // CHECK13-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
3154 // CHECK13-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
3155 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3156 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3157 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3158 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3159 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
3160 // CHECK13-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
3161 // CHECK13-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
3162 // CHECK13-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
3163 // CHECK13-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
3164 // CHECK13-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 8
3165 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
3166 // CHECK13-NEXT: store i32 0, i32* [[T_VAR]], align 4
3167 // CHECK13-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3168 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
3169 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
3170 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
3171 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
3172 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
3173 // CHECK13-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
3174 // CHECK13-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3175 // CHECK13-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
3176 // CHECK13-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3177 // CHECK13-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3178 // CHECK13-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
3179 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3180 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3181 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3182 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3183 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3184 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
3185 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3186 // CHECK13: arrayctor.loop:
3187 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3188 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3189 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
3190 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3191 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3192 // CHECK13: arrayctor.cont:
3193 // CHECK13-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
3194 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
3195 // CHECK13-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 8
3196 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3197 // CHECK13: omp.inner.for.cond:
3198 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3199 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
3200 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3201 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3202 // CHECK13: omp.inner.for.cond.cleanup:
3203 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3204 // CHECK13: omp.inner.for.body:
3205 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3206 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3207 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3208 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
3209 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !6
3210 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3211 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3212 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i64 0, i64 [[IDXPROM]]
3213 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !6
3214 // CHECK13-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8, !llvm.access.group !6
3215 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
3216 // CHECK13-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP13]] to i64
3217 // CHECK13-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
3218 // CHECK13-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX8]] to i8*
3219 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
3220 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false), !llvm.access.group !6
3221 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3222 // CHECK13: omp.body.continue:
3223 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3224 // CHECK13: omp.inner.for.inc:
3225 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3226 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 1
3227 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
3228 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3229 // CHECK13: omp.inner.for.end:
3230 // CHECK13-NEXT: store i32 2, i32* [[I]], align 4
3231 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR2]], align 4
3232 // CHECK13-NEXT: store i32 [[TMP17]], i32* [[T_VAR]], align 4
3233 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3234 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
3235 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i64 8, i1 false)
3236 // CHECK13-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3237 // CHECK13-NEXT: [[TMP20:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
3238 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN10]], i64 2
3239 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN10]], [[TMP21]]
3240 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3241 // CHECK13: omp.arraycpy.body:
3242 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3243 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3244 // CHECK13-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3245 // CHECK13-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3246 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i64 4, i1 false)
3247 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3248 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3249 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
3250 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
3251 // CHECK13: omp.arraycpy.done11:
3252 // CHECK13-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 8
3253 // CHECK13-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
3254 // CHECK13-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
3255 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i64 4, i1 false)
3256 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
3257 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3258 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i64 2
3259 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3260 // CHECK13: arraydestroy.body:
3261 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3262 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3263 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3264 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
3265 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
3266 // CHECK13: arraydestroy.done13:
3267 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
3268 // CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3269 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN14]], i64 2
3270 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]]
3271 // CHECK13: arraydestroy.body15:
3272 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S.0* [ [[TMP28]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]
3273 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST16]], i64 -1
3274 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]]
3275 // CHECK13-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]
3276 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]
3277 // CHECK13: arraydestroy.done19:
3278 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3279 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
3280 // CHECK13-NEXT: ret i32 [[TMP29]]
3281 //
3282 //
3283 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3284 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3285 // CHECK13-NEXT: entry:
3286 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3287 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3288 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3289 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3290 // CHECK13-NEXT: store float 0.000000e+00, float* [[F]], align 4
3291 // CHECK13-NEXT: ret void
3292 //
3293 //
3294 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3295 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3296 // CHECK13-NEXT: entry:
3297 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3298 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3299 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3300 // CHECK13-NEXT: ret void
3301 //
3302 //
3303 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3304 // CHECK13-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3305 // CHECK13-NEXT: entry:
3306 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3307 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3308 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3309 // CHECK13-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3310 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3311 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3312 // CHECK13-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3313 // CHECK13-NEXT: store float [[TMP0]], float* [[F]], align 4
3314 // CHECK13-NEXT: ret void
3315 //
3316 //
3317 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3318 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3319 // CHECK13-NEXT: entry:
3320 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3321 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3322 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3323 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3324 // CHECK13-NEXT: ret void
3325 //
3326 //
3327 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3328 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3329 // CHECK13-NEXT: entry:
3330 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3331 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3332 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3333 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3334 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3335 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3336 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
3337 // CHECK13-NEXT: ret void
3338 //
3339 //
3340 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3341 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3342 // CHECK13-NEXT: entry:
3343 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3344 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3345 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3346 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3347 // CHECK13-NEXT: ret void
3348 //
3349 //
3350 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3351 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3352 // CHECK13-NEXT: entry:
3353 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3354 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3355 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3356 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3357 // CHECK13-NEXT: store i32 0, i32* [[F]], align 4
3358 // CHECK13-NEXT: ret void
3359 //
3360 //
3361 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3362 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3363 // CHECK13-NEXT: entry:
3364 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3365 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3366 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3367 // CHECK13-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3368 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3369 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3370 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3371 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
3372 // CHECK13-NEXT: ret void
3373 //
3374 //
3375 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3376 // CHECK13-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3377 // CHECK13-NEXT: entry:
3378 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
3379 // CHECK13-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
3380 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
3381 // CHECK13-NEXT: ret void
3382 //
3383 //
3384 // CHECK15-LABEL: define {{[^@]+}}@main
3385 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
3386 // CHECK15-NEXT: entry:
3387 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3388 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8
3389 // CHECK15-NEXT: [[G1:%.*]] = alloca double*, align 4
3390 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3391 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3392 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3393 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3394 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
3395 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
3396 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3397 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3398 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3399 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3400 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
3401 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
3402 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
3403 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
3404 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4
3405 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S*, align 4
3406 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4
3407 // CHECK15-NEXT: [[I13:%.*]] = alloca i32, align 4
3408 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
3409 // CHECK15-NEXT: store double* [[G]], double** [[G1]], align 4
3410 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
3411 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4
3412 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3413 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
3414 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3415 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
3416 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
3417 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
3418 // CHECK15-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
3419 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3420 // CHECK15-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
3421 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3422 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3423 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
3424 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3425 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3426 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3427 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3428 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3429 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3430 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3431 // CHECK15: arrayctor.loop:
3432 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3433 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3434 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
3435 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3436 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3437 // CHECK15: arrayctor.cont:
3438 // CHECK15-NEXT: [[TMP6:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3439 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
3440 // CHECK15-NEXT: store %struct.S* [[VAR5]], %struct.S** [[_TMP6]], align 4
3441 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3442 // CHECK15: omp.inner.for.cond:
3443 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3444 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
3445 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3446 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3447 // CHECK15: omp.inner.for.cond.cleanup:
3448 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3449 // CHECK15: omp.inner.for.body:
3450 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3451 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3452 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3453 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
3454 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !3
3455 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
3456 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP11]]
3457 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !3
3458 // CHECK15-NEXT: [[TMP12:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4, !llvm.access.group !3
3459 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
3460 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 [[TMP13]]
3461 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX7]] to i8*
3462 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP12]] to i8*
3463 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !3
3464 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3465 // CHECK15: omp.body.continue:
3466 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3467 // CHECK15: omp.inner.for.inc:
3468 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3469 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1
3470 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
3471 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3472 // CHECK15: omp.inner.for.end:
3473 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4
3474 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR2]], align 4
3475 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[T_VAR]], align 4
3476 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3477 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
3478 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 8, i1 false)
3479 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3480 // CHECK15-NEXT: [[TMP20:%.*]] = bitcast [2 x %struct.S]* [[S_ARR4]] to %struct.S*
3481 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN9]], i32 2
3482 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN9]], [[TMP21]]
3483 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3484 // CHECK15: omp.arraycpy.body:
3485 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3486 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3487 // CHECK15-NEXT: [[TMP22:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3488 // CHECK15-NEXT: [[TMP23:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3489 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false)
3490 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3491 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3492 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
3493 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
3494 // CHECK15: omp.arraycpy.done10:
3495 // CHECK15-NEXT: [[TMP24:%.*]] = load %struct.S*, %struct.S** [[_TMP6]], align 4
3496 // CHECK15-NEXT: [[TMP25:%.*]] = bitcast %struct.S* [[TMP6]] to i8*
3497 // CHECK15-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[TMP24]] to i8*
3498 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 4, i1 false)
3499 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[SVAR]], align 4
3500 // CHECK15-NEXT: store i32 [[TMP27]], i32* @_ZZ4mainE4svar, align 4
3501 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]]
3502 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR4]], i32 0, i32 0
3503 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN11]], i32 2
3504 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3505 // CHECK15: arraydestroy.body:
3506 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP28]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3507 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3508 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3509 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
3510 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
3511 // CHECK15: arraydestroy.done12:
3512 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
3513 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3514 // CHECK15-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
3515 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i32 2
3516 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY15:%.*]]
3517 // CHECK15: arraydestroy.body15:
3518 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi %struct.S* [ [[TMP29]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]
3519 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1
3520 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR4]]
3521 // CHECK15-NEXT: [[ARRAYDESTROY_DONE18:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]
3522 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]
3523 // CHECK15: arraydestroy.done19:
3524 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3525 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
3526 // CHECK15-NEXT: ret i32 [[TMP30]]
3527 //
3528 //
3529 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3530 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3531 // CHECK15-NEXT: entry:
3532 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3533 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3534 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3535 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3536 // CHECK15-NEXT: ret void
3537 //
3538 //
3539 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3540 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3541 // CHECK15-NEXT: entry:
3542 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3543 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3544 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3545 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3546 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3547 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3548 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
3549 // CHECK15-NEXT: ret void
3550 //
3551 //
3552 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3553 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3554 // CHECK15-NEXT: entry:
3555 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3556 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3557 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3558 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3559 // CHECK15-NEXT: ret void
3560 //
3561 //
3562 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3563 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat {
3564 // CHECK15-NEXT: entry:
3565 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3566 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3567 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3568 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3569 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3570 // CHECK15-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
3571 // CHECK15-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3572 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3573 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3574 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3575 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3576 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
3577 // CHECK15-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
3578 // CHECK15-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
3579 // CHECK15-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
3580 // CHECK15-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
3581 // CHECK15-NEXT: [[_TMP6:%.*]] = alloca %struct.S.0*, align 4
3582 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
3583 // CHECK15-NEXT: store i32 0, i32* [[T_VAR]], align 4
3584 // CHECK15-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3585 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3586 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3587 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
3588 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3589 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
3590 // CHECK15-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3591 // CHECK15-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3592 // CHECK15-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
3593 // CHECK15-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3594 // CHECK15-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3595 // CHECK15-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3596 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3597 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3598 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3599 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3600 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3601 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3602 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
3603 // CHECK15: arrayctor.loop:
3604 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3605 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3606 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
3607 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3608 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3609 // CHECK15: arrayctor.cont:
3610 // CHECK15-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3611 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]])
3612 // CHECK15-NEXT: store %struct.S.0* [[VAR5]], %struct.S.0** [[_TMP6]], align 4
3613 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3614 // CHECK15: omp.inner.for.cond:
3615 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
3616 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
3617 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3618 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3619 // CHECK15: omp.inner.for.cond.cleanup:
3620 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3621 // CHECK15: omp.inner.for.body:
3622 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
3623 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3624 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3625 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
3626 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !7
3627 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
3628 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC3]], i32 0, i32 [[TMP11]]
3629 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4, !llvm.access.group !7
3630 // CHECK15-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4, !llvm.access.group !7
3631 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
3632 // CHECK15-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 [[TMP13]]
3633 // CHECK15-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[ARRAYIDX7]] to i8*
3634 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
3635 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false), !llvm.access.group !7
3636 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3637 // CHECK15: omp.body.continue:
3638 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3639 // CHECK15: omp.inner.for.inc:
3640 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
3641 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1
3642 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
3643 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
3644 // CHECK15: omp.inner.for.end:
3645 // CHECK15-NEXT: store i32 2, i32* [[I]], align 4
3646 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR2]], align 4
3647 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[T_VAR]], align 4
3648 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3649 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast [2 x i32]* [[VEC3]] to i8*
3650 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP18]], i8* align 4 [[TMP19]], i32 8, i1 false)
3651 // CHECK15-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3652 // CHECK15-NEXT: [[TMP20:%.*]] = bitcast [2 x %struct.S.0]* [[S_ARR4]] to %struct.S.0*
3653 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i32 2
3654 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN9]], [[TMP21]]
3655 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3656 // CHECK15: omp.arraycpy.body:
3657 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP20]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3658 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN9]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3659 // CHECK15-NEXT: [[TMP22:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3660 // CHECK15-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3661 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP22]], i8* align 4 [[TMP23]], i32 4, i1 false)
3662 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3663 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3664 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
3665 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
3666 // CHECK15: omp.arraycpy.done10:
3667 // CHECK15-NEXT: [[TMP24:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP6]], align 4
3668 // CHECK15-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[TMP6]] to i8*
3669 // CHECK15-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP24]] to i8*
3670 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP25]], i8* align 4 [[TMP26]], i32 4, i1 false)
3671 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
3672 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR4]], i32 0, i32 0
3673 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN11]], i32 2
3674 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3675 // CHECK15: arraydestroy.body:
3676 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP27]], [[OMP_ARRAYCPY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3677 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3678 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3679 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
3680 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
3681 // CHECK15: arraydestroy.done12:
3682 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
3683 // CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3684 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i32 2
3685 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY14:%.*]]
3686 // CHECK15: arraydestroy.body14:
3687 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST15:%.*]] = phi %struct.S.0* [ [[TMP28]], [[ARRAYDESTROY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT16:%.*]], [[ARRAYDESTROY_BODY14]] ]
3688 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT16]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST15]], i32 -1
3689 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT16]]) #[[ATTR4]]
3690 // CHECK15-NEXT: [[ARRAYDESTROY_DONE17:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT16]], [[ARRAY_BEGIN13]]
3691 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE17]], label [[ARRAYDESTROY_DONE18:%.*]], label [[ARRAYDESTROY_BODY14]]
3692 // CHECK15: arraydestroy.done18:
3693 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3694 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[RETVAL]], align 4
3695 // CHECK15-NEXT: ret i32 [[TMP29]]
3696 //
3697 //
3698 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3699 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3700 // CHECK15-NEXT: entry:
3701 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3702 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3703 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3704 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3705 // CHECK15-NEXT: store float 0.000000e+00, float* [[F]], align 4
3706 // CHECK15-NEXT: ret void
3707 //
3708 //
3709 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3710 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3711 // CHECK15-NEXT: entry:
3712 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3713 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3714 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3715 // CHECK15-NEXT: ret void
3716 //
3717 //
3718 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3719 // CHECK15-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3720 // CHECK15-NEXT: entry:
3721 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3722 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3723 // CHECK15-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3724 // CHECK15-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3725 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3726 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3727 // CHECK15-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3728 // CHECK15-NEXT: store float [[TMP0]], float* [[F]], align 4
3729 // CHECK15-NEXT: ret void
3730 //
3731 //
3732 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3733 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3734 // CHECK15-NEXT: entry:
3735 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3736 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3737 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3738 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3739 // CHECK15-NEXT: ret void
3740 //
3741 //
3742 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3743 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3744 // CHECK15-NEXT: entry:
3745 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3746 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3747 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3748 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3749 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3750 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3751 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
3752 // CHECK15-NEXT: ret void
3753 //
3754 //
3755 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3756 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3757 // CHECK15-NEXT: entry:
3758 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3759 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3760 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3761 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3762 // CHECK15-NEXT: ret void
3763 //
3764 //
3765 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3766 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3767 // CHECK15-NEXT: entry:
3768 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3769 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3770 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3771 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3772 // CHECK15-NEXT: store i32 0, i32* [[F]], align 4
3773 // CHECK15-NEXT: ret void
3774 //
3775 //
3776 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3777 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3778 // CHECK15-NEXT: entry:
3779 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3780 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3781 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3782 // CHECK15-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3783 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3784 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3785 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3786 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
3787 // CHECK15-NEXT: ret void
3788 //
3789 //
3790 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3791 // CHECK15-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3792 // CHECK15-NEXT: entry:
3793 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3794 // CHECK15-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3795 // CHECK15-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3796 // CHECK15-NEXT: ret void
3797 //
3798