1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
15
16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
22
23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
29
30 // expected-no-diagnostics
31 #ifndef HEADER
32 #define HEADER
33
34 void fn1();
35 void fn2();
36 void fn3();
37 void fn4();
38 void fn5();
39 void fn6();
40
41 int Arg;
42
gtid_test()43 void gtid_test() {
44 #ifdef OMP5
45 #pragma omp target teams distribute parallel for simd if(simd: true) nontemporal(Arg)
46 #else
47 #pragma omp target teams distribute parallel for simd
48 #endif // OMP5
49 for (int i = 0; i < 100; i++) {
50 Arg = 0;
51 }
52
53 #pragma omp target teams distribute parallel for simd if (parallel: false)
54 for(int i = 0 ; i < 100; i++) {
55 gtid_test();
56 }
57 }
58
59
60 template <typename T>
tmain(T Arg)61 int tmain(T Arg) {
62 #pragma omp target teams distribute parallel for simd if (true)
63 for(int i = 0 ; i < 100; i++) {
64 fn1();
65 }
66 #pragma omp target teams distribute parallel for simd if (false)
67 for(int i = 0 ; i < 100; i++) {
68 fn2();
69 }
70 #pragma omp target teams distribute parallel for simd if (parallel: Arg)
71 for(int i = 0 ; i < 100; i++) {
72 fn3();
73 }
74 return 0;
75 }
76
main()77 int main() {
78 #pragma omp target teams distribute parallel for simd if (true)
79 for(int i = 0 ; i < 100; i++) {
80
81
82 fn4();
83 }
84
85 #pragma omp target teams distribute parallel for simd if (false)
86 for(int i = 0 ; i < 100; i++) {
87
88
89 fn5();
90 }
91
92 #pragma omp target teams distribute parallel for simd if (Arg)
93 for(int i = 0 ; i < 100; i++) {
94
95
96 fn6();
97 }
98
99 return tmain(Arg);
100 }
101
102
103
104
105
106
107 // call void [[T_OUTLINE_FUN_3:@.+]](
108
109 #endif
110
111 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
112 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
113 // CHECK1-NEXT: entry:
114 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
115 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
116 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
117 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
118 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
119 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
120 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
121 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
122 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
123 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
124 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
125 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
126 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
127 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
128 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
129 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
130 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
131 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8
132 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
133 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
134 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
135 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
136 // CHECK1-NEXT: store i32 1, i32* [[TMP9]], align 4
137 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
138 // CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4
139 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
140 // CHECK1-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
141 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
142 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
143 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
144 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8
145 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
146 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8
147 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
148 // CHECK1-NEXT: store i8** null, i8*** [[TMP15]], align 8
149 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
150 // CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8
151 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
152 // CHECK1-NEXT: store i64 100, i64* [[TMP17]], align 8
153 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
154 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
155 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
156 // CHECK1: omp_offload.failed:
157 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
158 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
159 // CHECK1: omp_offload.cont:
160 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
161 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
162 // CHECK1-NEXT: store i32 1, i32* [[TMP20]], align 4
163 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
164 // CHECK1-NEXT: store i32 0, i32* [[TMP21]], align 4
165 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
166 // CHECK1-NEXT: store i8** null, i8*** [[TMP22]], align 8
167 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
168 // CHECK1-NEXT: store i8** null, i8*** [[TMP23]], align 8
169 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
170 // CHECK1-NEXT: store i64* null, i64** [[TMP24]], align 8
171 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
172 // CHECK1-NEXT: store i64* null, i64** [[TMP25]], align 8
173 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
174 // CHECK1-NEXT: store i8** null, i8*** [[TMP26]], align 8
175 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
176 // CHECK1-NEXT: store i8** null, i8*** [[TMP27]], align 8
177 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
178 // CHECK1-NEXT: store i64 100, i64* [[TMP28]], align 8
179 // CHECK1-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
180 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
181 // CHECK1-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
182 // CHECK1: omp_offload.failed3:
183 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
184 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
185 // CHECK1: omp_offload.cont4:
186 // CHECK1-NEXT: ret void
187 //
188 //
189 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
190 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
191 // CHECK1-NEXT: entry:
192 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
193 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
194 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
195 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
196 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
197 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
198 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
199 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
200 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
201 // CHECK1-NEXT: ret void
202 //
203 //
204 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
205 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
206 // CHECK1-NEXT: entry:
207 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
208 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
209 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
210 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
211 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
212 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
213 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
214 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
215 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
216 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
218 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
219 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
220 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
221 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
222 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
223 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
224 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
225 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
226 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
227 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
228 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
229 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
230 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
231 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
232 // CHECK1: cond.true:
233 // CHECK1-NEXT: br label [[COND_END:%.*]]
234 // CHECK1: cond.false:
235 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
236 // CHECK1-NEXT: br label [[COND_END]]
237 // CHECK1: cond.end:
238 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
239 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
240 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
241 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
242 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
243 // CHECK1: omp.inner.for.cond:
244 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
245 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
246 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
247 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
248 // CHECK1: omp.inner.for.body:
249 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
250 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
251 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
252 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
253 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP9]]
254 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
255 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group [[ACC_GRP9]]
256 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]]
257 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]]
258 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
259 // CHECK1: omp.inner.for.inc:
260 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
261 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
262 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
263 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
264 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
265 // CHECK1: omp.inner.for.end:
266 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
267 // CHECK1: omp.loop.exit:
268 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
269 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
270 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
271 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
272 // CHECK1: .omp.final.then:
273 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
274 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
275 // CHECK1: .omp.final.done:
276 // CHECK1-NEXT: ret void
277 //
278 //
279 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
280 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
281 // CHECK1-NEXT: entry:
282 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
283 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
284 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
285 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
286 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
287 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
288 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
289 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
290 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
291 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
292 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
293 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
294 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
295 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
296 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
297 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
298 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
299 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
300 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
301 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
302 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
303 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
304 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
305 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
306 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
307 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
308 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
309 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
310 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
311 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
312 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
313 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
314 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
315 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
316 // CHECK1: cond.true:
317 // CHECK1-NEXT: br label [[COND_END:%.*]]
318 // CHECK1: cond.false:
319 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
320 // CHECK1-NEXT: br label [[COND_END]]
321 // CHECK1: cond.end:
322 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
323 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
324 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
325 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
326 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
327 // CHECK1: omp.inner.for.cond:
328 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
329 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
330 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
331 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
332 // CHECK1: omp.inner.for.body:
333 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
334 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
335 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
336 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
337 // CHECK1-NEXT: store i32 0, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP13]]
338 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
339 // CHECK1: omp.body.continue:
340 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
341 // CHECK1: omp.inner.for.inc:
342 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
343 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
344 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
345 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
346 // CHECK1: omp.inner.for.end:
347 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
348 // CHECK1: omp.loop.exit:
349 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
350 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
351 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
352 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
353 // CHECK1: .omp.final.then:
354 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
355 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
356 // CHECK1: .omp.final.done:
357 // CHECK1-NEXT: ret void
358 //
359 //
360 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
361 // CHECK1-SAME: () #[[ATTR1]] {
362 // CHECK1-NEXT: entry:
363 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
364 // CHECK1-NEXT: ret void
365 //
366 //
367 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
368 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
369 // CHECK1-NEXT: entry:
370 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
371 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
372 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
373 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
374 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
375 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
376 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
377 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
378 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
379 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
380 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
381 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
382 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
383 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
384 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
385 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
386 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
387 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
388 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
389 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
390 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
391 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
392 // CHECK1: cond.true:
393 // CHECK1-NEXT: br label [[COND_END:%.*]]
394 // CHECK1: cond.false:
395 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
396 // CHECK1-NEXT: br label [[COND_END]]
397 // CHECK1: cond.end:
398 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
399 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
400 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
401 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
402 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
403 // CHECK1: omp.inner.for.cond:
404 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
405 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
406 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
407 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
408 // CHECK1: omp.inner.for.body:
409 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]
410 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
411 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
412 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
413 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]]
414 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP18]]
415 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP18]]
416 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP18]]
417 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]]
418 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
419 // CHECK1: omp.inner.for.inc:
420 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
421 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]
422 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
423 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
424 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
425 // CHECK1: omp.inner.for.end:
426 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
427 // CHECK1: omp.loop.exit:
428 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
429 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
430 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
431 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
432 // CHECK1: .omp.final.then:
433 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
434 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
435 // CHECK1: .omp.final.done:
436 // CHECK1-NEXT: ret void
437 //
438 //
439 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
440 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
441 // CHECK1-NEXT: entry:
442 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
443 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
444 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
445 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
446 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
447 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
448 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
449 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
450 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
451 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
452 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
454 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
455 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
456 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
457 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
458 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
459 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
460 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
461 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
462 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
463 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
464 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
465 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
466 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
467 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
468 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
469 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
470 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
471 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
472 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
473 // CHECK1: cond.true:
474 // CHECK1-NEXT: br label [[COND_END:%.*]]
475 // CHECK1: cond.false:
476 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
477 // CHECK1-NEXT: br label [[COND_END]]
478 // CHECK1: cond.end:
479 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
480 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
481 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
482 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
483 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
484 // CHECK1: omp.inner.for.cond:
485 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
486 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
487 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
488 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
489 // CHECK1: omp.inner.for.body:
490 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
491 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
492 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
493 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
494 // CHECK1-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP21]]
495 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
496 // CHECK1: omp.body.continue:
497 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
498 // CHECK1: omp.inner.for.inc:
499 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
500 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
501 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
502 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
503 // CHECK1: omp.inner.for.end:
504 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
505 // CHECK1: omp.loop.exit:
506 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
507 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
508 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
509 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
510 // CHECK1: .omp.final.then:
511 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
512 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
513 // CHECK1: .omp.final.done:
514 // CHECK1-NEXT: ret void
515 //
516 //
517 // CHECK1-LABEL: define {{[^@]+}}@main
518 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
519 // CHECK1-NEXT: entry:
520 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
521 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
522 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
523 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
524 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
525 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
526 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
527 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
528 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
529 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
530 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
531 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
532 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
533 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
534 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
535 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
536 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
537 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
538 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
539 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
540 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
541 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
542 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
543 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
544 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
545 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
546 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
547 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
548 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
549 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
550 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
551 // CHECK1: omp_offload.failed:
552 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
553 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
554 // CHECK1: omp_offload.cont:
555 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
556 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* @Arg, align 4
557 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
558 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
559 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
560 // CHECK1-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
561 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
562 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
563 // CHECK1-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
564 // CHECK1-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
565 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
566 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
567 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP14]] to i1
568 // CHECK1-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
569 // CHECK1: omp_if.then:
570 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
571 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
572 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP16]], align 8
573 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
574 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
575 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP18]], align 8
576 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
577 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8
578 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
579 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
580 // CHECK1-NEXT: [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
581 // CHECK1-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
582 // CHECK1-NEXT: [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
583 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
584 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
585 // CHECK1-NEXT: store i32 1, i32* [[TMP24]], align 4
586 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
587 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4
588 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
589 // CHECK1-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
590 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
591 // CHECK1-NEXT: store i8** [[TMP21]], i8*** [[TMP27]], align 8
592 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
593 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.10, i32 0, i32 0), i64** [[TMP28]], align 8
594 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
595 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.11, i32 0, i32 0), i64** [[TMP29]], align 8
596 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
597 // CHECK1-NEXT: store i8** null, i8*** [[TMP30]], align 8
598 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
599 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8
600 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
601 // CHECK1-NEXT: store i64 100, i64* [[TMP32]], align 8
602 // CHECK1-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP23]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
603 // CHECK1-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
604 // CHECK1-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
605 // CHECK1: omp_offload.failed7:
606 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
607 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
608 // CHECK1: omp_offload.cont8:
609 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
610 // CHECK1: omp_if.else:
611 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
612 // CHECK1-NEXT: br label [[OMP_IF_END]]
613 // CHECK1: omp_if.end:
614 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* @Arg, align 4
615 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP35]])
616 // CHECK1-NEXT: ret i32 [[CALL]]
617 //
618 //
619 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
620 // CHECK1-SAME: () #[[ATTR1]] {
621 // CHECK1-NEXT: entry:
622 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
623 // CHECK1-NEXT: ret void
624 //
625 //
626 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
627 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
628 // CHECK1-NEXT: entry:
629 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
630 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
631 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
632 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
633 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
634 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
635 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
636 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
637 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
638 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
639 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
640 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
641 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
642 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
643 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
644 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
645 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
646 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
647 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
648 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
649 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
650 // CHECK1: cond.true:
651 // CHECK1-NEXT: br label [[COND_END:%.*]]
652 // CHECK1: cond.false:
653 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
654 // CHECK1-NEXT: br label [[COND_END]]
655 // CHECK1: cond.end:
656 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
657 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
658 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
659 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
660 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
661 // CHECK1: omp.inner.for.cond:
662 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
663 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
664 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
665 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
666 // CHECK1: omp.inner.for.body:
667 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]]
668 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
669 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
670 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
671 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]]
672 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
673 // CHECK1: omp.inner.for.inc:
674 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
675 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]]
676 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
677 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
678 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
679 // CHECK1: omp.inner.for.end:
680 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
681 // CHECK1: omp.loop.exit:
682 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
683 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
684 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
685 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
686 // CHECK1: .omp.final.then:
687 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
688 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
689 // CHECK1: .omp.final.done:
690 // CHECK1-NEXT: ret void
691 //
692 //
693 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
694 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
695 // CHECK1-NEXT: entry:
696 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
697 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
698 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
699 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
700 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
701 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
702 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
703 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
704 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
705 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
707 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
708 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
709 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
710 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
711 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
712 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
713 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
714 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
715 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
716 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
717 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
718 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
719 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
720 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
721 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
722 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
723 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
724 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
725 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
726 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
727 // CHECK1: cond.true:
728 // CHECK1-NEXT: br label [[COND_END:%.*]]
729 // CHECK1: cond.false:
730 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
731 // CHECK1-NEXT: br label [[COND_END]]
732 // CHECK1: cond.end:
733 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
734 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
735 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
736 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
737 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
738 // CHECK1: omp.inner.for.cond:
739 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]
740 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]
741 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
742 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
743 // CHECK1: omp.inner.for.body:
744 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
745 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
746 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
747 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
748 // CHECK1-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP27]]
749 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
750 // CHECK1: omp.body.continue:
751 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
752 // CHECK1: omp.inner.for.inc:
753 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
754 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
755 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
756 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
757 // CHECK1: omp.inner.for.end:
758 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
759 // CHECK1: omp.loop.exit:
760 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
761 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
762 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
763 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
764 // CHECK1: .omp.final.then:
765 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
766 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
767 // CHECK1: .omp.final.done:
768 // CHECK1-NEXT: ret void
769 //
770 //
771 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
772 // CHECK1-SAME: () #[[ATTR1]] {
773 // CHECK1-NEXT: entry:
774 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
775 // CHECK1-NEXT: ret void
776 //
777 //
778 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
779 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
780 // CHECK1-NEXT: entry:
781 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
782 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
783 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
784 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
785 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
786 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
787 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
788 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
789 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
790 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
791 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
792 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
793 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
794 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
795 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
796 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
797 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
798 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
799 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
800 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
801 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
802 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
803 // CHECK1: cond.true:
804 // CHECK1-NEXT: br label [[COND_END:%.*]]
805 // CHECK1: cond.false:
806 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
807 // CHECK1-NEXT: br label [[COND_END]]
808 // CHECK1: cond.end:
809 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
810 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
811 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
812 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
813 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
814 // CHECK1: omp.inner.for.cond:
815 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]]
816 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
817 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
818 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
819 // CHECK1: omp.inner.for.body:
820 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]]
821 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
822 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
823 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
824 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]]
825 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP30]]
826 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP30]]
827 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP30]]
828 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]]
829 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
830 // CHECK1: omp.inner.for.inc:
831 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
832 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]]
833 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
834 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
835 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
836 // CHECK1: omp.inner.for.end:
837 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
838 // CHECK1: omp.loop.exit:
839 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
840 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
841 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
842 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
843 // CHECK1: .omp.final.then:
844 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
845 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
846 // CHECK1: .omp.final.done:
847 // CHECK1-NEXT: ret void
848 //
849 //
850 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
851 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
852 // CHECK1-NEXT: entry:
853 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
854 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
855 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
856 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
857 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
858 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
859 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
860 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
861 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
862 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
863 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
864 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
865 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
866 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
867 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
868 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
869 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
870 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
871 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
872 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
873 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
874 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
875 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
876 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
877 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
878 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
879 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
880 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
881 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
882 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
883 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
884 // CHECK1: cond.true:
885 // CHECK1-NEXT: br label [[COND_END:%.*]]
886 // CHECK1: cond.false:
887 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
888 // CHECK1-NEXT: br label [[COND_END]]
889 // CHECK1: cond.end:
890 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
891 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
892 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
893 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
894 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
895 // CHECK1: omp.inner.for.cond:
896 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]]
897 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]]
898 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
899 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
900 // CHECK1: omp.inner.for.body:
901 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
902 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
903 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
904 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP33]]
905 // CHECK1-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP33]]
906 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
907 // CHECK1: omp.body.continue:
908 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
909 // CHECK1: omp.inner.for.inc:
910 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
911 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
912 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
913 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
914 // CHECK1: omp.inner.for.end:
915 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
916 // CHECK1: omp.loop.exit:
917 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
918 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
919 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
920 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
921 // CHECK1: .omp.final.then:
922 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
923 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
924 // CHECK1: .omp.final.done:
925 // CHECK1-NEXT: ret void
926 //
927 //
928 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
929 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
930 // CHECK1-NEXT: entry:
931 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
932 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
933 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
934 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
935 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
936 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
937 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
938 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
939 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
940 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
941 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
942 // CHECK1-NEXT: ret void
943 //
944 //
945 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
946 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
947 // CHECK1-NEXT: entry:
948 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
949 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
950 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
951 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
952 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
953 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
954 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
955 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
956 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
957 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
958 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
959 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
960 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
961 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
962 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
963 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
964 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
965 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
966 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
967 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
968 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
969 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
970 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
971 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
972 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
973 // CHECK1: cond.true:
974 // CHECK1-NEXT: br label [[COND_END:%.*]]
975 // CHECK1: cond.false:
976 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
977 // CHECK1-NEXT: br label [[COND_END]]
978 // CHECK1: cond.end:
979 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
980 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
981 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
982 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
983 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
984 // CHECK1: omp.inner.for.cond:
985 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]]
986 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
987 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
988 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
989 // CHECK1: omp.inner.for.body:
990 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]]
991 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
992 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
993 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
994 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP36]]
995 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
996 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
997 // CHECK1: omp_if.then:
998 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]]
999 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1000 // CHECK1: omp_if.else:
1001 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]]
1002 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP36]]
1003 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP36]]
1004 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP36]]
1005 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]]
1006 // CHECK1-NEXT: br label [[OMP_IF_END]]
1007 // CHECK1: omp_if.end:
1008 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1009 // CHECK1: omp.inner.for.inc:
1010 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
1011 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]]
1012 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1013 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
1014 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
1015 // CHECK1: omp.inner.for.end:
1016 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1017 // CHECK1: omp.loop.exit:
1018 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1019 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1020 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1021 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1022 // CHECK1: .omp.final.then:
1023 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1024 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1025 // CHECK1: .omp.final.done:
1026 // CHECK1-NEXT: ret void
1027 //
1028 //
1029 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
1030 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1031 // CHECK1-NEXT: entry:
1032 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1033 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1034 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1035 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1036 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1037 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1038 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1039 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1040 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1041 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1042 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1043 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1044 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1045 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1046 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1047 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1048 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1049 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1050 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1051 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1052 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1053 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1054 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1055 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1056 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1057 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1058 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1059 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1060 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1061 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1062 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1063 // CHECK1: cond.true:
1064 // CHECK1-NEXT: br label [[COND_END:%.*]]
1065 // CHECK1: cond.false:
1066 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1067 // CHECK1-NEXT: br label [[COND_END]]
1068 // CHECK1: cond.end:
1069 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1070 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1071 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1072 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1073 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1074 // CHECK1: omp.inner.for.cond:
1075 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
1076 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
1077 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1078 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1079 // CHECK1: omp.inner.for.body:
1080 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
1081 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1082 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1083 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
1084 // CHECK1-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
1085 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1086 // CHECK1: omp.body.continue:
1087 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1088 // CHECK1: omp.inner.for.inc:
1089 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
1090 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1091 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
1092 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
1093 // CHECK1: omp.inner.for.end:
1094 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1095 // CHECK1: omp.loop.exit:
1096 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1097 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1098 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1099 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1100 // CHECK1: .omp.final.then:
1101 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1102 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1103 // CHECK1: .omp.final.done:
1104 // CHECK1-NEXT: ret void
1105 //
1106 //
1107 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
1108 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
1109 // CHECK1-NEXT: entry:
1110 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
1111 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1112 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1113 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1114 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1115 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1116 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1117 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1118 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
1119 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1120 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1121 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
1122 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1123 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
1124 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1125 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
1126 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1127 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
1128 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1129 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
1130 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1131 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
1132 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1133 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
1134 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1135 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
1136 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1137 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
1138 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1139 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1140 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1141 // CHECK1: omp_offload.failed:
1142 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
1143 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1144 // CHECK1: omp_offload.cont:
1145 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
1146 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
1147 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
1148 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1149 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1150 // CHECK1-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1151 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
1152 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1153 // CHECK1-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
1154 // CHECK1-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
1155 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1156 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1157 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1158 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP15]], align 8
1159 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1160 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
1161 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP17]], align 8
1162 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1163 // CHECK1-NEXT: store i8* null, i8** [[TMP18]], align 8
1164 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1165 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1166 // CHECK1-NEXT: [[TMP21:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1167 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP21]] to i1
1168 // CHECK1-NEXT: [[TMP22:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
1169 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1170 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
1171 // CHECK1-NEXT: store i32 1, i32* [[TMP23]], align 4
1172 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
1173 // CHECK1-NEXT: store i32 1, i32* [[TMP24]], align 4
1174 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
1175 // CHECK1-NEXT: store i8** [[TMP19]], i8*** [[TMP25]], align 8
1176 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
1177 // CHECK1-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
1178 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
1179 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.18, i32 0, i32 0), i64** [[TMP27]], align 8
1180 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
1181 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.19, i32 0, i32 0), i64** [[TMP28]], align 8
1182 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
1183 // CHECK1-NEXT: store i8** null, i8*** [[TMP29]], align 8
1184 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
1185 // CHECK1-NEXT: store i8** null, i8*** [[TMP30]], align 8
1186 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
1187 // CHECK1-NEXT: store i64 100, i64* [[TMP31]], align 8
1188 // CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP22]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
1189 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
1190 // CHECK1-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1191 // CHECK1: omp_offload.failed6:
1192 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP13]]) #[[ATTR2]]
1193 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]]
1194 // CHECK1: omp_offload.cont7:
1195 // CHECK1-NEXT: ret i32 0
1196 //
1197 //
1198 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
1199 // CHECK1-SAME: () #[[ATTR1]] {
1200 // CHECK1-NEXT: entry:
1201 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
1202 // CHECK1-NEXT: ret void
1203 //
1204 //
1205 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
1206 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1207 // CHECK1-NEXT: entry:
1208 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1209 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1210 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1211 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1212 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1213 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1214 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1215 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1216 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1217 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1218 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1219 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1220 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1221 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1222 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1223 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1224 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1225 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1226 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1227 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1228 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1229 // CHECK1: cond.true:
1230 // CHECK1-NEXT: br label [[COND_END:%.*]]
1231 // CHECK1: cond.false:
1232 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1233 // CHECK1-NEXT: br label [[COND_END]]
1234 // CHECK1: cond.end:
1235 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1236 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1237 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1238 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1239 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1240 // CHECK1: omp.inner.for.cond:
1241 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
1242 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
1243 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1244 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1245 // CHECK1: omp.inner.for.body:
1246 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]]
1247 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1248 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
1249 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1250 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP42]]
1251 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1252 // CHECK1: omp.inner.for.inc:
1253 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
1254 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]]
1255 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1256 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
1257 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
1258 // CHECK1: omp.inner.for.end:
1259 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1260 // CHECK1: omp.loop.exit:
1261 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1262 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1263 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1264 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1265 // CHECK1: .omp.final.then:
1266 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1267 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1268 // CHECK1: .omp.final.done:
1269 // CHECK1-NEXT: ret void
1270 //
1271 //
1272 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1273 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1274 // CHECK1-NEXT: entry:
1275 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1276 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1277 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1278 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1279 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1280 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1281 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1282 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1283 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1284 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1285 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1286 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1287 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1288 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1289 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1290 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1291 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1292 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1293 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1294 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1295 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1296 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1297 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1298 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1299 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1300 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1301 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1302 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1303 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1304 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1305 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1306 // CHECK1: cond.true:
1307 // CHECK1-NEXT: br label [[COND_END:%.*]]
1308 // CHECK1: cond.false:
1309 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1310 // CHECK1-NEXT: br label [[COND_END]]
1311 // CHECK1: cond.end:
1312 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1313 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1314 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1315 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1316 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1317 // CHECK1: omp.inner.for.cond:
1318 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]]
1319 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
1320 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1321 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1322 // CHECK1: omp.inner.for.body:
1323 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
1324 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1325 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1326 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP45]]
1327 // CHECK1-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP45]]
1328 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1329 // CHECK1: omp.body.continue:
1330 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1331 // CHECK1: omp.inner.for.inc:
1332 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
1333 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1334 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
1335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
1336 // CHECK1: omp.inner.for.end:
1337 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1338 // CHECK1: omp.loop.exit:
1339 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1340 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1341 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1342 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1343 // CHECK1: .omp.final.then:
1344 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1345 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1346 // CHECK1: .omp.final.done:
1347 // CHECK1-NEXT: ret void
1348 //
1349 //
1350 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
1351 // CHECK1-SAME: () #[[ATTR1]] {
1352 // CHECK1-NEXT: entry:
1353 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*))
1354 // CHECK1-NEXT: ret void
1355 //
1356 //
1357 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1358 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1359 // CHECK1-NEXT: entry:
1360 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1361 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1362 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1363 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1364 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1365 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1366 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1367 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1369 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1370 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1371 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1372 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1373 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1374 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1375 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1376 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1377 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1378 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1379 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1380 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1381 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1382 // CHECK1: cond.true:
1383 // CHECK1-NEXT: br label [[COND_END:%.*]]
1384 // CHECK1: cond.false:
1385 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1386 // CHECK1-NEXT: br label [[COND_END]]
1387 // CHECK1: cond.end:
1388 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1389 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1390 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1391 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1392 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1393 // CHECK1: omp.inner.for.cond:
1394 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48:![0-9]+]]
1395 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]]
1396 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1397 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1398 // CHECK1: omp.inner.for.body:
1399 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP48]]
1400 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1401 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]]
1402 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1403 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]]
1404 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP48]]
1405 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP48]]
1406 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP48]]
1407 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]]
1408 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1409 // CHECK1: omp.inner.for.inc:
1410 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]]
1411 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP48]]
1412 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1413 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]]
1414 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
1415 // CHECK1: omp.inner.for.end:
1416 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1417 // CHECK1: omp.loop.exit:
1418 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1419 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1420 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1421 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1422 // CHECK1: .omp.final.then:
1423 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1424 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1425 // CHECK1: .omp.final.done:
1426 // CHECK1-NEXT: ret void
1427 //
1428 //
1429 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1430 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1431 // CHECK1-NEXT: entry:
1432 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1433 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1434 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1435 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1436 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1437 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1438 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1439 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1440 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1441 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1442 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1443 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1444 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1445 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1446 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1447 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1448 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1449 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1450 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1451 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1452 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1453 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1454 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1455 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1456 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1457 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1458 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1459 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1460 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1461 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1462 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1463 // CHECK1: cond.true:
1464 // CHECK1-NEXT: br label [[COND_END:%.*]]
1465 // CHECK1: cond.false:
1466 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1467 // CHECK1-NEXT: br label [[COND_END]]
1468 // CHECK1: cond.end:
1469 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1470 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1471 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1472 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1473 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1474 // CHECK1: omp.inner.for.cond:
1475 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51:![0-9]+]]
1476 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP51]]
1477 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1478 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1479 // CHECK1: omp.inner.for.body:
1480 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]]
1481 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1482 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1483 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP51]]
1484 // CHECK1-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP51]]
1485 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1486 // CHECK1: omp.body.continue:
1487 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1488 // CHECK1: omp.inner.for.inc:
1489 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]]
1490 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1491 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]]
1492 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
1493 // CHECK1: omp.inner.for.end:
1494 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1495 // CHECK1: omp.loop.exit:
1496 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1497 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1498 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1499 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1500 // CHECK1: .omp.final.then:
1501 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1502 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1503 // CHECK1: .omp.final.done:
1504 // CHECK1-NEXT: ret void
1505 //
1506 //
1507 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
1508 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1509 // CHECK1-NEXT: entry:
1510 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1511 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1512 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1513 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1514 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
1515 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
1516 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1517 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1518 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
1519 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1520 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP1]])
1521 // CHECK1-NEXT: ret void
1522 //
1523 //
1524 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..16
1525 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1526 // CHECK1-NEXT: entry:
1527 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1528 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1529 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1530 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1531 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1532 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1533 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1534 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1535 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1536 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1537 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1538 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1539 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1540 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1541 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1542 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1543 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1544 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1545 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1546 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1547 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1548 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1549 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1550 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1551 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1552 // CHECK1: cond.true:
1553 // CHECK1-NEXT: br label [[COND_END:%.*]]
1554 // CHECK1: cond.false:
1555 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1556 // CHECK1-NEXT: br label [[COND_END]]
1557 // CHECK1: cond.end:
1558 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1559 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1560 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1561 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1562 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1563 // CHECK1: omp.inner.for.cond:
1564 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]]
1565 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
1566 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1567 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1568 // CHECK1: omp.inner.for.body:
1569 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]]
1570 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1571 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
1572 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1573 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP54]]
1574 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
1575 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1576 // CHECK1: omp_if.then:
1577 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]]
1578 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1579 // CHECK1: omp_if.else:
1580 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
1581 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]]
1582 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]]
1583 // CHECK1-NEXT: call void @.omp_outlined..17(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]]
1584 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
1585 // CHECK1-NEXT: br label [[OMP_IF_END]]
1586 // CHECK1: omp_if.end:
1587 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1588 // CHECK1: omp.inner.for.inc:
1589 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
1590 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]]
1591 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1592 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
1593 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
1594 // CHECK1: omp.inner.for.end:
1595 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1596 // CHECK1: omp.loop.exit:
1597 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1598 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1599 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1600 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1601 // CHECK1: .omp.final.then:
1602 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1603 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1604 // CHECK1: .omp.final.done:
1605 // CHECK1-NEXT: ret void
1606 //
1607 //
1608 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..17
1609 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1610 // CHECK1-NEXT: entry:
1611 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1612 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1613 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1614 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1615 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1616 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1617 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1618 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1619 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1620 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1621 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1622 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1623 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1624 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1625 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1626 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1627 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1628 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1629 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1630 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1631 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1632 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1633 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1634 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1635 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1636 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1637 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1638 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1639 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1640 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1641 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1642 // CHECK1: cond.true:
1643 // CHECK1-NEXT: br label [[COND_END:%.*]]
1644 // CHECK1: cond.false:
1645 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1646 // CHECK1-NEXT: br label [[COND_END]]
1647 // CHECK1: cond.end:
1648 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1649 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1650 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1651 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1652 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1653 // CHECK1: omp.inner.for.cond:
1654 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]]
1655 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]]
1656 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1657 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1658 // CHECK1: omp.inner.for.body:
1659 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
1660 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1661 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1662 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP57]]
1663 // CHECK1-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]]
1664 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1665 // CHECK1: omp.body.continue:
1666 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1667 // CHECK1: omp.inner.for.inc:
1668 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
1669 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1670 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
1671 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
1672 // CHECK1: omp.inner.for.end:
1673 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1674 // CHECK1: omp.loop.exit:
1675 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1676 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1677 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1678 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1679 // CHECK1: .omp.final.then:
1680 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1681 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1682 // CHECK1: .omp.final.done:
1683 // CHECK1-NEXT: ret void
1684 //
1685 //
1686 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1687 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
1688 // CHECK1-NEXT: entry:
1689 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1690 // CHECK1-NEXT: ret void
1691 //
1692 //
1693 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv
1694 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1695 // CHECK3-NEXT: entry:
1696 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1697 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1698 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1699 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1700 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1701 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1702 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
1703 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1704 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
1705 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1706 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1707 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
1708 // CHECK3-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
1709 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1710 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
1711 // CHECK3-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
1712 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1713 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 8
1714 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1715 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1716 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1717 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1718 // CHECK3-NEXT: store i32 1, i32* [[TMP9]], align 4
1719 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1720 // CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4
1721 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1722 // CHECK3-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
1723 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1724 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
1725 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1726 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8
1727 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1728 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8
1729 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1730 // CHECK3-NEXT: store i8** null, i8*** [[TMP15]], align 8
1731 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1732 // CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 8
1733 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1734 // CHECK3-NEXT: store i64 100, i64* [[TMP17]], align 8
1735 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1736 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1737 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1738 // CHECK3: omp_offload.failed:
1739 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
1740 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1741 // CHECK3: omp_offload.cont:
1742 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1743 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1744 // CHECK3-NEXT: store i32 1, i32* [[TMP20]], align 4
1745 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1746 // CHECK3-NEXT: store i32 0, i32* [[TMP21]], align 4
1747 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1748 // CHECK3-NEXT: store i8** null, i8*** [[TMP22]], align 8
1749 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1750 // CHECK3-NEXT: store i8** null, i8*** [[TMP23]], align 8
1751 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1752 // CHECK3-NEXT: store i64* null, i64** [[TMP24]], align 8
1753 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1754 // CHECK3-NEXT: store i64* null, i64** [[TMP25]], align 8
1755 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1756 // CHECK3-NEXT: store i8** null, i8*** [[TMP26]], align 8
1757 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1758 // CHECK3-NEXT: store i8** null, i8*** [[TMP27]], align 8
1759 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1760 // CHECK3-NEXT: store i64 100, i64* [[TMP28]], align 8
1761 // CHECK3-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1762 // CHECK3-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1763 // CHECK3-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1764 // CHECK3: omp_offload.failed3:
1765 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
1766 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1767 // CHECK3: omp_offload.cont4:
1768 // CHECK3-NEXT: ret void
1769 //
1770 //
1771 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45
1772 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
1773 // CHECK3-NEXT: entry:
1774 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1775 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1776 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1777 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1778 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
1779 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1780 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
1781 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1782 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
1783 // CHECK3-NEXT: ret void
1784 //
1785 //
1786 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1787 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
1788 // CHECK3-NEXT: entry:
1789 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1790 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1791 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1792 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1793 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1794 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1795 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1796 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1797 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1798 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1799 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1800 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1801 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1802 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1803 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1804 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1805 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1806 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1807 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1808 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1809 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1810 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1811 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1812 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1813 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1814 // CHECK3: cond.true:
1815 // CHECK3-NEXT: br label [[COND_END:%.*]]
1816 // CHECK3: cond.false:
1817 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1818 // CHECK3-NEXT: br label [[COND_END]]
1819 // CHECK3: cond.end:
1820 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1821 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1822 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1823 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1824 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1825 // CHECK3: omp.inner.for.cond:
1826 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
1827 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1828 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1829 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1830 // CHECK3: omp.inner.for.body:
1831 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
1832 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1833 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1834 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1835 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 4, !nontemporal !10, !llvm.access.group [[ACC_GRP9]]
1836 // CHECK3-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1837 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group [[ACC_GRP9]]
1838 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]]
1839 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]]
1840 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1841 // CHECK3: omp.inner.for.inc:
1842 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1843 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
1844 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1845 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1846 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1847 // CHECK3: omp.inner.for.end:
1848 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1849 // CHECK3: omp.loop.exit:
1850 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1851 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1852 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1853 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1854 // CHECK3: .omp.final.then:
1855 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1856 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1857 // CHECK3: .omp.final.done:
1858 // CHECK3-NEXT: ret void
1859 //
1860 //
1861 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1862 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
1863 // CHECK3-NEXT: entry:
1864 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1865 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1866 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1867 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1868 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1869 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1870 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1871 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1872 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1873 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1874 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1875 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1876 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1877 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1878 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1879 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1880 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1881 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1882 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1883 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1884 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1885 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
1886 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1887 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1888 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
1889 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1890 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1891 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1892 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1893 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1894 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1895 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1896 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1897 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1898 // CHECK3: cond.true:
1899 // CHECK3-NEXT: br label [[COND_END:%.*]]
1900 // CHECK3: cond.false:
1901 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1902 // CHECK3-NEXT: br label [[COND_END]]
1903 // CHECK3: cond.end:
1904 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1905 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1906 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1907 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1908 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1909 // CHECK3: omp.inner.for.cond:
1910 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
1911 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1912 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1913 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1914 // CHECK3: omp.inner.for.body:
1915 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1916 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1917 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1918 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
1919 // CHECK3-NEXT: store i32 0, i32* [[CONV]], align 4, !nontemporal !10, !llvm.access.group [[ACC_GRP14]]
1920 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1921 // CHECK3: omp.body.continue:
1922 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1923 // CHECK3: omp.inner.for.inc:
1924 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1925 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
1926 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1927 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1928 // CHECK3: omp.inner.for.end:
1929 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1930 // CHECK3: omp.loop.exit:
1931 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1932 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1933 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1934 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1935 // CHECK3: .omp.final.then:
1936 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1937 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1938 // CHECK3: .omp.final.done:
1939 // CHECK3-NEXT: ret void
1940 //
1941 //
1942 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
1943 // CHECK3-SAME: () #[[ATTR1]] {
1944 // CHECK3-NEXT: entry:
1945 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1946 // CHECK3-NEXT: ret void
1947 //
1948 //
1949 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1950 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1951 // CHECK3-NEXT: entry:
1952 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1953 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1954 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1955 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1956 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1957 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1958 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1959 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1960 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1961 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1962 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1963 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1964 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1965 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1966 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1967 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1968 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1969 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1970 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1971 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1972 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1973 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1974 // CHECK3: cond.true:
1975 // CHECK3-NEXT: br label [[COND_END:%.*]]
1976 // CHECK3: cond.false:
1977 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1978 // CHECK3-NEXT: br label [[COND_END]]
1979 // CHECK3: cond.end:
1980 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1981 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1982 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1983 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1984 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1985 // CHECK3: omp.inner.for.cond:
1986 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
1987 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
1988 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1989 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1990 // CHECK3: omp.inner.for.body:
1991 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]]
1992 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1993 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
1994 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1995 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]]
1996 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP19]]
1997 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP19]]
1998 // CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP19]]
1999 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]]
2000 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2001 // CHECK3: omp.inner.for.inc:
2002 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
2003 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]]
2004 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2005 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
2006 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
2007 // CHECK3: omp.inner.for.end:
2008 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2009 // CHECK3: omp.loop.exit:
2010 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2011 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2012 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2013 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2014 // CHECK3: .omp.final.then:
2015 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2016 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2017 // CHECK3: .omp.final.done:
2018 // CHECK3-NEXT: ret void
2019 //
2020 //
2021 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
2022 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2023 // CHECK3-NEXT: entry:
2024 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2025 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2026 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2027 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2028 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2029 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2030 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2031 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2032 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2033 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2034 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2035 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2036 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2037 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2038 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2039 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2040 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2041 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2042 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2043 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2044 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2045 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2046 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2047 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2048 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2049 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2050 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2051 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2052 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2053 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2054 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2055 // CHECK3: cond.true:
2056 // CHECK3-NEXT: br label [[COND_END:%.*]]
2057 // CHECK3: cond.false:
2058 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2059 // CHECK3-NEXT: br label [[COND_END]]
2060 // CHECK3: cond.end:
2061 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2062 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2063 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2064 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2065 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2066 // CHECK3: omp.inner.for.cond:
2067 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
2068 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
2069 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2070 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2071 // CHECK3: omp.inner.for.body:
2072 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
2073 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2074 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2075 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
2076 // CHECK3-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP22]]
2077 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2078 // CHECK3: omp.body.continue:
2079 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2080 // CHECK3: omp.inner.for.inc:
2081 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
2082 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2083 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
2084 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
2085 // CHECK3: omp.inner.for.end:
2086 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2087 // CHECK3: omp.loop.exit:
2088 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2089 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2090 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2091 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2092 // CHECK3: .omp.final.then:
2093 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2094 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2095 // CHECK3: .omp.final.done:
2096 // CHECK3-NEXT: ret void
2097 //
2098 //
2099 // CHECK3-LABEL: define {{[^@]+}}@main
2100 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2101 // CHECK3-NEXT: entry:
2102 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2103 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2104 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2105 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2106 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2107 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2108 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2109 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
2110 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
2111 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2112 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2113 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
2114 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2115 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
2116 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2117 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
2118 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2119 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
2120 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2121 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
2122 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2123 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
2124 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2125 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
2126 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2127 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
2128 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2129 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
2130 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2131 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2132 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2133 // CHECK3: omp_offload.failed:
2134 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
2135 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
2136 // CHECK3: omp_offload.cont:
2137 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
2138 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* @Arg, align 4
2139 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
2140 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2141 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2142 // CHECK3-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2143 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
2144 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2145 // CHECK3-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
2146 // CHECK3-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
2147 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2148 // CHECK3-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2149 // CHECK3-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP14]] to i1
2150 // CHECK3-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2151 // CHECK3: omp_if.then:
2152 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2153 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
2154 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[TMP16]], align 8
2155 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2156 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
2157 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[TMP18]], align 8
2158 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2159 // CHECK3-NEXT: store i8* null, i8** [[TMP19]], align 8
2160 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2161 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2162 // CHECK3-NEXT: [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2163 // CHECK3-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
2164 // CHECK3-NEXT: [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
2165 // CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2166 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
2167 // CHECK3-NEXT: store i32 1, i32* [[TMP24]], align 4
2168 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
2169 // CHECK3-NEXT: store i32 1, i32* [[TMP25]], align 4
2170 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
2171 // CHECK3-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
2172 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
2173 // CHECK3-NEXT: store i8** [[TMP21]], i8*** [[TMP27]], align 8
2174 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
2175 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP28]], align 8
2176 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
2177 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP29]], align 8
2178 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
2179 // CHECK3-NEXT: store i8** null, i8*** [[TMP30]], align 8
2180 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
2181 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 8
2182 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
2183 // CHECK3-NEXT: store i64 100, i64* [[TMP32]], align 8
2184 // CHECK3-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP23]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
2185 // CHECK3-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
2186 // CHECK3-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2187 // CHECK3: omp_offload.failed7:
2188 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
2189 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]
2190 // CHECK3: omp_offload.cont8:
2191 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2192 // CHECK3: omp_if.else:
2193 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
2194 // CHECK3-NEXT: br label [[OMP_IF_END]]
2195 // CHECK3: omp_if.end:
2196 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* @Arg, align 4
2197 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP35]])
2198 // CHECK3-NEXT: ret i32 [[CALL]]
2199 //
2200 //
2201 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
2202 // CHECK3-SAME: () #[[ATTR1]] {
2203 // CHECK3-NEXT: entry:
2204 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2205 // CHECK3-NEXT: ret void
2206 //
2207 //
2208 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
2209 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2210 // CHECK3-NEXT: entry:
2211 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2212 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2213 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2214 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2215 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2216 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2217 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2218 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2219 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2220 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2221 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2222 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2223 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2224 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2225 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2226 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2227 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2228 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2229 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2230 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2231 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2232 // CHECK3: cond.true:
2233 // CHECK3-NEXT: br label [[COND_END:%.*]]
2234 // CHECK3: cond.false:
2235 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2236 // CHECK3-NEXT: br label [[COND_END]]
2237 // CHECK3: cond.end:
2238 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2239 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2240 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2241 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2242 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2243 // CHECK3: omp.inner.for.cond:
2244 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]
2245 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
2246 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2247 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2248 // CHECK3: omp.inner.for.body:
2249 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]]
2250 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2251 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
2252 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2253 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP25]]
2254 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2255 // CHECK3: omp.inner.for.inc:
2256 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
2257 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]]
2258 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2259 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
2260 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
2261 // CHECK3: omp.inner.for.end:
2262 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2263 // CHECK3: omp.loop.exit:
2264 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2265 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2266 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2267 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2268 // CHECK3: .omp.final.then:
2269 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2270 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2271 // CHECK3: .omp.final.done:
2272 // CHECK3-NEXT: ret void
2273 //
2274 //
2275 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5
2276 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2277 // CHECK3-NEXT: entry:
2278 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2279 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2280 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2281 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2282 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2283 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2284 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2285 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2286 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2287 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2288 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2289 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2290 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2291 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2292 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2293 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2294 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2295 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2296 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2297 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2298 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2299 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2300 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2301 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2302 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2303 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2304 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2305 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2306 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2307 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2308 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2309 // CHECK3: cond.true:
2310 // CHECK3-NEXT: br label [[COND_END:%.*]]
2311 // CHECK3: cond.false:
2312 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2313 // CHECK3-NEXT: br label [[COND_END]]
2314 // CHECK3: cond.end:
2315 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2316 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2317 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2318 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2319 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2320 // CHECK3: omp.inner.for.cond:
2321 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]]
2322 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]]
2323 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2324 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2325 // CHECK3: omp.inner.for.body:
2326 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
2327 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2328 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2329 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP28]]
2330 // CHECK3-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP28]]
2331 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2332 // CHECK3: omp.body.continue:
2333 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2334 // CHECK3: omp.inner.for.inc:
2335 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
2336 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2337 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
2338 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
2339 // CHECK3: omp.inner.for.end:
2340 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2341 // CHECK3: omp.loop.exit:
2342 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2343 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2344 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2345 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2346 // CHECK3: .omp.final.then:
2347 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2348 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2349 // CHECK3: .omp.final.done:
2350 // CHECK3-NEXT: ret void
2351 //
2352 //
2353 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
2354 // CHECK3-SAME: () #[[ATTR1]] {
2355 // CHECK3-NEXT: entry:
2356 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
2357 // CHECK3-NEXT: ret void
2358 //
2359 //
2360 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
2361 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2362 // CHECK3-NEXT: entry:
2363 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2364 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2365 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2366 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2367 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2368 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2369 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2370 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2371 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2372 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2373 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2374 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2375 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2376 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2377 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2378 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2379 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2380 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2381 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2382 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2383 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2384 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2385 // CHECK3: cond.true:
2386 // CHECK3-NEXT: br label [[COND_END:%.*]]
2387 // CHECK3: cond.false:
2388 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2389 // CHECK3-NEXT: br label [[COND_END]]
2390 // CHECK3: cond.end:
2391 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2392 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2393 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2394 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2395 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2396 // CHECK3: omp.inner.for.cond:
2397 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2398 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2399 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2400 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2401 // CHECK3: omp.inner.for.body:
2402 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2403 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2404 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2405 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2406 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2407 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2408 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2409 // CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2410 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2411 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2412 // CHECK3: omp.inner.for.inc:
2413 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2414 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2415 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2416 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2417 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
2418 // CHECK3: omp.inner.for.end:
2419 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2420 // CHECK3: omp.loop.exit:
2421 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2422 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2423 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2424 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2425 // CHECK3: .omp.final.then:
2426 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2427 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2428 // CHECK3: .omp.final.done:
2429 // CHECK3-NEXT: ret void
2430 //
2431 //
2432 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
2433 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2434 // CHECK3-NEXT: entry:
2435 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2436 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2437 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2438 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2439 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2440 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2441 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2442 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2443 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2444 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2445 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2446 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2447 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2448 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2449 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2450 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2451 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2452 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2453 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2454 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2455 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2456 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2457 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2458 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2459 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2460 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2461 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2462 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2463 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2464 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2465 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2466 // CHECK3: cond.true:
2467 // CHECK3-NEXT: br label [[COND_END:%.*]]
2468 // CHECK3: cond.false:
2469 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2470 // CHECK3-NEXT: br label [[COND_END]]
2471 // CHECK3: cond.end:
2472 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2473 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2474 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2475 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2476 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2477 // CHECK3: omp.inner.for.cond:
2478 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2479 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2480 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2481 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2482 // CHECK3: omp.inner.for.body:
2483 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2484 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2485 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2486 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2487 // CHECK3-NEXT: call void @_Z3fn5v()
2488 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2489 // CHECK3: omp.body.continue:
2490 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2491 // CHECK3: omp.inner.for.inc:
2492 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2493 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2494 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2495 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
2496 // CHECK3: omp.inner.for.end:
2497 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2498 // CHECK3: omp.loop.exit:
2499 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2500 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2501 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2502 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2503 // CHECK3: .omp.final.then:
2504 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2505 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2506 // CHECK3: .omp.final.done:
2507 // CHECK3-NEXT: ret void
2508 //
2509 //
2510 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
2511 // CHECK3-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2512 // CHECK3-NEXT: entry:
2513 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2514 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2515 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2516 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2517 // CHECK3-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
2518 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
2519 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2520 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2521 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
2522 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2523 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
2524 // CHECK3-NEXT: ret void
2525 //
2526 //
2527 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8
2528 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2529 // CHECK3-NEXT: entry:
2530 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2531 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2532 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2533 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2534 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2535 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2536 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2537 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2538 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2539 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2540 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2541 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2542 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
2543 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
2544 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2545 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2546 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2547 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2548 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2549 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2550 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2551 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2552 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2553 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2554 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2555 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2556 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2557 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2558 // CHECK3: cond.true:
2559 // CHECK3-NEXT: br label [[COND_END:%.*]]
2560 // CHECK3: cond.false:
2561 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2562 // CHECK3-NEXT: br label [[COND_END]]
2563 // CHECK3: cond.end:
2564 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2565 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2566 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2567 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2568 // CHECK3-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 1
2569 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
2570 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
2571 // CHECK3: omp_if.then:
2572 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2573 // CHECK3: omp.inner.for.cond:
2574 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]]
2575 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]]
2576 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2577 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2578 // CHECK3: omp.inner.for.body:
2579 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP34]]
2580 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2581 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]]
2582 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2583 // CHECK3-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP34]]
2584 // CHECK3-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
2585 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2586 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
2587 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group [[ACC_GRP34]]
2588 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP34]]
2589 // CHECK3-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP34]]
2590 // CHECK3-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
2591 // CHECK3-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
2592 // CHECK3: omp_if.then5:
2593 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP34]]
2594 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2595 // CHECK3: omp_if.else:
2596 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]]
2597 // CHECK3-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP34]]
2598 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP34]]
2599 // CHECK3-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP34]]
2600 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]]
2601 // CHECK3-NEXT: br label [[OMP_IF_END]]
2602 // CHECK3: omp_if.end:
2603 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2604 // CHECK3: omp.inner.for.inc:
2605 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]]
2606 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP34]]
2607 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2608 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]]
2609 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
2610 // CHECK3: omp.inner.for.end:
2611 // CHECK3-NEXT: br label [[OMP_IF_END22:%.*]]
2612 // CHECK3: omp_if.else6:
2613 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
2614 // CHECK3: omp.inner.for.cond7:
2615 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2616 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2617 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2618 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
2619 // CHECK3: omp.inner.for.body9:
2620 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2621 // CHECK3-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
2622 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2623 // CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
2624 // CHECK3-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 1
2625 // CHECK3-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
2626 // CHECK3-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
2627 // CHECK3-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
2628 // CHECK3-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
2629 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
2630 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 1
2631 // CHECK3-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
2632 // CHECK3-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
2633 // CHECK3: omp_if.then15:
2634 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
2635 // CHECK3-NEXT: br label [[OMP_IF_END18:%.*]]
2636 // CHECK3: omp_if.else16:
2637 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2638 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2639 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
2640 // CHECK3-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
2641 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2642 // CHECK3-NEXT: br label [[OMP_IF_END18]]
2643 // CHECK3: omp_if.end18:
2644 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
2645 // CHECK3: omp.inner.for.inc19:
2646 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2647 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2648 // CHECK3-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2649 // CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
2650 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP37:![0-9]+]]
2651 // CHECK3: omp.inner.for.end21:
2652 // CHECK3-NEXT: br label [[OMP_IF_END22]]
2653 // CHECK3: omp_if.end22:
2654 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2655 // CHECK3: omp.loop.exit:
2656 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2657 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2658 // CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
2659 // CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2660 // CHECK3: .omp.final.then:
2661 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2662 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2663 // CHECK3: .omp.final.done:
2664 // CHECK3-NEXT: ret void
2665 //
2666 //
2667 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9
2668 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2669 // CHECK3-NEXT: entry:
2670 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2671 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2672 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2673 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2674 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2675 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2676 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2677 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2678 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2679 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2680 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2681 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2682 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2683 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2684 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2685 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2686 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2687 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2688 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2689 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2690 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2691 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
2692 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2693 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2694 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
2695 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2696 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2697 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2698 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
2699 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2700 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2701 // CHECK3: omp_if.then:
2702 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2703 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2704 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2705 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2706 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2707 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2708 // CHECK3: cond.true:
2709 // CHECK3-NEXT: br label [[COND_END:%.*]]
2710 // CHECK3: cond.false:
2711 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2712 // CHECK3-NEXT: br label [[COND_END]]
2713 // CHECK3: cond.end:
2714 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2715 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2716 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2717 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2718 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2719 // CHECK3: omp.inner.for.cond:
2720 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
2721 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
2722 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2723 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2724 // CHECK3: omp.inner.for.body:
2725 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
2726 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2727 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2728 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP38]]
2729 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP38]]
2730 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2731 // CHECK3: omp.body.continue:
2732 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2733 // CHECK3: omp.inner.for.inc:
2734 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
2735 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
2736 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
2737 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
2738 // CHECK3: omp.inner.for.end:
2739 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2740 // CHECK3: omp_if.else:
2741 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2742 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2743 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2744 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2745 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
2746 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
2747 // CHECK3: cond.true6:
2748 // CHECK3-NEXT: br label [[COND_END8:%.*]]
2749 // CHECK3: cond.false7:
2750 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2751 // CHECK3-NEXT: br label [[COND_END8]]
2752 // CHECK3: cond.end8:
2753 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
2754 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
2755 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2756 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
2757 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
2758 // CHECK3: omp.inner.for.cond10:
2759 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2760 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2761 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2762 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
2763 // CHECK3: omp.inner.for.body12:
2764 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2765 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
2766 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2767 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
2768 // CHECK3-NEXT: call void @_Z3fn6v()
2769 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
2770 // CHECK3: omp.body.continue15:
2771 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
2772 // CHECK3: omp.inner.for.inc16:
2773 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2774 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
2775 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
2776 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP41:![0-9]+]]
2777 // CHECK3: omp.inner.for.end18:
2778 // CHECK3-NEXT: br label [[OMP_IF_END]]
2779 // CHECK3: omp_if.end:
2780 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2781 // CHECK3: omp.loop.exit:
2782 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2783 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2784 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2785 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2786 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2787 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2788 // CHECK3: .omp.final.then:
2789 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2790 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2791 // CHECK3: .omp.final.done:
2792 // CHECK3-NEXT: ret void
2793 //
2794 //
2795 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2796 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2797 // CHECK3-NEXT: entry:
2798 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2799 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2800 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2801 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2802 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2803 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2804 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2805 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2806 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2807 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2808 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2809 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2810 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2811 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2812 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2813 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2814 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2815 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2816 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2817 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2818 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2819 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
2820 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2821 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2822 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
2823 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2824 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2825 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2826 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
2827 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2828 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2829 // CHECK3: omp_if.then:
2830 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2831 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2832 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2833 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2834 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2835 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2836 // CHECK3: cond.true:
2837 // CHECK3-NEXT: br label [[COND_END:%.*]]
2838 // CHECK3: cond.false:
2839 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2840 // CHECK3-NEXT: br label [[COND_END]]
2841 // CHECK3: cond.end:
2842 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2843 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2844 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2845 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2846 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2847 // CHECK3: omp.inner.for.cond:
2848 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
2849 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
2850 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2851 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2852 // CHECK3: omp.inner.for.body:
2853 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
2854 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2855 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2856 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP42]]
2857 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP42]]
2858 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2859 // CHECK3: omp.body.continue:
2860 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2861 // CHECK3: omp.inner.for.inc:
2862 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
2863 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
2864 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
2865 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
2866 // CHECK3: omp.inner.for.end:
2867 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2868 // CHECK3: omp_if.else:
2869 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2870 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2871 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2872 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2873 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
2874 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
2875 // CHECK3: cond.true6:
2876 // CHECK3-NEXT: br label [[COND_END8:%.*]]
2877 // CHECK3: cond.false7:
2878 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2879 // CHECK3-NEXT: br label [[COND_END8]]
2880 // CHECK3: cond.end8:
2881 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
2882 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
2883 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2884 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
2885 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
2886 // CHECK3: omp.inner.for.cond10:
2887 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2888 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2889 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2890 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
2891 // CHECK3: omp.inner.for.body12:
2892 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2893 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
2894 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2895 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
2896 // CHECK3-NEXT: call void @_Z3fn6v()
2897 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
2898 // CHECK3: omp.body.continue15:
2899 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
2900 // CHECK3: omp.inner.for.inc16:
2901 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2902 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
2903 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
2904 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP45:![0-9]+]]
2905 // CHECK3: omp.inner.for.end18:
2906 // CHECK3-NEXT: br label [[OMP_IF_END]]
2907 // CHECK3: omp_if.end:
2908 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2909 // CHECK3: omp.loop.exit:
2910 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2911 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2912 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2913 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2914 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2915 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2916 // CHECK3: .omp.final.then:
2917 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2918 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2919 // CHECK3: .omp.final.done:
2920 // CHECK3-NEXT: ret void
2921 //
2922 //
2923 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2924 // CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
2925 // CHECK3-NEXT: entry:
2926 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
2927 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2928 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2929 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2930 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2931 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2932 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2933 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
2934 // CHECK3-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
2935 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2936 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2937 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
2938 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2939 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
2940 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2941 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
2942 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2943 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
2944 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2945 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
2946 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2947 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
2948 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2949 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
2950 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2951 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
2952 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2953 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
2954 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2955 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2956 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2957 // CHECK3: omp_offload.failed:
2958 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
2959 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
2960 // CHECK3: omp_offload.cont:
2961 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
2962 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2963 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
2964 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2965 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2966 // CHECK3-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2967 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
2968 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2969 // CHECK3-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
2970 // CHECK3-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
2971 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2972 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2973 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2974 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[TMP15]], align 8
2975 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2976 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
2977 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[TMP17]], align 8
2978 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2979 // CHECK3-NEXT: store i8* null, i8** [[TMP18]], align 8
2980 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2981 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2982 // CHECK3-NEXT: [[TMP21:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2983 // CHECK3-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP21]] to i1
2984 // CHECK3-NEXT: [[TMP22:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
2985 // CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2986 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
2987 // CHECK3-NEXT: store i32 1, i32* [[TMP23]], align 4
2988 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
2989 // CHECK3-NEXT: store i32 1, i32* [[TMP24]], align 4
2990 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
2991 // CHECK3-NEXT: store i8** [[TMP19]], i8*** [[TMP25]], align 8
2992 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
2993 // CHECK3-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
2994 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
2995 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64** [[TMP27]], align 8
2996 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
2997 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i64** [[TMP28]], align 8
2998 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
2999 // CHECK3-NEXT: store i8** null, i8*** [[TMP29]], align 8
3000 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
3001 // CHECK3-NEXT: store i8** null, i8*** [[TMP30]], align 8
3002 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
3003 // CHECK3-NEXT: store i64 100, i64* [[TMP31]], align 8
3004 // CHECK3-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP22]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
3005 // CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
3006 // CHECK3-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3007 // CHECK3: omp_offload.failed6:
3008 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP13]]) #[[ATTR2]]
3009 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]]
3010 // CHECK3: omp_offload.cont7:
3011 // CHECK3-NEXT: ret i32 0
3012 //
3013 //
3014 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
3015 // CHECK3-SAME: () #[[ATTR1]] {
3016 // CHECK3-NEXT: entry:
3017 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
3018 // CHECK3-NEXT: ret void
3019 //
3020 //
3021 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13
3022 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3023 // CHECK3-NEXT: entry:
3024 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3025 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3026 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3027 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3028 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3029 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3030 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3031 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3032 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3033 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3034 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3035 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3036 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3037 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3038 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3039 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3040 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3041 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3042 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3043 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3044 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3045 // CHECK3: cond.true:
3046 // CHECK3-NEXT: br label [[COND_END:%.*]]
3047 // CHECK3: cond.false:
3048 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3049 // CHECK3-NEXT: br label [[COND_END]]
3050 // CHECK3: cond.end:
3051 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3052 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3053 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3054 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3055 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3056 // CHECK3: omp.inner.for.cond:
3057 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]]
3058 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]]
3059 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3060 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3061 // CHECK3: omp.inner.for.body:
3062 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP46]]
3063 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3064 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]]
3065 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3066 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP46]]
3067 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3068 // CHECK3: omp.inner.for.inc:
3069 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]]
3070 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP46]]
3071 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3072 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]]
3073 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
3074 // CHECK3: omp.inner.for.end:
3075 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3076 // CHECK3: omp.loop.exit:
3077 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3078 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3079 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3080 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3081 // CHECK3: .omp.final.then:
3082 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3083 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3084 // CHECK3: .omp.final.done:
3085 // CHECK3-NEXT: ret void
3086 //
3087 //
3088 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
3089 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3090 // CHECK3-NEXT: entry:
3091 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3092 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3093 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3094 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3095 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3096 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3097 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3098 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3099 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3100 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3101 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3102 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3103 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3104 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3105 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3106 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3107 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3108 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3109 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3110 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3111 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3112 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3113 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3114 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3115 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3116 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3117 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3118 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3119 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3120 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3121 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3122 // CHECK3: cond.true:
3123 // CHECK3-NEXT: br label [[COND_END:%.*]]
3124 // CHECK3: cond.false:
3125 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3126 // CHECK3-NEXT: br label [[COND_END]]
3127 // CHECK3: cond.end:
3128 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3129 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3130 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3131 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3132 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3133 // CHECK3: omp.inner.for.cond:
3134 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49:![0-9]+]]
3135 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP49]]
3136 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3137 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3138 // CHECK3: omp.inner.for.body:
3139 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]]
3140 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3141 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3142 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP49]]
3143 // CHECK3-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP49]]
3144 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3145 // CHECK3: omp.body.continue:
3146 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3147 // CHECK3: omp.inner.for.inc:
3148 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]]
3149 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3150 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]]
3151 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
3152 // CHECK3: omp.inner.for.end:
3153 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3154 // CHECK3: omp.loop.exit:
3155 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3156 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3157 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3158 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3159 // CHECK3: .omp.final.then:
3160 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3161 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3162 // CHECK3: .omp.final.done:
3163 // CHECK3-NEXT: ret void
3164 //
3165 //
3166 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
3167 // CHECK3-SAME: () #[[ATTR1]] {
3168 // CHECK3-NEXT: entry:
3169 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*))
3170 // CHECK3-NEXT: ret void
3171 //
3172 //
3173 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
3174 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3175 // CHECK3-NEXT: entry:
3176 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3177 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3178 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3179 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3180 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3181 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3182 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3183 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3184 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3185 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3186 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3187 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3188 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3189 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3190 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3191 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3192 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3193 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3194 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3195 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3196 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3197 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3198 // CHECK3: cond.true:
3199 // CHECK3-NEXT: br label [[COND_END:%.*]]
3200 // CHECK3: cond.false:
3201 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3202 // CHECK3-NEXT: br label [[COND_END]]
3203 // CHECK3: cond.end:
3204 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3205 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3206 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3207 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3208 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3209 // CHECK3: omp.inner.for.cond:
3210 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3211 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3212 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3213 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3214 // CHECK3: omp.inner.for.body:
3215 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3216 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3217 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3218 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3219 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3220 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3221 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3222 // CHECK3-NEXT: call void @.omp_outlined..16(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3223 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3224 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3225 // CHECK3: omp.inner.for.inc:
3226 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3227 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3228 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3229 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3230 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
3231 // CHECK3: omp.inner.for.end:
3232 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3233 // CHECK3: omp.loop.exit:
3234 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3235 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3236 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3237 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3238 // CHECK3: .omp.final.then:
3239 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3240 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3241 // CHECK3: .omp.final.done:
3242 // CHECK3-NEXT: ret void
3243 //
3244 //
3245 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..16
3246 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3247 // CHECK3-NEXT: entry:
3248 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3249 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3250 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3251 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3252 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3253 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3254 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3255 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3256 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3257 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3258 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3259 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3260 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3261 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3262 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3263 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3264 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3265 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3266 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3267 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3268 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3269 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3270 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3271 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3272 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3273 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3274 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3275 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3276 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3277 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3278 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3279 // CHECK3: cond.true:
3280 // CHECK3-NEXT: br label [[COND_END:%.*]]
3281 // CHECK3: cond.false:
3282 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3283 // CHECK3-NEXT: br label [[COND_END]]
3284 // CHECK3: cond.end:
3285 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3286 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3287 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3288 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3289 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3290 // CHECK3: omp.inner.for.cond:
3291 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3292 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3293 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3294 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3295 // CHECK3: omp.inner.for.body:
3296 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3297 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3298 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3299 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3300 // CHECK3-NEXT: call void @_Z3fn2v()
3301 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3302 // CHECK3: omp.body.continue:
3303 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3304 // CHECK3: omp.inner.for.inc:
3305 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3306 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3307 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3308 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
3309 // CHECK3: omp.inner.for.end:
3310 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3311 // CHECK3: omp.loop.exit:
3312 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3313 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3314 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3315 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3316 // CHECK3: .omp.final.then:
3317 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3318 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3319 // CHECK3: .omp.final.done:
3320 // CHECK3-NEXT: ret void
3321 //
3322 //
3323 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
3324 // CHECK3-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3325 // CHECK3-NEXT: entry:
3326 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3327 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3328 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3329 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3330 // CHECK3-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
3331 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
3332 // CHECK3-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3333 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3334 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
3335 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3336 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP1]])
3337 // CHECK3-NEXT: ret void
3338 //
3339 //
3340 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..17
3341 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3342 // CHECK3-NEXT: entry:
3343 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3344 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3345 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3346 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3347 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3348 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3349 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3350 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3351 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3352 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3353 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3354 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3355 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3356 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3357 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3358 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3359 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3360 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3361 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3362 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3363 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3364 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3365 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3366 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3367 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3368 // CHECK3: cond.true:
3369 // CHECK3-NEXT: br label [[COND_END:%.*]]
3370 // CHECK3: cond.false:
3371 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3372 // CHECK3-NEXT: br label [[COND_END]]
3373 // CHECK3: cond.end:
3374 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3375 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3376 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3377 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3378 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3379 // CHECK3: omp.inner.for.cond:
3380 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]]
3381 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
3382 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3383 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3384 // CHECK3: omp.inner.for.body:
3385 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]]
3386 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3387 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
3388 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3389 // CHECK3-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP54]]
3390 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
3391 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3392 // CHECK3: omp_if.then:
3393 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]]
3394 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
3395 // CHECK3: omp_if.else:
3396 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
3397 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]]
3398 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]]
3399 // CHECK3-NEXT: call void @.omp_outlined..18(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]]
3400 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
3401 // CHECK3-NEXT: br label [[OMP_IF_END]]
3402 // CHECK3: omp_if.end:
3403 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3404 // CHECK3: omp.inner.for.inc:
3405 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
3406 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]]
3407 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3408 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
3409 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
3410 // CHECK3: omp.inner.for.end:
3411 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3412 // CHECK3: omp.loop.exit:
3413 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3414 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3415 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
3416 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3417 // CHECK3: .omp.final.then:
3418 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3419 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3420 // CHECK3: .omp.final.done:
3421 // CHECK3-NEXT: ret void
3422 //
3423 //
3424 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..18
3425 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3426 // CHECK3-NEXT: entry:
3427 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3428 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3429 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3430 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3431 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3432 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3433 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3434 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3435 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3436 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3437 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3438 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3439 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3440 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3441 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3442 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3443 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3444 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3445 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3446 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3447 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3448 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3449 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3450 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3451 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3452 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3453 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3454 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3455 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3456 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3457 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3458 // CHECK3: cond.true:
3459 // CHECK3-NEXT: br label [[COND_END:%.*]]
3460 // CHECK3: cond.false:
3461 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3462 // CHECK3-NEXT: br label [[COND_END]]
3463 // CHECK3: cond.end:
3464 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3465 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3466 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3467 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3468 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3469 // CHECK3: omp.inner.for.cond:
3470 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]]
3471 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]]
3472 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3473 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3474 // CHECK3: omp.inner.for.body:
3475 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
3476 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3477 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3478 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP57]]
3479 // CHECK3-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]]
3480 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3481 // CHECK3: omp.body.continue:
3482 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3483 // CHECK3: omp.inner.for.inc:
3484 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
3485 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3486 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
3487 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
3488 // CHECK3: omp.inner.for.end:
3489 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3490 // CHECK3: omp.loop.exit:
3491 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3492 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3493 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3494 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3495 // CHECK3: .omp.final.then:
3496 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3497 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3498 // CHECK3: .omp.final.done:
3499 // CHECK3-NEXT: ret void
3500 //
3501 //
3502 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3503 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
3504 // CHECK3-NEXT: entry:
3505 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
3506 // CHECK3-NEXT: ret void
3507 //
3508 //
3509 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
3510 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3511 // CHECK5-NEXT: entry:
3512 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3513 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3514 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3515 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3516 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3517 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3518 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3519 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3520 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3521 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3522 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3523 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3524 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3525 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3526 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3527 // CHECK5: omp.inner.for.cond:
3528 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3529 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3530 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3531 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3532 // CHECK5: omp.inner.for.body:
3533 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3534 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3535 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3536 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3537 // CHECK5-NEXT: store i32 0, i32* @Arg, align 4, !llvm.access.group [[ACC_GRP2]]
3538 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3539 // CHECK5: omp.body.continue:
3540 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3541 // CHECK5: omp.inner.for.inc:
3542 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3543 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3544 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3545 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3546 // CHECK5: omp.inner.for.end:
3547 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3548 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3549 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3550 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3551 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3552 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3553 // CHECK5: omp.inner.for.cond7:
3554 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3555 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3556 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3557 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3558 // CHECK5: omp.inner.for.body9:
3559 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3560 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3561 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3562 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3563 // CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3564 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3565 // CHECK5: omp.body.continue12:
3566 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3567 // CHECK5: omp.inner.for.inc13:
3568 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3569 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3570 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3571 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3572 // CHECK5: omp.inner.for.end15:
3573 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3574 // CHECK5-NEXT: ret void
3575 //
3576 //
3577 // CHECK5-LABEL: define {{[^@]+}}@main
3578 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
3579 // CHECK5-NEXT: entry:
3580 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3581 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3582 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3583 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3584 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3585 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3586 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3587 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3588 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3589 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3590 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3591 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3592 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3593 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3594 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3595 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3596 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
3597 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
3598 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3599 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3600 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3601 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3602 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3603 // CHECK5: omp.inner.for.cond:
3604 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3605 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3606 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3607 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3608 // CHECK5: omp.inner.for.body:
3609 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3610 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3611 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3612 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3613 // CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3614 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3615 // CHECK5: omp.body.continue:
3616 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3617 // CHECK5: omp.inner.for.inc:
3618 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3619 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3620 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3621 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3622 // CHECK5: omp.inner.for.end:
3623 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3624 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3625 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3626 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3627 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3628 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3629 // CHECK5: omp.inner.for.cond7:
3630 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
3631 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
3632 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3633 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3634 // CHECK5: omp.inner.for.body9:
3635 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3636 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3637 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3638 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
3639 // CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
3640 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3641 // CHECK5: omp.body.continue12:
3642 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3643 // CHECK5: omp.inner.for.inc13:
3644 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3645 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3646 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3647 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
3648 // CHECK5: omp.inner.for.end15:
3649 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3650 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
3651 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3652 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3653 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3654 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3655 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3656 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3657 // CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
3658 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
3659 // CHECK5: omp.inner.for.cond21:
3660 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3661 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
3662 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3663 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3664 // CHECK5: omp.inner.for.body23:
3665 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3666 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
3667 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3668 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
3669 // CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
3670 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
3671 // CHECK5: omp.body.continue26:
3672 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
3673 // CHECK5: omp.inner.for.inc27:
3674 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3675 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
3676 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3677 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
3678 // CHECK5: omp.inner.for.end29:
3679 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
3680 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
3681 // CHECK5-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]])
3682 // CHECK5-NEXT: ret i32 [[CALL]]
3683 //
3684 //
3685 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3686 // CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
3687 // CHECK5-NEXT: entry:
3688 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
3689 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3690 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3691 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3692 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3693 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3694 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3695 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3696 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3697 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3698 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3699 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3700 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3701 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3702 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3703 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3704 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
3705 // CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
3706 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3707 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3708 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3709 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3710 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3711 // CHECK5: omp.inner.for.cond:
3712 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3713 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3714 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3715 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3716 // CHECK5: omp.inner.for.body:
3717 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3718 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3719 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3720 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
3721 // CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
3722 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3723 // CHECK5: omp.body.continue:
3724 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3725 // CHECK5: omp.inner.for.inc:
3726 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3727 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3728 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3729 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3730 // CHECK5: omp.inner.for.end:
3731 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3732 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3733 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3734 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3735 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3736 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3737 // CHECK5: omp.inner.for.cond7:
3738 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
3739 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
3740 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3741 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3742 // CHECK5: omp.inner.for.body9:
3743 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3744 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3745 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3746 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
3747 // CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
3748 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3749 // CHECK5: omp.body.continue12:
3750 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3751 // CHECK5: omp.inner.for.inc13:
3752 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3753 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3754 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3755 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
3756 // CHECK5: omp.inner.for.end15:
3757 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3758 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
3759 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3760 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3761 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3762 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3763 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3764 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3765 // CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
3766 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
3767 // CHECK5: omp.inner.for.cond21:
3768 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
3769 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
3770 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3771 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3772 // CHECK5: omp.inner.for.body23:
3773 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3774 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
3775 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3776 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
3777 // CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
3778 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
3779 // CHECK5: omp.body.continue26:
3780 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
3781 // CHECK5: omp.inner.for.inc27:
3782 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3783 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
3784 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3785 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
3786 // CHECK5: omp.inner.for.end29:
3787 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
3788 // CHECK5-NEXT: ret i32 0
3789 //
3790 //
3791 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
3792 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3793 // CHECK7-NEXT: entry:
3794 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3795 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3796 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3797 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3798 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3799 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3800 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3801 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3802 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3803 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3804 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3805 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3806 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3807 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3808 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3809 // CHECK7: omp.inner.for.cond:
3810 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3811 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3812 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3813 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3814 // CHECK7: omp.inner.for.body:
3815 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3816 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3817 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3818 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3819 // CHECK7-NEXT: store i32 0, i32* @Arg, align 4, !nontemporal !3, !llvm.access.group [[ACC_GRP2]]
3820 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3821 // CHECK7: omp.body.continue:
3822 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3823 // CHECK7: omp.inner.for.inc:
3824 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3825 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3826 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3827 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3828 // CHECK7: omp.inner.for.end:
3829 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
3830 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3831 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3832 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3833 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3834 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3835 // CHECK7: omp.inner.for.cond7:
3836 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
3837 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP7]]
3838 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3839 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3840 // CHECK7: omp.inner.for.body9:
3841 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]]
3842 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3843 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3844 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP7]]
3845 // CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP7]]
3846 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3847 // CHECK7: omp.body.continue12:
3848 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3849 // CHECK7: omp.inner.for.inc13:
3850 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]]
3851 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3852 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]]
3853 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]]
3854 // CHECK7: omp.inner.for.end15:
3855 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
3856 // CHECK7-NEXT: ret void
3857 //
3858 //
3859 // CHECK7-LABEL: define {{[^@]+}}@main
3860 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
3861 // CHECK7-NEXT: entry:
3862 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3863 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3864 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3865 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3866 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3867 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3868 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3869 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3870 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3871 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3872 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3873 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3874 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3875 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3876 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3877 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3878 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
3879 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
3880 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3881 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3882 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3883 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3884 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3885 // CHECK7: omp.inner.for.cond:
3886 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
3887 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
3888 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3889 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3890 // CHECK7: omp.inner.for.body:
3891 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3892 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3893 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3894 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
3895 // CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP10]]
3896 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3897 // CHECK7: omp.body.continue:
3898 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3899 // CHECK7: omp.inner.for.inc:
3900 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3901 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3902 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3903 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3904 // CHECK7: omp.inner.for.end:
3905 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
3906 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3907 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3908 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3909 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3910 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3911 // CHECK7: omp.inner.for.cond7:
3912 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3913 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
3914 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3915 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3916 // CHECK7: omp.inner.for.body9:
3917 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3918 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3919 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3920 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
3921 // CHECK7-NEXT: call void @_Z3fn5v()
3922 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3923 // CHECK7: omp.body.continue12:
3924 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3925 // CHECK7: omp.inner.for.inc13:
3926 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3927 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3928 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
3929 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
3930 // CHECK7: omp.inner.for.end15:
3931 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
3932 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
3933 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3934 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3935 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3936 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3937 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3938 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3939 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
3940 // CHECK7-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3941 // CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
3942 // CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3943 // CHECK7: omp_if.then:
3944 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
3945 // CHECK7: omp.inner.for.cond22:
3946 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3947 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
3948 // CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3949 // CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
3950 // CHECK7: omp.inner.for.body24:
3951 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3952 // CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
3953 // CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
3954 // CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
3955 // CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
3956 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
3957 // CHECK7: omp.body.continue27:
3958 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
3959 // CHECK7: omp.inner.for.inc28:
3960 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3961 // CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
3962 // CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3963 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP16:![0-9]+]]
3964 // CHECK7: omp.inner.for.end30:
3965 // CHECK7-NEXT: br label [[OMP_IF_END:%.*]]
3966 // CHECK7: omp_if.else:
3967 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
3968 // CHECK7: omp.inner.for.cond31:
3969 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3970 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
3971 // CHECK7-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
3972 // CHECK7-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
3973 // CHECK7: omp.inner.for.body33:
3974 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3975 // CHECK7-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
3976 // CHECK7-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
3977 // CHECK7-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
3978 // CHECK7-NEXT: call void @_Z3fn6v()
3979 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
3980 // CHECK7: omp.body.continue36:
3981 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
3982 // CHECK7: omp.inner.for.inc37:
3983 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3984 // CHECK7-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
3985 // CHECK7-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
3986 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP18:![0-9]+]]
3987 // CHECK7: omp.inner.for.end39:
3988 // CHECK7-NEXT: br label [[OMP_IF_END]]
3989 // CHECK7: omp_if.end:
3990 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
3991 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
3992 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
3993 // CHECK7-NEXT: ret i32 [[CALL]]
3994 //
3995 //
3996 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3997 // CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
3998 // CHECK7-NEXT: entry:
3999 // CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
4000 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4001 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4002 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4003 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4004 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4005 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4006 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
4007 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
4008 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
4009 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
4010 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4011 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
4012 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
4013 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
4014 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
4015 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
4016 // CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
4017 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4018 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4019 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4020 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4021 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4022 // CHECK7: omp.inner.for.cond:
4023 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
4024 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
4025 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4026 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4027 // CHECK7: omp.inner.for.body:
4028 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
4029 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4030 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4031 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP19]]
4032 // CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP19]]
4033 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4034 // CHECK7: omp.body.continue:
4035 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4036 // CHECK7: omp.inner.for.inc:
4037 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
4038 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
4039 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
4040 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
4041 // CHECK7: omp.inner.for.end:
4042 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
4043 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
4044 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
4045 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
4046 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
4047 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
4048 // CHECK7: omp.inner.for.cond7:
4049 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
4050 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
4051 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4052 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
4053 // CHECK7: omp.inner.for.body9:
4054 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
4055 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
4056 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4057 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
4058 // CHECK7-NEXT: call void @_Z3fn2v()
4059 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
4060 // CHECK7: omp.body.continue12:
4061 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
4062 // CHECK7: omp.inner.for.inc13:
4063 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
4064 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
4065 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
4066 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
4067 // CHECK7: omp.inner.for.end15:
4068 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
4069 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
4070 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
4071 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4072 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4073 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
4074 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
4075 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
4076 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
4077 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
4078 // CHECK7: omp.inner.for.cond21:
4079 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
4080 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP23]]
4081 // CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4082 // CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
4083 // CHECK7: omp.inner.for.body23:
4084 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]]
4085 // CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
4086 // CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
4087 // CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP23]]
4088 // CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP23]]
4089 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
4090 // CHECK7: omp.body.continue26:
4091 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
4092 // CHECK7: omp.inner.for.inc27:
4093 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]]
4094 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
4095 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]]
4096 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP24:![0-9]+]]
4097 // CHECK7: omp.inner.for.end29:
4098 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
4099 // CHECK7-NEXT: ret i32 0
4100 //
4101 //
4102 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
4103 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
4104 // CHECK9-NEXT: entry:
4105 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4106 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4107 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4108 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4109 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4110 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4111 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
4112 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4113 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
4114 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4115 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4116 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
4117 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
4118 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4119 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
4120 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
4121 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4122 // CHECK9-NEXT: store i8* null, i8** [[TMP6]], align 8
4123 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4124 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4125 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4126 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4127 // CHECK9-NEXT: store i32 1, i32* [[TMP9]], align 4
4128 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4129 // CHECK9-NEXT: store i32 1, i32* [[TMP10]], align 4
4130 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4131 // CHECK9-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
4132 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4133 // CHECK9-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
4134 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4135 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8
4136 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4137 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8
4138 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4139 // CHECK9-NEXT: store i8** null, i8*** [[TMP15]], align 8
4140 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4141 // CHECK9-NEXT: store i8** null, i8*** [[TMP16]], align 8
4142 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4143 // CHECK9-NEXT: store i64 100, i64* [[TMP17]], align 8
4144 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4145 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
4146 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4147 // CHECK9: omp_offload.failed:
4148 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
4149 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
4150 // CHECK9: omp_offload.cont:
4151 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4152 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4153 // CHECK9-NEXT: store i32 1, i32* [[TMP20]], align 4
4154 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4155 // CHECK9-NEXT: store i32 0, i32* [[TMP21]], align 4
4156 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4157 // CHECK9-NEXT: store i8** null, i8*** [[TMP22]], align 8
4158 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4159 // CHECK9-NEXT: store i8** null, i8*** [[TMP23]], align 8
4160 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4161 // CHECK9-NEXT: store i64* null, i64** [[TMP24]], align 8
4162 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4163 // CHECK9-NEXT: store i64* null, i64** [[TMP25]], align 8
4164 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4165 // CHECK9-NEXT: store i8** null, i8*** [[TMP26]], align 8
4166 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4167 // CHECK9-NEXT: store i8** null, i8*** [[TMP27]], align 8
4168 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4169 // CHECK9-NEXT: store i64 100, i64* [[TMP28]], align 8
4170 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4171 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
4172 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4173 // CHECK9: omp_offload.failed3:
4174 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
4175 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4176 // CHECK9: omp_offload.cont4:
4177 // CHECK9-NEXT: ret void
4178 //
4179 //
4180 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
4181 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
4182 // CHECK9-NEXT: entry:
4183 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4184 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4185 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4186 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4187 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
4188 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4189 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
4190 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4191 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
4192 // CHECK9-NEXT: ret void
4193 //
4194 //
4195 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
4196 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
4197 // CHECK9-NEXT: entry:
4198 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4199 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4200 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4201 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4202 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4203 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4204 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4205 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4206 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4207 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4208 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4209 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4210 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4211 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4212 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4213 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4214 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4215 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4216 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4217 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4218 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4219 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4220 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4221 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4222 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4223 // CHECK9: cond.true:
4224 // CHECK9-NEXT: br label [[COND_END:%.*]]
4225 // CHECK9: cond.false:
4226 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4227 // CHECK9-NEXT: br label [[COND_END]]
4228 // CHECK9: cond.end:
4229 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4230 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4231 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4232 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4233 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4234 // CHECK9: omp.inner.for.cond:
4235 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
4236 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
4237 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4238 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4239 // CHECK9: omp.inner.for.body:
4240 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
4241 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4242 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
4243 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4244 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP9]]
4245 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4246 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group [[ACC_GRP9]]
4247 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]]
4248 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]]
4249 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4250 // CHECK9: omp.inner.for.inc:
4251 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4252 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
4253 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
4254 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4255 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4256 // CHECK9: omp.inner.for.end:
4257 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4258 // CHECK9: omp.loop.exit:
4259 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4260 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4261 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
4262 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4263 // CHECK9: .omp.final.then:
4264 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4265 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4266 // CHECK9: .omp.final.done:
4267 // CHECK9-NEXT: ret void
4268 //
4269 //
4270 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
4271 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
4272 // CHECK9-NEXT: entry:
4273 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4274 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4275 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4276 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4277 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4278 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4279 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4280 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4281 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4282 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4283 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4284 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4285 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4286 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4287 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4288 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4289 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4290 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4291 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4292 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4293 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4294 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
4295 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4296 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
4297 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
4298 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
4299 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4300 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4301 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4302 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4303 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4304 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4305 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4306 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4307 // CHECK9: cond.true:
4308 // CHECK9-NEXT: br label [[COND_END:%.*]]
4309 // CHECK9: cond.false:
4310 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4311 // CHECK9-NEXT: br label [[COND_END]]
4312 // CHECK9: cond.end:
4313 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4314 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4315 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4316 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4317 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4318 // CHECK9: omp.inner.for.cond:
4319 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
4320 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
4321 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4322 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4323 // CHECK9: omp.inner.for.body:
4324 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
4325 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4326 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4327 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
4328 // CHECK9-NEXT: store i32 0, i32* [[CONV]], align 4, !llvm.access.group [[ACC_GRP13]]
4329 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4330 // CHECK9: omp.body.continue:
4331 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4332 // CHECK9: omp.inner.for.inc:
4333 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
4334 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
4335 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
4336 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
4337 // CHECK9: omp.inner.for.end:
4338 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4339 // CHECK9: omp.loop.exit:
4340 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4341 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4342 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4343 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4344 // CHECK9: .omp.final.then:
4345 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4346 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4347 // CHECK9: .omp.final.done:
4348 // CHECK9-NEXT: ret void
4349 //
4350 //
4351 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
4352 // CHECK9-SAME: () #[[ATTR1]] {
4353 // CHECK9-NEXT: entry:
4354 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
4355 // CHECK9-NEXT: ret void
4356 //
4357 //
4358 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
4359 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4360 // CHECK9-NEXT: entry:
4361 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4362 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4363 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4364 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4365 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4366 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4367 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4368 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4369 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4370 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4371 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4372 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4373 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4374 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4375 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4376 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4377 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4378 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4379 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4380 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4381 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4382 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4383 // CHECK9: cond.true:
4384 // CHECK9-NEXT: br label [[COND_END:%.*]]
4385 // CHECK9: cond.false:
4386 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4387 // CHECK9-NEXT: br label [[COND_END]]
4388 // CHECK9: cond.end:
4389 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4390 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4391 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4392 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4393 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4394 // CHECK9: omp.inner.for.cond:
4395 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
4396 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
4397 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4398 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4399 // CHECK9: omp.inner.for.body:
4400 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]
4401 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4402 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
4403 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4404 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]]
4405 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP18]]
4406 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP18]]
4407 // CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP18]]
4408 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP18]]
4409 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4410 // CHECK9: omp.inner.for.inc:
4411 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4412 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]
4413 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4414 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4415 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
4416 // CHECK9: omp.inner.for.end:
4417 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4418 // CHECK9: omp.loop.exit:
4419 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4420 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4421 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4422 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4423 // CHECK9: .omp.final.then:
4424 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4425 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4426 // CHECK9: .omp.final.done:
4427 // CHECK9-NEXT: ret void
4428 //
4429 //
4430 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
4431 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4432 // CHECK9-NEXT: entry:
4433 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4434 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4435 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4436 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4437 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4438 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4439 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4440 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4441 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4442 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4443 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4444 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4445 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4446 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4447 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4448 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4449 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4450 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4451 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4452 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4453 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4454 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4455 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4456 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4457 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4458 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4459 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4460 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4461 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4462 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4463 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4464 // CHECK9: cond.true:
4465 // CHECK9-NEXT: br label [[COND_END:%.*]]
4466 // CHECK9: cond.false:
4467 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4468 // CHECK9-NEXT: br label [[COND_END]]
4469 // CHECK9: cond.end:
4470 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4471 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4472 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4473 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4474 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4475 // CHECK9: omp.inner.for.cond:
4476 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
4477 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
4478 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4479 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4480 // CHECK9: omp.inner.for.body:
4481 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
4482 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4483 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4484 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
4485 // CHECK9-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP21]]
4486 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4487 // CHECK9: omp.body.continue:
4488 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4489 // CHECK9: omp.inner.for.inc:
4490 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
4491 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4492 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
4493 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
4494 // CHECK9: omp.inner.for.end:
4495 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4496 // CHECK9: omp.loop.exit:
4497 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4498 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4499 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4500 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4501 // CHECK9: .omp.final.then:
4502 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4503 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4504 // CHECK9: .omp.final.done:
4505 // CHECK9-NEXT: ret void
4506 //
4507 //
4508 // CHECK9-LABEL: define {{[^@]+}}@main
4509 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
4510 // CHECK9-NEXT: entry:
4511 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4512 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4513 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4514 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4515 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4516 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4517 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4518 // CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
4519 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
4520 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4521 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4522 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
4523 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4524 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
4525 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4526 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
4527 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4528 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
4529 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4530 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
4531 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4532 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
4533 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4534 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
4535 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4536 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
4537 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4538 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
4539 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4540 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4541 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4542 // CHECK9: omp_offload.failed:
4543 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
4544 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
4545 // CHECK9: omp_offload.cont:
4546 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
4547 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* @Arg, align 4
4548 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
4549 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4550 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4551 // CHECK9-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4552 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
4553 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4554 // CHECK9-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
4555 // CHECK9-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
4556 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4557 // CHECK9-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4558 // CHECK9-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP14]] to i1
4559 // CHECK9-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4560 // CHECK9: omp_if.then:
4561 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4562 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
4563 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[TMP16]], align 8
4564 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4565 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
4566 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[TMP18]], align 8
4567 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4568 // CHECK9-NEXT: store i8* null, i8** [[TMP19]], align 8
4569 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4570 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4571 // CHECK9-NEXT: [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4572 // CHECK9-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
4573 // CHECK9-NEXT: [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
4574 // CHECK9-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4575 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
4576 // CHECK9-NEXT: store i32 1, i32* [[TMP24]], align 4
4577 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
4578 // CHECK9-NEXT: store i32 1, i32* [[TMP25]], align 4
4579 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
4580 // CHECK9-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
4581 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
4582 // CHECK9-NEXT: store i8** [[TMP21]], i8*** [[TMP27]], align 8
4583 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
4584 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.10, i32 0, i32 0), i64** [[TMP28]], align 8
4585 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
4586 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.11, i32 0, i32 0), i64** [[TMP29]], align 8
4587 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
4588 // CHECK9-NEXT: store i8** null, i8*** [[TMP30]], align 8
4589 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
4590 // CHECK9-NEXT: store i8** null, i8*** [[TMP31]], align 8
4591 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
4592 // CHECK9-NEXT: store i64 100, i64* [[TMP32]], align 8
4593 // CHECK9-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP23]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
4594 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
4595 // CHECK9-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4596 // CHECK9: omp_offload.failed7:
4597 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
4598 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT8]]
4599 // CHECK9: omp_offload.cont8:
4600 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
4601 // CHECK9: omp_if.else:
4602 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
4603 // CHECK9-NEXT: br label [[OMP_IF_END]]
4604 // CHECK9: omp_if.end:
4605 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* @Arg, align 4
4606 // CHECK9-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP35]])
4607 // CHECK9-NEXT: ret i32 [[CALL]]
4608 //
4609 //
4610 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
4611 // CHECK9-SAME: () #[[ATTR1]] {
4612 // CHECK9-NEXT: entry:
4613 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4614 // CHECK9-NEXT: ret void
4615 //
4616 //
4617 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
4618 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4619 // CHECK9-NEXT: entry:
4620 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4621 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4622 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4623 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4624 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4625 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4626 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4627 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4628 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4629 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4630 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4631 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4632 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4633 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4634 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4635 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4636 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4637 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4638 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4639 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4640 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4641 // CHECK9: cond.true:
4642 // CHECK9-NEXT: br label [[COND_END:%.*]]
4643 // CHECK9: cond.false:
4644 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4645 // CHECK9-NEXT: br label [[COND_END]]
4646 // CHECK9: cond.end:
4647 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4648 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4649 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4650 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4651 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4652 // CHECK9: omp.inner.for.cond:
4653 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
4654 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
4655 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4656 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4657 // CHECK9: omp.inner.for.body:
4658 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]]
4659 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4660 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
4661 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4662 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]]
4663 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4664 // CHECK9: omp.inner.for.inc:
4665 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
4666 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]]
4667 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4668 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
4669 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
4670 // CHECK9: omp.inner.for.end:
4671 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4672 // CHECK9: omp.loop.exit:
4673 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4674 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4675 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4676 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4677 // CHECK9: .omp.final.then:
4678 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4679 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4680 // CHECK9: .omp.final.done:
4681 // CHECK9-NEXT: ret void
4682 //
4683 //
4684 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
4685 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4686 // CHECK9-NEXT: entry:
4687 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4688 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4689 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4690 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4691 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4692 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4693 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4694 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4695 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4696 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4697 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4698 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4699 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4700 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4701 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4702 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4703 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4704 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4705 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4706 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4707 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4708 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4709 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4710 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4711 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4712 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4713 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4714 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4715 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4716 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4717 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4718 // CHECK9: cond.true:
4719 // CHECK9-NEXT: br label [[COND_END:%.*]]
4720 // CHECK9: cond.false:
4721 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4722 // CHECK9-NEXT: br label [[COND_END]]
4723 // CHECK9: cond.end:
4724 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4725 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4726 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4727 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4728 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4729 // CHECK9: omp.inner.for.cond:
4730 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]
4731 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]
4732 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4733 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4734 // CHECK9: omp.inner.for.body:
4735 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
4736 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4737 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4738 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
4739 // CHECK9-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP27]]
4740 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4741 // CHECK9: omp.body.continue:
4742 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4743 // CHECK9: omp.inner.for.inc:
4744 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
4745 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4746 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
4747 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
4748 // CHECK9: omp.inner.for.end:
4749 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4750 // CHECK9: omp.loop.exit:
4751 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4752 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4753 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4754 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4755 // CHECK9: .omp.final.then:
4756 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4757 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4758 // CHECK9: .omp.final.done:
4759 // CHECK9-NEXT: ret void
4760 //
4761 //
4762 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
4763 // CHECK9-SAME: () #[[ATTR1]] {
4764 // CHECK9-NEXT: entry:
4765 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
4766 // CHECK9-NEXT: ret void
4767 //
4768 //
4769 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
4770 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4771 // CHECK9-NEXT: entry:
4772 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4773 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4774 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4775 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4776 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4777 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4778 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4779 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4780 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4781 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4782 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4783 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4784 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4785 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4786 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4787 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4788 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4789 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4790 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4791 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4792 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4793 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4794 // CHECK9: cond.true:
4795 // CHECK9-NEXT: br label [[COND_END:%.*]]
4796 // CHECK9: cond.false:
4797 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4798 // CHECK9-NEXT: br label [[COND_END]]
4799 // CHECK9: cond.end:
4800 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4801 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4802 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4803 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4804 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4805 // CHECK9: omp.inner.for.cond:
4806 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]]
4807 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
4808 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4809 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4810 // CHECK9: omp.inner.for.body:
4811 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]]
4812 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4813 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
4814 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4815 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]]
4816 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP30]]
4817 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP30]]
4818 // CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP30]]
4819 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP30]]
4820 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4821 // CHECK9: omp.inner.for.inc:
4822 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
4823 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]]
4824 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4825 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
4826 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
4827 // CHECK9: omp.inner.for.end:
4828 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4829 // CHECK9: omp.loop.exit:
4830 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4831 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4832 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4833 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4834 // CHECK9: .omp.final.then:
4835 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4836 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4837 // CHECK9: .omp.final.done:
4838 // CHECK9-NEXT: ret void
4839 //
4840 //
4841 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
4842 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4843 // CHECK9-NEXT: entry:
4844 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4845 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4846 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4847 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4848 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4849 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4850 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4851 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4852 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4853 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4854 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4855 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4856 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4857 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4858 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4859 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4860 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4861 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4862 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4863 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4864 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4865 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4866 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4867 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4868 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4869 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4870 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4871 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4872 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4873 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4874 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4875 // CHECK9: cond.true:
4876 // CHECK9-NEXT: br label [[COND_END:%.*]]
4877 // CHECK9: cond.false:
4878 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4879 // CHECK9-NEXT: br label [[COND_END]]
4880 // CHECK9: cond.end:
4881 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4882 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4883 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4884 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4885 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4886 // CHECK9: omp.inner.for.cond:
4887 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]]
4888 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]]
4889 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4890 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4891 // CHECK9: omp.inner.for.body:
4892 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
4893 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4894 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4895 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP33]]
4896 // CHECK9-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP33]]
4897 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4898 // CHECK9: omp.body.continue:
4899 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4900 // CHECK9: omp.inner.for.inc:
4901 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
4902 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4903 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
4904 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
4905 // CHECK9: omp.inner.for.end:
4906 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4907 // CHECK9: omp.loop.exit:
4908 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4909 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4910 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4911 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4912 // CHECK9: .omp.final.then:
4913 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4914 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4915 // CHECK9: .omp.final.done:
4916 // CHECK9-NEXT: ret void
4917 //
4918 //
4919 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
4920 // CHECK9-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4921 // CHECK9-NEXT: entry:
4922 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4923 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4924 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4925 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4926 // CHECK9-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
4927 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
4928 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4929 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4930 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
4931 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4932 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
4933 // CHECK9-NEXT: ret void
4934 //
4935 //
4936 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
4937 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4938 // CHECK9-NEXT: entry:
4939 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4940 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4941 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4942 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4943 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4944 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4945 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4946 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4947 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4948 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4949 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4950 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4951 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4952 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4953 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4954 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4955 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4956 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4957 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4958 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4959 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4960 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4961 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4962 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4963 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4964 // CHECK9: cond.true:
4965 // CHECK9-NEXT: br label [[COND_END:%.*]]
4966 // CHECK9: cond.false:
4967 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4968 // CHECK9-NEXT: br label [[COND_END]]
4969 // CHECK9: cond.end:
4970 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4971 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4972 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4973 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4974 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4975 // CHECK9: omp.inner.for.cond:
4976 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]]
4977 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
4978 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4979 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4980 // CHECK9: omp.inner.for.body:
4981 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]]
4982 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4983 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
4984 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4985 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP36]]
4986 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
4987 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4988 // CHECK9: omp_if.then:
4989 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]]
4990 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
4991 // CHECK9: omp_if.else:
4992 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]]
4993 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP36]]
4994 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP36]]
4995 // CHECK9-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP36]]
4996 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP36]]
4997 // CHECK9-NEXT: br label [[OMP_IF_END]]
4998 // CHECK9: omp_if.end:
4999 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5000 // CHECK9: omp.inner.for.inc:
5001 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
5002 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]]
5003 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5004 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
5005 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
5006 // CHECK9: omp.inner.for.end:
5007 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5008 // CHECK9: omp.loop.exit:
5009 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5010 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5011 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5012 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5013 // CHECK9: .omp.final.then:
5014 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5015 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5016 // CHECK9: .omp.final.done:
5017 // CHECK9-NEXT: ret void
5018 //
5019 //
5020 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
5021 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5022 // CHECK9-NEXT: entry:
5023 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5024 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5025 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5026 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5027 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5028 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5029 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5030 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5031 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5032 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5033 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5034 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5035 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5036 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5037 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5038 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5039 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5040 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5041 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5042 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5043 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5044 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5045 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5046 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5047 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5048 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5049 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5050 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5051 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5052 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5053 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5054 // CHECK9: cond.true:
5055 // CHECK9-NEXT: br label [[COND_END:%.*]]
5056 // CHECK9: cond.false:
5057 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5058 // CHECK9-NEXT: br label [[COND_END]]
5059 // CHECK9: cond.end:
5060 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5061 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5062 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5063 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5064 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5065 // CHECK9: omp.inner.for.cond:
5066 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
5067 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
5068 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5069 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5070 // CHECK9: omp.inner.for.body:
5071 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
5072 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5073 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5074 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
5075 // CHECK9-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
5076 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5077 // CHECK9: omp.body.continue:
5078 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5079 // CHECK9: omp.inner.for.inc:
5080 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
5081 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5082 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
5083 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
5084 // CHECK9: omp.inner.for.end:
5085 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5086 // CHECK9: omp.loop.exit:
5087 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5088 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5089 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5090 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5091 // CHECK9: .omp.final.then:
5092 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5093 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5094 // CHECK9: .omp.final.done:
5095 // CHECK9-NEXT: ret void
5096 //
5097 //
5098 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5099 // CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
5100 // CHECK9-NEXT: entry:
5101 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
5102 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5103 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5104 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5105 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5106 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5107 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5108 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
5109 // CHECK9-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
5110 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5111 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5112 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
5113 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5114 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
5115 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5116 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
5117 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5118 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
5119 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5120 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
5121 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5122 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
5123 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5124 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
5125 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5126 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
5127 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5128 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
5129 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5130 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5131 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5132 // CHECK9: omp_offload.failed:
5133 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
5134 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
5135 // CHECK9: omp_offload.cont:
5136 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
5137 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5138 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
5139 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5140 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5141 // CHECK9-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5142 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
5143 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5144 // CHECK9-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
5145 // CHECK9-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
5146 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5147 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5148 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
5149 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[TMP15]], align 8
5150 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5151 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
5152 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[TMP17]], align 8
5153 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5154 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8
5155 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5156 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5157 // CHECK9-NEXT: [[TMP21:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5158 // CHECK9-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP21]] to i1
5159 // CHECK9-NEXT: [[TMP22:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
5160 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5161 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
5162 // CHECK9-NEXT: store i32 1, i32* [[TMP23]], align 4
5163 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
5164 // CHECK9-NEXT: store i32 1, i32* [[TMP24]], align 4
5165 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
5166 // CHECK9-NEXT: store i8** [[TMP19]], i8*** [[TMP25]], align 8
5167 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
5168 // CHECK9-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
5169 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
5170 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.18, i32 0, i32 0), i64** [[TMP27]], align 8
5171 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
5172 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.19, i32 0, i32 0), i64** [[TMP28]], align 8
5173 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
5174 // CHECK9-NEXT: store i8** null, i8*** [[TMP29]], align 8
5175 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
5176 // CHECK9-NEXT: store i8** null, i8*** [[TMP30]], align 8
5177 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
5178 // CHECK9-NEXT: store i64 100, i64* [[TMP31]], align 8
5179 // CHECK9-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP22]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
5180 // CHECK9-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
5181 // CHECK9-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5182 // CHECK9: omp_offload.failed6:
5183 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP13]]) #[[ATTR2]]
5184 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]
5185 // CHECK9: omp_offload.cont7:
5186 // CHECK9-NEXT: ret i32 0
5187 //
5188 //
5189 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
5190 // CHECK9-SAME: () #[[ATTR1]] {
5191 // CHECK9-NEXT: entry:
5192 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
5193 // CHECK9-NEXT: ret void
5194 //
5195 //
5196 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12
5197 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5198 // CHECK9-NEXT: entry:
5199 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5200 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5201 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5202 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5203 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5204 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5205 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5206 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5207 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5208 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5209 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5210 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5211 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5212 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5213 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5214 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5215 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5216 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5217 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5218 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5219 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5220 // CHECK9: cond.true:
5221 // CHECK9-NEXT: br label [[COND_END:%.*]]
5222 // CHECK9: cond.false:
5223 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5224 // CHECK9-NEXT: br label [[COND_END]]
5225 // CHECK9: cond.end:
5226 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5227 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5228 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5229 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5230 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5231 // CHECK9: omp.inner.for.cond:
5232 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
5233 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
5234 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5235 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5236 // CHECK9: omp.inner.for.body:
5237 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]]
5238 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5239 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
5240 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5241 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP42]]
5242 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5243 // CHECK9: omp.inner.for.inc:
5244 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
5245 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]]
5246 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5247 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
5248 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
5249 // CHECK9: omp.inner.for.end:
5250 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5251 // CHECK9: omp.loop.exit:
5252 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5253 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5254 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5255 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5256 // CHECK9: .omp.final.then:
5257 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5258 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5259 // CHECK9: .omp.final.done:
5260 // CHECK9-NEXT: ret void
5261 //
5262 //
5263 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
5264 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5265 // CHECK9-NEXT: entry:
5266 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5267 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5268 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5269 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5270 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5271 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5272 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5273 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5274 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5275 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5276 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5277 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5278 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5279 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5280 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5281 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5282 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5283 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5284 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5285 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5286 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5287 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5288 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5289 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5290 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5291 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5292 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5293 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5294 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5295 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5296 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5297 // CHECK9: cond.true:
5298 // CHECK9-NEXT: br label [[COND_END:%.*]]
5299 // CHECK9: cond.false:
5300 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5301 // CHECK9-NEXT: br label [[COND_END]]
5302 // CHECK9: cond.end:
5303 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5304 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5305 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5306 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5307 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5308 // CHECK9: omp.inner.for.cond:
5309 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]]
5310 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
5311 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5312 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5313 // CHECK9: omp.inner.for.body:
5314 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
5315 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5316 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5317 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP45]]
5318 // CHECK9-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP45]]
5319 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5320 // CHECK9: omp.body.continue:
5321 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5322 // CHECK9: omp.inner.for.inc:
5323 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
5324 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5325 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
5326 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
5327 // CHECK9: omp.inner.for.end:
5328 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5329 // CHECK9: omp.loop.exit:
5330 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5331 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5332 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5333 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5334 // CHECK9: .omp.final.then:
5335 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5336 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5337 // CHECK9: .omp.final.done:
5338 // CHECK9-NEXT: ret void
5339 //
5340 //
5341 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
5342 // CHECK9-SAME: () #[[ATTR1]] {
5343 // CHECK9-NEXT: entry:
5344 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*))
5345 // CHECK9-NEXT: ret void
5346 //
5347 //
5348 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14
5349 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5350 // CHECK9-NEXT: entry:
5351 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5352 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5353 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5354 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5355 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5356 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5357 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5358 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5359 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5360 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5361 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5362 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5363 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5364 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5365 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5366 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5367 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5368 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5369 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5370 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5371 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5372 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5373 // CHECK9: cond.true:
5374 // CHECK9-NEXT: br label [[COND_END:%.*]]
5375 // CHECK9: cond.false:
5376 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5377 // CHECK9-NEXT: br label [[COND_END]]
5378 // CHECK9: cond.end:
5379 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5380 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5381 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5382 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5383 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5384 // CHECK9: omp.inner.for.cond:
5385 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48:![0-9]+]]
5386 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]]
5387 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5388 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5389 // CHECK9: omp.inner.for.body:
5390 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP48]]
5391 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5392 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP48]]
5393 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5394 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]]
5395 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP48]]
5396 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP48]]
5397 // CHECK9-NEXT: call void @.omp_outlined..15(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP48]]
5398 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP48]]
5399 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5400 // CHECK9: omp.inner.for.inc:
5401 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]]
5402 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP48]]
5403 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5404 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP48]]
5405 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP49:![0-9]+]]
5406 // CHECK9: omp.inner.for.end:
5407 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5408 // CHECK9: omp.loop.exit:
5409 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5410 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5411 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5412 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5413 // CHECK9: .omp.final.then:
5414 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5415 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5416 // CHECK9: .omp.final.done:
5417 // CHECK9-NEXT: ret void
5418 //
5419 //
5420 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15
5421 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5422 // CHECK9-NEXT: entry:
5423 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5424 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5425 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5426 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5427 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5428 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5429 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5430 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5431 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5432 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5433 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5434 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5435 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5436 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5437 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5438 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5439 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5440 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5441 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5442 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5443 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5444 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5445 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5446 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5447 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5448 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5449 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5450 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5451 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5452 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5453 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5454 // CHECK9: cond.true:
5455 // CHECK9-NEXT: br label [[COND_END:%.*]]
5456 // CHECK9: cond.false:
5457 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5458 // CHECK9-NEXT: br label [[COND_END]]
5459 // CHECK9: cond.end:
5460 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5461 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5462 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5463 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5464 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5465 // CHECK9: omp.inner.for.cond:
5466 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51:![0-9]+]]
5467 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP51]]
5468 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5469 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5470 // CHECK9: omp.inner.for.body:
5471 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]]
5472 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5473 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5474 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP51]]
5475 // CHECK9-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP51]]
5476 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5477 // CHECK9: omp.body.continue:
5478 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5479 // CHECK9: omp.inner.for.inc:
5480 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]]
5481 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5482 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP51]]
5483 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
5484 // CHECK9: omp.inner.for.end:
5485 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5486 // CHECK9: omp.loop.exit:
5487 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5488 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5489 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5490 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5491 // CHECK9: .omp.final.then:
5492 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5493 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5494 // CHECK9: .omp.final.done:
5495 // CHECK9-NEXT: ret void
5496 //
5497 //
5498 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
5499 // CHECK9-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5500 // CHECK9-NEXT: entry:
5501 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5502 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5503 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5504 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5505 // CHECK9-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
5506 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
5507 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5508 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5509 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
5510 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5511 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP1]])
5512 // CHECK9-NEXT: ret void
5513 //
5514 //
5515 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..16
5516 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5517 // CHECK9-NEXT: entry:
5518 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5519 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5520 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5521 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5522 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5523 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5524 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5525 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5526 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5527 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5528 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5529 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5530 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5531 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5532 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5533 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5534 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5535 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5536 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5537 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5538 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5539 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5540 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5541 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5542 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5543 // CHECK9: cond.true:
5544 // CHECK9-NEXT: br label [[COND_END:%.*]]
5545 // CHECK9: cond.false:
5546 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5547 // CHECK9-NEXT: br label [[COND_END]]
5548 // CHECK9: cond.end:
5549 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5550 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5551 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5552 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5553 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5554 // CHECK9: omp.inner.for.cond:
5555 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]]
5556 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
5557 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5558 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5559 // CHECK9: omp.inner.for.body:
5560 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]]
5561 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5562 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
5563 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5564 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP54]]
5565 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
5566 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5567 // CHECK9: omp_if.then:
5568 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]]
5569 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
5570 // CHECK9: omp_if.else:
5571 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
5572 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]]
5573 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]]
5574 // CHECK9-NEXT: call void @.omp_outlined..17(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]]
5575 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
5576 // CHECK9-NEXT: br label [[OMP_IF_END]]
5577 // CHECK9: omp_if.end:
5578 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5579 // CHECK9: omp.inner.for.inc:
5580 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
5581 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]]
5582 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5583 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
5584 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
5585 // CHECK9: omp.inner.for.end:
5586 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5587 // CHECK9: omp.loop.exit:
5588 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5589 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5590 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5591 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5592 // CHECK9: .omp.final.then:
5593 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5594 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5595 // CHECK9: .omp.final.done:
5596 // CHECK9-NEXT: ret void
5597 //
5598 //
5599 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..17
5600 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5601 // CHECK9-NEXT: entry:
5602 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5603 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5604 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5605 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5606 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5607 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5608 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5609 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5610 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5611 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5612 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5613 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5614 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5615 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5616 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5617 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5618 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5619 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5620 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5621 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5622 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5623 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5624 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5625 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5626 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5627 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5628 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5629 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5630 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5631 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5632 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5633 // CHECK9: cond.true:
5634 // CHECK9-NEXT: br label [[COND_END:%.*]]
5635 // CHECK9: cond.false:
5636 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5637 // CHECK9-NEXT: br label [[COND_END]]
5638 // CHECK9: cond.end:
5639 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5640 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5641 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5642 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5643 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5644 // CHECK9: omp.inner.for.cond:
5645 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]]
5646 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]]
5647 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5648 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5649 // CHECK9: omp.inner.for.body:
5650 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
5651 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5652 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5653 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP57]]
5654 // CHECK9-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]]
5655 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5656 // CHECK9: omp.body.continue:
5657 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5658 // CHECK9: omp.inner.for.inc:
5659 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
5660 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5661 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
5662 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
5663 // CHECK9: omp.inner.for.end:
5664 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5665 // CHECK9: omp.loop.exit:
5666 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5667 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5668 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5669 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5670 // CHECK9: .omp.final.then:
5671 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5672 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5673 // CHECK9: .omp.final.done:
5674 // CHECK9-NEXT: ret void
5675 //
5676 //
5677 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5678 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
5679 // CHECK9-NEXT: entry:
5680 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
5681 // CHECK9-NEXT: ret void
5682 //
5683 //
5684 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv
5685 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
5686 // CHECK11-NEXT: entry:
5687 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
5688 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5689 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5690 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5691 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5692 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5693 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* @Arg, align 4
5694 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
5695 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
5696 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
5697 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5698 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
5699 // CHECK11-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
5700 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5701 // CHECK11-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
5702 // CHECK11-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
5703 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5704 // CHECK11-NEXT: store i8* null, i8** [[TMP6]], align 8
5705 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5706 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5707 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5708 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5709 // CHECK11-NEXT: store i32 1, i32* [[TMP9]], align 4
5710 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5711 // CHECK11-NEXT: store i32 1, i32* [[TMP10]], align 4
5712 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5713 // CHECK11-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
5714 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5715 // CHECK11-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
5716 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5717 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8
5718 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5719 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8
5720 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5721 // CHECK11-NEXT: store i8** null, i8*** [[TMP15]], align 8
5722 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5723 // CHECK11-NEXT: store i8** null, i8*** [[TMP16]], align 8
5724 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5725 // CHECK11-NEXT: store i64 100, i64* [[TMP17]], align 8
5726 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5727 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
5728 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5729 // CHECK11: omp_offload.failed:
5730 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
5731 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
5732 // CHECK11: omp_offload.cont:
5733 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5734 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
5735 // CHECK11-NEXT: store i32 1, i32* [[TMP20]], align 4
5736 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
5737 // CHECK11-NEXT: store i32 0, i32* [[TMP21]], align 4
5738 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
5739 // CHECK11-NEXT: store i8** null, i8*** [[TMP22]], align 8
5740 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
5741 // CHECK11-NEXT: store i8** null, i8*** [[TMP23]], align 8
5742 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
5743 // CHECK11-NEXT: store i64* null, i64** [[TMP24]], align 8
5744 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
5745 // CHECK11-NEXT: store i64* null, i64** [[TMP25]], align 8
5746 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
5747 // CHECK11-NEXT: store i8** null, i8*** [[TMP26]], align 8
5748 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
5749 // CHECK11-NEXT: store i8** null, i8*** [[TMP27]], align 8
5750 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
5751 // CHECK11-NEXT: store i64 100, i64* [[TMP28]], align 8
5752 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
5753 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
5754 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5755 // CHECK11: omp_offload.failed3:
5756 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53() #[[ATTR2]]
5757 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]
5758 // CHECK11: omp_offload.cont4:
5759 // CHECK11-NEXT: ret void
5760 //
5761 //
5762 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l45
5763 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
5764 // CHECK11-NEXT: entry:
5765 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
5766 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
5767 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5768 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5769 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
5770 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
5771 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
5772 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
5773 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]])
5774 // CHECK11-NEXT: ret void
5775 //
5776 //
5777 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
5778 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
5779 // CHECK11-NEXT: entry:
5780 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5781 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5782 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
5783 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5784 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5785 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5786 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5787 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5788 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5789 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5790 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
5791 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5792 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5793 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5794 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5795 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5796 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5797 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5798 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5799 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5800 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5801 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5802 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5803 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5804 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5805 // CHECK11: cond.true:
5806 // CHECK11-NEXT: br label [[COND_END:%.*]]
5807 // CHECK11: cond.false:
5808 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5809 // CHECK11-NEXT: br label [[COND_END]]
5810 // CHECK11: cond.end:
5811 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5812 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5813 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5814 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5815 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5816 // CHECK11: omp.inner.for.cond:
5817 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
5818 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
5819 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5820 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5821 // CHECK11: omp.inner.for.body:
5822 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
5823 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5824 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
5825 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5826 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 4, !nontemporal !10, !llvm.access.group [[ACC_GRP9]]
5827 // CHECK11-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
5828 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[CONV2]], align 4, !llvm.access.group [[ACC_GRP9]]
5829 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, i64* [[ARG_CASTED]], align 8, !llvm.access.group [[ACC_GRP9]]
5830 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]], i64 [[TMP12]]), !llvm.access.group [[ACC_GRP9]]
5831 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5832 // CHECK11: omp.inner.for.inc:
5833 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
5834 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
5835 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5836 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
5837 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
5838 // CHECK11: omp.inner.for.end:
5839 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5840 // CHECK11: omp.loop.exit:
5841 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5842 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5843 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5844 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5845 // CHECK11: .omp.final.then:
5846 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5847 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5848 // CHECK11: .omp.final.done:
5849 // CHECK11-NEXT: ret void
5850 //
5851 //
5852 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
5853 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
5854 // CHECK11-NEXT: entry:
5855 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5856 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5857 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5858 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5859 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
5860 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5861 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5862 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5863 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5864 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5865 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5866 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5867 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5868 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5869 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5870 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5871 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5872 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5873 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5874 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5875 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5876 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
5877 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5878 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
5879 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
5880 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
5881 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5882 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5883 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5884 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5885 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5886 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5887 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5888 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5889 // CHECK11: cond.true:
5890 // CHECK11-NEXT: br label [[COND_END:%.*]]
5891 // CHECK11: cond.false:
5892 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5893 // CHECK11-NEXT: br label [[COND_END]]
5894 // CHECK11: cond.end:
5895 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5896 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5897 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5898 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5899 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5900 // CHECK11: omp.inner.for.cond:
5901 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
5902 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
5903 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5904 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5905 // CHECK11: omp.inner.for.body:
5906 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
5907 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5908 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5909 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
5910 // CHECK11-NEXT: store i32 0, i32* [[CONV]], align 4, !nontemporal !10, !llvm.access.group [[ACC_GRP14]]
5911 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5912 // CHECK11: omp.body.continue:
5913 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5914 // CHECK11: omp.inner.for.inc:
5915 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
5916 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP10]], 1
5917 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
5918 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
5919 // CHECK11: omp.inner.for.end:
5920 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5921 // CHECK11: omp.loop.exit:
5922 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5923 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5924 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5925 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5926 // CHECK11: .omp.final.then:
5927 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5928 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5929 // CHECK11: .omp.final.done:
5930 // CHECK11-NEXT: ret void
5931 //
5932 //
5933 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l53
5934 // CHECK11-SAME: () #[[ATTR1]] {
5935 // CHECK11-NEXT: entry:
5936 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
5937 // CHECK11-NEXT: ret void
5938 //
5939 //
5940 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
5941 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5942 // CHECK11-NEXT: entry:
5943 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5944 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5945 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5946 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5947 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5948 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5949 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5950 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5951 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5952 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5953 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5954 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5955 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5956 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5957 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5958 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5959 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5960 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5961 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5962 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5963 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5964 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5965 // CHECK11: cond.true:
5966 // CHECK11-NEXT: br label [[COND_END:%.*]]
5967 // CHECK11: cond.false:
5968 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5969 // CHECK11-NEXT: br label [[COND_END]]
5970 // CHECK11: cond.end:
5971 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5972 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5973 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5974 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5975 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5976 // CHECK11: omp.inner.for.cond:
5977 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
5978 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
5979 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5980 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5981 // CHECK11: omp.inner.for.body:
5982 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]]
5983 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5984 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
5985 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5986 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]]
5987 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP19]]
5988 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP19]]
5989 // CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP19]]
5990 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP19]]
5991 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5992 // CHECK11: omp.inner.for.inc:
5993 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
5994 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]]
5995 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5996 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
5997 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
5998 // CHECK11: omp.inner.for.end:
5999 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6000 // CHECK11: omp.loop.exit:
6001 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6002 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6003 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6004 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6005 // CHECK11: .omp.final.then:
6006 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6007 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6008 // CHECK11: .omp.final.done:
6009 // CHECK11-NEXT: ret void
6010 //
6011 //
6012 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
6013 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6014 // CHECK11-NEXT: entry:
6015 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6016 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6017 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6018 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6019 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6020 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6021 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6022 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6023 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6024 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6025 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6026 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6027 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6028 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6029 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6030 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6031 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6032 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6033 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6034 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6035 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6036 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6037 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6038 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6039 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6040 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6041 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6042 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6043 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6044 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6045 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6046 // CHECK11: cond.true:
6047 // CHECK11-NEXT: br label [[COND_END:%.*]]
6048 // CHECK11: cond.false:
6049 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6050 // CHECK11-NEXT: br label [[COND_END]]
6051 // CHECK11: cond.end:
6052 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6053 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6054 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6055 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6056 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6057 // CHECK11: omp.inner.for.cond:
6058 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
6059 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
6060 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6061 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6062 // CHECK11: omp.inner.for.body:
6063 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
6064 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6065 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6066 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
6067 // CHECK11-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP22]]
6068 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6069 // CHECK11: omp.body.continue:
6070 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6071 // CHECK11: omp.inner.for.inc:
6072 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
6073 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6074 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
6075 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
6076 // CHECK11: omp.inner.for.end:
6077 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6078 // CHECK11: omp.loop.exit:
6079 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6080 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6081 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6082 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6083 // CHECK11: .omp.final.then:
6084 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6085 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6086 // CHECK11: .omp.final.done:
6087 // CHECK11-NEXT: ret void
6088 //
6089 //
6090 // CHECK11-LABEL: define {{[^@]+}}@main
6091 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
6092 // CHECK11-NEXT: entry:
6093 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6094 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6095 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6096 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6097 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6098 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6099 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6100 // CHECK11-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
6101 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
6102 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6103 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6104 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
6105 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6106 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
6107 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6108 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
6109 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6110 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
6111 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6112 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
6113 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6114 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
6115 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6116 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
6117 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6118 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
6119 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6120 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
6121 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6122 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
6123 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6124 // CHECK11: omp_offload.failed:
6125 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78() #[[ATTR2]]
6126 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
6127 // CHECK11: omp_offload.cont:
6128 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85() #[[ATTR2]]
6129 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* @Arg, align 4
6130 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
6131 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6132 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6133 // CHECK11-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6134 // CHECK11-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
6135 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6136 // CHECK11-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
6137 // CHECK11-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
6138 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6139 // CHECK11-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6140 // CHECK11-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP14]] to i1
6141 // CHECK11-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6142 // CHECK11: omp_if.then:
6143 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6144 // CHECK11-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
6145 // CHECK11-NEXT: store i64 [[TMP13]], i64* [[TMP16]], align 8
6146 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6147 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
6148 // CHECK11-NEXT: store i64 [[TMP13]], i64* [[TMP18]], align 8
6149 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6150 // CHECK11-NEXT: store i8* null, i8** [[TMP19]], align 8
6151 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6152 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6153 // CHECK11-NEXT: [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6154 // CHECK11-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
6155 // CHECK11-NEXT: [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
6156 // CHECK11-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6157 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
6158 // CHECK11-NEXT: store i32 1, i32* [[TMP24]], align 4
6159 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
6160 // CHECK11-NEXT: store i32 1, i32* [[TMP25]], align 4
6161 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
6162 // CHECK11-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
6163 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
6164 // CHECK11-NEXT: store i8** [[TMP21]], i8*** [[TMP27]], align 8
6165 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
6166 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP28]], align 8
6167 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
6168 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP29]], align 8
6169 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
6170 // CHECK11-NEXT: store i8** null, i8*** [[TMP30]], align 8
6171 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
6172 // CHECK11-NEXT: store i8** null, i8*** [[TMP31]], align 8
6173 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
6174 // CHECK11-NEXT: store i64 100, i64* [[TMP32]], align 8
6175 // CHECK11-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP23]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
6176 // CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
6177 // CHECK11-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6178 // CHECK11: omp_offload.failed7:
6179 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
6180 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT8]]
6181 // CHECK11: omp_offload.cont8:
6182 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6183 // CHECK11: omp_if.else:
6184 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP13]]) #[[ATTR2]]
6185 // CHECK11-NEXT: br label [[OMP_IF_END]]
6186 // CHECK11: omp_if.end:
6187 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* @Arg, align 4
6188 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP35]])
6189 // CHECK11-NEXT: ret i32 [[CALL]]
6190 //
6191 //
6192 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l78
6193 // CHECK11-SAME: () #[[ATTR1]] {
6194 // CHECK11-NEXT: entry:
6195 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
6196 // CHECK11-NEXT: ret void
6197 //
6198 //
6199 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
6200 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6201 // CHECK11-NEXT: entry:
6202 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6203 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6204 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6205 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6206 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6207 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6208 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6209 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6210 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6211 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6212 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6213 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6214 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6215 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6216 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6217 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6218 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6219 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6220 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6221 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6222 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6223 // CHECK11: cond.true:
6224 // CHECK11-NEXT: br label [[COND_END:%.*]]
6225 // CHECK11: cond.false:
6226 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6227 // CHECK11-NEXT: br label [[COND_END]]
6228 // CHECK11: cond.end:
6229 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6230 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6231 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6232 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6233 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6234 // CHECK11: omp.inner.for.cond:
6235 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]
6236 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
6237 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6238 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6239 // CHECK11: omp.inner.for.body:
6240 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP25]]
6241 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6242 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
6243 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6244 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP25]]
6245 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6246 // CHECK11: omp.inner.for.inc:
6247 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
6248 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP25]]
6249 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6250 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
6251 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
6252 // CHECK11: omp.inner.for.end:
6253 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6254 // CHECK11: omp.loop.exit:
6255 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6256 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6257 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6258 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6259 // CHECK11: .omp.final.then:
6260 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6261 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6262 // CHECK11: .omp.final.done:
6263 // CHECK11-NEXT: ret void
6264 //
6265 //
6266 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
6267 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6268 // CHECK11-NEXT: entry:
6269 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6270 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6271 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6272 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6273 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6274 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6275 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6276 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6277 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6278 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6279 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6280 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6281 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6282 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6283 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6284 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6285 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6286 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6287 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6288 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6289 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6290 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6291 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6292 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6293 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6294 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6295 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6296 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6297 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6298 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6299 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6300 // CHECK11: cond.true:
6301 // CHECK11-NEXT: br label [[COND_END:%.*]]
6302 // CHECK11: cond.false:
6303 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6304 // CHECK11-NEXT: br label [[COND_END]]
6305 // CHECK11: cond.end:
6306 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6307 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6308 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6309 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6310 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6311 // CHECK11: omp.inner.for.cond:
6312 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]]
6313 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]]
6314 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6315 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6316 // CHECK11: omp.inner.for.body:
6317 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
6318 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6319 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6320 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP28]]
6321 // CHECK11-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP28]]
6322 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6323 // CHECK11: omp.body.continue:
6324 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6325 // CHECK11: omp.inner.for.inc:
6326 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
6327 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6328 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
6329 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
6330 // CHECK11: omp.inner.for.end:
6331 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6332 // CHECK11: omp.loop.exit:
6333 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6334 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6335 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6336 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6337 // CHECK11: .omp.final.then:
6338 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6339 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6340 // CHECK11: .omp.final.done:
6341 // CHECK11-NEXT: ret void
6342 //
6343 //
6344 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l85
6345 // CHECK11-SAME: () #[[ATTR1]] {
6346 // CHECK11-NEXT: entry:
6347 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
6348 // CHECK11-NEXT: ret void
6349 //
6350 //
6351 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6
6352 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6353 // CHECK11-NEXT: entry:
6354 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6355 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6356 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6357 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6358 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6359 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6360 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6361 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6362 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6363 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6364 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6365 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6366 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6367 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6368 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6369 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6370 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6371 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6372 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6373 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6374 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6375 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6376 // CHECK11: cond.true:
6377 // CHECK11-NEXT: br label [[COND_END:%.*]]
6378 // CHECK11: cond.false:
6379 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6380 // CHECK11-NEXT: br label [[COND_END]]
6381 // CHECK11: cond.end:
6382 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6383 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6384 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6385 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6386 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6387 // CHECK11: omp.inner.for.cond:
6388 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6389 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6390 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6391 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6392 // CHECK11: omp.inner.for.body:
6393 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6394 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6395 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6396 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6397 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6398 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6399 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6400 // CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6401 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6402 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6403 // CHECK11: omp.inner.for.inc:
6404 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6405 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6406 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6407 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6408 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
6409 // CHECK11: omp.inner.for.end:
6410 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6411 // CHECK11: omp.loop.exit:
6412 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6413 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6414 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6415 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6416 // CHECK11: .omp.final.then:
6417 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6418 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6419 // CHECK11: .omp.final.done:
6420 // CHECK11-NEXT: ret void
6421 //
6422 //
6423 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
6424 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6425 // CHECK11-NEXT: entry:
6426 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6427 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6428 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6429 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6430 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6431 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6432 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6433 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6434 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6435 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6436 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6437 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6438 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6439 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6440 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6441 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6442 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6443 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6444 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6445 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6446 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6447 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6448 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6449 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6450 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6451 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6452 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6453 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6454 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6455 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6456 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6457 // CHECK11: cond.true:
6458 // CHECK11-NEXT: br label [[COND_END:%.*]]
6459 // CHECK11: cond.false:
6460 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6461 // CHECK11-NEXT: br label [[COND_END]]
6462 // CHECK11: cond.end:
6463 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6464 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6465 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6466 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6467 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6468 // CHECK11: omp.inner.for.cond:
6469 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6470 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6471 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6472 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6473 // CHECK11: omp.inner.for.body:
6474 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6475 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6476 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6477 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6478 // CHECK11-NEXT: call void @_Z3fn5v()
6479 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6480 // CHECK11: omp.body.continue:
6481 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6482 // CHECK11: omp.inner.for.inc:
6483 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6484 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6485 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6486 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
6487 // CHECK11: omp.inner.for.end:
6488 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6489 // CHECK11: omp.loop.exit:
6490 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6491 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6492 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6493 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6494 // CHECK11: .omp.final.then:
6495 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6496 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6497 // CHECK11: .omp.final.done:
6498 // CHECK11-NEXT: ret void
6499 //
6500 //
6501 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
6502 // CHECK11-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6503 // CHECK11-NEXT: entry:
6504 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6505 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6506 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6507 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6508 // CHECK11-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
6509 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
6510 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6511 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6512 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
6513 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6514 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
6515 // CHECK11-NEXT: ret void
6516 //
6517 //
6518 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..8
6519 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6520 // CHECK11-NEXT: entry:
6521 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6522 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6523 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6524 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6525 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6526 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6527 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6528 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6529 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6530 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6531 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6532 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6533 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
6534 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
6535 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6536 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6537 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6538 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6539 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6540 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6541 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6542 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6543 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6544 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6545 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6546 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6547 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6548 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6549 // CHECK11: cond.true:
6550 // CHECK11-NEXT: br label [[COND_END:%.*]]
6551 // CHECK11: cond.false:
6552 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6553 // CHECK11-NEXT: br label [[COND_END]]
6554 // CHECK11: cond.end:
6555 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6556 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6557 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6558 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6559 // CHECK11-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 1
6560 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
6561 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
6562 // CHECK11: omp_if.then:
6563 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6564 // CHECK11: omp.inner.for.cond:
6565 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34:![0-9]+]]
6566 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]]
6567 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6568 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6569 // CHECK11: omp.inner.for.body:
6570 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP34]]
6571 // CHECK11-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6572 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP34]]
6573 // CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6574 // CHECK11-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP34]]
6575 // CHECK11-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
6576 // CHECK11-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6577 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
6578 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group [[ACC_GRP34]]
6579 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP34]]
6580 // CHECK11-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP34]]
6581 // CHECK11-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
6582 // CHECK11-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
6583 // CHECK11: omp_if.then5:
6584 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP34]]
6585 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6586 // CHECK11: omp_if.else:
6587 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]]
6588 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP34]]
6589 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP34]]
6590 // CHECK11-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP34]]
6591 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP34]]
6592 // CHECK11-NEXT: br label [[OMP_IF_END]]
6593 // CHECK11: omp_if.end:
6594 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6595 // CHECK11: omp.inner.for.inc:
6596 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]]
6597 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP34]]
6598 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6599 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP34]]
6600 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]]
6601 // CHECK11: omp.inner.for.end:
6602 // CHECK11-NEXT: br label [[OMP_IF_END22:%.*]]
6603 // CHECK11: omp_if.else6:
6604 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6605 // CHECK11: omp.inner.for.cond7:
6606 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6607 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6608 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
6609 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
6610 // CHECK11: omp.inner.for.body9:
6611 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6612 // CHECK11-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
6613 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6614 // CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
6615 // CHECK11-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 1
6616 // CHECK11-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
6617 // CHECK11-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
6618 // CHECK11-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
6619 // CHECK11-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
6620 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
6621 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 1
6622 // CHECK11-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
6623 // CHECK11-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
6624 // CHECK11: omp_if.then15:
6625 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
6626 // CHECK11-NEXT: br label [[OMP_IF_END18:%.*]]
6627 // CHECK11: omp_if.else16:
6628 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6629 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6630 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
6631 // CHECK11-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
6632 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6633 // CHECK11-NEXT: br label [[OMP_IF_END18]]
6634 // CHECK11: omp_if.end18:
6635 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
6636 // CHECK11: omp.inner.for.inc19:
6637 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6638 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6639 // CHECK11-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
6640 // CHECK11-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
6641 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP37:![0-9]+]]
6642 // CHECK11: omp.inner.for.end21:
6643 // CHECK11-NEXT: br label [[OMP_IF_END22]]
6644 // CHECK11: omp_if.end22:
6645 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6646 // CHECK11: omp.loop.exit:
6647 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6648 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6649 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
6650 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6651 // CHECK11: .omp.final.then:
6652 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6653 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6654 // CHECK11: .omp.final.done:
6655 // CHECK11-NEXT: ret void
6656 //
6657 //
6658 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..9
6659 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6660 // CHECK11-NEXT: entry:
6661 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6662 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6663 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6664 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6665 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6666 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6667 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6668 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6669 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6670 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6671 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6672 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6673 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6674 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6675 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6676 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6677 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6678 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6679 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6680 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6681 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6682 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
6683 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6684 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
6685 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6686 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6687 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6688 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6689 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
6690 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6691 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6692 // CHECK11: omp_if.then:
6693 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6694 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6695 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6696 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6697 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6698 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6699 // CHECK11: cond.true:
6700 // CHECK11-NEXT: br label [[COND_END:%.*]]
6701 // CHECK11: cond.false:
6702 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6703 // CHECK11-NEXT: br label [[COND_END]]
6704 // CHECK11: cond.end:
6705 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6706 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6707 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6708 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6709 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6710 // CHECK11: omp.inner.for.cond:
6711 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
6712 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
6713 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6714 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6715 // CHECK11: omp.inner.for.body:
6716 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
6717 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6718 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6719 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP38]]
6720 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP38]]
6721 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6722 // CHECK11: omp.body.continue:
6723 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6724 // CHECK11: omp.inner.for.inc:
6725 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
6726 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
6727 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
6728 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
6729 // CHECK11: omp.inner.for.end:
6730 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6731 // CHECK11: omp_if.else:
6732 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6733 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
6734 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6735 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6736 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
6737 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
6738 // CHECK11: cond.true6:
6739 // CHECK11-NEXT: br label [[COND_END8:%.*]]
6740 // CHECK11: cond.false7:
6741 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6742 // CHECK11-NEXT: br label [[COND_END8]]
6743 // CHECK11: cond.end8:
6744 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
6745 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
6746 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6747 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6748 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
6749 // CHECK11: omp.inner.for.cond10:
6750 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6751 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6752 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6753 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
6754 // CHECK11: omp.inner.for.body12:
6755 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6756 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
6757 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6758 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
6759 // CHECK11-NEXT: call void @_Z3fn6v()
6760 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
6761 // CHECK11: omp.body.continue15:
6762 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
6763 // CHECK11: omp.inner.for.inc16:
6764 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6765 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
6766 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
6767 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP41:![0-9]+]]
6768 // CHECK11: omp.inner.for.end18:
6769 // CHECK11-NEXT: br label [[OMP_IF_END]]
6770 // CHECK11: omp_if.end:
6771 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6772 // CHECK11: omp.loop.exit:
6773 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6774 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
6775 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
6776 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6777 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6778 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6779 // CHECK11: .omp.final.then:
6780 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6781 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6782 // CHECK11: .omp.final.done:
6783 // CHECK11-NEXT: ret void
6784 //
6785 //
6786 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
6787 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6788 // CHECK11-NEXT: entry:
6789 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6790 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6791 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6792 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6793 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6794 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6795 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6796 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6797 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6798 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6799 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6800 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6801 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6802 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6803 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6804 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6805 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6806 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6807 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6808 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6809 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6810 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
6811 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6812 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
6813 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6814 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6815 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6816 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6817 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
6818 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6819 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6820 // CHECK11: omp_if.then:
6821 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6822 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6823 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6824 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6825 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6826 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6827 // CHECK11: cond.true:
6828 // CHECK11-NEXT: br label [[COND_END:%.*]]
6829 // CHECK11: cond.false:
6830 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6831 // CHECK11-NEXT: br label [[COND_END]]
6832 // CHECK11: cond.end:
6833 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6834 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6835 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6836 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6837 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6838 // CHECK11: omp.inner.for.cond:
6839 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
6840 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
6841 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6842 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6843 // CHECK11: omp.inner.for.body:
6844 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
6845 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6846 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6847 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP42]]
6848 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP42]]
6849 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6850 // CHECK11: omp.body.continue:
6851 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6852 // CHECK11: omp.inner.for.inc:
6853 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
6854 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
6855 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
6856 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
6857 // CHECK11: omp.inner.for.end:
6858 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6859 // CHECK11: omp_if.else:
6860 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6861 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
6862 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6863 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6864 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
6865 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
6866 // CHECK11: cond.true6:
6867 // CHECK11-NEXT: br label [[COND_END8:%.*]]
6868 // CHECK11: cond.false7:
6869 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6870 // CHECK11-NEXT: br label [[COND_END8]]
6871 // CHECK11: cond.end8:
6872 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
6873 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
6874 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6875 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6876 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
6877 // CHECK11: omp.inner.for.cond10:
6878 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6879 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6880 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6881 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
6882 // CHECK11: omp.inner.for.body12:
6883 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6884 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
6885 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6886 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
6887 // CHECK11-NEXT: call void @_Z3fn6v()
6888 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
6889 // CHECK11: omp.body.continue15:
6890 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
6891 // CHECK11: omp.inner.for.inc16:
6892 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6893 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
6894 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
6895 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP45:![0-9]+]]
6896 // CHECK11: omp.inner.for.end18:
6897 // CHECK11-NEXT: br label [[OMP_IF_END]]
6898 // CHECK11: omp_if.end:
6899 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6900 // CHECK11: omp.loop.exit:
6901 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6902 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
6903 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
6904 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6905 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6906 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6907 // CHECK11: .omp.final.then:
6908 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6909 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6910 // CHECK11: .omp.final.done:
6911 // CHECK11-NEXT: ret void
6912 //
6913 //
6914 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6915 // CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
6916 // CHECK11-NEXT: entry:
6917 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
6918 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6919 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6920 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6921 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6922 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6923 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6924 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
6925 // CHECK11-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6926 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6927 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6928 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
6929 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6930 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
6931 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6932 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
6933 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6934 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
6935 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6936 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
6937 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6938 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
6939 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6940 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
6941 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6942 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
6943 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6944 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
6945 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6946 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
6947 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6948 // CHECK11: omp_offload.failed:
6949 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
6950 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
6951 // CHECK11: omp_offload.cont:
6952 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66() #[[ATTR2]]
6953 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6954 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
6955 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6956 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6957 // CHECK11-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6958 // CHECK11-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
6959 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6960 // CHECK11-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
6961 // CHECK11-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
6962 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6963 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6964 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
6965 // CHECK11-NEXT: store i64 [[TMP13]], i64* [[TMP15]], align 8
6966 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6967 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
6968 // CHECK11-NEXT: store i64 [[TMP13]], i64* [[TMP17]], align 8
6969 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6970 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 8
6971 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6972 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6973 // CHECK11-NEXT: [[TMP21:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6974 // CHECK11-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP21]] to i1
6975 // CHECK11-NEXT: [[TMP22:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
6976 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6977 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
6978 // CHECK11-NEXT: store i32 1, i32* [[TMP23]], align 4
6979 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
6980 // CHECK11-NEXT: store i32 1, i32* [[TMP24]], align 4
6981 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
6982 // CHECK11-NEXT: store i8** [[TMP19]], i8*** [[TMP25]], align 8
6983 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
6984 // CHECK11-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
6985 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
6986 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64** [[TMP27]], align 8
6987 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
6988 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i64** [[TMP28]], align 8
6989 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
6990 // CHECK11-NEXT: store i8** null, i8*** [[TMP29]], align 8
6991 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
6992 // CHECK11-NEXT: store i8** null, i8*** [[TMP30]], align 8
6993 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
6994 // CHECK11-NEXT: store i64 100, i64* [[TMP31]], align 8
6995 // CHECK11-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP22]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
6996 // CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
6997 // CHECK11-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
6998 // CHECK11: omp_offload.failed6:
6999 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70(i64 [[TMP13]]) #[[ATTR2]]
7000 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]]
7001 // CHECK11: omp_offload.cont7:
7002 // CHECK11-NEXT: ret i32 0
7003 //
7004 //
7005 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
7006 // CHECK11-SAME: () #[[ATTR1]] {
7007 // CHECK11-NEXT: entry:
7008 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
7009 // CHECK11-NEXT: ret void
7010 //
7011 //
7012 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13
7013 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7014 // CHECK11-NEXT: entry:
7015 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7016 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7017 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7018 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7019 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7020 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7021 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7022 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7023 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7024 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7025 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7026 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7027 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7028 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7029 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7030 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7031 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7032 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7033 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7034 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7035 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7036 // CHECK11: cond.true:
7037 // CHECK11-NEXT: br label [[COND_END:%.*]]
7038 // CHECK11: cond.false:
7039 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7040 // CHECK11-NEXT: br label [[COND_END]]
7041 // CHECK11: cond.end:
7042 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7043 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7044 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7045 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7046 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7047 // CHECK11: omp.inner.for.cond:
7048 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46:![0-9]+]]
7049 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]]
7050 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7051 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7052 // CHECK11: omp.inner.for.body:
7053 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP46]]
7054 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7055 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP46]]
7056 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7057 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP46]]
7058 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7059 // CHECK11: omp.inner.for.inc:
7060 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]]
7061 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP46]]
7062 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7063 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP46]]
7064 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP47:![0-9]+]]
7065 // CHECK11: omp.inner.for.end:
7066 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7067 // CHECK11: omp.loop.exit:
7068 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7069 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7070 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7071 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7072 // CHECK11: .omp.final.then:
7073 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7074 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7075 // CHECK11: .omp.final.done:
7076 // CHECK11-NEXT: ret void
7077 //
7078 //
7079 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14
7080 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7081 // CHECK11-NEXT: entry:
7082 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7083 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7084 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7085 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7086 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7087 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7088 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7089 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7090 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7091 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7092 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7093 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7094 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7095 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7096 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7097 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7098 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7099 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7100 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7101 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7102 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7103 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7104 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7105 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7106 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7107 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7108 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7109 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7110 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7111 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7112 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7113 // CHECK11: cond.true:
7114 // CHECK11-NEXT: br label [[COND_END:%.*]]
7115 // CHECK11: cond.false:
7116 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7117 // CHECK11-NEXT: br label [[COND_END]]
7118 // CHECK11: cond.end:
7119 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7120 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7121 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7122 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7123 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7124 // CHECK11: omp.inner.for.cond:
7125 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49:![0-9]+]]
7126 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP49]]
7127 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7128 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7129 // CHECK11: omp.inner.for.body:
7130 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]]
7131 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7132 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7133 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP49]]
7134 // CHECK11-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP49]]
7135 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7136 // CHECK11: omp.body.continue:
7137 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7138 // CHECK11: omp.inner.for.inc:
7139 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]]
7140 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7141 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP49]]
7142 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP50:![0-9]+]]
7143 // CHECK11: omp.inner.for.end:
7144 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7145 // CHECK11: omp.loop.exit:
7146 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7147 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7148 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7149 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7150 // CHECK11: .omp.final.then:
7151 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7152 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7153 // CHECK11: .omp.final.done:
7154 // CHECK11-NEXT: ret void
7155 //
7156 //
7157 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l66
7158 // CHECK11-SAME: () #[[ATTR1]] {
7159 // CHECK11-NEXT: entry:
7160 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*))
7161 // CHECK11-NEXT: ret void
7162 //
7163 //
7164 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15
7165 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7166 // CHECK11-NEXT: entry:
7167 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7168 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7169 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7170 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7171 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7172 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7173 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7174 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7175 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7176 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7177 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7178 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7179 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7180 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7181 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7182 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7183 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7184 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7185 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7186 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7187 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7188 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7189 // CHECK11: cond.true:
7190 // CHECK11-NEXT: br label [[COND_END:%.*]]
7191 // CHECK11: cond.false:
7192 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7193 // CHECK11-NEXT: br label [[COND_END]]
7194 // CHECK11: cond.end:
7195 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7196 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7197 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7198 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7199 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7200 // CHECK11: omp.inner.for.cond:
7201 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7202 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7203 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7204 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7205 // CHECK11: omp.inner.for.body:
7206 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7207 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7208 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7209 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7210 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7211 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7212 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7213 // CHECK11-NEXT: call void @.omp_outlined..16(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7214 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7215 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7216 // CHECK11: omp.inner.for.inc:
7217 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7218 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7219 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7220 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7221 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP52:![0-9]+]]
7222 // CHECK11: omp.inner.for.end:
7223 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7224 // CHECK11: omp.loop.exit:
7225 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7226 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7227 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7228 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7229 // CHECK11: .omp.final.then:
7230 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7231 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7232 // CHECK11: .omp.final.done:
7233 // CHECK11-NEXT: ret void
7234 //
7235 //
7236 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..16
7237 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7238 // CHECK11-NEXT: entry:
7239 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7240 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7241 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7242 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7243 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7244 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7245 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7246 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7247 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7248 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7249 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7250 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7251 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7252 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7253 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7254 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7255 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7256 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7257 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7258 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7259 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7260 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7261 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7262 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7263 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7264 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7265 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7266 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7267 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7268 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7269 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7270 // CHECK11: cond.true:
7271 // CHECK11-NEXT: br label [[COND_END:%.*]]
7272 // CHECK11: cond.false:
7273 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7274 // CHECK11-NEXT: br label [[COND_END]]
7275 // CHECK11: cond.end:
7276 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7277 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7278 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7279 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7280 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7281 // CHECK11: omp.inner.for.cond:
7282 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7283 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7284 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7285 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7286 // CHECK11: omp.inner.for.body:
7287 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7288 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7289 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7290 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7291 // CHECK11-NEXT: call void @_Z3fn2v()
7292 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7293 // CHECK11: omp.body.continue:
7294 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7295 // CHECK11: omp.inner.for.inc:
7296 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7297 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7298 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7299 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
7300 // CHECK11: omp.inner.for.end:
7301 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7302 // CHECK11: omp.loop.exit:
7303 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7304 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7305 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7306 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7307 // CHECK11: .omp.final.then:
7308 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7309 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7310 // CHECK11: .omp.final.done:
7311 // CHECK11-NEXT: ret void
7312 //
7313 //
7314 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l70
7315 // CHECK11-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
7316 // CHECK11-NEXT: entry:
7317 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7318 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7319 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7320 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
7321 // CHECK11-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
7322 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
7323 // CHECK11-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
7324 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7325 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
7326 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7327 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..17 to void (i32*, i32*, ...)*), i64 [[TMP1]])
7328 // CHECK11-NEXT: ret void
7329 //
7330 //
7331 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..17
7332 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
7333 // CHECK11-NEXT: entry:
7334 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7335 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7336 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7337 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7338 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7339 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7340 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7341 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7342 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7343 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7344 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7345 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7346 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7347 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7348 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
7349 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7350 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7351 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7352 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7353 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7354 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7355 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7356 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7357 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7358 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7359 // CHECK11: cond.true:
7360 // CHECK11-NEXT: br label [[COND_END:%.*]]
7361 // CHECK11: cond.false:
7362 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7363 // CHECK11-NEXT: br label [[COND_END]]
7364 // CHECK11: cond.end:
7365 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7366 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7367 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7368 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7369 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7370 // CHECK11: omp.inner.for.cond:
7371 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54:![0-9]+]]
7372 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
7373 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7374 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7375 // CHECK11: omp.inner.for.body:
7376 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP54]]
7377 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7378 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP54]]
7379 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7380 // CHECK11-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP54]]
7381 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
7382 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7383 // CHECK11: omp_if.then:
7384 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP54]]
7385 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
7386 // CHECK11: omp_if.else:
7387 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
7388 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP54]]
7389 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP54]]
7390 // CHECK11-NEXT: call void @.omp_outlined..18(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP54]]
7391 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP54]]
7392 // CHECK11-NEXT: br label [[OMP_IF_END]]
7393 // CHECK11: omp_if.end:
7394 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7395 // CHECK11: omp.inner.for.inc:
7396 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
7397 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP54]]
7398 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7399 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP54]]
7400 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP55:![0-9]+]]
7401 // CHECK11: omp.inner.for.end:
7402 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7403 // CHECK11: omp.loop.exit:
7404 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7405 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7406 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
7407 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7408 // CHECK11: .omp.final.then:
7409 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7410 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7411 // CHECK11: .omp.final.done:
7412 // CHECK11-NEXT: ret void
7413 //
7414 //
7415 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..18
7416 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7417 // CHECK11-NEXT: entry:
7418 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7419 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7420 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7421 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7422 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7423 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7424 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7425 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7426 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7427 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7428 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7429 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7430 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7431 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7432 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7433 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7434 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7435 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7436 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7437 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7438 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7439 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7440 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7441 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7442 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7443 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7444 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7445 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7446 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7447 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7448 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7449 // CHECK11: cond.true:
7450 // CHECK11-NEXT: br label [[COND_END:%.*]]
7451 // CHECK11: cond.false:
7452 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7453 // CHECK11-NEXT: br label [[COND_END]]
7454 // CHECK11: cond.end:
7455 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7456 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7457 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7458 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7459 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7460 // CHECK11: omp.inner.for.cond:
7461 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57:![0-9]+]]
7462 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP57]]
7463 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7464 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7465 // CHECK11: omp.inner.for.body:
7466 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
7467 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7468 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7469 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP57]]
7470 // CHECK11-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP57]]
7471 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7472 // CHECK11: omp.body.continue:
7473 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7474 // CHECK11: omp.inner.for.inc:
7475 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
7476 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7477 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP57]]
7478 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP58:![0-9]+]]
7479 // CHECK11: omp.inner.for.end:
7480 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7481 // CHECK11: omp.loop.exit:
7482 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7483 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7484 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7485 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7486 // CHECK11: .omp.final.then:
7487 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7488 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7489 // CHECK11: .omp.final.done:
7490 // CHECK11-NEXT: ret void
7491 //
7492 //
7493 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7494 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
7495 // CHECK11-NEXT: entry:
7496 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
7497 // CHECK11-NEXT: ret void
7498 //
7499 //
7500 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
7501 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
7502 // CHECK13-NEXT: entry:
7503 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7504 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7505 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7506 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7507 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7508 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7509 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7510 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7511 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7512 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7513 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7514 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7515 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7516 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7517 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7518 // CHECK13: omp.inner.for.cond:
7519 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7520 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7521 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7522 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7523 // CHECK13: omp.inner.for.body:
7524 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7525 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7526 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7527 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7528 // CHECK13-NEXT: store i32 0, i32* @Arg, align 4, !llvm.access.group [[ACC_GRP2]]
7529 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7530 // CHECK13: omp.body.continue:
7531 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7532 // CHECK13: omp.inner.for.inc:
7533 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7534 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7535 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7536 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7537 // CHECK13: omp.inner.for.end:
7538 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7539 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7540 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7541 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7542 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7543 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7544 // CHECK13: omp.inner.for.cond7:
7545 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7546 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7547 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7548 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7549 // CHECK13: omp.inner.for.body9:
7550 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7551 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7552 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7553 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7554 // CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7555 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7556 // CHECK13: omp.body.continue12:
7557 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7558 // CHECK13: omp.inner.for.inc13:
7559 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7560 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7561 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7562 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7563 // CHECK13: omp.inner.for.end15:
7564 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7565 // CHECK13-NEXT: ret void
7566 //
7567 //
7568 // CHECK13-LABEL: define {{[^@]+}}@main
7569 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
7570 // CHECK13-NEXT: entry:
7571 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7572 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7573 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7574 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7575 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7576 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7577 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7578 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7579 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7580 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7581 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7582 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7583 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7584 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7585 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7586 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7587 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
7588 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
7589 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7590 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7591 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7592 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7593 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7594 // CHECK13: omp.inner.for.cond:
7595 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7596 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7597 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7598 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7599 // CHECK13: omp.inner.for.body:
7600 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7601 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7602 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7603 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7604 // CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7605 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7606 // CHECK13: omp.body.continue:
7607 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7608 // CHECK13: omp.inner.for.inc:
7609 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7610 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7611 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7612 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7613 // CHECK13: omp.inner.for.end:
7614 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7615 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7616 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7617 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7618 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7619 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7620 // CHECK13: omp.inner.for.cond7:
7621 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
7622 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
7623 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7624 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7625 // CHECK13: omp.inner.for.body9:
7626 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7627 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7628 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7629 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
7630 // CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
7631 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7632 // CHECK13: omp.body.continue12:
7633 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7634 // CHECK13: omp.inner.for.inc13:
7635 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7636 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7637 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7638 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7639 // CHECK13: omp.inner.for.end15:
7640 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7641 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
7642 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7643 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7644 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7645 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7646 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7647 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7648 // CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7649 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7650 // CHECK13: omp.inner.for.cond21:
7651 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
7652 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
7653 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7654 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7655 // CHECK13: omp.inner.for.body23:
7656 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7657 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7658 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7659 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
7660 // CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
7661 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7662 // CHECK13: omp.body.continue26:
7663 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7664 // CHECK13: omp.inner.for.inc27:
7665 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7666 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7667 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7668 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
7669 // CHECK13: omp.inner.for.end29:
7670 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
7671 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
7672 // CHECK13-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]])
7673 // CHECK13-NEXT: ret i32 [[CALL]]
7674 //
7675 //
7676 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7677 // CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7678 // CHECK13-NEXT: entry:
7679 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7680 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7681 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7682 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7683 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7684 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7685 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7686 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7687 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7688 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7689 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7690 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7691 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7692 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7693 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7694 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7695 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
7696 // CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
7697 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7698 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7699 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7700 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7701 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7702 // CHECK13: omp.inner.for.cond:
7703 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
7704 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
7705 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7706 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7707 // CHECK13: omp.inner.for.body:
7708 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7709 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7710 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7711 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
7712 // CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
7713 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7714 // CHECK13: omp.body.continue:
7715 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7716 // CHECK13: omp.inner.for.inc:
7717 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7718 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7719 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7720 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
7721 // CHECK13: omp.inner.for.end:
7722 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7723 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7724 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7725 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7726 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7727 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7728 // CHECK13: omp.inner.for.cond7:
7729 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
7730 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
7731 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7732 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7733 // CHECK13: omp.inner.for.body9:
7734 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7735 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7736 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7737 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
7738 // CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
7739 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7740 // CHECK13: omp.body.continue12:
7741 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7742 // CHECK13: omp.inner.for.inc13:
7743 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7744 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7745 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7746 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7747 // CHECK13: omp.inner.for.end15:
7748 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7749 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7750 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7751 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7752 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7753 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7754 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7755 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7756 // CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7757 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7758 // CHECK13: omp.inner.for.cond21:
7759 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
7760 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
7761 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7762 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7763 // CHECK13: omp.inner.for.body23:
7764 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7765 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7766 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7767 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
7768 // CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
7769 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7770 // CHECK13: omp.body.continue26:
7771 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7772 // CHECK13: omp.inner.for.inc27:
7773 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7774 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7775 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7776 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
7777 // CHECK13: omp.inner.for.end29:
7778 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
7779 // CHECK13-NEXT: ret i32 0
7780 //
7781 //
7782 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
7783 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
7784 // CHECK15-NEXT: entry:
7785 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7786 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7787 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7788 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7789 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7790 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7791 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7792 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7793 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7794 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
7795 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7796 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7797 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7798 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7799 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7800 // CHECK15: omp.inner.for.cond:
7801 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7802 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7803 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7804 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7805 // CHECK15: omp.inner.for.body:
7806 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7807 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7808 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7809 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7810 // CHECK15-NEXT: store i32 0, i32* @Arg, align 4, !nontemporal !3, !llvm.access.group [[ACC_GRP2]]
7811 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7812 // CHECK15: omp.body.continue:
7813 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7814 // CHECK15: omp.inner.for.inc:
7815 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7816 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7817 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7818 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
7819 // CHECK15: omp.inner.for.end:
7820 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
7821 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7822 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7823 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7824 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7825 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7826 // CHECK15: omp.inner.for.cond7:
7827 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
7828 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP7]]
7829 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7830 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7831 // CHECK15: omp.inner.for.body9:
7832 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]]
7833 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7834 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7835 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP7]]
7836 // CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP7]]
7837 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7838 // CHECK15: omp.body.continue12:
7839 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7840 // CHECK15: omp.inner.for.inc13:
7841 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]]
7842 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7843 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP7]]
7844 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP8:![0-9]+]]
7845 // CHECK15: omp.inner.for.end15:
7846 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
7847 // CHECK15-NEXT: ret void
7848 //
7849 //
7850 // CHECK15-LABEL: define {{[^@]+}}@main
7851 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
7852 // CHECK15-NEXT: entry:
7853 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7854 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7855 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7856 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7857 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7858 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7859 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7860 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7861 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7862 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7863 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
7864 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7865 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7866 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7867 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7868 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7869 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
7870 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
7871 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7872 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7873 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7874 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7875 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7876 // CHECK15: omp.inner.for.cond:
7877 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
7878 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
7879 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7880 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7881 // CHECK15: omp.inner.for.body:
7882 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
7883 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7884 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7885 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
7886 // CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP10]]
7887 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7888 // CHECK15: omp.body.continue:
7889 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7890 // CHECK15: omp.inner.for.inc:
7891 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
7892 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7893 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
7894 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
7895 // CHECK15: omp.inner.for.end:
7896 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
7897 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7898 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7899 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7900 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7901 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7902 // CHECK15: omp.inner.for.cond7:
7903 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7904 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7905 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7906 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7907 // CHECK15: omp.inner.for.body9:
7908 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7909 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7910 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7911 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7912 // CHECK15-NEXT: call void @_Z3fn5v()
7913 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7914 // CHECK15: omp.body.continue12:
7915 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7916 // CHECK15: omp.inner.for.inc13:
7917 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7918 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7919 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7920 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7921 // CHECK15: omp.inner.for.end15:
7922 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
7923 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
7924 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7925 // CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7926 // CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7927 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7928 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7929 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7930 // CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7931 // CHECK15-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7932 // CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
7933 // CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7934 // CHECK15: omp_if.then:
7935 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
7936 // CHECK15: omp.inner.for.cond22:
7937 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
7938 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
7939 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7940 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
7941 // CHECK15: omp.inner.for.body24:
7942 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7943 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
7944 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
7945 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
7946 // CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
7947 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
7948 // CHECK15: omp.body.continue27:
7949 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
7950 // CHECK15: omp.inner.for.inc28:
7951 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7952 // CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
7953 // CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7954 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP16:![0-9]+]]
7955 // CHECK15: omp.inner.for.end30:
7956 // CHECK15-NEXT: br label [[OMP_IF_END:%.*]]
7957 // CHECK15: omp_if.else:
7958 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
7959 // CHECK15: omp.inner.for.cond31:
7960 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7961 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
7962 // CHECK15-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
7963 // CHECK15-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
7964 // CHECK15: omp.inner.for.body33:
7965 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7966 // CHECK15-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
7967 // CHECK15-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
7968 // CHECK15-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
7969 // CHECK15-NEXT: call void @_Z3fn6v()
7970 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
7971 // CHECK15: omp.body.continue36:
7972 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
7973 // CHECK15: omp.inner.for.inc37:
7974 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7975 // CHECK15-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
7976 // CHECK15-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
7977 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP18:![0-9]+]]
7978 // CHECK15: omp.inner.for.end39:
7979 // CHECK15-NEXT: br label [[OMP_IF_END]]
7980 // CHECK15: omp_if.end:
7981 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
7982 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
7983 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
7984 // CHECK15-NEXT: ret i32 [[CALL]]
7985 //
7986 //
7987 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7988 // CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7989 // CHECK15-NEXT: entry:
7990 // CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7991 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7992 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7993 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7994 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7995 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7996 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7997 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7998 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7999 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8000 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
8001 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8002 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
8003 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
8004 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
8005 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
8006 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
8007 // CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
8008 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8009 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8010 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8011 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8012 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8013 // CHECK15: omp.inner.for.cond:
8014 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
8015 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
8016 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8017 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8018 // CHECK15: omp.inner.for.body:
8019 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8020 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8021 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8022 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP19]]
8023 // CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP19]]
8024 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8025 // CHECK15: omp.body.continue:
8026 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8027 // CHECK15: omp.inner.for.inc:
8028 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8029 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8030 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8031 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
8032 // CHECK15: omp.inner.for.end:
8033 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
8034 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
8035 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
8036 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
8037 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
8038 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
8039 // CHECK15: omp.inner.for.cond7:
8040 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
8041 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
8042 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8043 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
8044 // CHECK15: omp.inner.for.body9:
8045 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
8046 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8047 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8048 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
8049 // CHECK15-NEXT: call void @_Z3fn2v()
8050 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
8051 // CHECK15: omp.body.continue12:
8052 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
8053 // CHECK15: omp.inner.for.inc13:
8054 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
8055 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
8056 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
8057 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
8058 // CHECK15: omp.inner.for.end15:
8059 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
8060 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
8061 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
8062 // CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8063 // CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8064 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
8065 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
8066 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
8067 // CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
8068 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
8069 // CHECK15: omp.inner.for.cond21:
8070 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
8071 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP23]]
8072 // CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
8073 // CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
8074 // CHECK15: omp.inner.for.body23:
8075 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]]
8076 // CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
8077 // CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
8078 // CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP23]]
8079 // CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP23]]
8080 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
8081 // CHECK15: omp.body.continue26:
8082 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
8083 // CHECK15: omp.inner.for.inc27:
8084 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]]
8085 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
8086 // CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP23]]
8087 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP24:![0-9]+]]
8088 // CHECK15: omp.inner.for.end29:
8089 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
8090 // CHECK15-NEXT: ret i32 0
8091 //
8092