1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X][Y];
25
fooSS26 int foo(void) {
27
28 #pragma omp target teams distribute parallel for simd collapse(2)
29 for(int i = 0; i < X; i++) {
30 for(int j = 0; j < Y; j++) {
31 a[i][j] = (T)0;
32 }
33 }
34
35 // discard loop variables not needed here
36
37
38 return a[0][0];
39 }
40 };
41
teams_template_struct(void)42 int teams_template_struct(void) {
43 SS<int, 123, 456> V;
44 return V.foo();
45
46 }
47 #endif // CK1
48
49 // Test host codegen.
50 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
56
57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
63 #ifdef CK2
64
65 template <typename T, int n, int m>
tmain(T argc)66 int tmain(T argc) {
67 T a[n][m];
68 #pragma omp target teams distribute parallel for simd collapse(2)
69 for(int i = 0; i < n; i++) {
70 for(int j = 0; j < m; j++) {
71 a[i][j] = (T)0;
72 }
73 }
74 return 0;
75 }
76
main(int argc,char ** argv)77 int main (int argc, char **argv) {
78 int n = 100;
79 int m = 2;
80 int a[n][m];
81 #pragma omp target teams distribute parallel for simd collapse(2)
82 for(int i = 0; i < n; i++) {
83 for(int j = 0; j < m; j++) {
84 a[i][j] = 0;
85 }
86 }
87 return tmain<int, 10, 2>(argc);
88 }
89
90
91
92
93
94
95
96
97 // discard loop variables not needed here
98
99
100 #endif // CK2
101 #endif // #ifndef HEADER
102 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
103 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
104 // CHECK1-NEXT: entry:
105 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
106 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
107 // CHECK1-NEXT: ret i32 [[CALL]]
108 //
109 //
110 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
111 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
112 // CHECK1-NEXT: entry:
113 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
114 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
115 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
116 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
117 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
118 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
119 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
120 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
121 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
122 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
123 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
124 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
125 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
126 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
127 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
128 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
129 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
130 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
131 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
132 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
133 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
134 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
135 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
136 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
137 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
138 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
139 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
140 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
141 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
142 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
143 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
144 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
145 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
146 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
147 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
148 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
149 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
150 // CHECK1-NEXT: store i64 56088, i64* [[TMP15]], align 8
151 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
152 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
153 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
154 // CHECK1: omp_offload.failed:
155 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
156 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
157 // CHECK1: omp_offload.cont:
158 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
159 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
160 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
161 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
162 // CHECK1-NEXT: ret i32 [[TMP18]]
163 //
164 //
165 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
166 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
167 // CHECK1-NEXT: entry:
168 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
169 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
170 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
171 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
172 // CHECK1-NEXT: ret void
173 //
174 //
175 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
176 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
177 // CHECK1-NEXT: entry:
178 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
179 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
180 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
181 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
182 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
183 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
184 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
185 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
186 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
187 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
188 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
189 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
191 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
192 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
193 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
194 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
195 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
196 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
197 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
198 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
199 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
200 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
201 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
202 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
203 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
204 // CHECK1: cond.true:
205 // CHECK1-NEXT: br label [[COND_END:%.*]]
206 // CHECK1: cond.false:
207 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
208 // CHECK1-NEXT: br label [[COND_END]]
209 // CHECK1: cond.end:
210 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
211 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
212 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
213 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
214 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
215 // CHECK1: omp.inner.for.cond:
216 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
217 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
218 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
219 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
220 // CHECK1: omp.inner.for.body:
221 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4
222 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
223 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
224 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
225 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !4
226 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
227 // CHECK1: omp.inner.for.inc:
228 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
229 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4
230 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
231 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
232 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
233 // CHECK1: omp.inner.for.end:
234 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
235 // CHECK1: omp.loop.exit:
236 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
237 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
238 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
239 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
240 // CHECK1: .omp.final.then:
241 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
242 // CHECK1-NEXT: store i32 456, i32* [[J]], align 4
243 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
244 // CHECK1: .omp.final.done:
245 // CHECK1-NEXT: ret void
246 //
247 //
248 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
249 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
250 // CHECK1-NEXT: entry:
251 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
252 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
253 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
254 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
255 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
256 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
258 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
259 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
260 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
261 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
262 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
263 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
264 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
265 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
266 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
267 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
268 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
269 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
270 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
271 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
272 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
273 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
274 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
275 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
276 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
277 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
278 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
279 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
280 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
281 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
282 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
283 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
284 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
285 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
286 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
287 // CHECK1: cond.true:
288 // CHECK1-NEXT: br label [[COND_END:%.*]]
289 // CHECK1: cond.false:
290 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
291 // CHECK1-NEXT: br label [[COND_END]]
292 // CHECK1: cond.end:
293 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
294 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
295 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
296 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
297 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
298 // CHECK1: omp.inner.for.cond:
299 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
300 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
301 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
302 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
303 // CHECK1: omp.inner.for.body:
304 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
305 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
306 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
307 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
308 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
309 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
310 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
311 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456
312 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456
313 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
314 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
315 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
316 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4, !llvm.access.group !8
317 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
318 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
319 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
320 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
321 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !8
322 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
323 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
324 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4, !llvm.access.group !8
325 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
326 // CHECK1: omp.body.continue:
327 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
328 // CHECK1: omp.inner.for.inc:
329 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
330 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
331 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
332 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
333 // CHECK1: omp.inner.for.end:
334 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
335 // CHECK1: omp.loop.exit:
336 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
337 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
338 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
339 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
340 // CHECK1: .omp.final.then:
341 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
342 // CHECK1-NEXT: store i32 456, i32* [[J]], align 4
343 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
344 // CHECK1: .omp.final.done:
345 // CHECK1-NEXT: ret void
346 //
347 //
348 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
349 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
350 // CHECK1-NEXT: entry:
351 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
352 // CHECK1-NEXT: ret void
353 //
354 //
355 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
356 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
357 // CHECK3-NEXT: entry:
358 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
359 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
360 // CHECK3-NEXT: ret i32 [[CALL]]
361 //
362 //
363 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
364 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
365 // CHECK3-NEXT: entry:
366 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
367 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
368 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
369 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
370 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
371 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
372 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
373 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
374 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
375 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
376 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
377 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
378 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
379 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
380 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
381 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
382 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
383 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
384 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
385 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
386 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
387 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
388 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
389 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
390 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
391 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
392 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
393 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
394 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
395 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
396 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
397 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
398 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
399 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
400 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
401 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
402 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
403 // CHECK3-NEXT: store i64 56088, i64* [[TMP15]], align 8
404 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
405 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
406 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
407 // CHECK3: omp_offload.failed:
408 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
409 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
410 // CHECK3: omp_offload.cont:
411 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
412 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
413 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
414 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
415 // CHECK3-NEXT: ret i32 [[TMP18]]
416 //
417 //
418 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
419 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
420 // CHECK3-NEXT: entry:
421 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
422 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
423 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
424 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
425 // CHECK3-NEXT: ret void
426 //
427 //
428 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
429 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
430 // CHECK3-NEXT: entry:
431 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
432 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
433 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
434 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
435 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
436 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
437 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
438 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
439 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
440 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
441 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
442 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
443 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
444 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
445 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
446 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
447 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
448 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
449 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
450 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
451 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
452 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
453 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
454 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
455 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
456 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
457 // CHECK3: cond.true:
458 // CHECK3-NEXT: br label [[COND_END:%.*]]
459 // CHECK3: cond.false:
460 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
461 // CHECK3-NEXT: br label [[COND_END]]
462 // CHECK3: cond.end:
463 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
464 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
465 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
466 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
467 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
468 // CHECK3: omp.inner.for.cond:
469 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
470 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
471 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
472 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
473 // CHECK3: omp.inner.for.body:
474 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5
475 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
476 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !5
477 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
478 // CHECK3: omp.inner.for.inc:
479 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
480 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5
481 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
482 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
483 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
484 // CHECK3: omp.inner.for.end:
485 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
486 // CHECK3: omp.loop.exit:
487 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
488 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
489 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
490 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
491 // CHECK3: .omp.final.then:
492 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
493 // CHECK3-NEXT: store i32 456, i32* [[J]], align 4
494 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
495 // CHECK3: .omp.final.done:
496 // CHECK3-NEXT: ret void
497 //
498 //
499 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
500 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
501 // CHECK3-NEXT: entry:
502 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
503 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
504 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
505 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
506 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
507 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
508 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
509 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
510 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
511 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
512 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
513 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
514 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
515 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
516 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
517 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
518 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
519 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
520 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
521 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
522 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
523 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
524 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
525 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
526 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
527 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
528 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
529 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
530 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
531 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
532 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
533 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
534 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
535 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
536 // CHECK3: cond.true:
537 // CHECK3-NEXT: br label [[COND_END:%.*]]
538 // CHECK3: cond.false:
539 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
540 // CHECK3-NEXT: br label [[COND_END]]
541 // CHECK3: cond.end:
542 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
543 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
544 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
545 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
546 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
547 // CHECK3: omp.inner.for.cond:
548 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
549 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
550 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
551 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
552 // CHECK3: omp.inner.for.body:
553 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
554 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
555 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
556 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
557 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
558 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
559 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
560 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456
561 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
562 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
563 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
564 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
565 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !9
566 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
567 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
568 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]]
569 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !9
570 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
571 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !9
572 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
573 // CHECK3: omp.body.continue:
574 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
575 // CHECK3: omp.inner.for.inc:
576 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
577 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
578 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
579 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
580 // CHECK3: omp.inner.for.end:
581 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
582 // CHECK3: omp.loop.exit:
583 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
584 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
585 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
586 // CHECK3-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
587 // CHECK3: .omp.final.then:
588 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
589 // CHECK3-NEXT: store i32 456, i32* [[J]], align 4
590 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
591 // CHECK3: .omp.final.done:
592 // CHECK3-NEXT: ret void
593 //
594 //
595 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
596 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
597 // CHECK3-NEXT: entry:
598 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
599 // CHECK3-NEXT: ret void
600 //
601 //
602 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
603 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
604 // CHECK5-NEXT: entry:
605 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
606 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
607 // CHECK5-NEXT: ret i32 [[CALL]]
608 //
609 //
610 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
611 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
612 // CHECK5-NEXT: entry:
613 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
614 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
615 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
616 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
617 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
618 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
619 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
620 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
621 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
622 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
623 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
624 // CHECK5-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
625 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
626 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
627 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
628 // CHECK5: omp.inner.for.cond:
629 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
630 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
631 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
632 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
633 // CHECK5: omp.inner.for.body:
634 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
635 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
636 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
637 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
638 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
639 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
640 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
641 // CHECK5-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
642 // CHECK5-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
643 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
644 // CHECK5-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
645 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
646 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !2
647 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
648 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
649 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
650 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
651 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !2
652 // CHECK5-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64
653 // CHECK5-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
654 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4, !llvm.access.group !2
655 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
656 // CHECK5: omp.body.continue:
657 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
658 // CHECK5: omp.inner.for.inc:
659 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
660 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1
661 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
662 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
663 // CHECK5: omp.inner.for.end:
664 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
665 // CHECK5-NEXT: store i32 456, i32* [[J]], align 4
666 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
667 // CHECK5-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A10]], i64 0, i64 0
668 // CHECK5-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX11]], i64 0, i64 0
669 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
670 // CHECK5-NEXT: ret i32 [[TMP9]]
671 //
672 //
673 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
674 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
675 // CHECK7-NEXT: entry:
676 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
677 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
678 // CHECK7-NEXT: ret i32 [[CALL]]
679 //
680 //
681 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
682 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
683 // CHECK7-NEXT: entry:
684 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
685 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
686 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
687 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
688 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
689 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
690 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
691 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
692 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
693 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
694 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
695 // CHECK7-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
696 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
697 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
698 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
699 // CHECK7: omp.inner.for.cond:
700 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
701 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
702 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
703 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
704 // CHECK7: omp.inner.for.body:
705 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
706 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
707 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
708 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
709 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
710 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
711 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
712 // CHECK7-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
713 // CHECK7-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
714 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
715 // CHECK7-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
716 // CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
717 // CHECK7-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !3
718 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
719 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
720 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP6]]
721 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !3
722 // CHECK7-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
723 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !3
724 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
725 // CHECK7: omp.body.continue:
726 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
727 // CHECK7: omp.inner.for.inc:
728 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
729 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
730 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
731 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
732 // CHECK7: omp.inner.for.end:
733 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
734 // CHECK7-NEXT: store i32 456, i32* [[J]], align 4
735 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
736 // CHECK7-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A9]], i32 0, i32 0
737 // CHECK7-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX10]], i32 0, i32 0
738 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
739 // CHECK7-NEXT: ret i32 [[TMP9]]
740 //
741 //
742 // CHECK9-LABEL: define {{[^@]+}}@main
743 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
744 // CHECK9-NEXT: entry:
745 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
746 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
747 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
748 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
749 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4
750 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
751 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
752 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
753 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
754 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
755 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
756 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
757 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
758 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
759 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
760 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
761 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
762 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
763 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
764 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
765 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
766 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
767 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
768 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4
769 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
770 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
771 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
772 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
773 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
774 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
775 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
776 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
777 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
778 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
779 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
780 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
781 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
782 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
783 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
784 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
785 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
786 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
787 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
788 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
789 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
790 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false)
791 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
792 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
793 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8
794 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
795 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
796 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8
797 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
798 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
799 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
800 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
801 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
802 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
803 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
804 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
805 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
806 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
807 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
808 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64*
809 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8
810 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
811 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
812 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8
813 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
814 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8
815 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
816 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
817 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8
818 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
819 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
820 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
821 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
822 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8
823 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
824 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32**
825 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8
826 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
827 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
828 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8
829 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
830 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8
831 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
832 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8
833 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
834 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
835 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
836 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4
837 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4
838 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
839 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4
840 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
841 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0
842 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
843 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
844 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
845 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0
846 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
847 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
848 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
849 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
850 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
851 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
852 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1
853 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
854 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
855 // CHECK9-NEXT: store i32 1, i32* [[TMP47]], align 4
856 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
857 // CHECK9-NEXT: store i32 5, i32* [[TMP48]], align 4
858 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
859 // CHECK9-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 8
860 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
861 // CHECK9-NEXT: store i8** [[TMP40]], i8*** [[TMP50]], align 8
862 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
863 // CHECK9-NEXT: store i64* [[TMP41]], i64** [[TMP51]], align 8
864 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
865 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP52]], align 8
866 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
867 // CHECK9-NEXT: store i8** null, i8*** [[TMP53]], align 8
868 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
869 // CHECK9-NEXT: store i8** null, i8*** [[TMP54]], align 8
870 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
871 // CHECK9-NEXT: store i64 [[ADD]], i64* [[TMP55]], align 8
872 // CHECK9-NEXT: [[TMP56:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
873 // CHECK9-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0
874 // CHECK9-NEXT: br i1 [[TMP57]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
875 // CHECK9: omp_offload.failed:
876 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
877 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
878 // CHECK9: omp_offload.cont:
879 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
880 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP58]])
881 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
882 // CHECK9-NEXT: [[TMP59:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
883 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP59]])
884 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[RETVAL]], align 4
885 // CHECK9-NEXT: ret i32 [[TMP60]]
886 //
887 //
888 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
889 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
890 // CHECK9-NEXT: entry:
891 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
892 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
893 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
894 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
895 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
896 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
897 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
898 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
899 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
900 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
901 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
902 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
903 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
904 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
905 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
906 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
907 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
908 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
909 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
910 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
911 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
912 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
913 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
914 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
915 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
916 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
917 // CHECK9-NEXT: ret void
918 //
919 //
920 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
921 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
922 // CHECK9-NEXT: entry:
923 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
924 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
925 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
926 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
927 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
928 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
929 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
930 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
931 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
932 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
933 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
934 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
935 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
936 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
937 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
938 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
939 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
940 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
941 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
942 // CHECK9-NEXT: [[I13:%.*]] = alloca i32, align 4
943 // CHECK9-NEXT: [[J14:%.*]] = alloca i32, align 4
944 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
945 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
946 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
947 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
948 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
949 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
950 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
951 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
952 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
953 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
954 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
955 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
956 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
957 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
958 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
959 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
960 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
961 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
962 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
963 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
964 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
965 // CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
966 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
967 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
968 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
969 // CHECK9-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
970 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
971 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
972 // CHECK9-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
973 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
974 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
975 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
976 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
977 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
978 // CHECK9: land.lhs.true:
979 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
980 // CHECK9-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
981 // CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
982 // CHECK9: omp.precond.then:
983 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
984 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
985 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
986 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
987 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
988 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
989 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
990 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
991 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
992 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
993 // CHECK9-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
994 // CHECK9-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
995 // CHECK9: cond.true:
996 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
997 // CHECK9-NEXT: br label [[COND_END:%.*]]
998 // CHECK9: cond.false:
999 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1000 // CHECK9-NEXT: br label [[COND_END]]
1001 // CHECK9: cond.end:
1002 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
1003 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1004 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1005 // CHECK9-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
1006 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1007 // CHECK9: omp.inner.for.cond:
1008 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !5
1009 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !5
1010 // CHECK9-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
1011 // CHECK9-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1012 // CHECK9: omp.inner.for.body:
1013 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8, !llvm.access.group !5
1014 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !5
1015 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !5
1016 // CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1017 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4, !llvm.access.group !5
1018 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !5
1019 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 4, !llvm.access.group !5
1020 // CHECK9-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1021 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4, !llvm.access.group !5
1022 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8, !llvm.access.group !5
1023 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP19]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP24]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !5
1024 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1025 // CHECK9: omp.inner.for.inc:
1026 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !5
1027 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8, !llvm.access.group !5
1028 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
1029 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !5
1030 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1031 // CHECK9: omp.inner.for.end:
1032 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1033 // CHECK9: omp.loop.exit:
1034 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1035 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
1036 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
1037 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1038 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1039 // CHECK9-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1040 // CHECK9: .omp.final.then:
1041 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1042 // CHECK9-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP31]], 0
1043 // CHECK9-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
1044 // CHECK9-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
1045 // CHECK9-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
1046 // CHECK9-NEXT: store i32 [[ADD22]], i32* [[I13]], align 4
1047 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1048 // CHECK9-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP32]], 0
1049 // CHECK9-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1
1050 // CHECK9-NEXT: [[MUL25:%.*]] = mul nsw i32 [[DIV24]], 1
1051 // CHECK9-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
1052 // CHECK9-NEXT: store i32 [[ADD26]], i32* [[J14]], align 4
1053 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1054 // CHECK9: .omp.final.done:
1055 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1056 // CHECK9: omp.precond.end:
1057 // CHECK9-NEXT: ret void
1058 //
1059 //
1060 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1061 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1062 // CHECK9-NEXT: entry:
1063 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1064 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1065 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1066 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1067 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1068 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1069 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1070 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1071 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1072 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1073 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1074 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1075 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1076 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
1077 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
1078 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1079 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1080 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1081 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1082 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1083 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1084 // CHECK9-NEXT: [[I13:%.*]] = alloca i32, align 4
1085 // CHECK9-NEXT: [[J14:%.*]] = alloca i32, align 4
1086 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1087 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1088 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1089 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1090 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1091 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1092 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1093 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1094 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1095 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1096 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1097 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1098 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1099 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1100 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
1101 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1102 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
1103 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
1104 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1105 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1106 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1107 // CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
1108 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1109 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
1110 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1111 // CHECK9-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
1112 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
1113 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
1114 // CHECK9-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
1115 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1116 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
1117 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1118 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1119 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1120 // CHECK9: land.lhs.true:
1121 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1122 // CHECK9-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
1123 // CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1124 // CHECK9: omp.precond.then:
1125 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1126 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1127 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
1128 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1129 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1130 // CHECK9-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_LB]], align 8
1131 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
1132 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1133 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1134 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1135 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1136 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1137 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1138 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1139 // CHECK9-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1140 // CHECK9-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1141 // CHECK9: cond.true:
1142 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1143 // CHECK9-NEXT: br label [[COND_END:%.*]]
1144 // CHECK9: cond.false:
1145 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1146 // CHECK9-NEXT: br label [[COND_END]]
1147 // CHECK9: cond.end:
1148 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1149 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1150 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1151 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1152 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1153 // CHECK9: omp.inner.for.cond:
1154 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1155 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !9
1156 // CHECK9-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1157 // CHECK9-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1158 // CHECK9: omp.inner.for.body:
1159 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1160 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4, !llvm.access.group !9
1161 // CHECK9-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
1162 // CHECK9-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
1163 // CHECK9-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
1164 // CHECK9-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
1165 // CHECK9-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
1166 // CHECK9-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
1167 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
1168 // CHECK9-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
1169 // CHECK9-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4, !llvm.access.group !9
1170 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1171 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1172 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4, !llvm.access.group !9
1173 // CHECK9-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
1174 // CHECK9-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
1175 // CHECK9-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
1176 // CHECK9-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
1177 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
1178 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4, !llvm.access.group !9
1179 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
1180 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
1181 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
1182 // CHECK9-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
1183 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
1184 // CHECK9-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
1185 // CHECK9-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
1186 // CHECK9-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
1187 // CHECK9-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
1188 // CHECK9-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4, !llvm.access.group !9
1189 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4, !llvm.access.group !9
1190 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64
1191 // CHECK9-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]]
1192 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP28]]
1193 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4, !llvm.access.group !9
1194 // CHECK9-NEXT: [[IDXPROM38:%.*]] = sext i32 [[TMP29]] to i64
1195 // CHECK9-NEXT: [[ARRAYIDX39:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM38]]
1196 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX39]], align 4, !llvm.access.group !9
1197 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1198 // CHECK9: omp.body.continue:
1199 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1200 // CHECK9: omp.inner.for.inc:
1201 // CHECK9-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1202 // CHECK9-NEXT: [[ADD40:%.*]] = add nsw i64 [[TMP30]], 1
1203 // CHECK9-NEXT: store i64 [[ADD40]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1204 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1205 // CHECK9: omp.inner.for.end:
1206 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1207 // CHECK9: omp.loop.exit:
1208 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1209 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1210 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
1211 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1212 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1213 // CHECK9-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1214 // CHECK9: .omp.final.then:
1215 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1216 // CHECK9-NEXT: [[SUB41:%.*]] = sub nsw i32 [[TMP35]], 0
1217 // CHECK9-NEXT: [[DIV42:%.*]] = sdiv i32 [[SUB41]], 1
1218 // CHECK9-NEXT: [[MUL43:%.*]] = mul nsw i32 [[DIV42]], 1
1219 // CHECK9-NEXT: [[ADD44:%.*]] = add nsw i32 0, [[MUL43]]
1220 // CHECK9-NEXT: store i32 [[ADD44]], i32* [[I13]], align 4
1221 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1222 // CHECK9-NEXT: [[SUB45:%.*]] = sub nsw i32 [[TMP36]], 0
1223 // CHECK9-NEXT: [[DIV46:%.*]] = sdiv i32 [[SUB45]], 1
1224 // CHECK9-NEXT: [[MUL47:%.*]] = mul nsw i32 [[DIV46]], 1
1225 // CHECK9-NEXT: [[ADD48:%.*]] = add nsw i32 0, [[MUL47]]
1226 // CHECK9-NEXT: store i32 [[ADD48]], i32* [[J14]], align 4
1227 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1228 // CHECK9: .omp.final.done:
1229 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1230 // CHECK9: omp.precond.end:
1231 // CHECK9-NEXT: ret void
1232 //
1233 //
1234 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1235 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1236 // CHECK9-NEXT: entry:
1237 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1238 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1239 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1240 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1241 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1242 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1243 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1244 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1245 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1246 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1247 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
1248 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1249 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1250 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
1251 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1252 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1253 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1254 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1255 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1256 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1257 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4
1258 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1259 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
1260 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1261 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
1262 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1263 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
1264 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1265 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 8
1266 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1267 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 8
1268 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1269 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
1270 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1271 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
1272 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1273 // CHECK9-NEXT: store i64 20, i64* [[TMP15]], align 8
1274 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1275 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1276 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1277 // CHECK9: omp_offload.failed:
1278 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1279 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1280 // CHECK9: omp_offload.cont:
1281 // CHECK9-NEXT: ret i32 0
1282 //
1283 //
1284 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
1285 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1286 // CHECK9-NEXT: entry:
1287 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1288 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1289 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1290 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1291 // CHECK9-NEXT: ret void
1292 //
1293 //
1294 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
1295 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1296 // CHECK9-NEXT: entry:
1297 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1298 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1299 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1300 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1301 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1302 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1303 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1304 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1305 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1306 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1307 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1308 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1309 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1310 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1311 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1312 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1313 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1314 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
1315 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1316 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1317 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1318 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1319 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1320 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1321 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1322 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1323 // CHECK9: cond.true:
1324 // CHECK9-NEXT: br label [[COND_END:%.*]]
1325 // CHECK9: cond.false:
1326 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1327 // CHECK9-NEXT: br label [[COND_END]]
1328 // CHECK9: cond.end:
1329 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1330 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1331 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1332 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1333 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1334 // CHECK9: omp.inner.for.cond:
1335 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1336 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
1337 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1338 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1339 // CHECK9: omp.inner.for.body:
1340 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
1341 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1342 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
1343 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1344 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]), !llvm.access.group !14
1345 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1346 // CHECK9: omp.inner.for.inc:
1347 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1348 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
1349 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1350 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1351 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1352 // CHECK9: omp.inner.for.end:
1353 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1354 // CHECK9: omp.loop.exit:
1355 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1356 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1357 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1358 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1359 // CHECK9: .omp.final.then:
1360 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
1361 // CHECK9-NEXT: store i32 2, i32* [[J]], align 4
1362 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1363 // CHECK9: .omp.final.done:
1364 // CHECK9-NEXT: ret void
1365 //
1366 //
1367 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
1368 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1369 // CHECK9-NEXT: entry:
1370 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1371 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1372 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1373 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1374 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1375 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1376 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1377 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1378 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1379 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1380 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1381 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1382 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1383 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1384 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1385 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1386 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1387 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1388 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1389 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1390 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1391 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
1392 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1393 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1394 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1395 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
1396 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1397 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1398 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1399 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1400 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1401 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1402 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1403 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1404 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
1405 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1406 // CHECK9: cond.true:
1407 // CHECK9-NEXT: br label [[COND_END:%.*]]
1408 // CHECK9: cond.false:
1409 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1410 // CHECK9-NEXT: br label [[COND_END]]
1411 // CHECK9: cond.end:
1412 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1413 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1414 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1415 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1416 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1417 // CHECK9: omp.inner.for.cond:
1418 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1419 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
1420 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1421 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1422 // CHECK9: omp.inner.for.body:
1423 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1424 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
1425 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1426 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1427 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
1428 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1429 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1430 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2
1431 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2
1432 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
1433 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
1434 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
1435 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4, !llvm.access.group !17
1436 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17
1437 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1438 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1439 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !17
1440 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
1441 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
1442 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4, !llvm.access.group !17
1443 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1444 // CHECK9: omp.body.continue:
1445 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1446 // CHECK9: omp.inner.for.inc:
1447 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1448 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
1449 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1450 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1451 // CHECK9: omp.inner.for.end:
1452 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1453 // CHECK9: omp.loop.exit:
1454 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1455 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1456 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1457 // CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1458 // CHECK9: .omp.final.then:
1459 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
1460 // CHECK9-NEXT: store i32 2, i32* [[J]], align 4
1461 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1462 // CHECK9: .omp.final.done:
1463 // CHECK9-NEXT: ret void
1464 //
1465 //
1466 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1467 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1468 // CHECK9-NEXT: entry:
1469 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1470 // CHECK9-NEXT: ret void
1471 //
1472 //
1473 // CHECK11-LABEL: define {{[^@]+}}@main
1474 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1475 // CHECK11-NEXT: entry:
1476 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1477 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1478 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
1479 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
1480 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4
1481 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
1482 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
1483 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
1484 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1485 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1486 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1487 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1488 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1489 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
1490 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1491 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1492 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1493 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1494 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
1495 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1496 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1497 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
1498 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
1499 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4
1500 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1501 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
1502 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
1503 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
1504 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
1505 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
1506 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
1507 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
1508 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
1509 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
1510 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
1511 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
1512 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
1513 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
1514 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
1515 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
1516 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
1517 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
1518 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false)
1519 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1520 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1521 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4
1522 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1523 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1524 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4
1525 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1526 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
1527 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1528 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
1529 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
1530 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1531 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
1532 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
1533 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1534 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
1535 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1536 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
1537 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4
1538 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1539 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
1540 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4
1541 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1542 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
1543 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1544 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32*
1545 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4
1546 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1547 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1548 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
1549 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1550 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4
1551 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1552 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32**
1553 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4
1554 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1555 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32**
1556 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4
1557 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
1558 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4
1559 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1560 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4
1561 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1562 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1563 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1564 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
1565 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4
1566 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4
1567 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1568 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1569 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0
1570 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1571 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1572 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1573 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0
1574 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
1575 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
1576 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
1577 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
1578 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
1579 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1580 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1
1581 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1582 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1583 // CHECK11-NEXT: store i32 1, i32* [[TMP46]], align 4
1584 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1585 // CHECK11-NEXT: store i32 5, i32* [[TMP47]], align 4
1586 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1587 // CHECK11-NEXT: store i8** [[TMP38]], i8*** [[TMP48]], align 4
1588 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1589 // CHECK11-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 4
1590 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1591 // CHECK11-NEXT: store i64* [[TMP40]], i64** [[TMP50]], align 4
1592 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1593 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP51]], align 4
1594 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1595 // CHECK11-NEXT: store i8** null, i8*** [[TMP52]], align 4
1596 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1597 // CHECK11-NEXT: store i8** null, i8*** [[TMP53]], align 4
1598 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1599 // CHECK11-NEXT: store i64 [[ADD]], i64* [[TMP54]], align 8
1600 // CHECK11-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1601 // CHECK11-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0
1602 // CHECK11-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1603 // CHECK11: omp_offload.failed:
1604 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1605 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1606 // CHECK11: omp_offload.cont:
1607 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1608 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP57]])
1609 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1610 // CHECK11-NEXT: [[TMP58:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
1611 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP58]])
1612 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, i32* [[RETVAL]], align 4
1613 // CHECK11-NEXT: ret i32 [[TMP59]]
1614 //
1615 //
1616 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
1617 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1618 // CHECK11-NEXT: entry:
1619 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1620 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1621 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1622 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1623 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1624 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1625 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1626 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1627 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1628 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1629 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1630 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1631 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1632 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1633 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1634 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
1635 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
1636 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
1637 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[M_ADDR]], align 4
1638 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[M_CASTED]], align 4
1639 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M_CASTED]], align 4
1640 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
1641 // CHECK11-NEXT: ret void
1642 //
1643 //
1644 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
1645 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1646 // CHECK11-NEXT: entry:
1647 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1648 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1649 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1650 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1651 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1652 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1653 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1654 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1655 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1656 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1657 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1658 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1659 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1660 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1661 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1662 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
1663 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
1664 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1665 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1666 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4
1667 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4
1668 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1669 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1670 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1671 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1672 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1673 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1674 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1675 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1676 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1677 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1678 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1679 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1680 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
1681 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1682 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
1683 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1684 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1685 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1686 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1687 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1688 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1689 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
1690 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1691 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1692 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1693 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1694 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1695 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
1696 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
1697 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1698 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1699 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1700 // CHECK11: land.lhs.true:
1701 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1702 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
1703 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1704 // CHECK11: omp.precond.then:
1705 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
1706 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1707 // CHECK11-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
1708 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1709 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1710 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1711 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
1712 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1713 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1714 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1715 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
1716 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1717 // CHECK11: cond.true:
1718 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1719 // CHECK11-NEXT: br label [[COND_END:%.*]]
1720 // CHECK11: cond.false:
1721 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1722 // CHECK11-NEXT: br label [[COND_END]]
1723 // CHECK11: cond.end:
1724 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
1725 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1726 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1727 // CHECK11-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
1728 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1729 // CHECK11: omp.inner.for.cond:
1730 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !6
1731 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !6
1732 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
1733 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1734 // CHECK11: omp.inner.for.body:
1735 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8, !llvm.access.group !6
1736 // CHECK11-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
1737 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !6
1738 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
1739 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !6
1740 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[N_CASTED]], align 4, !llvm.access.group !6
1741 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !6
1742 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[M_ADDR]], align 4, !llvm.access.group !6
1743 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[M_CASTED]], align 4, !llvm.access.group !6
1744 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[M_CASTED]], align 4, !llvm.access.group !6
1745 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP20]], i32 [[TMP22]], i32 [[TMP24]], i32 [[TMP26]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]), !llvm.access.group !6
1746 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1747 // CHECK11: omp.inner.for.inc:
1748 // CHECK11-NEXT: [[TMP27:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !6
1749 // CHECK11-NEXT: [[TMP28:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8, !llvm.access.group !6
1750 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP27]], [[TMP28]]
1751 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !6
1752 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1753 // CHECK11: omp.inner.for.end:
1754 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1755 // CHECK11: omp.loop.exit:
1756 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1757 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
1758 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
1759 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1760 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1761 // CHECK11-NEXT: br i1 [[TMP32]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1762 // CHECK11: .omp.final.then:
1763 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1764 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP33]], 0
1765 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1766 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
1767 // CHECK11-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
1768 // CHECK11-NEXT: store i32 [[ADD18]], i32* [[I11]], align 4
1769 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1770 // CHECK11-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP34]], 0
1771 // CHECK11-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
1772 // CHECK11-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
1773 // CHECK11-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
1774 // CHECK11-NEXT: store i32 [[ADD22]], i32* [[J12]], align 4
1775 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
1776 // CHECK11: .omp.final.done:
1777 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1778 // CHECK11: omp.precond.end:
1779 // CHECK11-NEXT: ret void
1780 //
1781 //
1782 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
1783 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1784 // CHECK11-NEXT: entry:
1785 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1786 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1787 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1788 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1789 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1790 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1791 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1792 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1793 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1794 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1795 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1796 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1797 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1798 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1799 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1800 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1801 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1802 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1803 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1804 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1805 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1806 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4
1807 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4
1808 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1809 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1810 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1811 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1812 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1813 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1814 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1815 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1816 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1817 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1818 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1819 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1820 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
1821 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1822 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
1823 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1824 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1825 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1826 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1827 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1828 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1829 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
1830 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1831 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1832 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1833 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1834 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1835 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
1836 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
1837 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1838 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1839 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1840 // CHECK11: land.lhs.true:
1841 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1842 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
1843 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1844 // CHECK11: omp.precond.then:
1845 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1846 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1847 // CHECK11-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
1848 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1849 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP10]] to i64
1850 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1851 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP11]] to i64
1852 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8
1853 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8
1854 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1855 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1856 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1857 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1858 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1859 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1860 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1861 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1862 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1863 // CHECK11: cond.true:
1864 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1865 // CHECK11-NEXT: br label [[COND_END:%.*]]
1866 // CHECK11: cond.false:
1867 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1868 // CHECK11-NEXT: br label [[COND_END]]
1869 // CHECK11: cond.end:
1870 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1871 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1872 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1873 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1874 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1875 // CHECK11: omp.inner.for.cond:
1876 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1877 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !10
1878 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1879 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1880 // CHECK11: omp.inner.for.body:
1881 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1882 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !10
1883 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
1884 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
1885 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
1886 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
1887 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
1888 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
1889 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
1890 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
1891 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4, !llvm.access.group !10
1892 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1893 // CHECK11-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1894 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !10
1895 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
1896 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
1897 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
1898 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
1899 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
1900 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !10
1901 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
1902 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
1903 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
1904 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
1905 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
1906 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
1907 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
1908 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
1909 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
1910 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4, !llvm.access.group !10
1911 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4, !llvm.access.group !10
1912 // CHECK11-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP1]]
1913 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP28]]
1914 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4, !llvm.access.group !10
1915 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP29]]
1916 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4, !llvm.access.group !10
1917 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1918 // CHECK11: omp.body.continue:
1919 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1920 // CHECK11: omp.inner.for.inc:
1921 // CHECK11-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1922 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP30]], 1
1923 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1924 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1925 // CHECK11: omp.inner.for.end:
1926 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1927 // CHECK11: omp.loop.exit:
1928 // CHECK11-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1929 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1930 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
1931 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1932 // CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1933 // CHECK11-NEXT: br i1 [[TMP34]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1934 // CHECK11: .omp.final.then:
1935 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1936 // CHECK11-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP35]], 0
1937 // CHECK11-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
1938 // CHECK11-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
1939 // CHECK11-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
1940 // CHECK11-NEXT: store i32 [[ADD43]], i32* [[I13]], align 4
1941 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1942 // CHECK11-NEXT: [[SUB44:%.*]] = sub nsw i32 [[TMP36]], 0
1943 // CHECK11-NEXT: [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
1944 // CHECK11-NEXT: [[MUL46:%.*]] = mul nsw i32 [[DIV45]], 1
1945 // CHECK11-NEXT: [[ADD47:%.*]] = add nsw i32 0, [[MUL46]]
1946 // CHECK11-NEXT: store i32 [[ADD47]], i32* [[J14]], align 4
1947 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
1948 // CHECK11: .omp.final.done:
1949 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1950 // CHECK11: omp.precond.end:
1951 // CHECK11-NEXT: ret void
1952 //
1953 //
1954 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1955 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1956 // CHECK11-NEXT: entry:
1957 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1958 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1959 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1960 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1961 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1962 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1963 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1964 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1965 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1966 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1967 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
1968 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1969 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1970 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
1971 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1972 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
1973 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1974 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1975 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1976 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1977 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4
1978 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1979 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
1980 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1981 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1982 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1983 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1984 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1985 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 4
1986 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1987 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 4
1988 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1989 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4
1990 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1991 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
1992 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1993 // CHECK11-NEXT: store i64 20, i64* [[TMP15]], align 8
1994 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1995 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1996 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1997 // CHECK11: omp_offload.failed:
1998 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1999 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2000 // CHECK11: omp_offload.cont:
2001 // CHECK11-NEXT: ret i32 0
2002 //
2003 //
2004 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
2005 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2006 // CHECK11-NEXT: entry:
2007 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
2008 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2009 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2010 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
2011 // CHECK11-NEXT: ret void
2012 //
2013 //
2014 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
2015 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2016 // CHECK11-NEXT: entry:
2017 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2018 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2019 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
2020 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2021 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2022 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2023 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2024 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2025 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2026 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2027 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2028 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2029 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2030 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2031 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2032 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2033 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2034 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
2035 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2036 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2037 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2038 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2039 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2040 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2041 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
2042 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2043 // CHECK11: cond.true:
2044 // CHECK11-NEXT: br label [[COND_END:%.*]]
2045 // CHECK11: cond.false:
2046 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2047 // CHECK11-NEXT: br label [[COND_END]]
2048 // CHECK11: cond.end:
2049 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2050 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2051 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2052 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2053 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2054 // CHECK11: omp.inner.for.cond:
2055 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2056 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
2057 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2058 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2059 // CHECK11: omp.inner.for.body:
2060 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15
2061 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
2062 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]), !llvm.access.group !15
2063 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2064 // CHECK11: omp.inner.for.inc:
2065 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2066 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15
2067 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2068 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2069 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2070 // CHECK11: omp.inner.for.end:
2071 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2072 // CHECK11: omp.loop.exit:
2073 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2074 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2075 // CHECK11-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
2076 // CHECK11-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2077 // CHECK11: .omp.final.then:
2078 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
2079 // CHECK11-NEXT: store i32 2, i32* [[J]], align 4
2080 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2081 // CHECK11: .omp.final.done:
2082 // CHECK11-NEXT: ret void
2083 //
2084 //
2085 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
2086 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2087 // CHECK11-NEXT: entry:
2088 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2089 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2090 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2091 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2092 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
2093 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2094 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2095 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2096 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2097 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2098 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2099 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2100 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2101 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2102 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2103 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2104 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2105 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2106 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2107 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2108 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2109 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2110 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2111 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2112 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2113 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2114 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2115 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2116 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2117 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2118 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2119 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2120 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
2121 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2122 // CHECK11: cond.true:
2123 // CHECK11-NEXT: br label [[COND_END:%.*]]
2124 // CHECK11: cond.false:
2125 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2126 // CHECK11-NEXT: br label [[COND_END]]
2127 // CHECK11: cond.end:
2128 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2129 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2130 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2131 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2132 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2133 // CHECK11: omp.inner.for.cond:
2134 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2135 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
2136 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2137 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2138 // CHECK11: omp.inner.for.body:
2139 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2140 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
2141 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2142 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2143 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
2144 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2145 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2146 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2
2147 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
2148 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
2149 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
2150 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
2151 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !18
2152 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
2153 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]]
2154 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !18
2155 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
2156 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !18
2157 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2158 // CHECK11: omp.body.continue:
2159 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2160 // CHECK11: omp.inner.for.inc:
2161 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2162 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
2163 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2164 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
2165 // CHECK11: omp.inner.for.end:
2166 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2167 // CHECK11: omp.loop.exit:
2168 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2169 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2170 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2171 // CHECK11-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2172 // CHECK11: .omp.final.then:
2173 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
2174 // CHECK11-NEXT: store i32 2, i32* [[J]], align 4
2175 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2176 // CHECK11: .omp.final.done:
2177 // CHECK11-NEXT: ret void
2178 //
2179 //
2180 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2181 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2182 // CHECK11-NEXT: entry:
2183 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2184 // CHECK11-NEXT: ret void
2185 //
2186 //
2187 // CHECK13-LABEL: define {{[^@]+}}@main
2188 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2189 // CHECK13-NEXT: entry:
2190 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2191 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2192 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
2193 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
2194 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
2195 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2196 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2197 // CHECK13-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
2198 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
2199 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2200 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2201 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2202 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
2203 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
2204 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
2205 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
2206 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
2207 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2208 // CHECK13-NEXT: [[I9:%.*]] = alloca i32, align 4
2209 // CHECK13-NEXT: [[J10:%.*]] = alloca i32, align 4
2210 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
2211 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2212 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
2213 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
2214 // CHECK13-NEXT: store i32 2, i32* [[M]], align 4
2215 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2216 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2217 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
2218 // CHECK13-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
2219 // CHECK13-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
2220 // CHECK13-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
2221 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
2222 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
2223 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2224 // CHECK13-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
2225 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
2226 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
2227 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[M]], align 4
2228 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2229 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2230 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP8]], 0
2231 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2232 // CHECK13-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2233 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2234 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP9]], 0
2235 // CHECK13-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2236 // CHECK13-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
2237 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
2238 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
2239 // CHECK13-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
2240 // CHECK13-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
2241 // CHECK13-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
2242 // CHECK13-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_UB]], align 8
2243 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
2244 // CHECK13-NEXT: store i32 0, i32* [[J]], align 4
2245 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2246 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]]
2247 // CHECK13-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
2248 // CHECK13: land.lhs.true:
2249 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2250 // CHECK13-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP12]]
2251 // CHECK13-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
2252 // CHECK13: simd.if.then:
2253 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
2254 // CHECK13-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_IV]], align 8
2255 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2256 // CHECK13: omp.inner.for.cond:
2257 // CHECK13-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2258 // CHECK13-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
2259 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP14]], [[TMP15]]
2260 // CHECK13-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2261 // CHECK13: omp.inner.for.body:
2262 // CHECK13-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2263 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
2264 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP17]], 0
2265 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2266 // CHECK13-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
2267 // CHECK13-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
2268 // CHECK13-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP16]], [[CONV15]]
2269 // CHECK13-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
2270 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
2271 // CHECK13-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
2272 // CHECK13-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !2
2273 // CHECK13-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2274 // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2275 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
2276 // CHECK13-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP20]], 0
2277 // CHECK13-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
2278 // CHECK13-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
2279 // CHECK13-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
2280 // CHECK13-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP19]], [[CONV22]]
2281 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
2282 // CHECK13-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP21]], 0
2283 // CHECK13-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
2284 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
2285 // CHECK13-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
2286 // CHECK13-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
2287 // CHECK13-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP18]], [[MUL28]]
2288 // CHECK13-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
2289 // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
2290 // CHECK13-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
2291 // CHECK13-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !2
2292 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !2
2293 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64
2294 // CHECK13-NEXT: [[TMP23:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
2295 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[TMP23]]
2296 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !2
2297 // CHECK13-NEXT: [[IDXPROM33:%.*]] = sext i32 [[TMP24]] to i64
2298 // CHECK13-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM33]]
2299 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX34]], align 4, !llvm.access.group !2
2300 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2301 // CHECK13: omp.body.continue:
2302 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2303 // CHECK13: omp.inner.for.inc:
2304 // CHECK13-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2305 // CHECK13-NEXT: [[ADD35:%.*]] = add nsw i64 [[TMP25]], 1
2306 // CHECK13-NEXT: store i64 [[ADD35]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2307 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2308 // CHECK13: omp.inner.for.end:
2309 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2310 // CHECK13-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP26]], 0
2311 // CHECK13-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
2312 // CHECK13-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
2313 // CHECK13-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
2314 // CHECK13-NEXT: store i32 [[ADD39]], i32* [[I9]], align 4
2315 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2316 // CHECK13-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP27]], 0
2317 // CHECK13-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
2318 // CHECK13-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
2319 // CHECK13-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
2320 // CHECK13-NEXT: store i32 [[ADD43]], i32* [[J10]], align 4
2321 // CHECK13-NEXT: br label [[SIMD_IF_END]]
2322 // CHECK13: simd.if.end:
2323 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2324 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP28]])
2325 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2326 // CHECK13-NEXT: [[TMP29:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2327 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP29]])
2328 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
2329 // CHECK13-NEXT: ret i32 [[TMP30]]
2330 //
2331 //
2332 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
2333 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
2334 // CHECK13-NEXT: entry:
2335 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2336 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
2337 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
2338 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2339 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2340 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2341 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2342 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
2343 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
2344 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2345 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2346 // CHECK13-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2347 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2348 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2349 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2350 // CHECK13: omp.inner.for.cond:
2351 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2352 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
2353 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2354 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2355 // CHECK13: omp.inner.for.body:
2356 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2357 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
2358 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2359 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2360 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
2361 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2362 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2363 // CHECK13-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
2364 // CHECK13-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
2365 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
2366 // CHECK13-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
2367 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
2368 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !6
2369 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2370 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
2371 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
2372 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !6
2373 // CHECK13-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP7]] to i64
2374 // CHECK13-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM6]]
2375 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !6
2376 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2377 // CHECK13: omp.body.continue:
2378 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2379 // CHECK13: omp.inner.for.inc:
2380 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2381 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
2382 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2383 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2384 // CHECK13: omp.inner.for.end:
2385 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
2386 // CHECK13-NEXT: store i32 2, i32* [[J]], align 4
2387 // CHECK13-NEXT: ret i32 0
2388 //
2389 //
2390 // CHECK15-LABEL: define {{[^@]+}}@main
2391 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2392 // CHECK15-NEXT: entry:
2393 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2394 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2395 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
2396 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
2397 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
2398 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
2399 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2400 // CHECK15-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
2401 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
2402 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2403 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2404 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2405 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
2406 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
2407 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
2408 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
2409 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
2410 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2411 // CHECK15-NEXT: [[I9:%.*]] = alloca i32, align 4
2412 // CHECK15-NEXT: [[J10:%.*]] = alloca i32, align 4
2413 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
2414 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2415 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
2416 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
2417 // CHECK15-NEXT: store i32 2, i32* [[M]], align 4
2418 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2419 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
2420 // CHECK15-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2421 // CHECK15-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
2422 // CHECK15-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2423 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
2424 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2425 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
2426 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
2427 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
2428 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[M]], align 4
2429 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2430 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2431 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0
2432 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2433 // CHECK15-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2434 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2435 // CHECK15-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP7]], 0
2436 // CHECK15-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2437 // CHECK15-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
2438 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
2439 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
2440 // CHECK15-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
2441 // CHECK15-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
2442 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
2443 // CHECK15-NEXT: store i64 [[TMP8]], i64* [[DOTOMP_UB]], align 8
2444 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
2445 // CHECK15-NEXT: store i32 0, i32* [[J]], align 4
2446 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2447 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
2448 // CHECK15-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
2449 // CHECK15: land.lhs.true:
2450 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2451 // CHECK15-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP10]]
2452 // CHECK15-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
2453 // CHECK15: simd.if.then:
2454 // CHECK15-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
2455 // CHECK15-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_IV]], align 8
2456 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2457 // CHECK15: omp.inner.for.cond:
2458 // CHECK15-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2459 // CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !3
2460 // CHECK15-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP12]], [[TMP13]]
2461 // CHECK15-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2462 // CHECK15: omp.inner.for.body:
2463 // CHECK15-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2464 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
2465 // CHECK15-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP15]], 0
2466 // CHECK15-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2467 // CHECK15-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
2468 // CHECK15-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
2469 // CHECK15-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP14]], [[CONV15]]
2470 // CHECK15-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
2471 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
2472 // CHECK15-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
2473 // CHECK15-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !3
2474 // CHECK15-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2475 // CHECK15-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2476 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
2477 // CHECK15-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP18]], 0
2478 // CHECK15-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
2479 // CHECK15-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
2480 // CHECK15-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
2481 // CHECK15-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP17]], [[CONV22]]
2482 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
2483 // CHECK15-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP19]], 0
2484 // CHECK15-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
2485 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
2486 // CHECK15-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
2487 // CHECK15-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
2488 // CHECK15-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP16]], [[MUL28]]
2489 // CHECK15-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
2490 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
2491 // CHECK15-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
2492 // CHECK15-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !3
2493 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !3
2494 // CHECK15-NEXT: [[TMP21:%.*]] = mul nsw i32 [[TMP20]], [[TMP1]]
2495 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
2496 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !3
2497 // CHECK15-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP22]]
2498 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !3
2499 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2500 // CHECK15: omp.body.continue:
2501 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2502 // CHECK15: omp.inner.for.inc:
2503 // CHECK15-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2504 // CHECK15-NEXT: [[ADD34:%.*]] = add nsw i64 [[TMP23]], 1
2505 // CHECK15-NEXT: store i64 [[ADD34]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2506 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2507 // CHECK15: omp.inner.for.end:
2508 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2509 // CHECK15-NEXT: [[SUB35:%.*]] = sub nsw i32 [[TMP24]], 0
2510 // CHECK15-NEXT: [[DIV36:%.*]] = sdiv i32 [[SUB35]], 1
2511 // CHECK15-NEXT: [[MUL37:%.*]] = mul nsw i32 [[DIV36]], 1
2512 // CHECK15-NEXT: [[ADD38:%.*]] = add nsw i32 0, [[MUL37]]
2513 // CHECK15-NEXT: store i32 [[ADD38]], i32* [[I9]], align 4
2514 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2515 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP25]], 0
2516 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
2517 // CHECK15-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
2518 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
2519 // CHECK15-NEXT: store i32 [[ADD42]], i32* [[J10]], align 4
2520 // CHECK15-NEXT: br label [[SIMD_IF_END]]
2521 // CHECK15: simd.if.end:
2522 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2523 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP26]])
2524 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2525 // CHECK15-NEXT: [[TMP27:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
2526 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP27]])
2527 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
2528 // CHECK15-NEXT: ret i32 [[TMP28]]
2529 //
2530 //
2531 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
2532 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
2533 // CHECK15-NEXT: entry:
2534 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2535 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
2536 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
2537 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2538 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2539 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2540 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2541 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
2542 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
2543 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2544 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2545 // CHECK15-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2546 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2547 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2548 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2549 // CHECK15: omp.inner.for.cond:
2550 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2551 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
2552 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2553 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2554 // CHECK15: omp.inner.for.body:
2555 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2556 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
2557 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2558 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2559 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
2560 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2561 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2562 // CHECK15-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
2563 // CHECK15-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
2564 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
2565 // CHECK15-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
2566 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
2567 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !7
2568 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
2569 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i32 0, i32 [[TMP6]]
2570 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !7
2571 // CHECK15-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
2572 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4, !llvm.access.group !7
2573 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2574 // CHECK15: omp.body.continue:
2575 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2576 // CHECK15: omp.inner.for.inc:
2577 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2578 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP8]], 1
2579 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2580 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2581 // CHECK15: omp.inner.for.end:
2582 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
2583 // CHECK15-NEXT: store i32 2, i32* [[J]], align 4
2584 // CHECK15-NEXT: ret i32 0
2585 //
2586