1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 // Test host codegen.
6 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
12
13 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
19
20 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)
21 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
22 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9
23 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
24 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
25 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
26 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11
27 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
29
30 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
31 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK5
32 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
33 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
34 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
35 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK7
36 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
37 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
38
39 #ifdef CK1
40
target_teams_fun(int * g)41 int target_teams_fun(int *g){
42 int n = 1000;
43 int a[1000];
44 int te = n / 128;
45 int th = 128;
46 // discard n_addr
47 // discard capture expressions for te and th
48
49 int i;
50 #pragma omp target teams distribute parallel for simd num_teams(te), thread_limit(th) aligned(a : 8) safelen(16) simdlen(4) linear(i : n)
51 for(i = 0; i < n; i++) {
52 a[i] = 0;
53 }
54
55 {{{
56 #pragma omp target teams distribute parallel for simd is_device_ptr(g) simdlen(8)
57 for(int i = 0; i < n; i++) {
58 a[i] = g[0];
59 }
60 }}}
61
62 // outlined target regions
63
64
65
66
67 return a[0];
68 }
69
70
71 #endif // CK1
72 #endif // HEADER
73 // CHECK1-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
74 // CHECK1-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
75 // CHECK1-NEXT: entry:
76 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
77 // CHECK1-NEXT: [[N:%.*]] = alloca i32, align 4
78 // CHECK1-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
79 // CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4
80 // CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4
81 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
82 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
83 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
84 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
85 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
86 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
87 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED4:%.*]] = alloca i64, align 8
88 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
89 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
90 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
91 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
92 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4
93 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4
94 // CHECK1-NEXT: [[N_CASTED10:%.*]] = alloca i64, align 8
95 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [3 x i8*], align 8
96 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [3 x i8*], align 8
97 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [3 x i8*], align 8
98 // CHECK1-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
99 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
101 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
102 // CHECK1-NEXT: store i32 1000, i32* [[N]], align 4
103 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
104 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
105 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
106 // CHECK1-NEXT: store i32 128, i32* [[TH]], align 4
107 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
108 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
109 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
110 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
111 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
112 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_CASTED]] to i32*
113 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
114 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[I_CASTED]], align 8
115 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
116 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
117 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4
118 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8
119 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
120 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
121 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[CONV3]], align 4
122 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
123 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
124 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED4]] to i32*
125 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[CONV5]], align 4
126 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED4]], align 8
127 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
128 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
129 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP12]], align 8
130 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
131 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
132 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP14]], align 8
133 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
134 // CHECK1-NEXT: store i8* null, i8** [[TMP15]], align 8
135 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
136 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
137 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP17]], align 8
138 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
139 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
140 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP19]], align 8
141 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
142 // CHECK1-NEXT: store i8* null, i8** [[TMP20]], align 8
143 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
144 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [1000 x i32]**
145 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP22]], align 8
146 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
147 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [1000 x i32]**
148 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP24]], align 8
149 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
150 // CHECK1-NEXT: store i8* null, i8** [[TMP25]], align 8
151 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
152 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
153 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[TMP27]], align 8
154 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
155 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
156 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[TMP29]], align 8
157 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
158 // CHECK1-NEXT: store i8* null, i8** [[TMP30]], align 8
159 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
160 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
161 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP32]], align 8
162 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
163 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i64*
164 // CHECK1-NEXT: store i64 [[TMP10]], i64* [[TMP34]], align 8
165 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
166 // CHECK1-NEXT: store i8* null, i8** [[TMP35]], align 8
167 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
168 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
169 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
170 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
171 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[N]], align 4
172 // CHECK1-NEXT: store i32 [[TMP40]], i32* [[DOTCAPTURE_EXPR_6]], align 4
173 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4
174 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP41]], 0
175 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB]], 1
176 // CHECK1-NEXT: [[SUB9:%.*]] = sub nsw i32 [[DIV8]], 1
177 // CHECK1-NEXT: store i32 [[SUB9]], i32* [[DOTCAPTURE_EXPR_7]], align 4
178 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4
179 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP42]], 1
180 // CHECK1-NEXT: [[TMP43:%.*]] = zext i32 [[ADD]] to i64
181 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
182 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
183 // CHECK1-NEXT: store i32 1, i32* [[TMP44]], align 4
184 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
185 // CHECK1-NEXT: store i32 5, i32* [[TMP45]], align 4
186 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
187 // CHECK1-NEXT: store i8** [[TMP36]], i8*** [[TMP46]], align 8
188 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
189 // CHECK1-NEXT: store i8** [[TMP37]], i8*** [[TMP47]], align 8
190 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
191 // CHECK1-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP48]], align 8
192 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
193 // CHECK1-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP49]], align 8
194 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
195 // CHECK1-NEXT: store i8** null, i8*** [[TMP50]], align 8
196 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
197 // CHECK1-NEXT: store i8** null, i8*** [[TMP51]], align 8
198 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
199 // CHECK1-NEXT: store i64 [[TMP43]], i64* [[TMP52]], align 8
200 // CHECK1-NEXT: [[TMP53:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 [[TMP38]], i32 [[TMP39]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
201 // CHECK1-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
202 // CHECK1-NEXT: br i1 [[TMP54]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
203 // CHECK1: omp_offload.failed:
204 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i64 [[TMP4]], i64 [[TMP6]], [1000 x i32]* [[A]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR4:[0-9]+]]
205 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
206 // CHECK1: omp_offload.cont:
207 // CHECK1-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4
208 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[N_CASTED10]] to i32*
209 // CHECK1-NEXT: store i32 [[TMP55]], i32* [[CONV11]], align 4
210 // CHECK1-NEXT: [[TMP56:%.*]] = load i64, i64* [[N_CASTED10]], align 8
211 // CHECK1-NEXT: [[TMP57:%.*]] = load i32*, i32** [[G_ADDR]], align 8
212 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
213 // CHECK1-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i64*
214 // CHECK1-NEXT: store i64 [[TMP56]], i64* [[TMP59]], align 8
215 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
216 // CHECK1-NEXT: [[TMP61:%.*]] = bitcast i8** [[TMP60]] to i64*
217 // CHECK1-NEXT: store i64 [[TMP56]], i64* [[TMP61]], align 8
218 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 0
219 // CHECK1-NEXT: store i8* null, i8** [[TMP62]], align 8
220 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
221 // CHECK1-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to [1000 x i32]**
222 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP64]], align 8
223 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
224 // CHECK1-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to [1000 x i32]**
225 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP66]], align 8
226 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 1
227 // CHECK1-NEXT: store i8* null, i8** [[TMP67]], align 8
228 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 2
229 // CHECK1-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i32**
230 // CHECK1-NEXT: store i32* [[TMP57]], i32** [[TMP69]], align 8
231 // CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 2
232 // CHECK1-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32**
233 // CHECK1-NEXT: store i32* [[TMP57]], i32** [[TMP71]], align 8
234 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 2
235 // CHECK1-NEXT: store i8* null, i8** [[TMP72]], align 8
236 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
237 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
238 // CHECK1-NEXT: [[TMP75:%.*]] = load i32, i32* [[N]], align 4
239 // CHECK1-NEXT: store i32 [[TMP75]], i32* [[DOTCAPTURE_EXPR_16]], align 4
240 // CHECK1-NEXT: [[TMP76:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
241 // CHECK1-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP76]], 0
242 // CHECK1-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
243 // CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
244 // CHECK1-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
245 // CHECK1-NEXT: [[TMP77:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
246 // CHECK1-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP77]], 1
247 // CHECK1-NEXT: [[TMP78:%.*]] = zext i32 [[ADD21]] to i64
248 // CHECK1-NEXT: [[KERNEL_ARGS22:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
249 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 0
250 // CHECK1-NEXT: store i32 1, i32* [[TMP79]], align 4
251 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 1
252 // CHECK1-NEXT: store i32 3, i32* [[TMP80]], align 4
253 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 2
254 // CHECK1-NEXT: store i8** [[TMP73]], i8*** [[TMP81]], align 8
255 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 3
256 // CHECK1-NEXT: store i8** [[TMP74]], i8*** [[TMP82]], align 8
257 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 4
258 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP83]], align 8
259 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 5
260 // CHECK1-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP84]], align 8
261 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 6
262 // CHECK1-NEXT: store i8** null, i8*** [[TMP85]], align 8
263 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 7
264 // CHECK1-NEXT: store i8** null, i8*** [[TMP86]], align 8
265 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]], i32 0, i32 8
266 // CHECK1-NEXT: store i64 [[TMP78]], i64* [[TMP87]], align 8
267 // CHECK1-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS22]])
268 // CHECK1-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
269 // CHECK1-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED23:%.*]], label [[OMP_OFFLOAD_CONT24:%.*]]
270 // CHECK1: omp_offload.failed23:
271 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i64 [[TMP56]], [1000 x i32]* [[A]], i32* [[TMP57]]) #[[ATTR4]]
272 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT24]]
273 // CHECK1: omp_offload.cont24:
274 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
275 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
276 // CHECK1-NEXT: ret i32 [[TMP90]]
277 //
278 //
279 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
280 // CHECK1-SAME: (i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
281 // CHECK1-NEXT: entry:
282 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
283 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
284 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
285 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
286 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
287 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
288 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
289 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
290 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
291 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
292 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
293 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
294 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
295 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
296 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
297 // CHECK1-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
298 // CHECK1-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
299 // CHECK1-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
300 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4
301 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV5]], align 4
302 // CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
303 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
304 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
305 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[CONV6]], align 4
306 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[I_CASTED]], align 8
307 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV3]], align 4
308 // CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED]] to i32*
309 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[CONV7]], align 4
310 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
311 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], i64 [[TMP7]], [1000 x i32]* [[TMP1]])
312 // CHECK1-NEXT: ret void
313 //
314 //
315 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
316 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
317 // CHECK1-NEXT: entry:
318 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
319 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
320 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
321 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
322 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
323 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
324 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
325 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
326 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
327 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
328 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
329 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
330 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
331 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
332 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
333 // CHECK1-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
334 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
335 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
336 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
337 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
338 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
339 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
340 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
341 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
342 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
343 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4
344 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
345 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
346 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
347 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
348 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
349 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
350 // CHECK1-NEXT: store i32 0, i32* [[I4]], align 4
351 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
352 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
353 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
354 // CHECK1: omp.precond.then:
355 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
356 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
357 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
358 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
359 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
360 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
361 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
362 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
363 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
364 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
365 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
366 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
367 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
368 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
369 // CHECK1: cond.true:
370 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
371 // CHECK1-NEXT: br label [[COND_END:%.*]]
372 // CHECK1: cond.false:
373 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
374 // CHECK1-NEXT: br label [[COND_END]]
375 // CHECK1: cond.end:
376 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
377 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
378 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
379 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
380 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
381 // CHECK1: omp.inner.for.cond:
382 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
383 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
384 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
385 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
386 // CHECK1: omp.inner.for.body:
387 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
388 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
389 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
390 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
391 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
392 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[I_CASTED]] to i32*
393 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
394 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[I_CASTED]], align 8
395 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4
396 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[N_CASTED]] to i32*
397 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
398 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
399 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], [1000 x i32]* [[TMP0]])
400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
401 // CHECK1: omp.inner.for.inc:
402 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
403 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
404 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
405 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
406 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
407 // CHECK1: omp.inner.for.end:
408 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
409 // CHECK1: omp.loop.exit:
410 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
411 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
412 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
413 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
414 // CHECK1-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
415 // CHECK1-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
416 // CHECK1: .omp.final.then:
417 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
418 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
419 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
420 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
421 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
422 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[CONV]], align 4
423 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
424 // CHECK1: .omp.final.done:
425 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
426 // CHECK1: omp.precond.end:
427 // CHECK1-NEXT: ret void
428 //
429 //
430 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
431 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
432 // CHECK1-NEXT: entry:
433 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
434 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
435 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
436 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
437 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
438 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
439 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
440 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
443 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
444 // CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4
445 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
446 // CHECK1-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
447 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
448 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
449 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
450 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
451 // CHECK1-NEXT: [[I7:%.*]] = alloca i32, align 4
452 // CHECK1-NEXT: [[I8:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
454 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
455 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
456 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
457 // CHECK1-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
458 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
459 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
460 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
461 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
462 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
463 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4
464 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
465 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
466 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
467 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
468 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
469 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
470 // CHECK1-NEXT: store i32 0, i32* [[I4]], align 4
471 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
472 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
473 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
474 // CHECK1: omp.precond.then:
475 // CHECK1-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
476 // CHECK1-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
477 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
478 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
479 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 4
480 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
481 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
482 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
483 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
484 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
485 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP7]] to i32
486 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
487 // CHECK1-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP8]] to i32
488 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
489 // CHECK1-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
490 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
491 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
492 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
493 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
494 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
495 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
496 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
497 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
498 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
499 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
500 // CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
501 // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
502 // CHECK1: cond.true:
503 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
504 // CHECK1-NEXT: br label [[COND_END:%.*]]
505 // CHECK1: cond.false:
506 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
507 // CHECK1-NEXT: br label [[COND_END]]
508 // CHECK1: cond.end:
509 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
510 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
511 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
512 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
513 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
514 // CHECK1: omp.inner.for.cond:
515 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
516 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
517 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
518 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
519 // CHECK1: omp.inner.for.body:
520 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
521 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
522 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
523 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
524 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I7]], align 4
525 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
526 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
527 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
528 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
529 // CHECK1: omp.body.continue:
530 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
531 // CHECK1: omp.inner.for.inc:
532 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
533 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], 1
534 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
535 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
536 // CHECK1: omp.inner.for.end:
537 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
538 // CHECK1: omp.loop.exit:
539 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
540 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
541 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
542 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
543 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
544 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
545 // CHECK1: .omp.final.then:
546 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
547 // CHECK1-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP27]], 0
548 // CHECK1-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
549 // CHECK1-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
550 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
551 // CHECK1-NEXT: store i32 [[ADD15]], i32* [[CONV]], align 4
552 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
553 // CHECK1: .omp.final.done:
554 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
555 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
556 // CHECK1-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
557 // CHECK1: .omp.linear.pu:
558 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
559 // CHECK1: .omp.linear.pu.done:
560 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
561 // CHECK1: omp.precond.end:
562 // CHECK1-NEXT: ret void
563 //
564 //
565 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
566 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] {
567 // CHECK1-NEXT: entry:
568 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
569 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
570 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
571 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
572 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
573 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
574 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
575 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
576 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
577 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
578 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
579 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
580 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
581 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8
582 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
583 // CHECK1-NEXT: ret void
584 //
585 //
586 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
587 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] {
588 // CHECK1-NEXT: entry:
589 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
590 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
591 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
592 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
593 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
594 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
595 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
596 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
597 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
598 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
599 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
600 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
601 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
602 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
603 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
604 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
605 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
606 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
607 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
608 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
609 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
610 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
611 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
612 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
613 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
614 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
615 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
616 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
617 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
618 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
619 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
620 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
621 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
622 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
623 // CHECK1: omp.precond.then:
624 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
625 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
626 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
627 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
628 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
629 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
630 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
631 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
632 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
633 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
634 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
635 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
636 // CHECK1: cond.true:
637 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
638 // CHECK1-NEXT: br label [[COND_END:%.*]]
639 // CHECK1: cond.false:
640 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
641 // CHECK1-NEXT: br label [[COND_END]]
642 // CHECK1: cond.end:
643 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
644 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
645 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
646 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
647 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
648 // CHECK1: omp.inner.for.cond:
649 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
650 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !11
651 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
652 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
653 // CHECK1: omp.inner.for.body:
654 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !11
655 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
656 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !11
657 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
658 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !11
659 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
660 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4, !llvm.access.group !11
661 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !11
662 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !11
663 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]), !llvm.access.group !11
664 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
665 // CHECK1: omp.inner.for.inc:
666 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
667 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !11
668 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
669 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
670 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
671 // CHECK1: omp.inner.for.end:
672 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
673 // CHECK1: omp.loop.exit:
674 // CHECK1-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
675 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
676 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
677 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
678 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
679 // CHECK1-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
680 // CHECK1: .omp.final.then:
681 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
682 // CHECK1-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
683 // CHECK1-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
684 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
685 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
686 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
687 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
688 // CHECK1: .omp.final.done:
689 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
690 // CHECK1: omp.precond.end:
691 // CHECK1-NEXT: ret void
692 //
693 //
694 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
695 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] {
696 // CHECK1-NEXT: entry:
697 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
698 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
699 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
700 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
701 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
702 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
703 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
704 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
705 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
707 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
708 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
709 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
710 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
711 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
712 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
713 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
714 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
715 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
716 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
717 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
718 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
719 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
720 // CHECK1-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
721 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
722 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
723 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
724 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
725 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
726 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
727 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
728 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
729 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
730 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
731 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
732 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
733 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
734 // CHECK1: omp.precond.then:
735 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
736 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
737 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
738 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
739 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
740 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
741 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
742 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
743 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
744 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
745 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
746 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
747 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
748 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
749 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
750 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
751 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
752 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
753 // CHECK1: cond.true:
754 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
755 // CHECK1-NEXT: br label [[COND_END:%.*]]
756 // CHECK1: cond.false:
757 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
758 // CHECK1-NEXT: br label [[COND_END]]
759 // CHECK1: cond.end:
760 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
761 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
762 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
763 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
764 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
765 // CHECK1: omp.inner.for.cond:
766 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
767 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
768 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
769 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
770 // CHECK1: omp.inner.for.body:
771 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
772 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
773 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
774 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !15
775 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !15
776 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0
777 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
778 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !15
779 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
780 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
781 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4, !llvm.access.group !15
782 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
783 // CHECK1: omp.body.continue:
784 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
785 // CHECK1: omp.inner.for.inc:
786 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
787 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
788 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
789 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
790 // CHECK1: omp.inner.for.end:
791 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
792 // CHECK1: omp.loop.exit:
793 // CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
794 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
795 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
796 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
797 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
798 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
799 // CHECK1: .omp.final.then:
800 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
801 // CHECK1-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
802 // CHECK1-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
803 // CHECK1-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
804 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
805 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[I5]], align 4
806 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
807 // CHECK1: .omp.final.done:
808 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
809 // CHECK1: omp.precond.end:
810 // CHECK1-NEXT: ret void
811 //
812 //
813 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
814 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
815 // CHECK1-NEXT: entry:
816 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
817 // CHECK1-NEXT: ret void
818 //
819 //
820 // CHECK3-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
821 // CHECK3-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
822 // CHECK3-NEXT: entry:
823 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
824 // CHECK3-NEXT: [[N:%.*]] = alloca i32, align 4
825 // CHECK3-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
826 // CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4
827 // CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4
828 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
829 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
830 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
831 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
832 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
833 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
834 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
835 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
836 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
837 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
838 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
839 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
840 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
841 // CHECK3-NEXT: [[N_CASTED7:%.*]] = alloca i32, align 4
842 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x i8*], align 4
843 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x i8*], align 4
844 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x i8*], align 4
845 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
846 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
847 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
848 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
849 // CHECK3-NEXT: store i32 1000, i32* [[N]], align 4
850 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
851 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
852 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
853 // CHECK3-NEXT: store i32 128, i32* [[TH]], align 4
854 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
855 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
856 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
857 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
858 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4
859 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[I_CASTED]], align 4
860 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_CASTED]], align 4
861 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N]], align 4
862 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4
863 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4
864 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
865 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
866 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
867 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
868 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
869 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED2]], align 4
870 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
871 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
872 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP12]], align 4
873 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
874 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
875 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP14]], align 4
876 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
877 // CHECK3-NEXT: store i8* null, i8** [[TMP15]], align 4
878 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
879 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i32*
880 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP17]], align 4
881 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
882 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32*
883 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP19]], align 4
884 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
885 // CHECK3-NEXT: store i8* null, i8** [[TMP20]], align 4
886 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
887 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [1000 x i32]**
888 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP22]], align 4
889 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
890 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to [1000 x i32]**
891 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP24]], align 4
892 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
893 // CHECK3-NEXT: store i8* null, i8** [[TMP25]], align 4
894 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
895 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i32*
896 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP27]], align 4
897 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
898 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i32*
899 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[TMP29]], align 4
900 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
901 // CHECK3-NEXT: store i8* null, i8** [[TMP30]], align 4
902 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
903 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
904 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP32]], align 4
905 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
906 // CHECK3-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32*
907 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[TMP34]], align 4
908 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
909 // CHECK3-NEXT: store i8* null, i8** [[TMP35]], align 4
910 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
911 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
912 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
913 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
914 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[N]], align 4
915 // CHECK3-NEXT: store i32 [[TMP40]], i32* [[DOTCAPTURE_EXPR_3]], align 4
916 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
917 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP41]], 0
918 // CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
919 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
920 // CHECK3-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
921 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
922 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP42]], 1
923 // CHECK3-NEXT: [[TMP43:%.*]] = zext i32 [[ADD]] to i64
924 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
925 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
926 // CHECK3-NEXT: store i32 1, i32* [[TMP44]], align 4
927 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
928 // CHECK3-NEXT: store i32 5, i32* [[TMP45]], align 4
929 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
930 // CHECK3-NEXT: store i8** [[TMP36]], i8*** [[TMP46]], align 4
931 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
932 // CHECK3-NEXT: store i8** [[TMP37]], i8*** [[TMP47]], align 4
933 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
934 // CHECK3-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP48]], align 4
935 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
936 // CHECK3-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP49]], align 4
937 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
938 // CHECK3-NEXT: store i8** null, i8*** [[TMP50]], align 4
939 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
940 // CHECK3-NEXT: store i8** null, i8*** [[TMP51]], align 4
941 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
942 // CHECK3-NEXT: store i64 [[TMP43]], i64* [[TMP52]], align 8
943 // CHECK3-NEXT: [[TMP53:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 [[TMP38]], i32 [[TMP39]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
944 // CHECK3-NEXT: [[TMP54:%.*]] = icmp ne i32 [[TMP53]], 0
945 // CHECK3-NEXT: br i1 [[TMP54]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
946 // CHECK3: omp_offload.failed:
947 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i32 [[TMP4]], i32 [[TMP6]], [1000 x i32]* [[A]], i32 [[TMP8]], i32 [[TMP10]]) #[[ATTR4:[0-9]+]]
948 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
949 // CHECK3: omp_offload.cont:
950 // CHECK3-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4
951 // CHECK3-NEXT: store i32 [[TMP55]], i32* [[N_CASTED7]], align 4
952 // CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[N_CASTED7]], align 4
953 // CHECK3-NEXT: [[TMP57:%.*]] = load i32*, i32** [[G_ADDR]], align 4
954 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
955 // CHECK3-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32*
956 // CHECK3-NEXT: store i32 [[TMP56]], i32* [[TMP59]], align 4
957 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
958 // CHECK3-NEXT: [[TMP61:%.*]] = bitcast i8** [[TMP60]] to i32*
959 // CHECK3-NEXT: store i32 [[TMP56]], i32* [[TMP61]], align 4
960 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
961 // CHECK3-NEXT: store i8* null, i8** [[TMP62]], align 4
962 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
963 // CHECK3-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to [1000 x i32]**
964 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP64]], align 4
965 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
966 // CHECK3-NEXT: [[TMP66:%.*]] = bitcast i8** [[TMP65]] to [1000 x i32]**
967 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[TMP66]], align 4
968 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
969 // CHECK3-NEXT: store i8* null, i8** [[TMP67]], align 4
970 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2
971 // CHECK3-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i32**
972 // CHECK3-NEXT: store i32* [[TMP57]], i32** [[TMP69]], align 4
973 // CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 2
974 // CHECK3-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32**
975 // CHECK3-NEXT: store i32* [[TMP57]], i32** [[TMP71]], align 4
976 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2
977 // CHECK3-NEXT: store i8* null, i8** [[TMP72]], align 4
978 // CHECK3-NEXT: [[TMP73:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
979 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
980 // CHECK3-NEXT: [[TMP75:%.*]] = load i32, i32* [[N]], align 4
981 // CHECK3-NEXT: store i32 [[TMP75]], i32* [[DOTCAPTURE_EXPR_12]], align 4
982 // CHECK3-NEXT: [[TMP76:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4
983 // CHECK3-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP76]], 0
984 // CHECK3-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
985 // CHECK3-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1
986 // CHECK3-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4
987 // CHECK3-NEXT: [[TMP77:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4
988 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP77]], 1
989 // CHECK3-NEXT: [[TMP78:%.*]] = zext i32 [[ADD17]] to i64
990 // CHECK3-NEXT: [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
991 // CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 0
992 // CHECK3-NEXT: store i32 1, i32* [[TMP79]], align 4
993 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 1
994 // CHECK3-NEXT: store i32 3, i32* [[TMP80]], align 4
995 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 2
996 // CHECK3-NEXT: store i8** [[TMP73]], i8*** [[TMP81]], align 4
997 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 3
998 // CHECK3-NEXT: store i8** [[TMP74]], i8*** [[TMP82]], align 4
999 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 4
1000 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP83]], align 4
1001 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 5
1002 // CHECK3-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP84]], align 4
1003 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 6
1004 // CHECK3-NEXT: store i8** null, i8*** [[TMP85]], align 4
1005 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 7
1006 // CHECK3-NEXT: store i8** null, i8*** [[TMP86]], align 4
1007 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 8
1008 // CHECK3-NEXT: store i64 [[TMP78]], i64* [[TMP87]], align 8
1009 // CHECK3-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]])
1010 // CHECK3-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
1011 // CHECK3-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
1012 // CHECK3: omp_offload.failed19:
1013 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i32 [[TMP56]], [1000 x i32]* [[A]], i32* [[TMP57]]) #[[ATTR4]]
1014 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT20]]
1015 // CHECK3: omp_offload.cont20:
1016 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
1017 // CHECK3-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1018 // CHECK3-NEXT: ret i32 [[TMP90]]
1019 //
1020 //
1021 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
1022 // CHECK3-SAME: (i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
1023 // CHECK3-NEXT: entry:
1024 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1025 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1026 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1027 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1028 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
1029 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1030 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1031 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
1032 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1033 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1034 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1035 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1036 // CHECK3-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
1037 // CHECK3-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1038 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
1039 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
1040 // CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1041 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
1042 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[I_CASTED]], align 4
1043 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_CASTED]], align 4
1044 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
1045 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[N_CASTED]], align 4
1046 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_CASTED]], align 4
1047 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], i32 [[TMP7]], [1000 x i32]* [[TMP1]])
1048 // CHECK3-NEXT: ret void
1049 //
1050 //
1051 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1052 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1053 // CHECK3-NEXT: entry:
1054 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1055 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1056 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1057 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1058 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1059 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1060 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1061 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1062 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1063 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1064 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1065 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1066 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1067 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1068 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
1069 // CHECK3-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
1070 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1071 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1072 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1073 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1074 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1075 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1076 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1077 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1078 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1079 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1080 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1081 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1082 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1083 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1084 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4
1085 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1086 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1087 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1088 // CHECK3: omp.precond.then:
1089 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
1090 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
1091 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1092 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1093 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1094 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1095 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1096 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1097 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1098 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1099 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1100 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1101 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1102 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1103 // CHECK3: cond.true:
1104 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1105 // CHECK3-NEXT: br label [[COND_END:%.*]]
1106 // CHECK3: cond.false:
1107 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1108 // CHECK3-NEXT: br label [[COND_END]]
1109 // CHECK3: cond.end:
1110 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1111 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1112 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1113 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1114 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1115 // CHECK3: omp.inner.for.cond:
1116 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1117 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1118 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1119 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1120 // CHECK3: omp.inner.for.body:
1121 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1122 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1123 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I4]], align 4
1124 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[I_CASTED]], align 4
1125 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[I_CASTED]], align 4
1126 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
1127 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
1128 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
1129 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], [1000 x i32]* [[TMP0]])
1130 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1131 // CHECK3: omp.inner.for.inc:
1132 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1133 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1134 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1135 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1136 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1137 // CHECK3: omp.inner.for.end:
1138 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1139 // CHECK3: omp.loop.exit:
1140 // CHECK3-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1141 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
1142 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
1143 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1144 // CHECK3-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1145 // CHECK3-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1146 // CHECK3: .omp.final.then:
1147 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1148 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
1149 // CHECK3-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1150 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
1151 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
1152 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[I_ADDR]], align 4
1153 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1154 // CHECK3: .omp.final.done:
1155 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1156 // CHECK3: omp.precond.end:
1157 // CHECK3-NEXT: ret void
1158 //
1159 //
1160 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1161 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1162 // CHECK3-NEXT: entry:
1163 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1164 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1165 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1166 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1167 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
1168 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1169 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1170 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1171 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1172 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1173 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1174 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1175 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1176 // CHECK3-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
1177 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1178 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1179 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1180 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1181 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
1182 // CHECK3-NEXT: [[I5:%.*]] = alloca i32, align 4
1183 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1184 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1185 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1186 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1187 // CHECK3-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
1188 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1189 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1190 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1191 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1192 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1193 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1194 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1195 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1196 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1197 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1198 // CHECK3-NEXT: store i32 0, i32* [[I3]], align 4
1199 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1200 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1201 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1202 // CHECK3: omp.precond.then:
1203 // CHECK3-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
1204 // CHECK3-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
1205 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
1206 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
1207 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
1208 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
1209 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1210 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1211 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1212 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1213 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1214 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
1215 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
1216 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1217 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1218 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1219 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
1220 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
1221 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1222 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1223 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1224 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1225 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1226 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
1227 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1228 // CHECK3: cond.true:
1229 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1230 // CHECK3-NEXT: br label [[COND_END:%.*]]
1231 // CHECK3: cond.false:
1232 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1233 // CHECK3-NEXT: br label [[COND_END]]
1234 // CHECK3: cond.end:
1235 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
1236 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1237 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1238 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
1239 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1240 // CHECK3: omp.inner.for.cond:
1241 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1242 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1243 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
1244 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1245 // CHECK3: omp.inner.for.body:
1246 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1247 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
1248 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1249 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
1250 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4
1251 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP21]]
1252 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1253 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1254 // CHECK3: omp.body.continue:
1255 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1256 // CHECK3: omp.inner.for.inc:
1257 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1258 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
1259 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
1260 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1261 // CHECK3: omp.inner.for.end:
1262 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1263 // CHECK3: omp.loop.exit:
1264 // CHECK3-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1265 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
1266 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
1267 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1268 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1269 // CHECK3-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1270 // CHECK3: .omp.final.then:
1271 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1272 // CHECK3-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
1273 // CHECK3-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
1274 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
1275 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1276 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[I_ADDR]], align 4
1277 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1278 // CHECK3: .omp.final.done:
1279 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1280 // CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1281 // CHECK3-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1282 // CHECK3: .omp.linear.pu:
1283 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1284 // CHECK3: .omp.linear.pu.done:
1285 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1286 // CHECK3: omp.precond.end:
1287 // CHECK3-NEXT: ret void
1288 //
1289 //
1290 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
1291 // CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] {
1292 // CHECK3-NEXT: entry:
1293 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1294 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1295 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
1296 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1297 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1298 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1299 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
1300 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1301 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1302 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
1303 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
1304 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4
1305 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
1306 // CHECK3-NEXT: ret void
1307 //
1308 //
1309 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1310 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] {
1311 // CHECK3-NEXT: entry:
1312 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1313 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1314 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1315 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1316 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
1317 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1318 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1319 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1320 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1321 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1322 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1323 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1324 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1325 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1326 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1327 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1328 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1329 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1330 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1331 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1332 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
1333 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1334 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1335 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1336 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1337 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1338 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1339 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1340 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1341 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
1342 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1343 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1344 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1345 // CHECK3: omp.precond.then:
1346 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1347 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1348 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1349 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1350 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1351 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1352 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1353 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1354 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1355 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1356 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1357 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1358 // CHECK3: cond.true:
1359 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1360 // CHECK3-NEXT: br label [[COND_END:%.*]]
1361 // CHECK3: cond.false:
1362 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1363 // CHECK3-NEXT: br label [[COND_END]]
1364 // CHECK3: cond.end:
1365 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1366 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1367 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1368 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1369 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1370 // CHECK3: omp.inner.for.cond:
1371 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1372 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
1373 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1374 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1375 // CHECK3: omp.inner.for.body:
1376 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
1377 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
1378 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !12
1379 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group !12
1380 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !12
1381 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !12
1382 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]]), !llvm.access.group !12
1383 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1384 // CHECK3: omp.inner.for.inc:
1385 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1386 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
1387 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1388 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1389 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
1390 // CHECK3: omp.inner.for.end:
1391 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1392 // CHECK3: omp.loop.exit:
1393 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1394 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1395 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1396 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1397 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1398 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1399 // CHECK3: .omp.final.then:
1400 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1401 // CHECK3-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
1402 // CHECK3-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1403 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
1404 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
1405 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
1406 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1407 // CHECK3: .omp.final.done:
1408 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1409 // CHECK3: omp.precond.end:
1410 // CHECK3-NEXT: ret void
1411 //
1412 //
1413 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1414 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR1]] {
1415 // CHECK3-NEXT: entry:
1416 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1417 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1418 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1419 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1420 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1421 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
1422 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
1423 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1424 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1425 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1426 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1427 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1428 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1429 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1430 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1431 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1432 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
1433 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1434 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1435 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1436 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1437 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1438 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
1439 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
1440 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
1441 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
1442 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1443 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1444 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1445 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1446 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1447 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1448 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
1449 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1450 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1451 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1452 // CHECK3: omp.precond.then:
1453 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1454 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1455 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
1456 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1457 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1458 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
1459 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
1460 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1461 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1462 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1463 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1464 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1465 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1466 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1467 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1468 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1469 // CHECK3: cond.true:
1470 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1471 // CHECK3-NEXT: br label [[COND_END:%.*]]
1472 // CHECK3: cond.false:
1473 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1474 // CHECK3-NEXT: br label [[COND_END]]
1475 // CHECK3: cond.end:
1476 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1477 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1478 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1479 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1480 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1481 // CHECK3: omp.inner.for.cond:
1482 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1483 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
1484 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1485 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1486 // CHECK3: omp.inner.for.body:
1487 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1488 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1489 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1490 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
1491 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !16
1492 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0
1493 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
1494 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
1495 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
1496 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4, !llvm.access.group !16
1497 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1498 // CHECK3: omp.body.continue:
1499 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1500 // CHECK3: omp.inner.for.inc:
1501 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1502 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
1503 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
1504 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
1505 // CHECK3: omp.inner.for.end:
1506 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1507 // CHECK3: omp.loop.exit:
1508 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1509 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
1510 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
1511 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1512 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1513 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1514 // CHECK3: .omp.final.then:
1515 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1516 // CHECK3-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
1517 // CHECK3-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1518 // CHECK3-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
1519 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1520 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
1521 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1522 // CHECK3: .omp.final.done:
1523 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1524 // CHECK3: omp.precond.end:
1525 // CHECK3-NEXT: ret void
1526 //
1527 //
1528 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1529 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
1530 // CHECK3-NEXT: entry:
1531 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1532 // CHECK3-NEXT: ret void
1533 //
1534 //
1535 // CHECK5-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
1536 // CHECK5-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
1537 // CHECK5-NEXT: entry:
1538 // CHECK5-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
1539 // CHECK5-NEXT: [[N:%.*]] = alloca i32, align 4
1540 // CHECK5-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
1541 // CHECK5-NEXT: [[TE:%.*]] = alloca i32, align 4
1542 // CHECK5-NEXT: [[TH:%.*]] = alloca i32, align 4
1543 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1544 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1545 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1546 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1547 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1548 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1549 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1550 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1551 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
1552 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1553 // CHECK5-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1554 // CHECK5-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
1555 // CHECK5-NEXT: [[I7:%.*]] = alloca i32, align 4
1556 // CHECK5-NEXT: [[I8:%.*]] = alloca i32, align 4
1557 // CHECK5-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
1558 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
1559 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
1560 // CHECK5-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
1561 // CHECK5-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
1562 // CHECK5-NEXT: [[I23:%.*]] = alloca i32, align 4
1563 // CHECK5-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
1564 // CHECK5-NEXT: [[I27:%.*]] = alloca i32, align 4
1565 // CHECK5-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
1566 // CHECK5-NEXT: store i32 1000, i32* [[N]], align 4
1567 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1568 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1569 // CHECK5-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1570 // CHECK5-NEXT: store i32 128, i32* [[TH]], align 4
1571 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
1572 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1573 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
1574 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1575 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
1576 // CHECK5-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1577 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1578 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1579 // CHECK5-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
1580 // CHECK5-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
1581 // CHECK5-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1582 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1583 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1584 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1585 // CHECK5-NEXT: store i32 0, i32* [[I6]], align 4
1586 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1587 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
1588 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
1589 // CHECK5: simd.if.then:
1590 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1591 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1592 // CHECK5-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
1593 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
1594 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
1595 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
1596 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
1597 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
1598 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1599 // CHECK5: omp.inner.for.cond:
1600 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1601 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1602 // CHECK5-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1603 // CHECK5-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1604 // CHECK5: omp.inner.for.body:
1605 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1606 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1607 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1608 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
1609 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
1610 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1611 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1612 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1613 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1614 // CHECK5: omp.body.continue:
1615 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1616 // CHECK5: omp.inner.for.inc:
1617 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1618 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
1619 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1620 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
1621 // CHECK5: omp.inner.for.end:
1622 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1623 // CHECK5-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
1624 // CHECK5-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1625 // CHECK5-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
1626 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
1627 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
1628 // CHECK5-NEXT: br label [[SIMD_IF_END]]
1629 // CHECK5: simd.if.end:
1630 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
1631 // CHECK5-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
1632 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
1633 // CHECK5-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
1634 // CHECK5-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
1635 // CHECK5-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
1636 // CHECK5-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
1637 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
1638 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
1639 // CHECK5-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
1640 // CHECK5-NEXT: store i32 0, i32* [[I23]], align 4
1641 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
1642 // CHECK5-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
1643 // CHECK5-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END44:%.*]]
1644 // CHECK5: simd.if.then25:
1645 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
1646 // CHECK5-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
1647 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
1648 // CHECK5: omp.inner.for.cond28:
1649 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
1650 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !5
1651 // CHECK5-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
1652 // CHECK5-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
1653 // CHECK5: omp.inner.for.body30:
1654 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
1655 // CHECK5-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
1656 // CHECK5-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
1657 // CHECK5-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !5
1658 // CHECK5-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !5
1659 // CHECK5-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 0
1660 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !5
1661 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !5
1662 // CHECK5-NEXT: [[IDXPROM34:%.*]] = sext i32 [[TMP26]] to i64
1663 // CHECK5-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 [[IDXPROM34]]
1664 // CHECK5-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX35]], align 4, !llvm.access.group !5
1665 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
1666 // CHECK5: omp.body.continue36:
1667 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
1668 // CHECK5: omp.inner.for.inc37:
1669 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
1670 // CHECK5-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP27]], 1
1671 // CHECK5-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !5
1672 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP6:![0-9]+]]
1673 // CHECK5: omp.inner.for.end39:
1674 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
1675 // CHECK5-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP28]], 0
1676 // CHECK5-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
1677 // CHECK5-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
1678 // CHECK5-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
1679 // CHECK5-NEXT: store i32 [[ADD43]], i32* [[I27]], align 4
1680 // CHECK5-NEXT: br label [[SIMD_IF_END44]]
1681 // CHECK5: simd.if.end44:
1682 // CHECK5-NEXT: [[ARRAYIDX45:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i64 0, i64 0
1683 // CHECK5-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX45]], align 4
1684 // CHECK5-NEXT: ret i32 [[TMP29]]
1685 //
1686 //
1687 // CHECK7-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
1688 // CHECK7-SAME: (i32* noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
1689 // CHECK7-NEXT: entry:
1690 // CHECK7-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
1691 // CHECK7-NEXT: [[N:%.*]] = alloca i32, align 4
1692 // CHECK7-NEXT: [[A:%.*]] = alloca [1000 x i32], align 4
1693 // CHECK7-NEXT: [[TE:%.*]] = alloca i32, align 4
1694 // CHECK7-NEXT: [[TH:%.*]] = alloca i32, align 4
1695 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
1696 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1697 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1698 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
1699 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1700 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1701 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1702 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1703 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
1704 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1705 // CHECK7-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1706 // CHECK7-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
1707 // CHECK7-NEXT: [[I7:%.*]] = alloca i32, align 4
1708 // CHECK7-NEXT: [[I8:%.*]] = alloca i32, align 4
1709 // CHECK7-NEXT: [[_TMP15:%.*]] = alloca i32, align 4
1710 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
1711 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
1712 // CHECK7-NEXT: [[DOTOMP_LB21:%.*]] = alloca i32, align 4
1713 // CHECK7-NEXT: [[DOTOMP_UB22:%.*]] = alloca i32, align 4
1714 // CHECK7-NEXT: [[I23:%.*]] = alloca i32, align 4
1715 // CHECK7-NEXT: [[DOTOMP_IV26:%.*]] = alloca i32, align 4
1716 // CHECK7-NEXT: [[I27:%.*]] = alloca i32, align 4
1717 // CHECK7-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
1718 // CHECK7-NEXT: store i32 1000, i32* [[N]], align 4
1719 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1720 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1721 // CHECK7-NEXT: store i32 [[DIV]], i32* [[TE]], align 4
1722 // CHECK7-NEXT: store i32 128, i32* [[TH]], align 4
1723 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4
1724 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1725 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4
1726 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1727 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
1728 // CHECK7-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1729 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1730 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1731 // CHECK7-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
1732 // CHECK7-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
1733 // CHECK7-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1734 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1735 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1736 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1737 // CHECK7-NEXT: store i32 0, i32* [[I6]], align 4
1738 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1739 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
1740 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
1741 // CHECK7: simd.if.then:
1742 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1743 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1744 // CHECK7-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
1745 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
1746 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4
1747 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTLINEAR_START]], align 4
1748 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[N]], align 4
1749 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTLINEAR_STEP]], align 4
1750 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1751 // CHECK7: omp.inner.for.cond:
1752 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1753 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1754 // CHECK7-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1755 // CHECK7-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1756 // CHECK7: omp.inner.for.body:
1757 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1758 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1759 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1760 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
1761 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[I7]], align 4
1762 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP13]]
1763 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1764 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1765 // CHECK7: omp.body.continue:
1766 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1767 // CHECK7: omp.inner.for.inc:
1768 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1769 // CHECK7-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
1770 // CHECK7-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1771 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1772 // CHECK7: omp.inner.for.end:
1773 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1774 // CHECK7-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
1775 // CHECK7-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1776 // CHECK7-NEXT: [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
1777 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
1778 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
1779 // CHECK7-NEXT: br label [[SIMD_IF_END]]
1780 // CHECK7: simd.if.end:
1781 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[N]], align 4
1782 // CHECK7-NEXT: store i32 [[TMP16]], i32* [[DOTCAPTURE_EXPR_16]], align 4
1783 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
1784 // CHECK7-NEXT: [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
1785 // CHECK7-NEXT: [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
1786 // CHECK7-NEXT: [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
1787 // CHECK7-NEXT: store i32 [[SUB20]], i32* [[DOTCAPTURE_EXPR_17]], align 4
1788 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB21]], align 4
1789 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4
1790 // CHECK7-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_UB22]], align 4
1791 // CHECK7-NEXT: store i32 0, i32* [[I23]], align 4
1792 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
1793 // CHECK7-NEXT: [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
1794 // CHECK7-NEXT: br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END43:%.*]]
1795 // CHECK7: simd.if.then25:
1796 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_LB21]], align 4
1797 // CHECK7-NEXT: store i32 [[TMP20]], i32* [[DOTOMP_IV26]], align 4
1798 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND28:%.*]]
1799 // CHECK7: omp.inner.for.cond28:
1800 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
1801 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_UB22]], align 4, !llvm.access.group !6
1802 // CHECK7-NEXT: [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
1803 // CHECK7-NEXT: br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
1804 // CHECK7: omp.inner.for.body30:
1805 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
1806 // CHECK7-NEXT: [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
1807 // CHECK7-NEXT: [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
1808 // CHECK7-NEXT: store i32 [[ADD32]], i32* [[I27]], align 4, !llvm.access.group !6
1809 // CHECK7-NEXT: [[TMP24:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !6
1810 // CHECK7-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i32 0
1811 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !6
1812 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[I27]], align 4, !llvm.access.group !6
1813 // CHECK7-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 [[TMP26]]
1814 // CHECK7-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX34]], align 4, !llvm.access.group !6
1815 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE35:%.*]]
1816 // CHECK7: omp.body.continue35:
1817 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC36:%.*]]
1818 // CHECK7: omp.inner.for.inc36:
1819 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
1820 // CHECK7-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP27]], 1
1821 // CHECK7-NEXT: store i32 [[ADD37]], i32* [[DOTOMP_IV26]], align 4, !llvm.access.group !6
1822 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP7:![0-9]+]]
1823 // CHECK7: omp.inner.for.end38:
1824 // CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_16]], align 4
1825 // CHECK7-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP28]], 0
1826 // CHECK7-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
1827 // CHECK7-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
1828 // CHECK7-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
1829 // CHECK7-NEXT: store i32 [[ADD42]], i32* [[I27]], align 4
1830 // CHECK7-NEXT: br label [[SIMD_IF_END43]]
1831 // CHECK7: simd.if.end43:
1832 // CHECK7-NEXT: [[ARRAYIDX44:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[A]], i32 0, i32 0
1833 // CHECK7-NEXT: [[TMP29:%.*]] = load i32, i32* [[ARRAYIDX44]], align 4
1834 // CHECK7-NEXT: ret i32 [[TMP29]]
1835 //
1836 //
1837 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
1838 // CHECK9-SAME: (i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
1839 // CHECK9-NEXT: entry:
1840 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
1841 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1842 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1843 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1844 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
1845 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
1846 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1847 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
1848 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
1849 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1850 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1851 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1852 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8
1853 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
1854 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1855 // CHECK9-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1856 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1857 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32*
1858 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV4]], align 4
1859 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV5]], align 4
1860 // CHECK9-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1861 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
1862 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[I_CASTED]] to i32*
1863 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV6]], align 4
1864 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[I_CASTED]], align 8
1865 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV3]], align 4
1866 // CHECK9-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1867 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV7]], align 4
1868 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
1869 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP5]], i64 [[TMP7]], [1000 x i32]* [[TMP1]])
1870 // CHECK9-NEXT: ret void
1871 //
1872 //
1873 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1874 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
1875 // CHECK9-NEXT: entry:
1876 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1877 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1878 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
1879 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1880 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1881 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1882 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1883 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1884 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1885 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
1886 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1887 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1888 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1889 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1890 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
1891 // CHECK9-NEXT: [[I_CASTED:%.*]] = alloca i64, align 8
1892 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1893 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1894 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1895 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
1896 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1897 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1898 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
1899 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1900 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1901 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4
1902 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1903 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1904 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1905 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1906 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1907 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1908 // CHECK9-NEXT: store i32 0, i32* [[I4]], align 4
1909 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1910 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1911 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1912 // CHECK9: omp.precond.then:
1913 // CHECK9-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
1914 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
1915 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1916 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1917 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1918 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1919 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1920 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1921 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1922 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1923 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1924 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1925 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1926 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1927 // CHECK9: cond.true:
1928 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1929 // CHECK9-NEXT: br label [[COND_END:%.*]]
1930 // CHECK9: cond.false:
1931 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1932 // CHECK9-NEXT: br label [[COND_END]]
1933 // CHECK9: cond.end:
1934 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1935 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1936 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1937 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1938 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1939 // CHECK9: omp.inner.for.cond:
1940 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1941 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1942 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1943 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1944 // CHECK9: omp.inner.for.body:
1945 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1946 // CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1947 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1948 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1949 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
1950 // CHECK9-NEXT: [[CONV8:%.*]] = bitcast i64* [[I_CASTED]] to i32*
1951 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
1952 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[I_CASTED]], align 8
1953 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4
1954 // CHECK9-NEXT: [[CONV9:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1955 // CHECK9-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
1956 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
1957 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], [1000 x i32]* [[TMP0]])
1958 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1959 // CHECK9: omp.inner.for.inc:
1960 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1961 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1962 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1963 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1964 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1965 // CHECK9: omp.inner.for.end:
1966 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1967 // CHECK9: omp.loop.exit:
1968 // CHECK9-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1969 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
1970 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
1971 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1972 // CHECK9-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
1973 // CHECK9-NEXT: br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1974 // CHECK9: .omp.final.then:
1975 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1976 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP28]], 0
1977 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
1978 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV11]], 1
1979 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL]]
1980 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[CONV]], align 4
1981 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1982 // CHECK9: .omp.final.done:
1983 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1984 // CHECK9: omp.precond.end:
1985 // CHECK9-NEXT: ret void
1986 //
1987 //
1988 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1989 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
1990 // CHECK9-NEXT: entry:
1991 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1992 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1993 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1994 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1995 // CHECK9-NEXT: [[I_ADDR:%.*]] = alloca i64, align 8
1996 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1997 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1998 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1999 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2000 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2001 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2002 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
2003 // CHECK9-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2004 // CHECK9-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
2005 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2006 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2007 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2008 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2009 // CHECK9-NEXT: [[I7:%.*]] = alloca i32, align 4
2010 // CHECK9-NEXT: [[I8:%.*]] = alloca i32, align 4
2011 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2012 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2013 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2014 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2015 // CHECK9-NEXT: store i64 [[I]], i64* [[I_ADDR]], align 8
2016 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2017 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
2018 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[I_ADDR]] to i32*
2019 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2020 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
2021 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV1]], align 4
2022 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2023 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2024 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2025 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2026 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2027 // CHECK9-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2028 // CHECK9-NEXT: store i32 0, i32* [[I4]], align 4
2029 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2030 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2031 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2032 // CHECK9: omp.precond.then:
2033 // CHECK9-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 0
2034 // CHECK9-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i64 8) ]
2035 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 4
2036 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
2037 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 4
2038 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
2039 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2040 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2041 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2042 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2043 // CHECK9-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP7]] to i32
2044 // CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2045 // CHECK9-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP8]] to i32
2046 // CHECK9-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
2047 // CHECK9-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
2048 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2049 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2050 // CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2051 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2052 // CHECK9-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
2053 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2054 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2055 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2056 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2057 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2058 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
2059 // CHECK9-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2060 // CHECK9: cond.true:
2061 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2062 // CHECK9-NEXT: br label [[COND_END:%.*]]
2063 // CHECK9: cond.false:
2064 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2065 // CHECK9-NEXT: br label [[COND_END]]
2066 // CHECK9: cond.end:
2067 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
2068 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2069 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2070 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
2071 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2072 // CHECK9: omp.inner.for.cond:
2073 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2074 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2075 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2076 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2077 // CHECK9: omp.inner.for.body:
2078 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2079 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
2080 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2081 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
2082 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[I7]], align 4
2083 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
2084 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2085 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2086 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2087 // CHECK9: omp.body.continue:
2088 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2089 // CHECK9: omp.inner.for.inc:
2090 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2091 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP22]], 1
2092 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2093 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
2094 // CHECK9: omp.inner.for.end:
2095 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2096 // CHECK9: omp.loop.exit:
2097 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2098 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
2099 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
2100 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2101 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2102 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2103 // CHECK9: .omp.final.then:
2104 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2105 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP27]], 0
2106 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2107 // CHECK9-NEXT: [[MUL14:%.*]] = mul nsw i32 [[DIV13]], 1
2108 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]]
2109 // CHECK9-NEXT: store i32 [[ADD15]], i32* [[CONV]], align 4
2110 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2111 // CHECK9: .omp.final.done:
2112 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2113 // CHECK9-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2114 // CHECK9-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
2115 // CHECK9: .omp.linear.pu:
2116 // CHECK9-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
2117 // CHECK9: .omp.linear.pu.done:
2118 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2119 // CHECK9: omp.precond.end:
2120 // CHECK9-NEXT: ret void
2121 //
2122 //
2123 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
2124 // CHECK9-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] {
2125 // CHECK9-NEXT: entry:
2126 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2127 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
2128 // CHECK9-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
2129 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2130 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2131 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
2132 // CHECK9-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
2133 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2134 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
2135 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
2136 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2137 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
2138 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[N_CASTED]], align 8
2139 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 8
2140 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
2141 // CHECK9-NEXT: ret void
2142 //
2143 //
2144 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
2145 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] {
2146 // CHECK9-NEXT: entry:
2147 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2148 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2149 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2150 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
2151 // CHECK9-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
2152 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2153 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2154 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2155 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2156 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2157 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2158 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2159 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2160 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2161 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
2162 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2163 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2164 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2165 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2166 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
2167 // CHECK9-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
2168 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2169 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
2170 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
2171 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2172 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2173 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2174 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2175 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2176 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2177 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
2178 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2179 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2180 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2181 // CHECK9: omp.precond.then:
2182 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2183 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2184 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
2185 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2186 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2187 // CHECK9-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2188 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2189 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2190 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2191 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2192 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2193 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2194 // CHECK9: cond.true:
2195 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2196 // CHECK9-NEXT: br label [[COND_END:%.*]]
2197 // CHECK9: cond.false:
2198 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2199 // CHECK9-NEXT: br label [[COND_END]]
2200 // CHECK9: cond.end:
2201 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2202 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2203 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2204 // CHECK9-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2205 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2206 // CHECK9: omp.inner.for.cond:
2207 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2208 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
2209 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2210 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2211 // CHECK9: omp.inner.for.body:
2212 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !12
2213 // CHECK9-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
2214 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !12
2215 // CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
2216 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4, !llvm.access.group !12
2217 // CHECK9-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2218 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4, !llvm.access.group !12
2219 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group !12
2220 // CHECK9-NEXT: [[TMP20:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !12
2221 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], [1000 x i32]* [[TMP0]], i32* [[TMP20]]), !llvm.access.group !12
2222 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2223 // CHECK9: omp.inner.for.inc:
2224 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2225 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !12
2226 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2227 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2228 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2229 // CHECK9: omp.inner.for.end:
2230 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2231 // CHECK9: omp.loop.exit:
2232 // CHECK9-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2233 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
2234 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
2235 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2236 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2237 // CHECK9-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2238 // CHECK9: .omp.final.then:
2239 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2240 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP27]], 0
2241 // CHECK9-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2242 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
2243 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
2244 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[I3]], align 4
2245 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2246 // CHECK9: .omp.final.done:
2247 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2248 // CHECK9: omp.precond.end:
2249 // CHECK9-NEXT: ret void
2250 //
2251 //
2252 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2253 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] {
2254 // CHECK9-NEXT: entry:
2255 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2256 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2257 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2258 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2259 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2260 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
2261 // CHECK9-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
2262 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2263 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2264 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2265 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2266 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2267 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2268 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2269 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2270 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2271 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
2272 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2273 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2274 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2275 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2276 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2277 // CHECK9-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
2278 // CHECK9-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
2279 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2280 // CHECK9-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
2281 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
2282 // CHECK9-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2283 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2284 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2285 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2286 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2287 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2288 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
2289 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2290 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2291 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2292 // CHECK9: omp.precond.then:
2293 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2294 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2295 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2296 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2297 // CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
2298 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2299 // CHECK9-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
2300 // CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
2301 // CHECK9-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
2302 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2303 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2304 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2305 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2306 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2307 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2308 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2309 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2310 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2311 // CHECK9: cond.true:
2312 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2313 // CHECK9-NEXT: br label [[COND_END:%.*]]
2314 // CHECK9: cond.false:
2315 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2316 // CHECK9-NEXT: br label [[COND_END]]
2317 // CHECK9: cond.end:
2318 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2319 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2320 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2321 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2322 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2323 // CHECK9: omp.inner.for.cond:
2324 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2325 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
2326 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2327 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2328 // CHECK9: omp.inner.for.body:
2329 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2330 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2331 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2332 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !16
2333 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 8, !llvm.access.group !16
2334 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 0
2335 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
2336 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !16
2337 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
2338 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2339 // CHECK9-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX8]], align 4, !llvm.access.group !16
2340 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2341 // CHECK9: omp.body.continue:
2342 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2343 // CHECK9: omp.inner.for.inc:
2344 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2345 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
2346 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
2347 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
2348 // CHECK9: omp.inner.for.end:
2349 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2350 // CHECK9: omp.loop.exit:
2351 // CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2352 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2353 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2354 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2355 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2356 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2357 // CHECK9: .omp.final.then:
2358 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2359 // CHECK9-NEXT: [[SUB10:%.*]] = sub nsw i32 [[TMP25]], 0
2360 // CHECK9-NEXT: [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
2361 // CHECK9-NEXT: [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
2362 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
2363 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[I5]], align 4
2364 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
2365 // CHECK9: .omp.final.done:
2366 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
2367 // CHECK9: omp.precond.end:
2368 // CHECK9-NEXT: ret void
2369 //
2370 //
2371 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
2372 // CHECK11-SAME: (i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
2373 // CHECK11-NEXT: entry:
2374 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2375 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2376 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2377 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2378 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
2379 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
2380 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2381 // CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
2382 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
2383 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2384 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2385 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2386 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_1]], i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
2387 // CHECK11-NEXT: [[TMP1:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2388 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2389 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR2]], align 4
2390 // CHECK11-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
2391 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
2392 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[I_CASTED]], align 4
2393 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[I_CASTED]], align 4
2394 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_ADDR]], align 4
2395 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[N_CASTED]], align 4
2396 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[N_CASTED]], align 4
2397 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [1000 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP5]], i32 [[TMP7]], [1000 x i32]* [[TMP1]])
2398 // CHECK11-NEXT: ret void
2399 //
2400 //
2401 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2402 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
2403 // CHECK11-NEXT: entry:
2404 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2405 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2406 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2407 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2408 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2409 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2410 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2411 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2412 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2413 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2414 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2415 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2416 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2417 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2418 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
2419 // CHECK11-NEXT: [[I_CASTED:%.*]] = alloca i32, align 4
2420 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2421 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2422 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2423 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
2424 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2425 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2426 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2427 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2428 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2429 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2430 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2431 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2432 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2433 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2434 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4
2435 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2436 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2437 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2438 // CHECK11: omp.precond.then:
2439 // CHECK11-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
2440 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
2441 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2442 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2443 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
2444 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2445 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2446 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2447 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2448 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2449 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2450 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2451 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2452 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2453 // CHECK11: cond.true:
2454 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2455 // CHECK11-NEXT: br label [[COND_END:%.*]]
2456 // CHECK11: cond.false:
2457 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2458 // CHECK11-NEXT: br label [[COND_END]]
2459 // CHECK11: cond.end:
2460 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2461 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2462 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2463 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2464 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2465 // CHECK11: omp.inner.for.cond:
2466 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2467 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2468 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2469 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2470 // CHECK11: omp.inner.for.body:
2471 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2472 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2473 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I4]], align 4
2474 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[I_CASTED]], align 4
2475 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[I_CASTED]], align 4
2476 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
2477 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
2478 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
2479 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, [1000 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], [1000 x i32]* [[TMP0]])
2480 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2481 // CHECK11: omp.inner.for.inc:
2482 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2483 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2484 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2485 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2486 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2487 // CHECK11: omp.inner.for.end:
2488 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2489 // CHECK11: omp.loop.exit:
2490 // CHECK11-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2491 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
2492 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
2493 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2494 // CHECK11-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2495 // CHECK11-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2496 // CHECK11: .omp.final.then:
2497 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2498 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
2499 // CHECK11-NEXT: [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2500 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
2501 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
2502 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[I_ADDR]], align 4
2503 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2504 // CHECK11: .omp.final.done:
2505 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2506 // CHECK11: omp.precond.end:
2507 // CHECK11-NEXT: ret void
2508 //
2509 //
2510 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2511 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
2512 // CHECK11-NEXT: entry:
2513 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2514 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2515 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2516 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2517 // CHECK11-NEXT: [[I_ADDR:%.*]] = alloca i32, align 4
2518 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2519 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2520 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2521 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2522 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2523 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2524 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2525 // CHECK11-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2526 // CHECK11-NEXT: [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
2527 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2528 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2529 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2530 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2531 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
2532 // CHECK11-NEXT: [[I5:%.*]] = alloca i32, align 4
2533 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2534 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2535 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2536 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2537 // CHECK11-NEXT: store i32 [[I]], i32* [[I_ADDR]], align 4
2538 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2539 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2540 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2541 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2542 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2543 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2544 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2545 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2546 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2547 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2548 // CHECK11-NEXT: store i32 0, i32* [[I3]], align 4
2549 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2550 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2551 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2552 // CHECK11: omp.precond.then:
2553 // CHECK11-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 0
2554 // CHECK11-NEXT: call void @llvm.assume(i1 true) [ "align"(i32* [[ARRAYDECAY]], i32 8) ]
2555 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[I_ADDR]], align 4
2556 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTLINEAR_START]], align 4
2557 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4
2558 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTLINEAR_STEP]], align 4
2559 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2560 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2561 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2562 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2563 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2564 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
2565 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
2566 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2567 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2568 // CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2569 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2570 // CHECK11-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]])
2571 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2572 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
2573 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2574 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2575 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2576 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
2577 // CHECK11-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2578 // CHECK11: cond.true:
2579 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2580 // CHECK11-NEXT: br label [[COND_END:%.*]]
2581 // CHECK11: cond.false:
2582 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2583 // CHECK11-NEXT: br label [[COND_END]]
2584 // CHECK11: cond.end:
2585 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
2586 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2587 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2588 // CHECK11-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
2589 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2590 // CHECK11: omp.inner.for.cond:
2591 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2592 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2593 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2594 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2595 // CHECK11: omp.inner.for.body:
2596 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2597 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
2598 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2599 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
2600 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4
2601 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP21]]
2602 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2603 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2604 // CHECK11: omp.body.continue:
2605 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2606 // CHECK11: omp.inner.for.inc:
2607 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2608 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
2609 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
2610 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2611 // CHECK11: omp.inner.for.end:
2612 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2613 // CHECK11: omp.loop.exit:
2614 // CHECK11-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2615 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
2616 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
2617 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2618 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2619 // CHECK11-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2620 // CHECK11: .omp.final.then:
2621 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2622 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
2623 // CHECK11-NEXT: [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2624 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2625 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2626 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[I_ADDR]], align 4
2627 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2628 // CHECK11: .omp.final.done:
2629 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2630 // CHECK11-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2631 // CHECK11-NEXT: br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
2632 // CHECK11: .omp.linear.pu:
2633 // CHECK11-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
2634 // CHECK11: .omp.linear.pu.done:
2635 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2636 // CHECK11: omp.precond.end:
2637 // CHECK11-NEXT: ret void
2638 //
2639 //
2640 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
2641 // CHECK11-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] {
2642 // CHECK11-NEXT: entry:
2643 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2644 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2645 // CHECK11-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2646 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2647 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2648 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2649 // CHECK11-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2650 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2651 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2652 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[N_CASTED]], align 4
2653 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_CASTED]], align 4
2654 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[G_ADDR]], align 4
2655 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, [1000 x i32]*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP2]], [1000 x i32]* [[TMP0]], i32* [[TMP3]])
2656 // CHECK11-NEXT: ret void
2657 //
2658 //
2659 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
2660 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] {
2661 // CHECK11-NEXT: entry:
2662 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2663 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2664 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2665 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2666 // CHECK11-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2667 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2668 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2669 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2670 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2671 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2672 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2673 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2674 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2675 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2676 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2677 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2678 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2679 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2680 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2681 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2682 // CHECK11-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2683 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2684 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2685 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2686 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2687 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2688 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2689 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2690 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2691 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2692 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2693 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2694 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2695 // CHECK11: omp.precond.then:
2696 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2697 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2698 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
2699 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2700 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2701 // CHECK11-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2702 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2703 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2704 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2705 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2706 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2707 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2708 // CHECK11: cond.true:
2709 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2710 // CHECK11-NEXT: br label [[COND_END:%.*]]
2711 // CHECK11: cond.false:
2712 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2713 // CHECK11-NEXT: br label [[COND_END]]
2714 // CHECK11: cond.end:
2715 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2716 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2717 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2718 // CHECK11-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2719 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2720 // CHECK11: omp.inner.for.cond:
2721 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2722 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
2723 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2724 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2725 // CHECK11: omp.inner.for.body:
2726 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !13
2727 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !13
2728 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group !13
2729 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group !13
2730 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group !13
2731 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !13
2732 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], [1000 x i32]* [[TMP0]], i32* [[TMP18]]), !llvm.access.group !13
2733 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2734 // CHECK11: omp.inner.for.inc:
2735 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2736 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !13
2737 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2738 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2739 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2740 // CHECK11: omp.inner.for.end:
2741 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2742 // CHECK11: omp.loop.exit:
2743 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2744 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2745 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2746 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2747 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2748 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2749 // CHECK11: .omp.final.then:
2750 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2751 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
2752 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2753 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
2754 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
2755 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[I3]], align 4
2756 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2757 // CHECK11: .omp.final.done:
2758 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2759 // CHECK11: omp.precond.end:
2760 // CHECK11-NEXT: ret void
2761 //
2762 //
2763 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
2764 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[G:%.*]]) #[[ATTR0]] {
2765 // CHECK11-NEXT: entry:
2766 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2767 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2768 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2769 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2770 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2771 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
2772 // CHECK11-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 4
2773 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2774 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2775 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2776 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2777 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2778 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2779 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2780 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2781 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2782 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2783 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2784 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2785 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2786 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2787 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2788 // CHECK11-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
2789 // CHECK11-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 4
2790 // CHECK11-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
2791 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
2792 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2793 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2794 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2795 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2796 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2797 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2798 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2799 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2800 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2801 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2802 // CHECK11: omp.precond.then:
2803 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2804 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2805 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2806 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2807 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2808 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
2809 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
2810 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2811 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2812 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2813 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2814 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2815 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2816 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2817 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2818 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2819 // CHECK11: cond.true:
2820 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2821 // CHECK11-NEXT: br label [[COND_END:%.*]]
2822 // CHECK11: cond.false:
2823 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2824 // CHECK11-NEXT: br label [[COND_END]]
2825 // CHECK11: cond.end:
2826 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2827 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2828 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2829 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2830 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2831 // CHECK11: omp.inner.for.cond:
2832 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2833 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
2834 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2835 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2836 // CHECK11: omp.inner.for.body:
2837 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2838 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2839 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2840 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !17
2841 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[G_ADDR]], align 4, !llvm.access.group !17
2842 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0
2843 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
2844 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !17
2845 // CHECK11-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
2846 // CHECK11-NEXT: store i32 [[TMP18]], i32* [[ARRAYIDX6]], align 4, !llvm.access.group !17
2847 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2848 // CHECK11: omp.body.continue:
2849 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2850 // CHECK11: omp.inner.for.inc:
2851 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2852 // CHECK11-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
2853 // CHECK11-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
2854 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
2855 // CHECK11: omp.inner.for.end:
2856 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2857 // CHECK11: omp.loop.exit:
2858 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2859 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2860 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2861 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2862 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2863 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2864 // CHECK11: .omp.final.then:
2865 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2866 // CHECK11-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
2867 // CHECK11-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
2868 // CHECK11-NEXT: [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
2869 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
2870 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[I3]], align 4
2871 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2872 // CHECK11: .omp.final.done:
2873 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2874 // CHECK11: omp.precond.end:
2875 // CHECK11-NEXT: ret void
2876 //
2877