1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
20
21 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
22 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
23 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
26 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27
28 #ifdef CK1
29
30 template <typename T, int X, long long Y>
31 struct SS{
32 T a[X];
33 float b;
fooSS34 int foo(void) {
35
36 #pragma omp target teams distribute parallel for
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
39 }
40 #pragma omp target teams distribute parallel for schedule(static)
41 for(int i = 0; i < X; i++) {
42 a[i] = (T)0;
43 }
44 #pragma omp target teams distribute parallel for schedule(static, X/2)
45 for(int i = 0; i < X; i++) {
46 a[i] = (T)0;
47 }
48
49 #pragma omp target teams distribute parallel for schedule(dynamic)
50 for(int i = 0; i < X; i++) {
51 a[i] = (T)0;
52 }
53
54 #pragma omp target teams distribute parallel for schedule(dynamic, X/2)
55 for(int i = 0; i < X; i++) {
56 a[i] = (T)0;
57 }
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74 return a[0];
75 }
76 };
77
teams_template_struct(void)78 int teams_template_struct(void) {
79 SS<int, 123, 456> V;
80 return V.foo();
81
82 }
83 #endif // CK1
84
85 // Test host codegen.
86 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
87 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
88 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
89 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
90 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
91 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
92
93 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
94 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
95 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
96 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
97 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
98 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19
99
100 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
101 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
102 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
103 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
104 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
105 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
106 #ifdef CK2
107
108 template <typename T, int n>
tmain(T argc)109 int tmain(T argc) {
110 T a[n];
111 int m = 10;
112 #pragma omp target teams distribute parallel for
113 for(int i = 0; i < n; i++) {
114 a[i] = (T)0;
115 }
116 #pragma omp target teams distribute parallel for schedule(static)
117 for(int i = 0; i < n; i++) {
118 a[i] = (T)0;
119 }
120 #pragma omp target teams distribute parallel for schedule(static, m)
121 for(int i = 0; i < n; i++) {
122 a[i] = (T)0;
123 }
124 #pragma omp target teams distribute parallel for schedule(dynamic)
125 for(int i = 0; i < n; i++) {
126 a[i] = (T)0;
127 }
128 #pragma omp target teams distribute parallel for schedule(dynamic, m)
129 for(int i = 0; i < n; i++) {
130 a[i] = (T)0;
131 }
132 return 0;
133 }
134
main(int argc,char ** argv)135 int main (int argc, char **argv) {
136 int n = 100;
137 int a[n];
138 int m = 10;
139 #pragma omp target teams distribute parallel for
140 for(int i = 0; i < n; i++) {
141 a[i] = 0;
142 }
143 #pragma omp target teams distribute parallel for dist_schedule(static)
144 for(int i = 0; i < n; i++) {
145 a[i] = 0;
146 }
147 #pragma omp target teams distribute parallel for dist_schedule(static, m)
148 for(int i = 0; i < n; i++) {
149 a[i] = 0;
150 }
151 #pragma omp target teams distribute parallel for schedule(dynamic)
152 for(int i = 0; i < n; i++) {
153 a[i] = 0;
154 }
155 #pragma omp target teams distribute parallel for schedule(dynamic, m)
156 for(int i = 0; i < n; i++) {
157 a[i] = 0;
158 }
159 return tmain<int, 10>(argc);
160 }
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195 #endif // CK2
196 #endif // #ifndef HEADER
197 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
198 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
199 // CHECK1-NEXT: entry:
200 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
201 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
202 // CHECK1-NEXT: ret i32 [[CALL]]
203 //
204 //
205 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
206 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
207 // CHECK1-NEXT: entry:
208 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
209 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
210 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
211 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
212 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
213 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
214 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
215 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
216 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
217 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
218 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
219 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
220 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
221 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 8
222 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 8
223 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 8
224 // CHECK1-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
225 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 8
226 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 8
227 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 8
228 // CHECK1-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
229 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
230 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
231 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
232 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
233 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
234 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
235 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
236 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
237 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
238 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
239 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
240 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
241 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
242 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
243 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
244 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
245 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
246 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
247 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
248 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
249 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
250 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
251 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
252 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
253 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
254 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
255 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
256 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
257 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
258 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
259 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
260 // CHECK1-NEXT: store i64 123, i64* [[TMP15]], align 8
261 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
262 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
263 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
264 // CHECK1: omp_offload.failed:
265 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
266 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
267 // CHECK1: omp_offload.cont:
268 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
269 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
270 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
271 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
272 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
273 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
274 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
275 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
276 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
277 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
278 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
279 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
280 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
281 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4
282 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
283 // CHECK1-NEXT: store i32 1, i32* [[TMP26]], align 4
284 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
285 // CHECK1-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
286 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
287 // CHECK1-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
288 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
289 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 8
290 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
291 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 8
292 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
293 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8
294 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
295 // CHECK1-NEXT: store i8** null, i8*** [[TMP32]], align 8
296 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
297 // CHECK1-NEXT: store i64 123, i64* [[TMP33]], align 8
298 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
299 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
300 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
301 // CHECK1: omp_offload.failed8:
302 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
303 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
304 // CHECK1: omp_offload.cont9:
305 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
306 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
307 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
308 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
309 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
310 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
311 // CHECK1-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
312 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
313 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8
314 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
315 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
316 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
317 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
318 // CHECK1-NEXT: store i32 1, i32* [[TMP43]], align 4
319 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
320 // CHECK1-NEXT: store i32 1, i32* [[TMP44]], align 4
321 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
322 // CHECK1-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
323 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
324 // CHECK1-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
325 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
326 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 8
327 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
328 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 8
329 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
330 // CHECK1-NEXT: store i8** null, i8*** [[TMP49]], align 8
331 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
332 // CHECK1-NEXT: store i8** null, i8*** [[TMP50]], align 8
333 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
334 // CHECK1-NEXT: store i64 123, i64* [[TMP51]], align 8
335 // CHECK1-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
336 // CHECK1-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
337 // CHECK1-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
338 // CHECK1: omp_offload.failed16:
339 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
340 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]
341 // CHECK1: omp_offload.cont17:
342 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
343 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
344 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
345 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 8
346 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
347 // CHECK1-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
348 // CHECK1-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 8
349 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
350 // CHECK1-NEXT: store i8* null, i8** [[TMP58]], align 8
351 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
352 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
353 // CHECK1-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
354 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
355 // CHECK1-NEXT: store i32 1, i32* [[TMP61]], align 4
356 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
357 // CHECK1-NEXT: store i32 1, i32* [[TMP62]], align 4
358 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
359 // CHECK1-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 8
360 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
361 // CHECK1-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 8
362 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
363 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 8
364 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
365 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 8
366 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
367 // CHECK1-NEXT: store i8** null, i8*** [[TMP67]], align 8
368 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
369 // CHECK1-NEXT: store i8** null, i8*** [[TMP68]], align 8
370 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
371 // CHECK1-NEXT: store i64 123, i64* [[TMP69]], align 8
372 // CHECK1-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
373 // CHECK1-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
374 // CHECK1-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
375 // CHECK1: omp_offload.failed24:
376 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
377 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT25]]
378 // CHECK1: omp_offload.cont25:
379 // CHECK1-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
380 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
381 // CHECK1-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
382 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 8
383 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
384 // CHECK1-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
385 // CHECK1-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 8
386 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
387 // CHECK1-NEXT: store i8* null, i8** [[TMP76]], align 8
388 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
389 // CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
390 // CHECK1-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
391 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
392 // CHECK1-NEXT: store i32 1, i32* [[TMP79]], align 4
393 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
394 // CHECK1-NEXT: store i32 1, i32* [[TMP80]], align 4
395 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
396 // CHECK1-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 8
397 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
398 // CHECK1-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 8
399 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
400 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 8
401 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
402 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 8
403 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
404 // CHECK1-NEXT: store i8** null, i8*** [[TMP85]], align 8
405 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
406 // CHECK1-NEXT: store i8** null, i8*** [[TMP86]], align 8
407 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
408 // CHECK1-NEXT: store i64 123, i64* [[TMP87]], align 8
409 // CHECK1-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
410 // CHECK1-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
411 // CHECK1-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
412 // CHECK1: omp_offload.failed32:
413 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
414 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT33]]
415 // CHECK1: omp_offload.cont33:
416 // CHECK1-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
417 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i64 0, i64 0
418 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
419 // CHECK1-NEXT: ret i32 [[TMP90]]
420 //
421 //
422 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
423 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
424 // CHECK1-NEXT: entry:
425 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
426 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
427 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
428 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
429 // CHECK1-NEXT: ret void
430 //
431 //
432 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
433 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
434 // CHECK1-NEXT: entry:
435 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
436 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
437 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
438 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
439 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
440 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
443 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
444 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
445 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
446 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
447 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
448 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
449 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
450 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
451 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
452 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
453 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
454 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
455 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
456 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
457 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
458 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
459 // CHECK1: cond.true:
460 // CHECK1-NEXT: br label [[COND_END:%.*]]
461 // CHECK1: cond.false:
462 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
463 // CHECK1-NEXT: br label [[COND_END]]
464 // CHECK1: cond.end:
465 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
466 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
467 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
468 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
469 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
470 // CHECK1: omp.inner.for.cond:
471 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
472 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
473 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
474 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
475 // CHECK1: omp.inner.for.body:
476 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
477 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
478 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
479 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
480 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
481 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
482 // CHECK1: omp.inner.for.inc:
483 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
484 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
485 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
486 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
487 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
488 // CHECK1: omp.inner.for.end:
489 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
490 // CHECK1: omp.loop.exit:
491 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
492 // CHECK1-NEXT: ret void
493 //
494 //
495 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
496 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
497 // CHECK1-NEXT: entry:
498 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
499 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
500 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
501 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
502 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
503 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
504 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
505 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
506 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
507 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
508 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
509 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
510 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
511 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
512 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
513 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
514 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
515 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
516 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
517 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
518 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
519 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
520 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
521 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
522 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
523 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
524 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
525 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
526 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
527 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
528 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
529 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
530 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
531 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
532 // CHECK1: cond.true:
533 // CHECK1-NEXT: br label [[COND_END:%.*]]
534 // CHECK1: cond.false:
535 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
536 // CHECK1-NEXT: br label [[COND_END]]
537 // CHECK1: cond.end:
538 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
539 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
540 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
541 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
542 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
543 // CHECK1: omp.inner.for.cond:
544 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
545 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
546 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
547 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
548 // CHECK1: omp.inner.for.body:
549 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
550 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
551 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
552 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
553 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
554 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
555 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
556 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
557 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
558 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
559 // CHECK1: omp.body.continue:
560 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
561 // CHECK1: omp.inner.for.inc:
562 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
563 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
564 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
565 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
566 // CHECK1: omp.inner.for.end:
567 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
568 // CHECK1: omp.loop.exit:
569 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
570 // CHECK1-NEXT: ret void
571 //
572 //
573 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
574 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
575 // CHECK1-NEXT: entry:
576 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
577 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
578 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
579 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
580 // CHECK1-NEXT: ret void
581 //
582 //
583 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
584 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
585 // CHECK1-NEXT: entry:
586 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
587 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
588 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
589 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
590 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
591 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
592 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
593 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
594 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
595 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
596 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
597 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
598 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
599 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
600 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
601 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
602 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
603 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
604 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
605 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
606 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
607 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
608 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
609 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
610 // CHECK1: cond.true:
611 // CHECK1-NEXT: br label [[COND_END:%.*]]
612 // CHECK1: cond.false:
613 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
614 // CHECK1-NEXT: br label [[COND_END]]
615 // CHECK1: cond.end:
616 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
617 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
618 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
619 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
620 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
621 // CHECK1: omp.inner.for.cond:
622 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
623 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
624 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
625 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
626 // CHECK1: omp.inner.for.body:
627 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
628 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
629 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
630 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
631 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
632 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
633 // CHECK1: omp.inner.for.inc:
634 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
635 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
636 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
637 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
638 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
639 // CHECK1: omp.inner.for.end:
640 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
641 // CHECK1: omp.loop.exit:
642 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
643 // CHECK1-NEXT: ret void
644 //
645 //
646 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
647 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
648 // CHECK1-NEXT: entry:
649 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
650 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
651 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
652 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
653 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
654 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
655 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
656 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
657 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
658 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
659 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
660 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
661 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
662 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
663 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
664 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
665 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
666 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
667 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
668 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
669 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
670 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
671 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
672 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
673 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
674 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
675 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
676 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
677 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
678 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
679 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
680 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
681 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
682 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
683 // CHECK1: cond.true:
684 // CHECK1-NEXT: br label [[COND_END:%.*]]
685 // CHECK1: cond.false:
686 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
687 // CHECK1-NEXT: br label [[COND_END]]
688 // CHECK1: cond.end:
689 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
690 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
691 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
692 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
693 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
694 // CHECK1: omp.inner.for.cond:
695 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
696 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
697 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
698 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
699 // CHECK1: omp.inner.for.body:
700 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
701 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
702 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
703 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
704 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
705 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
706 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
707 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
708 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
709 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
710 // CHECK1: omp.body.continue:
711 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
712 // CHECK1: omp.inner.for.inc:
713 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
714 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
715 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
716 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
717 // CHECK1: omp.inner.for.end:
718 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
719 // CHECK1: omp.loop.exit:
720 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
721 // CHECK1-NEXT: ret void
722 //
723 //
724 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
725 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
726 // CHECK1-NEXT: entry:
727 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
728 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
729 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
730 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
731 // CHECK1-NEXT: ret void
732 //
733 //
734 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
735 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
736 // CHECK1-NEXT: entry:
737 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
738 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
739 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
740 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
741 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
742 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
743 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
744 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
745 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
746 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
747 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
748 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
749 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
750 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
751 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
752 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
753 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
754 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
755 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
756 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
757 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
758 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
759 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
760 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
761 // CHECK1: cond.true:
762 // CHECK1-NEXT: br label [[COND_END:%.*]]
763 // CHECK1: cond.false:
764 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
765 // CHECK1-NEXT: br label [[COND_END]]
766 // CHECK1: cond.end:
767 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
768 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
769 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
770 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
771 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
772 // CHECK1: omp.inner.for.cond:
773 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
774 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
775 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
776 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
777 // CHECK1: omp.inner.for.body:
778 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
779 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
780 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
781 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
782 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
783 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
784 // CHECK1: omp.inner.for.inc:
785 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
786 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
787 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
788 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
789 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
790 // CHECK1: omp.inner.for.end:
791 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
792 // CHECK1: omp.loop.exit:
793 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
794 // CHECK1-NEXT: ret void
795 //
796 //
797 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
798 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
799 // CHECK1-NEXT: entry:
800 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
801 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
802 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
803 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
804 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
805 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
806 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
807 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
808 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
809 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
810 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
811 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
812 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
813 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
814 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
815 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
816 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
817 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
818 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
819 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
820 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
821 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
822 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
823 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
824 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
825 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
826 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
827 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
828 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
829 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
830 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
831 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
832 // CHECK1: omp.dispatch.cond:
833 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
834 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
835 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
836 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
837 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
838 // CHECK1: cond.true:
839 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
840 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
841 // CHECK1-NEXT: br label [[COND_END:%.*]]
842 // CHECK1: cond.false:
843 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
844 // CHECK1-NEXT: br label [[COND_END]]
845 // CHECK1: cond.end:
846 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
847 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
848 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
849 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
850 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
851 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
852 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
853 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
854 // CHECK1: omp.dispatch.body:
855 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
856 // CHECK1: omp.inner.for.cond:
857 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
858 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
859 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
860 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
861 // CHECK1: omp.inner.for.body:
862 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
863 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
864 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
865 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
866 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
867 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
868 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
869 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
870 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
871 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
872 // CHECK1: omp.body.continue:
873 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
874 // CHECK1: omp.inner.for.inc:
875 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
876 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
877 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
878 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
879 // CHECK1: omp.inner.for.end:
880 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
881 // CHECK1: omp.dispatch.inc:
882 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
883 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
884 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
885 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
886 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
887 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
888 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
889 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
890 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
891 // CHECK1: omp.dispatch.end:
892 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
893 // CHECK1-NEXT: ret void
894 //
895 //
896 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
897 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
898 // CHECK1-NEXT: entry:
899 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
900 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
901 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
902 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
903 // CHECK1-NEXT: ret void
904 //
905 //
906 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
907 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
908 // CHECK1-NEXT: entry:
909 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
910 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
911 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
912 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
913 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
914 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
915 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
916 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
917 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
918 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
919 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
920 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
921 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
922 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
923 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
924 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
925 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
926 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
927 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
928 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
929 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
930 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
931 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
932 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
933 // CHECK1: cond.true:
934 // CHECK1-NEXT: br label [[COND_END:%.*]]
935 // CHECK1: cond.false:
936 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
937 // CHECK1-NEXT: br label [[COND_END]]
938 // CHECK1: cond.end:
939 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
940 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
941 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
942 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
943 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
944 // CHECK1: omp.inner.for.cond:
945 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
946 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
947 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
948 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
949 // CHECK1: omp.inner.for.body:
950 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
951 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
952 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
953 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
954 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
955 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
956 // CHECK1: omp.inner.for.inc:
957 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
958 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
959 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
960 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
961 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
962 // CHECK1: omp.inner.for.end:
963 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
964 // CHECK1: omp.loop.exit:
965 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
966 // CHECK1-NEXT: ret void
967 //
968 //
969 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
970 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
971 // CHECK1-NEXT: entry:
972 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
973 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
974 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
975 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
976 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
977 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
978 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
979 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
980 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
981 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
982 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
983 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
984 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
985 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
986 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
987 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
988 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
989 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
990 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
991 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
992 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
993 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
994 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
995 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
996 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
997 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
998 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
999 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1000 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1001 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1002 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1003 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1004 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1005 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1006 // CHECK1: omp.dispatch.cond:
1007 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1008 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1009 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1010 // CHECK1: omp.dispatch.body:
1011 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1012 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1013 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1014 // CHECK1: omp.inner.for.cond:
1015 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1016 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
1017 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1018 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1019 // CHECK1: omp.inner.for.body:
1020 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1021 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1022 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1023 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
1024 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1025 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
1026 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1027 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1028 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
1029 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1030 // CHECK1: omp.body.continue:
1031 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1032 // CHECK1: omp.inner.for.inc:
1033 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1034 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1035 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1036 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1037 // CHECK1: omp.inner.for.end:
1038 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1039 // CHECK1: omp.dispatch.inc:
1040 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1041 // CHECK1: omp.dispatch.end:
1042 // CHECK1-NEXT: ret void
1043 //
1044 //
1045 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
1046 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1047 // CHECK1-NEXT: entry:
1048 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1049 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1050 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1051 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1052 // CHECK1-NEXT: ret void
1053 //
1054 //
1055 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1056 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1057 // CHECK1-NEXT: entry:
1058 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1059 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1060 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1061 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1062 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1063 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1064 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1065 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1066 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1067 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1068 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1069 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1070 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1071 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1072 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1073 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1074 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1075 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1076 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1078 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1079 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1080 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1081 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1082 // CHECK1: cond.true:
1083 // CHECK1-NEXT: br label [[COND_END:%.*]]
1084 // CHECK1: cond.false:
1085 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1086 // CHECK1-NEXT: br label [[COND_END]]
1087 // CHECK1: cond.end:
1088 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1089 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1090 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1091 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1092 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1093 // CHECK1: omp.inner.for.cond:
1094 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1095 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1096 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1097 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1098 // CHECK1: omp.inner.for.body:
1099 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1100 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1101 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1102 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1103 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1104 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1105 // CHECK1: omp.inner.for.inc:
1106 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1107 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1108 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1109 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1110 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1111 // CHECK1: omp.inner.for.end:
1112 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1113 // CHECK1: omp.loop.exit:
1114 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1115 // CHECK1-NEXT: ret void
1116 //
1117 //
1118 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1119 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1120 // CHECK1-NEXT: entry:
1121 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1122 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1123 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1124 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1125 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1126 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1127 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1128 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1129 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1130 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1131 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1132 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1133 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1134 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1135 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1136 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1137 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1138 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1139 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1140 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1141 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1142 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1143 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1144 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1145 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1146 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1147 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1148 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1149 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1150 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1151 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1152 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1153 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1154 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1155 // CHECK1: omp.dispatch.cond:
1156 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1157 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1158 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1159 // CHECK1: omp.dispatch.body:
1160 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1161 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1162 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1163 // CHECK1: omp.inner.for.cond:
1164 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1165 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1166 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1167 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1168 // CHECK1: omp.inner.for.body:
1169 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1170 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1171 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1172 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1173 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1174 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1175 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1176 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1177 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
1178 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1179 // CHECK1: omp.body.continue:
1180 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1181 // CHECK1: omp.inner.for.inc:
1182 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1183 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1184 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1185 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1186 // CHECK1: omp.inner.for.end:
1187 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1188 // CHECK1: omp.dispatch.inc:
1189 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1190 // CHECK1: omp.dispatch.end:
1191 // CHECK1-NEXT: ret void
1192 //
1193 //
1194 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1195 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1196 // CHECK1-NEXT: entry:
1197 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1198 // CHECK1-NEXT: ret void
1199 //
1200 //
1201 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1202 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1203 // CHECK3-NEXT: entry:
1204 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1205 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
1206 // CHECK3-NEXT: ret i32 [[CALL]]
1207 //
1208 //
1209 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1210 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1211 // CHECK3-NEXT: entry:
1212 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1213 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1214 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1215 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1216 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1217 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1218 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1219 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1220 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
1221 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
1222 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
1223 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
1224 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
1225 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 4
1226 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 4
1227 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 4
1228 // CHECK3-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
1229 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 4
1230 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 4
1231 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 4
1232 // CHECK3-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
1233 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1234 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1235 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1236 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1237 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1238 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
1239 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1240 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1241 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
1242 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1243 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
1244 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1245 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1246 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1247 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1248 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
1249 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1250 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
1251 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1252 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1253 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1254 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1255 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1256 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
1257 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1258 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
1259 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1260 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
1261 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1262 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
1263 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1264 // CHECK3-NEXT: store i64 123, i64* [[TMP15]], align 8
1265 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1266 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1267 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1268 // CHECK3: omp_offload.failed:
1269 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1270 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1271 // CHECK3: omp_offload.cont:
1272 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1273 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1274 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1275 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
1276 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1277 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1278 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
1279 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1280 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
1281 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1282 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1283 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1284 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
1285 // CHECK3-NEXT: store i32 1, i32* [[TMP25]], align 4
1286 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
1287 // CHECK3-NEXT: store i32 1, i32* [[TMP26]], align 4
1288 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
1289 // CHECK3-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
1290 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
1291 // CHECK3-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
1292 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
1293 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 4
1294 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
1295 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 4
1296 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
1297 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 4
1298 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
1299 // CHECK3-NEXT: store i8** null, i8*** [[TMP32]], align 4
1300 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
1301 // CHECK3-NEXT: store i64 123, i64* [[TMP33]], align 8
1302 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
1303 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1304 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
1305 // CHECK3: omp_offload.failed8:
1306 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
1307 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
1308 // CHECK3: omp_offload.cont9:
1309 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1310 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1311 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
1312 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
1313 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1314 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
1315 // CHECK3-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
1316 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
1317 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4
1318 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1319 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1320 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1321 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
1322 // CHECK3-NEXT: store i32 1, i32* [[TMP43]], align 4
1323 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
1324 // CHECK3-NEXT: store i32 1, i32* [[TMP44]], align 4
1325 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
1326 // CHECK3-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
1327 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
1328 // CHECK3-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
1329 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
1330 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 4
1331 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
1332 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 4
1333 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
1334 // CHECK3-NEXT: store i8** null, i8*** [[TMP49]], align 4
1335 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
1336 // CHECK3-NEXT: store i8** null, i8*** [[TMP50]], align 4
1337 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
1338 // CHECK3-NEXT: store i64 123, i64* [[TMP51]], align 8
1339 // CHECK3-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
1340 // CHECK3-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
1341 // CHECK3-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1342 // CHECK3: omp_offload.failed16:
1343 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
1344 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]
1345 // CHECK3: omp_offload.cont17:
1346 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1347 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1348 // CHECK3-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
1349 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 4
1350 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1351 // CHECK3-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
1352 // CHECK3-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 4
1353 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
1354 // CHECK3-NEXT: store i8* null, i8** [[TMP58]], align 4
1355 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1356 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1357 // CHECK3-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1358 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
1359 // CHECK3-NEXT: store i32 1, i32* [[TMP61]], align 4
1360 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
1361 // CHECK3-NEXT: store i32 1, i32* [[TMP62]], align 4
1362 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
1363 // CHECK3-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 4
1364 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
1365 // CHECK3-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 4
1366 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
1367 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 4
1368 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
1369 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 4
1370 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
1371 // CHECK3-NEXT: store i8** null, i8*** [[TMP67]], align 4
1372 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
1373 // CHECK3-NEXT: store i8** null, i8*** [[TMP68]], align 4
1374 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
1375 // CHECK3-NEXT: store i64 123, i64* [[TMP69]], align 8
1376 // CHECK3-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
1377 // CHECK3-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
1378 // CHECK3-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
1379 // CHECK3: omp_offload.failed24:
1380 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
1381 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT25]]
1382 // CHECK3: omp_offload.cont25:
1383 // CHECK3-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1384 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1385 // CHECK3-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
1386 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 4
1387 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1388 // CHECK3-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
1389 // CHECK3-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 4
1390 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
1391 // CHECK3-NEXT: store i8* null, i8** [[TMP76]], align 4
1392 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1393 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1394 // CHECK3-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1395 // CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
1396 // CHECK3-NEXT: store i32 1, i32* [[TMP79]], align 4
1397 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
1398 // CHECK3-NEXT: store i32 1, i32* [[TMP80]], align 4
1399 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
1400 // CHECK3-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 4
1401 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
1402 // CHECK3-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 4
1403 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
1404 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 4
1405 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
1406 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 4
1407 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
1408 // CHECK3-NEXT: store i8** null, i8*** [[TMP85]], align 4
1409 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
1410 // CHECK3-NEXT: store i8** null, i8*** [[TMP86]], align 4
1411 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
1412 // CHECK3-NEXT: store i64 123, i64* [[TMP87]], align 8
1413 // CHECK3-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
1414 // CHECK3-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
1415 // CHECK3-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
1416 // CHECK3: omp_offload.failed32:
1417 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
1418 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT33]]
1419 // CHECK3: omp_offload.cont33:
1420 // CHECK3-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1421 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i32 0, i32 0
1422 // CHECK3-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1423 // CHECK3-NEXT: ret i32 [[TMP90]]
1424 //
1425 //
1426 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1427 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1428 // CHECK3-NEXT: entry:
1429 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1430 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1431 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1432 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1433 // CHECK3-NEXT: ret void
1434 //
1435 //
1436 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1437 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1438 // CHECK3-NEXT: entry:
1439 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1440 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1441 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1442 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1443 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1444 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1445 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1446 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1447 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1448 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1449 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1450 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1451 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1452 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1453 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1454 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1455 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1456 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1457 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1458 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1459 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1460 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1461 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1462 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1463 // CHECK3: cond.true:
1464 // CHECK3-NEXT: br label [[COND_END:%.*]]
1465 // CHECK3: cond.false:
1466 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1467 // CHECK3-NEXT: br label [[COND_END]]
1468 // CHECK3: cond.end:
1469 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1470 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1471 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1472 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1473 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1474 // CHECK3: omp.inner.for.cond:
1475 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1476 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1477 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1478 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1479 // CHECK3: omp.inner.for.body:
1480 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1481 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1482 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1483 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1484 // CHECK3: omp.inner.for.inc:
1485 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1486 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1487 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1488 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1489 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1490 // CHECK3: omp.inner.for.end:
1491 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1492 // CHECK3: omp.loop.exit:
1493 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1494 // CHECK3-NEXT: ret void
1495 //
1496 //
1497 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1498 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1499 // CHECK3-NEXT: entry:
1500 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1501 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1502 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1503 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1504 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1505 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1506 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1507 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1508 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1509 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1510 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1511 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1512 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1513 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1514 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1515 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1516 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1517 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1518 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1519 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1520 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1521 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1522 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1523 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1524 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1525 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1526 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1527 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1528 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1529 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1530 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1531 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1532 // CHECK3: cond.true:
1533 // CHECK3-NEXT: br label [[COND_END:%.*]]
1534 // CHECK3: cond.false:
1535 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1536 // CHECK3-NEXT: br label [[COND_END]]
1537 // CHECK3: cond.end:
1538 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1539 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1540 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1541 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1542 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1543 // CHECK3: omp.inner.for.cond:
1544 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1545 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1546 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1547 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1548 // CHECK3: omp.inner.for.body:
1549 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1550 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1551 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1552 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1553 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1554 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1555 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1556 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1557 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1558 // CHECK3: omp.body.continue:
1559 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1560 // CHECK3: omp.inner.for.inc:
1561 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1562 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1563 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1564 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1565 // CHECK3: omp.inner.for.end:
1566 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1567 // CHECK3: omp.loop.exit:
1568 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1569 // CHECK3-NEXT: ret void
1570 //
1571 //
1572 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1573 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1574 // CHECK3-NEXT: entry:
1575 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1576 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1577 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1578 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1579 // CHECK3-NEXT: ret void
1580 //
1581 //
1582 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1583 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1584 // CHECK3-NEXT: entry:
1585 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1586 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1587 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1588 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1589 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1590 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1591 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1592 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1593 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1594 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1595 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1596 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1597 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1598 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1599 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1600 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1601 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1602 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1603 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1604 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1605 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1606 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1607 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1608 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1609 // CHECK3: cond.true:
1610 // CHECK3-NEXT: br label [[COND_END:%.*]]
1611 // CHECK3: cond.false:
1612 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1613 // CHECK3-NEXT: br label [[COND_END]]
1614 // CHECK3: cond.end:
1615 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1616 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1617 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1618 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1619 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1620 // CHECK3: omp.inner.for.cond:
1621 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1622 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1623 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1624 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1625 // CHECK3: omp.inner.for.body:
1626 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1627 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1628 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1629 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1630 // CHECK3: omp.inner.for.inc:
1631 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1632 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1633 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1634 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1635 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1636 // CHECK3: omp.inner.for.end:
1637 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1638 // CHECK3: omp.loop.exit:
1639 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1640 // CHECK3-NEXT: ret void
1641 //
1642 //
1643 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1644 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1645 // CHECK3-NEXT: entry:
1646 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1647 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1648 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1649 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1650 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1651 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1652 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1653 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1654 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1655 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1656 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1657 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1658 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1659 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1660 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1661 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1662 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1663 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1664 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1665 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1666 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1667 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1668 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1669 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1670 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1671 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1672 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1673 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1674 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1675 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1676 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1677 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1678 // CHECK3: cond.true:
1679 // CHECK3-NEXT: br label [[COND_END:%.*]]
1680 // CHECK3: cond.false:
1681 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1682 // CHECK3-NEXT: br label [[COND_END]]
1683 // CHECK3: cond.end:
1684 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1685 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1686 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1687 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1688 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1689 // CHECK3: omp.inner.for.cond:
1690 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1691 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1692 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1693 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1694 // CHECK3: omp.inner.for.body:
1695 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1696 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1697 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1698 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1699 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1700 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1701 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1702 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1703 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1704 // CHECK3: omp.body.continue:
1705 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1706 // CHECK3: omp.inner.for.inc:
1707 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1708 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1709 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1710 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1711 // CHECK3: omp.inner.for.end:
1712 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1713 // CHECK3: omp.loop.exit:
1714 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1715 // CHECK3-NEXT: ret void
1716 //
1717 //
1718 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
1719 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1720 // CHECK3-NEXT: entry:
1721 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1722 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1723 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1724 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1725 // CHECK3-NEXT: ret void
1726 //
1727 //
1728 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
1729 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1730 // CHECK3-NEXT: entry:
1731 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1732 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1733 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1734 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1735 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1736 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1737 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1738 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1739 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1740 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1741 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1742 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1743 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1744 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1745 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1746 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1747 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1748 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1749 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1750 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1751 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1752 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1753 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1754 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1755 // CHECK3: cond.true:
1756 // CHECK3-NEXT: br label [[COND_END:%.*]]
1757 // CHECK3: cond.false:
1758 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1759 // CHECK3-NEXT: br label [[COND_END]]
1760 // CHECK3: cond.end:
1761 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1762 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1763 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1764 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1765 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1766 // CHECK3: omp.inner.for.cond:
1767 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1768 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1769 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1770 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1771 // CHECK3: omp.inner.for.body:
1772 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1773 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1774 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1775 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1776 // CHECK3: omp.inner.for.inc:
1777 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1778 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1779 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1780 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1781 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1782 // CHECK3: omp.inner.for.end:
1783 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1784 // CHECK3: omp.loop.exit:
1785 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1786 // CHECK3-NEXT: ret void
1787 //
1788 //
1789 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
1790 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1791 // CHECK3-NEXT: entry:
1792 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1793 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1794 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1795 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1796 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1797 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1798 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1799 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1800 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1801 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1802 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1803 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1804 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1805 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1806 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1807 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1808 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1809 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1810 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1811 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1812 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1813 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1814 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1815 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1816 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1817 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1818 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1819 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1820 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1821 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1822 // CHECK3: omp.dispatch.cond:
1823 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1824 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1825 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
1826 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1827 // CHECK3: cond.true:
1828 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1829 // CHECK3-NEXT: br label [[COND_END:%.*]]
1830 // CHECK3: cond.false:
1831 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1832 // CHECK3-NEXT: br label [[COND_END]]
1833 // CHECK3: cond.end:
1834 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1835 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1836 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1837 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1838 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1839 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1840 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1841 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1842 // CHECK3: omp.dispatch.body:
1843 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1844 // CHECK3: omp.inner.for.cond:
1845 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1846 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1847 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1848 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1849 // CHECK3: omp.inner.for.body:
1850 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1851 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1852 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1853 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1854 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1855 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1856 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
1857 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1858 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1859 // CHECK3: omp.body.continue:
1860 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1861 // CHECK3: omp.inner.for.inc:
1862 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1863 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
1864 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1865 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1866 // CHECK3: omp.inner.for.end:
1867 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1868 // CHECK3: omp.dispatch.inc:
1869 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1870 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1871 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1872 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1873 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1874 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1875 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1876 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1877 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
1878 // CHECK3: omp.dispatch.end:
1879 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1880 // CHECK3-NEXT: ret void
1881 //
1882 //
1883 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
1884 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1885 // CHECK3-NEXT: entry:
1886 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1887 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1888 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1889 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1890 // CHECK3-NEXT: ret void
1891 //
1892 //
1893 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
1894 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1895 // CHECK3-NEXT: entry:
1896 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1897 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1898 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1899 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1900 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1901 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1902 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1903 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1904 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1905 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1906 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1907 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1908 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1909 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1910 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1911 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1912 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1913 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1914 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1915 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1916 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1917 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1918 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1919 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1920 // CHECK3: cond.true:
1921 // CHECK3-NEXT: br label [[COND_END:%.*]]
1922 // CHECK3: cond.false:
1923 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1924 // CHECK3-NEXT: br label [[COND_END]]
1925 // CHECK3: cond.end:
1926 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1927 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1928 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1929 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1930 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1931 // CHECK3: omp.inner.for.cond:
1932 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1933 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1934 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1935 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1936 // CHECK3: omp.inner.for.body:
1937 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1938 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1939 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1940 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1941 // CHECK3: omp.inner.for.inc:
1942 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1943 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1944 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1945 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1946 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1947 // CHECK3: omp.inner.for.end:
1948 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1949 // CHECK3: omp.loop.exit:
1950 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1951 // CHECK3-NEXT: ret void
1952 //
1953 //
1954 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
1955 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1956 // CHECK3-NEXT: entry:
1957 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1958 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1959 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1960 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1961 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1962 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1963 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1964 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1965 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1966 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1967 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1968 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1969 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1970 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1971 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1972 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1973 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1974 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1975 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1976 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1977 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1978 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1979 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1980 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1981 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1982 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1983 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1984 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1985 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1986 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1987 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1988 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1989 // CHECK3: omp.dispatch.cond:
1990 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1991 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1992 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1993 // CHECK3: omp.dispatch.body:
1994 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1995 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1996 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1997 // CHECK3: omp.inner.for.cond:
1998 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1999 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
2000 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2001 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2002 // CHECK3: omp.inner.for.body:
2003 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2004 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2005 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2006 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
2007 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2008 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2009 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2010 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
2011 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2012 // CHECK3: omp.body.continue:
2013 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2014 // CHECK3: omp.inner.for.inc:
2015 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2016 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2017 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2018 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2019 // CHECK3: omp.inner.for.end:
2020 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2021 // CHECK3: omp.dispatch.inc:
2022 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2023 // CHECK3: omp.dispatch.end:
2024 // CHECK3-NEXT: ret void
2025 //
2026 //
2027 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
2028 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2029 // CHECK3-NEXT: entry:
2030 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2031 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2032 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2033 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2034 // CHECK3-NEXT: ret void
2035 //
2036 //
2037 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
2038 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2039 // CHECK3-NEXT: entry:
2040 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2041 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2042 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2043 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2044 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2045 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2046 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2047 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2048 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2049 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2050 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2051 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2052 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2053 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2054 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2055 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2056 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2057 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2058 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2059 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2060 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2061 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2062 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2063 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2064 // CHECK3: cond.true:
2065 // CHECK3-NEXT: br label [[COND_END:%.*]]
2066 // CHECK3: cond.false:
2067 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2068 // CHECK3-NEXT: br label [[COND_END]]
2069 // CHECK3: cond.end:
2070 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2071 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2072 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2073 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2074 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2075 // CHECK3: omp.inner.for.cond:
2076 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2077 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2078 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2079 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2080 // CHECK3: omp.inner.for.body:
2081 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2082 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2083 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2084 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2085 // CHECK3: omp.inner.for.inc:
2086 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2087 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2088 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2089 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2090 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
2091 // CHECK3: omp.inner.for.end:
2092 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2093 // CHECK3: omp.loop.exit:
2094 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2095 // CHECK3-NEXT: ret void
2096 //
2097 //
2098 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
2099 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2100 // CHECK3-NEXT: entry:
2101 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2102 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2103 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2104 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2105 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2106 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2107 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2108 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2109 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2110 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2111 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2112 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2113 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2114 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2115 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2116 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2117 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2118 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2119 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2120 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2121 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2122 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2123 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2124 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2125 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2126 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2127 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2128 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2129 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2130 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2131 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2132 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2133 // CHECK3: omp.dispatch.cond:
2134 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2135 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2136 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2137 // CHECK3: omp.dispatch.body:
2138 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2139 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2140 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2141 // CHECK3: omp.inner.for.cond:
2142 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2143 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
2144 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2145 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2146 // CHECK3: omp.inner.for.body:
2147 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2148 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2149 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2150 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
2151 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2152 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
2153 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2154 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
2155 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2156 // CHECK3: omp.body.continue:
2157 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2158 // CHECK3: omp.inner.for.inc:
2159 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2160 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2161 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2162 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2163 // CHECK3: omp.inner.for.end:
2164 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2165 // CHECK3: omp.dispatch.inc:
2166 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2167 // CHECK3: omp.dispatch.end:
2168 // CHECK3-NEXT: ret void
2169 //
2170 //
2171 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2172 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2173 // CHECK3-NEXT: entry:
2174 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
2175 // CHECK3-NEXT: ret void
2176 //
2177 //
2178 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2179 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2180 // CHECK5-NEXT: entry:
2181 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2182 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
2183 // CHECK5-NEXT: ret i32 [[CALL]]
2184 //
2185 //
2186 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2187 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2188 // CHECK5-NEXT: entry:
2189 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2190 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2191 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2192 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2193 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2194 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
2195 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
2196 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
2197 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
2198 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
2199 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
2200 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
2201 // CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
2202 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 8
2203 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 8
2204 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 8
2205 // CHECK5-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
2206 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 8
2207 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 8
2208 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 8
2209 // CHECK5-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
2210 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2211 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2212 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2213 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2214 // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2215 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
2216 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2217 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2218 // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
2219 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2220 // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 8
2221 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2222 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2223 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2224 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2225 // CHECK5-NEXT: store i32 1, i32* [[TMP7]], align 4
2226 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2227 // CHECK5-NEXT: store i32 1, i32* [[TMP8]], align 4
2228 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2229 // CHECK5-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
2230 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2231 // CHECK5-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
2232 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2233 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
2234 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2235 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
2236 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2237 // CHECK5-NEXT: store i8** null, i8*** [[TMP13]], align 8
2238 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2239 // CHECK5-NEXT: store i8** null, i8*** [[TMP14]], align 8
2240 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2241 // CHECK5-NEXT: store i64 123, i64* [[TMP15]], align 8
2242 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2243 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2244 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2245 // CHECK5: omp_offload.failed:
2246 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2247 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
2248 // CHECK5: omp_offload.cont:
2249 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2250 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2251 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2252 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
2253 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2254 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2255 // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
2256 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
2257 // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 8
2258 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2259 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2260 // CHECK5-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2261 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
2262 // CHECK5-NEXT: store i32 1, i32* [[TMP25]], align 4
2263 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
2264 // CHECK5-NEXT: store i32 1, i32* [[TMP26]], align 4
2265 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
2266 // CHECK5-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
2267 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
2268 // CHECK5-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
2269 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
2270 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 8
2271 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
2272 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 8
2273 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
2274 // CHECK5-NEXT: store i8** null, i8*** [[TMP31]], align 8
2275 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
2276 // CHECK5-NEXT: store i8** null, i8*** [[TMP32]], align 8
2277 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
2278 // CHECK5-NEXT: store i64 123, i64* [[TMP33]], align 8
2279 // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
2280 // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2281 // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
2282 // CHECK5: omp_offload.failed8:
2283 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2284 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT9]]
2285 // CHECK5: omp_offload.cont9:
2286 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2287 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2288 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
2289 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
2290 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2291 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
2292 // CHECK5-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
2293 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
2294 // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 8
2295 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2296 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2297 // CHECK5-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2298 // CHECK5-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
2299 // CHECK5-NEXT: store i32 1, i32* [[TMP43]], align 4
2300 // CHECK5-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
2301 // CHECK5-NEXT: store i32 1, i32* [[TMP44]], align 4
2302 // CHECK5-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
2303 // CHECK5-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
2304 // CHECK5-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
2305 // CHECK5-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
2306 // CHECK5-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
2307 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 8
2308 // CHECK5-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
2309 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 8
2310 // CHECK5-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
2311 // CHECK5-NEXT: store i8** null, i8*** [[TMP49]], align 8
2312 // CHECK5-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
2313 // CHECK5-NEXT: store i8** null, i8*** [[TMP50]], align 8
2314 // CHECK5-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
2315 // CHECK5-NEXT: store i64 123, i64* [[TMP51]], align 8
2316 // CHECK5-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
2317 // CHECK5-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
2318 // CHECK5-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2319 // CHECK5: omp_offload.failed16:
2320 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
2321 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2322 // CHECK5: omp_offload.cont17:
2323 // CHECK5-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2324 // CHECK5-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2325 // CHECK5-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
2326 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 8
2327 // CHECK5-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2328 // CHECK5-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
2329 // CHECK5-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 8
2330 // CHECK5-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
2331 // CHECK5-NEXT: store i8* null, i8** [[TMP58]], align 8
2332 // CHECK5-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2333 // CHECK5-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2334 // CHECK5-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2335 // CHECK5-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
2336 // CHECK5-NEXT: store i32 1, i32* [[TMP61]], align 4
2337 // CHECK5-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
2338 // CHECK5-NEXT: store i32 1, i32* [[TMP62]], align 4
2339 // CHECK5-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
2340 // CHECK5-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 8
2341 // CHECK5-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
2342 // CHECK5-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 8
2343 // CHECK5-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
2344 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 8
2345 // CHECK5-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
2346 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 8
2347 // CHECK5-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
2348 // CHECK5-NEXT: store i8** null, i8*** [[TMP67]], align 8
2349 // CHECK5-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
2350 // CHECK5-NEXT: store i8** null, i8*** [[TMP68]], align 8
2351 // CHECK5-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
2352 // CHECK5-NEXT: store i64 123, i64* [[TMP69]], align 8
2353 // CHECK5-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
2354 // CHECK5-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
2355 // CHECK5-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
2356 // CHECK5: omp_offload.failed24:
2357 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
2358 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT25]]
2359 // CHECK5: omp_offload.cont25:
2360 // CHECK5-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2361 // CHECK5-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2362 // CHECK5-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
2363 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 8
2364 // CHECK5-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2365 // CHECK5-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
2366 // CHECK5-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 8
2367 // CHECK5-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
2368 // CHECK5-NEXT: store i8* null, i8** [[TMP76]], align 8
2369 // CHECK5-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2370 // CHECK5-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2371 // CHECK5-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2372 // CHECK5-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
2373 // CHECK5-NEXT: store i32 1, i32* [[TMP79]], align 4
2374 // CHECK5-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
2375 // CHECK5-NEXT: store i32 1, i32* [[TMP80]], align 4
2376 // CHECK5-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
2377 // CHECK5-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 8
2378 // CHECK5-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
2379 // CHECK5-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 8
2380 // CHECK5-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
2381 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 8
2382 // CHECK5-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
2383 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 8
2384 // CHECK5-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
2385 // CHECK5-NEXT: store i8** null, i8*** [[TMP85]], align 8
2386 // CHECK5-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
2387 // CHECK5-NEXT: store i8** null, i8*** [[TMP86]], align 8
2388 // CHECK5-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
2389 // CHECK5-NEXT: store i64 123, i64* [[TMP87]], align 8
2390 // CHECK5-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
2391 // CHECK5-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
2392 // CHECK5-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2393 // CHECK5: omp_offload.failed32:
2394 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
2395 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT33]]
2396 // CHECK5: omp_offload.cont33:
2397 // CHECK5-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2398 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i64 0, i64 0
2399 // CHECK5-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2400 // CHECK5-NEXT: ret i32 [[TMP90]]
2401 //
2402 //
2403 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
2404 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2405 // CHECK5-NEXT: entry:
2406 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2407 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2408 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2409 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2410 // CHECK5-NEXT: ret void
2411 //
2412 //
2413 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
2414 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2415 // CHECK5-NEXT: entry:
2416 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2417 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2418 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2419 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2420 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2421 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2422 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2423 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2424 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2425 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2426 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2427 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2428 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2429 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2430 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2431 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2432 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2433 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2434 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2435 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2436 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2437 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2438 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2439 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2440 // CHECK5: cond.true:
2441 // CHECK5-NEXT: br label [[COND_END:%.*]]
2442 // CHECK5: cond.false:
2443 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2444 // CHECK5-NEXT: br label [[COND_END]]
2445 // CHECK5: cond.end:
2446 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2447 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2448 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2449 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2450 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2451 // CHECK5: omp.inner.for.cond:
2452 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2453 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2454 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2455 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2456 // CHECK5: omp.inner.for.body:
2457 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2458 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2459 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2460 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2461 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2462 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2463 // CHECK5: omp.inner.for.inc:
2464 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2465 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2466 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2467 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2468 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2469 // CHECK5: omp.inner.for.end:
2470 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2471 // CHECK5: omp.loop.exit:
2472 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2473 // CHECK5-NEXT: ret void
2474 //
2475 //
2476 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
2477 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2478 // CHECK5-NEXT: entry:
2479 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2480 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2481 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2482 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2483 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2484 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2485 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2486 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2487 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2488 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2489 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2490 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2491 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2492 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2493 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2494 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2495 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2496 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2497 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2498 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2499 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2500 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2501 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2502 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2503 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2504 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2505 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2506 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2507 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2508 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2509 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2510 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2511 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2512 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2513 // CHECK5: cond.true:
2514 // CHECK5-NEXT: br label [[COND_END:%.*]]
2515 // CHECK5: cond.false:
2516 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2517 // CHECK5-NEXT: br label [[COND_END]]
2518 // CHECK5: cond.end:
2519 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2520 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2521 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2522 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2523 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2524 // CHECK5: omp.inner.for.cond:
2525 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2526 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2527 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2528 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2529 // CHECK5: omp.inner.for.body:
2530 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2531 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2532 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2533 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2534 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2535 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2536 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2537 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2538 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2539 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2540 // CHECK5: omp.body.continue:
2541 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2542 // CHECK5: omp.inner.for.inc:
2543 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2544 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2545 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2546 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2547 // CHECK5: omp.inner.for.end:
2548 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2549 // CHECK5: omp.loop.exit:
2550 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2551 // CHECK5-NEXT: ret void
2552 //
2553 //
2554 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2555 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2556 // CHECK5-NEXT: entry:
2557 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2558 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2559 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2560 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2561 // CHECK5-NEXT: ret void
2562 //
2563 //
2564 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
2565 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2566 // CHECK5-NEXT: entry:
2567 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2568 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2569 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2570 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2571 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2572 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2573 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2574 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2575 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2576 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2577 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2578 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2579 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2580 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2581 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2582 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2583 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2584 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2585 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2586 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2587 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2588 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2589 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2590 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2591 // CHECK5: cond.true:
2592 // CHECK5-NEXT: br label [[COND_END:%.*]]
2593 // CHECK5: cond.false:
2594 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2595 // CHECK5-NEXT: br label [[COND_END]]
2596 // CHECK5: cond.end:
2597 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2598 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2599 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2600 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2601 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2602 // CHECK5: omp.inner.for.cond:
2603 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2604 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2605 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2606 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2607 // CHECK5: omp.inner.for.body:
2608 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2609 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2610 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2611 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2612 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2613 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2614 // CHECK5: omp.inner.for.inc:
2615 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2616 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2617 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2618 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2619 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2620 // CHECK5: omp.inner.for.end:
2621 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2622 // CHECK5: omp.loop.exit:
2623 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2624 // CHECK5-NEXT: ret void
2625 //
2626 //
2627 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
2628 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2629 // CHECK5-NEXT: entry:
2630 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2631 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2632 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2633 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2634 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2635 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2636 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2637 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2638 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2639 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2640 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2641 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2642 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2643 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2644 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2645 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2646 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2647 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2648 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2649 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2650 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2651 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2652 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2653 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2654 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2655 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2656 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2657 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2658 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2659 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2660 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2661 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2662 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2663 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2664 // CHECK5: cond.true:
2665 // CHECK5-NEXT: br label [[COND_END:%.*]]
2666 // CHECK5: cond.false:
2667 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2668 // CHECK5-NEXT: br label [[COND_END]]
2669 // CHECK5: cond.end:
2670 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2671 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2672 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2673 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2674 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2675 // CHECK5: omp.inner.for.cond:
2676 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2677 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2678 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2679 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2680 // CHECK5: omp.inner.for.body:
2681 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2682 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2683 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2684 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2685 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2686 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2687 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2688 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2689 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2690 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2691 // CHECK5: omp.body.continue:
2692 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2693 // CHECK5: omp.inner.for.inc:
2694 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2695 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2696 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2697 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2698 // CHECK5: omp.inner.for.end:
2699 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2700 // CHECK5: omp.loop.exit:
2701 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2702 // CHECK5-NEXT: ret void
2703 //
2704 //
2705 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
2706 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2707 // CHECK5-NEXT: entry:
2708 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2709 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2710 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2711 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2712 // CHECK5-NEXT: ret void
2713 //
2714 //
2715 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
2716 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2717 // CHECK5-NEXT: entry:
2718 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2719 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2720 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2721 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2722 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2723 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2724 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2725 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2726 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2727 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2728 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2729 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2730 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2731 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2732 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2733 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2734 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2735 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2736 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2737 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2738 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2739 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2740 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2741 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2742 // CHECK5: cond.true:
2743 // CHECK5-NEXT: br label [[COND_END:%.*]]
2744 // CHECK5: cond.false:
2745 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2746 // CHECK5-NEXT: br label [[COND_END]]
2747 // CHECK5: cond.end:
2748 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2749 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2750 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2751 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2752 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2753 // CHECK5: omp.inner.for.cond:
2754 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2755 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2756 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2757 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2758 // CHECK5: omp.inner.for.body:
2759 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2760 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2761 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2762 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2763 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2764 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2765 // CHECK5: omp.inner.for.inc:
2766 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2767 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2768 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2769 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2770 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2771 // CHECK5: omp.inner.for.end:
2772 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2773 // CHECK5: omp.loop.exit:
2774 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2775 // CHECK5-NEXT: ret void
2776 //
2777 //
2778 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
2779 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2780 // CHECK5-NEXT: entry:
2781 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2782 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2783 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2784 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2785 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2786 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2787 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2788 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2789 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2790 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2791 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2792 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2793 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2794 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2795 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2796 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2797 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2798 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2799 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2800 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2801 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2802 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2803 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2804 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2805 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2806 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2807 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2808 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2809 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2810 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2811 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
2812 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2813 // CHECK5: omp.dispatch.cond:
2814 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2815 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2816 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
2817 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
2818 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2819 // CHECK5: cond.true:
2820 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2821 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
2822 // CHECK5-NEXT: br label [[COND_END:%.*]]
2823 // CHECK5: cond.false:
2824 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2825 // CHECK5-NEXT: br label [[COND_END]]
2826 // CHECK5: cond.end:
2827 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2828 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2829 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2830 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2831 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2832 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2833 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2834 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2835 // CHECK5: omp.dispatch.body:
2836 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2837 // CHECK5: omp.inner.for.cond:
2838 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2839 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2840 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2841 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2842 // CHECK5: omp.inner.for.body:
2843 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2844 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2845 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2846 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2847 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2848 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2849 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2850 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2851 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2852 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2853 // CHECK5: omp.body.continue:
2854 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2855 // CHECK5: omp.inner.for.inc:
2856 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2857 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
2858 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2859 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2860 // CHECK5: omp.inner.for.end:
2861 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2862 // CHECK5: omp.dispatch.inc:
2863 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2864 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2865 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2866 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
2867 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2868 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2869 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2870 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
2871 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
2872 // CHECK5: omp.dispatch.end:
2873 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2874 // CHECK5-NEXT: ret void
2875 //
2876 //
2877 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
2878 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2879 // CHECK5-NEXT: entry:
2880 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2881 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2882 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2883 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2884 // CHECK5-NEXT: ret void
2885 //
2886 //
2887 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
2888 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2889 // CHECK5-NEXT: entry:
2890 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2891 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2892 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2893 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2894 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2895 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2896 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2897 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2898 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2899 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2900 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2901 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2902 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2903 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2904 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2905 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2906 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2907 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2908 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2909 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2910 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2911 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2912 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2913 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2914 // CHECK5: cond.true:
2915 // CHECK5-NEXT: br label [[COND_END:%.*]]
2916 // CHECK5: cond.false:
2917 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2918 // CHECK5-NEXT: br label [[COND_END]]
2919 // CHECK5: cond.end:
2920 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2921 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2922 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2923 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2924 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2925 // CHECK5: omp.inner.for.cond:
2926 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2927 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2928 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2929 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2930 // CHECK5: omp.inner.for.body:
2931 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2932 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2933 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2934 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2935 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2936 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2937 // CHECK5: omp.inner.for.inc:
2938 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2939 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2940 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2941 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2942 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2943 // CHECK5: omp.inner.for.end:
2944 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2945 // CHECK5: omp.loop.exit:
2946 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2947 // CHECK5-NEXT: ret void
2948 //
2949 //
2950 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
2951 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2952 // CHECK5-NEXT: entry:
2953 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2954 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2955 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2956 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2957 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2958 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2959 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2960 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2961 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2962 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2963 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2964 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2965 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2966 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2967 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2968 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2969 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2970 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2971 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2972 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2973 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2974 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2975 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2976 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2977 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2978 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2979 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2980 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2981 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2982 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2983 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2984 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2985 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2986 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2987 // CHECK5: omp.dispatch.cond:
2988 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2989 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2990 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2991 // CHECK5: omp.dispatch.body:
2992 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2993 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2994 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2995 // CHECK5: omp.inner.for.cond:
2996 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2997 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
2998 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2999 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3000 // CHECK5: omp.inner.for.body:
3001 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3002 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3003 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3004 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
3005 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3006 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
3007 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3008 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3009 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
3010 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3011 // CHECK5: omp.body.continue:
3012 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3013 // CHECK5: omp.inner.for.inc:
3014 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3015 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3016 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3017 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3018 // CHECK5: omp.inner.for.end:
3019 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3020 // CHECK5: omp.dispatch.inc:
3021 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
3022 // CHECK5: omp.dispatch.end:
3023 // CHECK5-NEXT: ret void
3024 //
3025 //
3026 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
3027 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3028 // CHECK5-NEXT: entry:
3029 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3030 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3031 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3032 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3033 // CHECK5-NEXT: ret void
3034 //
3035 //
3036 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
3037 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3038 // CHECK5-NEXT: entry:
3039 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3040 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3041 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3042 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3043 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3044 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3045 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3046 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3047 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3048 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3049 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3050 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3051 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3052 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3053 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3054 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3055 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3056 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3057 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3058 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3059 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3060 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3061 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3062 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3063 // CHECK5: cond.true:
3064 // CHECK5-NEXT: br label [[COND_END:%.*]]
3065 // CHECK5: cond.false:
3066 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3067 // CHECK5-NEXT: br label [[COND_END]]
3068 // CHECK5: cond.end:
3069 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3070 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3071 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3072 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3073 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3074 // CHECK5: omp.inner.for.cond:
3075 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3076 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3077 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3078 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3079 // CHECK5: omp.inner.for.body:
3080 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3081 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3082 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3083 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3084 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
3085 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3086 // CHECK5: omp.inner.for.inc:
3087 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3088 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3089 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3090 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3091 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3092 // CHECK5: omp.inner.for.end:
3093 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3094 // CHECK5: omp.loop.exit:
3095 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3096 // CHECK5-NEXT: ret void
3097 //
3098 //
3099 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
3100 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3101 // CHECK5-NEXT: entry:
3102 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3103 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3104 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3105 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3106 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3107 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3108 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3109 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3110 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3111 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3112 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3113 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3114 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3115 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3116 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3117 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3118 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3119 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3120 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3121 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3122 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3123 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3124 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3125 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3126 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3127 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3128 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3129 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3130 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3131 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3132 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3133 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3134 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3135 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3136 // CHECK5: omp.dispatch.cond:
3137 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3138 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3139 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3140 // CHECK5: omp.dispatch.body:
3141 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3142 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3143 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3144 // CHECK5: omp.inner.for.cond:
3145 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3146 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
3147 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3148 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3149 // CHECK5: omp.inner.for.body:
3150 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3151 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3152 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3153 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
3154 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3155 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
3156 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3157 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3158 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
3159 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3160 // CHECK5: omp.body.continue:
3161 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3162 // CHECK5: omp.inner.for.inc:
3163 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3164 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3165 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3166 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3167 // CHECK5: omp.inner.for.end:
3168 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3169 // CHECK5: omp.dispatch.inc:
3170 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
3171 // CHECK5: omp.dispatch.end:
3172 // CHECK5-NEXT: ret void
3173 //
3174 //
3175 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3176 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3177 // CHECK5-NEXT: entry:
3178 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
3179 // CHECK5-NEXT: ret void
3180 //
3181 //
3182 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3183 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3184 // CHECK7-NEXT: entry:
3185 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3186 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
3187 // CHECK7-NEXT: ret i32 [[CALL]]
3188 //
3189 //
3190 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3191 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3192 // CHECK7-NEXT: entry:
3193 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3194 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3195 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3196 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3197 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3198 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
3199 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
3200 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
3201 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
3202 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
3203 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
3204 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
3205 // CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
3206 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 4
3207 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 4
3208 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 4
3209 // CHECK7-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
3210 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 4
3211 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 4
3212 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 4
3213 // CHECK7-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
3214 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3215 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3216 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3217 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3218 // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
3219 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
3220 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3221 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
3222 // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
3223 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3224 // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4
3225 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3226 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3227 // CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3228 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3229 // CHECK7-NEXT: store i32 1, i32* [[TMP7]], align 4
3230 // CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3231 // CHECK7-NEXT: store i32 1, i32* [[TMP8]], align 4
3232 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3233 // CHECK7-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
3234 // CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3235 // CHECK7-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
3236 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3237 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
3238 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3239 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
3240 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3241 // CHECK7-NEXT: store i8** null, i8*** [[TMP13]], align 4
3242 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3243 // CHECK7-NEXT: store i8** null, i8*** [[TMP14]], align 4
3244 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3245 // CHECK7-NEXT: store i64 123, i64* [[TMP15]], align 8
3246 // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3247 // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3248 // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3249 // CHECK7: omp_offload.failed:
3250 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3251 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
3252 // CHECK7: omp_offload.cont:
3253 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3254 // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3255 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3256 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
3257 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3258 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3259 // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
3260 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
3261 // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4
3262 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3263 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3264 // CHECK7-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3265 // CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
3266 // CHECK7-NEXT: store i32 1, i32* [[TMP25]], align 4
3267 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
3268 // CHECK7-NEXT: store i32 1, i32* [[TMP26]], align 4
3269 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
3270 // CHECK7-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
3271 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
3272 // CHECK7-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
3273 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
3274 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 4
3275 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
3276 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 4
3277 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
3278 // CHECK7-NEXT: store i8** null, i8*** [[TMP31]], align 4
3279 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
3280 // CHECK7-NEXT: store i8** null, i8*** [[TMP32]], align 4
3281 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
3282 // CHECK7-NEXT: store i64 123, i64* [[TMP33]], align 8
3283 // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
3284 // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3285 // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
3286 // CHECK7: omp_offload.failed8:
3287 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
3288 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT9]]
3289 // CHECK7: omp_offload.cont9:
3290 // CHECK7-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3291 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3292 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3293 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
3294 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3295 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3296 // CHECK7-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
3297 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
3298 // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4
3299 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3300 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3301 // CHECK7-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3302 // CHECK7-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
3303 // CHECK7-NEXT: store i32 1, i32* [[TMP43]], align 4
3304 // CHECK7-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
3305 // CHECK7-NEXT: store i32 1, i32* [[TMP44]], align 4
3306 // CHECK7-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
3307 // CHECK7-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
3308 // CHECK7-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
3309 // CHECK7-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
3310 // CHECK7-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
3311 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 4
3312 // CHECK7-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
3313 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 4
3314 // CHECK7-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
3315 // CHECK7-NEXT: store i8** null, i8*** [[TMP49]], align 4
3316 // CHECK7-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
3317 // CHECK7-NEXT: store i8** null, i8*** [[TMP50]], align 4
3318 // CHECK7-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
3319 // CHECK7-NEXT: store i64 123, i64* [[TMP51]], align 8
3320 // CHECK7-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
3321 // CHECK7-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
3322 // CHECK7-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
3323 // CHECK7: omp_offload.failed16:
3324 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(%struct.SS* [[THIS1]]) #[[ATTR2]]
3325 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT17]]
3326 // CHECK7: omp_offload.cont17:
3327 // CHECK7-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3328 // CHECK7-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3329 // CHECK7-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
3330 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 4
3331 // CHECK7-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3332 // CHECK7-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
3333 // CHECK7-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 4
3334 // CHECK7-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
3335 // CHECK7-NEXT: store i8* null, i8** [[TMP58]], align 4
3336 // CHECK7-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3337 // CHECK7-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3338 // CHECK7-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3339 // CHECK7-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
3340 // CHECK7-NEXT: store i32 1, i32* [[TMP61]], align 4
3341 // CHECK7-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
3342 // CHECK7-NEXT: store i32 1, i32* [[TMP62]], align 4
3343 // CHECK7-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
3344 // CHECK7-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 4
3345 // CHECK7-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
3346 // CHECK7-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 4
3347 // CHECK7-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
3348 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 4
3349 // CHECK7-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
3350 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 4
3351 // CHECK7-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
3352 // CHECK7-NEXT: store i8** null, i8*** [[TMP67]], align 4
3353 // CHECK7-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
3354 // CHECK7-NEXT: store i8** null, i8*** [[TMP68]], align 4
3355 // CHECK7-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
3356 // CHECK7-NEXT: store i64 123, i64* [[TMP69]], align 8
3357 // CHECK7-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
3358 // CHECK7-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
3359 // CHECK7-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
3360 // CHECK7: omp_offload.failed24:
3361 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(%struct.SS* [[THIS1]]) #[[ATTR2]]
3362 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT25]]
3363 // CHECK7: omp_offload.cont25:
3364 // CHECK7-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3365 // CHECK7-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3366 // CHECK7-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
3367 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 4
3368 // CHECK7-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3369 // CHECK7-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
3370 // CHECK7-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 4
3371 // CHECK7-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
3372 // CHECK7-NEXT: store i8* null, i8** [[TMP76]], align 4
3373 // CHECK7-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3374 // CHECK7-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3375 // CHECK7-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3376 // CHECK7-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
3377 // CHECK7-NEXT: store i32 1, i32* [[TMP79]], align 4
3378 // CHECK7-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
3379 // CHECK7-NEXT: store i32 1, i32* [[TMP80]], align 4
3380 // CHECK7-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
3381 // CHECK7-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 4
3382 // CHECK7-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
3383 // CHECK7-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 4
3384 // CHECK7-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
3385 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 4
3386 // CHECK7-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
3387 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 4
3388 // CHECK7-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
3389 // CHECK7-NEXT: store i8** null, i8*** [[TMP85]], align 4
3390 // CHECK7-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
3391 // CHECK7-NEXT: store i8** null, i8*** [[TMP86]], align 4
3392 // CHECK7-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
3393 // CHECK7-NEXT: store i64 123, i64* [[TMP87]], align 8
3394 // CHECK7-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
3395 // CHECK7-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
3396 // CHECK7-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
3397 // CHECK7: omp_offload.failed32:
3398 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(%struct.SS* [[THIS1]]) #[[ATTR2]]
3399 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT33]]
3400 // CHECK7: omp_offload.cont33:
3401 // CHECK7-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3402 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i32 0, i32 0
3403 // CHECK7-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3404 // CHECK7-NEXT: ret i32 [[TMP90]]
3405 //
3406 //
3407 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
3408 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3409 // CHECK7-NEXT: entry:
3410 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3411 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3412 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3413 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3414 // CHECK7-NEXT: ret void
3415 //
3416 //
3417 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
3418 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3419 // CHECK7-NEXT: entry:
3420 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3421 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3422 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3423 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3424 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3425 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3426 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3427 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3428 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3429 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3430 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3431 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3432 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3433 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3434 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3435 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3436 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3437 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3438 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3439 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3440 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3441 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3442 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3443 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3444 // CHECK7: cond.true:
3445 // CHECK7-NEXT: br label [[COND_END:%.*]]
3446 // CHECK7: cond.false:
3447 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3448 // CHECK7-NEXT: br label [[COND_END]]
3449 // CHECK7: cond.end:
3450 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3451 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3452 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3453 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3454 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3455 // CHECK7: omp.inner.for.cond:
3456 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3457 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3458 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3459 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3460 // CHECK7: omp.inner.for.body:
3461 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3462 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3463 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3464 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3465 // CHECK7: omp.inner.for.inc:
3466 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3467 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3468 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3469 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3470 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3471 // CHECK7: omp.inner.for.end:
3472 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3473 // CHECK7: omp.loop.exit:
3474 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3475 // CHECK7-NEXT: ret void
3476 //
3477 //
3478 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
3479 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3480 // CHECK7-NEXT: entry:
3481 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3482 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3483 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3484 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3485 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3486 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3487 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3488 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3489 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3490 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3491 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3492 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3493 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3494 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3495 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3496 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3497 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3498 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3499 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3500 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3501 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3502 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3503 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3504 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3505 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3506 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3507 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3508 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3509 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3510 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3511 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3512 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3513 // CHECK7: cond.true:
3514 // CHECK7-NEXT: br label [[COND_END:%.*]]
3515 // CHECK7: cond.false:
3516 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3517 // CHECK7-NEXT: br label [[COND_END]]
3518 // CHECK7: cond.end:
3519 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3520 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3521 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3522 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3523 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3524 // CHECK7: omp.inner.for.cond:
3525 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3526 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3527 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3528 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3529 // CHECK7: omp.inner.for.body:
3530 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3531 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3532 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3533 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3534 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3535 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3536 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3537 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3538 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3539 // CHECK7: omp.body.continue:
3540 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3541 // CHECK7: omp.inner.for.inc:
3542 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3543 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3544 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3545 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3546 // CHECK7: omp.inner.for.end:
3547 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3548 // CHECK7: omp.loop.exit:
3549 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3550 // CHECK7-NEXT: ret void
3551 //
3552 //
3553 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3554 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3555 // CHECK7-NEXT: entry:
3556 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3557 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3558 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3559 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3560 // CHECK7-NEXT: ret void
3561 //
3562 //
3563 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
3564 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3565 // CHECK7-NEXT: entry:
3566 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3567 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3568 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3569 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3570 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3571 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3572 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3573 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3574 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3575 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3576 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3577 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3578 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3579 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3580 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3581 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3582 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3583 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3584 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3585 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3586 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3587 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3588 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3589 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3590 // CHECK7: cond.true:
3591 // CHECK7-NEXT: br label [[COND_END:%.*]]
3592 // CHECK7: cond.false:
3593 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3594 // CHECK7-NEXT: br label [[COND_END]]
3595 // CHECK7: cond.end:
3596 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3597 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3598 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3599 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3600 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3601 // CHECK7: omp.inner.for.cond:
3602 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3603 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3604 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3605 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3606 // CHECK7: omp.inner.for.body:
3607 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3608 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3609 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3610 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3611 // CHECK7: omp.inner.for.inc:
3612 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3613 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3614 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3615 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3616 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3617 // CHECK7: omp.inner.for.end:
3618 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3619 // CHECK7: omp.loop.exit:
3620 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3621 // CHECK7-NEXT: ret void
3622 //
3623 //
3624 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
3625 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3626 // CHECK7-NEXT: entry:
3627 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3628 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3629 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3630 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3631 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3632 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3633 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3634 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3635 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3636 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3637 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3638 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3639 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3640 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3641 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3642 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3643 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3644 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3645 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3646 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3647 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3648 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3649 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3650 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3651 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3652 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3653 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3654 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3655 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3656 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3657 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3658 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3659 // CHECK7: cond.true:
3660 // CHECK7-NEXT: br label [[COND_END:%.*]]
3661 // CHECK7: cond.false:
3662 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3663 // CHECK7-NEXT: br label [[COND_END]]
3664 // CHECK7: cond.end:
3665 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3666 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3667 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3668 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3669 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3670 // CHECK7: omp.inner.for.cond:
3671 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3672 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3673 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3674 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3675 // CHECK7: omp.inner.for.body:
3676 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3677 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3678 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3679 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3680 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3681 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3682 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3683 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3684 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3685 // CHECK7: omp.body.continue:
3686 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3687 // CHECK7: omp.inner.for.inc:
3688 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3689 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3690 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3691 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3692 // CHECK7: omp.inner.for.end:
3693 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3694 // CHECK7: omp.loop.exit:
3695 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3696 // CHECK7-NEXT: ret void
3697 //
3698 //
3699 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
3700 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3701 // CHECK7-NEXT: entry:
3702 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3703 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3704 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3705 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3706 // CHECK7-NEXT: ret void
3707 //
3708 //
3709 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6
3710 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3711 // CHECK7-NEXT: entry:
3712 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3713 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3714 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3715 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3716 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3717 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3718 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3719 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3720 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3721 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3722 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3723 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3724 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3725 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3726 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3727 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3728 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3729 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3730 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3731 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3732 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3733 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3734 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3735 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3736 // CHECK7: cond.true:
3737 // CHECK7-NEXT: br label [[COND_END:%.*]]
3738 // CHECK7: cond.false:
3739 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3740 // CHECK7-NEXT: br label [[COND_END]]
3741 // CHECK7: cond.end:
3742 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3743 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3744 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3745 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3746 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3747 // CHECK7: omp.inner.for.cond:
3748 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3749 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3750 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3751 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3752 // CHECK7: omp.inner.for.body:
3753 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3754 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3755 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3756 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3757 // CHECK7: omp.inner.for.inc:
3758 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3759 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3760 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3761 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3762 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3763 // CHECK7: omp.inner.for.end:
3764 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3765 // CHECK7: omp.loop.exit:
3766 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3767 // CHECK7-NEXT: ret void
3768 //
3769 //
3770 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7
3771 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3772 // CHECK7-NEXT: entry:
3773 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3774 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3775 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3776 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3777 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3778 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3779 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3780 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3781 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3782 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3783 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3784 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3785 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3786 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3787 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3788 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3789 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3790 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3791 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3792 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3793 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3794 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3795 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3796 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3797 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3798 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3799 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3800 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3801 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
3802 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3803 // CHECK7: omp.dispatch.cond:
3804 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3805 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3806 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
3807 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3808 // CHECK7: cond.true:
3809 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3810 // CHECK7-NEXT: br label [[COND_END:%.*]]
3811 // CHECK7: cond.false:
3812 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3813 // CHECK7-NEXT: br label [[COND_END]]
3814 // CHECK7: cond.end:
3815 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3816 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3817 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3818 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3819 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3820 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3821 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3822 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3823 // CHECK7: omp.dispatch.body:
3824 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3825 // CHECK7: omp.inner.for.cond:
3826 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3827 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3828 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3829 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3830 // CHECK7: omp.inner.for.body:
3831 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3832 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3833 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3834 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3835 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3836 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
3837 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
3838 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3839 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3840 // CHECK7: omp.body.continue:
3841 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3842 // CHECK7: omp.inner.for.inc:
3843 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3844 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
3845 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3846 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3847 // CHECK7: omp.inner.for.end:
3848 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3849 // CHECK7: omp.dispatch.inc:
3850 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3851 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3852 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3853 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3854 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3855 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3856 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3857 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3858 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
3859 // CHECK7: omp.dispatch.end:
3860 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3861 // CHECK7-NEXT: ret void
3862 //
3863 //
3864 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
3865 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3866 // CHECK7-NEXT: entry:
3867 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3868 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3869 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3870 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3871 // CHECK7-NEXT: ret void
3872 //
3873 //
3874 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10
3875 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3876 // CHECK7-NEXT: entry:
3877 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3878 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3879 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3880 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3881 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3882 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3883 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3884 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3885 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3886 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3887 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3888 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3889 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3890 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3891 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3892 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3893 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3894 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3895 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3896 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3897 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3898 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3899 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3900 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3901 // CHECK7: cond.true:
3902 // CHECK7-NEXT: br label [[COND_END:%.*]]
3903 // CHECK7: cond.false:
3904 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3905 // CHECK7-NEXT: br label [[COND_END]]
3906 // CHECK7: cond.end:
3907 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3908 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3909 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3910 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3911 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3912 // CHECK7: omp.inner.for.cond:
3913 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3914 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3915 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3916 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3917 // CHECK7: omp.inner.for.body:
3918 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3919 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3920 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3921 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3922 // CHECK7: omp.inner.for.inc:
3923 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3924 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3925 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3926 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3927 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3928 // CHECK7: omp.inner.for.end:
3929 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3930 // CHECK7: omp.loop.exit:
3931 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3932 // CHECK7-NEXT: ret void
3933 //
3934 //
3935 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11
3936 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3937 // CHECK7-NEXT: entry:
3938 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3939 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3940 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3941 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3942 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3943 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3944 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3945 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3946 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3947 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3948 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3949 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3950 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3951 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3952 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3953 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3954 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3955 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3956 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3957 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3958 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3959 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3960 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3961 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3962 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3963 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3964 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3965 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3966 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3967 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3968 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3969 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3970 // CHECK7: omp.dispatch.cond:
3971 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3972 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3973 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3974 // CHECK7: omp.dispatch.body:
3975 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3976 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3977 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3978 // CHECK7: omp.inner.for.cond:
3979 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3980 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
3981 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3982 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3983 // CHECK7: omp.inner.for.body:
3984 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3985 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3986 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3987 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
3988 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3989 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
3990 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
3991 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
3992 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3993 // CHECK7: omp.body.continue:
3994 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3995 // CHECK7: omp.inner.for.inc:
3996 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3997 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
3998 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3999 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4000 // CHECK7: omp.inner.for.end:
4001 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4002 // CHECK7: omp.dispatch.inc:
4003 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
4004 // CHECK7: omp.dispatch.end:
4005 // CHECK7-NEXT: ret void
4006 //
4007 //
4008 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
4009 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4010 // CHECK7-NEXT: entry:
4011 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4012 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4013 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4014 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4015 // CHECK7-NEXT: ret void
4016 //
4017 //
4018 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14
4019 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4020 // CHECK7-NEXT: entry:
4021 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4022 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4023 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4024 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4025 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4026 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4027 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4028 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4029 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4030 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4031 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4032 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4033 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4034 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4035 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4036 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4037 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4038 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4039 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4040 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4041 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4042 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4043 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4044 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4045 // CHECK7: cond.true:
4046 // CHECK7-NEXT: br label [[COND_END:%.*]]
4047 // CHECK7: cond.false:
4048 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4049 // CHECK7-NEXT: br label [[COND_END]]
4050 // CHECK7: cond.end:
4051 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4052 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4053 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4054 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4055 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4056 // CHECK7: omp.inner.for.cond:
4057 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4058 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4059 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4060 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4061 // CHECK7: omp.inner.for.body:
4062 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4063 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4064 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
4065 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4066 // CHECK7: omp.inner.for.inc:
4067 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4068 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4069 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4070 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4071 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
4072 // CHECK7: omp.inner.for.end:
4073 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4074 // CHECK7: omp.loop.exit:
4075 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4076 // CHECK7-NEXT: ret void
4077 //
4078 //
4079 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15
4080 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4081 // CHECK7-NEXT: entry:
4082 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4083 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4084 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4085 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4086 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4087 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4088 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4089 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4090 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4091 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4092 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4093 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4094 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4095 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4096 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4097 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4098 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4099 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4100 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4101 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4102 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4103 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4104 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4105 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4106 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4107 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4108 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4109 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4110 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4111 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4112 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4113 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4114 // CHECK7: omp.dispatch.cond:
4115 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4116 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4117 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4118 // CHECK7: omp.dispatch.body:
4119 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4120 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4121 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4122 // CHECK7: omp.inner.for.cond:
4123 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4124 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
4125 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4126 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4127 // CHECK7: omp.inner.for.body:
4128 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4129 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4130 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4131 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
4132 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4133 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
4134 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
4135 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
4136 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4137 // CHECK7: omp.body.continue:
4138 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4139 // CHECK7: omp.inner.for.inc:
4140 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4141 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4142 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4143 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
4144 // CHECK7: omp.inner.for.end:
4145 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4146 // CHECK7: omp.dispatch.inc:
4147 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
4148 // CHECK7: omp.dispatch.end:
4149 // CHECK7-NEXT: ret void
4150 //
4151 //
4152 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4153 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
4154 // CHECK7-NEXT: entry:
4155 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1)
4156 // CHECK7-NEXT: ret void
4157 //
4158 //
4159 // CHECK13-LABEL: define {{[^@]+}}@main
4160 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4161 // CHECK13-NEXT: entry:
4162 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4163 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4164 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
4165 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
4166 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
4167 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4168 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
4169 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4170 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
4171 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
4172 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
4173 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
4174 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4175 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4176 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4177 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
4178 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
4179 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
4180 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
4181 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
4182 // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
4183 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4184 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
4185 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
4186 // CHECK13-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
4187 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4188 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [4 x i8*], align 8
4189 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [4 x i8*], align 8
4190 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [4 x i8*], align 8
4191 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES26:%.*]] = alloca [4 x i64], align 8
4192 // CHECK13-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
4193 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
4194 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_29:%.*]] = alloca i32, align 4
4195 // CHECK13-NEXT: [[N_CASTED37:%.*]] = alloca i64, align 8
4196 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS39:%.*]] = alloca [3 x i8*], align 8
4197 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS40:%.*]] = alloca [3 x i8*], align 8
4198 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS41:%.*]] = alloca [3 x i8*], align 8
4199 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES42:%.*]] = alloca [3 x i64], align 8
4200 // CHECK13-NEXT: [[_TMP43:%.*]] = alloca i32, align 4
4201 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_44:%.*]] = alloca i32, align 4
4202 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_45:%.*]] = alloca i32, align 4
4203 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
4204 // CHECK13-NEXT: [[N_CASTED54:%.*]] = alloca i64, align 8
4205 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED56:%.*]] = alloca i64, align 8
4206 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS58:%.*]] = alloca [4 x i8*], align 8
4207 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS59:%.*]] = alloca [4 x i8*], align 8
4208 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS60:%.*]] = alloca [4 x i8*], align 8
4209 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES61:%.*]] = alloca [4 x i64], align 8
4210 // CHECK13-NEXT: [[_TMP62:%.*]] = alloca i32, align 4
4211 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_63:%.*]] = alloca i32, align 4
4212 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_64:%.*]] = alloca i32, align 4
4213 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
4214 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4215 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
4216 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
4217 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4218 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4219 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4220 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
4221 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
4222 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
4223 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
4224 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
4225 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4226 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
4227 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
4228 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
4229 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
4230 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
4231 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4232 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
4233 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
4234 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4235 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
4236 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
4237 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4238 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8
4239 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4240 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
4241 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
4242 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4243 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
4244 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
4245 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
4246 // CHECK13-NEXT: store i8* null, i8** [[TMP16]], align 8
4247 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4248 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
4249 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
4250 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4251 // CHECK13-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
4252 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
4253 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4254 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
4255 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
4256 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8
4257 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4258 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4259 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4260 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
4261 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
4262 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4263 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
4264 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4265 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4266 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4267 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4268 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
4269 // CHECK13-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
4270 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4271 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4272 // CHECK13-NEXT: store i32 1, i32* [[TMP30]], align 4
4273 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4274 // CHECK13-NEXT: store i32 3, i32* [[TMP31]], align 4
4275 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4276 // CHECK13-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
4277 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4278 // CHECK13-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
4279 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4280 // CHECK13-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
4281 // CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4282 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
4283 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4284 // CHECK13-NEXT: store i8** null, i8*** [[TMP36]], align 8
4285 // CHECK13-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4286 // CHECK13-NEXT: store i8** null, i8*** [[TMP37]], align 8
4287 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4288 // CHECK13-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
4289 // CHECK13-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4290 // CHECK13-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
4291 // CHECK13-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4292 // CHECK13: omp_offload.failed:
4293 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
4294 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
4295 // CHECK13: omp_offload.cont:
4296 // CHECK13-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
4297 // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
4298 // CHECK13-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
4299 // CHECK13-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
4300 // CHECK13-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
4301 // CHECK13-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
4302 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false)
4303 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
4304 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
4305 // CHECK13-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
4306 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
4307 // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
4308 // CHECK13-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
4309 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
4310 // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8
4311 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
4312 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
4313 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
4314 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
4315 // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
4316 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
4317 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
4318 // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8
4319 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
4320 // CHECK13-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
4321 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
4322 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
4323 // CHECK13-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
4324 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
4325 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
4326 // CHECK13-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
4327 // CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
4328 // CHECK13-NEXT: store i8* null, i8** [[TMP60]], align 8
4329 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
4330 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
4331 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
4332 // CHECK13-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
4333 // CHECK13-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
4334 // CHECK13-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
4335 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
4336 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4337 // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
4338 // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
4339 // CHECK13-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
4340 // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
4341 // CHECK13-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
4342 // CHECK13-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4343 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
4344 // CHECK13-NEXT: store i32 1, i32* [[TMP68]], align 4
4345 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
4346 // CHECK13-NEXT: store i32 3, i32* [[TMP69]], align 4
4347 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
4348 // CHECK13-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
4349 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
4350 // CHECK13-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
4351 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
4352 // CHECK13-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
4353 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
4354 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP73]], align 8
4355 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
4356 // CHECK13-NEXT: store i8** null, i8*** [[TMP74]], align 8
4357 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
4358 // CHECK13-NEXT: store i8** null, i8*** [[TMP75]], align 8
4359 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
4360 // CHECK13-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
4361 // CHECK13-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
4362 // CHECK13-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
4363 // CHECK13-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
4364 // CHECK13: omp_offload.failed17:
4365 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
4366 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]]
4367 // CHECK13: omp_offload.cont18:
4368 // CHECK13-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
4369 // CHECK13-NEXT: store i32 [[TMP79]], i32* [[DOTCAPTURE_EXPR_19]], align 4
4370 // CHECK13-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
4371 // CHECK13-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
4372 // CHECK13-NEXT: store i32 [[TMP80]], i32* [[CONV21]], align 4
4373 // CHECK13-NEXT: [[TMP81:%.*]] = load i64, i64* [[N_CASTED20]], align 8
4374 // CHECK13-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
4375 // CHECK13-NEXT: [[CONV22:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
4376 // CHECK13-NEXT: store i32 [[TMP82]], i32* [[CONV22]], align 4
4377 // CHECK13-NEXT: [[TMP83:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4378 // CHECK13-NEXT: [[TMP84:%.*]] = mul nuw i64 [[TMP1]], 4
4379 // CHECK13-NEXT: [[TMP85:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES26]] to i8*
4380 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP85]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false)
4381 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
4382 // CHECK13-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64*
4383 // CHECK13-NEXT: store i64 [[TMP81]], i64* [[TMP87]], align 8
4384 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
4385 // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
4386 // CHECK13-NEXT: store i64 [[TMP81]], i64* [[TMP89]], align 8
4387 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
4388 // CHECK13-NEXT: store i8* null, i8** [[TMP90]], align 8
4389 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
4390 // CHECK13-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i64*
4391 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP92]], align 8
4392 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
4393 // CHECK13-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i64*
4394 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP94]], align 8
4395 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
4396 // CHECK13-NEXT: store i8* null, i8** [[TMP95]], align 8
4397 // CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
4398 // CHECK13-NEXT: [[TMP97:%.*]] = bitcast i8** [[TMP96]] to i32**
4399 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP97]], align 8
4400 // CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
4401 // CHECK13-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
4402 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 8
4403 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 2
4404 // CHECK13-NEXT: store i64 [[TMP84]], i64* [[TMP100]], align 8
4405 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 2
4406 // CHECK13-NEXT: store i8* null, i8** [[TMP101]], align 8
4407 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
4408 // CHECK13-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i64*
4409 // CHECK13-NEXT: store i64 [[TMP83]], i64* [[TMP103]], align 8
4410 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
4411 // CHECK13-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
4412 // CHECK13-NEXT: store i64 [[TMP83]], i64* [[TMP105]], align 8
4413 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 3
4414 // CHECK13-NEXT: store i8* null, i8** [[TMP106]], align 8
4415 // CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
4416 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
4417 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 0
4418 // CHECK13-NEXT: [[TMP110:%.*]] = load i32, i32* [[N]], align 4
4419 // CHECK13-NEXT: store i32 [[TMP110]], i32* [[DOTCAPTURE_EXPR_28]], align 4
4420 // CHECK13-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
4421 // CHECK13-NEXT: [[SUB30:%.*]] = sub nsw i32 [[TMP111]], 0
4422 // CHECK13-NEXT: [[DIV31:%.*]] = sdiv i32 [[SUB30]], 1
4423 // CHECK13-NEXT: [[SUB32:%.*]] = sub nsw i32 [[DIV31]], 1
4424 // CHECK13-NEXT: store i32 [[SUB32]], i32* [[DOTCAPTURE_EXPR_29]], align 4
4425 // CHECK13-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_29]], align 4
4426 // CHECK13-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP112]], 1
4427 // CHECK13-NEXT: [[TMP113:%.*]] = zext i32 [[ADD33]] to i64
4428 // CHECK13-NEXT: [[KERNEL_ARGS34:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4429 // CHECK13-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 0
4430 // CHECK13-NEXT: store i32 1, i32* [[TMP114]], align 4
4431 // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 1
4432 // CHECK13-NEXT: store i32 4, i32* [[TMP115]], align 4
4433 // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 2
4434 // CHECK13-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
4435 // CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 3
4436 // CHECK13-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 8
4437 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 4
4438 // CHECK13-NEXT: store i64* [[TMP109]], i64** [[TMP118]], align 8
4439 // CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 5
4440 // CHECK13-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP119]], align 8
4441 // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 6
4442 // CHECK13-NEXT: store i8** null, i8*** [[TMP120]], align 8
4443 // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 7
4444 // CHECK13-NEXT: store i8** null, i8*** [[TMP121]], align 8
4445 // CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 8
4446 // CHECK13-NEXT: store i64 [[TMP113]], i64* [[TMP122]], align 8
4447 // CHECK13-NEXT: [[TMP123:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]])
4448 // CHECK13-NEXT: [[TMP124:%.*]] = icmp ne i32 [[TMP123]], 0
4449 // CHECK13-NEXT: br i1 [[TMP124]], label [[OMP_OFFLOAD_FAILED35:%.*]], label [[OMP_OFFLOAD_CONT36:%.*]]
4450 // CHECK13: omp_offload.failed35:
4451 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP81]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP83]]) #[[ATTR3]]
4452 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT36]]
4453 // CHECK13: omp_offload.cont36:
4454 // CHECK13-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
4455 // CHECK13-NEXT: [[CONV38:%.*]] = bitcast i64* [[N_CASTED37]] to i32*
4456 // CHECK13-NEXT: store i32 [[TMP125]], i32* [[CONV38]], align 4
4457 // CHECK13-NEXT: [[TMP126:%.*]] = load i64, i64* [[N_CASTED37]], align 8
4458 // CHECK13-NEXT: [[TMP127:%.*]] = mul nuw i64 [[TMP1]], 4
4459 // CHECK13-NEXT: [[TMP128:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES42]] to i8*
4460 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP128]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false)
4461 // CHECK13-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
4462 // CHECK13-NEXT: [[TMP130:%.*]] = bitcast i8** [[TMP129]] to i64*
4463 // CHECK13-NEXT: store i64 [[TMP126]], i64* [[TMP130]], align 8
4464 // CHECK13-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
4465 // CHECK13-NEXT: [[TMP132:%.*]] = bitcast i8** [[TMP131]] to i64*
4466 // CHECK13-NEXT: store i64 [[TMP126]], i64* [[TMP132]], align 8
4467 // CHECK13-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 0
4468 // CHECK13-NEXT: store i8* null, i8** [[TMP133]], align 8
4469 // CHECK13-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 1
4470 // CHECK13-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
4471 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP135]], align 8
4472 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 1
4473 // CHECK13-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
4474 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP137]], align 8
4475 // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 1
4476 // CHECK13-NEXT: store i8* null, i8** [[TMP138]], align 8
4477 // CHECK13-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 2
4478 // CHECK13-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32**
4479 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP140]], align 8
4480 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 2
4481 // CHECK13-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32**
4482 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP142]], align 8
4483 // CHECK13-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 2
4484 // CHECK13-NEXT: store i64 [[TMP127]], i64* [[TMP143]], align 8
4485 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 2
4486 // CHECK13-NEXT: store i8* null, i8** [[TMP144]], align 8
4487 // CHECK13-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
4488 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
4489 // CHECK13-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 0
4490 // CHECK13-NEXT: [[TMP148:%.*]] = load i32, i32* [[N]], align 4
4491 // CHECK13-NEXT: store i32 [[TMP148]], i32* [[DOTCAPTURE_EXPR_44]], align 4
4492 // CHECK13-NEXT: [[TMP149:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_44]], align 4
4493 // CHECK13-NEXT: [[SUB46:%.*]] = sub nsw i32 [[TMP149]], 0
4494 // CHECK13-NEXT: [[DIV47:%.*]] = sdiv i32 [[SUB46]], 1
4495 // CHECK13-NEXT: [[SUB48:%.*]] = sub nsw i32 [[DIV47]], 1
4496 // CHECK13-NEXT: store i32 [[SUB48]], i32* [[DOTCAPTURE_EXPR_45]], align 4
4497 // CHECK13-NEXT: [[TMP150:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_45]], align 4
4498 // CHECK13-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP150]], 1
4499 // CHECK13-NEXT: [[TMP151:%.*]] = zext i32 [[ADD49]] to i64
4500 // CHECK13-NEXT: [[KERNEL_ARGS50:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4501 // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 0
4502 // CHECK13-NEXT: store i32 1, i32* [[TMP152]], align 4
4503 // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 1
4504 // CHECK13-NEXT: store i32 3, i32* [[TMP153]], align 4
4505 // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 2
4506 // CHECK13-NEXT: store i8** [[TMP145]], i8*** [[TMP154]], align 8
4507 // CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 3
4508 // CHECK13-NEXT: store i8** [[TMP146]], i8*** [[TMP155]], align 8
4509 // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 4
4510 // CHECK13-NEXT: store i64* [[TMP147]], i64** [[TMP156]], align 8
4511 // CHECK13-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 5
4512 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP157]], align 8
4513 // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 6
4514 // CHECK13-NEXT: store i8** null, i8*** [[TMP158]], align 8
4515 // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 7
4516 // CHECK13-NEXT: store i8** null, i8*** [[TMP159]], align 8
4517 // CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 8
4518 // CHECK13-NEXT: store i64 [[TMP151]], i64* [[TMP160]], align 8
4519 // CHECK13-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]])
4520 // CHECK13-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
4521 // CHECK13-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED51:%.*]], label [[OMP_OFFLOAD_CONT52:%.*]]
4522 // CHECK13: omp_offload.failed51:
4523 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP126]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
4524 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT52]]
4525 // CHECK13: omp_offload.cont52:
4526 // CHECK13-NEXT: [[TMP163:%.*]] = load i32, i32* [[M]], align 4
4527 // CHECK13-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_53]], align 4
4528 // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[N]], align 4
4529 // CHECK13-NEXT: [[CONV55:%.*]] = bitcast i64* [[N_CASTED54]] to i32*
4530 // CHECK13-NEXT: store i32 [[TMP164]], i32* [[CONV55]], align 4
4531 // CHECK13-NEXT: [[TMP165:%.*]] = load i64, i64* [[N_CASTED54]], align 8
4532 // CHECK13-NEXT: [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
4533 // CHECK13-NEXT: [[CONV57:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED56]] to i32*
4534 // CHECK13-NEXT: store i32 [[TMP166]], i32* [[CONV57]], align 4
4535 // CHECK13-NEXT: [[TMP167:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED56]], align 8
4536 // CHECK13-NEXT: [[TMP168:%.*]] = mul nuw i64 [[TMP1]], 4
4537 // CHECK13-NEXT: [[TMP169:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES61]] to i8*
4538 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP169]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false)
4539 // CHECK13-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
4540 // CHECK13-NEXT: [[TMP171:%.*]] = bitcast i8** [[TMP170]] to i64*
4541 // CHECK13-NEXT: store i64 [[TMP165]], i64* [[TMP171]], align 8
4542 // CHECK13-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
4543 // CHECK13-NEXT: [[TMP173:%.*]] = bitcast i8** [[TMP172]] to i64*
4544 // CHECK13-NEXT: store i64 [[TMP165]], i64* [[TMP173]], align 8
4545 // CHECK13-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 0
4546 // CHECK13-NEXT: store i8* null, i8** [[TMP174]], align 8
4547 // CHECK13-NEXT: [[TMP175:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 1
4548 // CHECK13-NEXT: [[TMP176:%.*]] = bitcast i8** [[TMP175]] to i64*
4549 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP176]], align 8
4550 // CHECK13-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 1
4551 // CHECK13-NEXT: [[TMP178:%.*]] = bitcast i8** [[TMP177]] to i64*
4552 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP178]], align 8
4553 // CHECK13-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 1
4554 // CHECK13-NEXT: store i8* null, i8** [[TMP179]], align 8
4555 // CHECK13-NEXT: [[TMP180:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 2
4556 // CHECK13-NEXT: [[TMP181:%.*]] = bitcast i8** [[TMP180]] to i32**
4557 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP181]], align 8
4558 // CHECK13-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 2
4559 // CHECK13-NEXT: [[TMP183:%.*]] = bitcast i8** [[TMP182]] to i32**
4560 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP183]], align 8
4561 // CHECK13-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 2
4562 // CHECK13-NEXT: store i64 [[TMP168]], i64* [[TMP184]], align 8
4563 // CHECK13-NEXT: [[TMP185:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 2
4564 // CHECK13-NEXT: store i8* null, i8** [[TMP185]], align 8
4565 // CHECK13-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 3
4566 // CHECK13-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64*
4567 // CHECK13-NEXT: store i64 [[TMP167]], i64* [[TMP187]], align 8
4568 // CHECK13-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 3
4569 // CHECK13-NEXT: [[TMP189:%.*]] = bitcast i8** [[TMP188]] to i64*
4570 // CHECK13-NEXT: store i64 [[TMP167]], i64* [[TMP189]], align 8
4571 // CHECK13-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 3
4572 // CHECK13-NEXT: store i8* null, i8** [[TMP190]], align 8
4573 // CHECK13-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
4574 // CHECK13-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
4575 // CHECK13-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 0
4576 // CHECK13-NEXT: [[TMP194:%.*]] = load i32, i32* [[N]], align 4
4577 // CHECK13-NEXT: store i32 [[TMP194]], i32* [[DOTCAPTURE_EXPR_63]], align 4
4578 // CHECK13-NEXT: [[TMP195:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_63]], align 4
4579 // CHECK13-NEXT: [[SUB65:%.*]] = sub nsw i32 [[TMP195]], 0
4580 // CHECK13-NEXT: [[DIV66:%.*]] = sdiv i32 [[SUB65]], 1
4581 // CHECK13-NEXT: [[SUB67:%.*]] = sub nsw i32 [[DIV66]], 1
4582 // CHECK13-NEXT: store i32 [[SUB67]], i32* [[DOTCAPTURE_EXPR_64]], align 4
4583 // CHECK13-NEXT: [[TMP196:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_64]], align 4
4584 // CHECK13-NEXT: [[ADD68:%.*]] = add nsw i32 [[TMP196]], 1
4585 // CHECK13-NEXT: [[TMP197:%.*]] = zext i32 [[ADD68]] to i64
4586 // CHECK13-NEXT: [[KERNEL_ARGS69:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4587 // CHECK13-NEXT: [[TMP198:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 0
4588 // CHECK13-NEXT: store i32 1, i32* [[TMP198]], align 4
4589 // CHECK13-NEXT: [[TMP199:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 1
4590 // CHECK13-NEXT: store i32 4, i32* [[TMP199]], align 4
4591 // CHECK13-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 2
4592 // CHECK13-NEXT: store i8** [[TMP191]], i8*** [[TMP200]], align 8
4593 // CHECK13-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 3
4594 // CHECK13-NEXT: store i8** [[TMP192]], i8*** [[TMP201]], align 8
4595 // CHECK13-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 4
4596 // CHECK13-NEXT: store i64* [[TMP193]], i64** [[TMP202]], align 8
4597 // CHECK13-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 5
4598 // CHECK13-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP203]], align 8
4599 // CHECK13-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 6
4600 // CHECK13-NEXT: store i8** null, i8*** [[TMP204]], align 8
4601 // CHECK13-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 7
4602 // CHECK13-NEXT: store i8** null, i8*** [[TMP205]], align 8
4603 // CHECK13-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 8
4604 // CHECK13-NEXT: store i64 [[TMP197]], i64* [[TMP206]], align 8
4605 // CHECK13-NEXT: [[TMP207:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]])
4606 // CHECK13-NEXT: [[TMP208:%.*]] = icmp ne i32 [[TMP207]], 0
4607 // CHECK13-NEXT: br i1 [[TMP208]], label [[OMP_OFFLOAD_FAILED70:%.*]], label [[OMP_OFFLOAD_CONT71:%.*]]
4608 // CHECK13: omp_offload.failed70:
4609 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP165]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP167]]) #[[ATTR3]]
4610 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT71]]
4611 // CHECK13: omp_offload.cont71:
4612 // CHECK13-NEXT: [[TMP209:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4613 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP209]])
4614 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4615 // CHECK13-NEXT: [[TMP210:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
4616 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP210]])
4617 // CHECK13-NEXT: [[TMP211:%.*]] = load i32, i32* [[RETVAL]], align 4
4618 // CHECK13-NEXT: ret i32 [[TMP211]]
4619 //
4620 //
4621 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
4622 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
4623 // CHECK13-NEXT: entry:
4624 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4625 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4626 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4627 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4628 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4629 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4630 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4631 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4632 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4633 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4634 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
4635 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4636 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
4637 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
4638 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
4639 // CHECK13-NEXT: ret void
4640 //
4641 //
4642 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
4643 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4644 // CHECK13-NEXT: entry:
4645 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4646 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4647 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4648 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4649 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4650 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4651 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4652 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4653 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4654 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4655 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4656 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4657 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4658 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4659 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
4660 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4661 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4662 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4663 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4664 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4665 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4666 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4667 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4668 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4669 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
4670 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4671 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4672 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4673 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4674 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4675 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4676 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4677 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4678 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4679 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4680 // CHECK13: omp.precond.then:
4681 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4682 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4683 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
4684 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4685 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4686 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4687 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4688 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4689 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4690 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4691 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
4692 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4693 // CHECK13: cond.true:
4694 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4695 // CHECK13-NEXT: br label [[COND_END:%.*]]
4696 // CHECK13: cond.false:
4697 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4698 // CHECK13-NEXT: br label [[COND_END]]
4699 // CHECK13: cond.end:
4700 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4701 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4702 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4703 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
4704 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4705 // CHECK13: omp.inner.for.cond:
4706 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4707 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4708 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4709 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4710 // CHECK13: omp.inner.for.body:
4711 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4712 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
4713 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4714 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
4715 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
4716 // CHECK13-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4717 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4
4718 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
4719 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
4720 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4721 // CHECK13: omp.inner.for.inc:
4722 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4723 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4724 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
4725 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4726 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4727 // CHECK13: omp.inner.for.end:
4728 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4729 // CHECK13: omp.loop.exit:
4730 // CHECK13-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4731 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
4732 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
4733 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
4734 // CHECK13: omp.precond.end:
4735 // CHECK13-NEXT: ret void
4736 //
4737 //
4738 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
4739 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4740 // CHECK13-NEXT: entry:
4741 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4742 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4743 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4744 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4745 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4746 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4747 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4748 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4749 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4750 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4751 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4752 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4753 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4754 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4755 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4756 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4757 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
4758 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4759 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4760 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4761 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4762 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4763 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4764 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4765 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4766 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4767 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4768 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
4769 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4770 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4771 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4772 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4773 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4774 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4775 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4776 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4777 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4778 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4779 // CHECK13: omp.precond.then:
4780 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4781 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4782 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
4783 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4784 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
4785 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4786 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
4787 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
4788 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
4789 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4790 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4791 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4792 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
4793 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4794 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4795 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4796 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
4797 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4798 // CHECK13: cond.true:
4799 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4800 // CHECK13-NEXT: br label [[COND_END:%.*]]
4801 // CHECK13: cond.false:
4802 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4803 // CHECK13-NEXT: br label [[COND_END]]
4804 // CHECK13: cond.end:
4805 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
4806 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4807 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4808 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
4809 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4810 // CHECK13: omp.inner.for.cond:
4811 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4812 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4813 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
4814 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4815 // CHECK13: omp.inner.for.body:
4816 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4817 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
4818 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4819 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
4820 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
4821 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
4822 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
4823 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4824 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4825 // CHECK13: omp.body.continue:
4826 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4827 // CHECK13: omp.inner.for.inc:
4828 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4829 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
4830 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
4831 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4832 // CHECK13: omp.inner.for.end:
4833 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4834 // CHECK13: omp.loop.exit:
4835 // CHECK13-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4836 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
4837 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
4838 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
4839 // CHECK13: omp.precond.end:
4840 // CHECK13-NEXT: ret void
4841 //
4842 //
4843 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
4844 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4845 // CHECK13-NEXT: entry:
4846 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4847 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4848 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4849 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4850 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4851 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4852 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4853 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4854 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4855 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4856 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
4857 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4858 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
4859 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
4860 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
4861 // CHECK13-NEXT: ret void
4862 //
4863 //
4864 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
4865 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4866 // CHECK13-NEXT: entry:
4867 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4868 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4869 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4870 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4871 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4872 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4873 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4874 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4875 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4876 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4877 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4878 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4879 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4880 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4881 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
4882 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4883 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4884 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4885 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4886 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4887 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4888 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4889 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4890 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4891 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
4892 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4893 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4894 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4895 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4896 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4897 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4898 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4899 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4900 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4901 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4902 // CHECK13: omp.precond.then:
4903 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4904 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4905 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
4906 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4907 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4908 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4909 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
4910 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4911 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4912 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4913 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
4914 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4915 // CHECK13: cond.true:
4916 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4917 // CHECK13-NEXT: br label [[COND_END:%.*]]
4918 // CHECK13: cond.false:
4919 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4920 // CHECK13-NEXT: br label [[COND_END]]
4921 // CHECK13: cond.end:
4922 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4923 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4924 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4925 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
4926 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4927 // CHECK13: omp.inner.for.cond:
4928 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4929 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4930 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4931 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4932 // CHECK13: omp.inner.for.body:
4933 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4934 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
4935 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4936 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
4937 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
4938 // CHECK13-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4939 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4
4940 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
4941 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
4942 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4943 // CHECK13: omp.inner.for.inc:
4944 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4945 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4946 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
4947 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4948 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4949 // CHECK13: omp.inner.for.end:
4950 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4951 // CHECK13: omp.loop.exit:
4952 // CHECK13-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4953 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
4954 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
4955 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
4956 // CHECK13: omp.precond.end:
4957 // CHECK13-NEXT: ret void
4958 //
4959 //
4960 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
4961 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4962 // CHECK13-NEXT: entry:
4963 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4964 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4965 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4966 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4967 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4968 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4969 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4970 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4971 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4972 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4973 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4974 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4975 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4976 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4977 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4978 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4979 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
4980 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4981 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4982 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4983 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4984 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4985 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4986 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4987 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4988 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4989 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4990 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
4991 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
4992 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4993 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4994 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4995 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4996 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4997 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4998 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4999 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5000 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5001 // CHECK13: omp.precond.then:
5002 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5003 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5004 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5005 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5006 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
5007 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5008 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5009 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
5010 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
5011 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5012 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5013 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5014 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5015 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5016 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5017 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5018 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5019 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5020 // CHECK13: cond.true:
5021 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5022 // CHECK13-NEXT: br label [[COND_END:%.*]]
5023 // CHECK13: cond.false:
5024 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5025 // CHECK13-NEXT: br label [[COND_END]]
5026 // CHECK13: cond.end:
5027 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5028 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5029 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5030 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
5031 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5032 // CHECK13: omp.inner.for.cond:
5033 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5034 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5035 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
5036 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5037 // CHECK13: omp.inner.for.body:
5038 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5039 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
5040 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5041 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
5042 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
5043 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
5044 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
5045 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5046 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5047 // CHECK13: omp.body.continue:
5048 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5049 // CHECK13: omp.inner.for.inc:
5050 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5051 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
5052 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
5053 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5054 // CHECK13: omp.inner.for.end:
5055 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5056 // CHECK13: omp.loop.exit:
5057 // CHECK13-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5058 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
5059 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
5060 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5061 // CHECK13: omp.precond.end:
5062 // CHECK13-NEXT: ret void
5063 //
5064 //
5065 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
5066 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5067 // CHECK13-NEXT: entry:
5068 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5069 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5070 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5071 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5072 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5073 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5074 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5075 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5076 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5077 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5078 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5079 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5080 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5081 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5082 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5083 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5084 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
5085 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
5086 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
5087 // CHECK13-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5088 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
5089 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5090 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
5091 // CHECK13-NEXT: ret void
5092 //
5093 //
5094 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
5095 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5096 // CHECK13-NEXT: entry:
5097 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5098 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5099 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5100 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5101 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5102 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5103 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5104 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5105 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5106 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5107 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5108 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5109 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5110 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5111 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5112 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
5113 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5114 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5115 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5116 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5117 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5118 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5119 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5120 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5121 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5122 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5123 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5124 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5125 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5126 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5127 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5128 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5129 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5130 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
5131 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5132 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5133 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5134 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5135 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5136 // CHECK13: omp.precond.then:
5137 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5138 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5139 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
5140 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5141 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5142 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
5143 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5144 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5145 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
5146 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5147 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5148 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5149 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5150 // CHECK13: cond.true:
5151 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5152 // CHECK13-NEXT: br label [[COND_END:%.*]]
5153 // CHECK13: cond.false:
5154 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5155 // CHECK13-NEXT: br label [[COND_END]]
5156 // CHECK13: cond.end:
5157 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5158 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5159 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5160 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5161 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5162 // CHECK13: omp.inner.for.cond:
5163 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5164 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5165 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
5166 // CHECK13-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
5167 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5168 // CHECK13: omp.inner.for.body:
5169 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5170 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5171 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5172 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5173 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4
5174 // CHECK13-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5175 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4
5176 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
5177 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 4
5178 // CHECK13-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5179 // CHECK13-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4
5180 // CHECK13-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5181 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]])
5182 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5183 // CHECK13: omp.inner.for.inc:
5184 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5185 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5186 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
5187 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
5188 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5189 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5190 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
5191 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
5192 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5193 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5194 // CHECK13-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
5195 // CHECK13-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
5196 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5197 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5198 // CHECK13-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
5199 // CHECK13-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
5200 // CHECK13: cond.true14:
5201 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5202 // CHECK13-NEXT: br label [[COND_END16:%.*]]
5203 // CHECK13: cond.false15:
5204 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5205 // CHECK13-NEXT: br label [[COND_END16]]
5206 // CHECK13: cond.end16:
5207 // CHECK13-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
5208 // CHECK13-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
5209 // CHECK13-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5210 // CHECK13-NEXT: store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4
5211 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5212 // CHECK13: omp.inner.for.end:
5213 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5214 // CHECK13: omp.loop.exit:
5215 // CHECK13-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5216 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
5217 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
5218 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5219 // CHECK13: omp.precond.end:
5220 // CHECK13-NEXT: ret void
5221 //
5222 //
5223 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
5224 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5225 // CHECK13-NEXT: entry:
5226 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5227 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5228 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5229 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5230 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5231 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5232 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5233 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5234 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5235 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5236 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5237 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5238 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5239 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5240 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5241 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5242 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5243 // CHECK13-NEXT: [[I7:%.*]] = alloca i32, align 4
5244 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5245 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5246 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5247 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5248 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5249 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5250 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5251 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5252 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5253 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5254 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5255 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5256 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5257 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5258 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5259 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5260 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5261 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
5262 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5263 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5264 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5265 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5266 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5267 // CHECK13: omp.precond.then:
5268 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5269 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5270 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5271 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5272 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
5273 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5274 // CHECK13-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
5275 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
5276 // CHECK13-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
5277 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5278 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5279 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5280 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5281 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5282 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5283 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5284 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5285 // CHECK13-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5286 // CHECK13: cond.true:
5287 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5288 // CHECK13-NEXT: br label [[COND_END:%.*]]
5289 // CHECK13: cond.false:
5290 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5291 // CHECK13-NEXT: br label [[COND_END]]
5292 // CHECK13: cond.end:
5293 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5294 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5295 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5296 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
5297 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5298 // CHECK13: omp.inner.for.cond:
5299 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5300 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5301 // CHECK13-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
5302 // CHECK13-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5303 // CHECK13: omp.inner.for.body:
5304 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5305 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
5306 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5307 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
5308 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[I7]], align 4
5309 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
5310 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
5311 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5312 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5313 // CHECK13: omp.body.continue:
5314 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5315 // CHECK13: omp.inner.for.inc:
5316 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5317 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
5318 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
5319 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5320 // CHECK13: omp.inner.for.end:
5321 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5322 // CHECK13: omp.loop.exit:
5323 // CHECK13-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5324 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
5325 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
5326 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5327 // CHECK13: omp.precond.end:
5328 // CHECK13-NEXT: ret void
5329 //
5330 //
5331 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
5332 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5333 // CHECK13-NEXT: entry:
5334 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5335 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5336 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5337 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5338 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5339 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5340 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5341 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5342 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5343 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5344 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5345 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5346 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
5347 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
5348 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
5349 // CHECK13-NEXT: ret void
5350 //
5351 //
5352 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
5353 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5354 // CHECK13-NEXT: entry:
5355 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5356 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5357 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5358 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5359 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5360 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5361 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5362 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5363 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5364 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5365 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5366 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5367 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5368 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5369 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
5370 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5371 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5372 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5373 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5374 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5375 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5376 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5377 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5378 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5379 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5380 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5381 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5382 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5383 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5384 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5385 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5386 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5387 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5388 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5389 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5390 // CHECK13: omp.precond.then:
5391 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5392 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5393 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
5394 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5395 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5396 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5397 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
5398 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5399 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5400 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5401 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5402 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5403 // CHECK13: cond.true:
5404 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5405 // CHECK13-NEXT: br label [[COND_END:%.*]]
5406 // CHECK13: cond.false:
5407 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5408 // CHECK13-NEXT: br label [[COND_END]]
5409 // CHECK13: cond.end:
5410 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5411 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5412 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5413 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
5414 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5415 // CHECK13: omp.inner.for.cond:
5416 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5417 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5418 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5419 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5420 // CHECK13: omp.inner.for.body:
5421 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5422 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
5423 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5424 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5425 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
5426 // CHECK13-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5427 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4
5428 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
5429 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
5430 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5431 // CHECK13: omp.inner.for.inc:
5432 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5433 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5434 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
5435 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5436 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5437 // CHECK13: omp.inner.for.end:
5438 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5439 // CHECK13: omp.loop.exit:
5440 // CHECK13-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5441 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
5442 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
5443 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5444 // CHECK13: omp.precond.end:
5445 // CHECK13-NEXT: ret void
5446 //
5447 //
5448 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
5449 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5450 // CHECK13-NEXT: entry:
5451 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5452 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5453 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5454 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5455 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5456 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5457 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5458 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5459 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5460 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5461 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5462 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5463 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5464 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5465 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5466 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5467 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
5468 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5469 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5470 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5471 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5472 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5473 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5474 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5475 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5476 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5477 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5478 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5479 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5480 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5481 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5482 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5483 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5484 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5485 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5486 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5487 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5488 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5489 // CHECK13: omp.precond.then:
5490 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5491 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5492 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5493 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5494 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
5495 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5496 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5497 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
5498 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
5499 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5500 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5501 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5502 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5503 // CHECK13-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5504 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
5505 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
5506 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5507 // CHECK13: omp.dispatch.cond:
5508 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5509 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
5510 // CHECK13-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5511 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
5512 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5513 // CHECK13: omp.dispatch.body:
5514 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5515 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
5516 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5517 // CHECK13: omp.inner.for.cond:
5518 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5519 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
5520 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5521 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5522 // CHECK13: omp.inner.for.body:
5523 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5524 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5525 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5526 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !15
5527 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !15
5528 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
5529 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
5530 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
5531 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5532 // CHECK13: omp.body.continue:
5533 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5534 // CHECK13: omp.inner.for.inc:
5535 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5536 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
5537 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5538 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5539 // CHECK13: omp.inner.for.end:
5540 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5541 // CHECK13: omp.dispatch.inc:
5542 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
5543 // CHECK13: omp.dispatch.end:
5544 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5545 // CHECK13: omp.precond.end:
5546 // CHECK13-NEXT: ret void
5547 //
5548 //
5549 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
5550 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5551 // CHECK13-NEXT: entry:
5552 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5553 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5554 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5555 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5556 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5557 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5558 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5559 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5560 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5561 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5562 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5563 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5564 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5565 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5566 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5567 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5568 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
5569 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
5570 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
5571 // CHECK13-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5572 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
5573 // CHECK13-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5574 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
5575 // CHECK13-NEXT: ret void
5576 //
5577 //
5578 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
5579 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5580 // CHECK13-NEXT: entry:
5581 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5582 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5583 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5584 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5585 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5586 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5587 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5588 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5589 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5590 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5591 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5592 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5593 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5594 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5595 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5596 // CHECK13-NEXT: [[I5:%.*]] = alloca i32, align 4
5597 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
5598 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5599 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5600 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5601 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5602 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5603 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5604 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5605 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5606 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5607 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5608 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5609 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5610 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5611 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5612 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5613 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5614 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
5615 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5616 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5617 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5618 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5619 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5620 // CHECK13: omp.precond.then:
5621 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5622 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5623 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
5624 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5625 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5626 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5627 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
5628 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5629 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5630 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5631 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5632 // CHECK13-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5633 // CHECK13: cond.true:
5634 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5635 // CHECK13-NEXT: br label [[COND_END:%.*]]
5636 // CHECK13: cond.false:
5637 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5638 // CHECK13-NEXT: br label [[COND_END]]
5639 // CHECK13: cond.end:
5640 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5641 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5642 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5643 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
5644 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5645 // CHECK13: omp.inner.for.cond:
5646 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5647 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5648 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5649 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5650 // CHECK13: omp.inner.for.body:
5651 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5652 // CHECK13-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
5653 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5654 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5655 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
5656 // CHECK13-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
5657 // CHECK13-NEXT: store i32 [[TMP19]], i32* [[CONV8]], align 4
5658 // CHECK13-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
5659 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 4
5660 // CHECK13-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5661 // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV9]], align 4
5662 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5663 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]])
5664 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5665 // CHECK13: omp.inner.for.inc:
5666 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5667 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5668 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
5669 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5670 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5671 // CHECK13: omp.inner.for.end:
5672 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5673 // CHECK13: omp.loop.exit:
5674 // CHECK13-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5675 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
5676 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
5677 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5678 // CHECK13: omp.precond.end:
5679 // CHECK13-NEXT: ret void
5680 //
5681 //
5682 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
5683 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5684 // CHECK13-NEXT: entry:
5685 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5686 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5687 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5688 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5689 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5690 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5691 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5692 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5693 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5694 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5695 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5696 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
5697 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5698 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5699 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5700 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5701 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5702 // CHECK13-NEXT: [[I7:%.*]] = alloca i32, align 4
5703 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5704 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5705 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5706 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5707 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5708 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5709 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5710 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5711 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5712 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5713 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5714 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5715 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5716 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5717 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5718 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5719 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5720 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
5721 // CHECK13-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
5722 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5723 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5724 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5725 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5726 // CHECK13: omp.precond.then:
5727 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5728 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
5729 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
5730 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5731 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
5732 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5733 // CHECK13-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
5734 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
5735 // CHECK13-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
5736 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5737 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5738 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 4
5739 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5740 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5741 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5742 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
5743 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
5744 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5745 // CHECK13: omp.dispatch.cond:
5746 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5747 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
5748 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5749 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
5750 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5751 // CHECK13: omp.dispatch.body:
5752 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5753 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
5754 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5755 // CHECK13: omp.inner.for.cond:
5756 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5757 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
5758 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
5759 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5760 // CHECK13: omp.inner.for.body:
5761 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5762 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
5763 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5764 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !18
5765 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !18
5766 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
5767 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
5768 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
5769 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5770 // CHECK13: omp.body.continue:
5771 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5772 // CHECK13: omp.inner.for.inc:
5773 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5774 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
5775 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5776 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
5777 // CHECK13: omp.inner.for.end:
5778 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5779 // CHECK13: omp.dispatch.inc:
5780 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
5781 // CHECK13: omp.dispatch.end:
5782 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5783 // CHECK13: omp.precond.end:
5784 // CHECK13-NEXT: ret void
5785 //
5786 //
5787 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5788 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
5789 // CHECK13-NEXT: entry:
5790 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
5791 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
5792 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
5793 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5794 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5795 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5796 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5797 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
5798 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
5799 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
5800 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
5801 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5802 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5803 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8
5804 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8
5805 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8
5806 // CHECK13-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
5807 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 8
5808 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 8
5809 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 8
5810 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
5811 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
5812 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8
5813 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS25:%.*]] = alloca [2 x i8*], align 8
5814 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS26:%.*]] = alloca [2 x i8*], align 8
5815 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS27:%.*]] = alloca [2 x i8*], align 8
5816 // CHECK13-NEXT: [[_TMP28:%.*]] = alloca i32, align 4
5817 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5818 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
5819 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5820 // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
5821 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
5822 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5823 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
5824 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
5825 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5826 // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8
5827 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5828 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5829 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5830 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5831 // CHECK13-NEXT: store i32 1, i32* [[TMP7]], align 4
5832 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5833 // CHECK13-NEXT: store i32 1, i32* [[TMP8]], align 4
5834 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5835 // CHECK13-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
5836 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5837 // CHECK13-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
5838 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5839 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 8
5840 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5841 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 8
5842 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5843 // CHECK13-NEXT: store i8** null, i8*** [[TMP13]], align 8
5844 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5845 // CHECK13-NEXT: store i8** null, i8*** [[TMP14]], align 8
5846 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5847 // CHECK13-NEXT: store i64 10, i64* [[TMP15]], align 8
5848 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5849 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5850 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5851 // CHECK13: omp_offload.failed:
5852 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
5853 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
5854 // CHECK13: omp_offload.cont:
5855 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5856 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
5857 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
5858 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5859 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
5860 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
5861 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
5862 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8
5863 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5864 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5865 // CHECK13-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5866 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
5867 // CHECK13-NEXT: store i32 1, i32* [[TMP25]], align 4
5868 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
5869 // CHECK13-NEXT: store i32 1, i32* [[TMP26]], align 4
5870 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
5871 // CHECK13-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
5872 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
5873 // CHECK13-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
5874 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
5875 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 8
5876 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
5877 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 8
5878 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
5879 // CHECK13-NEXT: store i8** null, i8*** [[TMP31]], align 8
5880 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
5881 // CHECK13-NEXT: store i8** null, i8*** [[TMP32]], align 8
5882 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
5883 // CHECK13-NEXT: store i64 10, i64* [[TMP33]], align 8
5884 // CHECK13-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
5885 // CHECK13-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
5886 // CHECK13-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5887 // CHECK13: omp_offload.failed6:
5888 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
5889 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]]
5890 // CHECK13: omp_offload.cont7:
5891 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
5892 // CHECK13-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
5893 // CHECK13-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5894 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5895 // CHECK13-NEXT: store i32 [[TMP37]], i32* [[CONV]], align 4
5896 // CHECK13-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5897 // CHECK13-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
5898 // CHECK13-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
5899 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 8
5900 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
5901 // CHECK13-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
5902 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 8
5903 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
5904 // CHECK13-NEXT: store i8* null, i8** [[TMP43]], align 8
5905 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
5906 // CHECK13-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
5907 // CHECK13-NEXT: store i64 [[TMP38]], i64* [[TMP45]], align 8
5908 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
5909 // CHECK13-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i64*
5910 // CHECK13-NEXT: store i64 [[TMP38]], i64* [[TMP47]], align 8
5911 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
5912 // CHECK13-NEXT: store i8* null, i8** [[TMP48]], align 8
5913 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
5914 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
5915 // CHECK13-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5916 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
5917 // CHECK13-NEXT: store i32 1, i32* [[TMP51]], align 4
5918 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
5919 // CHECK13-NEXT: store i32 2, i32* [[TMP52]], align 4
5920 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
5921 // CHECK13-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 8
5922 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
5923 // CHECK13-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 8
5924 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
5925 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 8
5926 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
5927 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 8
5928 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
5929 // CHECK13-NEXT: store i8** null, i8*** [[TMP57]], align 8
5930 // CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
5931 // CHECK13-NEXT: store i8** null, i8*** [[TMP58]], align 8
5932 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
5933 // CHECK13-NEXT: store i64 10, i64* [[TMP59]], align 8
5934 // CHECK13-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
5935 // CHECK13-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
5936 // CHECK13-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
5937 // CHECK13: omp_offload.failed13:
5938 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP38]]) #[[ATTR3]]
5939 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT14]]
5940 // CHECK13: omp_offload.cont14:
5941 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
5942 // CHECK13-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
5943 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 8
5944 // CHECK13-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
5945 // CHECK13-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
5946 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 8
5947 // CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
5948 // CHECK13-NEXT: store i8* null, i8** [[TMP66]], align 8
5949 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
5950 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
5951 // CHECK13-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5952 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
5953 // CHECK13-NEXT: store i32 1, i32* [[TMP69]], align 4
5954 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
5955 // CHECK13-NEXT: store i32 1, i32* [[TMP70]], align 4
5956 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
5957 // CHECK13-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 8
5958 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
5959 // CHECK13-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 8
5960 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
5961 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 8
5962 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
5963 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 8
5964 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
5965 // CHECK13-NEXT: store i8** null, i8*** [[TMP75]], align 8
5966 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
5967 // CHECK13-NEXT: store i8** null, i8*** [[TMP76]], align 8
5968 // CHECK13-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
5969 // CHECK13-NEXT: store i64 10, i64* [[TMP77]], align 8
5970 // CHECK13-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
5971 // CHECK13-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
5972 // CHECK13-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
5973 // CHECK13: omp_offload.failed20:
5974 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
5975 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT21]]
5976 // CHECK13: omp_offload.cont21:
5977 // CHECK13-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
5978 // CHECK13-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
5979 // CHECK13-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
5980 // CHECK13-NEXT: [[CONV24:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED23]] to i32*
5981 // CHECK13-NEXT: store i32 [[TMP81]], i32* [[CONV24]], align 4
5982 // CHECK13-NEXT: [[TMP82:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED23]], align 8
5983 // CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
5984 // CHECK13-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
5985 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 8
5986 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
5987 // CHECK13-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
5988 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 8
5989 // CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 0
5990 // CHECK13-NEXT: store i8* null, i8** [[TMP87]], align 8
5991 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 1
5992 // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
5993 // CHECK13-NEXT: store i64 [[TMP82]], i64* [[TMP89]], align 8
5994 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 1
5995 // CHECK13-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i64*
5996 // CHECK13-NEXT: store i64 [[TMP82]], i64* [[TMP91]], align 8
5997 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 1
5998 // CHECK13-NEXT: store i8* null, i8** [[TMP92]], align 8
5999 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
6000 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
6001 // CHECK13-NEXT: [[KERNEL_ARGS29:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6002 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 0
6003 // CHECK13-NEXT: store i32 1, i32* [[TMP95]], align 4
6004 // CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 1
6005 // CHECK13-NEXT: store i32 2, i32* [[TMP96]], align 4
6006 // CHECK13-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 2
6007 // CHECK13-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 8
6008 // CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 3
6009 // CHECK13-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 8
6010 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 4
6011 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 8
6012 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 5
6013 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 8
6014 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 6
6015 // CHECK13-NEXT: store i8** null, i8*** [[TMP101]], align 8
6016 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 7
6017 // CHECK13-NEXT: store i8** null, i8*** [[TMP102]], align 8
6018 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 8
6019 // CHECK13-NEXT: store i64 10, i64* [[TMP103]], align 8
6020 // CHECK13-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]])
6021 // CHECK13-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
6022 // CHECK13-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
6023 // CHECK13: omp_offload.failed30:
6024 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP82]]) #[[ATTR3]]
6025 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT31]]
6026 // CHECK13: omp_offload.cont31:
6027 // CHECK13-NEXT: ret i32 0
6028 //
6029 //
6030 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
6031 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6032 // CHECK13-NEXT: entry:
6033 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6034 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6035 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6036 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
6037 // CHECK13-NEXT: ret void
6038 //
6039 //
6040 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18
6041 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6042 // CHECK13-NEXT: entry:
6043 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6044 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6045 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6046 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6047 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6048 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6049 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6050 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6051 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6052 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6053 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6054 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6055 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6056 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6057 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6058 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6059 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6060 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6061 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6062 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6063 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6064 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6065 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6066 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6067 // CHECK13: cond.true:
6068 // CHECK13-NEXT: br label [[COND_END:%.*]]
6069 // CHECK13: cond.false:
6070 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6071 // CHECK13-NEXT: br label [[COND_END]]
6072 // CHECK13: cond.end:
6073 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6074 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6075 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6076 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6077 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6078 // CHECK13: omp.inner.for.cond:
6079 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6080 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6081 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6082 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6083 // CHECK13: omp.inner.for.body:
6084 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6085 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6086 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6087 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6088 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
6089 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6090 // CHECK13: omp.inner.for.inc:
6091 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6092 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6093 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6094 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6095 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6096 // CHECK13: omp.inner.for.end:
6097 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6098 // CHECK13: omp.loop.exit:
6099 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6100 // CHECK13-NEXT: ret void
6101 //
6102 //
6103 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..19
6104 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6105 // CHECK13-NEXT: entry:
6106 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6107 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6108 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6109 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6110 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6111 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6112 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6113 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6114 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6115 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6116 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6117 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6118 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6119 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6120 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6121 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6122 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6123 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6124 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6125 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6126 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6127 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6128 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6129 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6130 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6131 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6132 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6133 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6134 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6135 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6136 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6137 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6138 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6139 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6140 // CHECK13: cond.true:
6141 // CHECK13-NEXT: br label [[COND_END:%.*]]
6142 // CHECK13: cond.false:
6143 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6144 // CHECK13-NEXT: br label [[COND_END]]
6145 // CHECK13: cond.end:
6146 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6147 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6148 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6149 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6150 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6151 // CHECK13: omp.inner.for.cond:
6152 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6153 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6154 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6155 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6156 // CHECK13: omp.inner.for.body:
6157 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6158 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6159 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6160 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6161 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6162 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6163 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6164 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6165 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6166 // CHECK13: omp.body.continue:
6167 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6168 // CHECK13: omp.inner.for.inc:
6169 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6170 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6171 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6172 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6173 // CHECK13: omp.inner.for.end:
6174 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6175 // CHECK13: omp.loop.exit:
6176 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6177 // CHECK13-NEXT: ret void
6178 //
6179 //
6180 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
6181 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6182 // CHECK13-NEXT: entry:
6183 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6184 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6185 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6186 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
6187 // CHECK13-NEXT: ret void
6188 //
6189 //
6190 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22
6191 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6192 // CHECK13-NEXT: entry:
6193 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6194 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6195 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6196 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6197 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6198 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6199 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6200 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6201 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6202 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6203 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6204 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6205 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6206 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6207 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6208 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6209 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6210 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6211 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6212 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6213 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6214 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6215 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6216 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6217 // CHECK13: cond.true:
6218 // CHECK13-NEXT: br label [[COND_END:%.*]]
6219 // CHECK13: cond.false:
6220 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6221 // CHECK13-NEXT: br label [[COND_END]]
6222 // CHECK13: cond.end:
6223 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6224 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6225 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6226 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6227 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6228 // CHECK13: omp.inner.for.cond:
6229 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6230 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6231 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6232 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6233 // CHECK13: omp.inner.for.body:
6234 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6235 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6236 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6237 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6238 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
6239 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6240 // CHECK13: omp.inner.for.inc:
6241 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6242 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6243 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6244 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6245 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6246 // CHECK13: omp.inner.for.end:
6247 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6248 // CHECK13: omp.loop.exit:
6249 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6250 // CHECK13-NEXT: ret void
6251 //
6252 //
6253 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..23
6254 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6255 // CHECK13-NEXT: entry:
6256 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6257 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6258 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6259 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6260 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6261 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6262 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6263 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6264 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6265 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6266 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6267 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6268 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6269 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6270 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6271 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6272 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6273 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6274 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6275 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6276 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6277 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6278 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6279 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6280 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6281 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6282 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6283 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6284 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6285 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6286 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6287 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6288 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6289 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6290 // CHECK13: cond.true:
6291 // CHECK13-NEXT: br label [[COND_END:%.*]]
6292 // CHECK13: cond.false:
6293 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6294 // CHECK13-NEXT: br label [[COND_END]]
6295 // CHECK13: cond.end:
6296 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6297 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6298 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6299 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6300 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6301 // CHECK13: omp.inner.for.cond:
6302 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6303 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6304 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6305 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6306 // CHECK13: omp.inner.for.body:
6307 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6308 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6309 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6310 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6311 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6312 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6313 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6314 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6315 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6316 // CHECK13: omp.body.continue:
6317 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6318 // CHECK13: omp.inner.for.inc:
6319 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6320 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6321 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6322 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6323 // CHECK13: omp.inner.for.end:
6324 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6325 // CHECK13: omp.loop.exit:
6326 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6327 // CHECK13-NEXT: ret void
6328 //
6329 //
6330 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
6331 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6332 // CHECK13-NEXT: entry:
6333 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6334 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6335 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6336 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6337 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6338 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6339 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6340 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
6341 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6342 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
6343 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6344 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
6345 // CHECK13-NEXT: ret void
6346 //
6347 //
6348 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26
6349 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6350 // CHECK13-NEXT: entry:
6351 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6352 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6353 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6354 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6355 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6356 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6357 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6358 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6359 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6360 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6361 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6362 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6363 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6364 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6365 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6366 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6367 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6368 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6369 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6370 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6371 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6372 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6373 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6374 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6375 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6376 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6377 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6378 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6379 // CHECK13: cond.true:
6380 // CHECK13-NEXT: br label [[COND_END:%.*]]
6381 // CHECK13: cond.false:
6382 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6383 // CHECK13-NEXT: br label [[COND_END]]
6384 // CHECK13: cond.end:
6385 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6386 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6387 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6388 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6389 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6390 // CHECK13: omp.inner.for.cond:
6391 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6392 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6393 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6394 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6395 // CHECK13: omp.inner.for.body:
6396 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6397 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6398 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6399 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6400 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
6401 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6402 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
6403 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6404 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
6405 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6406 // CHECK13: omp.inner.for.inc:
6407 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6408 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6409 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6410 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6411 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6412 // CHECK13: omp.inner.for.end:
6413 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6414 // CHECK13: omp.loop.exit:
6415 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6416 // CHECK13-NEXT: ret void
6417 //
6418 //
6419 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..27
6420 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6421 // CHECK13-NEXT: entry:
6422 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6423 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6424 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6425 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6426 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6427 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6428 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6429 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6430 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6431 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6432 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6433 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6434 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6435 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6436 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6437 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6438 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6439 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6440 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6441 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6442 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6443 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6444 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6445 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6446 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6447 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6448 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
6449 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6450 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6451 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6452 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6453 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
6454 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6455 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
6456 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
6457 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6458 // CHECK13: omp.dispatch.cond:
6459 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6460 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6461 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
6462 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
6463 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6464 // CHECK13: cond.true:
6465 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6466 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
6467 // CHECK13-NEXT: br label [[COND_END:%.*]]
6468 // CHECK13: cond.false:
6469 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6470 // CHECK13-NEXT: br label [[COND_END]]
6471 // CHECK13: cond.end:
6472 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
6473 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6474 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6475 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
6476 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6477 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6478 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
6479 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6480 // CHECK13: omp.dispatch.body:
6481 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6482 // CHECK13: omp.inner.for.cond:
6483 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6484 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6485 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6486 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6487 // CHECK13: omp.inner.for.body:
6488 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6489 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
6490 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6491 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6492 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
6493 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
6494 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6495 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6496 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6497 // CHECK13: omp.body.continue:
6498 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6499 // CHECK13: omp.inner.for.inc:
6500 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6501 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
6502 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
6503 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6504 // CHECK13: omp.inner.for.end:
6505 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6506 // CHECK13: omp.dispatch.inc:
6507 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6508 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6509 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6510 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
6511 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6512 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6513 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
6514 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
6515 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6516 // CHECK13: omp.dispatch.end:
6517 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
6518 // CHECK13-NEXT: ret void
6519 //
6520 //
6521 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
6522 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6523 // CHECK13-NEXT: entry:
6524 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6525 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6526 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6527 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
6528 // CHECK13-NEXT: ret void
6529 //
6530 //
6531 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30
6532 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6533 // CHECK13-NEXT: entry:
6534 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6535 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6536 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6537 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6538 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6539 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6540 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6541 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6542 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6543 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6544 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6545 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6546 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6547 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6548 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6549 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6550 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6551 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6552 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6553 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6554 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6555 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6556 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6557 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6558 // CHECK13: cond.true:
6559 // CHECK13-NEXT: br label [[COND_END:%.*]]
6560 // CHECK13: cond.false:
6561 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6562 // CHECK13-NEXT: br label [[COND_END]]
6563 // CHECK13: cond.end:
6564 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6565 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6566 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6567 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6568 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6569 // CHECK13: omp.inner.for.cond:
6570 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6571 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6572 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6573 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6574 // CHECK13: omp.inner.for.body:
6575 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6576 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6577 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6578 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6579 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
6580 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6581 // CHECK13: omp.inner.for.inc:
6582 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6583 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6584 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6585 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6586 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6587 // CHECK13: omp.inner.for.end:
6588 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6589 // CHECK13: omp.loop.exit:
6590 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6591 // CHECK13-NEXT: ret void
6592 //
6593 //
6594 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..31
6595 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6596 // CHECK13-NEXT: entry:
6597 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6598 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6599 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6600 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6601 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6602 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6603 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6604 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6605 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6606 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6607 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6608 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6609 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6610 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6611 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6612 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6613 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6614 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6615 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6616 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6617 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6618 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6619 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6620 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6621 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6622 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6623 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6624 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6625 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6626 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6627 // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6628 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6629 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6630 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6631 // CHECK13: omp.dispatch.cond:
6632 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6633 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6634 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6635 // CHECK13: omp.dispatch.body:
6636 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6637 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6638 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6639 // CHECK13: omp.inner.for.cond:
6640 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6641 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
6642 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6643 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6644 // CHECK13: omp.inner.for.body:
6645 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6646 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6647 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6648 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
6649 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
6650 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
6651 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6652 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
6653 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6654 // CHECK13: omp.body.continue:
6655 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6656 // CHECK13: omp.inner.for.inc:
6657 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6658 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
6659 // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6660 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
6661 // CHECK13: omp.inner.for.end:
6662 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6663 // CHECK13: omp.dispatch.inc:
6664 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6665 // CHECK13: omp.dispatch.end:
6666 // CHECK13-NEXT: ret void
6667 //
6668 //
6669 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
6670 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6671 // CHECK13-NEXT: entry:
6672 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6673 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6674 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6675 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6676 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6677 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6678 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6679 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
6680 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6681 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
6682 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6683 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
6684 // CHECK13-NEXT: ret void
6685 //
6686 //
6687 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..34
6688 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6689 // CHECK13-NEXT: entry:
6690 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6691 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6692 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6693 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6694 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6695 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6696 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6697 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6698 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6699 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6700 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6701 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6702 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6703 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6704 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6705 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6706 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6707 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6708 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6709 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6710 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6711 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6712 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6713 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6714 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6715 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6716 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6717 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6718 // CHECK13: cond.true:
6719 // CHECK13-NEXT: br label [[COND_END:%.*]]
6720 // CHECK13: cond.false:
6721 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6722 // CHECK13-NEXT: br label [[COND_END]]
6723 // CHECK13: cond.end:
6724 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6725 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6726 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6727 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6728 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6729 // CHECK13: omp.inner.for.cond:
6730 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6731 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6732 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6733 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6734 // CHECK13: omp.inner.for.body:
6735 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6736 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6737 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6738 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6739 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
6740 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6741 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
6742 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6743 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
6744 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6745 // CHECK13: omp.inner.for.inc:
6746 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6747 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6748 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6749 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6750 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6751 // CHECK13: omp.inner.for.end:
6752 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6753 // CHECK13: omp.loop.exit:
6754 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6755 // CHECK13-NEXT: ret void
6756 //
6757 //
6758 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..35
6759 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6760 // CHECK13-NEXT: entry:
6761 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6762 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6763 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6764 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6765 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6766 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6767 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6768 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6769 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6770 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6771 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6772 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6773 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6774 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6775 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6776 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6777 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6778 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6779 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6780 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6781 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6782 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6783 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6784 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6785 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6786 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6787 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
6788 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6789 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6790 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6791 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6792 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
6793 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6794 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6795 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6796 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
6797 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
6798 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6799 // CHECK13: omp.dispatch.cond:
6800 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6801 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
6802 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6803 // CHECK13: omp.dispatch.body:
6804 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6805 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6806 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6807 // CHECK13: omp.inner.for.cond:
6808 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6809 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
6810 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6811 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6812 // CHECK13: omp.inner.for.body:
6813 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6814 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
6815 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6816 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
6817 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
6818 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
6819 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6820 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
6821 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6822 // CHECK13: omp.body.continue:
6823 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6824 // CHECK13: omp.inner.for.inc:
6825 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6826 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
6827 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6828 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
6829 // CHECK13: omp.inner.for.end:
6830 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6831 // CHECK13: omp.dispatch.inc:
6832 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6833 // CHECK13: omp.dispatch.end:
6834 // CHECK13-NEXT: ret void
6835 //
6836 //
6837 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6838 // CHECK13-SAME: () #[[ATTR6:[0-9]+]] {
6839 // CHECK13-NEXT: entry:
6840 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1)
6841 // CHECK13-NEXT: ret void
6842 //
6843 //
6844 // CHECK15-LABEL: define {{[^@]+}}@main
6845 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6846 // CHECK15-NEXT: entry:
6847 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6848 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6849 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
6850 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
6851 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
6852 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6853 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
6854 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6855 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
6856 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
6857 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
6858 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
6859 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
6860 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6861 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6862 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
6863 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
6864 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
6865 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
6866 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
6867 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
6868 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
6869 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
6870 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
6871 // CHECK15-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4
6872 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
6873 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x i8*], align 4
6874 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x i8*], align 4
6875 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x i8*], align 4
6876 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
6877 // CHECK15-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
6878 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
6879 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
6880 // CHECK15-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4
6881 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x i8*], align 4
6882 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x i8*], align 4
6883 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x i8*], align 4
6884 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4
6885 // CHECK15-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
6886 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
6887 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
6888 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
6889 // CHECK15-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4
6890 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4
6891 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x i8*], align 4
6892 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x i8*], align 4
6893 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x i8*], align 4
6894 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4
6895 // CHECK15-NEXT: [[_TMP56:%.*]] = alloca i32, align 4
6896 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
6897 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
6898 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
6899 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6900 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
6901 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
6902 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6903 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
6904 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
6905 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
6906 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
6907 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
6908 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
6909 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
6910 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
6911 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
6912 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
6913 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
6914 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
6915 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6916 // CHECK15-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
6917 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
6918 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6919 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
6920 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
6921 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6922 // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 4
6923 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6924 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
6925 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
6926 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6927 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
6928 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
6929 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6930 // CHECK15-NEXT: store i8* null, i8** [[TMP16]], align 4
6931 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6932 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
6933 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
6934 // CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6935 // CHECK15-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
6936 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
6937 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6938 // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
6939 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6940 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4
6941 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6942 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6943 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6944 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
6945 // CHECK15-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
6946 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6947 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
6948 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6949 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6950 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6951 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6952 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
6953 // CHECK15-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
6954 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6955 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6956 // CHECK15-NEXT: store i32 1, i32* [[TMP30]], align 4
6957 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6958 // CHECK15-NEXT: store i32 3, i32* [[TMP31]], align 4
6959 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6960 // CHECK15-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
6961 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6962 // CHECK15-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
6963 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6964 // CHECK15-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
6965 // CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6966 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
6967 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6968 // CHECK15-NEXT: store i8** null, i8*** [[TMP36]], align 4
6969 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6970 // CHECK15-NEXT: store i8** null, i8*** [[TMP37]], align 4
6971 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6972 // CHECK15-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
6973 // CHECK15-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6974 // CHECK15-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
6975 // CHECK15-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6976 // CHECK15: omp_offload.failed:
6977 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
6978 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
6979 // CHECK15: omp_offload.cont:
6980 // CHECK15-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
6981 // CHECK15-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
6982 // CHECK15-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
6983 // CHECK15-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
6984 // CHECK15-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
6985 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
6986 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false)
6987 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
6988 // CHECK15-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
6989 // CHECK15-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
6990 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
6991 // CHECK15-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
6992 // CHECK15-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
6993 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
6994 // CHECK15-NEXT: store i8* null, i8** [[TMP50]], align 4
6995 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
6996 // CHECK15-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
6997 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
6998 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
6999 // CHECK15-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
7000 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
7001 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
7002 // CHECK15-NEXT: store i8* null, i8** [[TMP55]], align 4
7003 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
7004 // CHECK15-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
7005 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
7006 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
7007 // CHECK15-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
7008 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
7009 // CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
7010 // CHECK15-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
7011 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
7012 // CHECK15-NEXT: store i8* null, i8** [[TMP61]], align 4
7013 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
7014 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
7015 // CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
7016 // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
7017 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
7018 // CHECK15-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
7019 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
7020 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
7021 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
7022 // CHECK15-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
7023 // CHECK15-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
7024 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
7025 // CHECK15-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
7026 // CHECK15-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7027 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
7028 // CHECK15-NEXT: store i32 1, i32* [[TMP69]], align 4
7029 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
7030 // CHECK15-NEXT: store i32 3, i32* [[TMP70]], align 4
7031 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
7032 // CHECK15-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
7033 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
7034 // CHECK15-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
7035 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
7036 // CHECK15-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
7037 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
7038 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP74]], align 4
7039 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
7040 // CHECK15-NEXT: store i8** null, i8*** [[TMP75]], align 4
7041 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
7042 // CHECK15-NEXT: store i8** null, i8*** [[TMP76]], align 4
7043 // CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
7044 // CHECK15-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
7045 // CHECK15-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
7046 // CHECK15-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
7047 // CHECK15-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
7048 // CHECK15: omp_offload.failed16:
7049 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
7050 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]]
7051 // CHECK15: omp_offload.cont17:
7052 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
7053 // CHECK15-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_18]], align 4
7054 // CHECK15-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
7055 // CHECK15-NEXT: store i32 [[TMP81]], i32* [[N_CASTED19]], align 4
7056 // CHECK15-NEXT: [[TMP82:%.*]] = load i32, i32* [[N_CASTED19]], align 4
7057 // CHECK15-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
7058 // CHECK15-NEXT: store i32 [[TMP83]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7059 // CHECK15-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7060 // CHECK15-NEXT: [[TMP85:%.*]] = mul nuw i32 [[TMP0]], 4
7061 // CHECK15-NEXT: [[TMP86:%.*]] = sext i32 [[TMP85]] to i64
7062 // CHECK15-NEXT: [[TMP87:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES23]] to i8*
7063 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP87]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false)
7064 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
7065 // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
7066 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
7067 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
7068 // CHECK15-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
7069 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
7070 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
7071 // CHECK15-NEXT: store i8* null, i8** [[TMP92]], align 4
7072 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
7073 // CHECK15-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32*
7074 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP94]], align 4
7075 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
7076 // CHECK15-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32*
7077 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP96]], align 4
7078 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
7079 // CHECK15-NEXT: store i8* null, i8** [[TMP97]], align 4
7080 // CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
7081 // CHECK15-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
7082 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 4
7083 // CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
7084 // CHECK15-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
7085 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 4
7086 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
7087 // CHECK15-NEXT: store i64 [[TMP86]], i64* [[TMP102]], align 4
7088 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
7089 // CHECK15-NEXT: store i8* null, i8** [[TMP103]], align 4
7090 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
7091 // CHECK15-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32*
7092 // CHECK15-NEXT: store i32 [[TMP84]], i32* [[TMP105]], align 4
7093 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
7094 // CHECK15-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32*
7095 // CHECK15-NEXT: store i32 [[TMP84]], i32* [[TMP107]], align 4
7096 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
7097 // CHECK15-NEXT: store i8* null, i8** [[TMP108]], align 4
7098 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
7099 // CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
7100 // CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
7101 // CHECK15-NEXT: [[TMP112:%.*]] = load i32, i32* [[N]], align 4
7102 // CHECK15-NEXT: store i32 [[TMP112]], i32* [[DOTCAPTURE_EXPR_25]], align 4
7103 // CHECK15-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
7104 // CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP113]], 0
7105 // CHECK15-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
7106 // CHECK15-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
7107 // CHECK15-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
7108 // CHECK15-NEXT: [[TMP114:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
7109 // CHECK15-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP114]], 1
7110 // CHECK15-NEXT: [[TMP115:%.*]] = zext i32 [[ADD30]] to i64
7111 // CHECK15-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7112 // CHECK15-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
7113 // CHECK15-NEXT: store i32 1, i32* [[TMP116]], align 4
7114 // CHECK15-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
7115 // CHECK15-NEXT: store i32 4, i32* [[TMP117]], align 4
7116 // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
7117 // CHECK15-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
7118 // CHECK15-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
7119 // CHECK15-NEXT: store i8** [[TMP110]], i8*** [[TMP119]], align 4
7120 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
7121 // CHECK15-NEXT: store i64* [[TMP111]], i64** [[TMP120]], align 4
7122 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
7123 // CHECK15-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP121]], align 4
7124 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
7125 // CHECK15-NEXT: store i8** null, i8*** [[TMP122]], align 4
7126 // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
7127 // CHECK15-NEXT: store i8** null, i8*** [[TMP123]], align 4
7128 // CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
7129 // CHECK15-NEXT: store i64 [[TMP115]], i64* [[TMP124]], align 8
7130 // CHECK15-NEXT: [[TMP125:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
7131 // CHECK15-NEXT: [[TMP126:%.*]] = icmp ne i32 [[TMP125]], 0
7132 // CHECK15-NEXT: br i1 [[TMP126]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
7133 // CHECK15: omp_offload.failed32:
7134 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP82]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP84]]) #[[ATTR3]]
7135 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT33]]
7136 // CHECK15: omp_offload.cont33:
7137 // CHECK15-NEXT: [[TMP127:%.*]] = load i32, i32* [[N]], align 4
7138 // CHECK15-NEXT: store i32 [[TMP127]], i32* [[N_CASTED34]], align 4
7139 // CHECK15-NEXT: [[TMP128:%.*]] = load i32, i32* [[N_CASTED34]], align 4
7140 // CHECK15-NEXT: [[TMP129:%.*]] = mul nuw i32 [[TMP0]], 4
7141 // CHECK15-NEXT: [[TMP130:%.*]] = sext i32 [[TMP129]] to i64
7142 // CHECK15-NEXT: [[TMP131:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES38]] to i8*
7143 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP131]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false)
7144 // CHECK15-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
7145 // CHECK15-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32*
7146 // CHECK15-NEXT: store i32 [[TMP128]], i32* [[TMP133]], align 4
7147 // CHECK15-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
7148 // CHECK15-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
7149 // CHECK15-NEXT: store i32 [[TMP128]], i32* [[TMP135]], align 4
7150 // CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0
7151 // CHECK15-NEXT: store i8* null, i8** [[TMP136]], align 4
7152 // CHECK15-NEXT: [[TMP137:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
7153 // CHECK15-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i32*
7154 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP138]], align 4
7155 // CHECK15-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
7156 // CHECK15-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32*
7157 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP140]], align 4
7158 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1
7159 // CHECK15-NEXT: store i8* null, i8** [[TMP141]], align 4
7160 // CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
7161 // CHECK15-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32**
7162 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP143]], align 4
7163 // CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
7164 // CHECK15-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32**
7165 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP145]], align 4
7166 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
7167 // CHECK15-NEXT: store i64 [[TMP130]], i64* [[TMP146]], align 4
7168 // CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2
7169 // CHECK15-NEXT: store i8* null, i8** [[TMP147]], align 4
7170 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
7171 // CHECK15-NEXT: [[TMP149:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
7172 // CHECK15-NEXT: [[TMP150:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
7173 // CHECK15-NEXT: [[TMP151:%.*]] = load i32, i32* [[N]], align 4
7174 // CHECK15-NEXT: store i32 [[TMP151]], i32* [[DOTCAPTURE_EXPR_40]], align 4
7175 // CHECK15-NEXT: [[TMP152:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
7176 // CHECK15-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP152]], 0
7177 // CHECK15-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
7178 // CHECK15-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
7179 // CHECK15-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
7180 // CHECK15-NEXT: [[TMP153:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
7181 // CHECK15-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP153]], 1
7182 // CHECK15-NEXT: [[TMP154:%.*]] = zext i32 [[ADD45]] to i64
7183 // CHECK15-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7184 // CHECK15-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 0
7185 // CHECK15-NEXT: store i32 1, i32* [[TMP155]], align 4
7186 // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 1
7187 // CHECK15-NEXT: store i32 3, i32* [[TMP156]], align 4
7188 // CHECK15-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 2
7189 // CHECK15-NEXT: store i8** [[TMP148]], i8*** [[TMP157]], align 4
7190 // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 3
7191 // CHECK15-NEXT: store i8** [[TMP149]], i8*** [[TMP158]], align 4
7192 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 4
7193 // CHECK15-NEXT: store i64* [[TMP150]], i64** [[TMP159]], align 4
7194 // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 5
7195 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP160]], align 4
7196 // CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 6
7197 // CHECK15-NEXT: store i8** null, i8*** [[TMP161]], align 4
7198 // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 7
7199 // CHECK15-NEXT: store i8** null, i8*** [[TMP162]], align 4
7200 // CHECK15-NEXT: [[TMP163:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 8
7201 // CHECK15-NEXT: store i64 [[TMP154]], i64* [[TMP163]], align 8
7202 // CHECK15-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]])
7203 // CHECK15-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0
7204 // CHECK15-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
7205 // CHECK15: omp_offload.failed47:
7206 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP128]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
7207 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT48]]
7208 // CHECK15: omp_offload.cont48:
7209 // CHECK15-NEXT: [[TMP166:%.*]] = load i32, i32* [[M]], align 4
7210 // CHECK15-NEXT: store i32 [[TMP166]], i32* [[DOTCAPTURE_EXPR_49]], align 4
7211 // CHECK15-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
7212 // CHECK15-NEXT: store i32 [[TMP167]], i32* [[N_CASTED50]], align 4
7213 // CHECK15-NEXT: [[TMP168:%.*]] = load i32, i32* [[N_CASTED50]], align 4
7214 // CHECK15-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4
7215 // CHECK15-NEXT: store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
7216 // CHECK15-NEXT: [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
7217 // CHECK15-NEXT: [[TMP171:%.*]] = mul nuw i32 [[TMP0]], 4
7218 // CHECK15-NEXT: [[TMP172:%.*]] = sext i32 [[TMP171]] to i64
7219 // CHECK15-NEXT: [[TMP173:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES55]] to i8*
7220 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP173]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false)
7221 // CHECK15-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
7222 // CHECK15-NEXT: [[TMP175:%.*]] = bitcast i8** [[TMP174]] to i32*
7223 // CHECK15-NEXT: store i32 [[TMP168]], i32* [[TMP175]], align 4
7224 // CHECK15-NEXT: [[TMP176:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
7225 // CHECK15-NEXT: [[TMP177:%.*]] = bitcast i8** [[TMP176]] to i32*
7226 // CHECK15-NEXT: store i32 [[TMP168]], i32* [[TMP177]], align 4
7227 // CHECK15-NEXT: [[TMP178:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0
7228 // CHECK15-NEXT: store i8* null, i8** [[TMP178]], align 4
7229 // CHECK15-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
7230 // CHECK15-NEXT: [[TMP180:%.*]] = bitcast i8** [[TMP179]] to i32*
7231 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP180]], align 4
7232 // CHECK15-NEXT: [[TMP181:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
7233 // CHECK15-NEXT: [[TMP182:%.*]] = bitcast i8** [[TMP181]] to i32*
7234 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP182]], align 4
7235 // CHECK15-NEXT: [[TMP183:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1
7236 // CHECK15-NEXT: store i8* null, i8** [[TMP183]], align 4
7237 // CHECK15-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
7238 // CHECK15-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32**
7239 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP185]], align 4
7240 // CHECK15-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
7241 // CHECK15-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32**
7242 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP187]], align 4
7243 // CHECK15-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
7244 // CHECK15-NEXT: store i64 [[TMP172]], i64* [[TMP188]], align 4
7245 // CHECK15-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2
7246 // CHECK15-NEXT: store i8* null, i8** [[TMP189]], align 4
7247 // CHECK15-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
7248 // CHECK15-NEXT: [[TMP191:%.*]] = bitcast i8** [[TMP190]] to i32*
7249 // CHECK15-NEXT: store i32 [[TMP170]], i32* [[TMP191]], align 4
7250 // CHECK15-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
7251 // CHECK15-NEXT: [[TMP193:%.*]] = bitcast i8** [[TMP192]] to i32*
7252 // CHECK15-NEXT: store i32 [[TMP170]], i32* [[TMP193]], align 4
7253 // CHECK15-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3
7254 // CHECK15-NEXT: store i8* null, i8** [[TMP194]], align 4
7255 // CHECK15-NEXT: [[TMP195:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
7256 // CHECK15-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
7257 // CHECK15-NEXT: [[TMP197:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
7258 // CHECK15-NEXT: [[TMP198:%.*]] = load i32, i32* [[N]], align 4
7259 // CHECK15-NEXT: store i32 [[TMP198]], i32* [[DOTCAPTURE_EXPR_57]], align 4
7260 // CHECK15-NEXT: [[TMP199:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_57]], align 4
7261 // CHECK15-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP199]], 0
7262 // CHECK15-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
7263 // CHECK15-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
7264 // CHECK15-NEXT: store i32 [[SUB61]], i32* [[DOTCAPTURE_EXPR_58]], align 4
7265 // CHECK15-NEXT: [[TMP200:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
7266 // CHECK15-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP200]], 1
7267 // CHECK15-NEXT: [[TMP201:%.*]] = zext i32 [[ADD62]] to i64
7268 // CHECK15-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7269 // CHECK15-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 0
7270 // CHECK15-NEXT: store i32 1, i32* [[TMP202]], align 4
7271 // CHECK15-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 1
7272 // CHECK15-NEXT: store i32 4, i32* [[TMP203]], align 4
7273 // CHECK15-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 2
7274 // CHECK15-NEXT: store i8** [[TMP195]], i8*** [[TMP204]], align 4
7275 // CHECK15-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 3
7276 // CHECK15-NEXT: store i8** [[TMP196]], i8*** [[TMP205]], align 4
7277 // CHECK15-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 4
7278 // CHECK15-NEXT: store i64* [[TMP197]], i64** [[TMP206]], align 4
7279 // CHECK15-NEXT: [[TMP207:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 5
7280 // CHECK15-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP207]], align 4
7281 // CHECK15-NEXT: [[TMP208:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 6
7282 // CHECK15-NEXT: store i8** null, i8*** [[TMP208]], align 4
7283 // CHECK15-NEXT: [[TMP209:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 7
7284 // CHECK15-NEXT: store i8** null, i8*** [[TMP209]], align 4
7285 // CHECK15-NEXT: [[TMP210:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 8
7286 // CHECK15-NEXT: store i64 [[TMP201]], i64* [[TMP210]], align 8
7287 // CHECK15-NEXT: [[TMP211:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]])
7288 // CHECK15-NEXT: [[TMP212:%.*]] = icmp ne i32 [[TMP211]], 0
7289 // CHECK15-NEXT: br i1 [[TMP212]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
7290 // CHECK15: omp_offload.failed64:
7291 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP168]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP170]]) #[[ATTR3]]
7292 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT65]]
7293 // CHECK15: omp_offload.cont65:
7294 // CHECK15-NEXT: [[TMP213:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7295 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP213]])
7296 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
7297 // CHECK15-NEXT: [[TMP214:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
7298 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP214]])
7299 // CHECK15-NEXT: [[TMP215:%.*]] = load i32, i32* [[RETVAL]], align 4
7300 // CHECK15-NEXT: ret i32 [[TMP215]]
7301 //
7302 //
7303 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
7304 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7305 // CHECK15-NEXT: entry:
7306 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7307 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7308 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7309 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7310 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7311 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7312 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7313 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7314 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7315 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7316 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
7317 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
7318 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
7319 // CHECK15-NEXT: ret void
7320 //
7321 //
7322 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
7323 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7324 // CHECK15-NEXT: entry:
7325 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7326 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7327 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7328 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7329 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7330 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7331 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7332 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7333 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7334 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7335 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7336 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7337 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7338 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7339 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7340 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7341 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7342 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7343 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7344 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7345 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7346 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7347 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7348 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7349 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7350 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7351 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7352 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7353 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7354 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7355 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7356 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7357 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7358 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7359 // CHECK15: omp.precond.then:
7360 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7361 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7362 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
7363 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7364 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7365 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7366 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
7367 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7368 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7369 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7370 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
7371 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7372 // CHECK15: cond.true:
7373 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7374 // CHECK15-NEXT: br label [[COND_END:%.*]]
7375 // CHECK15: cond.false:
7376 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7377 // CHECK15-NEXT: br label [[COND_END]]
7378 // CHECK15: cond.end:
7379 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
7380 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7381 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7382 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
7383 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7384 // CHECK15: omp.inner.for.cond:
7385 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7386 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7387 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7388 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7389 // CHECK15: omp.inner.for.body:
7390 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7391 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7392 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
7393 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
7394 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
7395 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
7396 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7397 // CHECK15: omp.inner.for.inc:
7398 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7399 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7400 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7401 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7402 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7403 // CHECK15: omp.inner.for.end:
7404 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7405 // CHECK15: omp.loop.exit:
7406 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7407 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
7408 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
7409 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7410 // CHECK15: omp.precond.end:
7411 // CHECK15-NEXT: ret void
7412 //
7413 //
7414 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
7415 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7416 // CHECK15-NEXT: entry:
7417 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7418 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7419 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7420 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7421 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7422 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7423 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7424 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7425 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7426 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7427 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7428 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7429 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7430 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7431 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7432 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7433 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7434 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7435 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7436 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7437 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7438 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7439 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7440 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7441 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7442 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7443 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7444 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7445 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7446 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7447 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7448 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7449 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7450 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7451 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7452 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7453 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7454 // CHECK15: omp.precond.then:
7455 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7456 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7457 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
7458 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7459 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7460 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
7461 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
7462 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7463 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7464 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7465 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7466 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7467 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7468 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7469 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7470 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7471 // CHECK15: cond.true:
7472 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7473 // CHECK15-NEXT: br label [[COND_END:%.*]]
7474 // CHECK15: cond.false:
7475 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7476 // CHECK15-NEXT: br label [[COND_END]]
7477 // CHECK15: cond.end:
7478 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7479 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7480 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7481 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
7482 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7483 // CHECK15: omp.inner.for.cond:
7484 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7485 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7486 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7487 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7488 // CHECK15: omp.inner.for.body:
7489 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7490 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7491 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7492 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
7493 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
7494 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
7495 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7496 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7497 // CHECK15: omp.body.continue:
7498 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7499 // CHECK15: omp.inner.for.inc:
7500 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7501 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
7502 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
7503 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7504 // CHECK15: omp.inner.for.end:
7505 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7506 // CHECK15: omp.loop.exit:
7507 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7508 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
7509 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
7510 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7511 // CHECK15: omp.precond.end:
7512 // CHECK15-NEXT: ret void
7513 //
7514 //
7515 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
7516 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7517 // CHECK15-NEXT: entry:
7518 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7519 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7520 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7521 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7522 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7523 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7524 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7525 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7526 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7527 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7528 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
7529 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
7530 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
7531 // CHECK15-NEXT: ret void
7532 //
7533 //
7534 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
7535 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7536 // CHECK15-NEXT: entry:
7537 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7538 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7539 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7540 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7541 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7542 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7543 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7544 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7545 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7546 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7547 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7548 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7549 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7550 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7551 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7552 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7553 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7554 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7555 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7556 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7557 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7558 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7559 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7560 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7561 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7562 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7563 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7564 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7565 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7566 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7567 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7568 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7569 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7570 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7571 // CHECK15: omp.precond.then:
7572 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7573 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7574 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
7575 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7576 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7577 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7578 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
7579 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7580 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7581 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7582 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
7583 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7584 // CHECK15: cond.true:
7585 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7586 // CHECK15-NEXT: br label [[COND_END:%.*]]
7587 // CHECK15: cond.false:
7588 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7589 // CHECK15-NEXT: br label [[COND_END]]
7590 // CHECK15: cond.end:
7591 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
7592 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7593 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7594 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
7595 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7596 // CHECK15: omp.inner.for.cond:
7597 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7598 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7599 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7600 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7601 // CHECK15: omp.inner.for.body:
7602 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7603 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7604 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
7605 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
7606 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
7607 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
7608 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7609 // CHECK15: omp.inner.for.inc:
7610 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7611 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7612 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7613 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7614 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7615 // CHECK15: omp.inner.for.end:
7616 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7617 // CHECK15: omp.loop.exit:
7618 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7619 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
7620 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
7621 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7622 // CHECK15: omp.precond.end:
7623 // CHECK15-NEXT: ret void
7624 //
7625 //
7626 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
7627 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7628 // CHECK15-NEXT: entry:
7629 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7630 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7631 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7632 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7633 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7634 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7635 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7636 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7637 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7638 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7639 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7640 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7641 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7642 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7643 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7644 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7645 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7646 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7647 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7648 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7649 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7650 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7651 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7652 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7653 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7654 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7655 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7656 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7657 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7658 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7659 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7660 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7661 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7662 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7663 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7664 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7665 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7666 // CHECK15: omp.precond.then:
7667 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7668 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7669 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
7670 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7671 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7672 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
7673 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
7674 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7675 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7676 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7677 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7678 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7679 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7680 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7681 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7682 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7683 // CHECK15: cond.true:
7684 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7685 // CHECK15-NEXT: br label [[COND_END:%.*]]
7686 // CHECK15: cond.false:
7687 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7688 // CHECK15-NEXT: br label [[COND_END]]
7689 // CHECK15: cond.end:
7690 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7691 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7692 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7693 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
7694 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7695 // CHECK15: omp.inner.for.cond:
7696 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7697 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7698 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7699 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7700 // CHECK15: omp.inner.for.body:
7701 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7702 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7703 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7704 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
7705 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
7706 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
7707 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7708 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7709 // CHECK15: omp.body.continue:
7710 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7711 // CHECK15: omp.inner.for.inc:
7712 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7713 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
7714 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
7715 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7716 // CHECK15: omp.inner.for.end:
7717 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7718 // CHECK15: omp.loop.exit:
7719 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7720 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
7721 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
7722 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7723 // CHECK15: omp.precond.end:
7724 // CHECK15-NEXT: ret void
7725 //
7726 //
7727 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
7728 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7729 // CHECK15-NEXT: entry:
7730 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7731 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7732 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7733 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7734 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7735 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7736 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7737 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7738 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7739 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7740 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7741 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7742 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7743 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
7744 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
7745 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7746 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7747 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7748 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
7749 // CHECK15-NEXT: ret void
7750 //
7751 //
7752 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6
7753 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7754 // CHECK15-NEXT: entry:
7755 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7756 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7757 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7758 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7759 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7760 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7761 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7762 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7763 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7764 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7765 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7766 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7767 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7768 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7769 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7770 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
7771 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7772 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7773 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7774 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7775 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7776 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7777 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7778 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7779 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7780 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7781 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7782 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7783 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7784 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7785 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7786 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7787 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7788 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7789 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7790 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7791 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7792 // CHECK15: omp.precond.then:
7793 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7794 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7795 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
7796 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7797 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7798 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7799 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7800 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7801 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
7802 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7803 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7804 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7805 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7806 // CHECK15: cond.true:
7807 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7808 // CHECK15-NEXT: br label [[COND_END:%.*]]
7809 // CHECK15: cond.false:
7810 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7811 // CHECK15-NEXT: br label [[COND_END]]
7812 // CHECK15: cond.end:
7813 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7814 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7815 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7816 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7817 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7818 // CHECK15: omp.inner.for.cond:
7819 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7820 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7821 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
7822 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
7823 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7824 // CHECK15: omp.inner.for.body:
7825 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7826 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7827 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
7828 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
7829 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
7830 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7831 // CHECK15-NEXT: store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7832 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7833 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]])
7834 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7835 // CHECK15: omp.inner.for.inc:
7836 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7837 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7838 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
7839 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7840 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7841 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7842 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
7843 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
7844 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7845 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7846 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
7847 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
7848 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7849 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7850 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
7851 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
7852 // CHECK15: cond.true11:
7853 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7854 // CHECK15-NEXT: br label [[COND_END13:%.*]]
7855 // CHECK15: cond.false12:
7856 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7857 // CHECK15-NEXT: br label [[COND_END13]]
7858 // CHECK15: cond.end13:
7859 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
7860 // CHECK15-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
7861 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7862 // CHECK15-NEXT: store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4
7863 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7864 // CHECK15: omp.inner.for.end:
7865 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7866 // CHECK15: omp.loop.exit:
7867 // CHECK15-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7868 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
7869 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
7870 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7871 // CHECK15: omp.precond.end:
7872 // CHECK15-NEXT: ret void
7873 //
7874 //
7875 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..7
7876 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7877 // CHECK15-NEXT: entry:
7878 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7879 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7880 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7881 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7882 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7883 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7884 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7885 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7886 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7887 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7888 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7889 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7890 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7891 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7892 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7893 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7894 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7895 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
7896 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7897 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7898 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7899 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7900 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7901 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7902 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7903 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7904 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7905 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7906 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7907 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7908 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7909 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7910 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7911 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7912 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7913 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7914 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7915 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7916 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7917 // CHECK15: omp.precond.then:
7918 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7919 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7920 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
7921 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7922 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7923 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
7924 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
7925 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7926 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7927 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7928 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7929 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7930 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7931 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7932 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7933 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7934 // CHECK15: cond.true:
7935 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7936 // CHECK15-NEXT: br label [[COND_END:%.*]]
7937 // CHECK15: cond.false:
7938 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7939 // CHECK15-NEXT: br label [[COND_END]]
7940 // CHECK15: cond.end:
7941 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7942 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7943 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7944 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
7945 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7946 // CHECK15: omp.inner.for.cond:
7947 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7948 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7949 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7950 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7951 // CHECK15: omp.inner.for.body:
7952 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7953 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7954 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7955 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
7956 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
7957 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
7958 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7959 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7960 // CHECK15: omp.body.continue:
7961 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7962 // CHECK15: omp.inner.for.inc:
7963 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7964 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
7965 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7966 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7967 // CHECK15: omp.inner.for.end:
7968 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7969 // CHECK15: omp.loop.exit:
7970 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7971 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
7972 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
7973 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7974 // CHECK15: omp.precond.end:
7975 // CHECK15-NEXT: ret void
7976 //
7977 //
7978 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
7979 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7980 // CHECK15-NEXT: entry:
7981 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7982 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7983 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7984 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
7985 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7986 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7987 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7988 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7989 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7990 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
7991 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
7992 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
7993 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
7994 // CHECK15-NEXT: ret void
7995 //
7996 //
7997 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..10
7998 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7999 // CHECK15-NEXT: entry:
8000 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8001 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8002 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8003 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8004 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8005 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8006 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8007 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8008 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8009 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8010 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8011 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8012 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8013 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8014 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8015 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8016 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8017 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8018 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8019 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8020 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8021 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8022 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8023 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8024 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8025 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8026 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8027 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8028 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8029 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8030 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8031 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8032 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8033 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8034 // CHECK15: omp.precond.then:
8035 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8036 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8037 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8038 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8039 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8040 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8041 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8042 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8043 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8044 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8045 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8046 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8047 // CHECK15: cond.true:
8048 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8049 // CHECK15-NEXT: br label [[COND_END:%.*]]
8050 // CHECK15: cond.false:
8051 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8052 // CHECK15-NEXT: br label [[COND_END]]
8053 // CHECK15: cond.end:
8054 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8055 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8056 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8057 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8058 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8059 // CHECK15: omp.inner.for.cond:
8060 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8061 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8062 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8063 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8064 // CHECK15: omp.inner.for.body:
8065 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8066 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8067 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
8068 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
8069 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
8070 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
8071 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8072 // CHECK15: omp.inner.for.inc:
8073 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8074 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8075 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
8076 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8077 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8078 // CHECK15: omp.inner.for.end:
8079 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8080 // CHECK15: omp.loop.exit:
8081 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8082 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8083 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8084 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8085 // CHECK15: omp.precond.end:
8086 // CHECK15-NEXT: ret void
8087 //
8088 //
8089 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11
8090 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8091 // CHECK15-NEXT: entry:
8092 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8093 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8094 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8095 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8096 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8097 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8098 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8099 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8100 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8101 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8102 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8103 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8104 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8105 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8106 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8107 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8108 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8109 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8110 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8111 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8112 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8113 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8114 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8115 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8116 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8117 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8118 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8119 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8120 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8121 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8122 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8123 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8124 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8125 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8126 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8127 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8128 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8129 // CHECK15: omp.precond.then:
8130 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8131 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8132 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8133 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8134 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8135 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
8136 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
8137 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8138 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8139 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8140 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8141 // CHECK15-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8142 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
8143 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
8144 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8145 // CHECK15: omp.dispatch.cond:
8146 // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8147 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
8148 // CHECK15-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8149 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
8150 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8151 // CHECK15: omp.dispatch.body:
8152 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8153 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8154 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8155 // CHECK15: omp.inner.for.cond:
8156 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8157 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
8158 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8159 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8160 // CHECK15: omp.inner.for.body:
8161 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8162 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8163 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8164 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
8165 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
8166 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
8167 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
8168 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8169 // CHECK15: omp.body.continue:
8170 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8171 // CHECK15: omp.inner.for.inc:
8172 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8173 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
8174 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8175 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
8176 // CHECK15: omp.inner.for.end:
8177 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8178 // CHECK15: omp.dispatch.inc:
8179 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
8180 // CHECK15: omp.dispatch.end:
8181 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8182 // CHECK15: omp.precond.end:
8183 // CHECK15-NEXT: ret void
8184 //
8185 //
8186 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
8187 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8188 // CHECK15-NEXT: entry:
8189 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8190 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8191 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8192 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8193 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8194 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8195 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8196 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8197 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8198 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8199 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8200 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8201 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8202 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
8203 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
8204 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8205 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8206 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8207 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
8208 // CHECK15-NEXT: ret void
8209 //
8210 //
8211 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14
8212 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8213 // CHECK15-NEXT: entry:
8214 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8215 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8216 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8217 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8218 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8219 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8220 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8221 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8222 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8223 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8224 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8225 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8226 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8227 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8228 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8229 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
8230 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
8231 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8232 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8233 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8234 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8235 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8236 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8237 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8238 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8239 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8240 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8241 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8242 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8243 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8244 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8245 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8246 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8247 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8248 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8249 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8250 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8251 // CHECK15: omp.precond.then:
8252 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8253 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8254 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
8255 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8256 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8257 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8258 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
8259 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8260 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8261 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8262 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8263 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8264 // CHECK15: cond.true:
8265 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8266 // CHECK15-NEXT: br label [[COND_END:%.*]]
8267 // CHECK15: cond.false:
8268 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8269 // CHECK15-NEXT: br label [[COND_END]]
8270 // CHECK15: cond.end:
8271 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8272 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8273 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8274 // CHECK15-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
8275 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8276 // CHECK15: omp.inner.for.cond:
8277 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8278 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8279 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8280 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8281 // CHECK15: omp.inner.for.body:
8282 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8283 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8284 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
8285 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
8286 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
8287 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8288 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8289 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8290 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]])
8291 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8292 // CHECK15: omp.inner.for.inc:
8293 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8294 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8295 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
8296 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8297 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8298 // CHECK15: omp.inner.for.end:
8299 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8300 // CHECK15: omp.loop.exit:
8301 // CHECK15-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8302 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
8303 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
8304 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8305 // CHECK15: omp.precond.end:
8306 // CHECK15-NEXT: ret void
8307 //
8308 //
8309 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15
8310 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8311 // CHECK15-NEXT: entry:
8312 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8313 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8314 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8315 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8316 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8317 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8318 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8319 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8320 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8321 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8322 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8323 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8324 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8325 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8326 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8327 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8328 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8329 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
8330 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8331 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8332 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8333 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8334 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8335 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8336 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8337 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8338 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8339 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8340 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
8341 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8342 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8343 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8344 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8345 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8346 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8347 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8348 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8349 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8350 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8351 // CHECK15: omp.precond.then:
8352 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8353 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8354 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
8355 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8356 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8357 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
8358 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
8359 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8360 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8361 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8362 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8363 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8364 // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8365 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
8366 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
8367 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8368 // CHECK15: omp.dispatch.cond:
8369 // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8370 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
8371 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8372 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
8373 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8374 // CHECK15: omp.dispatch.body:
8375 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8376 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
8377 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8378 // CHECK15: omp.inner.for.cond:
8379 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8380 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
8381 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8382 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8383 // CHECK15: omp.inner.for.body:
8384 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8385 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
8386 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8387 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
8388 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
8389 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
8390 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
8391 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8392 // CHECK15: omp.body.continue:
8393 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8394 // CHECK15: omp.inner.for.inc:
8395 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8396 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
8397 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8398 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
8399 // CHECK15: omp.inner.for.end:
8400 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8401 // CHECK15: omp.dispatch.inc:
8402 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
8403 // CHECK15: omp.dispatch.end:
8404 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8405 // CHECK15: omp.precond.end:
8406 // CHECK15-NEXT: ret void
8407 //
8408 //
8409 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8410 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
8411 // CHECK15-NEXT: entry:
8412 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8413 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
8414 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
8415 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
8416 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
8417 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
8418 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8419 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
8420 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
8421 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
8422 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
8423 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8424 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8425 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 4
8426 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 4
8427 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 4
8428 // CHECK15-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
8429 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 4
8430 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 4
8431 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 4
8432 // CHECK15-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
8433 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
8434 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4
8435 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x i8*], align 4
8436 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x i8*], align 4
8437 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x i8*], align 4
8438 // CHECK15-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
8439 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8440 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
8441 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8442 // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
8443 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
8444 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8445 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
8446 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
8447 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8448 // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 4
8449 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8450 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8451 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
8452 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
8453 // CHECK15-NEXT: store i32 1, i32* [[TMP7]], align 4
8454 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
8455 // CHECK15-NEXT: store i32 1, i32* [[TMP8]], align 4
8456 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
8457 // CHECK15-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
8458 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
8459 // CHECK15-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
8460 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
8461 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 4
8462 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
8463 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 4
8464 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
8465 // CHECK15-NEXT: store i8** null, i8*** [[TMP13]], align 4
8466 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
8467 // CHECK15-NEXT: store i8** null, i8*** [[TMP14]], align 4
8468 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
8469 // CHECK15-NEXT: store i64 10, i64* [[TMP15]], align 8
8470 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
8471 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
8472 // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8473 // CHECK15: omp_offload.failed:
8474 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
8475 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
8476 // CHECK15: omp_offload.cont:
8477 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8478 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
8479 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
8480 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8481 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
8482 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
8483 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
8484 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4
8485 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8486 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8487 // CHECK15-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8488 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
8489 // CHECK15-NEXT: store i32 1, i32* [[TMP25]], align 4
8490 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
8491 // CHECK15-NEXT: store i32 1, i32* [[TMP26]], align 4
8492 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
8493 // CHECK15-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
8494 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
8495 // CHECK15-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
8496 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
8497 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 4
8498 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
8499 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 4
8500 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
8501 // CHECK15-NEXT: store i8** null, i8*** [[TMP31]], align 4
8502 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
8503 // CHECK15-NEXT: store i8** null, i8*** [[TMP32]], align 4
8504 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
8505 // CHECK15-NEXT: store i64 10, i64* [[TMP33]], align 8
8506 // CHECK15-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
8507 // CHECK15-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
8508 // CHECK15-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
8509 // CHECK15: omp_offload.failed6:
8510 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
8511 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT7]]
8512 // CHECK15: omp_offload.cont7:
8513 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
8514 // CHECK15-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
8515 // CHECK15-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8516 // CHECK15-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8517 // CHECK15-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8518 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8519 // CHECK15-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
8520 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 4
8521 // CHECK15-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8522 // CHECK15-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
8523 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 4
8524 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
8525 // CHECK15-NEXT: store i8* null, i8** [[TMP43]], align 4
8526 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
8527 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32*
8528 // CHECK15-NEXT: store i32 [[TMP38]], i32* [[TMP45]], align 4
8529 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
8530 // CHECK15-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
8531 // CHECK15-NEXT: store i32 [[TMP38]], i32* [[TMP47]], align 4
8532 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
8533 // CHECK15-NEXT: store i8* null, i8** [[TMP48]], align 4
8534 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8535 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8536 // CHECK15-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8537 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
8538 // CHECK15-NEXT: store i32 1, i32* [[TMP51]], align 4
8539 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
8540 // CHECK15-NEXT: store i32 2, i32* [[TMP52]], align 4
8541 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
8542 // CHECK15-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 4
8543 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
8544 // CHECK15-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 4
8545 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
8546 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 4
8547 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
8548 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 4
8549 // CHECK15-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
8550 // CHECK15-NEXT: store i8** null, i8*** [[TMP57]], align 4
8551 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
8552 // CHECK15-NEXT: store i8** null, i8*** [[TMP58]], align 4
8553 // CHECK15-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
8554 // CHECK15-NEXT: store i64 10, i64* [[TMP59]], align 8
8555 // CHECK15-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
8556 // CHECK15-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
8557 // CHECK15-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
8558 // CHECK15: omp_offload.failed13:
8559 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP38]]) #[[ATTR3]]
8560 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT14]]
8561 // CHECK15: omp_offload.cont14:
8562 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8563 // CHECK15-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
8564 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 4
8565 // CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8566 // CHECK15-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
8567 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 4
8568 // CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
8569 // CHECK15-NEXT: store i8* null, i8** [[TMP66]], align 4
8570 // CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8571 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8572 // CHECK15-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8573 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
8574 // CHECK15-NEXT: store i32 1, i32* [[TMP69]], align 4
8575 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
8576 // CHECK15-NEXT: store i32 1, i32* [[TMP70]], align 4
8577 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
8578 // CHECK15-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 4
8579 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
8580 // CHECK15-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 4
8581 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
8582 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 4
8583 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
8584 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 4
8585 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
8586 // CHECK15-NEXT: store i8** null, i8*** [[TMP75]], align 4
8587 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
8588 // CHECK15-NEXT: store i8** null, i8*** [[TMP76]], align 4
8589 // CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
8590 // CHECK15-NEXT: store i64 10, i64* [[TMP77]], align 8
8591 // CHECK15-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
8592 // CHECK15-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
8593 // CHECK15-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
8594 // CHECK15: omp_offload.failed20:
8595 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
8596 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT21]]
8597 // CHECK15: omp_offload.cont21:
8598 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
8599 // CHECK15-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
8600 // CHECK15-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
8601 // CHECK15-NEXT: store i32 [[TMP81]], i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
8602 // CHECK15-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
8603 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
8604 // CHECK15-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
8605 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 4
8606 // CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
8607 // CHECK15-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
8608 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 4
8609 // CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
8610 // CHECK15-NEXT: store i8* null, i8** [[TMP87]], align 4
8611 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
8612 // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
8613 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
8614 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
8615 // CHECK15-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
8616 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
8617 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1
8618 // CHECK15-NEXT: store i8* null, i8** [[TMP92]], align 4
8619 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
8620 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
8621 // CHECK15-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8622 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 0
8623 // CHECK15-NEXT: store i32 1, i32* [[TMP95]], align 4
8624 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 1
8625 // CHECK15-NEXT: store i32 2, i32* [[TMP96]], align 4
8626 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 2
8627 // CHECK15-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 4
8628 // CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 3
8629 // CHECK15-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 4
8630 // CHECK15-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 4
8631 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 4
8632 // CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 5
8633 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 4
8634 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 6
8635 // CHECK15-NEXT: store i8** null, i8*** [[TMP101]], align 4
8636 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 7
8637 // CHECK15-NEXT: store i8** null, i8*** [[TMP102]], align 4
8638 // CHECK15-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 8
8639 // CHECK15-NEXT: store i64 10, i64* [[TMP103]], align 8
8640 // CHECK15-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]])
8641 // CHECK15-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
8642 // CHECK15-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
8643 // CHECK15: omp_offload.failed29:
8644 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP82]]) #[[ATTR3]]
8645 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT30]]
8646 // CHECK15: omp_offload.cont30:
8647 // CHECK15-NEXT: ret i32 0
8648 //
8649 //
8650 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
8651 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8652 // CHECK15-NEXT: entry:
8653 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8654 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8655 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8656 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
8657 // CHECK15-NEXT: ret void
8658 //
8659 //
8660 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18
8661 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8662 // CHECK15-NEXT: entry:
8663 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8664 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8665 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8666 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8667 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8668 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8669 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8670 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8671 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8672 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8673 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8674 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8675 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8676 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8677 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8678 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
8679 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8680 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8681 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8682 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8683 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8684 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8685 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8686 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8687 // CHECK15: cond.true:
8688 // CHECK15-NEXT: br label [[COND_END:%.*]]
8689 // CHECK15: cond.false:
8690 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8691 // CHECK15-NEXT: br label [[COND_END]]
8692 // CHECK15: cond.end:
8693 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8694 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8695 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8696 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8697 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8698 // CHECK15: omp.inner.for.cond:
8699 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8700 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8701 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8702 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8703 // CHECK15: omp.inner.for.body:
8704 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8705 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8706 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
8707 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8708 // CHECK15: omp.inner.for.inc:
8709 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8710 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8711 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8712 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8713 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8714 // CHECK15: omp.inner.for.end:
8715 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8716 // CHECK15: omp.loop.exit:
8717 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8718 // CHECK15-NEXT: ret void
8719 //
8720 //
8721 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..19
8722 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8723 // CHECK15-NEXT: entry:
8724 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8725 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8726 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8727 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8728 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8729 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8730 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8731 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8732 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8733 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8734 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8735 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8736 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8737 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8738 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8739 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8740 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8741 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8742 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8743 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8744 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8745 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8746 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8747 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8748 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8749 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8750 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8751 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8752 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8753 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8754 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8755 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8756 // CHECK15: cond.true:
8757 // CHECK15-NEXT: br label [[COND_END:%.*]]
8758 // CHECK15: cond.false:
8759 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8760 // CHECK15-NEXT: br label [[COND_END]]
8761 // CHECK15: cond.end:
8762 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8763 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8764 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8765 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8766 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8767 // CHECK15: omp.inner.for.cond:
8768 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8769 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8770 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8771 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8772 // CHECK15: omp.inner.for.body:
8773 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8774 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8775 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8776 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8777 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
8778 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
8779 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8780 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8781 // CHECK15: omp.body.continue:
8782 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8783 // CHECK15: omp.inner.for.inc:
8784 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8785 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8786 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8787 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8788 // CHECK15: omp.inner.for.end:
8789 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8790 // CHECK15: omp.loop.exit:
8791 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8792 // CHECK15-NEXT: ret void
8793 //
8794 //
8795 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
8796 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8797 // CHECK15-NEXT: entry:
8798 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8799 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8800 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8801 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
8802 // CHECK15-NEXT: ret void
8803 //
8804 //
8805 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22
8806 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8807 // CHECK15-NEXT: entry:
8808 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8809 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8810 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8811 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8812 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8813 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8814 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8815 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8816 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8817 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8818 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8819 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8820 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8821 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8822 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8823 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
8824 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8825 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8826 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8827 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8828 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8829 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8830 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8831 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8832 // CHECK15: cond.true:
8833 // CHECK15-NEXT: br label [[COND_END:%.*]]
8834 // CHECK15: cond.false:
8835 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8836 // CHECK15-NEXT: br label [[COND_END]]
8837 // CHECK15: cond.end:
8838 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8839 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8840 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8841 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8842 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8843 // CHECK15: omp.inner.for.cond:
8844 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8845 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8846 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8847 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8848 // CHECK15: omp.inner.for.body:
8849 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8850 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8851 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
8852 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8853 // CHECK15: omp.inner.for.inc:
8854 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8855 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8856 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8857 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8858 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8859 // CHECK15: omp.inner.for.end:
8860 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8861 // CHECK15: omp.loop.exit:
8862 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8863 // CHECK15-NEXT: ret void
8864 //
8865 //
8866 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..23
8867 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8868 // CHECK15-NEXT: entry:
8869 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8870 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8871 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8872 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8873 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8874 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8875 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8876 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8877 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8878 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8879 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8880 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8881 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8882 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8883 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8884 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8885 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8886 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8887 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8888 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8889 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8890 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8891 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8892 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8893 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8894 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8895 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8896 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8897 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8898 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8899 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8900 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8901 // CHECK15: cond.true:
8902 // CHECK15-NEXT: br label [[COND_END:%.*]]
8903 // CHECK15: cond.false:
8904 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8905 // CHECK15-NEXT: br label [[COND_END]]
8906 // CHECK15: cond.end:
8907 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8908 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8909 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8910 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8911 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8912 // CHECK15: omp.inner.for.cond:
8913 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8914 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8915 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8916 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8917 // CHECK15: omp.inner.for.body:
8918 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8919 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8920 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8921 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8922 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
8923 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
8924 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8925 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8926 // CHECK15: omp.body.continue:
8927 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8928 // CHECK15: omp.inner.for.inc:
8929 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8930 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8931 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8932 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8933 // CHECK15: omp.inner.for.end:
8934 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8935 // CHECK15: omp.loop.exit:
8936 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8937 // CHECK15-NEXT: ret void
8938 //
8939 //
8940 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
8941 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8942 // CHECK15-NEXT: entry:
8943 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8944 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8945 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8946 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8947 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8948 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8949 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8950 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8951 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8952 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
8953 // CHECK15-NEXT: ret void
8954 //
8955 //
8956 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26
8957 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8958 // CHECK15-NEXT: entry:
8959 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8960 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8961 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8962 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8963 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8964 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8965 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8966 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8967 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8968 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8969 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8970 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8971 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8972 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8973 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8974 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8975 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8976 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8977 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
8978 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8979 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8980 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8981 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8982 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8983 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8984 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8985 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8986 // CHECK15: cond.true:
8987 // CHECK15-NEXT: br label [[COND_END:%.*]]
8988 // CHECK15: cond.false:
8989 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8990 // CHECK15-NEXT: br label [[COND_END]]
8991 // CHECK15: cond.end:
8992 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8993 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8994 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8995 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8996 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8997 // CHECK15: omp.inner.for.cond:
8998 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8999 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9000 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9001 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9002 // CHECK15: omp.inner.for.body:
9003 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9004 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9005 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9006 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9007 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9008 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
9009 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9010 // CHECK15: omp.inner.for.inc:
9011 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9012 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9013 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9014 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9015 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
9016 // CHECK15: omp.inner.for.end:
9017 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9018 // CHECK15: omp.loop.exit:
9019 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9020 // CHECK15-NEXT: ret void
9021 //
9022 //
9023 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..27
9024 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9025 // CHECK15-NEXT: entry:
9026 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9027 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9028 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9029 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9030 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9031 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9032 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9033 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9034 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9035 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9036 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9037 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9038 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9039 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9040 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9041 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9042 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9043 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9044 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9045 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9046 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9047 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9048 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9049 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9050 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9051 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9052 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9053 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9054 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9055 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9056 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
9057 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
9058 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9059 // CHECK15: omp.dispatch.cond:
9060 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9061 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9062 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
9063 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9064 // CHECK15: cond.true:
9065 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9066 // CHECK15-NEXT: br label [[COND_END:%.*]]
9067 // CHECK15: cond.false:
9068 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9069 // CHECK15-NEXT: br label [[COND_END]]
9070 // CHECK15: cond.end:
9071 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
9072 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9073 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9074 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
9075 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9076 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9077 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
9078 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9079 // CHECK15: omp.dispatch.body:
9080 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9081 // CHECK15: omp.inner.for.cond:
9082 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9083 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9084 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9085 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9086 // CHECK15: omp.inner.for.body:
9087 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9088 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
9089 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9090 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9091 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
9092 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
9093 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
9094 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9095 // CHECK15: omp.body.continue:
9096 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9097 // CHECK15: omp.inner.for.inc:
9098 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9099 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
9100 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9101 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
9102 // CHECK15: omp.inner.for.end:
9103 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9104 // CHECK15: omp.dispatch.inc:
9105 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9106 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9107 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
9108 // CHECK15-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
9109 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9110 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9111 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9112 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
9113 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9114 // CHECK15: omp.dispatch.end:
9115 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
9116 // CHECK15-NEXT: ret void
9117 //
9118 //
9119 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
9120 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9121 // CHECK15-NEXT: entry:
9122 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9123 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9124 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9125 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9126 // CHECK15-NEXT: ret void
9127 //
9128 //
9129 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30
9130 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9131 // CHECK15-NEXT: entry:
9132 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9133 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9134 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9135 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9136 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9137 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9138 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9139 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9140 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9141 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9142 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9143 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9144 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9145 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9146 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9147 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9148 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9149 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9150 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9151 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9152 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9153 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9154 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9155 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9156 // CHECK15: cond.true:
9157 // CHECK15-NEXT: br label [[COND_END:%.*]]
9158 // CHECK15: cond.false:
9159 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9160 // CHECK15-NEXT: br label [[COND_END]]
9161 // CHECK15: cond.end:
9162 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9163 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9164 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9165 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9166 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9167 // CHECK15: omp.inner.for.cond:
9168 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9169 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9170 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9171 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9172 // CHECK15: omp.inner.for.body:
9173 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9174 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9175 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
9176 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9177 // CHECK15: omp.inner.for.inc:
9178 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9179 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9180 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
9181 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9182 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
9183 // CHECK15: omp.inner.for.end:
9184 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9185 // CHECK15: omp.loop.exit:
9186 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9187 // CHECK15-NEXT: ret void
9188 //
9189 //
9190 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..31
9191 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9192 // CHECK15-NEXT: entry:
9193 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9194 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9195 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9196 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9197 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9198 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9199 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9200 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9201 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9202 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9203 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9204 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9205 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9206 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9207 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9208 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9209 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9210 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9211 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9212 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9213 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9214 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9215 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9216 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9217 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9218 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9219 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9220 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9221 // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9222 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
9223 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
9224 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9225 // CHECK15: omp.dispatch.cond:
9226 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9227 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
9228 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9229 // CHECK15: omp.dispatch.body:
9230 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9231 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
9232 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9233 // CHECK15: omp.inner.for.cond:
9234 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9235 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
9236 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9237 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9238 // CHECK15: omp.inner.for.body:
9239 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9240 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9241 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9242 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
9243 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
9244 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
9245 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
9246 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9247 // CHECK15: omp.body.continue:
9248 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9249 // CHECK15: omp.inner.for.inc:
9250 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9251 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
9252 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9253 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9254 // CHECK15: omp.inner.for.end:
9255 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9256 // CHECK15: omp.dispatch.inc:
9257 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9258 // CHECK15: omp.dispatch.end:
9259 // CHECK15-NEXT: ret void
9260 //
9261 //
9262 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
9263 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9264 // CHECK15-NEXT: entry:
9265 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9266 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9267 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9268 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9269 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9270 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9271 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9272 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9273 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9274 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
9275 // CHECK15-NEXT: ret void
9276 //
9277 //
9278 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..34
9279 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9280 // CHECK15-NEXT: entry:
9281 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9282 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9283 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9284 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9285 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9286 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9287 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9288 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9289 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9290 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9291 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9292 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9293 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9294 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9295 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9296 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9297 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9298 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9299 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9300 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9301 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9302 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9303 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9304 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9305 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9306 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9307 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9308 // CHECK15: cond.true:
9309 // CHECK15-NEXT: br label [[COND_END:%.*]]
9310 // CHECK15: cond.false:
9311 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9312 // CHECK15-NEXT: br label [[COND_END]]
9313 // CHECK15: cond.end:
9314 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9315 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9316 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9317 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9318 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9319 // CHECK15: omp.inner.for.cond:
9320 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9321 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9322 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9323 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9324 // CHECK15: omp.inner.for.body:
9325 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9326 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9327 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9328 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9329 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9330 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
9331 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9332 // CHECK15: omp.inner.for.inc:
9333 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9334 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9335 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9336 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9337 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
9338 // CHECK15: omp.inner.for.end:
9339 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9340 // CHECK15: omp.loop.exit:
9341 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9342 // CHECK15-NEXT: ret void
9343 //
9344 //
9345 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..35
9346 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9347 // CHECK15-NEXT: entry:
9348 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9349 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9350 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9351 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9352 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9353 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9354 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9355 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9356 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9357 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9358 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9359 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9360 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9361 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9362 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9363 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9364 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9365 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9366 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9367 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9368 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9369 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9370 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9371 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9372 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9373 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9374 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9375 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9376 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9377 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9378 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9379 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9380 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
9381 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
9382 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9383 // CHECK15: omp.dispatch.cond:
9384 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9385 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
9386 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9387 // CHECK15: omp.dispatch.body:
9388 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9389 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
9390 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9391 // CHECK15: omp.inner.for.cond:
9392 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9393 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
9394 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9395 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9396 // CHECK15: omp.inner.for.body:
9397 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9398 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9399 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9400 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
9401 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
9402 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
9403 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
9404 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9405 // CHECK15: omp.body.continue:
9406 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9407 // CHECK15: omp.inner.for.inc:
9408 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9409 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
9410 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9411 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
9412 // CHECK15: omp.inner.for.end:
9413 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9414 // CHECK15: omp.dispatch.inc:
9415 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9416 // CHECK15: omp.dispatch.end:
9417 // CHECK15-NEXT: ret void
9418 //
9419 //
9420 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9421 // CHECK15-SAME: () #[[ATTR6:[0-9]+]] {
9422 // CHECK15-NEXT: entry:
9423 // CHECK15-NEXT: call void @__tgt_register_requires(i64 1)
9424 // CHECK15-NEXT: ret void
9425 //
9426 //
9427 // CHECK17-LABEL: define {{[^@]+}}@main
9428 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9429 // CHECK17-NEXT: entry:
9430 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9431 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9432 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
9433 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4
9434 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
9435 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9436 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
9437 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9438 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
9439 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
9440 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
9441 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
9442 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
9443 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9444 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9445 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
9446 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
9447 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
9448 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
9449 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
9450 // CHECK17-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
9451 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
9452 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
9453 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
9454 // CHECK17-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
9455 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9456 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [4 x i8*], align 8
9457 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [4 x i8*], align 8
9458 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [4 x i8*], align 8
9459 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES26:%.*]] = alloca [4 x i64], align 8
9460 // CHECK17-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
9461 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
9462 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_29:%.*]] = alloca i32, align 4
9463 // CHECK17-NEXT: [[N_CASTED37:%.*]] = alloca i64, align 8
9464 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS39:%.*]] = alloca [3 x i8*], align 8
9465 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS40:%.*]] = alloca [3 x i8*], align 8
9466 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS41:%.*]] = alloca [3 x i8*], align 8
9467 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES42:%.*]] = alloca [3 x i64], align 8
9468 // CHECK17-NEXT: [[_TMP43:%.*]] = alloca i32, align 4
9469 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_44:%.*]] = alloca i32, align 4
9470 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_45:%.*]] = alloca i32, align 4
9471 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
9472 // CHECK17-NEXT: [[N_CASTED54:%.*]] = alloca i64, align 8
9473 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED56:%.*]] = alloca i64, align 8
9474 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS58:%.*]] = alloca [4 x i8*], align 8
9475 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS59:%.*]] = alloca [4 x i8*], align 8
9476 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS60:%.*]] = alloca [4 x i8*], align 8
9477 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES61:%.*]] = alloca [4 x i64], align 8
9478 // CHECK17-NEXT: [[_TMP62:%.*]] = alloca i32, align 4
9479 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_63:%.*]] = alloca i32, align 4
9480 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_64:%.*]] = alloca i32, align 4
9481 // CHECK17-NEXT: store i32 0, i32* [[RETVAL]], align 4
9482 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9483 // CHECK17-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
9484 // CHECK17-NEXT: store i32 100, i32* [[N]], align 4
9485 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9486 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9487 // CHECK17-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
9488 // CHECK17-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
9489 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9490 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
9491 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
9492 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
9493 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9494 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
9495 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
9496 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
9497 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
9498 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
9499 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9500 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
9501 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
9502 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9503 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
9504 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
9505 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9506 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8
9507 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
9508 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
9509 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
9510 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
9511 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
9512 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
9513 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
9514 // CHECK17-NEXT: store i8* null, i8** [[TMP16]], align 8
9515 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
9516 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
9517 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
9518 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
9519 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
9520 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
9521 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
9522 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
9523 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
9524 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8
9525 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9526 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9527 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
9528 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
9529 // CHECK17-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
9530 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9531 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
9532 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9533 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9534 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9535 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9536 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
9537 // CHECK17-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
9538 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
9539 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
9540 // CHECK17-NEXT: store i32 1, i32* [[TMP30]], align 4
9541 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
9542 // CHECK17-NEXT: store i32 3, i32* [[TMP31]], align 4
9543 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
9544 // CHECK17-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
9545 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
9546 // CHECK17-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
9547 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
9548 // CHECK17-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
9549 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
9550 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
9551 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
9552 // CHECK17-NEXT: store i8** null, i8*** [[TMP36]], align 8
9553 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
9554 // CHECK17-NEXT: store i8** null, i8*** [[TMP37]], align 8
9555 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
9556 // CHECK17-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
9557 // CHECK17-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
9558 // CHECK17-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
9559 // CHECK17-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9560 // CHECK17: omp_offload.failed:
9561 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
9562 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
9563 // CHECK17: omp_offload.cont:
9564 // CHECK17-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
9565 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
9566 // CHECK17-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
9567 // CHECK17-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
9568 // CHECK17-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
9569 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
9570 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false)
9571 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
9572 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
9573 // CHECK17-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
9574 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
9575 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
9576 // CHECK17-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
9577 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
9578 // CHECK17-NEXT: store i8* null, i8** [[TMP49]], align 8
9579 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
9580 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
9581 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
9582 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
9583 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
9584 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
9585 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
9586 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 8
9587 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
9588 // CHECK17-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
9589 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
9590 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
9591 // CHECK17-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
9592 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
9593 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
9594 // CHECK17-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
9595 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
9596 // CHECK17-NEXT: store i8* null, i8** [[TMP60]], align 8
9597 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
9598 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
9599 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
9600 // CHECK17-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
9601 // CHECK17-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
9602 // CHECK17-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
9603 // CHECK17-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
9604 // CHECK17-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
9605 // CHECK17-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
9606 // CHECK17-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
9607 // CHECK17-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
9608 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
9609 // CHECK17-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
9610 // CHECK17-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9611 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
9612 // CHECK17-NEXT: store i32 1, i32* [[TMP68]], align 4
9613 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
9614 // CHECK17-NEXT: store i32 3, i32* [[TMP69]], align 4
9615 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
9616 // CHECK17-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
9617 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
9618 // CHECK17-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
9619 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
9620 // CHECK17-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
9621 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
9622 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP73]], align 8
9623 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
9624 // CHECK17-NEXT: store i8** null, i8*** [[TMP74]], align 8
9625 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
9626 // CHECK17-NEXT: store i8** null, i8*** [[TMP75]], align 8
9627 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
9628 // CHECK17-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
9629 // CHECK17-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
9630 // CHECK17-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
9631 // CHECK17-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
9632 // CHECK17: omp_offload.failed17:
9633 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9634 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT18]]
9635 // CHECK17: omp_offload.cont18:
9636 // CHECK17-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
9637 // CHECK17-NEXT: store i32 [[TMP79]], i32* [[DOTCAPTURE_EXPR_19]], align 4
9638 // CHECK17-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
9639 // CHECK17-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
9640 // CHECK17-NEXT: store i32 [[TMP80]], i32* [[CONV21]], align 4
9641 // CHECK17-NEXT: [[TMP81:%.*]] = load i64, i64* [[N_CASTED20]], align 8
9642 // CHECK17-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
9643 // CHECK17-NEXT: [[CONV22:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9644 // CHECK17-NEXT: store i32 [[TMP82]], i32* [[CONV22]], align 4
9645 // CHECK17-NEXT: [[TMP83:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9646 // CHECK17-NEXT: [[TMP84:%.*]] = mul nuw i64 [[TMP1]], 4
9647 // CHECK17-NEXT: [[TMP85:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES26]] to i8*
9648 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP85]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false)
9649 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
9650 // CHECK17-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64*
9651 // CHECK17-NEXT: store i64 [[TMP81]], i64* [[TMP87]], align 8
9652 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
9653 // CHECK17-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
9654 // CHECK17-NEXT: store i64 [[TMP81]], i64* [[TMP89]], align 8
9655 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
9656 // CHECK17-NEXT: store i8* null, i8** [[TMP90]], align 8
9657 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
9658 // CHECK17-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i64*
9659 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP92]], align 8
9660 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
9661 // CHECK17-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i64*
9662 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP94]], align 8
9663 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
9664 // CHECK17-NEXT: store i8* null, i8** [[TMP95]], align 8
9665 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
9666 // CHECK17-NEXT: [[TMP97:%.*]] = bitcast i8** [[TMP96]] to i32**
9667 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP97]], align 8
9668 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
9669 // CHECK17-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
9670 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 8
9671 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 2
9672 // CHECK17-NEXT: store i64 [[TMP84]], i64* [[TMP100]], align 8
9673 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 2
9674 // CHECK17-NEXT: store i8* null, i8** [[TMP101]], align 8
9675 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
9676 // CHECK17-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i64*
9677 // CHECK17-NEXT: store i64 [[TMP83]], i64* [[TMP103]], align 8
9678 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
9679 // CHECK17-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
9680 // CHECK17-NEXT: store i64 [[TMP83]], i64* [[TMP105]], align 8
9681 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 3
9682 // CHECK17-NEXT: store i8* null, i8** [[TMP106]], align 8
9683 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
9684 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
9685 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 0
9686 // CHECK17-NEXT: [[TMP110:%.*]] = load i32, i32* [[N]], align 4
9687 // CHECK17-NEXT: store i32 [[TMP110]], i32* [[DOTCAPTURE_EXPR_28]], align 4
9688 // CHECK17-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
9689 // CHECK17-NEXT: [[SUB30:%.*]] = sub nsw i32 [[TMP111]], 0
9690 // CHECK17-NEXT: [[DIV31:%.*]] = sdiv i32 [[SUB30]], 1
9691 // CHECK17-NEXT: [[SUB32:%.*]] = sub nsw i32 [[DIV31]], 1
9692 // CHECK17-NEXT: store i32 [[SUB32]], i32* [[DOTCAPTURE_EXPR_29]], align 4
9693 // CHECK17-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_29]], align 4
9694 // CHECK17-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP112]], 1
9695 // CHECK17-NEXT: [[TMP113:%.*]] = zext i32 [[ADD33]] to i64
9696 // CHECK17-NEXT: [[KERNEL_ARGS34:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9697 // CHECK17-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 0
9698 // CHECK17-NEXT: store i32 1, i32* [[TMP114]], align 4
9699 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 1
9700 // CHECK17-NEXT: store i32 4, i32* [[TMP115]], align 4
9701 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 2
9702 // CHECK17-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
9703 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 3
9704 // CHECK17-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 8
9705 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 4
9706 // CHECK17-NEXT: store i64* [[TMP109]], i64** [[TMP118]], align 8
9707 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 5
9708 // CHECK17-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP119]], align 8
9709 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 6
9710 // CHECK17-NEXT: store i8** null, i8*** [[TMP120]], align 8
9711 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 7
9712 // CHECK17-NEXT: store i8** null, i8*** [[TMP121]], align 8
9713 // CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 8
9714 // CHECK17-NEXT: store i64 [[TMP113]], i64* [[TMP122]], align 8
9715 // CHECK17-NEXT: [[TMP123:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]])
9716 // CHECK17-NEXT: [[TMP124:%.*]] = icmp ne i32 [[TMP123]], 0
9717 // CHECK17-NEXT: br i1 [[TMP124]], label [[OMP_OFFLOAD_FAILED35:%.*]], label [[OMP_OFFLOAD_CONT36:%.*]]
9718 // CHECK17: omp_offload.failed35:
9719 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP81]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP83]]) #[[ATTR3]]
9720 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT36]]
9721 // CHECK17: omp_offload.cont36:
9722 // CHECK17-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4
9723 // CHECK17-NEXT: [[CONV38:%.*]] = bitcast i64* [[N_CASTED37]] to i32*
9724 // CHECK17-NEXT: store i32 [[TMP125]], i32* [[CONV38]], align 4
9725 // CHECK17-NEXT: [[TMP126:%.*]] = load i64, i64* [[N_CASTED37]], align 8
9726 // CHECK17-NEXT: [[TMP127:%.*]] = mul nuw i64 [[TMP1]], 4
9727 // CHECK17-NEXT: [[TMP128:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES42]] to i8*
9728 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP128]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false)
9729 // CHECK17-NEXT: [[TMP129:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
9730 // CHECK17-NEXT: [[TMP130:%.*]] = bitcast i8** [[TMP129]] to i64*
9731 // CHECK17-NEXT: store i64 [[TMP126]], i64* [[TMP130]], align 8
9732 // CHECK17-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
9733 // CHECK17-NEXT: [[TMP132:%.*]] = bitcast i8** [[TMP131]] to i64*
9734 // CHECK17-NEXT: store i64 [[TMP126]], i64* [[TMP132]], align 8
9735 // CHECK17-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 0
9736 // CHECK17-NEXT: store i8* null, i8** [[TMP133]], align 8
9737 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 1
9738 // CHECK17-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64*
9739 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP135]], align 8
9740 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 1
9741 // CHECK17-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
9742 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP137]], align 8
9743 // CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 1
9744 // CHECK17-NEXT: store i8* null, i8** [[TMP138]], align 8
9745 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 2
9746 // CHECK17-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32**
9747 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP140]], align 8
9748 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 2
9749 // CHECK17-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32**
9750 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP142]], align 8
9751 // CHECK17-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 2
9752 // CHECK17-NEXT: store i64 [[TMP127]], i64* [[TMP143]], align 8
9753 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS41]], i64 0, i64 2
9754 // CHECK17-NEXT: store i8* null, i8** [[TMP144]], align 8
9755 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS39]], i32 0, i32 0
9756 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS40]], i32 0, i32 0
9757 // CHECK17-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES42]], i32 0, i32 0
9758 // CHECK17-NEXT: [[TMP148:%.*]] = load i32, i32* [[N]], align 4
9759 // CHECK17-NEXT: store i32 [[TMP148]], i32* [[DOTCAPTURE_EXPR_44]], align 4
9760 // CHECK17-NEXT: [[TMP149:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_44]], align 4
9761 // CHECK17-NEXT: [[SUB46:%.*]] = sub nsw i32 [[TMP149]], 0
9762 // CHECK17-NEXT: [[DIV47:%.*]] = sdiv i32 [[SUB46]], 1
9763 // CHECK17-NEXT: [[SUB48:%.*]] = sub nsw i32 [[DIV47]], 1
9764 // CHECK17-NEXT: store i32 [[SUB48]], i32* [[DOTCAPTURE_EXPR_45]], align 4
9765 // CHECK17-NEXT: [[TMP150:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_45]], align 4
9766 // CHECK17-NEXT: [[ADD49:%.*]] = add nsw i32 [[TMP150]], 1
9767 // CHECK17-NEXT: [[TMP151:%.*]] = zext i32 [[ADD49]] to i64
9768 // CHECK17-NEXT: [[KERNEL_ARGS50:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9769 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 0
9770 // CHECK17-NEXT: store i32 1, i32* [[TMP152]], align 4
9771 // CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 1
9772 // CHECK17-NEXT: store i32 3, i32* [[TMP153]], align 4
9773 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 2
9774 // CHECK17-NEXT: store i8** [[TMP145]], i8*** [[TMP154]], align 8
9775 // CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 3
9776 // CHECK17-NEXT: store i8** [[TMP146]], i8*** [[TMP155]], align 8
9777 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 4
9778 // CHECK17-NEXT: store i64* [[TMP147]], i64** [[TMP156]], align 8
9779 // CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 5
9780 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP157]], align 8
9781 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 6
9782 // CHECK17-NEXT: store i8** null, i8*** [[TMP158]], align 8
9783 // CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 7
9784 // CHECK17-NEXT: store i8** null, i8*** [[TMP159]], align 8
9785 // CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]], i32 0, i32 8
9786 // CHECK17-NEXT: store i64 [[TMP151]], i64* [[TMP160]], align 8
9787 // CHECK17-NEXT: [[TMP161:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS50]])
9788 // CHECK17-NEXT: [[TMP162:%.*]] = icmp ne i32 [[TMP161]], 0
9789 // CHECK17-NEXT: br i1 [[TMP162]], label [[OMP_OFFLOAD_FAILED51:%.*]], label [[OMP_OFFLOAD_CONT52:%.*]]
9790 // CHECK17: omp_offload.failed51:
9791 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP126]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9792 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT52]]
9793 // CHECK17: omp_offload.cont52:
9794 // CHECK17-NEXT: [[TMP163:%.*]] = load i32, i32* [[M]], align 4
9795 // CHECK17-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_53]], align 4
9796 // CHECK17-NEXT: [[TMP164:%.*]] = load i32, i32* [[N]], align 4
9797 // CHECK17-NEXT: [[CONV55:%.*]] = bitcast i64* [[N_CASTED54]] to i32*
9798 // CHECK17-NEXT: store i32 [[TMP164]], i32* [[CONV55]], align 4
9799 // CHECK17-NEXT: [[TMP165:%.*]] = load i64, i64* [[N_CASTED54]], align 8
9800 // CHECK17-NEXT: [[TMP166:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
9801 // CHECK17-NEXT: [[CONV57:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED56]] to i32*
9802 // CHECK17-NEXT: store i32 [[TMP166]], i32* [[CONV57]], align 4
9803 // CHECK17-NEXT: [[TMP167:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED56]], align 8
9804 // CHECK17-NEXT: [[TMP168:%.*]] = mul nuw i64 [[TMP1]], 4
9805 // CHECK17-NEXT: [[TMP169:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES61]] to i8*
9806 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP169]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false)
9807 // CHECK17-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
9808 // CHECK17-NEXT: [[TMP171:%.*]] = bitcast i8** [[TMP170]] to i64*
9809 // CHECK17-NEXT: store i64 [[TMP165]], i64* [[TMP171]], align 8
9810 // CHECK17-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
9811 // CHECK17-NEXT: [[TMP173:%.*]] = bitcast i8** [[TMP172]] to i64*
9812 // CHECK17-NEXT: store i64 [[TMP165]], i64* [[TMP173]], align 8
9813 // CHECK17-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 0
9814 // CHECK17-NEXT: store i8* null, i8** [[TMP174]], align 8
9815 // CHECK17-NEXT: [[TMP175:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 1
9816 // CHECK17-NEXT: [[TMP176:%.*]] = bitcast i8** [[TMP175]] to i64*
9817 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP176]], align 8
9818 // CHECK17-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 1
9819 // CHECK17-NEXT: [[TMP178:%.*]] = bitcast i8** [[TMP177]] to i64*
9820 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP178]], align 8
9821 // CHECK17-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 1
9822 // CHECK17-NEXT: store i8* null, i8** [[TMP179]], align 8
9823 // CHECK17-NEXT: [[TMP180:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 2
9824 // CHECK17-NEXT: [[TMP181:%.*]] = bitcast i8** [[TMP180]] to i32**
9825 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP181]], align 8
9826 // CHECK17-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 2
9827 // CHECK17-NEXT: [[TMP183:%.*]] = bitcast i8** [[TMP182]] to i32**
9828 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP183]], align 8
9829 // CHECK17-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 2
9830 // CHECK17-NEXT: store i64 [[TMP168]], i64* [[TMP184]], align 8
9831 // CHECK17-NEXT: [[TMP185:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 2
9832 // CHECK17-NEXT: store i8* null, i8** [[TMP185]], align 8
9833 // CHECK17-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 3
9834 // CHECK17-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i64*
9835 // CHECK17-NEXT: store i64 [[TMP167]], i64* [[TMP187]], align 8
9836 // CHECK17-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 3
9837 // CHECK17-NEXT: [[TMP189:%.*]] = bitcast i8** [[TMP188]] to i64*
9838 // CHECK17-NEXT: store i64 [[TMP167]], i64* [[TMP189]], align 8
9839 // CHECK17-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS60]], i64 0, i64 3
9840 // CHECK17-NEXT: store i8* null, i8** [[TMP190]], align 8
9841 // CHECK17-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS58]], i32 0, i32 0
9842 // CHECK17-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS59]], i32 0, i32 0
9843 // CHECK17-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES61]], i32 0, i32 0
9844 // CHECK17-NEXT: [[TMP194:%.*]] = load i32, i32* [[N]], align 4
9845 // CHECK17-NEXT: store i32 [[TMP194]], i32* [[DOTCAPTURE_EXPR_63]], align 4
9846 // CHECK17-NEXT: [[TMP195:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_63]], align 4
9847 // CHECK17-NEXT: [[SUB65:%.*]] = sub nsw i32 [[TMP195]], 0
9848 // CHECK17-NEXT: [[DIV66:%.*]] = sdiv i32 [[SUB65]], 1
9849 // CHECK17-NEXT: [[SUB67:%.*]] = sub nsw i32 [[DIV66]], 1
9850 // CHECK17-NEXT: store i32 [[SUB67]], i32* [[DOTCAPTURE_EXPR_64]], align 4
9851 // CHECK17-NEXT: [[TMP196:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_64]], align 4
9852 // CHECK17-NEXT: [[ADD68:%.*]] = add nsw i32 [[TMP196]], 1
9853 // CHECK17-NEXT: [[TMP197:%.*]] = zext i32 [[ADD68]] to i64
9854 // CHECK17-NEXT: [[KERNEL_ARGS69:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9855 // CHECK17-NEXT: [[TMP198:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 0
9856 // CHECK17-NEXT: store i32 1, i32* [[TMP198]], align 4
9857 // CHECK17-NEXT: [[TMP199:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 1
9858 // CHECK17-NEXT: store i32 4, i32* [[TMP199]], align 4
9859 // CHECK17-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 2
9860 // CHECK17-NEXT: store i8** [[TMP191]], i8*** [[TMP200]], align 8
9861 // CHECK17-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 3
9862 // CHECK17-NEXT: store i8** [[TMP192]], i8*** [[TMP201]], align 8
9863 // CHECK17-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 4
9864 // CHECK17-NEXT: store i64* [[TMP193]], i64** [[TMP202]], align 8
9865 // CHECK17-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 5
9866 // CHECK17-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP203]], align 8
9867 // CHECK17-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 6
9868 // CHECK17-NEXT: store i8** null, i8*** [[TMP204]], align 8
9869 // CHECK17-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 7
9870 // CHECK17-NEXT: store i8** null, i8*** [[TMP205]], align 8
9871 // CHECK17-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]], i32 0, i32 8
9872 // CHECK17-NEXT: store i64 [[TMP197]], i64* [[TMP206]], align 8
9873 // CHECK17-NEXT: [[TMP207:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS69]])
9874 // CHECK17-NEXT: [[TMP208:%.*]] = icmp ne i32 [[TMP207]], 0
9875 // CHECK17-NEXT: br i1 [[TMP208]], label [[OMP_OFFLOAD_FAILED70:%.*]], label [[OMP_OFFLOAD_CONT71:%.*]]
9876 // CHECK17: omp_offload.failed70:
9877 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP165]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP167]]) #[[ATTR3]]
9878 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT71]]
9879 // CHECK17: omp_offload.cont71:
9880 // CHECK17-NEXT: [[TMP209:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9881 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP209]])
9882 // CHECK17-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9883 // CHECK17-NEXT: [[TMP210:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
9884 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP210]])
9885 // CHECK17-NEXT: [[TMP211:%.*]] = load i32, i32* [[RETVAL]], align 4
9886 // CHECK17-NEXT: ret i32 [[TMP211]]
9887 //
9888 //
9889 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
9890 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
9891 // CHECK17-NEXT: entry:
9892 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9893 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9894 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9895 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9896 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9897 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9898 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9899 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9900 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9901 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9902 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
9903 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9904 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
9905 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
9906 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
9907 // CHECK17-NEXT: ret void
9908 //
9909 //
9910 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
9911 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9912 // CHECK17-NEXT: entry:
9913 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9914 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9915 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9916 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9917 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9918 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9919 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
9920 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9921 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9922 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
9923 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9924 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9925 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9926 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9927 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
9928 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9929 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9930 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9931 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9932 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9933 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9934 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9935 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9936 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9937 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
9938 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9939 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9940 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
9941 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9942 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9943 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9944 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
9945 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9946 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
9947 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9948 // CHECK17: omp.precond.then:
9949 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9950 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9951 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
9952 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9953 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9954 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9955 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
9956 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9957 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9958 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9959 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
9960 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9961 // CHECK17: cond.true:
9962 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9963 // CHECK17-NEXT: br label [[COND_END:%.*]]
9964 // CHECK17: cond.false:
9965 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9966 // CHECK17-NEXT: br label [[COND_END]]
9967 // CHECK17: cond.end:
9968 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
9969 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9970 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9971 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
9972 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9973 // CHECK17: omp.inner.for.cond:
9974 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9975 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9976 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9977 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9978 // CHECK17: omp.inner.for.body:
9979 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9980 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
9981 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9982 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
9983 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
9984 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9985 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4
9986 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
9987 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
9988 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9989 // CHECK17: omp.inner.for.inc:
9990 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9991 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9992 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
9993 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9994 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
9995 // CHECK17: omp.inner.for.end:
9996 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9997 // CHECK17: omp.loop.exit:
9998 // CHECK17-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9999 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
10000 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
10001 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10002 // CHECK17: omp.precond.end:
10003 // CHECK17-NEXT: ret void
10004 //
10005 //
10006 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
10007 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10008 // CHECK17-NEXT: entry:
10009 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10010 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10011 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10012 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10013 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10014 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10015 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10016 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10017 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10018 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10019 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10020 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10021 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10022 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10023 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10024 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10025 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
10026 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10027 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10028 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10029 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10030 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10031 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10032 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10033 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10034 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10035 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10036 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10037 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10038 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10039 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10040 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10041 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10042 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10043 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10044 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10045 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10046 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10047 // CHECK17: omp.precond.then:
10048 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10049 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10050 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10051 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10052 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
10053 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10054 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10055 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
10056 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
10057 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10058 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10059 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10060 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10061 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10062 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10063 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10064 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10065 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10066 // CHECK17: cond.true:
10067 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10068 // CHECK17-NEXT: br label [[COND_END:%.*]]
10069 // CHECK17: cond.false:
10070 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10071 // CHECK17-NEXT: br label [[COND_END]]
10072 // CHECK17: cond.end:
10073 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10074 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10075 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10076 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10077 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10078 // CHECK17: omp.inner.for.cond:
10079 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10080 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10081 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10082 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10083 // CHECK17: omp.inner.for.body:
10084 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10085 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10086 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10087 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
10088 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
10089 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10090 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
10091 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
10092 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10093 // CHECK17: omp.body.continue:
10094 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10095 // CHECK17: omp.inner.for.inc:
10096 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10097 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
10098 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10099 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10100 // CHECK17: omp.inner.for.end:
10101 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10102 // CHECK17: omp.loop.exit:
10103 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10104 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
10105 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
10106 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10107 // CHECK17: omp.precond.end:
10108 // CHECK17-NEXT: ret void
10109 //
10110 //
10111 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
10112 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10113 // CHECK17-NEXT: entry:
10114 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10115 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10116 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10117 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10118 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10119 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10120 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10121 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10122 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10123 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10124 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10125 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10126 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
10127 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10128 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
10129 // CHECK17-NEXT: ret void
10130 //
10131 //
10132 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
10133 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10134 // CHECK17-NEXT: entry:
10135 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10136 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10137 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10138 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10139 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10140 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10141 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10142 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10143 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10144 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10145 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10146 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10147 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10148 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10149 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
10150 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10151 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10152 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10153 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10154 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10155 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10156 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10157 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10158 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10159 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10160 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10161 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10162 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10163 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10164 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10165 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10166 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10167 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10168 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10169 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10170 // CHECK17: omp.precond.then:
10171 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10172 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10173 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10174 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10175 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10176 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10177 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
10178 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10179 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10180 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10181 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10182 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10183 // CHECK17: cond.true:
10184 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10185 // CHECK17-NEXT: br label [[COND_END:%.*]]
10186 // CHECK17: cond.false:
10187 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10188 // CHECK17-NEXT: br label [[COND_END]]
10189 // CHECK17: cond.end:
10190 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10191 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10192 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10193 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
10194 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10195 // CHECK17: omp.inner.for.cond:
10196 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10197 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10198 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10199 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10200 // CHECK17: omp.inner.for.body:
10201 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10202 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10203 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10204 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10205 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
10206 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10207 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4
10208 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
10209 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
10210 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10211 // CHECK17: omp.inner.for.inc:
10212 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10213 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10214 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
10215 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10216 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10217 // CHECK17: omp.inner.for.end:
10218 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10219 // CHECK17: omp.loop.exit:
10220 // CHECK17-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10221 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
10222 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
10223 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10224 // CHECK17: omp.precond.end:
10225 // CHECK17-NEXT: ret void
10226 //
10227 //
10228 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
10229 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10230 // CHECK17-NEXT: entry:
10231 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10232 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10233 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10234 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10235 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10236 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10237 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10238 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10239 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10240 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10241 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10242 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10243 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10244 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10245 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10246 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10247 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
10248 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10249 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10250 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10251 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10252 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10253 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10254 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10255 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10256 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10257 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10258 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10259 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10260 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10261 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10262 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10263 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10264 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10265 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10266 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10267 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10268 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10269 // CHECK17: omp.precond.then:
10270 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10271 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10272 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10273 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10274 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
10275 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10276 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10277 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
10278 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
10279 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10280 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10281 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10282 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10283 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10284 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10285 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10286 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10287 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10288 // CHECK17: cond.true:
10289 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10290 // CHECK17-NEXT: br label [[COND_END:%.*]]
10291 // CHECK17: cond.false:
10292 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10293 // CHECK17-NEXT: br label [[COND_END]]
10294 // CHECK17: cond.end:
10295 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10296 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10297 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10298 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10299 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10300 // CHECK17: omp.inner.for.cond:
10301 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10302 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10303 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10304 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10305 // CHECK17: omp.inner.for.body:
10306 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10307 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10308 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10309 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
10310 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[I5]], align 4
10311 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10312 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
10313 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
10314 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10315 // CHECK17: omp.body.continue:
10316 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10317 // CHECK17: omp.inner.for.inc:
10318 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10319 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
10320 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10321 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10322 // CHECK17: omp.inner.for.end:
10323 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10324 // CHECK17: omp.loop.exit:
10325 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10326 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
10327 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
10328 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10329 // CHECK17: omp.precond.end:
10330 // CHECK17-NEXT: ret void
10331 //
10332 //
10333 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
10334 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10335 // CHECK17-NEXT: entry:
10336 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10337 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10338 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10339 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10340 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10341 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10342 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10343 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10344 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10345 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10346 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10347 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10348 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10349 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10350 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10351 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10352 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
10353 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10354 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
10355 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10356 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
10357 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10358 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
10359 // CHECK17-NEXT: ret void
10360 //
10361 //
10362 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
10363 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10364 // CHECK17-NEXT: entry:
10365 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10366 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10367 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10368 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10369 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10370 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10371 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10372 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10373 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10374 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
10375 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10376 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10377 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10378 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10379 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10380 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
10381 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10382 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10383 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10384 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10385 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10386 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10387 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10388 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10389 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10390 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10391 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10392 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10393 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10394 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10395 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10396 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10397 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10398 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
10399 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
10400 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10401 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10402 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10403 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10404 // CHECK17: omp.precond.then:
10405 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10406 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10407 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10408 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10409 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10410 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
10411 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10412 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10413 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
10414 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10415 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10416 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10417 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10418 // CHECK17: cond.true:
10419 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10420 // CHECK17-NEXT: br label [[COND_END:%.*]]
10421 // CHECK17: cond.false:
10422 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10423 // CHECK17-NEXT: br label [[COND_END]]
10424 // CHECK17: cond.end:
10425 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10426 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10427 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10428 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10429 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10430 // CHECK17: omp.inner.for.cond:
10431 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10432 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10433 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
10434 // CHECK17-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
10435 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10436 // CHECK17: omp.inner.for.body:
10437 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10438 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10439 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10440 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10441 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4
10442 // CHECK17-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10443 // CHECK17-NEXT: store i32 [[TMP20]], i32* [[CONV8]], align 4
10444 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, i64* [[N_CASTED]], align 8
10445 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[CONV1]], align 4
10446 // CHECK17-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10447 // CHECK17-NEXT: store i32 [[TMP22]], i32* [[CONV9]], align 4
10448 // CHECK17-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10449 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP23]])
10450 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10451 // CHECK17: omp.inner.for.inc:
10452 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10453 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10454 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
10455 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
10456 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10457 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10458 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
10459 // CHECK17-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
10460 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10461 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10462 // CHECK17-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
10463 // CHECK17-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
10464 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10465 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10466 // CHECK17-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
10467 // CHECK17-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
10468 // CHECK17: cond.true14:
10469 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10470 // CHECK17-NEXT: br label [[COND_END16:%.*]]
10471 // CHECK17: cond.false15:
10472 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10473 // CHECK17-NEXT: br label [[COND_END16]]
10474 // CHECK17: cond.end16:
10475 // CHECK17-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE14]] ], [ [[TMP33]], [[COND_FALSE15]] ]
10476 // CHECK17-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
10477 // CHECK17-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10478 // CHECK17-NEXT: store i32 [[TMP34]], i32* [[DOTOMP_IV]], align 4
10479 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10480 // CHECK17: omp.inner.for.end:
10481 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10482 // CHECK17: omp.loop.exit:
10483 // CHECK17-NEXT: [[TMP35:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10484 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[TMP35]], align 4
10485 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP36]])
10486 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10487 // CHECK17: omp.precond.end:
10488 // CHECK17-NEXT: ret void
10489 //
10490 //
10491 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7
10492 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10493 // CHECK17-NEXT: entry:
10494 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10495 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10496 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10497 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10498 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10499 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10500 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10501 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10502 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10503 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10504 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10505 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
10506 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10507 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10508 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10509 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10510 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10511 // CHECK17-NEXT: [[I7:%.*]] = alloca i32, align 4
10512 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10513 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10514 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10515 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10516 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10517 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10518 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10519 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10520 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10521 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10522 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10523 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10524 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10525 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10526 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10527 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10528 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10529 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
10530 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
10531 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10532 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10533 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10534 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10535 // CHECK17: omp.precond.then:
10536 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10537 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10538 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10539 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10540 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
10541 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10542 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
10543 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
10544 // CHECK17-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
10545 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10546 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10547 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10548 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10549 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10550 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10551 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10552 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10553 // CHECK17-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10554 // CHECK17: cond.true:
10555 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10556 // CHECK17-NEXT: br label [[COND_END:%.*]]
10557 // CHECK17: cond.false:
10558 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10559 // CHECK17-NEXT: br label [[COND_END]]
10560 // CHECK17: cond.end:
10561 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10562 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10563 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10564 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10565 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10566 // CHECK17: omp.inner.for.cond:
10567 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10568 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10569 // CHECK17-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10570 // CHECK17-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10571 // CHECK17: omp.inner.for.body:
10572 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10573 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10574 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10575 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I7]], align 4
10576 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[I7]], align 4
10577 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10578 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
10579 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
10580 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10581 // CHECK17: omp.body.continue:
10582 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10583 // CHECK17: omp.inner.for.inc:
10584 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10585 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP19]], 1
10586 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
10587 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10588 // CHECK17: omp.inner.for.end:
10589 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10590 // CHECK17: omp.loop.exit:
10591 // CHECK17-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10592 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
10593 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
10594 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10595 // CHECK17: omp.precond.end:
10596 // CHECK17-NEXT: ret void
10597 //
10598 //
10599 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
10600 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10601 // CHECK17-NEXT: entry:
10602 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10603 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10604 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10605 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10606 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10607 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10608 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10609 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10610 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10611 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10612 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10613 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10614 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
10615 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10616 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
10617 // CHECK17-NEXT: ret void
10618 //
10619 //
10620 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..10
10621 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10622 // CHECK17-NEXT: entry:
10623 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10624 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10625 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10626 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10627 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10628 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10629 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10630 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10631 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10632 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10633 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10634 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10635 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10636 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10637 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
10638 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10639 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10640 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10641 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10642 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10643 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10644 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10645 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10646 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10647 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10648 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10649 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10650 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10651 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10652 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10653 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10654 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10655 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10656 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10657 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10658 // CHECK17: omp.precond.then:
10659 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10660 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10661 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10662 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10663 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10664 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10665 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
10666 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10667 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10668 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10669 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10670 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10671 // CHECK17: cond.true:
10672 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10673 // CHECK17-NEXT: br label [[COND_END:%.*]]
10674 // CHECK17: cond.false:
10675 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10676 // CHECK17-NEXT: br label [[COND_END]]
10677 // CHECK17: cond.end:
10678 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10679 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10680 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10681 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
10682 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10683 // CHECK17: omp.inner.for.cond:
10684 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10685 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10686 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10687 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10688 // CHECK17: omp.inner.for.body:
10689 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10690 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10691 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10692 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10693 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
10694 // CHECK17-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10695 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV6]], align 4
10696 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
10697 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]])
10698 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10699 // CHECK17: omp.inner.for.inc:
10700 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10701 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10702 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
10703 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10704 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10705 // CHECK17: omp.inner.for.end:
10706 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10707 // CHECK17: omp.loop.exit:
10708 // CHECK17-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10709 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
10710 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
10711 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10712 // CHECK17: omp.precond.end:
10713 // CHECK17-NEXT: ret void
10714 //
10715 //
10716 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
10717 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10718 // CHECK17-NEXT: entry:
10719 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10720 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10721 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10722 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10723 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10724 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10725 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10726 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10727 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10728 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10729 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10730 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10731 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10732 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10733 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10734 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10735 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
10736 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10737 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10738 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10739 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10740 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10741 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10742 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10743 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10744 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10745 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10746 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10747 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10748 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10749 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10750 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10751 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10752 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10753 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10754 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10755 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10756 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10757 // CHECK17: omp.precond.then:
10758 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10759 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10760 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10761 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10762 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
10763 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10764 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10765 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
10766 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
10767 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10768 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10769 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10770 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10771 // CHECK17-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10772 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
10773 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
10774 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10775 // CHECK17: omp.dispatch.cond:
10776 // CHECK17-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10777 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
10778 // CHECK17-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10779 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
10780 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10781 // CHECK17: omp.dispatch.body:
10782 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10783 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10784 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10785 // CHECK17: omp.inner.for.cond:
10786 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10787 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
10788 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10789 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10790 // CHECK17: omp.inner.for.body:
10791 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10792 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10793 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10794 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !15
10795 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !15
10796 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10797 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
10798 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
10799 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10800 // CHECK17: omp.body.continue:
10801 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10802 // CHECK17: omp.inner.for.inc:
10803 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10804 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10805 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10806 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
10807 // CHECK17: omp.inner.for.end:
10808 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10809 // CHECK17: omp.dispatch.inc:
10810 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
10811 // CHECK17: omp.dispatch.end:
10812 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10813 // CHECK17: omp.precond.end:
10814 // CHECK17-NEXT: ret void
10815 //
10816 //
10817 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
10818 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10819 // CHECK17-NEXT: entry:
10820 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10821 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10822 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10823 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10824 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10825 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10826 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10827 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10828 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10829 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10830 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10831 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10832 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10833 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10834 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10835 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10836 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
10837 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
10838 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
10839 // CHECK17-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10840 // CHECK17-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
10841 // CHECK17-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10842 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
10843 // CHECK17-NEXT: ret void
10844 //
10845 //
10846 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14
10847 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10848 // CHECK17-NEXT: entry:
10849 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10850 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10851 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10852 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10853 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10854 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10855 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10856 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10857 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10858 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
10859 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10860 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10861 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10862 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10863 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10864 // CHECK17-NEXT: [[I5:%.*]] = alloca i32, align 4
10865 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
10866 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10867 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10868 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10869 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10870 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10871 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10872 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10873 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10874 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10875 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10876 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10877 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10878 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10879 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10880 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10881 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10882 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
10883 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
10884 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10885 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10886 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10887 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10888 // CHECK17: omp.precond.then:
10889 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10890 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10891 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
10892 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10893 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10894 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10895 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
10896 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10897 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10898 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10899 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10900 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10901 // CHECK17: cond.true:
10902 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10903 // CHECK17-NEXT: br label [[COND_END:%.*]]
10904 // CHECK17: cond.false:
10905 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10906 // CHECK17-NEXT: br label [[COND_END]]
10907 // CHECK17: cond.end:
10908 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10909 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10910 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10911 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
10912 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10913 // CHECK17: omp.inner.for.cond:
10914 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10915 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10916 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10917 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10918 // CHECK17: omp.inner.for.body:
10919 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10920 // CHECK17-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10921 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10922 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10923 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
10924 // CHECK17-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10925 // CHECK17-NEXT: store i32 [[TMP19]], i32* [[CONV8]], align 4
10926 // CHECK17-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
10927 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV1]], align 4
10928 // CHECK17-NEXT: [[CONV9:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10929 // CHECK17-NEXT: store i32 [[TMP21]], i32* [[CONV9]], align 4
10930 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10931 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP22]])
10932 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10933 // CHECK17: omp.inner.for.inc:
10934 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10935 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10936 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
10937 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10938 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10939 // CHECK17: omp.inner.for.end:
10940 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10941 // CHECK17: omp.loop.exit:
10942 // CHECK17-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10943 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
10944 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
10945 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10946 // CHECK17: omp.precond.end:
10947 // CHECK17-NEXT: ret void
10948 //
10949 //
10950 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15
10951 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10952 // CHECK17-NEXT: entry:
10953 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10954 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10955 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10956 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10957 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10958 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10959 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10960 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10961 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10962 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10963 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10964 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
10965 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10966 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10967 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10968 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10969 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10970 // CHECK17-NEXT: [[I7:%.*]] = alloca i32, align 4
10971 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10972 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10973 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10974 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10975 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10976 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10977 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10978 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10979 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10980 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10981 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10982 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10983 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10984 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10985 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10986 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10987 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10988 // CHECK17-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
10989 // CHECK17-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
10990 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10991 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10992 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10993 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10994 // CHECK17: omp.precond.then:
10995 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10996 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
10997 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
10998 // CHECK17-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10999 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
11000 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11001 // CHECK17-NEXT: [[CONV6:%.*]] = trunc i64 [[TMP7]] to i32
11002 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_LB]], align 4
11003 // CHECK17-NEXT: store i32 [[CONV6]], i32* [[DOTOMP_UB]], align 4
11004 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11005 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11006 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[CONV1]], align 4
11007 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11008 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11009 // CHECK17-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11010 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
11011 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
11012 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11013 // CHECK17: omp.dispatch.cond:
11014 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11015 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
11016 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11017 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
11018 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11019 // CHECK17: omp.dispatch.body:
11020 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11021 // CHECK17-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
11022 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11023 // CHECK17: omp.inner.for.cond:
11024 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11025 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
11026 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
11027 // CHECK17-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11028 // CHECK17: omp.inner.for.body:
11029 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11030 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
11031 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11032 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I7]], align 4, !llvm.access.group !18
11033 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[I7]], align 4, !llvm.access.group !18
11034 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
11035 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
11036 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
11037 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11038 // CHECK17: omp.body.continue:
11039 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11040 // CHECK17: omp.inner.for.inc:
11041 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11042 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
11043 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11044 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
11045 // CHECK17: omp.inner.for.end:
11046 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11047 // CHECK17: omp.dispatch.inc:
11048 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11049 // CHECK17: omp.dispatch.end:
11050 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
11051 // CHECK17: omp.precond.end:
11052 // CHECK17-NEXT: ret void
11053 //
11054 //
11055 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
11056 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
11057 // CHECK17-NEXT: entry:
11058 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
11059 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
11060 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
11061 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
11062 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
11063 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
11064 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11065 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
11066 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
11067 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
11068 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
11069 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11070 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11071 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8
11072 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8
11073 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8
11074 // CHECK17-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
11075 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 8
11076 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 8
11077 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 8
11078 // CHECK17-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
11079 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
11080 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8
11081 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS25:%.*]] = alloca [2 x i8*], align 8
11082 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS26:%.*]] = alloca [2 x i8*], align 8
11083 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS27:%.*]] = alloca [2 x i8*], align 8
11084 // CHECK17-NEXT: [[_TMP28:%.*]] = alloca i32, align 4
11085 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
11086 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
11087 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11088 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
11089 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
11090 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11091 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
11092 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
11093 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11094 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8
11095 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11096 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11097 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
11098 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
11099 // CHECK17-NEXT: store i32 1, i32* [[TMP7]], align 4
11100 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
11101 // CHECK17-NEXT: store i32 1, i32* [[TMP8]], align 4
11102 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
11103 // CHECK17-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
11104 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
11105 // CHECK17-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
11106 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
11107 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 8
11108 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
11109 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 8
11110 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
11111 // CHECK17-NEXT: store i8** null, i8*** [[TMP13]], align 8
11112 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
11113 // CHECK17-NEXT: store i8** null, i8*** [[TMP14]], align 8
11114 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
11115 // CHECK17-NEXT: store i64 10, i64* [[TMP15]], align 8
11116 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
11117 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
11118 // CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11119 // CHECK17: omp_offload.failed:
11120 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
11121 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
11122 // CHECK17: omp_offload.cont:
11123 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11124 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
11125 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
11126 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11127 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
11128 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
11129 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
11130 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8
11131 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11132 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11133 // CHECK17-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11134 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
11135 // CHECK17-NEXT: store i32 1, i32* [[TMP25]], align 4
11136 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
11137 // CHECK17-NEXT: store i32 1, i32* [[TMP26]], align 4
11138 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
11139 // CHECK17-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
11140 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
11141 // CHECK17-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
11142 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
11143 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 8
11144 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
11145 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 8
11146 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
11147 // CHECK17-NEXT: store i8** null, i8*** [[TMP31]], align 8
11148 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
11149 // CHECK17-NEXT: store i8** null, i8*** [[TMP32]], align 8
11150 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
11151 // CHECK17-NEXT: store i64 10, i64* [[TMP33]], align 8
11152 // CHECK17-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
11153 // CHECK17-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
11154 // CHECK17-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
11155 // CHECK17: omp_offload.failed6:
11156 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
11157 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT7]]
11158 // CHECK17: omp_offload.cont7:
11159 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
11160 // CHECK17-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
11161 // CHECK17-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11162 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11163 // CHECK17-NEXT: store i32 [[TMP37]], i32* [[CONV]], align 4
11164 // CHECK17-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11165 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11166 // CHECK17-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
11167 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 8
11168 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11169 // CHECK17-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
11170 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 8
11171 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
11172 // CHECK17-NEXT: store i8* null, i8** [[TMP43]], align 8
11173 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
11174 // CHECK17-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
11175 // CHECK17-NEXT: store i64 [[TMP38]], i64* [[TMP45]], align 8
11176 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
11177 // CHECK17-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i64*
11178 // CHECK17-NEXT: store i64 [[TMP38]], i64* [[TMP47]], align 8
11179 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
11180 // CHECK17-NEXT: store i8* null, i8** [[TMP48]], align 8
11181 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11182 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11183 // CHECK17-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11184 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
11185 // CHECK17-NEXT: store i32 1, i32* [[TMP51]], align 4
11186 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
11187 // CHECK17-NEXT: store i32 2, i32* [[TMP52]], align 4
11188 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
11189 // CHECK17-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 8
11190 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
11191 // CHECK17-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 8
11192 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
11193 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 8
11194 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
11195 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 8
11196 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
11197 // CHECK17-NEXT: store i8** null, i8*** [[TMP57]], align 8
11198 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
11199 // CHECK17-NEXT: store i8** null, i8*** [[TMP58]], align 8
11200 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
11201 // CHECK17-NEXT: store i64 10, i64* [[TMP59]], align 8
11202 // CHECK17-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
11203 // CHECK17-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
11204 // CHECK17-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
11205 // CHECK17: omp_offload.failed13:
11206 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i64 [[TMP38]]) #[[ATTR3]]
11207 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT14]]
11208 // CHECK17: omp_offload.cont14:
11209 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11210 // CHECK17-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
11211 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 8
11212 // CHECK17-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11213 // CHECK17-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
11214 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 8
11215 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
11216 // CHECK17-NEXT: store i8* null, i8** [[TMP66]], align 8
11217 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11218 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11219 // CHECK17-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11220 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
11221 // CHECK17-NEXT: store i32 1, i32* [[TMP69]], align 4
11222 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
11223 // CHECK17-NEXT: store i32 1, i32* [[TMP70]], align 4
11224 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
11225 // CHECK17-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 8
11226 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
11227 // CHECK17-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 8
11228 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
11229 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 8
11230 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
11231 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 8
11232 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
11233 // CHECK17-NEXT: store i8** null, i8*** [[TMP75]], align 8
11234 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
11235 // CHECK17-NEXT: store i8** null, i8*** [[TMP76]], align 8
11236 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
11237 // CHECK17-NEXT: store i64 10, i64* [[TMP77]], align 8
11238 // CHECK17-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
11239 // CHECK17-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
11240 // CHECK17-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
11241 // CHECK17: omp_offload.failed20:
11242 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
11243 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]]
11244 // CHECK17: omp_offload.cont21:
11245 // CHECK17-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
11246 // CHECK17-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
11247 // CHECK17-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
11248 // CHECK17-NEXT: [[CONV24:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED23]] to i32*
11249 // CHECK17-NEXT: store i32 [[TMP81]], i32* [[CONV24]], align 4
11250 // CHECK17-NEXT: [[TMP82:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED23]], align 8
11251 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
11252 // CHECK17-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
11253 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 8
11254 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
11255 // CHECK17-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
11256 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 8
11257 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 0
11258 // CHECK17-NEXT: store i8* null, i8** [[TMP87]], align 8
11259 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 1
11260 // CHECK17-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
11261 // CHECK17-NEXT: store i64 [[TMP82]], i64* [[TMP89]], align 8
11262 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 1
11263 // CHECK17-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i64*
11264 // CHECK17-NEXT: store i64 [[TMP82]], i64* [[TMP91]], align 8
11265 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS27]], i64 0, i64 1
11266 // CHECK17-NEXT: store i8* null, i8** [[TMP92]], align 8
11267 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS25]], i32 0, i32 0
11268 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS26]], i32 0, i32 0
11269 // CHECK17-NEXT: [[KERNEL_ARGS29:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11270 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 0
11271 // CHECK17-NEXT: store i32 1, i32* [[TMP95]], align 4
11272 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 1
11273 // CHECK17-NEXT: store i32 2, i32* [[TMP96]], align 4
11274 // CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 2
11275 // CHECK17-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 8
11276 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 3
11277 // CHECK17-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 8
11278 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 4
11279 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 8
11280 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 5
11281 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 8
11282 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 6
11283 // CHECK17-NEXT: store i8** null, i8*** [[TMP101]], align 8
11284 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 7
11285 // CHECK17-NEXT: store i8** null, i8*** [[TMP102]], align 8
11286 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 8
11287 // CHECK17-NEXT: store i64 10, i64* [[TMP103]], align 8
11288 // CHECK17-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]])
11289 // CHECK17-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
11290 // CHECK17-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
11291 // CHECK17: omp_offload.failed30:
11292 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i64 [[TMP82]]) #[[ATTR3]]
11293 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT31]]
11294 // CHECK17: omp_offload.cont31:
11295 // CHECK17-NEXT: ret i32 0
11296 //
11297 //
11298 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
11299 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11300 // CHECK17-NEXT: entry:
11301 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11302 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11303 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11304 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11305 // CHECK17-NEXT: ret void
11306 //
11307 //
11308 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18
11309 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11310 // CHECK17-NEXT: entry:
11311 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11312 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11313 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11314 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11315 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11316 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11317 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11318 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11319 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11320 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11321 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11322 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11323 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11324 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11325 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11326 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11327 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11328 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11329 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11330 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11331 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11332 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11333 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11334 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11335 // CHECK17: cond.true:
11336 // CHECK17-NEXT: br label [[COND_END:%.*]]
11337 // CHECK17: cond.false:
11338 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11339 // CHECK17-NEXT: br label [[COND_END]]
11340 // CHECK17: cond.end:
11341 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11342 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11343 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11344 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11345 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11346 // CHECK17: omp.inner.for.cond:
11347 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11348 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11349 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11350 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11351 // CHECK17: omp.inner.for.body:
11352 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11353 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11354 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11355 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11356 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11357 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11358 // CHECK17: omp.inner.for.inc:
11359 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11360 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11361 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11362 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11363 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11364 // CHECK17: omp.inner.for.end:
11365 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11366 // CHECK17: omp.loop.exit:
11367 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11368 // CHECK17-NEXT: ret void
11369 //
11370 //
11371 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..19
11372 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11373 // CHECK17-NEXT: entry:
11374 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11375 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11376 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11377 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11378 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11379 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11380 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11381 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11382 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11383 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11384 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11385 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11386 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11387 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11388 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11389 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11390 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11391 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11392 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11393 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11394 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11395 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11396 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11397 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11398 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11399 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11400 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11401 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11402 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11403 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11404 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11405 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11406 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11407 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11408 // CHECK17: cond.true:
11409 // CHECK17-NEXT: br label [[COND_END:%.*]]
11410 // CHECK17: cond.false:
11411 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11412 // CHECK17-NEXT: br label [[COND_END]]
11413 // CHECK17: cond.end:
11414 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11415 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11416 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11417 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11418 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11419 // CHECK17: omp.inner.for.cond:
11420 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11421 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11422 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11423 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11424 // CHECK17: omp.inner.for.body:
11425 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11426 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11427 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11428 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11429 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11430 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11431 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11432 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
11433 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11434 // CHECK17: omp.body.continue:
11435 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11436 // CHECK17: omp.inner.for.inc:
11437 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11438 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11439 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11440 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11441 // CHECK17: omp.inner.for.end:
11442 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11443 // CHECK17: omp.loop.exit:
11444 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11445 // CHECK17-NEXT: ret void
11446 //
11447 //
11448 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
11449 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11450 // CHECK17-NEXT: entry:
11451 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11452 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11453 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11454 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11455 // CHECK17-NEXT: ret void
11456 //
11457 //
11458 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22
11459 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11460 // CHECK17-NEXT: entry:
11461 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11462 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11463 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11464 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11465 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11466 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11467 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11468 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11469 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11470 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11471 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11472 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11473 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11474 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11475 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11476 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11477 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11478 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11479 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11480 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11481 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11482 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11483 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11484 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11485 // CHECK17: cond.true:
11486 // CHECK17-NEXT: br label [[COND_END:%.*]]
11487 // CHECK17: cond.false:
11488 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11489 // CHECK17-NEXT: br label [[COND_END]]
11490 // CHECK17: cond.end:
11491 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11492 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11493 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11494 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11495 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11496 // CHECK17: omp.inner.for.cond:
11497 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11498 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11499 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11500 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11501 // CHECK17: omp.inner.for.body:
11502 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11503 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11504 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11505 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11506 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11507 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11508 // CHECK17: omp.inner.for.inc:
11509 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11510 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11511 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11512 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11513 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11514 // CHECK17: omp.inner.for.end:
11515 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11516 // CHECK17: omp.loop.exit:
11517 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11518 // CHECK17-NEXT: ret void
11519 //
11520 //
11521 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..23
11522 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11523 // CHECK17-NEXT: entry:
11524 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11525 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11526 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11527 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11528 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11529 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11530 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11531 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11532 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11533 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11534 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11535 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11536 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11537 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11538 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11539 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11540 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11541 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11542 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11543 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11544 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11545 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11546 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11547 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11548 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11549 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11550 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11551 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11552 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11553 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11554 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11555 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11556 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11557 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11558 // CHECK17: cond.true:
11559 // CHECK17-NEXT: br label [[COND_END:%.*]]
11560 // CHECK17: cond.false:
11561 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11562 // CHECK17-NEXT: br label [[COND_END]]
11563 // CHECK17: cond.end:
11564 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11565 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11566 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11567 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11568 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11569 // CHECK17: omp.inner.for.cond:
11570 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11571 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11572 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11573 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11574 // CHECK17: omp.inner.for.body:
11575 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11576 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11577 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11578 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11579 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11580 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11581 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11582 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
11583 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11584 // CHECK17: omp.body.continue:
11585 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11586 // CHECK17: omp.inner.for.inc:
11587 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11588 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11589 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11590 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11591 // CHECK17: omp.inner.for.end:
11592 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11593 // CHECK17: omp.loop.exit:
11594 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11595 // CHECK17-NEXT: ret void
11596 //
11597 //
11598 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
11599 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11600 // CHECK17-NEXT: entry:
11601 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11602 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11603 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11604 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11605 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11606 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11607 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11608 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
11609 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11610 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
11611 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11612 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
11613 // CHECK17-NEXT: ret void
11614 //
11615 //
11616 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26
11617 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11618 // CHECK17-NEXT: entry:
11619 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11620 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11621 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11622 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11623 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11624 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11625 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11626 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11627 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11628 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11629 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11630 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11631 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11632 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11633 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11634 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11635 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11636 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11637 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11638 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11639 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11640 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11641 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11642 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11643 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11644 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11645 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11646 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11647 // CHECK17: cond.true:
11648 // CHECK17-NEXT: br label [[COND_END:%.*]]
11649 // CHECK17: cond.false:
11650 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11651 // CHECK17-NEXT: br label [[COND_END]]
11652 // CHECK17: cond.end:
11653 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11654 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11655 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11656 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11657 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11658 // CHECK17: omp.inner.for.cond:
11659 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11660 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11661 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11662 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11663 // CHECK17: omp.inner.for.body:
11664 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11665 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11666 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11667 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11668 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
11669 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11670 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
11671 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11672 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
11673 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11674 // CHECK17: omp.inner.for.inc:
11675 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11676 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11677 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11678 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11679 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11680 // CHECK17: omp.inner.for.end:
11681 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11682 // CHECK17: omp.loop.exit:
11683 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11684 // CHECK17-NEXT: ret void
11685 //
11686 //
11687 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..27
11688 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11689 // CHECK17-NEXT: entry:
11690 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11691 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11692 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11693 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11694 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11695 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11696 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11697 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11698 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11699 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11700 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11701 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11702 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11703 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11704 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11705 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11706 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11707 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11708 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11709 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11710 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11711 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11712 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11713 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11714 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11715 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11716 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
11717 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
11718 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
11719 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11720 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11721 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
11722 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11723 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
11724 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
11725 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11726 // CHECK17: omp.dispatch.cond:
11727 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11728 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11729 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
11730 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
11731 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11732 // CHECK17: cond.true:
11733 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11734 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
11735 // CHECK17-NEXT: br label [[COND_END:%.*]]
11736 // CHECK17: cond.false:
11737 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11738 // CHECK17-NEXT: br label [[COND_END]]
11739 // CHECK17: cond.end:
11740 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
11741 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11742 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11743 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
11744 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11745 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11746 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
11747 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11748 // CHECK17: omp.dispatch.body:
11749 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11750 // CHECK17: omp.inner.for.cond:
11751 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11752 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11753 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11754 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11755 // CHECK17: omp.inner.for.body:
11756 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11757 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
11758 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11759 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11760 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
11761 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
11762 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11763 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
11764 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11765 // CHECK17: omp.body.continue:
11766 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11767 // CHECK17: omp.inner.for.inc:
11768 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11769 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
11770 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
11771 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11772 // CHECK17: omp.inner.for.end:
11773 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11774 // CHECK17: omp.dispatch.inc:
11775 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11776 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11777 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
11778 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
11779 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11780 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11781 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11782 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
11783 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11784 // CHECK17: omp.dispatch.end:
11785 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
11786 // CHECK17-NEXT: ret void
11787 //
11788 //
11789 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
11790 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11791 // CHECK17-NEXT: entry:
11792 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11793 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11794 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11795 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11796 // CHECK17-NEXT: ret void
11797 //
11798 //
11799 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30
11800 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11801 // CHECK17-NEXT: entry:
11802 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11803 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11804 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11805 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11806 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11807 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11808 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11809 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11810 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11811 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11812 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11813 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11814 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11815 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11816 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11817 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11818 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11819 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11820 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11821 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11822 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11823 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11824 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11825 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11826 // CHECK17: cond.true:
11827 // CHECK17-NEXT: br label [[COND_END:%.*]]
11828 // CHECK17: cond.false:
11829 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11830 // CHECK17-NEXT: br label [[COND_END]]
11831 // CHECK17: cond.end:
11832 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11833 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11834 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11835 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11836 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11837 // CHECK17: omp.inner.for.cond:
11838 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11839 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11840 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11841 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11842 // CHECK17: omp.inner.for.body:
11843 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11844 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11845 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11846 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11847 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11848 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11849 // CHECK17: omp.inner.for.inc:
11850 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11851 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11852 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11853 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11854 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11855 // CHECK17: omp.inner.for.end:
11856 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11857 // CHECK17: omp.loop.exit:
11858 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11859 // CHECK17-NEXT: ret void
11860 //
11861 //
11862 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..31
11863 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11864 // CHECK17-NEXT: entry:
11865 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11866 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11867 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11868 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11869 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11870 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11871 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11872 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11873 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11874 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11875 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11876 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11877 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11878 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11879 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11880 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11881 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11882 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11883 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11884 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11885 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11886 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11887 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11888 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11889 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11890 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11891 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11892 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11893 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11894 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11895 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11896 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
11897 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
11898 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11899 // CHECK17: omp.dispatch.cond:
11900 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11901 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
11902 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11903 // CHECK17: omp.dispatch.body:
11904 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11905 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
11906 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11907 // CHECK17: omp.inner.for.cond:
11908 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11909 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
11910 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
11911 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11912 // CHECK17: omp.inner.for.body:
11913 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11914 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
11915 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11916 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
11917 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
11918 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
11919 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11920 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
11921 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11922 // CHECK17: omp.body.continue:
11923 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11924 // CHECK17: omp.inner.for.inc:
11925 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11926 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
11927 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11928 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
11929 // CHECK17: omp.inner.for.end:
11930 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11931 // CHECK17: omp.dispatch.inc:
11932 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11933 // CHECK17: omp.dispatch.end:
11934 // CHECK17-NEXT: ret void
11935 //
11936 //
11937 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
11938 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11939 // CHECK17-NEXT: entry:
11940 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11941 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11942 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11943 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11944 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11945 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11946 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11947 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
11948 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11949 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[CONV1]], align 4
11950 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11951 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP2]])
11952 // CHECK17-NEXT: ret void
11953 //
11954 //
11955 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..34
11956 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11957 // CHECK17-NEXT: entry:
11958 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11959 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11960 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11961 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11962 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11963 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11964 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11965 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11966 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11967 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11968 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11969 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11970 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11971 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11972 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11973 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11974 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11975 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11976 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11977 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11978 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11979 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11980 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11981 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11982 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11983 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11984 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11985 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11986 // CHECK17: cond.true:
11987 // CHECK17-NEXT: br label [[COND_END:%.*]]
11988 // CHECK17: cond.false:
11989 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11990 // CHECK17-NEXT: br label [[COND_END]]
11991 // CHECK17: cond.end:
11992 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11993 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11994 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11995 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11996 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11997 // CHECK17: omp.inner.for.cond:
11998 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11999 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12000 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12001 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12002 // CHECK17: omp.inner.for.body:
12003 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12004 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12005 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12006 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12007 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
12008 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12009 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
12010 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12011 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
12012 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12013 // CHECK17: omp.inner.for.inc:
12014 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12015 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12016 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12017 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12018 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
12019 // CHECK17: omp.inner.for.end:
12020 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12021 // CHECK17: omp.loop.exit:
12022 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12023 // CHECK17-NEXT: ret void
12024 //
12025 //
12026 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..35
12027 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12028 // CHECK17-NEXT: entry:
12029 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12030 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12031 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12032 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12033 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12034 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12035 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12036 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
12037 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12038 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12039 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12040 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12041 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
12042 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12043 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12044 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12045 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12046 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12047 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12048 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12049 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12050 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12051 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
12052 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12053 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12054 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12055 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
12056 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12057 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12058 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12059 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12060 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
12061 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12062 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12063 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12064 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12065 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
12066 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
12067 // CHECK17: omp.dispatch.cond:
12068 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12069 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
12070 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12071 // CHECK17: omp.dispatch.body:
12072 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12073 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
12074 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12075 // CHECK17: omp.inner.for.cond:
12076 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12077 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
12078 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
12079 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12080 // CHECK17: omp.inner.for.body:
12081 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12082 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
12083 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12084 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
12085 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
12086 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
12087 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12088 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
12089 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12090 // CHECK17: omp.body.continue:
12091 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12092 // CHECK17: omp.inner.for.inc:
12093 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12094 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
12095 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12096 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
12097 // CHECK17: omp.inner.for.end:
12098 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
12099 // CHECK17: omp.dispatch.inc:
12100 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
12101 // CHECK17: omp.dispatch.end:
12102 // CHECK17-NEXT: ret void
12103 //
12104 //
12105 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12106 // CHECK17-SAME: () #[[ATTR6:[0-9]+]] {
12107 // CHECK17-NEXT: entry:
12108 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
12109 // CHECK17-NEXT: ret void
12110 //
12111 //
12112 // CHECK19-LABEL: define {{[^@]+}}@main
12113 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
12114 // CHECK19-NEXT: entry:
12115 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
12116 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
12117 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
12118 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4
12119 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
12120 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
12121 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
12122 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
12123 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
12124 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
12125 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
12126 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
12127 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12128 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12129 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12130 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
12131 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
12132 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
12133 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
12134 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
12135 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
12136 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
12137 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
12138 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
12139 // CHECK19-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4
12140 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
12141 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x i8*], align 4
12142 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x i8*], align 4
12143 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x i8*], align 4
12144 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
12145 // CHECK19-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
12146 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
12147 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
12148 // CHECK19-NEXT: [[N_CASTED34:%.*]] = alloca i32, align 4
12149 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x i8*], align 4
12150 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x i8*], align 4
12151 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x i8*], align 4
12152 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4
12153 // CHECK19-NEXT: [[_TMP39:%.*]] = alloca i32, align 4
12154 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
12155 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
12156 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
12157 // CHECK19-NEXT: [[N_CASTED50:%.*]] = alloca i32, align 4
12158 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4
12159 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x i8*], align 4
12160 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x i8*], align 4
12161 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x i8*], align 4
12162 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4
12163 // CHECK19-NEXT: [[_TMP56:%.*]] = alloca i32, align 4
12164 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
12165 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
12166 // CHECK19-NEXT: store i32 0, i32* [[RETVAL]], align 4
12167 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
12168 // CHECK19-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
12169 // CHECK19-NEXT: store i32 100, i32* [[N]], align 4
12170 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
12171 // CHECK19-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
12172 // CHECK19-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
12173 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
12174 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
12175 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
12176 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
12177 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12178 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12179 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
12180 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
12181 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
12182 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
12183 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12184 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
12185 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
12186 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12187 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
12188 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
12189 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
12190 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4
12191 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12192 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
12193 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
12194 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12195 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
12196 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
12197 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
12198 // CHECK19-NEXT: store i8* null, i8** [[TMP16]], align 4
12199 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12200 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
12201 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
12202 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12203 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
12204 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
12205 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12206 // CHECK19-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
12207 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
12208 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4
12209 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12210 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12211 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12212 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
12213 // CHECK19-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
12214 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12215 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
12216 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12217 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12218 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12219 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12220 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
12221 // CHECK19-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
12222 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
12223 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
12224 // CHECK19-NEXT: store i32 1, i32* [[TMP30]], align 4
12225 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
12226 // CHECK19-NEXT: store i32 3, i32* [[TMP31]], align 4
12227 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
12228 // CHECK19-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
12229 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
12230 // CHECK19-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
12231 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
12232 // CHECK19-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
12233 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
12234 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
12235 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
12236 // CHECK19-NEXT: store i8** null, i8*** [[TMP36]], align 4
12237 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
12238 // CHECK19-NEXT: store i8** null, i8*** [[TMP37]], align 4
12239 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
12240 // CHECK19-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
12241 // CHECK19-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
12242 // CHECK19-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
12243 // CHECK19-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12244 // CHECK19: omp_offload.failed:
12245 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
12246 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
12247 // CHECK19: omp_offload.cont:
12248 // CHECK19-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
12249 // CHECK19-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
12250 // CHECK19-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
12251 // CHECK19-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
12252 // CHECK19-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
12253 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
12254 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false)
12255 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12256 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
12257 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
12258 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12259 // CHECK19-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
12260 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
12261 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
12262 // CHECK19-NEXT: store i8* null, i8** [[TMP50]], align 4
12263 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
12264 // CHECK19-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
12265 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
12266 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
12267 // CHECK19-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
12268 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
12269 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
12270 // CHECK19-NEXT: store i8* null, i8** [[TMP55]], align 4
12271 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
12272 // CHECK19-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
12273 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
12274 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
12275 // CHECK19-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
12276 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
12277 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
12278 // CHECK19-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
12279 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
12280 // CHECK19-NEXT: store i8* null, i8** [[TMP61]], align 4
12281 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12282 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12283 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12284 // CHECK19-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
12285 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
12286 // CHECK19-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
12287 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
12288 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
12289 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
12290 // CHECK19-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
12291 // CHECK19-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
12292 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
12293 // CHECK19-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
12294 // CHECK19-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12295 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
12296 // CHECK19-NEXT: store i32 1, i32* [[TMP69]], align 4
12297 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
12298 // CHECK19-NEXT: store i32 3, i32* [[TMP70]], align 4
12299 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
12300 // CHECK19-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
12301 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
12302 // CHECK19-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
12303 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
12304 // CHECK19-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
12305 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
12306 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP74]], align 4
12307 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
12308 // CHECK19-NEXT: store i8** null, i8*** [[TMP75]], align 4
12309 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
12310 // CHECK19-NEXT: store i8** null, i8*** [[TMP76]], align 4
12311 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
12312 // CHECK19-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
12313 // CHECK19-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
12314 // CHECK19-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
12315 // CHECK19-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
12316 // CHECK19: omp_offload.failed16:
12317 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12318 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]]
12319 // CHECK19: omp_offload.cont17:
12320 // CHECK19-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
12321 // CHECK19-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_18]], align 4
12322 // CHECK19-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
12323 // CHECK19-NEXT: store i32 [[TMP81]], i32* [[N_CASTED19]], align 4
12324 // CHECK19-NEXT: [[TMP82:%.*]] = load i32, i32* [[N_CASTED19]], align 4
12325 // CHECK19-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
12326 // CHECK19-NEXT: store i32 [[TMP83]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12327 // CHECK19-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12328 // CHECK19-NEXT: [[TMP85:%.*]] = mul nuw i32 [[TMP0]], 4
12329 // CHECK19-NEXT: [[TMP86:%.*]] = sext i32 [[TMP85]] to i64
12330 // CHECK19-NEXT: [[TMP87:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES23]] to i8*
12331 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP87]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false)
12332 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
12333 // CHECK19-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
12334 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
12335 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
12336 // CHECK19-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
12337 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
12338 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
12339 // CHECK19-NEXT: store i8* null, i8** [[TMP92]], align 4
12340 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
12341 // CHECK19-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32*
12342 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP94]], align 4
12343 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
12344 // CHECK19-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32*
12345 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP96]], align 4
12346 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
12347 // CHECK19-NEXT: store i8* null, i8** [[TMP97]], align 4
12348 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
12349 // CHECK19-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
12350 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 4
12351 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
12352 // CHECK19-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
12353 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 4
12354 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
12355 // CHECK19-NEXT: store i64 [[TMP86]], i64* [[TMP102]], align 4
12356 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
12357 // CHECK19-NEXT: store i8* null, i8** [[TMP103]], align 4
12358 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
12359 // CHECK19-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32*
12360 // CHECK19-NEXT: store i32 [[TMP84]], i32* [[TMP105]], align 4
12361 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
12362 // CHECK19-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32*
12363 // CHECK19-NEXT: store i32 [[TMP84]], i32* [[TMP107]], align 4
12364 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
12365 // CHECK19-NEXT: store i8* null, i8** [[TMP108]], align 4
12366 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
12367 // CHECK19-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
12368 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
12369 // CHECK19-NEXT: [[TMP112:%.*]] = load i32, i32* [[N]], align 4
12370 // CHECK19-NEXT: store i32 [[TMP112]], i32* [[DOTCAPTURE_EXPR_25]], align 4
12371 // CHECK19-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
12372 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP113]], 0
12373 // CHECK19-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
12374 // CHECK19-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
12375 // CHECK19-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
12376 // CHECK19-NEXT: [[TMP114:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
12377 // CHECK19-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP114]], 1
12378 // CHECK19-NEXT: [[TMP115:%.*]] = zext i32 [[ADD30]] to i64
12379 // CHECK19-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12380 // CHECK19-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
12381 // CHECK19-NEXT: store i32 1, i32* [[TMP116]], align 4
12382 // CHECK19-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
12383 // CHECK19-NEXT: store i32 4, i32* [[TMP117]], align 4
12384 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
12385 // CHECK19-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
12386 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
12387 // CHECK19-NEXT: store i8** [[TMP110]], i8*** [[TMP119]], align 4
12388 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
12389 // CHECK19-NEXT: store i64* [[TMP111]], i64** [[TMP120]], align 4
12390 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
12391 // CHECK19-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP121]], align 4
12392 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
12393 // CHECK19-NEXT: store i8** null, i8*** [[TMP122]], align 4
12394 // CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
12395 // CHECK19-NEXT: store i8** null, i8*** [[TMP123]], align 4
12396 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
12397 // CHECK19-NEXT: store i64 [[TMP115]], i64* [[TMP124]], align 8
12398 // CHECK19-NEXT: [[TMP125:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
12399 // CHECK19-NEXT: [[TMP126:%.*]] = icmp ne i32 [[TMP125]], 0
12400 // CHECK19-NEXT: br i1 [[TMP126]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
12401 // CHECK19: omp_offload.failed32:
12402 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP82]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP84]]) #[[ATTR3]]
12403 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT33]]
12404 // CHECK19: omp_offload.cont33:
12405 // CHECK19-NEXT: [[TMP127:%.*]] = load i32, i32* [[N]], align 4
12406 // CHECK19-NEXT: store i32 [[TMP127]], i32* [[N_CASTED34]], align 4
12407 // CHECK19-NEXT: [[TMP128:%.*]] = load i32, i32* [[N_CASTED34]], align 4
12408 // CHECK19-NEXT: [[TMP129:%.*]] = mul nuw i32 [[TMP0]], 4
12409 // CHECK19-NEXT: [[TMP130:%.*]] = sext i32 [[TMP129]] to i64
12410 // CHECK19-NEXT: [[TMP131:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES38]] to i8*
12411 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP131]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false)
12412 // CHECK19-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
12413 // CHECK19-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i32*
12414 // CHECK19-NEXT: store i32 [[TMP128]], i32* [[TMP133]], align 4
12415 // CHECK19-NEXT: [[TMP134:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
12416 // CHECK19-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i32*
12417 // CHECK19-NEXT: store i32 [[TMP128]], i32* [[TMP135]], align 4
12418 // CHECK19-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0
12419 // CHECK19-NEXT: store i8* null, i8** [[TMP136]], align 4
12420 // CHECK19-NEXT: [[TMP137:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
12421 // CHECK19-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i32*
12422 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP138]], align 4
12423 // CHECK19-NEXT: [[TMP139:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
12424 // CHECK19-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i32*
12425 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP140]], align 4
12426 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1
12427 // CHECK19-NEXT: store i8* null, i8** [[TMP141]], align 4
12428 // CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
12429 // CHECK19-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32**
12430 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP143]], align 4
12431 // CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
12432 // CHECK19-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i32**
12433 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP145]], align 4
12434 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
12435 // CHECK19-NEXT: store i64 [[TMP130]], i64* [[TMP146]], align 4
12436 // CHECK19-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2
12437 // CHECK19-NEXT: store i8* null, i8** [[TMP147]], align 4
12438 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
12439 // CHECK19-NEXT: [[TMP149:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
12440 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
12441 // CHECK19-NEXT: [[TMP151:%.*]] = load i32, i32* [[N]], align 4
12442 // CHECK19-NEXT: store i32 [[TMP151]], i32* [[DOTCAPTURE_EXPR_40]], align 4
12443 // CHECK19-NEXT: [[TMP152:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
12444 // CHECK19-NEXT: [[SUB42:%.*]] = sub nsw i32 [[TMP152]], 0
12445 // CHECK19-NEXT: [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
12446 // CHECK19-NEXT: [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
12447 // CHECK19-NEXT: store i32 [[SUB44]], i32* [[DOTCAPTURE_EXPR_41]], align 4
12448 // CHECK19-NEXT: [[TMP153:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
12449 // CHECK19-NEXT: [[ADD45:%.*]] = add nsw i32 [[TMP153]], 1
12450 // CHECK19-NEXT: [[TMP154:%.*]] = zext i32 [[ADD45]] to i64
12451 // CHECK19-NEXT: [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12452 // CHECK19-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 0
12453 // CHECK19-NEXT: store i32 1, i32* [[TMP155]], align 4
12454 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 1
12455 // CHECK19-NEXT: store i32 3, i32* [[TMP156]], align 4
12456 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 2
12457 // CHECK19-NEXT: store i8** [[TMP148]], i8*** [[TMP157]], align 4
12458 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 3
12459 // CHECK19-NEXT: store i8** [[TMP149]], i8*** [[TMP158]], align 4
12460 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 4
12461 // CHECK19-NEXT: store i64* [[TMP150]], i64** [[TMP159]], align 4
12462 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 5
12463 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP160]], align 4
12464 // CHECK19-NEXT: [[TMP161:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 6
12465 // CHECK19-NEXT: store i8** null, i8*** [[TMP161]], align 4
12466 // CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 7
12467 // CHECK19-NEXT: store i8** null, i8*** [[TMP162]], align 4
12468 // CHECK19-NEXT: [[TMP163:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]], i32 0, i32 8
12469 // CHECK19-NEXT: store i64 [[TMP154]], i64* [[TMP163]], align 8
12470 // CHECK19-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS46]])
12471 // CHECK19-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0
12472 // CHECK19-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
12473 // CHECK19: omp_offload.failed47:
12474 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP128]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12475 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT48]]
12476 // CHECK19: omp_offload.cont48:
12477 // CHECK19-NEXT: [[TMP166:%.*]] = load i32, i32* [[M]], align 4
12478 // CHECK19-NEXT: store i32 [[TMP166]], i32* [[DOTCAPTURE_EXPR_49]], align 4
12479 // CHECK19-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
12480 // CHECK19-NEXT: store i32 [[TMP167]], i32* [[N_CASTED50]], align 4
12481 // CHECK19-NEXT: [[TMP168:%.*]] = load i32, i32* [[N_CASTED50]], align 4
12482 // CHECK19-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_49]], align 4
12483 // CHECK19-NEXT: store i32 [[TMP169]], i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
12484 // CHECK19-NEXT: [[TMP170:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED51]], align 4
12485 // CHECK19-NEXT: [[TMP171:%.*]] = mul nuw i32 [[TMP0]], 4
12486 // CHECK19-NEXT: [[TMP172:%.*]] = sext i32 [[TMP171]] to i64
12487 // CHECK19-NEXT: [[TMP173:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES55]] to i8*
12488 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP173]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false)
12489 // CHECK19-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
12490 // CHECK19-NEXT: [[TMP175:%.*]] = bitcast i8** [[TMP174]] to i32*
12491 // CHECK19-NEXT: store i32 [[TMP168]], i32* [[TMP175]], align 4
12492 // CHECK19-NEXT: [[TMP176:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
12493 // CHECK19-NEXT: [[TMP177:%.*]] = bitcast i8** [[TMP176]] to i32*
12494 // CHECK19-NEXT: store i32 [[TMP168]], i32* [[TMP177]], align 4
12495 // CHECK19-NEXT: [[TMP178:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0
12496 // CHECK19-NEXT: store i8* null, i8** [[TMP178]], align 4
12497 // CHECK19-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
12498 // CHECK19-NEXT: [[TMP180:%.*]] = bitcast i8** [[TMP179]] to i32*
12499 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP180]], align 4
12500 // CHECK19-NEXT: [[TMP181:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
12501 // CHECK19-NEXT: [[TMP182:%.*]] = bitcast i8** [[TMP181]] to i32*
12502 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP182]], align 4
12503 // CHECK19-NEXT: [[TMP183:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1
12504 // CHECK19-NEXT: store i8* null, i8** [[TMP183]], align 4
12505 // CHECK19-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
12506 // CHECK19-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32**
12507 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP185]], align 4
12508 // CHECK19-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
12509 // CHECK19-NEXT: [[TMP187:%.*]] = bitcast i8** [[TMP186]] to i32**
12510 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP187]], align 4
12511 // CHECK19-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
12512 // CHECK19-NEXT: store i64 [[TMP172]], i64* [[TMP188]], align 4
12513 // CHECK19-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2
12514 // CHECK19-NEXT: store i8* null, i8** [[TMP189]], align 4
12515 // CHECK19-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
12516 // CHECK19-NEXT: [[TMP191:%.*]] = bitcast i8** [[TMP190]] to i32*
12517 // CHECK19-NEXT: store i32 [[TMP170]], i32* [[TMP191]], align 4
12518 // CHECK19-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
12519 // CHECK19-NEXT: [[TMP193:%.*]] = bitcast i8** [[TMP192]] to i32*
12520 // CHECK19-NEXT: store i32 [[TMP170]], i32* [[TMP193]], align 4
12521 // CHECK19-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3
12522 // CHECK19-NEXT: store i8* null, i8** [[TMP194]], align 4
12523 // CHECK19-NEXT: [[TMP195:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
12524 // CHECK19-NEXT: [[TMP196:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
12525 // CHECK19-NEXT: [[TMP197:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
12526 // CHECK19-NEXT: [[TMP198:%.*]] = load i32, i32* [[N]], align 4
12527 // CHECK19-NEXT: store i32 [[TMP198]], i32* [[DOTCAPTURE_EXPR_57]], align 4
12528 // CHECK19-NEXT: [[TMP199:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_57]], align 4
12529 // CHECK19-NEXT: [[SUB59:%.*]] = sub nsw i32 [[TMP199]], 0
12530 // CHECK19-NEXT: [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
12531 // CHECK19-NEXT: [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
12532 // CHECK19-NEXT: store i32 [[SUB61]], i32* [[DOTCAPTURE_EXPR_58]], align 4
12533 // CHECK19-NEXT: [[TMP200:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
12534 // CHECK19-NEXT: [[ADD62:%.*]] = add nsw i32 [[TMP200]], 1
12535 // CHECK19-NEXT: [[TMP201:%.*]] = zext i32 [[ADD62]] to i64
12536 // CHECK19-NEXT: [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12537 // CHECK19-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 0
12538 // CHECK19-NEXT: store i32 1, i32* [[TMP202]], align 4
12539 // CHECK19-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 1
12540 // CHECK19-NEXT: store i32 4, i32* [[TMP203]], align 4
12541 // CHECK19-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 2
12542 // CHECK19-NEXT: store i8** [[TMP195]], i8*** [[TMP204]], align 4
12543 // CHECK19-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 3
12544 // CHECK19-NEXT: store i8** [[TMP196]], i8*** [[TMP205]], align 4
12545 // CHECK19-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 4
12546 // CHECK19-NEXT: store i64* [[TMP197]], i64** [[TMP206]], align 4
12547 // CHECK19-NEXT: [[TMP207:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 5
12548 // CHECK19-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP207]], align 4
12549 // CHECK19-NEXT: [[TMP208:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 6
12550 // CHECK19-NEXT: store i8** null, i8*** [[TMP208]], align 4
12551 // CHECK19-NEXT: [[TMP209:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 7
12552 // CHECK19-NEXT: store i8** null, i8*** [[TMP209]], align 4
12553 // CHECK19-NEXT: [[TMP210:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]], i32 0, i32 8
12554 // CHECK19-NEXT: store i64 [[TMP201]], i64* [[TMP210]], align 8
12555 // CHECK19-NEXT: [[TMP211:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS63]])
12556 // CHECK19-NEXT: [[TMP212:%.*]] = icmp ne i32 [[TMP211]], 0
12557 // CHECK19-NEXT: br i1 [[TMP212]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
12558 // CHECK19: omp_offload.failed64:
12559 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP168]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP170]]) #[[ATTR3]]
12560 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT65]]
12561 // CHECK19: omp_offload.cont65:
12562 // CHECK19-NEXT: [[TMP213:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
12563 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP213]])
12564 // CHECK19-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
12565 // CHECK19-NEXT: [[TMP214:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
12566 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP214]])
12567 // CHECK19-NEXT: [[TMP215:%.*]] = load i32, i32* [[RETVAL]], align 4
12568 // CHECK19-NEXT: ret i32 [[TMP215]]
12569 //
12570 //
12571 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
12572 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
12573 // CHECK19-NEXT: entry:
12574 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12575 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12576 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12577 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
12578 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12579 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12580 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12581 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12582 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12583 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12584 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12585 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12586 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
12587 // CHECK19-NEXT: ret void
12588 //
12589 //
12590 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
12591 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12592 // CHECK19-NEXT: entry:
12593 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12594 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12595 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12596 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12597 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12598 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12599 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12600 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12601 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12602 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12603 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12604 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12605 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12606 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12607 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12608 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
12609 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12610 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12611 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12612 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12613 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12614 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12615 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12616 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12617 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12618 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12619 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12620 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12621 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12622 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12623 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12624 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12625 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12626 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12627 // CHECK19: omp.precond.then:
12628 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12629 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12630 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
12631 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12632 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12633 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12634 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12635 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12636 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12637 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12638 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
12639 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12640 // CHECK19: cond.true:
12641 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12642 // CHECK19-NEXT: br label [[COND_END:%.*]]
12643 // CHECK19: cond.false:
12644 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12645 // CHECK19-NEXT: br label [[COND_END]]
12646 // CHECK19: cond.end:
12647 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
12648 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12649 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12650 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
12651 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12652 // CHECK19: omp.inner.for.cond:
12653 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12654 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12655 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12656 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12657 // CHECK19: omp.inner.for.body:
12658 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12659 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12660 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
12661 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
12662 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
12663 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
12664 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12665 // CHECK19: omp.inner.for.inc:
12666 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12667 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12668 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
12669 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12670 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12671 // CHECK19: omp.inner.for.end:
12672 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12673 // CHECK19: omp.loop.exit:
12674 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12675 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12676 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12677 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12678 // CHECK19: omp.precond.end:
12679 // CHECK19-NEXT: ret void
12680 //
12681 //
12682 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
12683 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12684 // CHECK19-NEXT: entry:
12685 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12686 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12687 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12688 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12689 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12690 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12691 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12692 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12693 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12694 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12695 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12696 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12697 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12698 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12699 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12700 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12701 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12702 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12703 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12704 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12705 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12706 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12707 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12708 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12709 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12710 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12711 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12712 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12713 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12714 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12715 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12716 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12717 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12718 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12719 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12720 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12721 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12722 // CHECK19: omp.precond.then:
12723 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12724 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12725 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
12726 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12727 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12728 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
12729 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
12730 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12731 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12732 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12733 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
12734 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12735 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12736 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12737 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
12738 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12739 // CHECK19: cond.true:
12740 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12741 // CHECK19-NEXT: br label [[COND_END:%.*]]
12742 // CHECK19: cond.false:
12743 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12744 // CHECK19-NEXT: br label [[COND_END]]
12745 // CHECK19: cond.end:
12746 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
12747 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12748 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12749 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
12750 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12751 // CHECK19: omp.inner.for.cond:
12752 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12753 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12754 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
12755 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12756 // CHECK19: omp.inner.for.body:
12757 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12758 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
12759 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12760 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
12761 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
12762 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
12763 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
12764 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12765 // CHECK19: omp.body.continue:
12766 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12767 // CHECK19: omp.inner.for.inc:
12768 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12769 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
12770 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
12771 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12772 // CHECK19: omp.inner.for.end:
12773 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12774 // CHECK19: omp.loop.exit:
12775 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12776 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
12777 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
12778 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12779 // CHECK19: omp.precond.end:
12780 // CHECK19-NEXT: ret void
12781 //
12782 //
12783 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
12784 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12785 // CHECK19-NEXT: entry:
12786 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12787 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12788 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12789 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
12790 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12791 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12792 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12793 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12794 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12795 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12796 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12797 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12798 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
12799 // CHECK19-NEXT: ret void
12800 //
12801 //
12802 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
12803 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12804 // CHECK19-NEXT: entry:
12805 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12806 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12807 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12808 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12809 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12810 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12811 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12812 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12813 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12814 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12815 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12816 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12817 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12818 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12819 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12820 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
12821 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12822 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12823 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12824 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12825 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12826 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12827 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12828 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12829 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12830 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12831 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12832 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12833 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12834 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12835 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12836 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12837 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12838 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12839 // CHECK19: omp.precond.then:
12840 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12841 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12842 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
12843 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12844 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12845 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12846 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12847 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12848 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12849 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12850 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
12851 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12852 // CHECK19: cond.true:
12853 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12854 // CHECK19-NEXT: br label [[COND_END:%.*]]
12855 // CHECK19: cond.false:
12856 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12857 // CHECK19-NEXT: br label [[COND_END]]
12858 // CHECK19: cond.end:
12859 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
12860 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12861 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12862 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
12863 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12864 // CHECK19: omp.inner.for.cond:
12865 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12866 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12867 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12868 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12869 // CHECK19: omp.inner.for.body:
12870 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12871 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12872 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
12873 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
12874 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
12875 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
12876 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12877 // CHECK19: omp.inner.for.inc:
12878 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12879 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12880 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
12881 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12882 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12883 // CHECK19: omp.inner.for.end:
12884 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12885 // CHECK19: omp.loop.exit:
12886 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12887 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12888 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12889 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12890 // CHECK19: omp.precond.end:
12891 // CHECK19-NEXT: ret void
12892 //
12893 //
12894 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
12895 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12896 // CHECK19-NEXT: entry:
12897 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12898 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12899 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12900 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12901 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12902 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12903 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12904 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12905 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12906 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12907 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12908 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12909 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12910 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12911 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12912 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12913 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12914 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12915 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12916 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12917 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12918 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12919 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12920 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12921 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12922 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12923 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
12924 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12925 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12926 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12927 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12928 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12929 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12930 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12931 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12932 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12933 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12934 // CHECK19: omp.precond.then:
12935 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12936 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12937 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
12938 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12939 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12940 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
12941 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
12942 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12943 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12944 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12945 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
12946 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12947 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12948 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12949 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
12950 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12951 // CHECK19: cond.true:
12952 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12953 // CHECK19-NEXT: br label [[COND_END:%.*]]
12954 // CHECK19: cond.false:
12955 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12956 // CHECK19-NEXT: br label [[COND_END]]
12957 // CHECK19: cond.end:
12958 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
12959 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12960 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12961 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
12962 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12963 // CHECK19: omp.inner.for.cond:
12964 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12965 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12966 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
12967 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12968 // CHECK19: omp.inner.for.body:
12969 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12970 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
12971 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12972 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
12973 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4
12974 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
12975 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
12976 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12977 // CHECK19: omp.body.continue:
12978 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12979 // CHECK19: omp.inner.for.inc:
12980 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12981 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
12982 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
12983 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12984 // CHECK19: omp.inner.for.end:
12985 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12986 // CHECK19: omp.loop.exit:
12987 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12988 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
12989 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
12990 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12991 // CHECK19: omp.precond.end:
12992 // CHECK19-NEXT: ret void
12993 //
12994 //
12995 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
12996 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12997 // CHECK19-NEXT: entry:
12998 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12999 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13000 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13001 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13002 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13003 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13004 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13005 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13006 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13007 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13008 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13009 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13010 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13011 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13012 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13013 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13014 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13015 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13016 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
13017 // CHECK19-NEXT: ret void
13018 //
13019 //
13020 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
13021 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13022 // CHECK19-NEXT: entry:
13023 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13024 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13025 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13026 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13027 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13028 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13029 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13030 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13031 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13032 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13033 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13034 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13035 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13036 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13037 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13038 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
13039 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13040 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13041 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13042 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13043 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13044 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13045 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13046 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13047 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13048 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13049 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13050 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13051 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13052 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13053 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13054 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13055 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13056 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13057 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13058 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13059 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13060 // CHECK19: omp.precond.then:
13061 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13062 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13063 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13064 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13065 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13066 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13067 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13068 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13069 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
13070 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13071 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13072 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13073 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13074 // CHECK19: cond.true:
13075 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13076 // CHECK19-NEXT: br label [[COND_END:%.*]]
13077 // CHECK19: cond.false:
13078 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13079 // CHECK19-NEXT: br label [[COND_END]]
13080 // CHECK19: cond.end:
13081 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13082 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13083 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13084 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13085 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13086 // CHECK19: omp.inner.for.cond:
13087 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13088 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13089 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
13090 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
13091 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13092 // CHECK19: omp.inner.for.body:
13093 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13094 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13095 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_ADDR]], align 4
13096 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[N_CASTED]], align 4
13097 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[N_CASTED]], align 4
13098 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13099 // CHECK19-NEXT: store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13100 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13101 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP21]])
13102 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13103 // CHECK19: omp.inner.for.inc:
13104 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13105 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13106 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
13107 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13108 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13109 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13110 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
13111 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
13112 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13113 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13114 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
13115 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
13116 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13117 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13118 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
13119 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
13120 // CHECK19: cond.true11:
13121 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13122 // CHECK19-NEXT: br label [[COND_END13:%.*]]
13123 // CHECK19: cond.false12:
13124 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13125 // CHECK19-NEXT: br label [[COND_END13]]
13126 // CHECK19: cond.end13:
13127 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
13128 // CHECK19-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
13129 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13130 // CHECK19-NEXT: store i32 [[TMP32]], i32* [[DOTOMP_IV]], align 4
13131 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13132 // CHECK19: omp.inner.for.end:
13133 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13134 // CHECK19: omp.loop.exit:
13135 // CHECK19-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13136 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
13137 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
13138 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13139 // CHECK19: omp.precond.end:
13140 // CHECK19-NEXT: ret void
13141 //
13142 //
13143 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7
13144 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13145 // CHECK19-NEXT: entry:
13146 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13147 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13148 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13149 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13150 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13151 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13152 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13153 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13154 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13155 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13156 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13157 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13158 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13159 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13160 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13161 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13162 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13163 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
13164 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13165 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13166 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13167 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13168 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13169 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13170 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13171 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13172 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13173 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13174 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13175 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13176 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13177 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13178 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13179 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13180 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13181 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13182 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13183 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13184 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13185 // CHECK19: omp.precond.then:
13186 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13187 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13188 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13189 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13190 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13191 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13192 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13193 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13194 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13195 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13196 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
13197 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13198 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13199 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13200 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13201 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13202 // CHECK19: cond.true:
13203 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13204 // CHECK19-NEXT: br label [[COND_END:%.*]]
13205 // CHECK19: cond.false:
13206 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13207 // CHECK19-NEXT: br label [[COND_END]]
13208 // CHECK19: cond.end:
13209 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13210 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13211 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13212 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
13213 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13214 // CHECK19: omp.inner.for.cond:
13215 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13216 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13217 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
13218 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13219 // CHECK19: omp.inner.for.body:
13220 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13221 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
13222 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13223 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
13224 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4
13225 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP18]]
13226 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
13227 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13228 // CHECK19: omp.body.continue:
13229 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13230 // CHECK19: omp.inner.for.inc:
13231 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13232 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
13233 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13234 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13235 // CHECK19: omp.inner.for.end:
13236 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13237 // CHECK19: omp.loop.exit:
13238 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13239 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13240 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13241 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13242 // CHECK19: omp.precond.end:
13243 // CHECK19-NEXT: ret void
13244 //
13245 //
13246 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
13247 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13248 // CHECK19-NEXT: entry:
13249 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13250 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13251 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13252 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13253 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13254 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13255 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13256 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13257 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13258 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13259 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13260 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13261 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
13262 // CHECK19-NEXT: ret void
13263 //
13264 //
13265 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..10
13266 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13267 // CHECK19-NEXT: entry:
13268 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13269 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13270 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13271 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13272 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13273 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13274 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13275 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13276 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13277 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13278 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13279 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13280 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13281 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13282 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
13283 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13284 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13285 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13286 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13287 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13288 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13289 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13290 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13291 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13292 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13293 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13294 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13295 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13296 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13297 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13298 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13299 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13300 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13301 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13302 // CHECK19: omp.precond.then:
13303 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13304 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13305 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13306 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13307 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13308 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13309 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
13310 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13311 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13312 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13313 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13314 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13315 // CHECK19: cond.true:
13316 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13317 // CHECK19-NEXT: br label [[COND_END:%.*]]
13318 // CHECK19: cond.false:
13319 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13320 // CHECK19-NEXT: br label [[COND_END]]
13321 // CHECK19: cond.end:
13322 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13323 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13324 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13325 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
13326 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13327 // CHECK19: omp.inner.for.cond:
13328 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13329 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13330 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13331 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13332 // CHECK19: omp.inner.for.body:
13333 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13334 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13335 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
13336 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
13337 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
13338 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]])
13339 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13340 // CHECK19: omp.inner.for.inc:
13341 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13342 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13343 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
13344 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13345 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13346 // CHECK19: omp.inner.for.end:
13347 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13348 // CHECK19: omp.loop.exit:
13349 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13350 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13351 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13352 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13353 // CHECK19: omp.precond.end:
13354 // CHECK19-NEXT: ret void
13355 //
13356 //
13357 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
13358 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13359 // CHECK19-NEXT: entry:
13360 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13361 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13362 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13363 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13364 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13365 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13366 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13367 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13368 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13369 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13370 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13371 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13372 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13373 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13374 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13375 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13376 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
13377 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13378 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13379 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13380 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13381 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13382 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13383 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13384 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13385 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13386 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13387 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13388 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13389 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13390 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13391 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13392 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13393 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13394 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13395 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13396 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13397 // CHECK19: omp.precond.then:
13398 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13399 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13400 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13401 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13402 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13403 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13404 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13405 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13406 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13407 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13408 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13409 // CHECK19-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13410 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
13411 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
13412 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13413 // CHECK19: omp.dispatch.cond:
13414 // CHECK19-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13415 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
13416 // CHECK19-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13417 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
13418 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13419 // CHECK19: omp.dispatch.body:
13420 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13421 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13422 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13423 // CHECK19: omp.inner.for.cond:
13424 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13425 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
13426 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13427 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13428 // CHECK19: omp.inner.for.body:
13429 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13430 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13431 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13432 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
13433 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
13434 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
13435 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
13436 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13437 // CHECK19: omp.body.continue:
13438 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13439 // CHECK19: omp.inner.for.inc:
13440 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13441 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
13442 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13443 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
13444 // CHECK19: omp.inner.for.end:
13445 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13446 // CHECK19: omp.dispatch.inc:
13447 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
13448 // CHECK19: omp.dispatch.end:
13449 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13450 // CHECK19: omp.precond.end:
13451 // CHECK19-NEXT: ret void
13452 //
13453 //
13454 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
13455 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13456 // CHECK19-NEXT: entry:
13457 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13458 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13459 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13460 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13461 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13462 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13463 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13464 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13465 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13466 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13467 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13468 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13469 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13470 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
13471 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
13472 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13473 // CHECK19-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13474 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13475 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
13476 // CHECK19-NEXT: ret void
13477 //
13478 //
13479 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14
13480 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13481 // CHECK19-NEXT: entry:
13482 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13483 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13484 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13485 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13486 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13487 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13488 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13489 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13490 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13491 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13492 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13493 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13494 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13495 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13496 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13497 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
13498 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
13499 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13500 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13501 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13502 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13503 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13504 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13505 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13506 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13507 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13508 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13509 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13510 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13511 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13512 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13513 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13514 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13515 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13516 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13517 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13518 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13519 // CHECK19: omp.precond.then:
13520 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13521 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13522 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4
13523 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13524 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13525 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13526 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
13527 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13528 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13529 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13530 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13531 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13532 // CHECK19: cond.true:
13533 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13534 // CHECK19-NEXT: br label [[COND_END:%.*]]
13535 // CHECK19: cond.false:
13536 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13537 // CHECK19-NEXT: br label [[COND_END]]
13538 // CHECK19: cond.end:
13539 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13540 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13541 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13542 // CHECK19-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
13543 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13544 // CHECK19: omp.inner.for.cond:
13545 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13546 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13547 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13548 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13549 // CHECK19: omp.inner.for.body:
13550 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13551 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13552 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_ADDR]], align 4
13553 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[N_CASTED]], align 4
13554 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[N_CASTED]], align 4
13555 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13556 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13557 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13558 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP20]])
13559 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13560 // CHECK19: omp.inner.for.inc:
13561 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13562 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13563 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
13564 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13565 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13566 // CHECK19: omp.inner.for.end:
13567 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13568 // CHECK19: omp.loop.exit:
13569 // CHECK19-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13570 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4
13571 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]])
13572 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13573 // CHECK19: omp.precond.end:
13574 // CHECK19-NEXT: ret void
13575 //
13576 //
13577 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15
13578 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13579 // CHECK19-NEXT: entry:
13580 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13581 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13582 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13583 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13584 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13585 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13586 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13587 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13588 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13589 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13590 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13591 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13592 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13593 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13594 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13595 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13596 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13597 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
13598 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13599 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13600 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13601 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13602 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13603 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13604 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13605 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13606 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13607 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13608 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
13609 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13610 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13611 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13612 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13613 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13614 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13615 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13616 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13617 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13618 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13619 // CHECK19: omp.precond.then:
13620 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13621 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13622 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
13623 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13624 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13625 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4
13626 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
13627 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13628 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13629 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13630 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13631 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13632 // CHECK19-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13633 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
13634 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
13635 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13636 // CHECK19: omp.dispatch.cond:
13637 // CHECK19-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13638 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
13639 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13640 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
13641 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13642 // CHECK19: omp.dispatch.body:
13643 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13644 // CHECK19-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
13645 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13646 // CHECK19: omp.inner.for.cond:
13647 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13648 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
13649 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13650 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13651 // CHECK19: omp.inner.for.body:
13652 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13653 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
13654 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13655 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
13656 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
13657 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP20]]
13658 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
13659 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13660 // CHECK19: omp.body.continue:
13661 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13662 // CHECK19: omp.inner.for.inc:
13663 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13664 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
13665 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13666 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
13667 // CHECK19: omp.inner.for.end:
13668 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13669 // CHECK19: omp.dispatch.inc:
13670 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
13671 // CHECK19: omp.dispatch.end:
13672 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13673 // CHECK19: omp.precond.end:
13674 // CHECK19-NEXT: ret void
13675 //
13676 //
13677 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
13678 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
13679 // CHECK19-NEXT: entry:
13680 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
13681 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
13682 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
13683 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
13684 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
13685 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
13686 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13687 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
13688 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
13689 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
13690 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
13691 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13692 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13693 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 4
13694 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 4
13695 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 4
13696 // CHECK19-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
13697 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 4
13698 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 4
13699 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 4
13700 // CHECK19-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
13701 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
13702 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4
13703 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x i8*], align 4
13704 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x i8*], align 4
13705 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x i8*], align 4
13706 // CHECK19-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
13707 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
13708 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
13709 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13710 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
13711 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
13712 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13713 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
13714 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
13715 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13716 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4
13717 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13718 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13719 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
13720 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
13721 // CHECK19-NEXT: store i32 1, i32* [[TMP7]], align 4
13722 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
13723 // CHECK19-NEXT: store i32 1, i32* [[TMP8]], align 4
13724 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
13725 // CHECK19-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
13726 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
13727 // CHECK19-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
13728 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
13729 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 4
13730 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
13731 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 4
13732 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
13733 // CHECK19-NEXT: store i8** null, i8*** [[TMP13]], align 4
13734 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
13735 // CHECK19-NEXT: store i8** null, i8*** [[TMP14]], align 4
13736 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
13737 // CHECK19-NEXT: store i64 10, i64* [[TMP15]], align 8
13738 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
13739 // CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13740 // CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13741 // CHECK19: omp_offload.failed:
13742 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112([10 x i32]* [[A]]) #[[ATTR3]]
13743 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
13744 // CHECK19: omp_offload.cont:
13745 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13746 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
13747 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
13748 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13749 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
13750 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
13751 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
13752 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4
13753 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13754 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13755 // CHECK19-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13756 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
13757 // CHECK19-NEXT: store i32 1, i32* [[TMP25]], align 4
13758 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
13759 // CHECK19-NEXT: store i32 1, i32* [[TMP26]], align 4
13760 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
13761 // CHECK19-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
13762 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
13763 // CHECK19-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
13764 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
13765 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 4
13766 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
13767 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 4
13768 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
13769 // CHECK19-NEXT: store i8** null, i8*** [[TMP31]], align 4
13770 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
13771 // CHECK19-NEXT: store i8** null, i8*** [[TMP32]], align 4
13772 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
13773 // CHECK19-NEXT: store i64 10, i64* [[TMP33]], align 8
13774 // CHECK19-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
13775 // CHECK19-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
13776 // CHECK19-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
13777 // CHECK19: omp_offload.failed6:
13778 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
13779 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT7]]
13780 // CHECK19: omp_offload.cont7:
13781 // CHECK19-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
13782 // CHECK19-NEXT: store i32 [[TMP36]], i32* [[DOTCAPTURE_EXPR_]], align 4
13783 // CHECK19-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13784 // CHECK19-NEXT: store i32 [[TMP37]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13785 // CHECK19-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13786 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13787 // CHECK19-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to [10 x i32]**
13788 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP40]], align 4
13789 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13790 // CHECK19-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to [10 x i32]**
13791 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP42]], align 4
13792 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
13793 // CHECK19-NEXT: store i8* null, i8** [[TMP43]], align 4
13794 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
13795 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32*
13796 // CHECK19-NEXT: store i32 [[TMP38]], i32* [[TMP45]], align 4
13797 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
13798 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
13799 // CHECK19-NEXT: store i32 [[TMP38]], i32* [[TMP47]], align 4
13800 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
13801 // CHECK19-NEXT: store i8* null, i8** [[TMP48]], align 4
13802 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13803 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13804 // CHECK19-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13805 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
13806 // CHECK19-NEXT: store i32 1, i32* [[TMP51]], align 4
13807 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
13808 // CHECK19-NEXT: store i32 2, i32* [[TMP52]], align 4
13809 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
13810 // CHECK19-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 4
13811 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
13812 // CHECK19-NEXT: store i8** [[TMP50]], i8*** [[TMP54]], align 4
13813 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
13814 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP55]], align 4
13815 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
13816 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP56]], align 4
13817 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
13818 // CHECK19-NEXT: store i8** null, i8*** [[TMP57]], align 4
13819 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
13820 // CHECK19-NEXT: store i8** null, i8*** [[TMP58]], align 4
13821 // CHECK19-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
13822 // CHECK19-NEXT: store i64 10, i64* [[TMP59]], align 8
13823 // CHECK19-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
13824 // CHECK19-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0
13825 // CHECK19-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
13826 // CHECK19: omp_offload.failed13:
13827 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120([10 x i32]* [[A]], i32 [[TMP38]]) #[[ATTR3]]
13828 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT14]]
13829 // CHECK19: omp_offload.cont14:
13830 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13831 // CHECK19-NEXT: [[TMP63:%.*]] = bitcast i8** [[TMP62]] to [10 x i32]**
13832 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP63]], align 4
13833 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13834 // CHECK19-NEXT: [[TMP65:%.*]] = bitcast i8** [[TMP64]] to [10 x i32]**
13835 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP65]], align 4
13836 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
13837 // CHECK19-NEXT: store i8* null, i8** [[TMP66]], align 4
13838 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13839 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13840 // CHECK19-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13841 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
13842 // CHECK19-NEXT: store i32 1, i32* [[TMP69]], align 4
13843 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
13844 // CHECK19-NEXT: store i32 1, i32* [[TMP70]], align 4
13845 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
13846 // CHECK19-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 4
13847 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
13848 // CHECK19-NEXT: store i8** [[TMP68]], i8*** [[TMP72]], align 4
13849 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
13850 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP73]], align 4
13851 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
13852 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP74]], align 4
13853 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
13854 // CHECK19-NEXT: store i8** null, i8*** [[TMP75]], align 4
13855 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
13856 // CHECK19-NEXT: store i8** null, i8*** [[TMP76]], align 4
13857 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
13858 // CHECK19-NEXT: store i64 10, i64* [[TMP77]], align 8
13859 // CHECK19-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
13860 // CHECK19-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
13861 // CHECK19-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
13862 // CHECK19: omp_offload.failed20:
13863 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124([10 x i32]* [[A]]) #[[ATTR3]]
13864 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT21]]
13865 // CHECK19: omp_offload.cont21:
13866 // CHECK19-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
13867 // CHECK19-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_22]], align 4
13868 // CHECK19-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_22]], align 4
13869 // CHECK19-NEXT: store i32 [[TMP81]], i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
13870 // CHECK19-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED23]], align 4
13871 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
13872 // CHECK19-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to [10 x i32]**
13873 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP84]], align 4
13874 // CHECK19-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
13875 // CHECK19-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to [10 x i32]**
13876 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP86]], align 4
13877 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
13878 // CHECK19-NEXT: store i8* null, i8** [[TMP87]], align 4
13879 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
13880 // CHECK19-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
13881 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
13882 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
13883 // CHECK19-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
13884 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
13885 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1
13886 // CHECK19-NEXT: store i8* null, i8** [[TMP92]], align 4
13887 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
13888 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
13889 // CHECK19-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13890 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 0
13891 // CHECK19-NEXT: store i32 1, i32* [[TMP95]], align 4
13892 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 1
13893 // CHECK19-NEXT: store i32 2, i32* [[TMP96]], align 4
13894 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 2
13895 // CHECK19-NEXT: store i8** [[TMP93]], i8*** [[TMP97]], align 4
13896 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 3
13897 // CHECK19-NEXT: store i8** [[TMP94]], i8*** [[TMP98]], align 4
13898 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 4
13899 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP99]], align 4
13900 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 5
13901 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP100]], align 4
13902 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 6
13903 // CHECK19-NEXT: store i8** null, i8*** [[TMP101]], align 4
13904 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 7
13905 // CHECK19-NEXT: store i8** null, i8*** [[TMP102]], align 4
13906 // CHECK19-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 8
13907 // CHECK19-NEXT: store i64 10, i64* [[TMP103]], align 8
13908 // CHECK19-NEXT: [[TMP104:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]])
13909 // CHECK19-NEXT: [[TMP105:%.*]] = icmp ne i32 [[TMP104]], 0
13910 // CHECK19-NEXT: br i1 [[TMP105]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
13911 // CHECK19: omp_offload.failed29:
13912 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128([10 x i32]* [[A]], i32 [[TMP82]]) #[[ATTR3]]
13913 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]]
13914 // CHECK19: omp_offload.cont30:
13915 // CHECK19-NEXT: ret i32 0
13916 //
13917 //
13918 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
13919 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13920 // CHECK19-NEXT: entry:
13921 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13922 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13923 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13924 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13925 // CHECK19-NEXT: ret void
13926 //
13927 //
13928 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18
13929 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13930 // CHECK19-NEXT: entry:
13931 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13932 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13933 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13934 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13935 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13936 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13937 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13938 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13939 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13940 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13941 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13942 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13943 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13944 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13945 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13946 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13947 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13948 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13949 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13950 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13951 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13952 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13953 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13954 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13955 // CHECK19: cond.true:
13956 // CHECK19-NEXT: br label [[COND_END:%.*]]
13957 // CHECK19: cond.false:
13958 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13959 // CHECK19-NEXT: br label [[COND_END]]
13960 // CHECK19: cond.end:
13961 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13962 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13963 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13964 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13965 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13966 // CHECK19: omp.inner.for.cond:
13967 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13968 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13969 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13970 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13971 // CHECK19: omp.inner.for.body:
13972 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13973 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13974 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
13975 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13976 // CHECK19: omp.inner.for.inc:
13977 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13978 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13979 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
13980 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13981 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13982 // CHECK19: omp.inner.for.end:
13983 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13984 // CHECK19: omp.loop.exit:
13985 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13986 // CHECK19-NEXT: ret void
13987 //
13988 //
13989 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..19
13990 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13991 // CHECK19-NEXT: entry:
13992 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13993 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13994 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13995 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13996 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13997 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13998 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13999 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14000 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14001 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14002 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14003 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14004 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14005 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14006 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14007 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14008 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14009 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14010 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14011 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14012 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14013 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14014 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14015 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14016 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14017 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14018 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14019 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14020 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14021 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14022 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14023 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14024 // CHECK19: cond.true:
14025 // CHECK19-NEXT: br label [[COND_END:%.*]]
14026 // CHECK19: cond.false:
14027 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14028 // CHECK19-NEXT: br label [[COND_END]]
14029 // CHECK19: cond.end:
14030 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14031 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14032 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14033 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14034 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14035 // CHECK19: omp.inner.for.cond:
14036 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14037 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14038 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14039 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14040 // CHECK19: omp.inner.for.body:
14041 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14042 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14043 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14044 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14045 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14046 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14047 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
14048 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14049 // CHECK19: omp.body.continue:
14050 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14051 // CHECK19: omp.inner.for.inc:
14052 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14053 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14054 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14055 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14056 // CHECK19: omp.inner.for.end:
14057 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14058 // CHECK19: omp.loop.exit:
14059 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14060 // CHECK19-NEXT: ret void
14061 //
14062 //
14063 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
14064 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14065 // CHECK19-NEXT: entry:
14066 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14067 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14068 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14069 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14070 // CHECK19-NEXT: ret void
14071 //
14072 //
14073 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22
14074 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14075 // CHECK19-NEXT: entry:
14076 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14077 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14078 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14079 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14080 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14081 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14082 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14083 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14084 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14085 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14086 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14087 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14088 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14089 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14090 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14091 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14092 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14093 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14094 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14095 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14096 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14097 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14098 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14099 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14100 // CHECK19: cond.true:
14101 // CHECK19-NEXT: br label [[COND_END:%.*]]
14102 // CHECK19: cond.false:
14103 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14104 // CHECK19-NEXT: br label [[COND_END]]
14105 // CHECK19: cond.end:
14106 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14107 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14108 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14109 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14110 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14111 // CHECK19: omp.inner.for.cond:
14112 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14113 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14114 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14115 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14116 // CHECK19: omp.inner.for.body:
14117 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14118 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14119 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14120 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14121 // CHECK19: omp.inner.for.inc:
14122 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14123 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14124 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14125 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14126 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14127 // CHECK19: omp.inner.for.end:
14128 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14129 // CHECK19: omp.loop.exit:
14130 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14131 // CHECK19-NEXT: ret void
14132 //
14133 //
14134 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..23
14135 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14136 // CHECK19-NEXT: entry:
14137 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14138 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14139 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14140 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14141 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14142 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14143 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14144 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14145 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14146 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14147 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14148 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14149 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14150 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14151 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14152 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14153 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14154 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14155 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14156 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14157 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14158 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14159 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14160 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14161 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14162 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14163 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14164 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14165 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14166 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14167 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14168 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14169 // CHECK19: cond.true:
14170 // CHECK19-NEXT: br label [[COND_END:%.*]]
14171 // CHECK19: cond.false:
14172 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14173 // CHECK19-NEXT: br label [[COND_END]]
14174 // CHECK19: cond.end:
14175 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14176 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14177 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14178 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14179 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14180 // CHECK19: omp.inner.for.cond:
14181 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14182 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14183 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14184 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14185 // CHECK19: omp.inner.for.body:
14186 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14187 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14188 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14189 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14190 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14191 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14192 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
14193 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14194 // CHECK19: omp.body.continue:
14195 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14196 // CHECK19: omp.inner.for.inc:
14197 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14198 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14199 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14200 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14201 // CHECK19: omp.inner.for.end:
14202 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14203 // CHECK19: omp.loop.exit:
14204 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14205 // CHECK19-NEXT: ret void
14206 //
14207 //
14208 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
14209 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14210 // CHECK19-NEXT: entry:
14211 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14212 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14213 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14214 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14215 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14216 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14217 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14218 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14219 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14220 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
14221 // CHECK19-NEXT: ret void
14222 //
14223 //
14224 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26
14225 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14226 // CHECK19-NEXT: entry:
14227 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14228 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14229 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14230 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14231 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14232 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14233 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14234 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14235 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14236 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14237 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14238 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14239 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14240 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14241 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14242 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14243 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14244 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14245 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14246 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14247 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14248 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14249 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14250 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14251 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14252 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14253 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14254 // CHECK19: cond.true:
14255 // CHECK19-NEXT: br label [[COND_END:%.*]]
14256 // CHECK19: cond.false:
14257 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14258 // CHECK19-NEXT: br label [[COND_END]]
14259 // CHECK19: cond.end:
14260 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14261 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14262 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14263 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14264 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14265 // CHECK19: omp.inner.for.cond:
14266 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14267 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14268 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14269 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14270 // CHECK19: omp.inner.for.body:
14271 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14272 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14273 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14274 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14275 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14276 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14277 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14278 // CHECK19: omp.inner.for.inc:
14279 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14280 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14281 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14282 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14283 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14284 // CHECK19: omp.inner.for.end:
14285 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14286 // CHECK19: omp.loop.exit:
14287 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14288 // CHECK19-NEXT: ret void
14289 //
14290 //
14291 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..27
14292 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14293 // CHECK19-NEXT: entry:
14294 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14295 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14296 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14297 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14298 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14299 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14300 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14301 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14302 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14303 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14304 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14305 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14306 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14307 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14308 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14309 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14310 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14311 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14312 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14313 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14314 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14315 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14316 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14317 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14318 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14319 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14320 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14321 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14322 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14323 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14324 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
14325 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
14326 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14327 // CHECK19: omp.dispatch.cond:
14328 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14329 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14330 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
14331 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14332 // CHECK19: cond.true:
14333 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14334 // CHECK19-NEXT: br label [[COND_END:%.*]]
14335 // CHECK19: cond.false:
14336 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14337 // CHECK19-NEXT: br label [[COND_END]]
14338 // CHECK19: cond.end:
14339 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
14340 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14341 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14342 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
14343 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14344 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14345 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
14346 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14347 // CHECK19: omp.dispatch.body:
14348 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14349 // CHECK19: omp.inner.for.cond:
14350 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14351 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14352 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14353 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14354 // CHECK19: omp.inner.for.body:
14355 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14356 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
14357 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14358 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14359 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
14360 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
14361 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
14362 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14363 // CHECK19: omp.body.continue:
14364 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14365 // CHECK19: omp.inner.for.inc:
14366 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14367 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
14368 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
14369 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14370 // CHECK19: omp.inner.for.end:
14371 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14372 // CHECK19: omp.dispatch.inc:
14373 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14374 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14375 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
14376 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
14377 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14378 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14379 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14380 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
14381 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14382 // CHECK19: omp.dispatch.end:
14383 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
14384 // CHECK19-NEXT: ret void
14385 //
14386 //
14387 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
14388 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14389 // CHECK19-NEXT: entry:
14390 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14391 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14392 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14393 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14394 // CHECK19-NEXT: ret void
14395 //
14396 //
14397 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30
14398 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14399 // CHECK19-NEXT: entry:
14400 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14401 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14402 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14403 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14404 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14405 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14406 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14407 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14408 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14409 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14410 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14411 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14412 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14413 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14414 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14415 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14416 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14417 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14418 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14419 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14420 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14421 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14422 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14423 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14424 // CHECK19: cond.true:
14425 // CHECK19-NEXT: br label [[COND_END:%.*]]
14426 // CHECK19: cond.false:
14427 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14428 // CHECK19-NEXT: br label [[COND_END]]
14429 // CHECK19: cond.end:
14430 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14431 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14432 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14433 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14434 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14435 // CHECK19: omp.inner.for.cond:
14436 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14437 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14438 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14439 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14440 // CHECK19: omp.inner.for.body:
14441 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14442 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14443 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14444 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14445 // CHECK19: omp.inner.for.inc:
14446 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14447 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14448 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14449 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14450 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14451 // CHECK19: omp.inner.for.end:
14452 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14453 // CHECK19: omp.loop.exit:
14454 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14455 // CHECK19-NEXT: ret void
14456 //
14457 //
14458 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..31
14459 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14460 // CHECK19-NEXT: entry:
14461 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14462 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14463 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14464 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14465 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14466 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14467 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14468 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14469 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14470 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14471 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14472 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14473 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14474 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14475 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14476 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14477 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14478 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14479 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14480 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14481 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14482 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14483 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14484 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14485 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14486 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14487 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14488 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14489 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14490 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
14491 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
14492 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14493 // CHECK19: omp.dispatch.cond:
14494 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14495 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
14496 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14497 // CHECK19: omp.dispatch.body:
14498 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14499 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
14500 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14501 // CHECK19: omp.inner.for.cond:
14502 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14503 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
14504 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
14505 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14506 // CHECK19: omp.inner.for.body:
14507 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14508 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
14509 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14510 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
14511 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
14512 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
14513 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
14514 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14515 // CHECK19: omp.body.continue:
14516 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14517 // CHECK19: omp.inner.for.inc:
14518 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14519 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
14520 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14521 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14522 // CHECK19: omp.inner.for.end:
14523 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14524 // CHECK19: omp.dispatch.inc:
14525 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14526 // CHECK19: omp.dispatch.end:
14527 // CHECK19-NEXT: ret void
14528 //
14529 //
14530 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
14531 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14532 // CHECK19-NEXT: entry:
14533 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14534 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14535 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14536 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14537 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14538 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14539 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14540 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14541 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14542 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP2]])
14543 // CHECK19-NEXT: ret void
14544 //
14545 //
14546 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..34
14547 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14548 // CHECK19-NEXT: entry:
14549 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14550 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14551 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14552 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14553 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14554 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14555 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14556 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14557 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14558 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14559 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14560 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14561 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14562 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14563 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14564 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14565 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14566 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14567 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14568 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14569 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14570 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14571 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14572 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14573 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14574 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14575 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14576 // CHECK19: cond.true:
14577 // CHECK19-NEXT: br label [[COND_END:%.*]]
14578 // CHECK19: cond.false:
14579 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14580 // CHECK19-NEXT: br label [[COND_END]]
14581 // CHECK19: cond.end:
14582 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14583 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14584 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14585 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14586 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14587 // CHECK19: omp.inner.for.cond:
14588 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14589 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14590 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14591 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14592 // CHECK19: omp.inner.for.body:
14593 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14594 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14595 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14596 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14597 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14598 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14599 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14600 // CHECK19: omp.inner.for.inc:
14601 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14602 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14603 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14604 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14605 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14606 // CHECK19: omp.inner.for.end:
14607 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14608 // CHECK19: omp.loop.exit:
14609 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14610 // CHECK19-NEXT: ret void
14611 //
14612 //
14613 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..35
14614 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14615 // CHECK19-NEXT: entry:
14616 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14617 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14618 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14619 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14620 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14621 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14622 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14623 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14624 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14625 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14626 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14627 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14628 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14629 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14630 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14631 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14632 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14633 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14634 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14635 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14636 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14637 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14638 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14639 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14640 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14641 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14642 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14643 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14644 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14645 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14646 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14647 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14648 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14649 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
14650 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14651 // CHECK19: omp.dispatch.cond:
14652 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14653 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
14654 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14655 // CHECK19: omp.dispatch.body:
14656 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14657 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
14658 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14659 // CHECK19: omp.inner.for.cond:
14660 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14661 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
14662 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
14663 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14664 // CHECK19: omp.inner.for.body:
14665 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14666 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
14667 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14668 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
14669 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
14670 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
14671 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
14672 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14673 // CHECK19: omp.body.continue:
14674 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14675 // CHECK19: omp.inner.for.inc:
14676 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14677 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
14678 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14679 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
14680 // CHECK19: omp.inner.for.end:
14681 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14682 // CHECK19: omp.dispatch.inc:
14683 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14684 // CHECK19: omp.dispatch.end:
14685 // CHECK19-NEXT: ret void
14686 //
14687 //
14688 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14689 // CHECK19-SAME: () #[[ATTR6:[0-9]+]] {
14690 // CHECK19-NEXT: entry:
14691 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
14692 // CHECK19-NEXT: ret void
14693 //
14694