1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // add -fopenmp-targets
3 
4 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
7 
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 
12 // expected-no-diagnostics
13 #ifndef HEADER
14 #define HEADER
15 
16 typedef __INTPTR_TYPE__ intptr_t;
17 
18 
19 void foo();
20 
21 struct S {
22   intptr_t a, b, c;
SS23   S(intptr_t a) : a(a) {}
operator charS24   operator char() { return a; }
~SS25   ~S() {}
26 };
27 
28 template <typename T>
tmain()29 T tmain() {
30 #pragma omp target teams distribute parallel for proc_bind(master)
31   for(int i = 0; i < 1000; i++) {}
32   return T();
33 }
34 
main()35 int main() {
36 #pragma omp target teams distribute parallel for proc_bind(spread)
37   for(int i = 0; i < 1000; i++) {}
38 #pragma omp target teams distribute parallel for proc_bind(close)
39   for(int i = 0; i < 1000; i++) {}
40   return tmain<int>();
41 }
42 
43 
44 
45 
46 
47 
48 
49 
50 #endif
51 // CHECK1-LABEL: define {{[^@]+}}@main
52 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
53 // CHECK1-NEXT:  entry:
54 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
55 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
56 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
57 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
58 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
59 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
60 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
61 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
62 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
63 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
64 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
65 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
66 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
67 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
68 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
69 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
70 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
71 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
72 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
73 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
74 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
75 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
76 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
77 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
78 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
79 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
80 // CHECK1:       omp_offload.failed:
81 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36() #[[ATTR2:[0-9]+]]
82 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
83 // CHECK1:       omp_offload.cont:
84 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
85 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
86 // CHECK1-NEXT:    store i32 1, i32* [[TMP11]], align 4
87 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
88 // CHECK1-NEXT:    store i32 0, i32* [[TMP12]], align 4
89 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
90 // CHECK1-NEXT:    store i8** null, i8*** [[TMP13]], align 8
91 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
92 // CHECK1-NEXT:    store i8** null, i8*** [[TMP14]], align 8
93 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
94 // CHECK1-NEXT:    store i64* null, i64** [[TMP15]], align 8
95 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
96 // CHECK1-NEXT:    store i64* null, i64** [[TMP16]], align 8
97 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
98 // CHECK1-NEXT:    store i8** null, i8*** [[TMP17]], align 8
99 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
100 // CHECK1-NEXT:    store i8** null, i8*** [[TMP18]], align 8
101 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
102 // CHECK1-NEXT:    store i64 1000, i64* [[TMP19]], align 8
103 // CHECK1-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
104 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
105 // CHECK1-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
106 // CHECK1:       omp_offload.failed3:
107 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38() #[[ATTR2]]
108 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
109 // CHECK1:       omp_offload.cont4:
110 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
111 // CHECK1-NEXT:    ret i32 [[CALL]]
112 //
113 //
114 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l36
115 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
116 // CHECK1-NEXT:  entry:
117 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
118 // CHECK1-NEXT:    ret void
119 //
120 //
121 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
122 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
123 // CHECK1-NEXT:  entry:
124 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
125 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
126 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
127 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
128 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
129 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
130 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
131 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
132 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
133 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
134 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
135 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
136 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
137 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
138 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
139 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
140 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
141 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
142 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
143 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
144 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
145 // CHECK1:       cond.true:
146 // CHECK1-NEXT:    br label [[COND_END:%.*]]
147 // CHECK1:       cond.false:
148 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
149 // CHECK1-NEXT:    br label [[COND_END]]
150 // CHECK1:       cond.end:
151 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
152 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
153 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
154 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
155 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
156 // CHECK1:       omp.inner.for.cond:
157 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
158 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
159 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
160 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
161 // CHECK1:       omp.inner.for.body:
162 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 4)
163 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
164 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
165 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
166 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
167 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
168 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
169 // CHECK1:       omp.inner.for.inc:
170 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
171 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
172 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
173 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
174 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
175 // CHECK1:       omp.inner.for.end:
176 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
177 // CHECK1:       omp.loop.exit:
178 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
179 // CHECK1-NEXT:    ret void
180 //
181 //
182 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
183 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
184 // CHECK1-NEXT:  entry:
185 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
186 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
187 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
188 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
189 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
191 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
192 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
193 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
194 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
197 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
198 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
199 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
200 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
201 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
202 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
203 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
204 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
205 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
206 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
207 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
208 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
209 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
210 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
211 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
212 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
213 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
214 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
215 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
216 // CHECK1:       cond.true:
217 // CHECK1-NEXT:    br label [[COND_END:%.*]]
218 // CHECK1:       cond.false:
219 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
220 // CHECK1-NEXT:    br label [[COND_END]]
221 // CHECK1:       cond.end:
222 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
223 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
224 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
225 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
226 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
227 // CHECK1:       omp.inner.for.cond:
228 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
229 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
230 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
231 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
232 // CHECK1:       omp.inner.for.body:
233 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
234 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
235 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
236 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
237 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
238 // CHECK1:       omp.body.continue:
239 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
240 // CHECK1:       omp.inner.for.inc:
241 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
242 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
243 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
244 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
245 // CHECK1:       omp.inner.for.end:
246 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
247 // CHECK1:       omp.loop.exit:
248 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
249 // CHECK1-NEXT:    ret void
250 //
251 //
252 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l38
253 // CHECK1-SAME: () #[[ATTR1]] {
254 // CHECK1-NEXT:  entry:
255 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
256 // CHECK1-NEXT:    ret void
257 //
258 //
259 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
260 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
261 // CHECK1-NEXT:  entry:
262 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
263 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
264 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
265 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
266 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
267 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
269 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
271 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
272 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
273 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
274 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
275 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
276 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
277 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
278 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
279 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
280 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
281 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
282 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
283 // CHECK1:       cond.true:
284 // CHECK1-NEXT:    br label [[COND_END:%.*]]
285 // CHECK1:       cond.false:
286 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
287 // CHECK1-NEXT:    br label [[COND_END]]
288 // CHECK1:       cond.end:
289 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
290 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
291 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
292 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
293 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
294 // CHECK1:       omp.inner.for.cond:
295 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
296 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
297 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
298 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
299 // CHECK1:       omp.inner.for.body:
300 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 3)
301 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
302 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
303 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
304 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
305 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
306 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
307 // CHECK1:       omp.inner.for.inc:
308 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
309 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
310 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
311 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
312 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
313 // CHECK1:       omp.inner.for.end:
314 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
315 // CHECK1:       omp.loop.exit:
316 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
317 // CHECK1-NEXT:    ret void
318 //
319 //
320 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
321 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
322 // CHECK1-NEXT:  entry:
323 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
324 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
325 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
326 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
327 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
328 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
329 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
330 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
331 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
332 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
333 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
334 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
335 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
336 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
337 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
338 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
339 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
340 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
341 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
342 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
343 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
344 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
345 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
346 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
347 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
348 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
349 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
350 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
351 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
352 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
353 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
354 // CHECK1:       cond.true:
355 // CHECK1-NEXT:    br label [[COND_END:%.*]]
356 // CHECK1:       cond.false:
357 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
358 // CHECK1-NEXT:    br label [[COND_END]]
359 // CHECK1:       cond.end:
360 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
361 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
362 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
363 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
364 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
365 // CHECK1:       omp.inner.for.cond:
366 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
367 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
368 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
369 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
370 // CHECK1:       omp.inner.for.body:
371 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
372 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
373 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
374 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
375 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
376 // CHECK1:       omp.body.continue:
377 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
378 // CHECK1:       omp.inner.for.inc:
379 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
380 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
381 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
382 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
383 // CHECK1:       omp.inner.for.end:
384 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
385 // CHECK1:       omp.loop.exit:
386 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
387 // CHECK1-NEXT:    ret void
388 //
389 //
390 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
391 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat {
392 // CHECK1-NEXT:  entry:
393 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
394 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
395 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
396 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
397 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
398 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
399 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
400 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
401 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
402 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
403 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
404 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
405 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
406 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
407 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
408 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
409 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
410 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
411 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
412 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
413 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
414 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
415 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
416 // CHECK1:       omp_offload.failed:
417 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30() #[[ATTR2]]
418 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
419 // CHECK1:       omp_offload.cont:
420 // CHECK1-NEXT:    ret i32 0
421 //
422 //
423 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l30
424 // CHECK1-SAME: () #[[ATTR1]] {
425 // CHECK1-NEXT:  entry:
426 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
427 // CHECK1-NEXT:    ret void
428 //
429 //
430 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
431 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
432 // CHECK1-NEXT:  entry:
433 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
434 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
435 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
436 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
437 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
438 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
439 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
440 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
443 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
444 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
445 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
446 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
447 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
448 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
449 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
450 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
451 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
452 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
453 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
454 // CHECK1:       cond.true:
455 // CHECK1-NEXT:    br label [[COND_END:%.*]]
456 // CHECK1:       cond.false:
457 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
458 // CHECK1-NEXT:    br label [[COND_END]]
459 // CHECK1:       cond.end:
460 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
461 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
462 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
463 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
464 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
465 // CHECK1:       omp.inner.for.cond:
466 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
467 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
468 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
469 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
470 // CHECK1:       omp.inner.for.body:
471 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
472 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
473 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
474 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
475 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
476 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
477 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
478 // CHECK1:       omp.inner.for.inc:
479 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
480 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
481 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
482 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
483 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
484 // CHECK1:       omp.inner.for.end:
485 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
486 // CHECK1:       omp.loop.exit:
487 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
488 // CHECK1-NEXT:    ret void
489 //
490 //
491 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
492 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
493 // CHECK1-NEXT:  entry:
494 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
495 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
496 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
497 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
498 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
499 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
500 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
501 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
502 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
503 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
504 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
505 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
506 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
507 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
508 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
509 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
510 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
511 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
512 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
513 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
514 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
515 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
516 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
517 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
518 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
519 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
520 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
521 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
522 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
523 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
524 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
525 // CHECK1:       cond.true:
526 // CHECK1-NEXT:    br label [[COND_END:%.*]]
527 // CHECK1:       cond.false:
528 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
529 // CHECK1-NEXT:    br label [[COND_END]]
530 // CHECK1:       cond.end:
531 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
532 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
533 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
534 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
535 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
536 // CHECK1:       omp.inner.for.cond:
537 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
538 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
539 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
540 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
541 // CHECK1:       omp.inner.for.body:
542 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
543 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
544 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
545 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
546 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
547 // CHECK1:       omp.body.continue:
548 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
549 // CHECK1:       omp.inner.for.inc:
550 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
551 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
552 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
553 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
554 // CHECK1:       omp.inner.for.end:
555 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
556 // CHECK1:       omp.loop.exit:
557 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
558 // CHECK1-NEXT:    ret void
559 //
560 //
561 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
562 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
563 // CHECK1-NEXT:  entry:
564 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
565 // CHECK1-NEXT:    ret void
566 //
567