1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5
6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9
10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
13
14 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17
18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
21
22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
29
30 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
31 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
32 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
33
34 // expected-no-diagnostics
35 #ifndef HEADER
36 #define HEADER
37
38 void fn1();
39 void fn2();
40 void fn3();
41 void fn4();
42 void fn5();
43 void fn6();
44
45 int Arg;
46
gtid_test()47 void gtid_test() {
48 #pragma omp target teams distribute parallel for
49 for(int i = 0 ; i < 100; i++) {}
50
51 #pragma omp target teams distribute parallel for if (parallel: false)
52 for(int i = 0 ; i < 100; i++) {
53 gtid_test();
54 }
55 }
56
57
58 template <typename T>
tmain(T Arg)59 int tmain(T Arg) {
60 #pragma omp target teams distribute parallel for if (true)
61 for(int i = 0 ; i < 100; i++) {
62 fn1();
63 }
64 #pragma omp target teams distribute parallel for if (false)
65 for(int i = 0 ; i < 100; i++) {
66 fn2();
67 }
68 #pragma omp target teams distribute parallel for if (parallel: Arg)
69 for(int i = 0 ; i < 100; i++) {
70 fn3();
71 }
72 return 0;
73 }
74
main()75 int main() {
76 #pragma omp target teams distribute parallel for if (true)
77 for(int i = 0 ; i < 100; i++) {
78
79
80 fn4();
81 }
82
83 #pragma omp target teams distribute parallel for if (false)
84 for(int i = 0 ; i < 100; i++) {
85
86
87 fn5();
88 }
89
90 #pragma omp target teams distribute parallel for if (Arg)
91 for(int i = 0 ; i < 100; i++) {
92
93
94 fn6();
95 }
96
97 return tmain(Arg);
98 }
99
100
101
102
103
104
105 // call void [[T_OUTLINE_FUN_3:@.+]](
106
107 #endif
108 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
109 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
110 // CHECK1-NEXT: entry:
111 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
112 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
113 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
114 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
115 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
116 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
117 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
118 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
119 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
120 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
121 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
122 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
123 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
124 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
125 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
126 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
127 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
128 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
129 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
130 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
131 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
132 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
133 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
134 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
135 // CHECK1: omp_offload.failed:
136 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2:[0-9]+]]
137 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
138 // CHECK1: omp_offload.cont:
139 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
140 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
141 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
142 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
143 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
144 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
145 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
146 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
147 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
148 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
149 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
150 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
151 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
152 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
153 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
154 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
155 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
156 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
157 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
158 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
159 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
160 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
161 // CHECK1: omp_offload.failed3:
162 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51() #[[ATTR2]]
163 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
164 // CHECK1: omp_offload.cont4:
165 // CHECK1-NEXT: ret void
166 //
167 //
168 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
169 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
170 // CHECK1-NEXT: entry:
171 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
172 // CHECK1-NEXT: ret void
173 //
174 //
175 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
176 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
177 // CHECK1-NEXT: entry:
178 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
179 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
180 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
181 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
182 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
183 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
184 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
185 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
186 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
187 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
188 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
189 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
190 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
191 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
192 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
193 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
194 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
195 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
196 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
197 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
198 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
199 // CHECK1: cond.true:
200 // CHECK1-NEXT: br label [[COND_END:%.*]]
201 // CHECK1: cond.false:
202 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
203 // CHECK1-NEXT: br label [[COND_END]]
204 // CHECK1: cond.end:
205 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
206 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
207 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
208 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
209 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
210 // CHECK1: omp.inner.for.cond:
211 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
212 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
213 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
214 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
215 // CHECK1: omp.inner.for.body:
216 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
217 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
218 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
219 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
220 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
221 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
222 // CHECK1: omp.inner.for.inc:
223 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
224 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
225 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
226 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
227 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
228 // CHECK1: omp.inner.for.end:
229 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
230 // CHECK1: omp.loop.exit:
231 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
232 // CHECK1-NEXT: ret void
233 //
234 //
235 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
236 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
237 // CHECK1-NEXT: entry:
238 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
239 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
240 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
241 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
242 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
244 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
245 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
246 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
247 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
248 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
249 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
250 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
251 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
252 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
253 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
254 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
255 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
256 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
257 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
258 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
259 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
260 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
261 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
262 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
263 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
264 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
265 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
266 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
267 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
268 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
269 // CHECK1: cond.true:
270 // CHECK1-NEXT: br label [[COND_END:%.*]]
271 // CHECK1: cond.false:
272 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
273 // CHECK1-NEXT: br label [[COND_END]]
274 // CHECK1: cond.end:
275 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
276 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
277 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
278 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
280 // CHECK1: omp.inner.for.cond:
281 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
282 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
283 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
284 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
285 // CHECK1: omp.inner.for.body:
286 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
287 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
288 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
289 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
290 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
291 // CHECK1: omp.body.continue:
292 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
293 // CHECK1: omp.inner.for.inc:
294 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
295 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
296 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
297 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
298 // CHECK1: omp.inner.for.end:
299 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
300 // CHECK1: omp.loop.exit:
301 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
302 // CHECK1-NEXT: ret void
303 //
304 //
305 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l51
306 // CHECK1-SAME: () #[[ATTR1]] {
307 // CHECK1-NEXT: entry:
308 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
309 // CHECK1-NEXT: ret void
310 //
311 //
312 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
313 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
314 // CHECK1-NEXT: entry:
315 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
316 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
317 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
318 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
319 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
320 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
321 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
322 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
323 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
324 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
325 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
326 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
327 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
328 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
329 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
330 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
331 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
332 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
333 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
334 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
335 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
336 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
337 // CHECK1: cond.true:
338 // CHECK1-NEXT: br label [[COND_END:%.*]]
339 // CHECK1: cond.false:
340 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
341 // CHECK1-NEXT: br label [[COND_END]]
342 // CHECK1: cond.end:
343 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
344 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
345 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
346 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
347 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
348 // CHECK1: omp.inner.for.cond:
349 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
350 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
351 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
352 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
353 // CHECK1: omp.inner.for.body:
354 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
355 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
356 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
357 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
358 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
359 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
360 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
361 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
362 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
363 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
364 // CHECK1: omp.inner.for.inc:
365 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
366 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
367 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
368 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
369 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
370 // CHECK1: omp.inner.for.end:
371 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
372 // CHECK1: omp.loop.exit:
373 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
374 // CHECK1-NEXT: ret void
375 //
376 //
377 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
378 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
379 // CHECK1-NEXT: entry:
380 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
381 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
382 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
383 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
384 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
385 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
386 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
387 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
388 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
389 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
390 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
391 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
392 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
393 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
394 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
395 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
396 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
397 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
398 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
399 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
400 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
401 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
402 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
403 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
404 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
405 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
406 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
407 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
408 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
409 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
410 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
411 // CHECK1: cond.true:
412 // CHECK1-NEXT: br label [[COND_END:%.*]]
413 // CHECK1: cond.false:
414 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
415 // CHECK1-NEXT: br label [[COND_END]]
416 // CHECK1: cond.end:
417 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
418 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
419 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
420 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
421 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
422 // CHECK1: omp.inner.for.cond:
423 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
424 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
425 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
426 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
427 // CHECK1: omp.inner.for.body:
428 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
429 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
430 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
431 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
432 // CHECK1-NEXT: call void @_Z9gtid_testv()
433 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
434 // CHECK1: omp.body.continue:
435 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
436 // CHECK1: omp.inner.for.inc:
437 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
438 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
439 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
440 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
441 // CHECK1: omp.inner.for.end:
442 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
443 // CHECK1: omp.loop.exit:
444 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
445 // CHECK1-NEXT: ret void
446 //
447 //
448 // CHECK1-LABEL: define {{[^@]+}}@main
449 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
450 // CHECK1-NEXT: entry:
451 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
452 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
454 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
455 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
456 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
457 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
458 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
459 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
460 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
461 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
462 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
463 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
464 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
465 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
466 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
467 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
468 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
469 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
470 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
471 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
472 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
473 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
474 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
475 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
476 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
477 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
478 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
479 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
480 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
481 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
482 // CHECK1: omp_offload.failed:
483 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
484 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
485 // CHECK1: omp_offload.cont:
486 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83() #[[ATTR2]]
487 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* @Arg, align 4
488 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
489 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
490 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
491 // CHECK1-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
492 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
493 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
494 // CHECK1-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
495 // CHECK1-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
496 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
497 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
498 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP14]] to i1
499 // CHECK1-NEXT: br i1 [[TOBOOL3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
500 // CHECK1: omp_if.then:
501 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
502 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
503 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP16]], align 8
504 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
505 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*
506 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP18]], align 8
507 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
508 // CHECK1-NEXT: store i8* null, i8** [[TMP19]], align 8
509 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
510 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
511 // CHECK1-NEXT: [[TMP22:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
512 // CHECK1-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP22]] to i1
513 // CHECK1-NEXT: [[TMP23:%.*]] = select i1 [[TOBOOL4]], i32 0, i32 1
514 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
515 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
516 // CHECK1-NEXT: store i32 1, i32* [[TMP24]], align 4
517 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
518 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4
519 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
520 // CHECK1-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
521 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
522 // CHECK1-NEXT: store i8** [[TMP21]], i8*** [[TMP27]], align 8
523 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
524 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP28]], align 8
525 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
526 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP29]], align 8
527 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
528 // CHECK1-NEXT: store i8** null, i8*** [[TMP30]], align 8
529 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
530 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8
531 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
532 // CHECK1-NEXT: store i64 100, i64* [[TMP32]], align 8
533 // CHECK1-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP23]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
534 // CHECK1-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
535 // CHECK1-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
536 // CHECK1: omp_offload.failed7:
537 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90(i64 [[TMP13]]) #[[ATTR2]]
538 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
539 // CHECK1: omp_offload.cont8:
540 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
541 // CHECK1: omp_if.else:
542 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90(i64 [[TMP13]]) #[[ATTR2]]
543 // CHECK1-NEXT: br label [[OMP_IF_END]]
544 // CHECK1: omp_if.end:
545 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* @Arg, align 4
546 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP35]])
547 // CHECK1-NEXT: ret i32 [[CALL]]
548 //
549 //
550 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
551 // CHECK1-SAME: () #[[ATTR1]] {
552 // CHECK1-NEXT: entry:
553 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
554 // CHECK1-NEXT: ret void
555 //
556 //
557 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
558 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
559 // CHECK1-NEXT: entry:
560 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
561 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
562 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
563 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
564 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
565 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
566 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
567 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
568 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
569 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
570 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
571 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
572 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
573 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
574 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
575 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
576 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
577 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
578 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
579 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
580 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
581 // CHECK1: cond.true:
582 // CHECK1-NEXT: br label [[COND_END:%.*]]
583 // CHECK1: cond.false:
584 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
585 // CHECK1-NEXT: br label [[COND_END]]
586 // CHECK1: cond.end:
587 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
588 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
589 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
590 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
591 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
592 // CHECK1: omp.inner.for.cond:
593 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
594 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
595 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
596 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
597 // CHECK1: omp.inner.for.body:
598 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
599 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
600 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
601 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
602 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
603 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
604 // CHECK1: omp.inner.for.inc:
605 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
606 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
607 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
608 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
609 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
610 // CHECK1: omp.inner.for.end:
611 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
612 // CHECK1: omp.loop.exit:
613 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
614 // CHECK1-NEXT: ret void
615 //
616 //
617 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
618 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
619 // CHECK1-NEXT: entry:
620 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
621 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
622 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
623 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
624 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
625 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
626 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
627 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
628 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
629 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
630 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
631 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
632 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
633 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
634 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
635 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
636 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
637 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
638 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
639 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
640 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
641 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
642 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
643 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
644 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
645 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
646 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
647 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
648 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
649 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
650 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
651 // CHECK1: cond.true:
652 // CHECK1-NEXT: br label [[COND_END:%.*]]
653 // CHECK1: cond.false:
654 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
655 // CHECK1-NEXT: br label [[COND_END]]
656 // CHECK1: cond.end:
657 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
658 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
659 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
660 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
661 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
662 // CHECK1: omp.inner.for.cond:
663 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
664 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
665 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
666 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
667 // CHECK1: omp.inner.for.body:
668 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
669 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
670 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
671 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
672 // CHECK1-NEXT: call void @_Z3fn4v()
673 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
674 // CHECK1: omp.body.continue:
675 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
676 // CHECK1: omp.inner.for.inc:
677 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
678 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
679 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
680 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
681 // CHECK1: omp.inner.for.end:
682 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
683 // CHECK1: omp.loop.exit:
684 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
685 // CHECK1-NEXT: ret void
686 //
687 //
688 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l83
689 // CHECK1-SAME: () #[[ATTR1]] {
690 // CHECK1-NEXT: entry:
691 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
692 // CHECK1-NEXT: ret void
693 //
694 //
695 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
696 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
697 // CHECK1-NEXT: entry:
698 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
699 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
700 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
701 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
702 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
703 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
704 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
705 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
706 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
707 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
708 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
709 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
710 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
711 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
712 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
713 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
714 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
715 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
716 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
717 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
718 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
719 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
720 // CHECK1: cond.true:
721 // CHECK1-NEXT: br label [[COND_END:%.*]]
722 // CHECK1: cond.false:
723 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
724 // CHECK1-NEXT: br label [[COND_END]]
725 // CHECK1: cond.end:
726 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
727 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
728 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
729 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
730 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
731 // CHECK1: omp.inner.for.cond:
732 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
733 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
734 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
735 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
736 // CHECK1: omp.inner.for.body:
737 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
738 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
739 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
740 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
741 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
742 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
743 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
744 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
745 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
746 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
747 // CHECK1: omp.inner.for.inc:
748 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
749 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
750 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
751 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
752 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
753 // CHECK1: omp.inner.for.end:
754 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
755 // CHECK1: omp.loop.exit:
756 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
757 // CHECK1-NEXT: ret void
758 //
759 //
760 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
761 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
762 // CHECK1-NEXT: entry:
763 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
764 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
765 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
766 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
767 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
768 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
769 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
770 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
771 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
772 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
773 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
774 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
775 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
776 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
777 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
778 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
779 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
780 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
781 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
782 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
783 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
784 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
785 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
786 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
787 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
788 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
789 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
790 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
791 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
792 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
793 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
794 // CHECK1: cond.true:
795 // CHECK1-NEXT: br label [[COND_END:%.*]]
796 // CHECK1: cond.false:
797 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
798 // CHECK1-NEXT: br label [[COND_END]]
799 // CHECK1: cond.end:
800 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
801 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
802 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
803 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
804 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
805 // CHECK1: omp.inner.for.cond:
806 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
807 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
808 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
809 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
810 // CHECK1: omp.inner.for.body:
811 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
812 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
813 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
814 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
815 // CHECK1-NEXT: call void @_Z3fn5v()
816 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
817 // CHECK1: omp.body.continue:
818 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
819 // CHECK1: omp.inner.for.inc:
820 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
821 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
822 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
823 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
824 // CHECK1: omp.inner.for.end:
825 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
826 // CHECK1: omp.loop.exit:
827 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
828 // CHECK1-NEXT: ret void
829 //
830 //
831 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
832 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
833 // CHECK1-NEXT: entry:
834 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
835 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
836 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
837 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
838 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
839 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
840 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
841 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
842 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
843 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
844 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP1]])
845 // CHECK1-NEXT: ret void
846 //
847 //
848 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
849 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
850 // CHECK1-NEXT: entry:
851 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
852 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
853 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
854 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
855 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
856 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
857 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
858 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
859 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
860 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
861 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
862 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
863 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
864 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
865 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
866 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
867 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
868 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
869 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
870 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
871 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
872 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
873 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
874 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
875 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
876 // CHECK1: cond.true:
877 // CHECK1-NEXT: br label [[COND_END:%.*]]
878 // CHECK1: cond.false:
879 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
880 // CHECK1-NEXT: br label [[COND_END]]
881 // CHECK1: cond.end:
882 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
883 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
884 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
885 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
886 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
887 // CHECK1: omp.inner.for.cond:
888 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
889 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
890 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
891 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
892 // CHECK1: omp.inner.for.body:
893 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
894 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
895 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
896 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
897 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1
898 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
899 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
900 // CHECK1: omp_if.then:
901 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
902 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
903 // CHECK1: omp_if.else:
904 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
905 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
906 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
907 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
908 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
909 // CHECK1-NEXT: br label [[OMP_IF_END]]
910 // CHECK1: omp_if.end:
911 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
912 // CHECK1: omp.inner.for.inc:
913 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
914 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
915 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
916 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
917 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
918 // CHECK1: omp.inner.for.end:
919 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
920 // CHECK1: omp.loop.exit:
921 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
922 // CHECK1-NEXT: ret void
923 //
924 //
925 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
926 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
927 // CHECK1-NEXT: entry:
928 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
929 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
930 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
931 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
932 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
933 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
934 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
935 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
936 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
937 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
938 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
939 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
940 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
941 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
942 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
943 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
944 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
945 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
946 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
947 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
948 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
949 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
950 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
951 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
952 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
953 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
954 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
955 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
956 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
957 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
958 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
959 // CHECK1: cond.true:
960 // CHECK1-NEXT: br label [[COND_END:%.*]]
961 // CHECK1: cond.false:
962 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
963 // CHECK1-NEXT: br label [[COND_END]]
964 // CHECK1: cond.end:
965 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
966 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
967 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
968 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
969 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
970 // CHECK1: omp.inner.for.cond:
971 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
972 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
973 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
974 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
975 // CHECK1: omp.inner.for.body:
976 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
977 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
978 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
979 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
980 // CHECK1-NEXT: call void @_Z3fn6v()
981 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
982 // CHECK1: omp.body.continue:
983 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
984 // CHECK1: omp.inner.for.inc:
985 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
986 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
987 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
988 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
989 // CHECK1: omp.inner.for.end:
990 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
991 // CHECK1: omp.loop.exit:
992 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
993 // CHECK1-NEXT: ret void
994 //
995 //
996 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
997 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
998 // CHECK1-NEXT: entry:
999 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
1000 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1001 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1002 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1003 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1004 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1005 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1006 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1007 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
1008 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1009 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1010 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
1011 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1012 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
1013 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1014 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
1015 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1016 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
1017 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1018 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
1019 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1020 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
1021 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1022 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
1023 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1024 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
1025 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1026 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
1027 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1028 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1029 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1030 // CHECK1: omp_offload.failed:
1031 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60() #[[ATTR2]]
1032 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1033 // CHECK1: omp_offload.cont:
1034 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64() #[[ATTR2]]
1035 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
1036 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP11]], 0
1037 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1038 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1039 // CHECK1-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1040 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP12]] to i1
1041 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1042 // CHECK1-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TOBOOL1]] to i8
1043 // CHECK1-NEXT: store i8 [[FROMBOOL2]], i8* [[CONV]], align 1
1044 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1045 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1046 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1047 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP15]], align 8
1048 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1049 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
1050 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[TMP17]], align 8
1051 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1052 // CHECK1-NEXT: store i8* null, i8** [[TMP18]], align 8
1053 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1054 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1055 // CHECK1-NEXT: [[TMP21:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1056 // CHECK1-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP21]] to i1
1057 // CHECK1-NEXT: [[TMP22:%.*]] = select i1 [[TOBOOL3]], i32 0, i32 1
1058 // CHECK1-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1059 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
1060 // CHECK1-NEXT: store i32 1, i32* [[TMP23]], align 4
1061 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
1062 // CHECK1-NEXT: store i32 1, i32* [[TMP24]], align 4
1063 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
1064 // CHECK1-NEXT: store i8** [[TMP19]], i8*** [[TMP25]], align 8
1065 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
1066 // CHECK1-NEXT: store i8** [[TMP20]], i8*** [[TMP26]], align 8
1067 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
1068 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP27]], align 8
1069 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
1070 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP28]], align 8
1071 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
1072 // CHECK1-NEXT: store i8** null, i8*** [[TMP29]], align 8
1073 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
1074 // CHECK1-NEXT: store i8** null, i8*** [[TMP30]], align 8
1075 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
1076 // CHECK1-NEXT: store i64 100, i64* [[TMP31]], align 8
1077 // CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP22]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
1078 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
1079 // CHECK1-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1080 // CHECK1: omp_offload.failed6:
1081 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68(i64 [[TMP13]]) #[[ATTR2]]
1082 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT7]]
1083 // CHECK1: omp_offload.cont7:
1084 // CHECK1-NEXT: ret i32 0
1085 //
1086 //
1087 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l60
1088 // CHECK1-SAME: () #[[ATTR1]] {
1089 // CHECK1-NEXT: entry:
1090 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1091 // CHECK1-NEXT: ret void
1092 //
1093 //
1094 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1095 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1096 // CHECK1-NEXT: entry:
1097 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1098 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1099 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1100 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1101 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1102 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1103 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1104 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1105 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1106 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1107 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1108 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1109 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1110 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1111 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1112 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1113 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1114 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1115 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1116 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1117 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1118 // CHECK1: cond.true:
1119 // CHECK1-NEXT: br label [[COND_END:%.*]]
1120 // CHECK1: cond.false:
1121 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1122 // CHECK1-NEXT: br label [[COND_END]]
1123 // CHECK1: cond.end:
1124 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1125 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1126 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1127 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1128 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1129 // CHECK1: omp.inner.for.cond:
1130 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1131 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1132 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1133 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1134 // CHECK1: omp.inner.for.body:
1135 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1136 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1137 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1138 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1139 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1140 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1141 // CHECK1: omp.inner.for.inc:
1142 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1143 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1144 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1145 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1146 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1147 // CHECK1: omp.inner.for.end:
1148 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1149 // CHECK1: omp.loop.exit:
1150 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1151 // CHECK1-NEXT: ret void
1152 //
1153 //
1154 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1155 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1156 // CHECK1-NEXT: entry:
1157 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1158 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1159 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1160 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1161 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1162 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1163 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1164 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1165 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1166 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1167 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1168 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1169 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1170 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1171 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1172 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1173 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1174 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1175 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1176 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1177 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1178 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1179 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1180 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1181 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1182 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1183 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1184 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1185 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1186 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1187 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1188 // CHECK1: cond.true:
1189 // CHECK1-NEXT: br label [[COND_END:%.*]]
1190 // CHECK1: cond.false:
1191 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1192 // CHECK1-NEXT: br label [[COND_END]]
1193 // CHECK1: cond.end:
1194 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1195 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1196 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1197 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1198 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1199 // CHECK1: omp.inner.for.cond:
1200 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1201 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1202 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1203 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1204 // CHECK1: omp.inner.for.body:
1205 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1206 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1207 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1208 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1209 // CHECK1-NEXT: call void @_Z3fn1v()
1210 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1211 // CHECK1: omp.body.continue:
1212 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1213 // CHECK1: omp.inner.for.inc:
1214 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1215 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1216 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1217 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1218 // CHECK1: omp.inner.for.end:
1219 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1220 // CHECK1: omp.loop.exit:
1221 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1222 // CHECK1-NEXT: ret void
1223 //
1224 //
1225 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l64
1226 // CHECK1-SAME: () #[[ATTR1]] {
1227 // CHECK1-NEXT: entry:
1228 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
1229 // CHECK1-NEXT: ret void
1230 //
1231 //
1232 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
1233 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1234 // CHECK1-NEXT: entry:
1235 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1236 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1237 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1238 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1239 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1240 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1241 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1242 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1243 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1244 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1245 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1246 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1247 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1248 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1249 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1250 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1251 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1252 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1253 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1254 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1255 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1256 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1257 // CHECK1: cond.true:
1258 // CHECK1-NEXT: br label [[COND_END:%.*]]
1259 // CHECK1: cond.false:
1260 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1261 // CHECK1-NEXT: br label [[COND_END]]
1262 // CHECK1: cond.end:
1263 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1264 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1265 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1266 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1267 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1268 // CHECK1: omp.inner.for.cond:
1269 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1270 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1271 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1272 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1273 // CHECK1: omp.inner.for.body:
1274 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1275 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1276 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1277 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1278 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1279 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1280 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1281 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1282 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1283 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1284 // CHECK1: omp.inner.for.inc:
1285 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1286 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1287 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1288 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1289 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1290 // CHECK1: omp.inner.for.end:
1291 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1292 // CHECK1: omp.loop.exit:
1293 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1294 // CHECK1-NEXT: ret void
1295 //
1296 //
1297 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1298 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1299 // CHECK1-NEXT: entry:
1300 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1301 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1302 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1303 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1304 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1305 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1306 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1307 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1308 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1309 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1310 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1311 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1312 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1313 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1314 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1315 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1316 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1317 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1318 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1319 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1320 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1321 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1322 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1323 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1324 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1325 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1326 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1327 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1328 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1329 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1330 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1331 // CHECK1: cond.true:
1332 // CHECK1-NEXT: br label [[COND_END:%.*]]
1333 // CHECK1: cond.false:
1334 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1335 // CHECK1-NEXT: br label [[COND_END]]
1336 // CHECK1: cond.end:
1337 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1338 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1339 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1340 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1341 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1342 // CHECK1: omp.inner.for.cond:
1343 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1344 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1345 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1346 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1347 // CHECK1: omp.inner.for.body:
1348 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1349 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1350 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1351 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1352 // CHECK1-NEXT: call void @_Z3fn2v()
1353 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1354 // CHECK1: omp.body.continue:
1355 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1356 // CHECK1: omp.inner.for.inc:
1357 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1358 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1359 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1360 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1361 // CHECK1: omp.inner.for.end:
1362 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1363 // CHECK1: omp.loop.exit:
1364 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1365 // CHECK1-NEXT: ret void
1366 //
1367 //
1368 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l68
1369 // CHECK1-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1370 // CHECK1-NEXT: entry:
1371 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1372 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1373 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1374 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1375 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, i8* [[CONV]], align 1
1376 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1
1377 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1378 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1379 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1
1380 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1381 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP1]])
1382 // CHECK1-NEXT: ret void
1383 //
1384 //
1385 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1386 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1387 // CHECK1-NEXT: entry:
1388 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1389 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1390 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1391 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1392 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1393 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1394 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1395 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1396 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1397 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1398 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1399 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1400 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1401 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1402 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1403 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1404 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1405 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1406 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1407 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1408 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1409 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1410 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1411 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1412 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1413 // CHECK1: cond.true:
1414 // CHECK1-NEXT: br label [[COND_END:%.*]]
1415 // CHECK1: cond.false:
1416 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1417 // CHECK1-NEXT: br label [[COND_END]]
1418 // CHECK1: cond.end:
1419 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1420 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1421 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1422 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1423 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1424 // CHECK1: omp.inner.for.cond:
1425 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1426 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1427 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1428 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1429 // CHECK1: omp.inner.for.body:
1430 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1431 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1432 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1433 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1434 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1
1435 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
1436 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1437 // CHECK1: omp_if.then:
1438 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1439 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1440 // CHECK1: omp_if.else:
1441 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1442 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1443 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
1444 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
1445 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
1446 // CHECK1-NEXT: br label [[OMP_IF_END]]
1447 // CHECK1: omp_if.end:
1448 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1449 // CHECK1: omp.inner.for.inc:
1450 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1451 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1452 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1453 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1454 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1455 // CHECK1: omp.inner.for.end:
1456 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1457 // CHECK1: omp.loop.exit:
1458 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1459 // CHECK1-NEXT: ret void
1460 //
1461 //
1462 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1463 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1464 // CHECK1-NEXT: entry:
1465 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1466 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1467 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1468 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1469 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1470 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1471 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1472 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1473 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1474 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1475 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1476 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1477 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1478 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1479 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1480 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1481 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1482 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1483 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1484 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1485 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1486 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1487 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1488 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1489 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1490 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1491 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1492 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1493 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1494 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1495 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1496 // CHECK1: cond.true:
1497 // CHECK1-NEXT: br label [[COND_END:%.*]]
1498 // CHECK1: cond.false:
1499 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1500 // CHECK1-NEXT: br label [[COND_END]]
1501 // CHECK1: cond.end:
1502 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1503 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1504 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1505 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1507 // CHECK1: omp.inner.for.cond:
1508 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1509 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1510 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1511 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1512 // CHECK1: omp.inner.for.body:
1513 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1514 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1515 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1516 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1517 // CHECK1-NEXT: call void @_Z3fn3v()
1518 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1519 // CHECK1: omp.body.continue:
1520 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1521 // CHECK1: omp.inner.for.inc:
1522 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1523 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1524 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1525 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1526 // CHECK1: omp.inner.for.end:
1527 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1528 // CHECK1: omp.loop.exit:
1529 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1530 // CHECK1-NEXT: ret void
1531 //
1532 //
1533 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1534 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
1535 // CHECK1-NEXT: entry:
1536 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1537 // CHECK1-NEXT: ret void
1538 //
1539