1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X][Y];
25
fooSS26 int foo(void) {
27
28 #pragma omp target teams distribute parallel for collapse(2)
29 for(int i = 0; i < X; i++) {
30 for(int j = 0; j < Y; j++) {
31 a[i][j] = (T)0;
32 }
33 }
34
35 // discard loop variables not needed here
36
37
38 return a[0][0];
39 }
40 };
41
teams_template_struct(void)42 int teams_template_struct(void) {
43 SS<int, 123, 456> V;
44 return V.foo();
45
46 }
47 #endif // CK1
48
49 // Test host codegen.
50 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
51 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
52 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
53 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
56
57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
63 #ifdef CK2
64
65 template <typename T, int n, int m>
tmain(T argc)66 int tmain(T argc) {
67 T a[n][m];
68 #pragma omp target teams distribute parallel for collapse(2)
69 for(int i = 0; i < n; i++) {
70 for(int j = 0; j < m; j++) {
71 a[i][j] = (T)0;
72 }
73 }
74 return 0;
75 }
76
main(int argc,char ** argv)77 int main (int argc, char **argv) {
78 int n = 100;
79 int m = 2;
80 int a[n][m];
81 #pragma omp target teams distribute parallel for collapse(2)
82 for(int i = 0; i < n; i++) {
83 for(int j = 0; j < m; j++) {
84 a[i][j] = 0;
85 }
86 }
87 return tmain<int, 10, 2>(argc);
88 }
89
90
91
92
93
94
95
96
97 // discard loop variables not needed here
98
99
100 #endif // CK2
101 #endif // #ifndef HEADER
102 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
103 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
104 // CHECK1-NEXT: entry:
105 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
106 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
107 // CHECK1-NEXT: ret i32 [[CALL]]
108 //
109 //
110 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
111 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
112 // CHECK1-NEXT: entry:
113 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
114 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
115 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
116 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
117 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
118 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
119 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
120 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
121 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
122 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
123 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
124 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
125 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
126 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
127 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
128 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
129 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
130 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
131 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
132 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
133 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
134 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
135 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
136 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
137 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
138 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
139 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
140 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
141 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
142 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
143 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
144 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
145 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
146 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
147 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
148 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
149 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
150 // CHECK1-NEXT: store i64 56088, i64* [[TMP15]], align 8
151 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
152 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
153 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
154 // CHECK1: omp_offload.failed:
155 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
156 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
157 // CHECK1: omp_offload.cont:
158 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
159 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
160 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
161 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
162 // CHECK1-NEXT: ret i32 [[TMP18]]
163 //
164 //
165 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
166 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
167 // CHECK1-NEXT: entry:
168 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
169 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
170 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
171 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
172 // CHECK1-NEXT: ret void
173 //
174 //
175 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
176 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
177 // CHECK1-NEXT: entry:
178 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
179 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
180 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
181 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
182 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
183 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
184 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
185 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
186 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
187 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
188 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
189 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
191 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
192 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
193 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
194 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
195 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
196 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
197 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
198 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
199 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
200 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
201 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
202 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
203 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
204 // CHECK1: cond.true:
205 // CHECK1-NEXT: br label [[COND_END:%.*]]
206 // CHECK1: cond.false:
207 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
208 // CHECK1-NEXT: br label [[COND_END]]
209 // CHECK1: cond.end:
210 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
211 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
212 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
213 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
214 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
215 // CHECK1: omp.inner.for.cond:
216 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
217 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
218 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
219 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
220 // CHECK1: omp.inner.for.body:
221 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
222 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
223 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
224 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
225 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
226 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
227 // CHECK1: omp.inner.for.inc:
228 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
229 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
230 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
231 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
232 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
233 // CHECK1: omp.inner.for.end:
234 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
235 // CHECK1: omp.loop.exit:
236 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
237 // CHECK1-NEXT: ret void
238 //
239 //
240 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
241 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
242 // CHECK1-NEXT: entry:
243 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
244 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
245 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
246 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
247 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
248 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
249 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
250 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
251 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
253 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
254 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
255 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
256 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
258 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
259 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
260 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
261 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
262 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
263 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
264 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
265 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
266 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
267 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
268 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
269 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
270 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
271 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
272 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
273 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
274 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
275 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
276 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
277 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
278 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
279 // CHECK1: cond.true:
280 // CHECK1-NEXT: br label [[COND_END:%.*]]
281 // CHECK1: cond.false:
282 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
283 // CHECK1-NEXT: br label [[COND_END]]
284 // CHECK1: cond.end:
285 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
286 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
287 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
288 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
289 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
290 // CHECK1: omp.inner.for.cond:
291 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
292 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
293 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
294 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
295 // CHECK1: omp.inner.for.body:
296 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
297 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
298 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
299 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
300 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
301 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
302 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
303 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456
304 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456
305 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
306 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
307 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
308 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
309 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
310 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
311 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
312 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
313 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
314 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
315 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
316 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
317 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
318 // CHECK1: omp.body.continue:
319 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
320 // CHECK1: omp.inner.for.inc:
321 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
322 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
323 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
324 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
325 // CHECK1: omp.inner.for.end:
326 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
327 // CHECK1: omp.loop.exit:
328 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
329 // CHECK1-NEXT: ret void
330 //
331 //
332 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
333 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
334 // CHECK1-NEXT: entry:
335 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
336 // CHECK1-NEXT: ret void
337 //
338 //
339 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
340 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
341 // CHECK3-NEXT: entry:
342 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
343 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
344 // CHECK3-NEXT: ret i32 [[CALL]]
345 //
346 //
347 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
348 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
349 // CHECK3-NEXT: entry:
350 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
351 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
352 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
353 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
354 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
355 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
356 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
357 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
358 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
359 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
360 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
361 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
362 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
363 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
364 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
365 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
366 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
367 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
368 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
369 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
370 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
371 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
372 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
373 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
374 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
375 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
376 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
377 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
378 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
379 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
380 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
381 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
382 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
383 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
384 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
385 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
386 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
387 // CHECK3-NEXT: store i64 56088, i64* [[TMP15]], align 8
388 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
389 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
390 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
391 // CHECK3: omp_offload.failed:
392 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
393 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
394 // CHECK3: omp_offload.cont:
395 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
396 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
397 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
398 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
399 // CHECK3-NEXT: ret i32 [[TMP18]]
400 //
401 //
402 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
403 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
404 // CHECK3-NEXT: entry:
405 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
406 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
407 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
408 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
409 // CHECK3-NEXT: ret void
410 //
411 //
412 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
413 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
414 // CHECK3-NEXT: entry:
415 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
416 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
417 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
418 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
419 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
420 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
421 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
422 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
423 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
424 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
425 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
426 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
427 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
428 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
429 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
430 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
431 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
432 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
433 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
434 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
435 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
436 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
437 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
438 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
439 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
440 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
441 // CHECK3: cond.true:
442 // CHECK3-NEXT: br label [[COND_END:%.*]]
443 // CHECK3: cond.false:
444 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
445 // CHECK3-NEXT: br label [[COND_END]]
446 // CHECK3: cond.end:
447 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
448 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
449 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
450 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
451 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
452 // CHECK3: omp.inner.for.cond:
453 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
454 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
455 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
456 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
457 // CHECK3: omp.inner.for.body:
458 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
459 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
460 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
461 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
462 // CHECK3: omp.inner.for.inc:
463 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
464 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
465 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
466 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
467 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
468 // CHECK3: omp.inner.for.end:
469 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
470 // CHECK3: omp.loop.exit:
471 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
472 // CHECK3-NEXT: ret void
473 //
474 //
475 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
476 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
477 // CHECK3-NEXT: entry:
478 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
479 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
480 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
481 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
482 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
483 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
484 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
485 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
486 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
487 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
488 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
489 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
490 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
491 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
492 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
493 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
494 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
495 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
496 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
497 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
498 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
499 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
500 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
501 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
502 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
503 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
504 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
505 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
506 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
507 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
508 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
509 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
510 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
511 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
512 // CHECK3: cond.true:
513 // CHECK3-NEXT: br label [[COND_END:%.*]]
514 // CHECK3: cond.false:
515 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
516 // CHECK3-NEXT: br label [[COND_END]]
517 // CHECK3: cond.end:
518 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
519 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
520 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
521 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
522 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
523 // CHECK3: omp.inner.for.cond:
524 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
525 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
526 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
527 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
528 // CHECK3: omp.inner.for.body:
529 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
530 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
531 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
532 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
533 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
534 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
535 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
536 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456
537 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
538 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
539 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
540 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
541 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
542 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
543 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
544 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]]
545 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
546 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
547 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
548 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
549 // CHECK3: omp.body.continue:
550 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
551 // CHECK3: omp.inner.for.inc:
552 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
553 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
554 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
555 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
556 // CHECK3: omp.inner.for.end:
557 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
558 // CHECK3: omp.loop.exit:
559 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
560 // CHECK3-NEXT: ret void
561 //
562 //
563 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
564 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
565 // CHECK3-NEXT: entry:
566 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
567 // CHECK3-NEXT: ret void
568 //
569 //
570 // CHECK9-LABEL: define {{[^@]+}}@main
571 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
572 // CHECK9-NEXT: entry:
573 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
574 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
575 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
576 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
577 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4
578 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
579 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
580 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
581 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
582 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
583 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
584 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
585 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
586 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
587 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
588 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
589 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
590 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
591 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
592 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
593 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
594 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
595 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
596 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4
597 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
598 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
599 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
600 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
601 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
602 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
603 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
604 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
605 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
606 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
607 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
608 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
609 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
610 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
611 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
612 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
613 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
614 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
615 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
616 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
617 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
618 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false)
619 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
620 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
621 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8
622 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
623 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
624 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8
625 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
626 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
627 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
628 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
629 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
630 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
631 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
632 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
633 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
634 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
635 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
636 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64*
637 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8
638 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
639 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
640 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8
641 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
642 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8
643 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
644 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
645 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8
646 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
647 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
648 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
649 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
650 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8
651 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
652 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32**
653 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8
654 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
655 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
656 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8
657 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
658 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8
659 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
660 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8
661 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
662 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
663 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
664 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4
665 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4
666 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
667 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4
668 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
669 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0
670 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
671 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
672 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
673 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0
674 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
675 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
676 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
677 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
678 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
679 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
680 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1
681 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
682 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
683 // CHECK9-NEXT: store i32 1, i32* [[TMP47]], align 4
684 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
685 // CHECK9-NEXT: store i32 5, i32* [[TMP48]], align 4
686 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
687 // CHECK9-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 8
688 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
689 // CHECK9-NEXT: store i8** [[TMP40]], i8*** [[TMP50]], align 8
690 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
691 // CHECK9-NEXT: store i64* [[TMP41]], i64** [[TMP51]], align 8
692 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
693 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP52]], align 8
694 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
695 // CHECK9-NEXT: store i8** null, i8*** [[TMP53]], align 8
696 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
697 // CHECK9-NEXT: store i8** null, i8*** [[TMP54]], align 8
698 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
699 // CHECK9-NEXT: store i64 [[ADD]], i64* [[TMP55]], align 8
700 // CHECK9-NEXT: [[TMP56:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
701 // CHECK9-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0
702 // CHECK9-NEXT: br i1 [[TMP57]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
703 // CHECK9: omp_offload.failed:
704 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
705 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
706 // CHECK9: omp_offload.cont:
707 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
708 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP58]])
709 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
710 // CHECK9-NEXT: [[TMP59:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
711 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP59]])
712 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[RETVAL]], align 4
713 // CHECK9-NEXT: ret i32 [[TMP60]]
714 //
715 //
716 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
717 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
718 // CHECK9-NEXT: entry:
719 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
720 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
721 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
722 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
723 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
724 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
725 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
726 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
727 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
728 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
729 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
730 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
731 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
732 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
733 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
734 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
735 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
736 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
737 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
738 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
739 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
740 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 4
741 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
742 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
743 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
744 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
745 // CHECK9-NEXT: ret void
746 //
747 //
748 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
749 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
750 // CHECK9-NEXT: entry:
751 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
752 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
753 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
754 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
755 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
756 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
757 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
758 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
759 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
760 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
761 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
762 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
763 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
764 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
765 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
766 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
767 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
768 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
769 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
770 // CHECK9-NEXT: [[I13:%.*]] = alloca i32, align 4
771 // CHECK9-NEXT: [[J14:%.*]] = alloca i32, align 4
772 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
773 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
774 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
775 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
776 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
777 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
778 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
779 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
780 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
781 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
782 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
783 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
784 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
785 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
786 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
787 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
788 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
789 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
790 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
791 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
792 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
793 // CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
794 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
795 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
796 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
797 // CHECK9-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
798 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
799 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
800 // CHECK9-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
801 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
802 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
803 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
804 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
805 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
806 // CHECK9: land.lhs.true:
807 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
808 // CHECK9-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
809 // CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
810 // CHECK9: omp.precond.then:
811 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
812 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
813 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
814 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
815 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
816 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
817 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
818 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
819 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
820 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
821 // CHECK9-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
822 // CHECK9-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
823 // CHECK9: cond.true:
824 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
825 // CHECK9-NEXT: br label [[COND_END:%.*]]
826 // CHECK9: cond.false:
827 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
828 // CHECK9-NEXT: br label [[COND_END]]
829 // CHECK9: cond.end:
830 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
831 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
832 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
833 // CHECK9-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
834 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
835 // CHECK9: omp.inner.for.cond:
836 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
837 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
838 // CHECK9-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
839 // CHECK9-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
840 // CHECK9: omp.inner.for.body:
841 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
842 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
843 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4
844 // CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
845 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4
846 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
847 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 4
848 // CHECK9-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
849 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4
850 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8
851 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP19]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP24]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
852 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
853 // CHECK9: omp.inner.for.inc:
854 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
855 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
856 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
857 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
858 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
859 // CHECK9: omp.inner.for.end:
860 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
861 // CHECK9: omp.loop.exit:
862 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
863 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
864 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
865 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
866 // CHECK9: omp.precond.end:
867 // CHECK9-NEXT: ret void
868 //
869 //
870 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
871 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
872 // CHECK9-NEXT: entry:
873 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
874 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
875 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
876 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
877 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
878 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
879 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
880 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
881 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
882 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
883 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
884 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
885 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
886 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
887 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
888 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
889 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
890 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
891 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
892 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
893 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
894 // CHECK9-NEXT: [[I13:%.*]] = alloca i32, align 4
895 // CHECK9-NEXT: [[J14:%.*]] = alloca i32, align 4
896 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
897 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
898 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
899 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
900 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
901 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
902 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
903 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
904 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
905 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
906 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
907 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
908 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
909 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
910 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
911 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
912 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 4
913 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
914 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
915 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
916 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
917 // CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
918 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
919 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
920 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
921 // CHECK9-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
922 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
923 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
924 // CHECK9-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
925 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
926 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
927 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
928 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
929 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
930 // CHECK9: land.lhs.true:
931 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
932 // CHECK9-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
933 // CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
934 // CHECK9: omp.precond.then:
935 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
936 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
937 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
938 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
939 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
940 // CHECK9-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_LB]], align 8
941 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
942 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
943 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
944 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
945 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
946 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
947 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
948 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
949 // CHECK9-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
950 // CHECK9-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
951 // CHECK9: cond.true:
952 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
953 // CHECK9-NEXT: br label [[COND_END:%.*]]
954 // CHECK9: cond.false:
955 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
956 // CHECK9-NEXT: br label [[COND_END]]
957 // CHECK9: cond.end:
958 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
959 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
960 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
961 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
962 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
963 // CHECK9: omp.inner.for.cond:
964 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
965 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
966 // CHECK9-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
967 // CHECK9-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
968 // CHECK9: omp.inner.for.body:
969 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
970 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
971 // CHECK9-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
972 // CHECK9-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
973 // CHECK9-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
974 // CHECK9-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
975 // CHECK9-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
976 // CHECK9-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
977 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
978 // CHECK9-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
979 // CHECK9-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
980 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
981 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
982 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
983 // CHECK9-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
984 // CHECK9-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
985 // CHECK9-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
986 // CHECK9-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
987 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
988 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
989 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
990 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
991 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
992 // CHECK9-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
993 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
994 // CHECK9-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
995 // CHECK9-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
996 // CHECK9-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
997 // CHECK9-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
998 // CHECK9-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
999 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4
1000 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64
1001 // CHECK9-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]]
1002 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP28]]
1003 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4
1004 // CHECK9-NEXT: [[IDXPROM38:%.*]] = sext i32 [[TMP29]] to i64
1005 // CHECK9-NEXT: [[ARRAYIDX39:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM38]]
1006 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX39]], align 4
1007 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1008 // CHECK9: omp.body.continue:
1009 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1010 // CHECK9: omp.inner.for.inc:
1011 // CHECK9-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1012 // CHECK9-NEXT: [[ADD40:%.*]] = add nsw i64 [[TMP30]], 1
1013 // CHECK9-NEXT: store i64 [[ADD40]], i64* [[DOTOMP_IV]], align 8
1014 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1015 // CHECK9: omp.inner.for.end:
1016 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1017 // CHECK9: omp.loop.exit:
1018 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1019 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1020 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
1021 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1022 // CHECK9: omp.precond.end:
1023 // CHECK9-NEXT: ret void
1024 //
1025 //
1026 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1027 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1028 // CHECK9-NEXT: entry:
1029 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1030 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1031 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1032 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1033 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1034 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1035 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1036 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1037 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1038 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1039 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
1040 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1041 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1042 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
1043 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1044 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1045 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1046 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1047 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1048 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1049 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4
1050 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1051 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
1052 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1053 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
1054 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1055 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
1056 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1057 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 8
1058 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1059 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 8
1060 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1061 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
1062 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1063 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
1064 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1065 // CHECK9-NEXT: store i64 20, i64* [[TMP15]], align 8
1066 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1067 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1068 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1069 // CHECK9: omp_offload.failed:
1070 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1071 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1072 // CHECK9: omp_offload.cont:
1073 // CHECK9-NEXT: ret i32 0
1074 //
1075 //
1076 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
1077 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1078 // CHECK9-NEXT: entry:
1079 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1080 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1081 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1082 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1083 // CHECK9-NEXT: ret void
1084 //
1085 //
1086 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
1087 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1088 // CHECK9-NEXT: entry:
1089 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1090 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1091 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1092 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1093 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1094 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1095 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1096 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1097 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1098 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1099 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1100 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1101 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1102 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1103 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1104 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1105 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1106 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
1107 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1108 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1109 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1110 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1111 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1112 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1113 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1114 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1115 // CHECK9: cond.true:
1116 // CHECK9-NEXT: br label [[COND_END:%.*]]
1117 // CHECK9: cond.false:
1118 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1119 // CHECK9-NEXT: br label [[COND_END]]
1120 // CHECK9: cond.end:
1121 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1122 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1123 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1124 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1125 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1126 // CHECK9: omp.inner.for.cond:
1127 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1128 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1129 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1130 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1131 // CHECK9: omp.inner.for.body:
1132 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1133 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1134 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1135 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1136 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]])
1137 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1138 // CHECK9: omp.inner.for.inc:
1139 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1140 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1141 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1142 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1143 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1144 // CHECK9: omp.inner.for.end:
1145 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1146 // CHECK9: omp.loop.exit:
1147 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1148 // CHECK9-NEXT: ret void
1149 //
1150 //
1151 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
1152 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1153 // CHECK9-NEXT: entry:
1154 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1155 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1156 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1157 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1158 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1159 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1160 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1161 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1162 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1163 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1164 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1165 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1166 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1167 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1168 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1169 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1170 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1171 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1172 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1173 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1174 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1175 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
1176 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1177 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1178 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1179 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
1180 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1181 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1182 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1183 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1184 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1185 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1186 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1187 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1188 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
1189 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1190 // CHECK9: cond.true:
1191 // CHECK9-NEXT: br label [[COND_END:%.*]]
1192 // CHECK9: cond.false:
1193 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1194 // CHECK9-NEXT: br label [[COND_END]]
1195 // CHECK9: cond.end:
1196 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1197 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1198 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1199 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1200 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1201 // CHECK9: omp.inner.for.cond:
1202 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1203 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1204 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1205 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1206 // CHECK9: omp.inner.for.body:
1207 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1208 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
1209 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1210 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1211 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1212 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1213 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1214 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2
1215 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2
1216 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
1217 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
1218 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
1219 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
1220 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1221 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1222 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1223 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
1224 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
1225 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
1226 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
1227 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1228 // CHECK9: omp.body.continue:
1229 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1230 // CHECK9: omp.inner.for.inc:
1231 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1232 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
1233 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1234 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1235 // CHECK9: omp.inner.for.end:
1236 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1237 // CHECK9: omp.loop.exit:
1238 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1239 // CHECK9-NEXT: ret void
1240 //
1241 //
1242 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1243 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1244 // CHECK9-NEXT: entry:
1245 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1246 // CHECK9-NEXT: ret void
1247 //
1248 //
1249 // CHECK11-LABEL: define {{[^@]+}}@main
1250 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1251 // CHECK11-NEXT: entry:
1252 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1253 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1254 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
1255 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
1256 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4
1257 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
1258 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
1259 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
1260 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1261 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1262 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1263 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1264 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1265 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
1266 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1267 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1268 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1269 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1270 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
1271 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1272 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1273 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
1274 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
1275 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4
1276 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1277 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
1278 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
1279 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
1280 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
1281 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
1282 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
1283 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
1284 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
1285 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
1286 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
1287 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
1288 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
1289 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
1290 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
1291 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
1292 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
1293 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
1294 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false)
1295 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1296 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1297 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4
1298 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1299 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1300 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4
1301 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1302 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
1303 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1304 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
1305 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
1306 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1307 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
1308 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
1309 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1310 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
1311 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1312 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
1313 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4
1314 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1315 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
1316 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4
1317 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1318 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
1319 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1320 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32*
1321 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4
1322 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1323 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1324 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
1325 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1326 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4
1327 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1328 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32**
1329 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4
1330 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1331 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32**
1332 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4
1333 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
1334 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4
1335 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1336 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4
1337 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1338 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1339 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1340 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
1341 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4
1342 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4
1343 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1344 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1345 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0
1346 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1347 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1348 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1349 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0
1350 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
1351 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
1352 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
1353 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
1354 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
1355 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1356 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1
1357 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1358 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1359 // CHECK11-NEXT: store i32 1, i32* [[TMP46]], align 4
1360 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1361 // CHECK11-NEXT: store i32 5, i32* [[TMP47]], align 4
1362 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1363 // CHECK11-NEXT: store i8** [[TMP38]], i8*** [[TMP48]], align 4
1364 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1365 // CHECK11-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 4
1366 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1367 // CHECK11-NEXT: store i64* [[TMP40]], i64** [[TMP50]], align 4
1368 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1369 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP51]], align 4
1370 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1371 // CHECK11-NEXT: store i8** null, i8*** [[TMP52]], align 4
1372 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1373 // CHECK11-NEXT: store i8** null, i8*** [[TMP53]], align 4
1374 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1375 // CHECK11-NEXT: store i64 [[ADD]], i64* [[TMP54]], align 8
1376 // CHECK11-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1377 // CHECK11-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0
1378 // CHECK11-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1379 // CHECK11: omp_offload.failed:
1380 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1381 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1382 // CHECK11: omp_offload.cont:
1383 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1384 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP57]])
1385 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1386 // CHECK11-NEXT: [[TMP58:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
1387 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP58]])
1388 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, i32* [[RETVAL]], align 4
1389 // CHECK11-NEXT: ret i32 [[TMP59]]
1390 //
1391 //
1392 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
1393 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1394 // CHECK11-NEXT: entry:
1395 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1396 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1397 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1398 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1399 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1400 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1401 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1402 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1403 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1404 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1405 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1406 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1407 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1408 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1409 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1410 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
1411 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
1412 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
1413 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[M_ADDR]], align 4
1414 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[M_CASTED]], align 4
1415 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M_CASTED]], align 4
1416 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
1417 // CHECK11-NEXT: ret void
1418 //
1419 //
1420 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
1421 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1422 // CHECK11-NEXT: entry:
1423 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1424 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1425 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1426 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1427 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1428 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1429 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1430 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1431 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1432 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1433 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1434 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1435 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1436 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1437 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1438 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
1439 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
1440 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1441 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1442 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4
1443 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4
1444 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1445 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1446 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1447 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1448 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1449 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1450 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1451 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1452 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1453 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1454 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1455 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1456 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
1457 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1458 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
1459 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1460 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1461 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1462 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1463 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1464 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1465 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
1466 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1467 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1468 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1469 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1470 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1471 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
1472 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
1473 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1474 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1475 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1476 // CHECK11: land.lhs.true:
1477 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1478 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
1479 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1480 // CHECK11: omp.precond.then:
1481 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
1482 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1483 // CHECK11-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
1484 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1485 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1486 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1487 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
1488 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1489 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1490 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1491 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
1492 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1493 // CHECK11: cond.true:
1494 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1495 // CHECK11-NEXT: br label [[COND_END:%.*]]
1496 // CHECK11: cond.false:
1497 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1498 // CHECK11-NEXT: br label [[COND_END]]
1499 // CHECK11: cond.end:
1500 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
1501 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1502 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1503 // CHECK11-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
1504 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1505 // CHECK11: omp.inner.for.cond:
1506 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1507 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1508 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
1509 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1510 // CHECK11: omp.inner.for.body:
1511 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1512 // CHECK11-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
1513 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1514 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
1515 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[N_ADDR]], align 4
1516 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[N_CASTED]], align 4
1517 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[N_CASTED]], align 4
1518 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[M_ADDR]], align 4
1519 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[M_CASTED]], align 4
1520 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[M_CASTED]], align 4
1521 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP20]], i32 [[TMP22]], i32 [[TMP24]], i32 [[TMP26]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
1522 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1523 // CHECK11: omp.inner.for.inc:
1524 // CHECK11-NEXT: [[TMP27:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1525 // CHECK11-NEXT: [[TMP28:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1526 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP27]], [[TMP28]]
1527 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
1528 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1529 // CHECK11: omp.inner.for.end:
1530 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1531 // CHECK11: omp.loop.exit:
1532 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1533 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
1534 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
1535 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1536 // CHECK11: omp.precond.end:
1537 // CHECK11-NEXT: ret void
1538 //
1539 //
1540 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
1541 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1542 // CHECK11-NEXT: entry:
1543 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1544 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1545 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1546 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1547 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1548 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1549 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1550 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1551 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1552 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1553 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1554 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1555 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1556 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1557 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1558 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1559 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1560 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1561 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1562 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1563 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1564 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4
1565 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4
1566 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1567 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1568 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1569 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1570 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1571 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1572 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1573 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1574 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1575 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1576 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1577 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1578 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
1579 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1580 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
1581 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1582 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1583 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1584 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1585 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1586 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1587 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
1588 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1589 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1590 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1591 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1592 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1593 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
1594 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
1595 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1596 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1597 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1598 // CHECK11: land.lhs.true:
1599 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1600 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
1601 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1602 // CHECK11: omp.precond.then:
1603 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1604 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1605 // CHECK11-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
1606 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1607 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP10]] to i64
1608 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1609 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP11]] to i64
1610 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8
1611 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8
1612 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1613 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1614 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1615 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1616 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1617 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1618 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1619 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1620 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1621 // CHECK11: cond.true:
1622 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1623 // CHECK11-NEXT: br label [[COND_END:%.*]]
1624 // CHECK11: cond.false:
1625 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1626 // CHECK11-NEXT: br label [[COND_END]]
1627 // CHECK11: cond.end:
1628 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1629 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1630 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1631 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1632 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1633 // CHECK11: omp.inner.for.cond:
1634 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1635 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1636 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1637 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1638 // CHECK11: omp.inner.for.body:
1639 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1640 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1641 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
1642 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
1643 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
1644 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
1645 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
1646 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
1647 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
1648 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
1649 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
1650 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1651 // CHECK11-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1652 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1653 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
1654 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
1655 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
1656 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
1657 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
1658 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1659 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
1660 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
1661 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
1662 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
1663 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
1664 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
1665 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
1666 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
1667 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
1668 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
1669 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4
1670 // CHECK11-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP1]]
1671 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP28]]
1672 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4
1673 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP29]]
1674 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4
1675 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1676 // CHECK11: omp.body.continue:
1677 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1678 // CHECK11: omp.inner.for.inc:
1679 // CHECK11-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1680 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP30]], 1
1681 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8
1682 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1683 // CHECK11: omp.inner.for.end:
1684 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1685 // CHECK11: omp.loop.exit:
1686 // CHECK11-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1687 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1688 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
1689 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1690 // CHECK11: omp.precond.end:
1691 // CHECK11-NEXT: ret void
1692 //
1693 //
1694 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1695 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1696 // CHECK11-NEXT: entry:
1697 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1698 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1699 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1700 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1701 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1702 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1703 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1704 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1705 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1706 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1707 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
1708 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1709 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1710 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
1711 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1712 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
1713 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1714 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1715 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1716 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1717 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4
1718 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1719 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
1720 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1721 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1722 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1723 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1724 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1725 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 4
1726 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1727 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 4
1728 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1729 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4
1730 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1731 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
1732 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1733 // CHECK11-NEXT: store i64 20, i64* [[TMP15]], align 8
1734 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1735 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1736 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1737 // CHECK11: omp_offload.failed:
1738 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1739 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1740 // CHECK11: omp_offload.cont:
1741 // CHECK11-NEXT: ret i32 0
1742 //
1743 //
1744 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
1745 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1746 // CHECK11-NEXT: entry:
1747 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
1748 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
1749 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
1750 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1751 // CHECK11-NEXT: ret void
1752 //
1753 //
1754 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
1755 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1756 // CHECK11-NEXT: entry:
1757 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1758 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1759 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
1760 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1761 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1762 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1763 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1764 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1765 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1766 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1767 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1768 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1769 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1770 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1771 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
1772 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
1773 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1774 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
1775 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1776 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1777 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1778 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1779 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1780 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1781 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1782 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1783 // CHECK11: cond.true:
1784 // CHECK11-NEXT: br label [[COND_END:%.*]]
1785 // CHECK11: cond.false:
1786 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1787 // CHECK11-NEXT: br label [[COND_END]]
1788 // CHECK11: cond.end:
1789 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1790 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1791 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1792 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1793 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1794 // CHECK11: omp.inner.for.cond:
1795 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1796 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1797 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1798 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1799 // CHECK11: omp.inner.for.body:
1800 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1801 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1802 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]])
1803 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1804 // CHECK11: omp.inner.for.inc:
1805 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1806 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1807 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1808 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1809 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1810 // CHECK11: omp.inner.for.end:
1811 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1812 // CHECK11: omp.loop.exit:
1813 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1814 // CHECK11-NEXT: ret void
1815 //
1816 //
1817 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
1818 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1819 // CHECK11-NEXT: entry:
1820 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1821 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1822 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1823 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1824 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
1825 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1826 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1827 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1828 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1829 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1830 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1831 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1832 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1833 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1834 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1835 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1836 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1837 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1838 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
1839 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
1840 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1841 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
1842 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1843 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1844 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1845 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1846 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1847 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1848 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1849 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1850 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1851 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1852 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
1853 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1854 // CHECK11: cond.true:
1855 // CHECK11-NEXT: br label [[COND_END:%.*]]
1856 // CHECK11: cond.false:
1857 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1858 // CHECK11-NEXT: br label [[COND_END]]
1859 // CHECK11: cond.end:
1860 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1861 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1862 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1863 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1864 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1865 // CHECK11: omp.inner.for.cond:
1866 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1867 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1868 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1869 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1870 // CHECK11: omp.inner.for.body:
1871 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1872 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
1873 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1874 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1875 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1876 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1877 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1878 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2
1879 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
1880 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
1881 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1882 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1883 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
1884 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1885 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]]
1886 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
1887 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
1888 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
1889 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1890 // CHECK11: omp.body.continue:
1891 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1892 // CHECK11: omp.inner.for.inc:
1893 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1894 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
1895 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
1896 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1897 // CHECK11: omp.inner.for.end:
1898 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1899 // CHECK11: omp.loop.exit:
1900 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1901 // CHECK11-NEXT: ret void
1902 //
1903 //
1904 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1905 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
1906 // CHECK11-NEXT: entry:
1907 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
1908 // CHECK11-NEXT: ret void
1909 //
1910