1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target teams distribute 29 for(int i = 0; i < X; i++) { 30 a[i] = (T)0; 31 } 32 #pragma omp target teams distribute dist_schedule(static) 33 for(int i = 0; i < X; i++) { 34 a[i] = (T)0; 35 } 36 #pragma omp target teams distribute dist_schedule(static, X/2) 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 41 42 43 44 45 46 return a[0]; 47 } 48 }; 49 50 int teams_template_struct(void) { 51 SS<int, 123, 456> V; 52 return V.foo(); 53 54 } 55 #endif // CK1 56 57 // Test host codegen. 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11 64 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 71 #ifdef CK2 72 73 template <typename T, int n> 74 int tmain(T argc) { 75 T a[n]; 76 #pragma omp target teams distribute 77 for(int i = 0; i < n; i++) { 78 a[i] = (T)0; 79 } 80 #pragma omp target teams distribute dist_schedule(static) 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target teams distribute dist_schedule(static, n) 85 for(int i = 0; i < n; i++) { 86 a[i] = (T)0; 87 } 88 return 0; 89 } 90 91 int main (int argc, char **argv) { 92 int n = 100; 93 int a[n]; 94 #pragma omp target teams distribute 95 for(int i = 0; i < n; i++) { 96 a[i] = 0; 97 } 98 #pragma omp target teams distribute dist_schedule(static) 99 for(int i = 0; i < n; i++) { 100 a[i] = 0; 101 } 102 #pragma omp target teams distribute dist_schedule(static, n) 103 for(int i = 0; i < n; i++) { 104 a[i] = 0; 105 } 106 return tmain<int, 10>(argc); 107 } 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 #endif // CK2 124 #endif // #ifndef HEADER 125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 127 // CHECK1-NEXT: entry: 128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 130 // CHECK1-NEXT: ret i32 [[CALL]] 131 // 132 // 133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 134 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 135 // CHECK1-NEXT: entry: 136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 162 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 163 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 164 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 165 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 166 // CHECK1: omp_offload.failed: 167 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 168 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 169 // CHECK1: omp_offload.cont: 170 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 172 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 173 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 174 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 175 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 176 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 177 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 178 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 179 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 181 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 182 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 183 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 184 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 185 // CHECK1: omp_offload.failed7: 186 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]] 187 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 188 // CHECK1: omp_offload.cont8: 189 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 190 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 191 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 192 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 193 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 194 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 195 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 196 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 197 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 198 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 200 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 201 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 202 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 203 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 204 // CHECK1: omp_offload.failed14: 205 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]] 206 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 207 // CHECK1: omp_offload.cont15: 208 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 209 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 210 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 211 // CHECK1-NEXT: ret i32 [[TMP27]] 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 215 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 218 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 219 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 220 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 221 // CHECK1-NEXT: ret void 222 // 223 // 224 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 225 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 226 // CHECK1-NEXT: entry: 227 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 228 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 230 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 232 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 238 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 239 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 240 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 242 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 243 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 244 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 245 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 246 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 247 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 248 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 249 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 250 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 251 // CHECK1: cond.true: 252 // CHECK1-NEXT: br label [[COND_END:%.*]] 253 // CHECK1: cond.false: 254 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 255 // CHECK1-NEXT: br label [[COND_END]] 256 // CHECK1: cond.end: 257 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 258 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 259 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 261 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 262 // CHECK1: omp.inner.for.cond: 263 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 264 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 265 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 266 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 267 // CHECK1: omp.inner.for.body: 268 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 269 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 270 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 271 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 272 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 273 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 274 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 275 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 276 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 277 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 278 // CHECK1: omp.body.continue: 279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 280 // CHECK1: omp.inner.for.inc: 281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 283 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 284 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 285 // CHECK1: omp.inner.for.end: 286 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 287 // CHECK1: omp.loop.exit: 288 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 289 // CHECK1-NEXT: ret void 290 // 291 // 292 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 293 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 294 // CHECK1-NEXT: entry: 295 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 296 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 297 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 298 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 299 // CHECK1-NEXT: ret void 300 // 301 // 302 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 303 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 304 // CHECK1-NEXT: entry: 305 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 306 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 307 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 308 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 310 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 311 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 312 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 313 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 314 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 315 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 316 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 317 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 318 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 319 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 320 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 321 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 322 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 323 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 324 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 325 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 326 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 327 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 328 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 329 // CHECK1: cond.true: 330 // CHECK1-NEXT: br label [[COND_END:%.*]] 331 // CHECK1: cond.false: 332 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 333 // CHECK1-NEXT: br label [[COND_END]] 334 // CHECK1: cond.end: 335 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 336 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 337 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 338 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 339 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 340 // CHECK1: omp.inner.for.cond: 341 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 342 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 343 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 344 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 345 // CHECK1: omp.inner.for.body: 346 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 347 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 348 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 349 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 350 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 351 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 352 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 353 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 354 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 355 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 356 // CHECK1: omp.body.continue: 357 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 358 // CHECK1: omp.inner.for.inc: 359 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 360 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 361 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 362 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 363 // CHECK1: omp.inner.for.end: 364 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 365 // CHECK1: omp.loop.exit: 366 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 367 // CHECK1-NEXT: ret void 368 // 369 // 370 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 371 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 372 // CHECK1-NEXT: entry: 373 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 374 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 375 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 376 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 377 // CHECK1-NEXT: ret void 378 // 379 // 380 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 381 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 382 // CHECK1-NEXT: entry: 383 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 384 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 385 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 386 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 387 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 388 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 389 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 390 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 391 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 392 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 393 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 394 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 395 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 396 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 397 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 398 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 399 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 400 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 401 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 402 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 403 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 404 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 405 // CHECK1: omp.dispatch.cond: 406 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 407 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 408 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 409 // CHECK1: cond.true: 410 // CHECK1-NEXT: br label [[COND_END:%.*]] 411 // CHECK1: cond.false: 412 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 413 // CHECK1-NEXT: br label [[COND_END]] 414 // CHECK1: cond.end: 415 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 416 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 417 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 418 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 419 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 420 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 421 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 422 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 423 // CHECK1: omp.dispatch.body: 424 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 425 // CHECK1: omp.inner.for.cond: 426 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 427 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 428 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 429 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 430 // CHECK1: omp.inner.for.body: 431 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 432 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 433 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 434 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 435 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 436 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8 437 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 438 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 439 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8 440 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 441 // CHECK1: omp.body.continue: 442 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 443 // CHECK1: omp.inner.for.inc: 444 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 445 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 446 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 447 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 448 // CHECK1: omp.inner.for.end: 449 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 450 // CHECK1: omp.dispatch.inc: 451 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 452 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 453 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 454 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 455 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 456 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 457 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 458 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 459 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 460 // CHECK1: omp.dispatch.end: 461 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 462 // CHECK1-NEXT: ret void 463 // 464 // 465 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 466 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 467 // CHECK1-NEXT: entry: 468 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 469 // CHECK1-NEXT: ret void 470 // 471 // 472 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 473 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 474 // CHECK3-NEXT: entry: 475 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 476 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 477 // CHECK3-NEXT: ret i32 [[CALL]] 478 // 479 // 480 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 481 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 482 // CHECK3-NEXT: entry: 483 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 484 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 485 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 486 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 487 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 488 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 489 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 490 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 491 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 492 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 493 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 494 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 495 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 496 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 497 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 498 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 499 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 500 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 501 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 502 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 503 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 504 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 505 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 506 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 507 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 508 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 509 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 510 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 511 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 512 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 513 // CHECK3: omp_offload.failed: 514 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 515 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 516 // CHECK3: omp_offload.cont: 517 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 518 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 519 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 520 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 521 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 522 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 523 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 524 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 525 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 526 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 527 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 528 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 529 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 530 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 531 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 532 // CHECK3: omp_offload.failed7: 533 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]] 534 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 535 // CHECK3: omp_offload.cont8: 536 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 537 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 538 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 539 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 540 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 541 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 542 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 543 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 544 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 545 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 546 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 547 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 548 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 549 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 550 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 551 // CHECK3: omp_offload.failed14: 552 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]] 553 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 554 // CHECK3: omp_offload.cont15: 555 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 556 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 557 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 558 // CHECK3-NEXT: ret i32 [[TMP27]] 559 // 560 // 561 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 562 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 563 // CHECK3-NEXT: entry: 564 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 565 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 566 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 567 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 568 // CHECK3-NEXT: ret void 569 // 570 // 571 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 572 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 573 // CHECK3-NEXT: entry: 574 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 575 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 576 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 577 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 578 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 579 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 580 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 581 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 582 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 583 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 584 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 585 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 586 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 587 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 588 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 589 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 590 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 591 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 592 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 593 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 594 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 595 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 596 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 597 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 598 // CHECK3: cond.true: 599 // CHECK3-NEXT: br label [[COND_END:%.*]] 600 // CHECK3: cond.false: 601 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 602 // CHECK3-NEXT: br label [[COND_END]] 603 // CHECK3: cond.end: 604 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 605 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 606 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 607 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 608 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 609 // CHECK3: omp.inner.for.cond: 610 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 611 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 612 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 613 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 614 // CHECK3: omp.inner.for.body: 615 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 616 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 617 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 618 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 619 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 620 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 621 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 622 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 623 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 624 // CHECK3: omp.body.continue: 625 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 626 // CHECK3: omp.inner.for.inc: 627 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 628 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 629 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 630 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 631 // CHECK3: omp.inner.for.end: 632 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 633 // CHECK3: omp.loop.exit: 634 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 635 // CHECK3-NEXT: ret void 636 // 637 // 638 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 639 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 640 // CHECK3-NEXT: entry: 641 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 642 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 643 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 644 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 645 // CHECK3-NEXT: ret void 646 // 647 // 648 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 649 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 650 // CHECK3-NEXT: entry: 651 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 652 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 653 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 654 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 655 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 656 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 657 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 658 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 659 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 660 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 661 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 662 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 663 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 664 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 665 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 666 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 667 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 668 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 669 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 670 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 671 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 672 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 673 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 674 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 675 // CHECK3: cond.true: 676 // CHECK3-NEXT: br label [[COND_END:%.*]] 677 // CHECK3: cond.false: 678 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 679 // CHECK3-NEXT: br label [[COND_END]] 680 // CHECK3: cond.end: 681 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 682 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 683 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 684 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 685 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 686 // CHECK3: omp.inner.for.cond: 687 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 688 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 689 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 690 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 691 // CHECK3: omp.inner.for.body: 692 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 693 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 694 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 695 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 696 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 697 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 698 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 699 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 700 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 701 // CHECK3: omp.body.continue: 702 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 703 // CHECK3: omp.inner.for.inc: 704 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 705 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 706 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 707 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 708 // CHECK3: omp.inner.for.end: 709 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 710 // CHECK3: omp.loop.exit: 711 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 712 // CHECK3-NEXT: ret void 713 // 714 // 715 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 716 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 717 // CHECK3-NEXT: entry: 718 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 719 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 720 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 721 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 722 // CHECK3-NEXT: ret void 723 // 724 // 725 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 726 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 727 // CHECK3-NEXT: entry: 728 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 729 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 730 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 731 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 732 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 733 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 734 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 735 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 736 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 737 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 738 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 739 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 740 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 741 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 742 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 743 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 744 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 745 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 746 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 747 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 748 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 749 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 750 // CHECK3: omp.dispatch.cond: 751 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 752 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 753 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 754 // CHECK3: cond.true: 755 // CHECK3-NEXT: br label [[COND_END:%.*]] 756 // CHECK3: cond.false: 757 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 758 // CHECK3-NEXT: br label [[COND_END]] 759 // CHECK3: cond.end: 760 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 761 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 762 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 763 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 764 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 765 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 766 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 767 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 768 // CHECK3: omp.dispatch.body: 769 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 770 // CHECK3: omp.inner.for.cond: 771 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 772 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 773 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 774 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 775 // CHECK3: omp.inner.for.body: 776 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 777 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 778 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 779 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 780 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 781 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 782 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 783 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 784 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 785 // CHECK3: omp.body.continue: 786 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 787 // CHECK3: omp.inner.for.inc: 788 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 789 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 790 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 791 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 792 // CHECK3: omp.inner.for.end: 793 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 794 // CHECK3: omp.dispatch.inc: 795 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 796 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 797 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 798 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 799 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 800 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 801 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 802 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 803 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 804 // CHECK3: omp.dispatch.end: 805 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 806 // CHECK3-NEXT: ret void 807 // 808 // 809 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 810 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 811 // CHECK3-NEXT: entry: 812 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 813 // CHECK3-NEXT: ret void 814 // 815 // 816 // CHECK9-LABEL: define {{[^@]+}}@main 817 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 818 // CHECK9-NEXT: entry: 819 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 820 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 821 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 822 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 823 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 824 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 825 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 826 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 827 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 828 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 829 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 830 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 831 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 832 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 833 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 834 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 835 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 836 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 837 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 838 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 839 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 840 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 841 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 842 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 843 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 844 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8 845 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8 846 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8 847 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8 848 // CHECK9-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 849 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 850 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4 851 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 852 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 853 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 854 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 855 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 856 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 857 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 858 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 859 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 860 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 861 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 862 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 863 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 864 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 865 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 866 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 867 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 868 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 869 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 870 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 871 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 872 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 873 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 874 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 875 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 876 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 877 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 878 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 879 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 880 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 881 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 882 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 883 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 884 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 885 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 886 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 887 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 888 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 889 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 890 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 891 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 892 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 893 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 894 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 895 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 896 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 897 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 898 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 899 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 900 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 901 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 902 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 903 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 904 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 905 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 906 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 907 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 908 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 909 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 910 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 911 // CHECK9: omp_offload.failed: 912 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 913 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 914 // CHECK9: omp_offload.cont: 915 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 916 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 917 // CHECK9-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 918 // CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 919 // CHECK9-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 920 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 921 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 922 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 923 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 924 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 925 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 926 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 927 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 928 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 929 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 930 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 931 // CHECK9-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 932 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 933 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 934 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 935 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 936 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 937 // CHECK9-NEXT: store i8* null, i8** [[TMP45]], align 8 938 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 939 // CHECK9-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 940 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 941 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 942 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 943 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 944 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 945 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 946 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 947 // CHECK9-NEXT: store i8* null, i8** [[TMP51]], align 8 948 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 949 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 950 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 951 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 952 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 953 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 954 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 955 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 956 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 957 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 958 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 959 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 960 // CHECK9-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 961 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 962 // CHECK9-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 963 // CHECK9-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 964 // CHECK9-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 965 // CHECK9: omp_offload.failed16: 966 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 967 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 968 // CHECK9: omp_offload.cont17: 969 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 970 // CHECK9-NEXT: store i32 [[TMP61]], i32* [[DOTCAPTURE_EXPR_18]], align 4 971 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 972 // CHECK9-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 973 // CHECK9-NEXT: store i32 [[TMP62]], i32* [[CONV20]], align 4 974 // CHECK9-NEXT: [[TMP63:%.*]] = load i64, i64* [[N_CASTED19]], align 8 975 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 976 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 977 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[CONV21]], align 4 978 // CHECK9-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 979 // CHECK9-NEXT: [[TMP66:%.*]] = mul nuw i64 [[TMP1]], 4 980 // CHECK9-NEXT: [[TMP67:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8* 981 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false) 982 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 983 // CHECK9-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 984 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP69]], align 8 985 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 986 // CHECK9-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 987 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP71]], align 8 988 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 989 // CHECK9-NEXT: store i8* null, i8** [[TMP72]], align 8 990 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 991 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 992 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP74]], align 8 993 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 994 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 995 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8 996 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1 997 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 998 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2 999 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32** 1000 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP79]], align 8 1001 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2 1002 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 1003 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 8 1004 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2 1005 // CHECK9-NEXT: store i64 [[TMP66]], i64* [[TMP82]], align 8 1006 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2 1007 // CHECK9-NEXT: store i8* null, i8** [[TMP83]], align 8 1008 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3 1009 // CHECK9-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i64* 1010 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP85]], align 8 1011 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3 1012 // CHECK9-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64* 1013 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP87]], align 8 1014 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3 1015 // CHECK9-NEXT: store i8* null, i8** [[TMP88]], align 8 1016 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 1017 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 1018 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0 1019 // CHECK9-NEXT: [[TMP92:%.*]] = load i32, i32* [[N]], align 4 1020 // CHECK9-NEXT: store i32 [[TMP92]], i32* [[DOTCAPTURE_EXPR_27]], align 4 1021 // CHECK9-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 1022 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP93]], 0 1023 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 1024 // CHECK9-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1 1025 // CHECK9-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4 1026 // CHECK9-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4 1027 // CHECK9-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP94]], 1 1028 // CHECK9-NEXT: [[TMP95:%.*]] = zext i32 [[ADD32]] to i64 1029 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP95]]) 1030 // CHECK9-NEXT: [[TMP96:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP89]], i8** [[TMP90]], i64* [[TMP91]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1031 // CHECK9-NEXT: [[TMP97:%.*]] = icmp ne i32 [[TMP96]], 0 1032 // CHECK9-NEXT: br i1 [[TMP97]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 1033 // CHECK9: omp_offload.failed33: 1034 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP63]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP65]]) #[[ATTR3]] 1035 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT34]] 1036 // CHECK9: omp_offload.cont34: 1037 // CHECK9-NEXT: [[TMP98:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1038 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP98]]) 1039 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1040 // CHECK9-NEXT: [[TMP99:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1041 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP99]]) 1042 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[RETVAL]], align 4 1043 // CHECK9-NEXT: ret i32 [[TMP100]] 1044 // 1045 // 1046 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1047 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1048 // CHECK9-NEXT: entry: 1049 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1050 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1051 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1052 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1053 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1054 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1055 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1056 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1057 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1058 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1059 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1060 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1061 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 1062 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1063 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 1064 // CHECK9-NEXT: ret void 1065 // 1066 // 1067 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1068 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1069 // CHECK9-NEXT: entry: 1070 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1071 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1072 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1073 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1074 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1075 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1076 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1077 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1078 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1079 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1080 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1081 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1082 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1083 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1084 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1085 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1086 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1087 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1088 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1089 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1090 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1091 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1092 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1093 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1094 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1095 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1096 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1097 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1098 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1099 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1100 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1101 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1102 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1103 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1104 // CHECK9: omp.precond.then: 1105 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1106 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1107 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1108 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1109 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1110 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1111 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1112 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1113 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1114 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1115 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1116 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1117 // CHECK9: cond.true: 1118 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1119 // CHECK9-NEXT: br label [[COND_END:%.*]] 1120 // CHECK9: cond.false: 1121 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1122 // CHECK9-NEXT: br label [[COND_END]] 1123 // CHECK9: cond.end: 1124 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1125 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1126 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1127 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1128 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1129 // CHECK9: omp.inner.for.cond: 1130 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1131 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1132 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1133 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1134 // CHECK9: omp.inner.for.body: 1135 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1136 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1137 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1138 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1139 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1140 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1141 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1142 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1143 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1144 // CHECK9: omp.body.continue: 1145 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1146 // CHECK9: omp.inner.for.inc: 1147 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1148 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1149 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1150 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1151 // CHECK9: omp.inner.for.end: 1152 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1153 // CHECK9: omp.loop.exit: 1154 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1155 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1156 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1157 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1158 // CHECK9: omp.precond.end: 1159 // CHECK9-NEXT: ret void 1160 // 1161 // 1162 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 1163 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1164 // CHECK9-NEXT: entry: 1165 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1166 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1167 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1168 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1169 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1170 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1171 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1172 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1173 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1174 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1175 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1176 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1177 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 1178 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1179 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 1180 // CHECK9-NEXT: ret void 1181 // 1182 // 1183 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1184 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1185 // CHECK9-NEXT: entry: 1186 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1187 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1188 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1189 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1190 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1191 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1192 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1193 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1194 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1195 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1196 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1197 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1198 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1199 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1200 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1201 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1202 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1203 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1204 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1205 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1206 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1207 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1208 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1209 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1210 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1211 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1212 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1213 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1214 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1215 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1216 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1217 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1218 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1219 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1220 // CHECK9: omp.precond.then: 1221 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1222 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1223 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1224 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1225 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1226 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1227 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1228 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1229 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1230 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1231 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1232 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1233 // CHECK9: cond.true: 1234 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1235 // CHECK9-NEXT: br label [[COND_END:%.*]] 1236 // CHECK9: cond.false: 1237 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1238 // CHECK9-NEXT: br label [[COND_END]] 1239 // CHECK9: cond.end: 1240 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1241 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1242 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1243 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1244 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1245 // CHECK9: omp.inner.for.cond: 1246 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1247 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1248 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1249 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1250 // CHECK9: omp.inner.for.body: 1251 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1252 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1253 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1254 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1255 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1256 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1257 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1258 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1259 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1260 // CHECK9: omp.body.continue: 1261 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1262 // CHECK9: omp.inner.for.inc: 1263 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1264 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1265 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1266 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1267 // CHECK9: omp.inner.for.end: 1268 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1269 // CHECK9: omp.loop.exit: 1270 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1271 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1272 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1273 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1274 // CHECK9: omp.precond.end: 1275 // CHECK9-NEXT: ret void 1276 // 1277 // 1278 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1279 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1280 // CHECK9-NEXT: entry: 1281 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1282 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1283 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1284 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1285 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1286 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1287 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1288 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1289 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1290 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1291 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1292 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1293 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1294 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1295 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1296 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1297 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4 1298 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1299 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4 1300 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1301 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 1302 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1303 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]]) 1304 // CHECK9-NEXT: ret void 1305 // 1306 // 1307 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1308 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1309 // CHECK9-NEXT: entry: 1310 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1311 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1312 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1313 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1314 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1315 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1316 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1317 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1318 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1319 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1320 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1321 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1322 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1323 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1324 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1325 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 1326 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1327 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1328 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1329 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1330 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1331 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1332 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1333 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1334 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1335 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1336 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1337 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1338 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1339 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1340 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1341 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 1342 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1343 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1344 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1345 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1346 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1347 // CHECK9: omp.precond.then: 1348 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1349 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1350 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1351 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1352 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1353 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 1354 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1355 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1356 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 1357 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1358 // CHECK9: omp.dispatch.cond: 1359 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1360 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1361 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 1362 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1363 // CHECK9: cond.true: 1364 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1365 // CHECK9-NEXT: br label [[COND_END:%.*]] 1366 // CHECK9: cond.false: 1367 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1368 // CHECK9-NEXT: br label [[COND_END]] 1369 // CHECK9: cond.end: 1370 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 1371 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1372 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1373 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 1374 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1375 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1376 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 1377 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1378 // CHECK9: omp.dispatch.body: 1379 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1380 // CHECK9: omp.inner.for.cond: 1381 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1382 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 1383 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 1384 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1385 // CHECK9: omp.inner.for.body: 1386 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1387 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 1388 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1389 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !11 1390 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !11 1391 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 1392 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1393 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 1394 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1395 // CHECK9: omp.body.continue: 1396 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1397 // CHECK9: omp.inner.for.inc: 1398 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1399 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 1400 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1401 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1402 // CHECK9: omp.inner.for.end: 1403 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1404 // CHECK9: omp.dispatch.inc: 1405 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1406 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1407 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1408 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4 1409 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1410 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1411 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 1412 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4 1413 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1414 // CHECK9: omp.dispatch.end: 1415 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1416 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 1417 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 1418 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1419 // CHECK9: omp.precond.end: 1420 // CHECK9-NEXT: ret void 1421 // 1422 // 1423 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 1424 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1425 // CHECK9-NEXT: entry: 1426 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1427 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 1428 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1429 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1430 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1431 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1432 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 1433 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 1434 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 1435 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1436 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 1437 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 1438 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 1439 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 1440 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1441 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1442 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 1443 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 1444 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1445 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 1446 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 1447 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1448 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 1449 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1450 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1451 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1452 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1453 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1454 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1455 // CHECK9: omp_offload.failed: 1456 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]] 1457 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1458 // CHECK9: omp_offload.cont: 1459 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1460 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 1461 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 1462 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1463 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 1464 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 1465 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 1466 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 1467 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 1468 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 1469 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1470 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1471 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1472 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 1473 // CHECK9: omp_offload.failed5: 1474 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]] 1475 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 1476 // CHECK9: omp_offload.cont6: 1477 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1478 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 1479 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 1480 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1481 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 1482 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 1483 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 1484 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1485 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 1486 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 1487 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 1488 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1489 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1490 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 1491 // CHECK9: omp_offload.failed11: 1492 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 1493 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]] 1494 // CHECK9: omp_offload.cont12: 1495 // CHECK9-NEXT: ret i32 0 1496 // 1497 // 1498 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 1499 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1500 // CHECK9-NEXT: entry: 1501 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1502 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1503 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1504 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1505 // CHECK9-NEXT: ret void 1506 // 1507 // 1508 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 1509 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1510 // CHECK9-NEXT: entry: 1511 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1512 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1513 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1514 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1515 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1516 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1517 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1518 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1519 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1520 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1521 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1522 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1523 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1524 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1525 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1526 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1527 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1528 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1529 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1530 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1531 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1532 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1533 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1534 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1535 // CHECK9: cond.true: 1536 // CHECK9-NEXT: br label [[COND_END:%.*]] 1537 // CHECK9: cond.false: 1538 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1539 // CHECK9-NEXT: br label [[COND_END]] 1540 // CHECK9: cond.end: 1541 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1542 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1543 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1544 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1546 // CHECK9: omp.inner.for.cond: 1547 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1548 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1549 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1550 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1551 // CHECK9: omp.inner.for.body: 1552 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1553 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1554 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1555 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1556 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1557 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1558 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1559 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1560 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1561 // CHECK9: omp.body.continue: 1562 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1563 // CHECK9: omp.inner.for.inc: 1564 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1565 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1566 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1567 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1568 // CHECK9: omp.inner.for.end: 1569 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1570 // CHECK9: omp.loop.exit: 1571 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1572 // CHECK9-NEXT: ret void 1573 // 1574 // 1575 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 1576 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1577 // CHECK9-NEXT: entry: 1578 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1579 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1580 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1581 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1582 // CHECK9-NEXT: ret void 1583 // 1584 // 1585 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 1586 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1587 // CHECK9-NEXT: entry: 1588 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1589 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1590 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1591 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1592 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1593 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1594 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1595 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1596 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1597 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1598 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1599 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1600 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1601 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1602 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1603 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1604 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1605 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1606 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1607 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1608 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1609 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1610 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1611 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1612 // CHECK9: cond.true: 1613 // CHECK9-NEXT: br label [[COND_END:%.*]] 1614 // CHECK9: cond.false: 1615 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1616 // CHECK9-NEXT: br label [[COND_END]] 1617 // CHECK9: cond.end: 1618 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1619 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1620 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1621 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1622 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1623 // CHECK9: omp.inner.for.cond: 1624 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1625 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1626 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1627 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1628 // CHECK9: omp.inner.for.body: 1629 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1630 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1631 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1632 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1633 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1634 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1635 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1636 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1637 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1638 // CHECK9: omp.body.continue: 1639 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1640 // CHECK9: omp.inner.for.inc: 1641 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1642 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1643 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1644 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1645 // CHECK9: omp.inner.for.end: 1646 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1647 // CHECK9: omp.loop.exit: 1648 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1649 // CHECK9-NEXT: ret void 1650 // 1651 // 1652 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 1653 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1654 // CHECK9-NEXT: entry: 1655 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1656 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1657 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1658 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 1659 // CHECK9-NEXT: ret void 1660 // 1661 // 1662 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 1663 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 1664 // CHECK9-NEXT: entry: 1665 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1666 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1667 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 1668 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1669 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1670 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1671 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1672 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1673 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1674 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1675 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1676 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1677 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 1678 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 1679 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1680 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 1681 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1682 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1683 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1684 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1685 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 1686 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1687 // CHECK9: omp.dispatch.cond: 1688 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1689 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 1690 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1691 // CHECK9: cond.true: 1692 // CHECK9-NEXT: br label [[COND_END:%.*]] 1693 // CHECK9: cond.false: 1694 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1695 // CHECK9-NEXT: br label [[COND_END]] 1696 // CHECK9: cond.end: 1697 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1698 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1699 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1700 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1701 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1702 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1703 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1704 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1705 // CHECK9: omp.dispatch.body: 1706 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1707 // CHECK9: omp.inner.for.cond: 1708 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1709 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 1710 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1711 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1712 // CHECK9: omp.inner.for.body: 1713 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1714 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1715 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1716 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 1717 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 1718 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1719 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 1720 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 1721 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1722 // CHECK9: omp.body.continue: 1723 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1724 // CHECK9: omp.inner.for.inc: 1725 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1726 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1727 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1728 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 1729 // CHECK9: omp.inner.for.end: 1730 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1731 // CHECK9: omp.dispatch.inc: 1732 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1733 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1734 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1735 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1736 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1737 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1738 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1739 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1740 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 1741 // CHECK9: omp.dispatch.end: 1742 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1743 // CHECK9-NEXT: ret void 1744 // 1745 // 1746 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1747 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 1748 // CHECK9-NEXT: entry: 1749 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 1750 // CHECK9-NEXT: ret void 1751 // 1752 // 1753 // CHECK11-LABEL: define {{[^@]+}}@main 1754 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1755 // CHECK11-NEXT: entry: 1756 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1757 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1758 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 1759 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 1760 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 1761 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 1762 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1763 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 1764 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 1765 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 1766 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 1767 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 1768 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1769 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1770 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 1771 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 1772 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 1773 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 1774 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 1775 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 1776 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 1777 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1778 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 1779 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 1780 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 1781 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4 1782 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4 1783 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4 1784 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4 1785 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 1786 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 1787 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 1788 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 1789 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1790 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 1791 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 1792 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1793 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 1794 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 1795 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 1796 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 1797 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 1798 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 1799 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 1800 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 1801 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 1802 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1803 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 1804 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1805 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 1806 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 1807 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1808 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 1809 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 1810 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1811 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 1812 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1813 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 1814 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 1815 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1816 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 1817 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 1818 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 1819 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 1820 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1821 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1822 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 1823 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1824 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1825 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 1826 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1827 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 1828 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 1829 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 1830 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1831 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1832 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1833 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1834 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1835 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1836 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1837 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1838 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1839 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1840 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1841 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1842 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1843 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1844 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1845 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1846 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1847 // CHECK11: omp_offload.failed: 1848 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1849 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 1850 // CHECK11: omp_offload.cont: 1851 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 1852 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 1853 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 1854 // CHECK11-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 1855 // CHECK11-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 1856 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 1857 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 1858 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1859 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 1860 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 1861 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1862 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 1863 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 1864 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 1865 // CHECK11-NEXT: store i8* null, i8** [[TMP41]], align 4 1866 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 1867 // CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 1868 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 1869 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 1870 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 1871 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 1872 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 1873 // CHECK11-NEXT: store i8* null, i8** [[TMP46]], align 4 1874 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 1875 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 1876 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 1877 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 1878 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 1879 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 1880 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 1881 // CHECK11-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 1882 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 1883 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 1884 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 1885 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 1886 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 1887 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 1888 // CHECK11-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 1889 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 1890 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 1891 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 1892 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 1893 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1894 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1895 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 1896 // CHECK11-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 1897 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 1898 // CHECK11-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1899 // CHECK11-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 1900 // CHECK11-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 1901 // CHECK11: omp_offload.failed15: 1902 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 1903 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 1904 // CHECK11: omp_offload.cont16: 1905 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 1906 // CHECK11-NEXT: store i32 [[TMP62]], i32* [[DOTCAPTURE_EXPR_17]], align 4 1907 // CHECK11-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 1908 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[N_CASTED18]], align 4 1909 // CHECK11-NEXT: [[TMP64:%.*]] = load i32, i32* [[N_CASTED18]], align 4 1910 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4 1911 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 1912 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 1913 // CHECK11-NEXT: [[TMP67:%.*]] = mul nuw i32 [[TMP0]], 4 1914 // CHECK11-NEXT: [[TMP68:%.*]] = sext i32 [[TMP67]] to i64 1915 // CHECK11-NEXT: [[TMP69:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8* 1916 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP69]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false) 1917 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1918 // CHECK11-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 1919 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP71]], align 4 1920 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1921 // CHECK11-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 1922 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP73]], align 4 1923 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 1924 // CHECK11-NEXT: store i8* null, i8** [[TMP74]], align 4 1925 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 1926 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 1927 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP76]], align 4 1928 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 1929 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32* 1930 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4 1931 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 1932 // CHECK11-NEXT: store i8* null, i8** [[TMP79]], align 4 1933 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 1934 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 1935 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 4 1936 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 1937 // CHECK11-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 1938 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 4 1939 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2 1940 // CHECK11-NEXT: store i64 [[TMP68]], i64* [[TMP84]], align 4 1941 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 1942 // CHECK11-NEXT: store i8* null, i8** [[TMP85]], align 4 1943 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 1944 // CHECK11-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32* 1945 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP87]], align 4 1946 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 1947 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32* 1948 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP89]], align 4 1949 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3 1950 // CHECK11-NEXT: store i8* null, i8** [[TMP90]], align 4 1951 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 1952 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 1953 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 1954 // CHECK11-NEXT: [[TMP94:%.*]] = load i32, i32* [[N]], align 4 1955 // CHECK11-NEXT: store i32 [[TMP94]], i32* [[DOTCAPTURE_EXPR_24]], align 4 1956 // CHECK11-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 1957 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0 1958 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 1959 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 1960 // CHECK11-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 1961 // CHECK11-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 1962 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1 1963 // CHECK11-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i64 1964 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP97]]) 1965 // CHECK11-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP91]], i8** [[TMP92]], i64* [[TMP93]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1966 // CHECK11-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 1967 // CHECK11-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 1968 // CHECK11: omp_offload.failed30: 1969 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP64]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP66]]) #[[ATTR3]] 1970 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT31]] 1971 // CHECK11: omp_offload.cont31: 1972 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1973 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP100]]) 1974 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1975 // CHECK11-NEXT: [[TMP101:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 1976 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP101]]) 1977 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[RETVAL]], align 4 1978 // CHECK11-NEXT: ret i32 [[TMP102]] 1979 // 1980 // 1981 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1982 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1983 // CHECK11-NEXT: entry: 1984 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 1985 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 1986 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 1987 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 1988 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 1989 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 1990 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 1991 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 1992 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 1993 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 1994 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 1995 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 1996 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 1997 // CHECK11-NEXT: ret void 1998 // 1999 // 2000 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 2001 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2002 // CHECK11-NEXT: entry: 2003 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2004 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2005 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2006 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2007 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2008 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2009 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2010 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2011 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2012 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2013 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2014 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2015 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2016 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2017 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2018 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2019 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2020 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2021 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2022 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2023 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2024 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2025 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2026 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2027 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2028 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2029 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2030 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2031 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2032 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2033 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2034 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2035 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2036 // CHECK11: omp.precond.then: 2037 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2038 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2039 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2040 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2041 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2042 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2043 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2044 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2045 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2046 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2047 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2048 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2049 // CHECK11: cond.true: 2050 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2051 // CHECK11-NEXT: br label [[COND_END:%.*]] 2052 // CHECK11: cond.false: 2053 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2054 // CHECK11-NEXT: br label [[COND_END]] 2055 // CHECK11: cond.end: 2056 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2057 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2058 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2059 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2060 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2061 // CHECK11: omp.inner.for.cond: 2062 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2063 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2064 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2065 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2066 // CHECK11: omp.inner.for.body: 2067 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2068 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2069 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2070 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2071 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 2072 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 2073 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2074 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2075 // CHECK11: omp.body.continue: 2076 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2077 // CHECK11: omp.inner.for.inc: 2078 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2079 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2080 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2081 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2082 // CHECK11: omp.inner.for.end: 2083 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2084 // CHECK11: omp.loop.exit: 2085 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2086 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2087 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2088 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2089 // CHECK11: omp.precond.end: 2090 // CHECK11-NEXT: ret void 2091 // 2092 // 2093 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 2094 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2095 // CHECK11-NEXT: entry: 2096 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2097 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2098 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2099 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2100 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2101 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2102 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2103 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2104 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2105 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2106 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2107 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2108 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 2109 // CHECK11-NEXT: ret void 2110 // 2111 // 2112 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 2113 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2114 // CHECK11-NEXT: entry: 2115 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2116 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2117 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2118 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2119 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2120 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2121 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2122 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2123 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2124 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2125 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2126 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2127 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2128 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2129 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 2130 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2131 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2132 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2133 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2134 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2135 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2136 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2137 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2138 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2139 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2140 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2141 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2142 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2143 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2144 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2145 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2146 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2147 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2148 // CHECK11: omp.precond.then: 2149 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2150 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2151 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2152 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2153 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2154 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2155 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2156 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2157 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2158 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2159 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2160 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2161 // CHECK11: cond.true: 2162 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2163 // CHECK11-NEXT: br label [[COND_END:%.*]] 2164 // CHECK11: cond.false: 2165 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2166 // CHECK11-NEXT: br label [[COND_END]] 2167 // CHECK11: cond.end: 2168 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2169 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2170 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2171 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2172 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2173 // CHECK11: omp.inner.for.cond: 2174 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2175 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2176 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2177 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2178 // CHECK11: omp.inner.for.body: 2179 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2180 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2181 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2182 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2183 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 2184 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 2185 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2186 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2187 // CHECK11: omp.body.continue: 2188 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2189 // CHECK11: omp.inner.for.inc: 2190 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2191 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2192 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2193 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2194 // CHECK11: omp.inner.for.end: 2195 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2196 // CHECK11: omp.loop.exit: 2197 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2198 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2199 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2200 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2201 // CHECK11: omp.precond.end: 2202 // CHECK11-NEXT: ret void 2203 // 2204 // 2205 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2206 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2207 // CHECK11-NEXT: entry: 2208 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2209 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2210 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2211 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2212 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 2213 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 2214 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2215 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2216 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2217 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2218 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2219 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2220 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2221 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 2222 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 2223 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2224 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2225 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 2226 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]]) 2227 // CHECK11-NEXT: ret void 2228 // 2229 // 2230 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 2231 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2232 // CHECK11-NEXT: entry: 2233 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2234 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2235 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 2236 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 2237 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 2238 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 2239 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2240 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2241 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2242 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2243 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2244 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2245 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2246 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2247 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2248 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 2249 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2250 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2251 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 2252 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 2253 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 2254 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2255 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 2256 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 2257 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 2258 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2259 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2260 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2261 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2262 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 2263 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2264 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 2265 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2266 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2267 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2268 // CHECK11: omp.precond.then: 2269 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2270 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2271 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2272 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2273 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2274 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 2275 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2276 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2277 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 2278 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2279 // CHECK11: omp.dispatch.cond: 2280 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2281 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2282 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2283 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2284 // CHECK11: cond.true: 2285 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2286 // CHECK11-NEXT: br label [[COND_END:%.*]] 2287 // CHECK11: cond.false: 2288 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2289 // CHECK11-NEXT: br label [[COND_END]] 2290 // CHECK11: cond.end: 2291 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2292 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2293 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2294 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2295 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2296 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2297 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2298 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2299 // CHECK11: omp.dispatch.body: 2300 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2301 // CHECK11: omp.inner.for.cond: 2302 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2303 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 2304 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2305 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2306 // CHECK11: omp.inner.for.body: 2307 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2308 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2309 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2310 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 2311 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 2312 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]] 2313 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 2314 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2315 // CHECK11: omp.body.continue: 2316 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2317 // CHECK11: omp.inner.for.inc: 2318 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2319 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 2320 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2321 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2322 // CHECK11: omp.inner.for.end: 2323 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2324 // CHECK11: omp.dispatch.inc: 2325 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2326 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2327 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2328 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 2329 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2330 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2331 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 2332 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 2333 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2334 // CHECK11: omp.dispatch.end: 2335 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2336 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2337 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2338 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 2339 // CHECK11: omp.precond.end: 2340 // CHECK11-NEXT: ret void 2341 // 2342 // 2343 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2344 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2345 // CHECK11-NEXT: entry: 2346 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2347 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2348 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2349 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2350 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2351 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2352 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 2353 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 2354 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 2355 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2356 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 2357 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 2358 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 2359 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 2360 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2361 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2362 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2363 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 2364 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2365 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2366 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 2367 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2368 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 2369 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2370 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2371 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2372 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2373 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2374 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2375 // CHECK11: omp_offload.failed: 2376 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]] 2377 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 2378 // CHECK11: omp_offload.cont: 2379 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2380 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 2381 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 2382 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2383 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 2384 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 2385 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 2386 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 2387 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2388 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2389 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2390 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2391 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2392 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2393 // CHECK11: omp_offload.failed5: 2394 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]] 2395 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2396 // CHECK11: omp_offload.cont6: 2397 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2398 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 2399 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 2400 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2401 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 2402 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 2403 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 2404 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 2405 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2406 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2407 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2408 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2409 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2410 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 2411 // CHECK11: omp_offload.failed11: 2412 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 2413 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]] 2414 // CHECK11: omp_offload.cont12: 2415 // CHECK11-NEXT: ret i32 0 2416 // 2417 // 2418 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 2419 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2420 // CHECK11-NEXT: entry: 2421 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2422 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2423 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2424 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2425 // CHECK11-NEXT: ret void 2426 // 2427 // 2428 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 2429 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2430 // CHECK11-NEXT: entry: 2431 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2432 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2433 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2434 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2435 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2436 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2437 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2438 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2439 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2440 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2441 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2442 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2443 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2444 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2445 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2446 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2447 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2448 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2449 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2450 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2451 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2452 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2453 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2454 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2455 // CHECK11: cond.true: 2456 // CHECK11-NEXT: br label [[COND_END:%.*]] 2457 // CHECK11: cond.false: 2458 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2459 // CHECK11-NEXT: br label [[COND_END]] 2460 // CHECK11: cond.end: 2461 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2462 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2463 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2464 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2465 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2466 // CHECK11: omp.inner.for.cond: 2467 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2468 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2469 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2470 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2471 // CHECK11: omp.inner.for.body: 2472 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2473 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2474 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2475 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2476 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2477 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2478 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2479 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2480 // CHECK11: omp.body.continue: 2481 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2482 // CHECK11: omp.inner.for.inc: 2483 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2484 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2485 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2486 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2487 // CHECK11: omp.inner.for.end: 2488 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2489 // CHECK11: omp.loop.exit: 2490 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2491 // CHECK11-NEXT: ret void 2492 // 2493 // 2494 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 2495 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2496 // CHECK11-NEXT: entry: 2497 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2498 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2499 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2500 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2501 // CHECK11-NEXT: ret void 2502 // 2503 // 2504 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 2505 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2506 // CHECK11-NEXT: entry: 2507 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2508 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2509 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2510 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2511 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2512 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2513 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2514 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2515 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2516 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2517 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2518 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2519 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2520 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2521 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2522 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2523 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2524 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2525 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2526 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2527 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2528 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2529 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2530 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2531 // CHECK11: cond.true: 2532 // CHECK11-NEXT: br label [[COND_END:%.*]] 2533 // CHECK11: cond.false: 2534 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2535 // CHECK11-NEXT: br label [[COND_END]] 2536 // CHECK11: cond.end: 2537 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2538 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2539 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2540 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2541 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2542 // CHECK11: omp.inner.for.cond: 2543 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2544 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2545 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2546 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2547 // CHECK11: omp.inner.for.body: 2548 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2549 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2550 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2551 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2552 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2553 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 2554 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2555 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2556 // CHECK11: omp.body.continue: 2557 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2558 // CHECK11: omp.inner.for.inc: 2559 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2560 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2561 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2562 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 2563 // CHECK11: omp.inner.for.end: 2564 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2565 // CHECK11: omp.loop.exit: 2566 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2567 // CHECK11-NEXT: ret void 2568 // 2569 // 2570 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2571 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2572 // CHECK11-NEXT: entry: 2573 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2574 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2575 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2576 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2577 // CHECK11-NEXT: ret void 2578 // 2579 // 2580 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 2581 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2582 // CHECK11-NEXT: entry: 2583 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2584 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2585 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 2586 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2587 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 2588 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2589 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2590 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2591 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2592 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 2593 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2594 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2595 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 2596 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 2597 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2598 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2599 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2600 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2601 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2602 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2603 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2604 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2605 // CHECK11: omp.dispatch.cond: 2606 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2607 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2608 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2609 // CHECK11: cond.true: 2610 // CHECK11-NEXT: br label [[COND_END:%.*]] 2611 // CHECK11: cond.false: 2612 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2613 // CHECK11-NEXT: br label [[COND_END]] 2614 // CHECK11: cond.end: 2615 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2616 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2617 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2618 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2619 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2620 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2621 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2622 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2623 // CHECK11: omp.dispatch.body: 2624 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2625 // CHECK11: omp.inner.for.cond: 2626 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2627 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 2628 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2629 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2630 // CHECK11: omp.inner.for.body: 2631 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2632 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2633 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2634 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 2635 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 2636 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 2637 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 2638 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2639 // CHECK11: omp.body.continue: 2640 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2641 // CHECK11: omp.inner.for.inc: 2642 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2643 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2644 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 2645 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 2646 // CHECK11: omp.inner.for.end: 2647 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2648 // CHECK11: omp.dispatch.inc: 2649 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2650 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2651 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2652 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2653 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2654 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2655 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2656 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2657 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 2658 // CHECK11: omp.dispatch.end: 2659 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2660 // CHECK11-NEXT: ret void 2661 // 2662 // 2663 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2664 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 2665 // CHECK11-NEXT: entry: 2666 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 2667 // CHECK11-NEXT: ret void 2668 // 2669