1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X];
25 float b;
fooSS26 int foo(void) {
27
28 #pragma omp target teams distribute
29 for(int i = 0; i < X; i++) {
30 a[i] = (T)0;
31 }
32 #pragma omp target teams distribute dist_schedule(static)
33 for(int i = 0; i < X; i++) {
34 a[i] = (T)0;
35 }
36 #pragma omp target teams distribute dist_schedule(static, X/2)
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
39 }
40
41
42
43
44
45
46 return a[0];
47 }
48 };
49
teams_template_struct(void)50 int teams_template_struct(void) {
51 SS<int, 123, 456> V;
52 return V.foo();
53
54 }
55 #endif // CK1
56
57 // Test host codegen.
58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
64
65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
71 #ifdef CK2
72
73 template <typename T, int n>
tmain(T argc)74 int tmain(T argc) {
75 T a[n];
76 #pragma omp target teams distribute
77 for(int i = 0; i < n; i++) {
78 a[i] = (T)0;
79 }
80 #pragma omp target teams distribute dist_schedule(static)
81 for(int i = 0; i < n; i++) {
82 a[i] = (T)0;
83 }
84 #pragma omp target teams distribute dist_schedule(static, n)
85 for(int i = 0; i < n; i++) {
86 a[i] = (T)0;
87 }
88 return 0;
89 }
90
main(int argc,char ** argv)91 int main (int argc, char **argv) {
92 int n = 100;
93 int a[n];
94 #pragma omp target teams distribute
95 for(int i = 0; i < n; i++) {
96 a[i] = 0;
97 }
98 #pragma omp target teams distribute dist_schedule(static)
99 for(int i = 0; i < n; i++) {
100 a[i] = 0;
101 }
102 #pragma omp target teams distribute dist_schedule(static, n)
103 for(int i = 0; i < n; i++) {
104 a[i] = 0;
105 }
106 return tmain<int, 10>(argc);
107 }
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123 #endif // CK2
124 #endif // #ifndef HEADER
125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
127 // CHECK1-NEXT: entry:
128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
130 // CHECK1-NEXT: ret i32 [[CALL]]
131 //
132 //
133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
134 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
135 // CHECK1-NEXT: entry:
136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
148 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
162 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
163 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
164 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
165 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
166 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
167 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
168 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
169 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
170 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
171 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
172 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
173 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
174 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
175 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
176 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
177 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
178 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
179 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
180 // CHECK1-NEXT: store i64 123, i64* [[TMP15]], align 8
181 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
182 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
183 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
184 // CHECK1: omp_offload.failed:
185 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
186 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
187 // CHECK1: omp_offload.cont:
188 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
189 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
190 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
191 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
192 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
193 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
194 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
195 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
196 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
197 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
198 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
199 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
200 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
201 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4
202 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
203 // CHECK1-NEXT: store i32 1, i32* [[TMP26]], align 4
204 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
205 // CHECK1-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
206 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
207 // CHECK1-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
208 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
209 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP29]], align 8
210 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
211 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP30]], align 8
212 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
213 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8
214 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
215 // CHECK1-NEXT: store i8** null, i8*** [[TMP32]], align 8
216 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
217 // CHECK1-NEXT: store i64 123, i64* [[TMP33]], align 8
218 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
219 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
220 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
221 // CHECK1: omp_offload.failed8:
222 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]]
223 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
224 // CHECK1: omp_offload.cont9:
225 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
226 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
227 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
228 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
229 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
230 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
231 // CHECK1-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
232 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
233 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8
234 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
235 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
236 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
237 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
238 // CHECK1-NEXT: store i32 1, i32* [[TMP43]], align 4
239 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
240 // CHECK1-NEXT: store i32 1, i32* [[TMP44]], align 4
241 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
242 // CHECK1-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
243 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
244 // CHECK1-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
245 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
246 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP47]], align 8
247 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
248 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP48]], align 8
249 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
250 // CHECK1-NEXT: store i8** null, i8*** [[TMP49]], align 8
251 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
252 // CHECK1-NEXT: store i8** null, i8*** [[TMP50]], align 8
253 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
254 // CHECK1-NEXT: store i64 123, i64* [[TMP51]], align 8
255 // CHECK1-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
256 // CHECK1-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
257 // CHECK1-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
258 // CHECK1: omp_offload.failed16:
259 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]]
260 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]
261 // CHECK1: omp_offload.cont17:
262 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
263 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i64 0, i64 0
264 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
265 // CHECK1-NEXT: ret i32 [[TMP54]]
266 //
267 //
268 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
269 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
270 // CHECK1-NEXT: entry:
271 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
272 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
273 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
274 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
275 // CHECK1-NEXT: ret void
276 //
277 //
278 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
279 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
280 // CHECK1-NEXT: entry:
281 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
282 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
283 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
284 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
285 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
286 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
287 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
288 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
289 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
290 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
291 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
292 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
293 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
294 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
295 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
296 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
297 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
298 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
299 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
300 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
301 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
302 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
303 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
304 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
305 // CHECK1: cond.true:
306 // CHECK1-NEXT: br label [[COND_END:%.*]]
307 // CHECK1: cond.false:
308 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
309 // CHECK1-NEXT: br label [[COND_END]]
310 // CHECK1: cond.end:
311 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
312 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
313 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
314 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
316 // CHECK1: omp.inner.for.cond:
317 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
318 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
319 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
320 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
321 // CHECK1: omp.inner.for.body:
322 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
323 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
324 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
325 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
326 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
327 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
328 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
329 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
330 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
331 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
332 // CHECK1: omp.body.continue:
333 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
334 // CHECK1: omp.inner.for.inc:
335 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
336 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
337 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
338 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
339 // CHECK1: omp.inner.for.end:
340 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
341 // CHECK1: omp.loop.exit:
342 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
343 // CHECK1-NEXT: ret void
344 //
345 //
346 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
347 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
348 // CHECK1-NEXT: entry:
349 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
350 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
351 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
352 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
353 // CHECK1-NEXT: ret void
354 //
355 //
356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
357 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
358 // CHECK1-NEXT: entry:
359 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
360 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
361 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
362 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
364 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
365 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
366 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
367 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
369 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
370 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
371 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
372 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
373 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
374 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
377 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
378 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
380 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
381 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
382 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
383 // CHECK1: cond.true:
384 // CHECK1-NEXT: br label [[COND_END:%.*]]
385 // CHECK1: cond.false:
386 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
387 // CHECK1-NEXT: br label [[COND_END]]
388 // CHECK1: cond.end:
389 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
390 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
391 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
392 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
394 // CHECK1: omp.inner.for.cond:
395 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
396 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
397 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
398 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
399 // CHECK1: omp.inner.for.body:
400 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
401 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
402 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
403 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
404 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
405 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
406 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
407 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
408 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
409 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
410 // CHECK1: omp.body.continue:
411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
412 // CHECK1: omp.inner.for.inc:
413 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
414 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
415 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
416 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
417 // CHECK1: omp.inner.for.end:
418 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
419 // CHECK1: omp.loop.exit:
420 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
421 // CHECK1-NEXT: ret void
422 //
423 //
424 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
425 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
426 // CHECK1-NEXT: entry:
427 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
428 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
429 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
430 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
431 // CHECK1-NEXT: ret void
432 //
433 //
434 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
435 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
436 // CHECK1-NEXT: entry:
437 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
438 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
439 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
440 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
443 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
444 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
445 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
446 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
447 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
448 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
449 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
450 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
451 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
452 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
453 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
454 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
455 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
456 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
457 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
458 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
459 // CHECK1: omp.dispatch.cond:
460 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
461 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
462 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
463 // CHECK1: cond.true:
464 // CHECK1-NEXT: br label [[COND_END:%.*]]
465 // CHECK1: cond.false:
466 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
467 // CHECK1-NEXT: br label [[COND_END]]
468 // CHECK1: cond.end:
469 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
470 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
471 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
472 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
473 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
474 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
475 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
476 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
477 // CHECK1: omp.dispatch.body:
478 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
479 // CHECK1: omp.inner.for.cond:
480 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
481 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
482 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
483 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
484 // CHECK1: omp.inner.for.body:
485 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
486 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
487 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
488 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
489 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
490 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
491 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
492 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
493 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8
494 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
495 // CHECK1: omp.body.continue:
496 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
497 // CHECK1: omp.inner.for.inc:
498 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
499 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
500 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
502 // CHECK1: omp.inner.for.end:
503 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
504 // CHECK1: omp.dispatch.inc:
505 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
506 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
507 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
508 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
509 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
510 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
511 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
512 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
513 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
514 // CHECK1: omp.dispatch.end:
515 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
516 // CHECK1-NEXT: ret void
517 //
518 //
519 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
520 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
521 // CHECK1-NEXT: entry:
522 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
523 // CHECK1-NEXT: ret void
524 //
525 //
526 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
527 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
528 // CHECK3-NEXT: entry:
529 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
530 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
531 // CHECK3-NEXT: ret i32 [[CALL]]
532 //
533 //
534 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
535 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
536 // CHECK3-NEXT: entry:
537 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
538 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
539 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
540 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
541 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
542 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
543 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
544 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
545 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
546 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
547 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
548 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
549 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
550 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
551 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
552 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
553 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
554 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
555 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
556 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
557 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
558 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
559 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
560 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
561 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
562 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
563 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
564 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
565 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
566 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
567 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
568 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
569 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
570 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
571 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
572 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
573 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
574 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
575 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
576 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
577 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
578 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
579 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
580 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
581 // CHECK3-NEXT: store i64 123, i64* [[TMP15]], align 8
582 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
583 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
584 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
585 // CHECK3: omp_offload.failed:
586 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
587 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
588 // CHECK3: omp_offload.cont:
589 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
590 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
591 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
592 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
593 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
594 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
595 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
596 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
597 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
598 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
599 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
600 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
601 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
602 // CHECK3-NEXT: store i32 1, i32* [[TMP25]], align 4
603 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
604 // CHECK3-NEXT: store i32 1, i32* [[TMP26]], align 4
605 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
606 // CHECK3-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
607 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
608 // CHECK3-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
609 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
610 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP29]], align 4
611 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
612 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP30]], align 4
613 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
614 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 4
615 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
616 // CHECK3-NEXT: store i8** null, i8*** [[TMP32]], align 4
617 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
618 // CHECK3-NEXT: store i64 123, i64* [[TMP33]], align 8
619 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
620 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
621 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
622 // CHECK3: omp_offload.failed8:
623 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]]
624 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
625 // CHECK3: omp_offload.cont9:
626 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
627 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
628 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
629 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
630 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
631 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
632 // CHECK3-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
633 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
634 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4
635 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
636 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
637 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
638 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
639 // CHECK3-NEXT: store i32 1, i32* [[TMP43]], align 4
640 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
641 // CHECK3-NEXT: store i32 1, i32* [[TMP44]], align 4
642 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
643 // CHECK3-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
644 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
645 // CHECK3-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
646 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
647 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP47]], align 4
648 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
649 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP48]], align 4
650 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
651 // CHECK3-NEXT: store i8** null, i8*** [[TMP49]], align 4
652 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
653 // CHECK3-NEXT: store i8** null, i8*** [[TMP50]], align 4
654 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
655 // CHECK3-NEXT: store i64 123, i64* [[TMP51]], align 8
656 // CHECK3-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
657 // CHECK3-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
658 // CHECK3-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
659 // CHECK3: omp_offload.failed16:
660 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]]
661 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]
662 // CHECK3: omp_offload.cont17:
663 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
664 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A18]], i32 0, i32 0
665 // CHECK3-NEXT: [[TMP54:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
666 // CHECK3-NEXT: ret i32 [[TMP54]]
667 //
668 //
669 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
670 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
671 // CHECK3-NEXT: entry:
672 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
673 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
674 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
675 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
676 // CHECK3-NEXT: ret void
677 //
678 //
679 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
680 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
681 // CHECK3-NEXT: entry:
682 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
683 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
684 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
685 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
686 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
687 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
688 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
689 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
690 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
691 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
692 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
693 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
694 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
695 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
696 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
697 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
698 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
699 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
700 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
701 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
702 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
703 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
704 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
705 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
706 // CHECK3: cond.true:
707 // CHECK3-NEXT: br label [[COND_END:%.*]]
708 // CHECK3: cond.false:
709 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
710 // CHECK3-NEXT: br label [[COND_END]]
711 // CHECK3: cond.end:
712 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
713 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
714 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
715 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
716 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
717 // CHECK3: omp.inner.for.cond:
718 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
719 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
720 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
721 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
722 // CHECK3: omp.inner.for.body:
723 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
724 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
725 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
726 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
727 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
728 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
729 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
730 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
731 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
732 // CHECK3: omp.body.continue:
733 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
734 // CHECK3: omp.inner.for.inc:
735 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
736 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
737 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
738 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
739 // CHECK3: omp.inner.for.end:
740 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
741 // CHECK3: omp.loop.exit:
742 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
743 // CHECK3-NEXT: ret void
744 //
745 //
746 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
747 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
748 // CHECK3-NEXT: entry:
749 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
750 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
751 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
752 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
753 // CHECK3-NEXT: ret void
754 //
755 //
756 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
757 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
758 // CHECK3-NEXT: entry:
759 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
760 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
761 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
762 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
763 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
764 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
765 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
766 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
767 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
768 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
769 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
770 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
771 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
772 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
773 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
774 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
775 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
776 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
777 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
778 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
779 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
780 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
781 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
782 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
783 // CHECK3: cond.true:
784 // CHECK3-NEXT: br label [[COND_END:%.*]]
785 // CHECK3: cond.false:
786 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
787 // CHECK3-NEXT: br label [[COND_END]]
788 // CHECK3: cond.end:
789 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
790 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
791 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
792 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
793 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
794 // CHECK3: omp.inner.for.cond:
795 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
796 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
797 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
798 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
799 // CHECK3: omp.inner.for.body:
800 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
801 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
802 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
803 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
804 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
805 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
806 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]]
807 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
808 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
809 // CHECK3: omp.body.continue:
810 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
811 // CHECK3: omp.inner.for.inc:
812 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
813 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
814 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
815 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
816 // CHECK3: omp.inner.for.end:
817 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
818 // CHECK3: omp.loop.exit:
819 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
820 // CHECK3-NEXT: ret void
821 //
822 //
823 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
824 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
825 // CHECK3-NEXT: entry:
826 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
827 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
828 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
829 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
830 // CHECK3-NEXT: ret void
831 //
832 //
833 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
834 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
835 // CHECK3-NEXT: entry:
836 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
837 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
838 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
839 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
840 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
841 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
842 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
843 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
844 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
845 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
846 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
847 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
848 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
849 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
850 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
851 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
852 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
853 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
854 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
855 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
856 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
857 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
858 // CHECK3: omp.dispatch.cond:
859 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
860 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
861 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
862 // CHECK3: cond.true:
863 // CHECK3-NEXT: br label [[COND_END:%.*]]
864 // CHECK3: cond.false:
865 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
866 // CHECK3-NEXT: br label [[COND_END]]
867 // CHECK3: cond.end:
868 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
869 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
870 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
871 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
872 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
873 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
874 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
875 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
876 // CHECK3: omp.dispatch.body:
877 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
878 // CHECK3: omp.inner.for.cond:
879 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
880 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
881 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
882 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
883 // CHECK3: omp.inner.for.body:
884 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
885 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
886 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
887 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
888 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
889 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
890 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
891 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
892 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
893 // CHECK3: omp.body.continue:
894 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
895 // CHECK3: omp.inner.for.inc:
896 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
897 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
898 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
899 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
900 // CHECK3: omp.inner.for.end:
901 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
902 // CHECK3: omp.dispatch.inc:
903 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
904 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
905 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
906 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
907 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
908 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
909 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
910 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
911 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
912 // CHECK3: omp.dispatch.end:
913 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
914 // CHECK3-NEXT: ret void
915 //
916 //
917 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
918 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
919 // CHECK3-NEXT: entry:
920 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
921 // CHECK3-NEXT: ret void
922 //
923 //
924 // CHECK9-LABEL: define {{[^@]+}}@main
925 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
926 // CHECK9-NEXT: entry:
927 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
928 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
929 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
930 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
931 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
932 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
933 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
934 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
935 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
936 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
937 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
938 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
939 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
940 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
941 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
942 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
943 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
944 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
945 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
946 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
947 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
948 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
949 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_19:%.*]] = alloca i32, align 4
950 // CHECK9-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
951 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
952 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [4 x i8*], align 8
953 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [4 x i8*], align 8
954 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [4 x i8*], align 8
955 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES26:%.*]] = alloca [4 x i64], align 8
956 // CHECK9-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
957 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
958 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_29:%.*]] = alloca i32, align 4
959 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
960 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
961 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
962 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
963 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
964 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
965 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
966 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
967 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
968 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
969 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
970 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
971 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
972 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
973 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
974 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
975 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
976 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
977 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
978 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
979 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
980 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
981 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
982 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
983 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
984 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
985 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
986 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
987 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
988 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
989 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
990 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
991 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
992 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
993 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
994 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
995 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
996 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
997 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
998 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
999 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
1000 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1001 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
1002 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1003 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1004 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1005 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
1006 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
1007 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1008 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
1009 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1010 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1011 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1012 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1013 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
1014 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
1015 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1016 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1017 // CHECK9-NEXT: store i32 1, i32* [[TMP30]], align 4
1018 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1019 // CHECK9-NEXT: store i32 3, i32* [[TMP31]], align 4
1020 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1021 // CHECK9-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
1022 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1023 // CHECK9-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
1024 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1025 // CHECK9-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
1026 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1027 // CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
1028 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1029 // CHECK9-NEXT: store i8** null, i8*** [[TMP36]], align 8
1030 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1031 // CHECK9-NEXT: store i8** null, i8*** [[TMP37]], align 8
1032 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1033 // CHECK9-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
1034 // CHECK9-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1035 // CHECK9-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
1036 // CHECK9-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1037 // CHECK9: omp_offload.failed:
1038 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1039 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1040 // CHECK9: omp_offload.cont:
1041 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
1042 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
1043 // CHECK9-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
1044 // CHECK9-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
1045 // CHECK9-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
1046 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
1047 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false)
1048 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1049 // CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
1050 // CHECK9-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
1051 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1052 // CHECK9-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
1053 // CHECK9-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
1054 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
1055 // CHECK9-NEXT: store i8* null, i8** [[TMP49]], align 8
1056 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
1057 // CHECK9-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
1058 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
1059 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
1060 // CHECK9-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
1061 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
1062 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
1063 // CHECK9-NEXT: store i8* null, i8** [[TMP54]], align 8
1064 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
1065 // CHECK9-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
1066 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
1067 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
1068 // CHECK9-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
1069 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
1070 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
1071 // CHECK9-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
1072 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
1073 // CHECK9-NEXT: store i8* null, i8** [[TMP60]], align 8
1074 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
1075 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
1076 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
1077 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
1078 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
1079 // CHECK9-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
1080 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
1081 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
1082 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
1083 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
1084 // CHECK9-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
1085 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
1086 // CHECK9-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
1087 // CHECK9-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1088 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
1089 // CHECK9-NEXT: store i32 1, i32* [[TMP68]], align 4
1090 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
1091 // CHECK9-NEXT: store i32 3, i32* [[TMP69]], align 4
1092 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
1093 // CHECK9-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
1094 // CHECK9-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
1095 // CHECK9-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
1096 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
1097 // CHECK9-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
1098 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
1099 // CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP73]], align 8
1100 // CHECK9-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
1101 // CHECK9-NEXT: store i8** null, i8*** [[TMP74]], align 8
1102 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
1103 // CHECK9-NEXT: store i8** null, i8*** [[TMP75]], align 8
1104 // CHECK9-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
1105 // CHECK9-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
1106 // CHECK9-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
1107 // CHECK9-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
1108 // CHECK9-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
1109 // CHECK9: omp_offload.failed17:
1110 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
1111 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT18]]
1112 // CHECK9: omp_offload.cont18:
1113 // CHECK9-NEXT: [[TMP79:%.*]] = load i32, i32* [[N]], align 4
1114 // CHECK9-NEXT: store i32 [[TMP79]], i32* [[DOTCAPTURE_EXPR_19]], align 4
1115 // CHECK9-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
1116 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
1117 // CHECK9-NEXT: store i32 [[TMP80]], i32* [[CONV21]], align 4
1118 // CHECK9-NEXT: [[TMP81:%.*]] = load i64, i64* [[N_CASTED20]], align 8
1119 // CHECK9-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_19]], align 4
1120 // CHECK9-NEXT: [[CONV22:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
1121 // CHECK9-NEXT: store i32 [[TMP82]], i32* [[CONV22]], align 4
1122 // CHECK9-NEXT: [[TMP83:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1123 // CHECK9-NEXT: [[TMP84:%.*]] = mul nuw i64 [[TMP1]], 4
1124 // CHECK9-NEXT: [[TMP85:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES26]] to i8*
1125 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP85]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false)
1126 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
1127 // CHECK9-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64*
1128 // CHECK9-NEXT: store i64 [[TMP81]], i64* [[TMP87]], align 8
1129 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
1130 // CHECK9-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i64*
1131 // CHECK9-NEXT: store i64 [[TMP81]], i64* [[TMP89]], align 8
1132 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
1133 // CHECK9-NEXT: store i8* null, i8** [[TMP90]], align 8
1134 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
1135 // CHECK9-NEXT: [[TMP92:%.*]] = bitcast i8** [[TMP91]] to i64*
1136 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP92]], align 8
1137 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
1138 // CHECK9-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i64*
1139 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP94]], align 8
1140 // CHECK9-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
1141 // CHECK9-NEXT: store i8* null, i8** [[TMP95]], align 8
1142 // CHECK9-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 2
1143 // CHECK9-NEXT: [[TMP97:%.*]] = bitcast i8** [[TMP96]] to i32**
1144 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP97]], align 8
1145 // CHECK9-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 2
1146 // CHECK9-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
1147 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 8
1148 // CHECK9-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 2
1149 // CHECK9-NEXT: store i64 [[TMP84]], i64* [[TMP100]], align 8
1150 // CHECK9-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 2
1151 // CHECK9-NEXT: store i8* null, i8** [[TMP101]], align 8
1152 // CHECK9-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 3
1153 // CHECK9-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i64*
1154 // CHECK9-NEXT: store i64 [[TMP83]], i64* [[TMP103]], align 8
1155 // CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 3
1156 // CHECK9-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
1157 // CHECK9-NEXT: store i64 [[TMP83]], i64* [[TMP105]], align 8
1158 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 3
1159 // CHECK9-NEXT: store i8* null, i8** [[TMP106]], align 8
1160 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
1161 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
1162 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES26]], i32 0, i32 0
1163 // CHECK9-NEXT: [[TMP110:%.*]] = load i32, i32* [[N]], align 4
1164 // CHECK9-NEXT: store i32 [[TMP110]], i32* [[DOTCAPTURE_EXPR_28]], align 4
1165 // CHECK9-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
1166 // CHECK9-NEXT: [[SUB30:%.*]] = sub nsw i32 [[TMP111]], 0
1167 // CHECK9-NEXT: [[DIV31:%.*]] = sdiv i32 [[SUB30]], 1
1168 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i32 [[DIV31]], 1
1169 // CHECK9-NEXT: store i32 [[SUB32]], i32* [[DOTCAPTURE_EXPR_29]], align 4
1170 // CHECK9-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_29]], align 4
1171 // CHECK9-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP112]], 1
1172 // CHECK9-NEXT: [[TMP113:%.*]] = zext i32 [[ADD33]] to i64
1173 // CHECK9-NEXT: [[KERNEL_ARGS34:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1174 // CHECK9-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 0
1175 // CHECK9-NEXT: store i32 1, i32* [[TMP114]], align 4
1176 // CHECK9-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 1
1177 // CHECK9-NEXT: store i32 4, i32* [[TMP115]], align 4
1178 // CHECK9-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 2
1179 // CHECK9-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
1180 // CHECK9-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 3
1181 // CHECK9-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 8
1182 // CHECK9-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 4
1183 // CHECK9-NEXT: store i64* [[TMP109]], i64** [[TMP118]], align 8
1184 // CHECK9-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 5
1185 // CHECK9-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP119]], align 8
1186 // CHECK9-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 6
1187 // CHECK9-NEXT: store i8** null, i8*** [[TMP120]], align 8
1188 // CHECK9-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 7
1189 // CHECK9-NEXT: store i8** null, i8*** [[TMP121]], align 8
1190 // CHECK9-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]], i32 0, i32 8
1191 // CHECK9-NEXT: store i64 [[TMP113]], i64* [[TMP122]], align 8
1192 // CHECK9-NEXT: [[TMP123:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS34]])
1193 // CHECK9-NEXT: [[TMP124:%.*]] = icmp ne i32 [[TMP123]], 0
1194 // CHECK9-NEXT: br i1 [[TMP124]], label [[OMP_OFFLOAD_FAILED35:%.*]], label [[OMP_OFFLOAD_CONT36:%.*]]
1195 // CHECK9: omp_offload.failed35:
1196 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP81]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP83]]) #[[ATTR3]]
1197 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT36]]
1198 // CHECK9: omp_offload.cont36:
1199 // CHECK9-NEXT: [[TMP125:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1200 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP125]])
1201 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1202 // CHECK9-NEXT: [[TMP126:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1203 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP126]])
1204 // CHECK9-NEXT: [[TMP127:%.*]] = load i32, i32* [[RETVAL]], align 4
1205 // CHECK9-NEXT: ret i32 [[TMP127]]
1206 //
1207 //
1208 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
1209 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1210 // CHECK9-NEXT: entry:
1211 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1212 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1213 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1214 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1215 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1216 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1217 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1218 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1219 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1220 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1221 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1222 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1223 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
1224 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1225 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
1226 // CHECK9-NEXT: ret void
1227 //
1228 //
1229 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1230 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1231 // CHECK9-NEXT: entry:
1232 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1233 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1234 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1235 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1236 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1237 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1238 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1239 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1240 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1241 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1242 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1243 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1244 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1245 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1246 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1247 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1248 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1249 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1250 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1251 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1252 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1253 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1254 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1255 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1256 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1257 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1258 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1259 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1260 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1261 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1262 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1263 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1264 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1265 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1266 // CHECK9: omp.precond.then:
1267 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1268 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1269 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1270 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1271 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1272 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1273 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1274 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1275 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1276 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1277 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1278 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1279 // CHECK9: cond.true:
1280 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1281 // CHECK9-NEXT: br label [[COND_END:%.*]]
1282 // CHECK9: cond.false:
1283 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1284 // CHECK9-NEXT: br label [[COND_END]]
1285 // CHECK9: cond.end:
1286 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1287 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1288 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1289 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1290 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1291 // CHECK9: omp.inner.for.cond:
1292 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1293 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1294 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1295 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1296 // CHECK9: omp.inner.for.body:
1297 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1298 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1299 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1300 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1301 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
1302 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1303 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1304 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1305 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1306 // CHECK9: omp.body.continue:
1307 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1308 // CHECK9: omp.inner.for.inc:
1309 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1310 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1311 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1312 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1313 // CHECK9: omp.inner.for.end:
1314 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1315 // CHECK9: omp.loop.exit:
1316 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1317 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1318 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1319 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1320 // CHECK9: omp.precond.end:
1321 // CHECK9-NEXT: ret void
1322 //
1323 //
1324 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
1325 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1326 // CHECK9-NEXT: entry:
1327 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1328 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1329 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1330 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1331 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1332 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1333 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1334 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1335 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1336 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1337 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1338 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1339 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
1340 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1341 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]])
1342 // CHECK9-NEXT: ret void
1343 //
1344 //
1345 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1346 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1347 // CHECK9-NEXT: entry:
1348 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1349 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1350 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1351 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1352 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1353 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1354 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1355 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1356 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1357 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1358 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1359 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1360 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1361 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1362 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1363 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1364 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1365 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1366 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1367 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1368 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1369 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1370 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1371 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1372 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
1373 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1374 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1375 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1376 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1377 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1378 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1379 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1380 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1381 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1382 // CHECK9: omp.precond.then:
1383 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1384 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1385 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1386 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1387 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1388 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1389 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1390 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1391 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1392 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1393 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1394 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1395 // CHECK9: cond.true:
1396 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1397 // CHECK9-NEXT: br label [[COND_END:%.*]]
1398 // CHECK9: cond.false:
1399 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1400 // CHECK9-NEXT: br label [[COND_END]]
1401 // CHECK9: cond.end:
1402 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1403 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1404 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1405 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
1406 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1407 // CHECK9: omp.inner.for.cond:
1408 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1409 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1410 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1411 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1412 // CHECK9: omp.inner.for.body:
1413 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1414 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1415 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1416 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
1417 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
1418 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1419 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1420 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1421 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1422 // CHECK9: omp.body.continue:
1423 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1424 // CHECK9: omp.inner.for.inc:
1425 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1426 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1427 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1428 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1429 // CHECK9: omp.inner.for.end:
1430 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1431 // CHECK9: omp.loop.exit:
1432 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1433 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
1434 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
1435 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1436 // CHECK9: omp.precond.end:
1437 // CHECK9-NEXT: ret void
1438 //
1439 //
1440 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
1441 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1442 // CHECK9-NEXT: entry:
1443 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1444 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1445 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1446 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1447 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1448 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1449 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1450 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1451 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1452 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1453 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1454 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1455 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1456 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1457 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1458 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1459 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4
1460 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8
1461 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4
1462 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
1463 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4
1464 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1465 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]])
1466 // CHECK9-NEXT: ret void
1467 //
1468 //
1469 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
1470 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1471 // CHECK9-NEXT: entry:
1472 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1473 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1474 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1475 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1476 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1477 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1478 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1479 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1480 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1481 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1482 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1483 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1484 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1485 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1486 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1487 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4
1488 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1489 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1490 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1491 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1492 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1493 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1494 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1495 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1496 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1497 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
1498 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1499 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1500 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1501 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1502 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1503 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
1504 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1505 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1506 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1507 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1508 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1509 // CHECK9: omp.precond.then:
1510 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1511 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1512 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
1513 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1514 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1515 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4
1516 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1517 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1518 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
1519 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1520 // CHECK9: omp.dispatch.cond:
1521 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1522 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1523 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1524 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1525 // CHECK9: cond.true:
1526 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1527 // CHECK9-NEXT: br label [[COND_END:%.*]]
1528 // CHECK9: cond.false:
1529 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1530 // CHECK9-NEXT: br label [[COND_END]]
1531 // CHECK9: cond.end:
1532 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1533 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1534 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1535 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1536 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1537 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1538 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1539 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1540 // CHECK9: omp.dispatch.body:
1541 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1542 // CHECK9: omp.inner.for.cond:
1543 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1544 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
1545 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1546 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1547 // CHECK9: omp.inner.for.body:
1548 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1549 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1550 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1551 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !11
1552 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !11
1553 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
1554 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]]
1555 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
1556 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1557 // CHECK9: omp.body.continue:
1558 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1559 // CHECK9: omp.inner.for.inc:
1560 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1561 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
1562 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
1563 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1564 // CHECK9: omp.inner.for.end:
1565 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1566 // CHECK9: omp.dispatch.inc:
1567 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1568 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1569 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1570 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4
1571 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1572 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1573 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
1574 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4
1575 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
1576 // CHECK9: omp.dispatch.end:
1577 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1578 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
1579 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
1580 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1581 // CHECK9: omp.precond.end:
1582 // CHECK9-NEXT: ret void
1583 //
1584 //
1585 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
1586 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1587 // CHECK9-NEXT: entry:
1588 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1589 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
1590 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1591 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1592 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1593 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1594 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
1595 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
1596 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
1597 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1598 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x i8*], align 8
1599 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x i8*], align 8
1600 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x i8*], align 8
1601 // CHECK9-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
1602 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1603 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1604 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
1605 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
1606 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1607 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
1608 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
1609 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1610 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1611 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1612 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1613 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1614 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1615 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4
1616 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1617 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
1618 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1619 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
1620 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1621 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
1622 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1623 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP11]], align 8
1624 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1625 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP12]], align 8
1626 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1627 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
1628 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1629 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
1630 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1631 // CHECK9-NEXT: store i64 10, i64* [[TMP15]], align 8
1632 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1633 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1634 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1635 // CHECK9: omp_offload.failed:
1636 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]]
1637 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1638 // CHECK9: omp_offload.cont:
1639 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1640 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
1641 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
1642 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1643 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
1644 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
1645 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
1646 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
1647 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1648 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1649 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1650 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
1651 // CHECK9-NEXT: store i32 1, i32* [[TMP25]], align 4
1652 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
1653 // CHECK9-NEXT: store i32 1, i32* [[TMP26]], align 4
1654 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
1655 // CHECK9-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
1656 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
1657 // CHECK9-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
1658 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
1659 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP29]], align 8
1660 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
1661 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP30]], align 8
1662 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
1663 // CHECK9-NEXT: store i8** null, i8*** [[TMP31]], align 8
1664 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
1665 // CHECK9-NEXT: store i8** null, i8*** [[TMP32]], align 8
1666 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
1667 // CHECK9-NEXT: store i64 10, i64* [[TMP33]], align 8
1668 // CHECK9-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
1669 // CHECK9-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1670 // CHECK9-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1671 // CHECK9: omp_offload.failed6:
1672 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]]
1673 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]
1674 // CHECK9: omp_offload.cont7:
1675 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1676 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
1677 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
1678 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1679 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [10 x i32]**
1680 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP39]], align 8
1681 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
1682 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8
1683 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1684 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1685 // CHECK9-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1686 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
1687 // CHECK9-NEXT: store i32 1, i32* [[TMP43]], align 4
1688 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
1689 // CHECK9-NEXT: store i32 1, i32* [[TMP44]], align 4
1690 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
1691 // CHECK9-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
1692 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
1693 // CHECK9-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
1694 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
1695 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP47]], align 8
1696 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
1697 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP48]], align 8
1698 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
1699 // CHECK9-NEXT: store i8** null, i8*** [[TMP49]], align 8
1700 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
1701 // CHECK9-NEXT: store i8** null, i8*** [[TMP50]], align 8
1702 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
1703 // CHECK9-NEXT: store i64 10, i64* [[TMP51]], align 8
1704 // CHECK9-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
1705 // CHECK9-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
1706 // CHECK9-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
1707 // CHECK9: omp_offload.failed13:
1708 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
1709 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT14]]
1710 // CHECK9: omp_offload.cont14:
1711 // CHECK9-NEXT: ret i32 0
1712 //
1713 //
1714 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
1715 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1716 // CHECK9-NEXT: entry:
1717 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
1718 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
1719 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
1720 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
1721 // CHECK9-NEXT: ret void
1722 //
1723 //
1724 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
1725 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1726 // CHECK9-NEXT: entry:
1727 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1728 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1729 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
1730 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1731 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1732 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1733 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1734 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1735 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1736 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1737 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1738 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1739 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
1740 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
1741 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1742 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1743 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1744 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1745 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1746 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1747 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1748 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1749 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1750 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1751 // CHECK9: cond.true:
1752 // CHECK9-NEXT: br label [[COND_END:%.*]]
1753 // CHECK9: cond.false:
1754 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1755 // CHECK9-NEXT: br label [[COND_END]]
1756 // CHECK9: cond.end:
1757 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1758 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1759 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1760 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1761 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1762 // CHECK9: omp.inner.for.cond:
1763 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1764 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1765 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1766 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1767 // CHECK9: omp.inner.for.body:
1768 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1769 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1770 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1771 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1772 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1773 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
1774 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1775 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1776 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1777 // CHECK9: omp.body.continue:
1778 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1779 // CHECK9: omp.inner.for.inc:
1780 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1781 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1782 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1783 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1784 // CHECK9: omp.inner.for.end:
1785 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1786 // CHECK9: omp.loop.exit:
1787 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1788 // CHECK9-NEXT: ret void
1789 //
1790 //
1791 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
1792 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1793 // CHECK9-NEXT: entry:
1794 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
1795 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
1796 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
1797 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
1798 // CHECK9-NEXT: ret void
1799 //
1800 //
1801 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
1802 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1803 // CHECK9-NEXT: entry:
1804 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1805 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1806 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
1807 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1808 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1809 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1810 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1811 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1812 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1813 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1814 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1815 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1816 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
1817 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
1818 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1819 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1820 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1821 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1822 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1823 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1824 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1825 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1826 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1827 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1828 // CHECK9: cond.true:
1829 // CHECK9-NEXT: br label [[COND_END:%.*]]
1830 // CHECK9: cond.false:
1831 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1832 // CHECK9-NEXT: br label [[COND_END]]
1833 // CHECK9: cond.end:
1834 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1835 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1836 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1837 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1838 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1839 // CHECK9: omp.inner.for.cond:
1840 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1841 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1842 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1843 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1844 // CHECK9: omp.inner.for.body:
1845 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1846 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1847 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1848 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1849 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1850 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
1851 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1852 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1853 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1854 // CHECK9: omp.body.continue:
1855 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1856 // CHECK9: omp.inner.for.inc:
1857 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1858 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1859 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1860 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1861 // CHECK9: omp.inner.for.end:
1862 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1863 // CHECK9: omp.loop.exit:
1864 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1865 // CHECK9-NEXT: ret void
1866 //
1867 //
1868 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
1869 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1870 // CHECK9-NEXT: entry:
1871 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
1872 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
1873 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
1874 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
1875 // CHECK9-NEXT: ret void
1876 //
1877 //
1878 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
1879 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1880 // CHECK9-NEXT: entry:
1881 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1882 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1883 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
1884 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1885 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1886 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1887 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1888 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1889 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1890 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1891 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1892 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1893 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
1894 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
1895 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1896 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
1897 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1898 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1899 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1900 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1901 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
1902 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1903 // CHECK9: omp.dispatch.cond:
1904 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1905 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1906 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1907 // CHECK9: cond.true:
1908 // CHECK9-NEXT: br label [[COND_END:%.*]]
1909 // CHECK9: cond.false:
1910 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1911 // CHECK9-NEXT: br label [[COND_END]]
1912 // CHECK9: cond.end:
1913 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1914 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1915 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1916 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1917 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1918 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1919 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1920 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1921 // CHECK9: omp.dispatch.body:
1922 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1923 // CHECK9: omp.inner.for.cond:
1924 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1925 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
1926 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1927 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1928 // CHECK9: omp.inner.for.body:
1929 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1930 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1931 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1932 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
1933 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
1934 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1935 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1936 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
1937 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1938 // CHECK9: omp.body.continue:
1939 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1940 // CHECK9: omp.inner.for.inc:
1941 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1942 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1943 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1944 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1945 // CHECK9: omp.inner.for.end:
1946 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1947 // CHECK9: omp.dispatch.inc:
1948 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1949 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1950 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1951 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1952 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1953 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1954 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1955 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1956 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
1957 // CHECK9: omp.dispatch.end:
1958 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1959 // CHECK9-NEXT: ret void
1960 //
1961 //
1962 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1963 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1964 // CHECK9-NEXT: entry:
1965 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1966 // CHECK9-NEXT: ret void
1967 //
1968 //
1969 // CHECK11-LABEL: define {{[^@]+}}@main
1970 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1971 // CHECK11-NEXT: entry:
1972 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1973 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1974 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
1975 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
1976 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
1977 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
1978 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1979 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
1980 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
1981 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
1982 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
1983 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1984 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1985 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1986 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
1987 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
1988 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
1989 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
1990 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
1991 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
1992 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
1993 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1994 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
1995 // CHECK11-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4
1996 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1997 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x i8*], align 4
1998 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x i8*], align 4
1999 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x i8*], align 4
2000 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
2001 // CHECK11-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
2002 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
2003 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
2004 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2005 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2006 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
2007 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
2008 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2009 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
2010 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
2011 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
2012 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2013 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
2014 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2015 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2016 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
2017 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
2018 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
2019 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
2020 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2021 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2022 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
2023 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2024 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2025 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2026 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2027 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
2028 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2029 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
2030 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
2031 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2032 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
2033 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
2034 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2035 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
2036 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2037 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
2038 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
2039 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2040 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
2041 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
2042 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2043 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
2044 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2045 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
2046 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2047 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2048 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2049 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
2050 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
2051 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2052 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
2053 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2054 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2055 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2056 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2057 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
2058 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
2059 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2060 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2061 // CHECK11-NEXT: store i32 1, i32* [[TMP30]], align 4
2062 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2063 // CHECK11-NEXT: store i32 3, i32* [[TMP31]], align 4
2064 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2065 // CHECK11-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
2066 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2067 // CHECK11-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
2068 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2069 // CHECK11-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
2070 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2071 // CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
2072 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2073 // CHECK11-NEXT: store i8** null, i8*** [[TMP36]], align 4
2074 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2075 // CHECK11-NEXT: store i8** null, i8*** [[TMP37]], align 4
2076 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2077 // CHECK11-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
2078 // CHECK11-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2079 // CHECK11-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
2080 // CHECK11-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2081 // CHECK11: omp_offload.failed:
2082 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2083 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2084 // CHECK11: omp_offload.cont:
2085 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
2086 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
2087 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
2088 // CHECK11-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
2089 // CHECK11-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
2090 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
2091 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false)
2092 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2093 // CHECK11-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
2094 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
2095 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2096 // CHECK11-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
2097 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
2098 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
2099 // CHECK11-NEXT: store i8* null, i8** [[TMP50]], align 4
2100 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
2101 // CHECK11-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
2102 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
2103 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
2104 // CHECK11-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
2105 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
2106 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
2107 // CHECK11-NEXT: store i8* null, i8** [[TMP55]], align 4
2108 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
2109 // CHECK11-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
2110 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
2111 // CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
2112 // CHECK11-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
2113 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
2114 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
2115 // CHECK11-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
2116 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
2117 // CHECK11-NEXT: store i8* null, i8** [[TMP61]], align 4
2118 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2119 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2120 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
2121 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
2122 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
2123 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
2124 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
2125 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2126 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
2127 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
2128 // CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
2129 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
2130 // CHECK11-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
2131 // CHECK11-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2132 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
2133 // CHECK11-NEXT: store i32 1, i32* [[TMP69]], align 4
2134 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
2135 // CHECK11-NEXT: store i32 3, i32* [[TMP70]], align 4
2136 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
2137 // CHECK11-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
2138 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
2139 // CHECK11-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
2140 // CHECK11-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
2141 // CHECK11-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
2142 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
2143 // CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP74]], align 4
2144 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
2145 // CHECK11-NEXT: store i8** null, i8*** [[TMP75]], align 4
2146 // CHECK11-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
2147 // CHECK11-NEXT: store i8** null, i8*** [[TMP76]], align 4
2148 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
2149 // CHECK11-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
2150 // CHECK11-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
2151 // CHECK11-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
2152 // CHECK11-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2153 // CHECK11: omp_offload.failed16:
2154 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
2155 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2156 // CHECK11: omp_offload.cont17:
2157 // CHECK11-NEXT: [[TMP80:%.*]] = load i32, i32* [[N]], align 4
2158 // CHECK11-NEXT: store i32 [[TMP80]], i32* [[DOTCAPTURE_EXPR_18]], align 4
2159 // CHECK11-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
2160 // CHECK11-NEXT: store i32 [[TMP81]], i32* [[N_CASTED19]], align 4
2161 // CHECK11-NEXT: [[TMP82:%.*]] = load i32, i32* [[N_CASTED19]], align 4
2162 // CHECK11-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4
2163 // CHECK11-NEXT: store i32 [[TMP83]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2164 // CHECK11-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2165 // CHECK11-NEXT: [[TMP85:%.*]] = mul nuw i32 [[TMP0]], 4
2166 // CHECK11-NEXT: [[TMP86:%.*]] = sext i32 [[TMP85]] to i64
2167 // CHECK11-NEXT: [[TMP87:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES23]] to i8*
2168 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP87]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false)
2169 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2170 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32*
2171 // CHECK11-NEXT: store i32 [[TMP82]], i32* [[TMP89]], align 4
2172 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2173 // CHECK11-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32*
2174 // CHECK11-NEXT: store i32 [[TMP82]], i32* [[TMP91]], align 4
2175 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
2176 // CHECK11-NEXT: store i8* null, i8** [[TMP92]], align 4
2177 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
2178 // CHECK11-NEXT: [[TMP94:%.*]] = bitcast i8** [[TMP93]] to i32*
2179 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP94]], align 4
2180 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
2181 // CHECK11-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i32*
2182 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP96]], align 4
2183 // CHECK11-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
2184 // CHECK11-NEXT: store i8* null, i8** [[TMP97]], align 4
2185 // CHECK11-NEXT: [[TMP98:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
2186 // CHECK11-NEXT: [[TMP99:%.*]] = bitcast i8** [[TMP98]] to i32**
2187 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP99]], align 4
2188 // CHECK11-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
2189 // CHECK11-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
2190 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 4
2191 // CHECK11-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
2192 // CHECK11-NEXT: store i64 [[TMP86]], i64* [[TMP102]], align 4
2193 // CHECK11-NEXT: [[TMP103:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
2194 // CHECK11-NEXT: store i8* null, i8** [[TMP103]], align 4
2195 // CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
2196 // CHECK11-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32*
2197 // CHECK11-NEXT: store i32 [[TMP84]], i32* [[TMP105]], align 4
2198 // CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
2199 // CHECK11-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32*
2200 // CHECK11-NEXT: store i32 [[TMP84]], i32* [[TMP107]], align 4
2201 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
2202 // CHECK11-NEXT: store i8* null, i8** [[TMP108]], align 4
2203 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2204 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2205 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
2206 // CHECK11-NEXT: [[TMP112:%.*]] = load i32, i32* [[N]], align 4
2207 // CHECK11-NEXT: store i32 [[TMP112]], i32* [[DOTCAPTURE_EXPR_25]], align 4
2208 // CHECK11-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
2209 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP113]], 0
2210 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
2211 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
2212 // CHECK11-NEXT: store i32 [[SUB29]], i32* [[DOTCAPTURE_EXPR_26]], align 4
2213 // CHECK11-NEXT: [[TMP114:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
2214 // CHECK11-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP114]], 1
2215 // CHECK11-NEXT: [[TMP115:%.*]] = zext i32 [[ADD30]] to i64
2216 // CHECK11-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2217 // CHECK11-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
2218 // CHECK11-NEXT: store i32 1, i32* [[TMP116]], align 4
2219 // CHECK11-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
2220 // CHECK11-NEXT: store i32 4, i32* [[TMP117]], align 4
2221 // CHECK11-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
2222 // CHECK11-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
2223 // CHECK11-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
2224 // CHECK11-NEXT: store i8** [[TMP110]], i8*** [[TMP119]], align 4
2225 // CHECK11-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
2226 // CHECK11-NEXT: store i64* [[TMP111]], i64** [[TMP120]], align 4
2227 // CHECK11-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
2228 // CHECK11-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP121]], align 4
2229 // CHECK11-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
2230 // CHECK11-NEXT: store i8** null, i8*** [[TMP122]], align 4
2231 // CHECK11-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
2232 // CHECK11-NEXT: store i8** null, i8*** [[TMP123]], align 4
2233 // CHECK11-NEXT: [[TMP124:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
2234 // CHECK11-NEXT: store i64 [[TMP115]], i64* [[TMP124]], align 8
2235 // CHECK11-NEXT: [[TMP125:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
2236 // CHECK11-NEXT: [[TMP126:%.*]] = icmp ne i32 [[TMP125]], 0
2237 // CHECK11-NEXT: br i1 [[TMP126]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2238 // CHECK11: omp_offload.failed32:
2239 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP82]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP84]]) #[[ATTR3]]
2240 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT33]]
2241 // CHECK11: omp_offload.cont33:
2242 // CHECK11-NEXT: [[TMP127:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2243 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP127]])
2244 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2245 // CHECK11-NEXT: [[TMP128:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
2246 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP128]])
2247 // CHECK11-NEXT: [[TMP129:%.*]] = load i32, i32* [[RETVAL]], align 4
2248 // CHECK11-NEXT: ret i32 [[TMP129]]
2249 //
2250 //
2251 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
2252 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2253 // CHECK11-NEXT: entry:
2254 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2255 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2256 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2257 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2258 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2259 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2260 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2261 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2262 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2263 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2264 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2265 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2266 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
2267 // CHECK11-NEXT: ret void
2268 //
2269 //
2270 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2271 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2272 // CHECK11-NEXT: entry:
2273 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2274 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2275 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2276 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2277 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2278 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2279 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2280 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2281 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2282 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2283 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2284 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2285 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2286 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2287 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2288 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2289 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2290 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2291 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2292 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2293 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2294 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2295 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2296 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2297 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2298 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2299 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2300 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2301 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2302 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2303 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2304 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2305 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2306 // CHECK11: omp.precond.then:
2307 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2308 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2309 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2310 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2311 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2312 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2313 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2314 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2315 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2316 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2317 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2318 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2319 // CHECK11: cond.true:
2320 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2321 // CHECK11-NEXT: br label [[COND_END:%.*]]
2322 // CHECK11: cond.false:
2323 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2324 // CHECK11-NEXT: br label [[COND_END]]
2325 // CHECK11: cond.end:
2326 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2327 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2328 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2329 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2330 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2331 // CHECK11: omp.inner.for.cond:
2332 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2333 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2334 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2335 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2336 // CHECK11: omp.inner.for.body:
2337 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2338 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2339 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2340 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2341 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
2342 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
2343 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2344 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2345 // CHECK11: omp.body.continue:
2346 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2347 // CHECK11: omp.inner.for.inc:
2348 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2349 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2350 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2351 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2352 // CHECK11: omp.inner.for.end:
2353 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2354 // CHECK11: omp.loop.exit:
2355 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2356 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2357 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2358 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2359 // CHECK11: omp.precond.end:
2360 // CHECK11-NEXT: ret void
2361 //
2362 //
2363 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
2364 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2365 // CHECK11-NEXT: entry:
2366 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2367 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2368 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2369 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2370 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2371 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2372 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2373 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2374 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2375 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2376 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2377 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2378 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]])
2379 // CHECK11-NEXT: ret void
2380 //
2381 //
2382 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2383 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2384 // CHECK11-NEXT: entry:
2385 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2386 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2387 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2388 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2389 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2390 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2391 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2392 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2393 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2394 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2395 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2396 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2397 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2398 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2399 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2400 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2401 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2402 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2403 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2404 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2405 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2406 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2407 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2408 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
2409 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2410 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2411 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2412 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2413 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2414 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2415 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2416 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2417 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2418 // CHECK11: omp.precond.then:
2419 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2420 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2421 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2422 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2423 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2424 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2425 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2426 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2427 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2428 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2429 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2430 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2431 // CHECK11: cond.true:
2432 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2433 // CHECK11-NEXT: br label [[COND_END:%.*]]
2434 // CHECK11: cond.false:
2435 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2436 // CHECK11-NEXT: br label [[COND_END]]
2437 // CHECK11: cond.end:
2438 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2439 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2440 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2441 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2442 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2443 // CHECK11: omp.inner.for.cond:
2444 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2445 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2446 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2447 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2448 // CHECK11: omp.inner.for.body:
2449 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2450 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2451 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2452 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
2453 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
2454 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]]
2455 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2456 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2457 // CHECK11: omp.body.continue:
2458 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2459 // CHECK11: omp.inner.for.inc:
2460 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2461 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2462 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2463 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2464 // CHECK11: omp.inner.for.end:
2465 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2466 // CHECK11: omp.loop.exit:
2467 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2468 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2469 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]])
2470 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2471 // CHECK11: omp.precond.end:
2472 // CHECK11-NEXT: ret void
2473 //
2474 //
2475 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
2476 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2477 // CHECK11-NEXT: entry:
2478 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2479 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2480 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2481 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2482 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2483 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2484 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2485 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2486 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2487 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2488 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2489 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2490 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2491 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
2492 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
2493 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2494 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2495 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
2496 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]])
2497 // CHECK11-NEXT: ret void
2498 //
2499 //
2500 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
2501 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2502 // CHECK11-NEXT: entry:
2503 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2504 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2505 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2506 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2507 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2508 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2509 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2510 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2511 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2512 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2513 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2514 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2515 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2516 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2517 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2518 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
2519 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2520 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2521 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2522 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2523 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2524 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2525 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2526 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2527 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
2528 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2529 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2530 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2531 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2532 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2533 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2534 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2535 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2536 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2537 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2538 // CHECK11: omp.precond.then:
2539 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2540 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2541 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4
2542 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2543 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2544 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
2545 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2546 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2547 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
2548 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2549 // CHECK11: omp.dispatch.cond:
2550 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2551 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2552 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2553 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2554 // CHECK11: cond.true:
2555 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2556 // CHECK11-NEXT: br label [[COND_END:%.*]]
2557 // CHECK11: cond.false:
2558 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2559 // CHECK11-NEXT: br label [[COND_END]]
2560 // CHECK11: cond.end:
2561 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2562 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2563 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2564 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
2565 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2566 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2567 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2568 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2569 // CHECK11: omp.dispatch.body:
2570 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2571 // CHECK11: omp.inner.for.cond:
2572 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2573 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
2574 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2575 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2576 // CHECK11: omp.inner.for.body:
2577 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2578 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2579 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2580 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12
2581 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12
2582 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]]
2583 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
2584 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2585 // CHECK11: omp.body.continue:
2586 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2587 // CHECK11: omp.inner.for.inc:
2588 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2589 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
2590 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2591 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2592 // CHECK11: omp.inner.for.end:
2593 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2594 // CHECK11: omp.dispatch.inc:
2595 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2596 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2597 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2598 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
2599 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2600 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2601 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
2602 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
2603 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
2604 // CHECK11: omp.dispatch.end:
2605 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2606 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
2607 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
2608 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2609 // CHECK11: omp.precond.end:
2610 // CHECK11-NEXT: ret void
2611 //
2612 //
2613 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
2614 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2615 // CHECK11-NEXT: entry:
2616 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2617 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
2618 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2619 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2620 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2621 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2622 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
2623 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
2624 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
2625 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
2626 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x i8*], align 4
2627 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x i8*], align 4
2628 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x i8*], align 4
2629 // CHECK11-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
2630 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2631 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2632 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
2633 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
2634 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2635 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
2636 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
2637 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2638 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
2639 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2640 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2641 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2642 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2643 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4
2644 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2645 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
2646 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2647 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
2648 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2649 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
2650 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2651 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP11]], align 4
2652 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2653 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP12]], align 4
2654 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2655 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4
2656 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2657 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
2658 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2659 // CHECK11-NEXT: store i64 10, i64* [[TMP15]], align 8
2660 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2661 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2662 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2663 // CHECK11: omp_offload.failed:
2664 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]]
2665 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2666 // CHECK11: omp_offload.cont:
2667 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2668 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
2669 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
2670 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2671 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
2672 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
2673 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
2674 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
2675 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2676 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2677 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2678 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
2679 // CHECK11-NEXT: store i32 1, i32* [[TMP25]], align 4
2680 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
2681 // CHECK11-NEXT: store i32 1, i32* [[TMP26]], align 4
2682 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
2683 // CHECK11-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
2684 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
2685 // CHECK11-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
2686 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
2687 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP29]], align 4
2688 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
2689 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP30]], align 4
2690 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
2691 // CHECK11-NEXT: store i8** null, i8*** [[TMP31]], align 4
2692 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
2693 // CHECK11-NEXT: store i8** null, i8*** [[TMP32]], align 4
2694 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
2695 // CHECK11-NEXT: store i64 10, i64* [[TMP33]], align 8
2696 // CHECK11-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
2697 // CHECK11-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2698 // CHECK11-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
2699 // CHECK11: omp_offload.failed6:
2700 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]]
2701 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]]
2702 // CHECK11: omp_offload.cont7:
2703 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2704 // CHECK11-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
2705 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
2706 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2707 // CHECK11-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [10 x i32]**
2708 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP39]], align 4
2709 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
2710 // CHECK11-NEXT: store i8* null, i8** [[TMP40]], align 4
2711 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2712 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2713 // CHECK11-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2714 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
2715 // CHECK11-NEXT: store i32 1, i32* [[TMP43]], align 4
2716 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
2717 // CHECK11-NEXT: store i32 1, i32* [[TMP44]], align 4
2718 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
2719 // CHECK11-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
2720 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
2721 // CHECK11-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
2722 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
2723 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP47]], align 4
2724 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
2725 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP48]], align 4
2726 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
2727 // CHECK11-NEXT: store i8** null, i8*** [[TMP49]], align 4
2728 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
2729 // CHECK11-NEXT: store i8** null, i8*** [[TMP50]], align 4
2730 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
2731 // CHECK11-NEXT: store i64 10, i64* [[TMP51]], align 8
2732 // CHECK11-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB2]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
2733 // CHECK11-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
2734 // CHECK11-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
2735 // CHECK11: omp_offload.failed13:
2736 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]]
2737 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT14]]
2738 // CHECK11: omp_offload.cont14:
2739 // CHECK11-NEXT: ret i32 0
2740 //
2741 //
2742 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
2743 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2744 // CHECK11-NEXT: entry:
2745 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
2746 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
2747 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
2748 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2749 // CHECK11-NEXT: ret void
2750 //
2751 //
2752 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
2753 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2754 // CHECK11-NEXT: entry:
2755 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2756 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2757 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
2758 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2759 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2760 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2761 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2762 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2763 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2764 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2765 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2766 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2767 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
2768 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
2769 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2770 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2771 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2772 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2773 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2774 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2775 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2776 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2777 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2778 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2779 // CHECK11: cond.true:
2780 // CHECK11-NEXT: br label [[COND_END:%.*]]
2781 // CHECK11: cond.false:
2782 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2783 // CHECK11-NEXT: br label [[COND_END]]
2784 // CHECK11: cond.end:
2785 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2786 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2787 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2788 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2789 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2790 // CHECK11: omp.inner.for.cond:
2791 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2792 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2793 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2794 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2795 // CHECK11: omp.inner.for.body:
2796 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2797 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2798 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2799 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2800 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2801 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
2802 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2803 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2804 // CHECK11: omp.body.continue:
2805 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2806 // CHECK11: omp.inner.for.inc:
2807 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2808 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2809 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2810 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2811 // CHECK11: omp.inner.for.end:
2812 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2813 // CHECK11: omp.loop.exit:
2814 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2815 // CHECK11-NEXT: ret void
2816 //
2817 //
2818 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
2819 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2820 // CHECK11-NEXT: entry:
2821 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
2822 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
2823 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
2824 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2825 // CHECK11-NEXT: ret void
2826 //
2827 //
2828 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
2829 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2830 // CHECK11-NEXT: entry:
2831 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2832 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2833 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
2834 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2835 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2836 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2837 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2838 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2839 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2840 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2841 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2842 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2843 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
2844 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
2845 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2846 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2847 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2848 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2849 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2850 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2851 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2852 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2853 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2854 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2855 // CHECK11: cond.true:
2856 // CHECK11-NEXT: br label [[COND_END:%.*]]
2857 // CHECK11: cond.false:
2858 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2859 // CHECK11-NEXT: br label [[COND_END]]
2860 // CHECK11: cond.end:
2861 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2862 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2863 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2864 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2865 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2866 // CHECK11: omp.inner.for.cond:
2867 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2868 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2869 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2870 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2871 // CHECK11: omp.inner.for.body:
2872 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2873 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2874 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2875 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2876 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2877 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
2878 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2879 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2880 // CHECK11: omp.body.continue:
2881 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2882 // CHECK11: omp.inner.for.inc:
2883 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2884 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2885 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2886 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2887 // CHECK11: omp.inner.for.end:
2888 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2889 // CHECK11: omp.loop.exit:
2890 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2891 // CHECK11-NEXT: ret void
2892 //
2893 //
2894 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
2895 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2896 // CHECK11-NEXT: entry:
2897 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
2898 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
2899 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
2900 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
2901 // CHECK11-NEXT: ret void
2902 //
2903 //
2904 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13
2905 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2906 // CHECK11-NEXT: entry:
2907 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2908 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2909 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
2910 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2911 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2912 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2913 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2914 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2915 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2916 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2917 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2918 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2919 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
2920 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
2921 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2922 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2923 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2924 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2925 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2926 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2927 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10)
2928 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2929 // CHECK11: omp.dispatch.cond:
2930 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2931 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2932 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2933 // CHECK11: cond.true:
2934 // CHECK11-NEXT: br label [[COND_END:%.*]]
2935 // CHECK11: cond.false:
2936 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2937 // CHECK11-NEXT: br label [[COND_END]]
2938 // CHECK11: cond.end:
2939 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2940 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2941 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2942 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2943 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2944 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2945 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2946 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2947 // CHECK11: omp.dispatch.body:
2948 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2949 // CHECK11: omp.inner.for.cond:
2950 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2951 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
2952 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2953 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2954 // CHECK11: omp.inner.for.body:
2955 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2956 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2957 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2958 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15
2959 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15
2960 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
2961 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
2962 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2963 // CHECK11: omp.body.continue:
2964 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2965 // CHECK11: omp.inner.for.inc:
2966 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2967 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2968 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2969 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2970 // CHECK11: omp.inner.for.end:
2971 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2972 // CHECK11: omp.dispatch.inc:
2973 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2974 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2975 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2976 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
2977 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2978 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2979 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2980 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
2981 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
2982 // CHECK11: omp.dispatch.end:
2983 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2984 // CHECK11-NEXT: ret void
2985 //
2986 //
2987 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2988 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2989 // CHECK11-NEXT: entry:
2990 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2991 // CHECK11-NEXT: ret void
2992 //
2993