1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 20 #ifdef CK1 21 22 template <typename T, int X, long long Y> 23 struct SS{ 24 T a[X]; 25 float b; 26 int foo(void) { 27 28 #pragma omp target teams distribute 29 for(int i = 0; i < X; i++) { 30 a[i] = (T)0; 31 } 32 #pragma omp target teams distribute dist_schedule(static) 33 for(int i = 0; i < X; i++) { 34 a[i] = (T)0; 35 } 36 #pragma omp target teams distribute dist_schedule(static, X/2) 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 41 42 43 44 45 46 return a[0]; 47 } 48 }; 49 50 int teams_template_struct(void) { 51 SS<int, 123, 456> V; 52 return V.foo(); 53 54 } 55 #endif // CK1 56 57 // Test host codegen. 58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 60 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 64 65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 67 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 68 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 69 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 70 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 71 #ifdef CK2 72 73 template <typename T, int n> 74 int tmain(T argc) { 75 T a[n]; 76 #pragma omp target teams distribute 77 for(int i = 0; i < n; i++) { 78 a[i] = (T)0; 79 } 80 #pragma omp target teams distribute dist_schedule(static) 81 for(int i = 0; i < n; i++) { 82 a[i] = (T)0; 83 } 84 #pragma omp target teams distribute dist_schedule(static, n) 85 for(int i = 0; i < n; i++) { 86 a[i] = (T)0; 87 } 88 return 0; 89 } 90 91 int main (int argc, char **argv) { 92 int n = 100; 93 int a[n]; 94 #pragma omp target teams distribute 95 for(int i = 0; i < n; i++) { 96 a[i] = 0; 97 } 98 #pragma omp target teams distribute dist_schedule(static) 99 for(int i = 0; i < n; i++) { 100 a[i] = 0; 101 } 102 #pragma omp target teams distribute dist_schedule(static, n) 103 for(int i = 0; i < n; i++) { 104 a[i] = 0; 105 } 106 return tmain<int, 10>(argc); 107 } 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 #endif // CK2 124 #endif // #ifndef HEADER 125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 127 // CHECK1-NEXT: entry: 128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 130 // CHECK1-NEXT: ret i32 [[CALL]] 131 // 132 // 133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 134 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 135 // CHECK1-NEXT: entry: 136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 141 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 142 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 143 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 144 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 145 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 146 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 147 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 148 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 150 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 151 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 152 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 153 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 154 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 155 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 156 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 157 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 158 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 159 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 160 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 161 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 162 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 163 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 164 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 165 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 166 // CHECK1: omp_offload.failed: 167 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 168 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 169 // CHECK1: omp_offload.cont: 170 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 172 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 173 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 174 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 175 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 176 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 177 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 178 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 179 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 180 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 181 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 182 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 183 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 184 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 185 // CHECK1: omp_offload.failed7: 186 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]] 187 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 188 // CHECK1: omp_offload.cont8: 189 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 190 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 191 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 192 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 193 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 194 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 195 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 196 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 197 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 198 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 200 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 201 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 202 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 203 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 204 // CHECK1: omp_offload.failed14: 205 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]] 206 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 207 // CHECK1: omp_offload.cont15: 208 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 209 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 210 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 211 // CHECK1-NEXT: ret i32 [[TMP27]] 212 // 213 // 214 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 215 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 216 // CHECK1-NEXT: entry: 217 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 218 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 219 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 220 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 221 // CHECK1-NEXT: ret void 222 // 223 // 224 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 225 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 226 // CHECK1-NEXT: entry: 227 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 228 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 230 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 232 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 233 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 237 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 238 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 239 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 240 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 241 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 242 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 243 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 244 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 245 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 246 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 247 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 248 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 249 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 250 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 251 // CHECK1: cond.true: 252 // CHECK1-NEXT: br label [[COND_END:%.*]] 253 // CHECK1: cond.false: 254 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 255 // CHECK1-NEXT: br label [[COND_END]] 256 // CHECK1: cond.end: 257 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 258 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 259 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 260 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 261 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 262 // CHECK1: omp.inner.for.cond: 263 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 264 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 265 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 266 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 267 // CHECK1: omp.inner.for.body: 268 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 269 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 270 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 271 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 272 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 273 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 274 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 275 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 276 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 277 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 278 // CHECK1: omp.body.continue: 279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 280 // CHECK1: omp.inner.for.inc: 281 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 283 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 284 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 285 // CHECK1: omp.inner.for.end: 286 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 287 // CHECK1: omp.loop.exit: 288 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 289 // CHECK1-NEXT: ret void 290 // 291 // 292 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 293 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 294 // CHECK1-NEXT: entry: 295 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 296 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 297 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 298 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 299 // CHECK1-NEXT: ret void 300 // 301 // 302 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 303 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 304 // CHECK1-NEXT: entry: 305 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 306 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 307 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 308 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 310 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 311 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 312 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 313 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 314 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 315 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 316 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 317 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 318 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 319 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 320 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 321 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 322 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 323 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 324 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 325 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 326 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 327 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 328 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 329 // CHECK1: cond.true: 330 // CHECK1-NEXT: br label [[COND_END:%.*]] 331 // CHECK1: cond.false: 332 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 333 // CHECK1-NEXT: br label [[COND_END]] 334 // CHECK1: cond.end: 335 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 336 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 337 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 338 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 339 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 340 // CHECK1: omp.inner.for.cond: 341 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 342 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 343 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 344 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 345 // CHECK1: omp.inner.for.body: 346 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 347 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 348 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 349 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 350 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 351 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 352 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 353 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 354 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 355 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 356 // CHECK1: omp.body.continue: 357 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 358 // CHECK1: omp.inner.for.inc: 359 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 360 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 361 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 362 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 363 // CHECK1: omp.inner.for.end: 364 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 365 // CHECK1: omp.loop.exit: 366 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 367 // CHECK1-NEXT: ret void 368 // 369 // 370 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 371 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 372 // CHECK1-NEXT: entry: 373 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 374 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 375 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 376 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 377 // CHECK1-NEXT: ret void 378 // 379 // 380 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 381 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 382 // CHECK1-NEXT: entry: 383 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 384 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 385 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 386 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 387 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 388 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 389 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 390 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 391 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 392 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 393 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 394 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 395 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 396 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 397 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 398 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 399 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 400 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 401 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 402 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 403 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 404 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 405 // CHECK1: omp.dispatch.cond: 406 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 407 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 408 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 409 // CHECK1: cond.true: 410 // CHECK1-NEXT: br label [[COND_END:%.*]] 411 // CHECK1: cond.false: 412 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 413 // CHECK1-NEXT: br label [[COND_END]] 414 // CHECK1: cond.end: 415 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 416 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 417 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 418 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 419 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 420 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 421 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 422 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 423 // CHECK1: omp.dispatch.body: 424 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 425 // CHECK1: omp.inner.for.cond: 426 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 427 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 428 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 429 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 430 // CHECK1: omp.inner.for.body: 431 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 432 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 433 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 434 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 435 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 436 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8 437 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 438 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 439 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8 440 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 441 // CHECK1: omp.body.continue: 442 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 443 // CHECK1: omp.inner.for.inc: 444 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 445 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 446 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 447 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 448 // CHECK1: omp.inner.for.end: 449 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 450 // CHECK1: omp.dispatch.inc: 451 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 452 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 453 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 454 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 455 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 456 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 457 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 458 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 459 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 460 // CHECK1: omp.dispatch.end: 461 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 462 // CHECK1-NEXT: ret void 463 // 464 // 465 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 466 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 467 // CHECK1-NEXT: entry: 468 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 469 // CHECK1-NEXT: ret void 470 // 471 // 472 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv 473 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 474 // CHECK2-NEXT: entry: 475 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 476 // CHECK2-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 477 // CHECK2-NEXT: ret i32 [[CALL]] 478 // 479 // 480 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 481 // CHECK2-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 482 // CHECK2-NEXT: entry: 483 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 484 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 485 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 486 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 487 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 488 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 489 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 490 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 491 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 492 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 493 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 494 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 495 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 496 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 497 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 498 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 499 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 500 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 501 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 502 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 503 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 504 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 505 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 506 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 507 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 508 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 509 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 510 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 511 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 512 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 513 // CHECK2: omp_offload.failed: 514 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 515 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 516 // CHECK2: omp_offload.cont: 517 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 518 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 519 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 520 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 521 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 522 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 523 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 524 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 525 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 526 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 527 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 528 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 529 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 530 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 531 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 532 // CHECK2: omp_offload.failed7: 533 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]] 534 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]] 535 // CHECK2: omp_offload.cont8: 536 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 537 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 538 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 539 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 540 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 541 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 542 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 543 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 544 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8 545 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 546 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 547 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 548 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 549 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 550 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 551 // CHECK2: omp_offload.failed14: 552 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]] 553 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]] 554 // CHECK2: omp_offload.cont15: 555 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 556 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 0 557 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 558 // CHECK2-NEXT: ret i32 [[TMP27]] 559 // 560 // 561 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 562 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 563 // CHECK2-NEXT: entry: 564 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 565 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 566 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 567 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 568 // CHECK2-NEXT: ret void 569 // 570 // 571 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 572 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 573 // CHECK2-NEXT: entry: 574 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 575 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 576 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 577 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 578 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 579 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 580 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 581 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 582 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 583 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 584 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 585 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 586 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 587 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 588 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 589 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 590 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 591 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 592 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 593 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 594 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 595 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 596 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 597 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 598 // CHECK2: cond.true: 599 // CHECK2-NEXT: br label [[COND_END:%.*]] 600 // CHECK2: cond.false: 601 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 602 // CHECK2-NEXT: br label [[COND_END]] 603 // CHECK2: cond.end: 604 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 605 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 606 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 607 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 608 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 609 // CHECK2: omp.inner.for.cond: 610 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 611 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 612 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 613 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 614 // CHECK2: omp.inner.for.body: 615 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 616 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 617 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 618 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 619 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 620 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 621 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 622 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 623 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 624 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 625 // CHECK2: omp.body.continue: 626 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 627 // CHECK2: omp.inner.for.inc: 628 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 629 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 630 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 631 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 632 // CHECK2: omp.inner.for.end: 633 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 634 // CHECK2: omp.loop.exit: 635 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 636 // CHECK2-NEXT: ret void 637 // 638 // 639 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 640 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 641 // CHECK2-NEXT: entry: 642 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 643 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 644 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 645 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 646 // CHECK2-NEXT: ret void 647 // 648 // 649 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 650 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 651 // CHECK2-NEXT: entry: 652 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 653 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 654 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 655 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 656 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 657 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 658 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 659 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 660 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 661 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 662 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 663 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 664 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 665 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 666 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 667 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 668 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 669 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 670 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 671 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 672 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 673 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 674 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 675 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 676 // CHECK2: cond.true: 677 // CHECK2-NEXT: br label [[COND_END:%.*]] 678 // CHECK2: cond.false: 679 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 680 // CHECK2-NEXT: br label [[COND_END]] 681 // CHECK2: cond.end: 682 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 683 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 684 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 685 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 686 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 687 // CHECK2: omp.inner.for.cond: 688 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 689 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 690 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 691 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 692 // CHECK2: omp.inner.for.body: 693 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 694 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 695 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 696 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 697 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 698 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 699 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 700 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 701 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 702 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 703 // CHECK2: omp.body.continue: 704 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 705 // CHECK2: omp.inner.for.inc: 706 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 707 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 708 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 709 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 710 // CHECK2: omp.inner.for.end: 711 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 712 // CHECK2: omp.loop.exit: 713 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 714 // CHECK2-NEXT: ret void 715 // 716 // 717 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 718 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 719 // CHECK2-NEXT: entry: 720 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 721 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 722 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 723 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 724 // CHECK2-NEXT: ret void 725 // 726 // 727 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 728 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 729 // CHECK2-NEXT: entry: 730 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 731 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 732 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 733 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 734 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 735 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 736 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 737 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 738 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 739 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 740 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 741 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 742 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 743 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 744 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 745 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 746 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 747 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 748 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 749 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 750 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 751 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 752 // CHECK2: omp.dispatch.cond: 753 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 754 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 755 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 756 // CHECK2: cond.true: 757 // CHECK2-NEXT: br label [[COND_END:%.*]] 758 // CHECK2: cond.false: 759 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 760 // CHECK2-NEXT: br label [[COND_END]] 761 // CHECK2: cond.end: 762 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 763 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 764 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 765 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 766 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 767 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 768 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 769 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 770 // CHECK2: omp.dispatch.body: 771 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 772 // CHECK2: omp.inner.for.cond: 773 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 774 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8 775 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 776 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 777 // CHECK2: omp.inner.for.body: 778 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 779 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 780 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 781 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8 782 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 783 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8 784 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 785 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 786 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !8 787 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 788 // CHECK2: omp.body.continue: 789 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 790 // CHECK2: omp.inner.for.inc: 791 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 792 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 793 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8 794 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]] 795 // CHECK2: omp.inner.for.end: 796 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 797 // CHECK2: omp.dispatch.inc: 798 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 799 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 800 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 801 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 802 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 803 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 804 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 805 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 806 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 807 // CHECK2: omp.dispatch.end: 808 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 809 // CHECK2-NEXT: ret void 810 // 811 // 812 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 813 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 814 // CHECK2-NEXT: entry: 815 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 816 // CHECK2-NEXT: ret void 817 // 818 // 819 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 820 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 821 // CHECK3-NEXT: entry: 822 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 823 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 824 // CHECK3-NEXT: ret i32 [[CALL]] 825 // 826 // 827 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 828 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 829 // CHECK3-NEXT: entry: 830 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 831 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 832 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 833 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 834 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 835 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 836 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 837 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 838 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 839 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 840 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 841 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 842 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 843 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 844 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 845 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 846 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 847 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 848 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 849 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 850 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 851 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 852 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 853 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 854 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 855 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 856 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 857 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 858 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 859 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 860 // CHECK3: omp_offload.failed: 861 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 862 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 863 // CHECK3: omp_offload.cont: 864 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 865 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 866 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 867 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 868 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 869 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 870 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 871 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 872 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 873 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 874 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 875 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 876 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 877 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 878 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 879 // CHECK3: omp_offload.failed7: 880 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]] 881 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 882 // CHECK3: omp_offload.cont8: 883 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 884 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 885 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 886 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 887 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 888 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 889 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 890 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 891 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 892 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 893 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 894 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 895 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 896 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 897 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 898 // CHECK3: omp_offload.failed14: 899 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]] 900 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 901 // CHECK3: omp_offload.cont15: 902 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 903 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 904 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 905 // CHECK3-NEXT: ret i32 [[TMP27]] 906 // 907 // 908 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 909 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 910 // CHECK3-NEXT: entry: 911 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 912 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 913 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 914 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 915 // CHECK3-NEXT: ret void 916 // 917 // 918 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 919 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 920 // CHECK3-NEXT: entry: 921 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 922 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 923 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 924 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 925 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 926 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 927 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 928 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 929 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 930 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 931 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 932 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 933 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 934 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 935 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 936 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 937 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 938 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 939 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 940 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 941 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 942 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 943 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 944 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 945 // CHECK3: cond.true: 946 // CHECK3-NEXT: br label [[COND_END:%.*]] 947 // CHECK3: cond.false: 948 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 949 // CHECK3-NEXT: br label [[COND_END]] 950 // CHECK3: cond.end: 951 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 952 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 953 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 954 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 955 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 956 // CHECK3: omp.inner.for.cond: 957 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 958 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 959 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 960 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 961 // CHECK3: omp.inner.for.body: 962 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 963 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 964 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 965 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 966 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 967 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 968 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 969 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 970 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 971 // CHECK3: omp.body.continue: 972 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 973 // CHECK3: omp.inner.for.inc: 974 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 975 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 976 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 977 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 978 // CHECK3: omp.inner.for.end: 979 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 980 // CHECK3: omp.loop.exit: 981 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 982 // CHECK3-NEXT: ret void 983 // 984 // 985 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 986 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 987 // CHECK3-NEXT: entry: 988 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 989 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 990 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 991 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 992 // CHECK3-NEXT: ret void 993 // 994 // 995 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 996 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 997 // CHECK3-NEXT: entry: 998 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 999 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1000 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1001 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1002 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1003 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1004 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1005 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1006 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1007 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1008 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1009 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1010 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1011 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1012 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1013 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1014 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1015 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1016 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1017 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1018 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1019 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1020 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1021 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1022 // CHECK3: cond.true: 1023 // CHECK3-NEXT: br label [[COND_END:%.*]] 1024 // CHECK3: cond.false: 1025 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1026 // CHECK3-NEXT: br label [[COND_END]] 1027 // CHECK3: cond.end: 1028 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1029 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1030 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1031 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1032 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1033 // CHECK3: omp.inner.for.cond: 1034 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1035 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1036 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1037 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1038 // CHECK3: omp.inner.for.body: 1039 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1040 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1041 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1042 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1043 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1044 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1045 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1046 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1047 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1048 // CHECK3: omp.body.continue: 1049 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1050 // CHECK3: omp.inner.for.inc: 1051 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1052 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1053 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1054 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1055 // CHECK3: omp.inner.for.end: 1056 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1057 // CHECK3: omp.loop.exit: 1058 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1059 // CHECK3-NEXT: ret void 1060 // 1061 // 1062 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 1063 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1064 // CHECK3-NEXT: entry: 1065 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1066 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1067 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1068 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1069 // CHECK3-NEXT: ret void 1070 // 1071 // 1072 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1073 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1074 // CHECK3-NEXT: entry: 1075 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1076 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1077 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1078 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1079 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1080 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1081 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1082 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1083 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1084 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1085 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1086 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1087 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1088 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1089 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1090 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1091 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1092 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1093 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1094 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1095 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1096 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1097 // CHECK3: omp.dispatch.cond: 1098 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1099 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1100 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1101 // CHECK3: cond.true: 1102 // CHECK3-NEXT: br label [[COND_END:%.*]] 1103 // CHECK3: cond.false: 1104 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1105 // CHECK3-NEXT: br label [[COND_END]] 1106 // CHECK3: cond.end: 1107 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1108 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1109 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1110 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1111 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1112 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1113 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1114 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1115 // CHECK3: omp.dispatch.body: 1116 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1117 // CHECK3: omp.inner.for.cond: 1118 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1119 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1120 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1121 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1122 // CHECK3: omp.inner.for.body: 1123 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1124 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1125 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1126 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1127 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1128 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1129 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1130 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1131 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1132 // CHECK3: omp.body.continue: 1133 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1134 // CHECK3: omp.inner.for.inc: 1135 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1136 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1137 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1138 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1139 // CHECK3: omp.inner.for.end: 1140 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1141 // CHECK3: omp.dispatch.inc: 1142 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1143 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1144 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1145 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1146 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1147 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1148 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1149 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1150 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 1151 // CHECK3: omp.dispatch.end: 1152 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1153 // CHECK3-NEXT: ret void 1154 // 1155 // 1156 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1157 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 1158 // CHECK3-NEXT: entry: 1159 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1160 // CHECK3-NEXT: ret void 1161 // 1162 // 1163 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1164 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1165 // CHECK4-NEXT: entry: 1166 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1167 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1168 // CHECK4-NEXT: ret i32 [[CALL]] 1169 // 1170 // 1171 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1172 // CHECK4-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1173 // CHECK4-NEXT: entry: 1174 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1175 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1176 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1177 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1178 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1179 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 1180 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 1181 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 1182 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1183 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 1184 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 1185 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 1186 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 1187 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1188 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1189 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1190 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1191 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 1192 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 1193 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1194 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 1195 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 1196 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1197 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 1198 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1199 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1200 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 123) 1201 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1202 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1203 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1204 // CHECK4: omp_offload.failed: 1205 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 1206 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1207 // CHECK4: omp_offload.cont: 1208 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1209 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1210 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 1211 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 1212 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1213 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 1214 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 1215 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 1216 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 1217 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1218 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1219 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 1220 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1221 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1222 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1223 // CHECK4: omp_offload.failed7: 1224 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(%struct.SS* [[THIS1]]) #[[ATTR2]] 1225 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1226 // CHECK4: omp_offload.cont8: 1227 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1228 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1229 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 1230 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 1231 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1232 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 1233 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 1234 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 1235 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4 1236 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1237 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1238 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 123) 1239 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.5, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1240 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1241 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 1242 // CHECK4: omp_offload.failed14: 1243 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(%struct.SS* [[THIS1]]) #[[ATTR2]] 1244 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]] 1245 // CHECK4: omp_offload.cont15: 1246 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1247 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i32 0, i32 0 1248 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1249 // CHECK4-NEXT: ret i32 [[TMP27]] 1250 // 1251 // 1252 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28 1253 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1254 // CHECK4-NEXT: entry: 1255 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1256 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1257 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1258 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1259 // CHECK4-NEXT: ret void 1260 // 1261 // 1262 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1263 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1264 // CHECK4-NEXT: entry: 1265 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1266 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1267 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1268 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1269 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1270 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1271 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1272 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1273 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1274 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1275 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1276 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1277 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1278 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1279 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1280 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1281 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1282 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1283 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1284 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1285 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1286 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1287 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1288 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1289 // CHECK4: cond.true: 1290 // CHECK4-NEXT: br label [[COND_END:%.*]] 1291 // CHECK4: cond.false: 1292 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1293 // CHECK4-NEXT: br label [[COND_END]] 1294 // CHECK4: cond.end: 1295 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1296 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1297 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1298 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1299 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1300 // CHECK4: omp.inner.for.cond: 1301 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1302 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1303 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1304 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1305 // CHECK4: omp.inner.for.body: 1306 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1307 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1308 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1309 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1310 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1311 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1312 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1313 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1314 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1315 // CHECK4: omp.body.continue: 1316 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1317 // CHECK4: omp.inner.for.inc: 1318 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1319 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1320 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1321 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1322 // CHECK4: omp.inner.for.end: 1323 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1324 // CHECK4: omp.loop.exit: 1325 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1326 // CHECK4-NEXT: ret void 1327 // 1328 // 1329 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32 1330 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1331 // CHECK4-NEXT: entry: 1332 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1333 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1334 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1335 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1336 // CHECK4-NEXT: ret void 1337 // 1338 // 1339 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1340 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1341 // CHECK4-NEXT: entry: 1342 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1343 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1344 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1345 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1346 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1347 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1348 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1349 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1350 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1351 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1352 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1353 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1354 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1355 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1356 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1357 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1358 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1359 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1360 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1361 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1362 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1363 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1364 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1365 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1366 // CHECK4: cond.true: 1367 // CHECK4-NEXT: br label [[COND_END:%.*]] 1368 // CHECK4: cond.false: 1369 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1370 // CHECK4-NEXT: br label [[COND_END]] 1371 // CHECK4: cond.end: 1372 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1373 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1374 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1375 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1376 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1377 // CHECK4: omp.inner.for.cond: 1378 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1379 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1380 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1381 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1382 // CHECK4: omp.inner.for.body: 1383 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1384 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 1385 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1386 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1387 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1388 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1389 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP9]] 1390 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1391 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1392 // CHECK4: omp.body.continue: 1393 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1394 // CHECK4: omp.inner.for.inc: 1395 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1396 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 1397 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1398 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1399 // CHECK4: omp.inner.for.end: 1400 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1401 // CHECK4: omp.loop.exit: 1402 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1403 // CHECK4-NEXT: ret void 1404 // 1405 // 1406 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36 1407 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1408 // CHECK4-NEXT: entry: 1409 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1410 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1411 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1412 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1413 // CHECK4-NEXT: ret void 1414 // 1415 // 1416 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4 1417 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1418 // CHECK4-NEXT: entry: 1419 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1420 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1421 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1422 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1423 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1424 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1425 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1426 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1427 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1428 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1429 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1430 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1431 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1432 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1433 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1434 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1435 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1436 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1437 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1438 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1439 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1440 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1441 // CHECK4: omp.dispatch.cond: 1442 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1443 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1444 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1445 // CHECK4: cond.true: 1446 // CHECK4-NEXT: br label [[COND_END:%.*]] 1447 // CHECK4: cond.false: 1448 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1449 // CHECK4-NEXT: br label [[COND_END]] 1450 // CHECK4: cond.end: 1451 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1452 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1453 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1454 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1455 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1456 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1457 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1458 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1459 // CHECK4: omp.dispatch.body: 1460 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1461 // CHECK4: omp.inner.for.cond: 1462 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1463 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1464 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1465 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1466 // CHECK4: omp.inner.for.body: 1467 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1468 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1469 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1470 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1471 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1472 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1473 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1474 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1475 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1476 // CHECK4: omp.body.continue: 1477 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1478 // CHECK4: omp.inner.for.inc: 1479 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1480 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1481 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1482 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1483 // CHECK4: omp.inner.for.end: 1484 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1485 // CHECK4: omp.dispatch.inc: 1486 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1487 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1488 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 1489 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1490 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1491 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1492 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 1493 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1494 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 1495 // CHECK4: omp.dispatch.end: 1496 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1497 // CHECK4-NEXT: ret void 1498 // 1499 // 1500 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1501 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 1502 // CHECK4-NEXT: entry: 1503 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 1504 // CHECK4-NEXT: ret void 1505 // 1506 // 1507 // CHECK9-LABEL: define {{[^@]+}}@main 1508 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1509 // CHECK9-NEXT: entry: 1510 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1511 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1512 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1513 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4 1514 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1515 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1516 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1517 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 1518 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 1519 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 1520 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 1521 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1522 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1523 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1524 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 1525 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 1526 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 1527 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 1528 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 1529 // CHECK9-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 1530 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 1531 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 1532 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 1533 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 1534 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1535 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8 1536 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8 1537 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8 1538 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8 1539 // CHECK9-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 1540 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 1541 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4 1542 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 1543 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1544 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1545 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4 1546 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 1547 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 1548 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 1549 // CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 1550 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 1551 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 1552 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 1553 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1554 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 1555 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 1556 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 1557 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 1558 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 1559 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1560 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1561 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 1562 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1563 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1564 // CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 1565 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1566 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 1567 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 1568 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 1569 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 1570 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 1571 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 1572 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 1573 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 1574 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8 1575 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 1576 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 1577 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 1578 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 1579 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 1580 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 1581 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 1582 // CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 1583 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 1584 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 1585 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1586 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1587 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 1588 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 1589 // CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 1590 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1591 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 1592 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1593 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1594 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1595 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1596 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 1597 // CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 1598 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 1599 // CHECK9-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1600 // CHECK9-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 1601 // CHECK9-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1602 // CHECK9: omp_offload.failed: 1603 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 1604 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 1605 // CHECK9: omp_offload.cont: 1606 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 1607 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 1608 // CHECK9-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 1609 // CHECK9-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 1610 // CHECK9-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 1611 // CHECK9-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 1612 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 1613 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1614 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 1615 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 1616 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1617 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 1618 // CHECK9-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 1619 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 1620 // CHECK9-NEXT: store i8* null, i8** [[TMP40]], align 8 1621 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 1622 // CHECK9-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 1623 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 1624 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 1625 // CHECK9-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 1626 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 1627 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 1628 // CHECK9-NEXT: store i8* null, i8** [[TMP45]], align 8 1629 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 1630 // CHECK9-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 1631 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 1632 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 1633 // CHECK9-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 1634 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 1635 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 1636 // CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 1637 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 1638 // CHECK9-NEXT: store i8* null, i8** [[TMP51]], align 8 1639 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 1640 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 1641 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 1642 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 1643 // CHECK9-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 1644 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 1645 // CHECK9-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 1646 // CHECK9-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 1647 // CHECK9-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 1648 // CHECK9-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 1649 // CHECK9-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 1650 // CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 1651 // CHECK9-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 1652 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 1653 // CHECK9-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1654 // CHECK9-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 1655 // CHECK9-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 1656 // CHECK9: omp_offload.failed16: 1657 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 1658 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]] 1659 // CHECK9: omp_offload.cont17: 1660 // CHECK9-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 1661 // CHECK9-NEXT: store i32 [[TMP61]], i32* [[DOTCAPTURE_EXPR_18]], align 4 1662 // CHECK9-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 1663 // CHECK9-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 1664 // CHECK9-NEXT: store i32 [[TMP62]], i32* [[CONV20]], align 4 1665 // CHECK9-NEXT: [[TMP63:%.*]] = load i64, i64* [[N_CASTED19]], align 8 1666 // CHECK9-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 1667 // CHECK9-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1668 // CHECK9-NEXT: store i32 [[TMP64]], i32* [[CONV21]], align 4 1669 // CHECK9-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1670 // CHECK9-NEXT: [[TMP66:%.*]] = mul nuw i64 [[TMP1]], 4 1671 // CHECK9-NEXT: [[TMP67:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8* 1672 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false) 1673 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 1674 // CHECK9-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 1675 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP69]], align 8 1676 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 1677 // CHECK9-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 1678 // CHECK9-NEXT: store i64 [[TMP63]], i64* [[TMP71]], align 8 1679 // CHECK9-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 1680 // CHECK9-NEXT: store i8* null, i8** [[TMP72]], align 8 1681 // CHECK9-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 1682 // CHECK9-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 1683 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP74]], align 8 1684 // CHECK9-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 1685 // CHECK9-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 1686 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8 1687 // CHECK9-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1 1688 // CHECK9-NEXT: store i8* null, i8** [[TMP77]], align 8 1689 // CHECK9-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2 1690 // CHECK9-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32** 1691 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP79]], align 8 1692 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2 1693 // CHECK9-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 1694 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 8 1695 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2 1696 // CHECK9-NEXT: store i64 [[TMP66]], i64* [[TMP82]], align 8 1697 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2 1698 // CHECK9-NEXT: store i8* null, i8** [[TMP83]], align 8 1699 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3 1700 // CHECK9-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i64* 1701 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP85]], align 8 1702 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3 1703 // CHECK9-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64* 1704 // CHECK9-NEXT: store i64 [[TMP65]], i64* [[TMP87]], align 8 1705 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3 1706 // CHECK9-NEXT: store i8* null, i8** [[TMP88]], align 8 1707 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 1708 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 1709 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0 1710 // CHECK9-NEXT: [[TMP92:%.*]] = load i32, i32* [[N]], align 4 1711 // CHECK9-NEXT: store i32 [[TMP92]], i32* [[DOTCAPTURE_EXPR_27]], align 4 1712 // CHECK9-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 1713 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP93]], 0 1714 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 1715 // CHECK9-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1 1716 // CHECK9-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4 1717 // CHECK9-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4 1718 // CHECK9-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP94]], 1 1719 // CHECK9-NEXT: [[TMP95:%.*]] = zext i32 [[ADD32]] to i64 1720 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP95]]) 1721 // CHECK9-NEXT: [[TMP96:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP89]], i8** [[TMP90]], i64* [[TMP91]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1722 // CHECK9-NEXT: [[TMP97:%.*]] = icmp ne i32 [[TMP96]], 0 1723 // CHECK9-NEXT: br i1 [[TMP97]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 1724 // CHECK9: omp_offload.failed33: 1725 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP63]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP65]]) #[[ATTR3]] 1726 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT34]] 1727 // CHECK9: omp_offload.cont34: 1728 // CHECK9-NEXT: [[TMP98:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1729 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP98]]) 1730 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1731 // CHECK9-NEXT: [[TMP99:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1732 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP99]]) 1733 // CHECK9-NEXT: [[TMP100:%.*]] = load i32, i32* [[RETVAL]], align 4 1734 // CHECK9-NEXT: ret i32 [[TMP100]] 1735 // 1736 // 1737 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 1738 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 1739 // CHECK9-NEXT: entry: 1740 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1741 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1742 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1743 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1744 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1745 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1746 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1747 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1748 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1749 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1750 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1751 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1752 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 1753 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1754 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 1755 // CHECK9-NEXT: ret void 1756 // 1757 // 1758 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 1759 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1760 // CHECK9-NEXT: entry: 1761 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1762 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1763 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1764 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1765 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1766 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1767 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1768 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1769 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1770 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1771 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1772 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1773 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1774 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1775 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1776 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1777 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1778 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1779 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1780 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1781 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1782 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1783 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1784 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1785 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1786 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1787 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1788 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1789 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1790 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1791 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1792 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1793 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1794 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1795 // CHECK9: omp.precond.then: 1796 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1797 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1798 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1799 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1800 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1801 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1802 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1803 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1804 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1805 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1806 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1807 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1808 // CHECK9: cond.true: 1809 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1810 // CHECK9-NEXT: br label [[COND_END:%.*]] 1811 // CHECK9: cond.false: 1812 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1813 // CHECK9-NEXT: br label [[COND_END]] 1814 // CHECK9: cond.end: 1815 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1816 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1817 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1818 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1819 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1820 // CHECK9: omp.inner.for.cond: 1821 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1822 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1823 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1824 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1825 // CHECK9: omp.inner.for.body: 1826 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1827 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1828 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1829 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1830 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1831 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1832 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1833 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1834 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1835 // CHECK9: omp.body.continue: 1836 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1837 // CHECK9: omp.inner.for.inc: 1838 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1839 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1840 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1841 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1842 // CHECK9: omp.inner.for.end: 1843 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1844 // CHECK9: omp.loop.exit: 1845 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1846 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1847 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1848 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1849 // CHECK9: omp.precond.end: 1850 // CHECK9-NEXT: ret void 1851 // 1852 // 1853 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 1854 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1855 // CHECK9-NEXT: entry: 1856 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1857 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1858 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1859 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1860 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1861 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1862 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1863 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1864 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1865 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1866 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1867 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1868 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 1869 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1870 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 1871 // CHECK9-NEXT: ret void 1872 // 1873 // 1874 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 1875 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 1876 // CHECK9-NEXT: entry: 1877 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1878 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1879 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1880 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1881 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1882 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1883 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 1884 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1885 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1886 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 1887 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1888 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1889 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1890 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1891 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4 1892 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1893 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1894 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1895 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1896 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1897 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1898 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1899 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1900 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1901 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1902 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1903 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 1904 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1905 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 1906 // CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1907 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 1908 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1909 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 1910 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 1911 // CHECK9: omp.precond.then: 1912 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1913 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1914 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 1915 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1916 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1917 // CHECK9-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1918 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1919 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1920 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1921 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1922 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 1923 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1924 // CHECK9: cond.true: 1925 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1926 // CHECK9-NEXT: br label [[COND_END:%.*]] 1927 // CHECK9: cond.false: 1928 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1929 // CHECK9-NEXT: br label [[COND_END]] 1930 // CHECK9: cond.end: 1931 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 1932 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1933 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1934 // CHECK9-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 1935 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1936 // CHECK9: omp.inner.for.cond: 1937 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1938 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1939 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 1940 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1941 // CHECK9: omp.inner.for.body: 1942 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1943 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 1944 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1945 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 1946 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 1947 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 1948 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 1949 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1950 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1951 // CHECK9: omp.body.continue: 1952 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1953 // CHECK9: omp.inner.for.inc: 1954 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1955 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 1956 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1957 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 1958 // CHECK9: omp.inner.for.end: 1959 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1960 // CHECK9: omp.loop.exit: 1961 // CHECK9-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1962 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1963 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 1964 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 1965 // CHECK9: omp.precond.end: 1966 // CHECK9-NEXT: ret void 1967 // 1968 // 1969 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 1970 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 1971 // CHECK9-NEXT: entry: 1972 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 1973 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 1974 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1975 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1976 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 1977 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1978 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 1979 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 1980 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1981 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1982 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 1983 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 1984 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1985 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1986 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 1987 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 1988 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4 1989 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 1990 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4 1991 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1992 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 1993 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1994 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]]) 1995 // CHECK9-NEXT: ret void 1996 // 1997 // 1998 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 1999 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2000 // CHECK9-NEXT: entry: 2001 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2002 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2003 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2004 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2005 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2006 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2007 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2008 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2009 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2010 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2011 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2012 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2013 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2014 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2015 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2016 // CHECK9-NEXT: [[I5:%.*]] = alloca i32, align 4 2017 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2018 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2019 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2020 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2021 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2022 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2023 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2024 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2025 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2026 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2027 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2028 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2029 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2030 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2031 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2032 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 2033 // CHECK9-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 2034 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4 2035 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2036 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2037 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2038 // CHECK9: omp.precond.then: 2039 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2040 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2041 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2042 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2043 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2044 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 2045 // CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2046 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2047 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 2048 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2049 // CHECK9: omp.dispatch.cond: 2050 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2051 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2052 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2053 // CHECK9-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2054 // CHECK9: cond.true: 2055 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2056 // CHECK9-NEXT: br label [[COND_END:%.*]] 2057 // CHECK9: cond.false: 2058 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2059 // CHECK9-NEXT: br label [[COND_END]] 2060 // CHECK9: cond.end: 2061 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2062 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2063 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2064 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 2065 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2066 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2067 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 2068 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2069 // CHECK9: omp.dispatch.body: 2070 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2071 // CHECK9: omp.inner.for.cond: 2072 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2073 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 2074 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 2075 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2076 // CHECK9: omp.inner.for.body: 2077 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2078 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 2079 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2080 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !11 2081 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !11 2082 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 2083 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 2084 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 2085 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2086 // CHECK9: omp.body.continue: 2087 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2088 // CHECK9: omp.inner.for.inc: 2089 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2090 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 2091 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2092 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2093 // CHECK9: omp.inner.for.end: 2094 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2095 // CHECK9: omp.dispatch.inc: 2096 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2097 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2098 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2099 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4 2100 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2101 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2102 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 2103 // CHECK9-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4 2104 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2105 // CHECK9: omp.dispatch.end: 2106 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2107 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 2108 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 2109 // CHECK9-NEXT: br label [[OMP_PRECOND_END]] 2110 // CHECK9: omp.precond.end: 2111 // CHECK9-NEXT: ret void 2112 // 2113 // 2114 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 2115 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2116 // CHECK9-NEXT: entry: 2117 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2118 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 2119 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2120 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2121 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2122 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2123 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 2124 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 2125 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 2126 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2127 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 2128 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 2129 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 2130 // CHECK9-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 2131 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2132 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2133 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 2134 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 2135 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2136 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 2137 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 2138 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2139 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8 2140 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2141 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2142 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2143 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2144 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2145 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2146 // CHECK9: omp_offload.failed: 2147 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]] 2148 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2149 // CHECK9: omp_offload.cont: 2150 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2151 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 2152 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 2153 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2154 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 2155 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 2156 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 2157 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8 2158 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 2159 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 2160 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2161 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2162 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2163 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 2164 // CHECK9: omp_offload.failed5: 2165 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]] 2166 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT6]] 2167 // CHECK9: omp_offload.cont6: 2168 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2169 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 2170 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 2171 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2172 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 2173 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 2174 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 2175 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8 2176 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 2177 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 2178 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 2179 // CHECK9-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2180 // CHECK9-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2181 // CHECK9-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 2182 // CHECK9: omp_offload.failed11: 2183 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 2184 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT12]] 2185 // CHECK9: omp_offload.cont12: 2186 // CHECK9-NEXT: ret i32 0 2187 // 2188 // 2189 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 2190 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2191 // CHECK9-NEXT: entry: 2192 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2193 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2194 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2195 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2196 // CHECK9-NEXT: ret void 2197 // 2198 // 2199 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 2200 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2201 // CHECK9-NEXT: entry: 2202 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2203 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2204 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2205 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2206 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2207 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2208 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2209 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2210 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2211 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2212 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2213 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2214 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2215 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2216 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2217 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2218 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2219 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2220 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2221 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2222 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2223 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2224 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2225 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2226 // CHECK9: cond.true: 2227 // CHECK9-NEXT: br label [[COND_END:%.*]] 2228 // CHECK9: cond.false: 2229 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2230 // CHECK9-NEXT: br label [[COND_END]] 2231 // CHECK9: cond.end: 2232 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2233 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2234 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2235 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2236 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2237 // CHECK9: omp.inner.for.cond: 2238 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2239 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2240 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2241 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2242 // CHECK9: omp.inner.for.body: 2243 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2244 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2245 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2246 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2247 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2248 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2249 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2250 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2251 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2252 // CHECK9: omp.body.continue: 2253 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2254 // CHECK9: omp.inner.for.inc: 2255 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2256 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2257 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2258 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2259 // CHECK9: omp.inner.for.end: 2260 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2261 // CHECK9: omp.loop.exit: 2262 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2263 // CHECK9-NEXT: ret void 2264 // 2265 // 2266 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 2267 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2268 // CHECK9-NEXT: entry: 2269 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2270 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2271 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2272 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2273 // CHECK9-NEXT: ret void 2274 // 2275 // 2276 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 2277 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2278 // CHECK9-NEXT: entry: 2279 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2280 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2281 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2282 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2283 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2284 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2285 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2286 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2287 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2288 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2289 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2290 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2291 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2292 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2293 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2294 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2295 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2296 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2297 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2298 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2299 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2300 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2301 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2302 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2303 // CHECK9: cond.true: 2304 // CHECK9-NEXT: br label [[COND_END:%.*]] 2305 // CHECK9: cond.false: 2306 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2307 // CHECK9-NEXT: br label [[COND_END]] 2308 // CHECK9: cond.end: 2309 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2310 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2311 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2312 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2313 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2314 // CHECK9: omp.inner.for.cond: 2315 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2316 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2317 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2318 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2319 // CHECK9: omp.inner.for.body: 2320 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2321 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 2322 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2323 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2324 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 2325 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 2326 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2327 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2328 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2329 // CHECK9: omp.body.continue: 2330 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2331 // CHECK9: omp.inner.for.inc: 2332 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2333 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 2334 // CHECK9-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2335 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2336 // CHECK9: omp.inner.for.end: 2337 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2338 // CHECK9: omp.loop.exit: 2339 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2340 // CHECK9-NEXT: ret void 2341 // 2342 // 2343 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 2344 // CHECK9-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2345 // CHECK9-NEXT: entry: 2346 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2347 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2348 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2349 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 2350 // CHECK9-NEXT: ret void 2351 // 2352 // 2353 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13 2354 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 2355 // CHECK9-NEXT: entry: 2356 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2357 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2358 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 2359 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2360 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2361 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2362 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2363 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2364 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2365 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2366 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2367 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2368 // CHECK9-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 2369 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 2370 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2371 // CHECK9-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 2372 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2373 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2374 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2375 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2376 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 2377 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2378 // CHECK9: omp.dispatch.cond: 2379 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2380 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 2381 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2382 // CHECK9: cond.true: 2383 // CHECK9-NEXT: br label [[COND_END:%.*]] 2384 // CHECK9: cond.false: 2385 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2386 // CHECK9-NEXT: br label [[COND_END]] 2387 // CHECK9: cond.end: 2388 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2389 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2390 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2391 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2392 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2393 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2394 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2395 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2396 // CHECK9: omp.dispatch.body: 2397 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2398 // CHECK9: omp.inner.for.cond: 2399 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2400 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 2401 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2402 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2403 // CHECK9: omp.inner.for.body: 2404 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2405 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2406 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2407 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 2408 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 2409 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2410 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 2411 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 2412 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2413 // CHECK9: omp.body.continue: 2414 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2415 // CHECK9: omp.inner.for.inc: 2416 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2417 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2418 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2419 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 2420 // CHECK9: omp.inner.for.end: 2421 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2422 // CHECK9: omp.dispatch.inc: 2423 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2424 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2425 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 2426 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2427 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2428 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2429 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 2430 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2431 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] 2432 // CHECK9: omp.dispatch.end: 2433 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2434 // CHECK9-NEXT: ret void 2435 // 2436 // 2437 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2438 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 2439 // CHECK9-NEXT: entry: 2440 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2441 // CHECK9-NEXT: ret void 2442 // 2443 // 2444 // CHECK10-LABEL: define {{[^@]+}}@main 2445 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2446 // CHECK10-NEXT: entry: 2447 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2448 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2449 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 2450 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4 2451 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 2452 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 2453 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2454 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 2455 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 2456 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 2457 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 2458 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2459 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2460 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2461 // CHECK10-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 2462 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 2463 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 2464 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 2465 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 2466 // CHECK10-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 2467 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 2468 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 2469 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4 2470 // CHECK10-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 2471 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2472 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8 2473 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8 2474 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8 2475 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8 2476 // CHECK10-NEXT: [[_TMP26:%.*]] = alloca i32, align 4 2477 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 2478 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4 2479 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2480 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2481 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 2482 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4 2483 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 2484 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 2485 // CHECK10-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 2486 // CHECK10-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 2487 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 2488 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 2489 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 2490 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2491 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 2492 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 2493 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 2494 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 2495 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 2496 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2497 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2498 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 2499 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2500 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2501 // CHECK10-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 2502 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2503 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8 2504 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 2505 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 2506 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 2507 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 2508 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 2509 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 2510 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 2511 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8 2512 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 2513 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 2514 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 2515 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 2516 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 2517 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 2518 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 2519 // CHECK10-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 2520 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 2521 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 2522 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2523 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2524 // CHECK10-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 2525 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 2526 // CHECK10-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 2527 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2528 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 2529 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2530 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2531 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2532 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2533 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 2534 // CHECK10-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 2535 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 2536 // CHECK10-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2537 // CHECK10-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 2538 // CHECK10-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2539 // CHECK10: omp_offload.failed: 2540 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 2541 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 2542 // CHECK10: omp_offload.cont: 2543 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 2544 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 2545 // CHECK10-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 2546 // CHECK10-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 2547 // CHECK10-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 2548 // CHECK10-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 2549 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i64 24, i1 false) 2550 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2551 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 2552 // CHECK10-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 2553 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2554 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 2555 // CHECK10-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 2556 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 2557 // CHECK10-NEXT: store i8* null, i8** [[TMP40]], align 8 2558 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 2559 // CHECK10-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 2560 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 2561 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 2562 // CHECK10-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 2563 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 2564 // CHECK10-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 2565 // CHECK10-NEXT: store i8* null, i8** [[TMP45]], align 8 2566 // CHECK10-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 2567 // CHECK10-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 2568 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 2569 // CHECK10-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 2570 // CHECK10-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 2571 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 2572 // CHECK10-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 2573 // CHECK10-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 2574 // CHECK10-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 2575 // CHECK10-NEXT: store i8* null, i8** [[TMP51]], align 8 2576 // CHECK10-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 2577 // CHECK10-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 2578 // CHECK10-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 2579 // CHECK10-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 2580 // CHECK10-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 2581 // CHECK10-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 2582 // CHECK10-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 2583 // CHECK10-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 2584 // CHECK10-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 2585 // CHECK10-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 2586 // CHECK10-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 2587 // CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 2588 // CHECK10-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 2589 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP58]]) 2590 // CHECK10-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2591 // CHECK10-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 2592 // CHECK10-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 2593 // CHECK10: omp_offload.failed16: 2594 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 2595 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT17]] 2596 // CHECK10: omp_offload.cont17: 2597 // CHECK10-NEXT: [[TMP61:%.*]] = load i32, i32* [[N]], align 4 2598 // CHECK10-NEXT: store i32 [[TMP61]], i32* [[DOTCAPTURE_EXPR_18]], align 4 2599 // CHECK10-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 2600 // CHECK10-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 2601 // CHECK10-NEXT: store i32 [[TMP62]], i32* [[CONV20]], align 4 2602 // CHECK10-NEXT: [[TMP63:%.*]] = load i64, i64* [[N_CASTED19]], align 8 2603 // CHECK10-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_18]], align 4 2604 // CHECK10-NEXT: [[CONV21:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2605 // CHECK10-NEXT: store i32 [[TMP64]], i32* [[CONV21]], align 4 2606 // CHECK10-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2607 // CHECK10-NEXT: [[TMP66:%.*]] = mul nuw i64 [[TMP1]], 4 2608 // CHECK10-NEXT: [[TMP67:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8* 2609 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP67]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i64 32, i1 false) 2610 // CHECK10-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 2611 // CHECK10-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 2612 // CHECK10-NEXT: store i64 [[TMP63]], i64* [[TMP69]], align 8 2613 // CHECK10-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 2614 // CHECK10-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 2615 // CHECK10-NEXT: store i64 [[TMP63]], i64* [[TMP71]], align 8 2616 // CHECK10-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0 2617 // CHECK10-NEXT: store i8* null, i8** [[TMP72]], align 8 2618 // CHECK10-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1 2619 // CHECK10-NEXT: [[TMP74:%.*]] = bitcast i8** [[TMP73]] to i64* 2620 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP74]], align 8 2621 // CHECK10-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1 2622 // CHECK10-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i64* 2623 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP76]], align 8 2624 // CHECK10-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1 2625 // CHECK10-NEXT: store i8* null, i8** [[TMP77]], align 8 2626 // CHECK10-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2 2627 // CHECK10-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32** 2628 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP79]], align 8 2629 // CHECK10-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2 2630 // CHECK10-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 2631 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 8 2632 // CHECK10-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 2 2633 // CHECK10-NEXT: store i64 [[TMP66]], i64* [[TMP82]], align 8 2634 // CHECK10-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2 2635 // CHECK10-NEXT: store i8* null, i8** [[TMP83]], align 8 2636 // CHECK10-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3 2637 // CHECK10-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i64* 2638 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP85]], align 8 2639 // CHECK10-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3 2640 // CHECK10-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i64* 2641 // CHECK10-NEXT: store i64 [[TMP65]], i64* [[TMP87]], align 8 2642 // CHECK10-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3 2643 // CHECK10-NEXT: store i8* null, i8** [[TMP88]], align 8 2644 // CHECK10-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0 2645 // CHECK10-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0 2646 // CHECK10-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0 2647 // CHECK10-NEXT: [[TMP92:%.*]] = load i32, i32* [[N]], align 4 2648 // CHECK10-NEXT: store i32 [[TMP92]], i32* [[DOTCAPTURE_EXPR_27]], align 4 2649 // CHECK10-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 2650 // CHECK10-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP93]], 0 2651 // CHECK10-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1 2652 // CHECK10-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1 2653 // CHECK10-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4 2654 // CHECK10-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4 2655 // CHECK10-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP94]], 1 2656 // CHECK10-NEXT: [[TMP95:%.*]] = zext i32 [[ADD32]] to i64 2657 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP95]]) 2658 // CHECK10-NEXT: [[TMP96:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP89]], i8** [[TMP90]], i64* [[TMP91]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2659 // CHECK10-NEXT: [[TMP97:%.*]] = icmp ne i32 [[TMP96]], 0 2660 // CHECK10-NEXT: br i1 [[TMP97]], label [[OMP_OFFLOAD_FAILED33:%.*]], label [[OMP_OFFLOAD_CONT34:%.*]] 2661 // CHECK10: omp_offload.failed33: 2662 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP63]], i64 [[TMP1]], i32* [[VLA]], i64 [[TMP65]]) #[[ATTR3]] 2663 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT34]] 2664 // CHECK10: omp_offload.cont34: 2665 // CHECK10-NEXT: [[TMP98:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2666 // CHECK10-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP98]]) 2667 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 2668 // CHECK10-NEXT: [[TMP99:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 2669 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP99]]) 2670 // CHECK10-NEXT: [[TMP100:%.*]] = load i32, i32* [[RETVAL]], align 4 2671 // CHECK10-NEXT: ret i32 [[TMP100]] 2672 // 2673 // 2674 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 2675 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 2676 // CHECK10-NEXT: entry: 2677 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2678 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2679 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2680 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2681 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2682 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2683 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2684 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2685 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2686 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2687 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2688 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2689 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 2690 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 2691 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 2692 // CHECK10-NEXT: ret void 2693 // 2694 // 2695 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 2696 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2697 // CHECK10-NEXT: entry: 2698 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2699 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2700 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2701 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2702 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2703 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2704 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2705 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2706 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2707 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2708 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2709 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2710 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2711 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2712 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2713 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2714 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2715 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2716 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2717 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2718 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2719 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2720 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2721 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2722 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2723 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2724 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2725 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2726 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2727 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2728 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2729 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2730 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2731 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2732 // CHECK10: omp.precond.then: 2733 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2734 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2735 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2736 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2737 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2738 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2739 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2740 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2741 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2742 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2743 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2744 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2745 // CHECK10: cond.true: 2746 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2747 // CHECK10-NEXT: br label [[COND_END:%.*]] 2748 // CHECK10: cond.false: 2749 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2750 // CHECK10-NEXT: br label [[COND_END]] 2751 // CHECK10: cond.end: 2752 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2753 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2754 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2755 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2756 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2757 // CHECK10: omp.inner.for.cond: 2758 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2759 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2760 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2761 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2762 // CHECK10: omp.inner.for.body: 2763 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2764 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2765 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2766 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2767 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 2768 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 2769 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 2770 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2771 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2772 // CHECK10: omp.body.continue: 2773 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2774 // CHECK10: omp.inner.for.inc: 2775 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2776 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2777 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2778 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2779 // CHECK10: omp.inner.for.end: 2780 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2781 // CHECK10: omp.loop.exit: 2782 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2783 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2784 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2785 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2786 // CHECK10: omp.precond.end: 2787 // CHECK10-NEXT: ret void 2788 // 2789 // 2790 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 2791 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2792 // CHECK10-NEXT: entry: 2793 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2794 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2795 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2796 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2797 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2798 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2799 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2800 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2801 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2802 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2803 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2804 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2805 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 2806 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 2807 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]]) 2808 // CHECK10-NEXT: ret void 2809 // 2810 // 2811 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2812 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 2813 // CHECK10-NEXT: entry: 2814 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2815 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2816 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2817 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2818 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2819 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2820 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2821 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2822 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2823 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2824 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2825 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2826 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2827 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2828 // CHECK10-NEXT: [[I3:%.*]] = alloca i32, align 4 2829 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2830 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2831 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2832 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2833 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2834 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2835 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2836 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2837 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2838 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 2839 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2840 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2841 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2842 // CHECK10-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 2843 // CHECK10-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2844 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2845 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2846 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2847 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2848 // CHECK10: omp.precond.then: 2849 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2850 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2851 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2852 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2853 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2854 // CHECK10-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2855 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2856 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2857 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2858 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2859 // CHECK10-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 2860 // CHECK10-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2861 // CHECK10: cond.true: 2862 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2863 // CHECK10-NEXT: br label [[COND_END:%.*]] 2864 // CHECK10: cond.false: 2865 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2866 // CHECK10-NEXT: br label [[COND_END]] 2867 // CHECK10: cond.end: 2868 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 2869 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2870 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2871 // CHECK10-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 2872 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2873 // CHECK10: omp.inner.for.cond: 2874 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2875 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2876 // CHECK10-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 2877 // CHECK10-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2878 // CHECK10: omp.inner.for.body: 2879 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2880 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 2881 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2882 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 2883 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 2884 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 2885 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 2886 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2887 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2888 // CHECK10: omp.body.continue: 2889 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2890 // CHECK10: omp.inner.for.inc: 2891 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2892 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 2893 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2894 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2895 // CHECK10: omp.inner.for.end: 2896 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2897 // CHECK10: omp.loop.exit: 2898 // CHECK10-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2899 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 2900 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 2901 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 2902 // CHECK10: omp.precond.end: 2903 // CHECK10-NEXT: ret void 2904 // 2905 // 2906 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 2907 // CHECK10-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2908 // CHECK10-NEXT: entry: 2909 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2910 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2911 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2912 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2913 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 2914 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2915 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2916 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2917 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2918 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2919 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2920 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2921 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2922 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2923 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2924 // CHECK10-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32* 2925 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV2]], align 4 2926 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[N_CASTED]], align 8 2927 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV1]], align 4 2928 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2929 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[CONV3]], align 4 2930 // CHECK10-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2931 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP3]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP5]]) 2932 // CHECK10-NEXT: ret void 2933 // 2934 // 2935 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..4 2936 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 2937 // CHECK10-NEXT: entry: 2938 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2939 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2940 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 2941 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 2942 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2943 // CHECK10-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2944 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2945 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2946 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2947 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2948 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2949 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2950 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2951 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2952 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2953 // CHECK10-NEXT: [[I5:%.*]] = alloca i32, align 4 2954 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2955 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2956 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 2957 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 2958 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2959 // CHECK10-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2960 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 2961 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 2962 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2963 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2964 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 2965 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2966 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2967 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 2968 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2969 // CHECK10-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 2970 // CHECK10-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 2971 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4 2972 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2973 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 2974 // CHECK10-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 2975 // CHECK10: omp.precond.then: 2976 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2977 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2978 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 2979 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2980 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2981 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[CONV1]], align 4 2982 // CHECK10-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2983 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2984 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 2985 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2986 // CHECK10: omp.dispatch.cond: 2987 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2988 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2989 // CHECK10-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 2990 // CHECK10-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2991 // CHECK10: cond.true: 2992 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2993 // CHECK10-NEXT: br label [[COND_END:%.*]] 2994 // CHECK10: cond.false: 2995 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2996 // CHECK10-NEXT: br label [[COND_END]] 2997 // CHECK10: cond.end: 2998 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 2999 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3000 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3001 // CHECK10-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3002 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3003 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3004 // CHECK10-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3005 // CHECK10-NEXT: br i1 [[CMP7]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3006 // CHECK10: omp.dispatch.body: 3007 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3008 // CHECK10: omp.inner.for.cond: 3009 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3010 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 3011 // CHECK10-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3012 // CHECK10-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3013 // CHECK10: omp.inner.for.body: 3014 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3015 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3016 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3017 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group !11 3018 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group !11 3019 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 3020 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[IDXPROM]] 3021 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 3022 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3023 // CHECK10: omp.body.continue: 3024 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3025 // CHECK10: omp.inner.for.inc: 3026 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3027 // CHECK10-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 3028 // CHECK10-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3029 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 3030 // CHECK10: omp.inner.for.end: 3031 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3032 // CHECK10: omp.dispatch.inc: 3033 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3034 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3035 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3036 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_LB]], align 4 3037 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3038 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3039 // CHECK10-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3040 // CHECK10-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_UB]], align 4 3041 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 3042 // CHECK10: omp.dispatch.end: 3043 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3044 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 3045 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 3046 // CHECK10-NEXT: br label [[OMP_PRECOND_END]] 3047 // CHECK10: omp.precond.end: 3048 // CHECK10-NEXT: ret void 3049 // 3050 // 3051 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3052 // CHECK10-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3053 // CHECK10-NEXT: entry: 3054 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3055 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3056 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3057 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3058 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3059 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3060 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 3061 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 3062 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 3063 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3064 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 8 3065 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 8 3066 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 8 3067 // CHECK10-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3068 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3069 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3070 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 3071 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 3072 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3073 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 3074 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 3075 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3076 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8 3077 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3078 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3079 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3080 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3081 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3082 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3083 // CHECK10: omp_offload.failed: 3084 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]] 3085 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]] 3086 // CHECK10: omp_offload.cont: 3087 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3088 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 3089 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 3090 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3091 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 3092 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 3093 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 3094 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8 3095 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 3096 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 3097 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3098 // CHECK10-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3099 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 3100 // CHECK10-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 3101 // CHECK10: omp_offload.failed5: 3102 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]] 3103 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT6]] 3104 // CHECK10: omp_offload.cont6: 3105 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3106 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 3107 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8 3108 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3109 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 3110 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8 3111 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 3112 // CHECK10-NEXT: store i8* null, i8** [[TMP22]], align 8 3113 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 3114 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 3115 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 3116 // CHECK10-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3117 // CHECK10-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3118 // CHECK10-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 3119 // CHECK10: omp_offload.failed11: 3120 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 3121 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT12]] 3122 // CHECK10: omp_offload.cont12: 3123 // CHECK10-NEXT: ret i32 0 3124 // 3125 // 3126 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 3127 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3128 // CHECK10-NEXT: entry: 3129 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3130 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3131 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3132 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3133 // CHECK10-NEXT: ret void 3134 // 3135 // 3136 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..7 3137 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3138 // CHECK10-NEXT: entry: 3139 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3140 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3141 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3142 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3143 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3144 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3145 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3146 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3147 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3148 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3149 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3150 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3151 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3152 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3153 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3154 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3155 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3156 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3157 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3158 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3159 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3160 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3161 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3162 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3163 // CHECK10: cond.true: 3164 // CHECK10-NEXT: br label [[COND_END:%.*]] 3165 // CHECK10: cond.false: 3166 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3167 // CHECK10-NEXT: br label [[COND_END]] 3168 // CHECK10: cond.end: 3169 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3170 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3171 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3172 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3173 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3174 // CHECK10: omp.inner.for.cond: 3175 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3176 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3177 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3178 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3179 // CHECK10: omp.inner.for.body: 3180 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3181 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3182 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3183 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3184 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3185 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3186 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3187 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3188 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3189 // CHECK10: omp.body.continue: 3190 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3191 // CHECK10: omp.inner.for.inc: 3192 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3193 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3194 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3195 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3196 // CHECK10: omp.inner.for.end: 3197 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3198 // CHECK10: omp.loop.exit: 3199 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3200 // CHECK10-NEXT: ret void 3201 // 3202 // 3203 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 3204 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3205 // CHECK10-NEXT: entry: 3206 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3207 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3208 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3209 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3210 // CHECK10-NEXT: ret void 3211 // 3212 // 3213 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..10 3214 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3215 // CHECK10-NEXT: entry: 3216 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3217 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3218 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3219 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3220 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3221 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3222 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3223 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3224 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3225 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3226 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3227 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3228 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3229 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3230 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3231 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3232 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3233 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3234 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3235 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3236 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3237 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3238 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3239 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3240 // CHECK10: cond.true: 3241 // CHECK10-NEXT: br label [[COND_END:%.*]] 3242 // CHECK10: cond.false: 3243 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3244 // CHECK10-NEXT: br label [[COND_END]] 3245 // CHECK10: cond.end: 3246 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3247 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3248 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3249 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3250 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3251 // CHECK10: omp.inner.for.cond: 3252 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3253 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3254 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3255 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3256 // CHECK10: omp.inner.for.body: 3257 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3258 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 3259 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3260 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3261 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 3262 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 3263 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3264 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3265 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3266 // CHECK10: omp.body.continue: 3267 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3268 // CHECK10: omp.inner.for.inc: 3269 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3270 // CHECK10-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 3271 // CHECK10-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3272 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3273 // CHECK10: omp.inner.for.end: 3274 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3275 // CHECK10: omp.loop.exit: 3276 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3277 // CHECK10-NEXT: ret void 3278 // 3279 // 3280 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 3281 // CHECK10-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3282 // CHECK10-NEXT: entry: 3283 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3284 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3285 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3286 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 3287 // CHECK10-NEXT: ret void 3288 // 3289 // 3290 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..13 3291 // CHECK10-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 3292 // CHECK10-NEXT: entry: 3293 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3294 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3295 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 3296 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3297 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 3298 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3299 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3300 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3301 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3302 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 3303 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3304 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3305 // CHECK10-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 3306 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 3307 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3308 // CHECK10-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 3309 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3310 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3311 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3312 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3313 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 3314 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3315 // CHECK10: omp.dispatch.cond: 3316 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3317 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 3318 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3319 // CHECK10: cond.true: 3320 // CHECK10-NEXT: br label [[COND_END:%.*]] 3321 // CHECK10: cond.false: 3322 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3323 // CHECK10-NEXT: br label [[COND_END]] 3324 // CHECK10: cond.end: 3325 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3326 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3327 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3328 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3329 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3330 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3331 // CHECK10-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3332 // CHECK10-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3333 // CHECK10: omp.dispatch.body: 3334 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3335 // CHECK10: omp.inner.for.cond: 3336 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3337 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 3338 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3339 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3340 // CHECK10: omp.inner.for.body: 3341 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3342 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3343 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3344 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 3345 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 3346 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 3347 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 3348 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 3349 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3350 // CHECK10: omp.body.continue: 3351 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3352 // CHECK10: omp.inner.for.inc: 3353 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3354 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 3355 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3356 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 3357 // CHECK10: omp.inner.for.end: 3358 // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3359 // CHECK10: omp.dispatch.inc: 3360 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3361 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3362 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3363 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3364 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3365 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3366 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 3367 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3368 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] 3369 // CHECK10: omp.dispatch.end: 3370 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3371 // CHECK10-NEXT: ret void 3372 // 3373 // 3374 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3375 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 3376 // CHECK10-NEXT: entry: 3377 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 3378 // CHECK10-NEXT: ret void 3379 // 3380 // 3381 // CHECK11-LABEL: define {{[^@]+}}@main 3382 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3383 // CHECK11-NEXT: entry: 3384 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3385 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3386 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 3387 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4 3388 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 3389 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 3390 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3391 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 3392 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 3393 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 3394 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 3395 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3396 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3397 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3398 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 3399 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 3400 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 3401 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 3402 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 3403 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 3404 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 3405 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 3406 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 3407 // CHECK11-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 3408 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 3409 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4 3410 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4 3411 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4 3412 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4 3413 // CHECK11-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 3414 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 3415 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 3416 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 3417 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3418 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 3419 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4 3420 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3421 // CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 3422 // CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 3423 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 3424 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 3425 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 3426 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3427 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3428 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 3429 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 3430 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3431 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 3432 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3433 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 3434 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 3435 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3436 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 3437 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 3438 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3439 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4 3440 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3441 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 3442 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 3443 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3444 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 3445 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 3446 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 3447 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4 3448 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3449 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 3450 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 3451 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3452 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 3453 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 3454 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3455 // CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 3456 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 3457 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 3458 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3459 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3460 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3461 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3462 // CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 3463 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3464 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 3465 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3466 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3467 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3468 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3469 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 3470 // CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 3471 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 3472 // CHECK11-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3473 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3474 // CHECK11-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3475 // CHECK11: omp_offload.failed: 3476 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3477 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 3478 // CHECK11: omp_offload.cont: 3479 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 3480 // CHECK11-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 3481 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 3482 // CHECK11-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 3483 // CHECK11-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 3484 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 3485 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 3486 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 3487 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 3488 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 3489 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 3490 // CHECK11-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 3491 // CHECK11-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 3492 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 3493 // CHECK11-NEXT: store i8* null, i8** [[TMP41]], align 4 3494 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 3495 // CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 3496 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 3497 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 3498 // CHECK11-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 3499 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 3500 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 3501 // CHECK11-NEXT: store i8* null, i8** [[TMP46]], align 4 3502 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 3503 // CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 3504 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 3505 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 3506 // CHECK11-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 3507 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 3508 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 3509 // CHECK11-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 3510 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 3511 // CHECK11-NEXT: store i8* null, i8** [[TMP52]], align 4 3512 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 3513 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 3514 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 3515 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 3516 // CHECK11-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 3517 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 3518 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 3519 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 3520 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 3521 // CHECK11-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 3522 // CHECK11-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 3523 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 3524 // CHECK11-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 3525 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 3526 // CHECK11-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3527 // CHECK11-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 3528 // CHECK11-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 3529 // CHECK11: omp_offload.failed15: 3530 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 3531 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT16]] 3532 // CHECK11: omp_offload.cont16: 3533 // CHECK11-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 3534 // CHECK11-NEXT: store i32 [[TMP62]], i32* [[DOTCAPTURE_EXPR_17]], align 4 3535 // CHECK11-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 3536 // CHECK11-NEXT: store i32 [[TMP63]], i32* [[N_CASTED18]], align 4 3537 // CHECK11-NEXT: [[TMP64:%.*]] = load i32, i32* [[N_CASTED18]], align 4 3538 // CHECK11-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4 3539 // CHECK11-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3540 // CHECK11-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3541 // CHECK11-NEXT: [[TMP67:%.*]] = mul nuw i32 [[TMP0]], 4 3542 // CHECK11-NEXT: [[TMP68:%.*]] = sext i32 [[TMP67]] to i64 3543 // CHECK11-NEXT: [[TMP69:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8* 3544 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP69]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false) 3545 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3546 // CHECK11-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 3547 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP71]], align 4 3548 // CHECK11-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3549 // CHECK11-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 3550 // CHECK11-NEXT: store i32 [[TMP64]], i32* [[TMP73]], align 4 3551 // CHECK11-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 3552 // CHECK11-NEXT: store i8* null, i8** [[TMP74]], align 4 3553 // CHECK11-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 3554 // CHECK11-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 3555 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP76]], align 4 3556 // CHECK11-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 3557 // CHECK11-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32* 3558 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4 3559 // CHECK11-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 3560 // CHECK11-NEXT: store i8* null, i8** [[TMP79]], align 4 3561 // CHECK11-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 3562 // CHECK11-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 3563 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 4 3564 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 3565 // CHECK11-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 3566 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 4 3567 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2 3568 // CHECK11-NEXT: store i64 [[TMP68]], i64* [[TMP84]], align 4 3569 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 3570 // CHECK11-NEXT: store i8* null, i8** [[TMP85]], align 4 3571 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 3572 // CHECK11-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32* 3573 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP87]], align 4 3574 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 3575 // CHECK11-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32* 3576 // CHECK11-NEXT: store i32 [[TMP66]], i32* [[TMP89]], align 4 3577 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3 3578 // CHECK11-NEXT: store i8* null, i8** [[TMP90]], align 4 3579 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 3580 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 3581 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 3582 // CHECK11-NEXT: [[TMP94:%.*]] = load i32, i32* [[N]], align 4 3583 // CHECK11-NEXT: store i32 [[TMP94]], i32* [[DOTCAPTURE_EXPR_24]], align 4 3584 // CHECK11-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 3585 // CHECK11-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0 3586 // CHECK11-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 3587 // CHECK11-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 3588 // CHECK11-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 3589 // CHECK11-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3590 // CHECK11-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1 3591 // CHECK11-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i64 3592 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP97]]) 3593 // CHECK11-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP91]], i8** [[TMP92]], i64* [[TMP93]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3594 // CHECK11-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 3595 // CHECK11-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 3596 // CHECK11: omp_offload.failed30: 3597 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP64]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP66]]) #[[ATTR3]] 3598 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT31]] 3599 // CHECK11: omp_offload.cont31: 3600 // CHECK11-NEXT: [[TMP100:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3601 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP100]]) 3602 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 3603 // CHECK11-NEXT: [[TMP101:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 3604 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP101]]) 3605 // CHECK11-NEXT: [[TMP102:%.*]] = load i32, i32* [[RETVAL]], align 4 3606 // CHECK11-NEXT: ret i32 [[TMP102]] 3607 // 3608 // 3609 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 3610 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 3611 // CHECK11-NEXT: entry: 3612 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3613 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3614 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3615 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3616 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3617 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3618 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3619 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3620 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3621 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 3622 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3623 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3624 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 3625 // CHECK11-NEXT: ret void 3626 // 3627 // 3628 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined. 3629 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3630 // CHECK11-NEXT: entry: 3631 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3632 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3633 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3634 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3635 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3636 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3637 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3638 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3639 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3640 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3641 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3642 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3643 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3644 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3645 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3646 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3647 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3648 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3649 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3650 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3651 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3652 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3653 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 3654 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3655 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3656 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3657 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3658 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3659 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3660 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3661 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3662 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 3663 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3664 // CHECK11: omp.precond.then: 3665 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3666 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3667 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3668 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3669 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3670 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3671 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3672 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3673 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3674 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3675 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 3676 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3677 // CHECK11: cond.true: 3678 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3679 // CHECK11-NEXT: br label [[COND_END:%.*]] 3680 // CHECK11: cond.false: 3681 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3682 // CHECK11-NEXT: br label [[COND_END]] 3683 // CHECK11: cond.end: 3684 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 3685 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3686 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3687 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 3688 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3689 // CHECK11: omp.inner.for.cond: 3690 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3691 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3692 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3693 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3694 // CHECK11: omp.inner.for.body: 3695 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3696 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 3697 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3698 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3699 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 3700 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 3701 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3702 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3703 // CHECK11: omp.body.continue: 3704 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3705 // CHECK11: omp.inner.for.inc: 3706 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3707 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 3708 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3709 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3710 // CHECK11: omp.inner.for.end: 3711 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3712 // CHECK11: omp.loop.exit: 3713 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3714 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 3715 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 3716 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3717 // CHECK11: omp.precond.end: 3718 // CHECK11-NEXT: ret void 3719 // 3720 // 3721 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 3722 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3723 // CHECK11-NEXT: entry: 3724 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3725 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3726 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3727 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3728 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3729 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3730 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3731 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3732 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3733 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 3734 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3735 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3736 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 3737 // CHECK11-NEXT: ret void 3738 // 3739 // 3740 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1 3741 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 3742 // CHECK11-NEXT: entry: 3743 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3744 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3745 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3746 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3747 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3748 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3749 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3750 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3751 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3752 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3753 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3754 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3755 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3756 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3757 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4 3758 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3759 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3760 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3761 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3762 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3763 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3764 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3765 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 3766 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 3767 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3768 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3769 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3770 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3771 // CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3772 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3773 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3774 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 3775 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3776 // CHECK11: omp.precond.then: 3777 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3778 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3779 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3780 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3781 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3782 // CHECK11-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3783 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3784 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3785 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3786 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3787 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 3788 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3789 // CHECK11: cond.true: 3790 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3791 // CHECK11-NEXT: br label [[COND_END:%.*]] 3792 // CHECK11: cond.false: 3793 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3794 // CHECK11-NEXT: br label [[COND_END]] 3795 // CHECK11: cond.end: 3796 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 3797 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3798 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3799 // CHECK11-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 3800 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3801 // CHECK11: omp.inner.for.cond: 3802 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3803 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3804 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 3805 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3806 // CHECK11: omp.inner.for.body: 3807 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3808 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 3809 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3810 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 3811 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 3812 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 3813 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3814 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3815 // CHECK11: omp.body.continue: 3816 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3817 // CHECK11: omp.inner.for.inc: 3818 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3819 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 3820 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 3821 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 3822 // CHECK11: omp.inner.for.end: 3823 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3824 // CHECK11: omp.loop.exit: 3825 // CHECK11-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3826 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 3827 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 3828 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3829 // CHECK11: omp.precond.end: 3830 // CHECK11-NEXT: ret void 3831 // 3832 // 3833 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 3834 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3835 // CHECK11-NEXT: entry: 3836 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3837 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3838 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3839 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 3840 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 3841 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 3842 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3843 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3844 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3845 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3846 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3847 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3848 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 3849 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 3850 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 3851 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3852 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3853 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 3854 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]]) 3855 // CHECK11-NEXT: ret void 3856 // 3857 // 3858 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4 3859 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 3860 // CHECK11-NEXT: entry: 3861 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3862 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3863 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 3864 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 3865 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 3866 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 3867 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3868 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3869 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3870 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3871 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 3872 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3873 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3874 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3875 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3876 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4 3877 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3878 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3879 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 3880 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 3881 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 3882 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3883 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 3884 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 3885 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 3886 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3887 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3888 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 3889 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3890 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 3891 // CHECK11-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3892 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4 3893 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3894 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 3895 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 3896 // CHECK11: omp.precond.then: 3897 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3898 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3899 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 3900 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3901 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3902 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 3903 // CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3904 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3905 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 3906 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3907 // CHECK11: omp.dispatch.cond: 3908 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3909 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3910 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 3911 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3912 // CHECK11: cond.true: 3913 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3914 // CHECK11-NEXT: br label [[COND_END:%.*]] 3915 // CHECK11: cond.false: 3916 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3917 // CHECK11-NEXT: br label [[COND_END]] 3918 // CHECK11: cond.end: 3919 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 3920 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3921 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3922 // CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 3923 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3924 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3925 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 3926 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3927 // CHECK11: omp.dispatch.body: 3928 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3929 // CHECK11: omp.inner.for.cond: 3930 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3931 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 3932 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 3933 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3934 // CHECK11: omp.inner.for.body: 3935 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3936 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 3937 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3938 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 3939 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 3940 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]] 3941 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 3942 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3943 // CHECK11: omp.body.continue: 3944 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3945 // CHECK11: omp.inner.for.inc: 3946 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3947 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 3948 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3949 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3950 // CHECK11: omp.inner.for.end: 3951 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3952 // CHECK11: omp.dispatch.inc: 3953 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3954 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3955 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 3956 // CHECK11-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 3957 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3958 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3959 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 3960 // CHECK11-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 3961 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 3962 // CHECK11: omp.dispatch.end: 3963 // CHECK11-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3964 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 3965 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 3966 // CHECK11-NEXT: br label [[OMP_PRECOND_END]] 3967 // CHECK11: omp.precond.end: 3968 // CHECK11-NEXT: ret void 3969 // 3970 // 3971 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 3972 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3973 // CHECK11-NEXT: entry: 3974 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3975 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 3976 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 3977 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 3978 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 3979 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 3980 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 3981 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 3982 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 3983 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3984 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 3985 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 3986 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 3987 // CHECK11-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 3988 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3989 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3990 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 3991 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 3992 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3993 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 3994 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 3995 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 3996 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4 3997 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3998 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3999 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4000 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4001 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4002 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4003 // CHECK11: omp_offload.failed: 4004 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]] 4005 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]] 4006 // CHECK11: omp_offload.cont: 4007 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4008 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 4009 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 4010 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4011 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 4012 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 4013 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 4014 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4 4015 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4016 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4017 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4018 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4019 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 4020 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 4021 // CHECK11: omp_offload.failed5: 4022 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]] 4023 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT6]] 4024 // CHECK11: omp_offload.cont6: 4025 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4026 // CHECK11-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 4027 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 4028 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4029 // CHECK11-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 4030 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 4031 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 4032 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4 4033 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4034 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4035 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4036 // CHECK11-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4037 // CHECK11-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 4038 // CHECK11-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 4039 // CHECK11: omp_offload.failed11: 4040 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 4041 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT12]] 4042 // CHECK11: omp_offload.cont12: 4043 // CHECK11-NEXT: ret i32 0 4044 // 4045 // 4046 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 4047 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4048 // CHECK11-NEXT: entry: 4049 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4050 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4051 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4052 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4053 // CHECK11-NEXT: ret void 4054 // 4055 // 4056 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7 4057 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4058 // CHECK11-NEXT: entry: 4059 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4060 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4061 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4062 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4063 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4064 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4065 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4066 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4067 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4068 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4069 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4070 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4071 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4072 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4073 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4074 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4075 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4076 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4077 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4078 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4079 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4080 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4081 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4082 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4083 // CHECK11: cond.true: 4084 // CHECK11-NEXT: br label [[COND_END:%.*]] 4085 // CHECK11: cond.false: 4086 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4087 // CHECK11-NEXT: br label [[COND_END]] 4088 // CHECK11: cond.end: 4089 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4090 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4091 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4092 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4093 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4094 // CHECK11: omp.inner.for.cond: 4095 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4096 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4097 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4098 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4099 // CHECK11: omp.inner.for.body: 4100 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4101 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4102 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4103 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4104 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4105 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4106 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4107 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4108 // CHECK11: omp.body.continue: 4109 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4110 // CHECK11: omp.inner.for.inc: 4111 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4112 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4113 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4114 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4115 // CHECK11: omp.inner.for.end: 4116 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4117 // CHECK11: omp.loop.exit: 4118 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4119 // CHECK11-NEXT: ret void 4120 // 4121 // 4122 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 4123 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4124 // CHECK11-NEXT: entry: 4125 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4126 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4127 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4128 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4129 // CHECK11-NEXT: ret void 4130 // 4131 // 4132 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10 4133 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4134 // CHECK11-NEXT: entry: 4135 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4136 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4137 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4138 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4139 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4140 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4141 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4142 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4143 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4144 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4145 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4146 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4147 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4148 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4149 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4150 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4151 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4152 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4153 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4154 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4155 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4156 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4157 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4158 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4159 // CHECK11: cond.true: 4160 // CHECK11-NEXT: br label [[COND_END:%.*]] 4161 // CHECK11: cond.false: 4162 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4163 // CHECK11-NEXT: br label [[COND_END]] 4164 // CHECK11: cond.end: 4165 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4166 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4167 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4168 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4169 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4170 // CHECK11: omp.inner.for.cond: 4171 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4172 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4173 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4174 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4175 // CHECK11: omp.inner.for.body: 4176 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4177 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 4178 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4179 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4180 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 4181 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 4182 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4183 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4184 // CHECK11: omp.body.continue: 4185 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4186 // CHECK11: omp.inner.for.inc: 4187 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4188 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 4189 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4190 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]] 4191 // CHECK11: omp.inner.for.end: 4192 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4193 // CHECK11: omp.loop.exit: 4194 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4195 // CHECK11-NEXT: ret void 4196 // 4197 // 4198 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 4199 // CHECK11-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4200 // CHECK11-NEXT: entry: 4201 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4202 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4203 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4204 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4205 // CHECK11-NEXT: ret void 4206 // 4207 // 4208 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13 4209 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4210 // CHECK11-NEXT: entry: 4211 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4212 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4213 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4214 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4215 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4 4216 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4217 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4218 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4219 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4220 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4 4221 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4222 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4223 // CHECK11-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4224 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4225 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4226 // CHECK11-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4227 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4228 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4229 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4230 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4231 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 4232 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4233 // CHECK11: omp.dispatch.cond: 4234 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4235 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4236 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4237 // CHECK11: cond.true: 4238 // CHECK11-NEXT: br label [[COND_END:%.*]] 4239 // CHECK11: cond.false: 4240 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4241 // CHECK11-NEXT: br label [[COND_END]] 4242 // CHECK11: cond.end: 4243 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4244 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4245 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4246 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4247 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4248 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4249 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4250 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4251 // CHECK11: omp.dispatch.body: 4252 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4253 // CHECK11: omp.inner.for.cond: 4254 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4255 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 4256 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4257 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4258 // CHECK11: omp.inner.for.body: 4259 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4260 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4261 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4262 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 4263 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 4264 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 4265 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 4266 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4267 // CHECK11: omp.body.continue: 4268 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4269 // CHECK11: omp.inner.for.inc: 4270 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4271 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4272 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 4273 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 4274 // CHECK11: omp.inner.for.end: 4275 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4276 // CHECK11: omp.dispatch.inc: 4277 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4278 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4279 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 4280 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 4281 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4282 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4283 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 4284 // CHECK11-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 4285 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]] 4286 // CHECK11: omp.dispatch.end: 4287 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4288 // CHECK11-NEXT: ret void 4289 // 4290 // 4291 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4292 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] { 4293 // CHECK11-NEXT: entry: 4294 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1) 4295 // CHECK11-NEXT: ret void 4296 // 4297 // 4298 // CHECK12-LABEL: define {{[^@]+}}@main 4299 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4300 // CHECK12-NEXT: entry: 4301 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4302 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4303 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 4304 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4 4305 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 4306 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 4307 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4308 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 4309 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 4310 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 4311 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 4312 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4313 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4314 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4315 // CHECK12-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 4316 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 4317 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 4318 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 4319 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 4320 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 4321 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 4322 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 4323 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4 4324 // CHECK12-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4 4325 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4326 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4 4327 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4 4328 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4 4329 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4 4330 // CHECK12-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 4331 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 4332 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 4333 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 4334 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4335 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 4336 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4 4337 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 4338 // CHECK12-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 4339 // CHECK12-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 4340 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 4341 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 4342 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 4343 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4344 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4345 // CHECK12-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 4346 // CHECK12-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 4347 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 4348 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 4349 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4350 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 4351 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 4352 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4353 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 4354 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 4355 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4356 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4 4357 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 4358 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 4359 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 4360 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 4361 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 4362 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 4363 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 4364 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4 4365 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 4366 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 4367 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 4368 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 4369 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 4370 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 4371 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 4372 // CHECK12-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 4373 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 4374 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 4375 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4376 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4377 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 4378 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 4379 // CHECK12-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 4380 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4381 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 4382 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4383 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4384 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4385 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4386 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 4387 // CHECK12-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 4388 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 [[TMP29]]) 4389 // CHECK12-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4390 // CHECK12-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 4391 // CHECK12-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4392 // CHECK12: omp_offload.failed: 4393 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 4394 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 4395 // CHECK12: omp_offload.cont: 4396 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 4397 // CHECK12-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 4398 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 4399 // CHECK12-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 4400 // CHECK12-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 4401 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 4402 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.2 to i8*), i32 24, i1 false) 4403 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4404 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 4405 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 4406 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4407 // CHECK12-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 4408 // CHECK12-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 4409 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 4410 // CHECK12-NEXT: store i8* null, i8** [[TMP41]], align 4 4411 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 4412 // CHECK12-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 4413 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 4414 // CHECK12-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 4415 // CHECK12-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 4416 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 4417 // CHECK12-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 4418 // CHECK12-NEXT: store i8* null, i8** [[TMP46]], align 4 4419 // CHECK12-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 4420 // CHECK12-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 4421 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 4422 // CHECK12-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 4423 // CHECK12-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 4424 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 4425 // CHECK12-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 4426 // CHECK12-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 4427 // CHECK12-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 4428 // CHECK12-NEXT: store i8* null, i8** [[TMP52]], align 4 4429 // CHECK12-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 4430 // CHECK12-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 4431 // CHECK12-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 4432 // CHECK12-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 4433 // CHECK12-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 4434 // CHECK12-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 4435 // CHECK12-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 4436 // CHECK12-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 4437 // CHECK12-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 4438 // CHECK12-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 4439 // CHECK12-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 4440 // CHECK12-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 4441 // CHECK12-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 4442 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP59]]) 4443 // CHECK12-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4444 // CHECK12-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 4445 // CHECK12-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 4446 // CHECK12: omp_offload.failed15: 4447 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 4448 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT16]] 4449 // CHECK12: omp_offload.cont16: 4450 // CHECK12-NEXT: [[TMP62:%.*]] = load i32, i32* [[N]], align 4 4451 // CHECK12-NEXT: store i32 [[TMP62]], i32* [[DOTCAPTURE_EXPR_17]], align 4 4452 // CHECK12-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 4453 // CHECK12-NEXT: store i32 [[TMP63]], i32* [[N_CASTED18]], align 4 4454 // CHECK12-NEXT: [[TMP64:%.*]] = load i32, i32* [[N_CASTED18]], align 4 4455 // CHECK12-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_17]], align 4 4456 // CHECK12-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4457 // CHECK12-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4458 // CHECK12-NEXT: [[TMP67:%.*]] = mul nuw i32 [[TMP0]], 4 4459 // CHECK12-NEXT: [[TMP68:%.*]] = sext i32 [[TMP67]] to i64 4460 // CHECK12-NEXT: [[TMP69:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8* 4461 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP69]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.5 to i8*), i32 32, i1 false) 4462 // CHECK12-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 4463 // CHECK12-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 4464 // CHECK12-NEXT: store i32 [[TMP64]], i32* [[TMP71]], align 4 4465 // CHECK12-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 4466 // CHECK12-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 4467 // CHECK12-NEXT: store i32 [[TMP64]], i32* [[TMP73]], align 4 4468 // CHECK12-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0 4469 // CHECK12-NEXT: store i8* null, i8** [[TMP74]], align 4 4470 // CHECK12-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1 4471 // CHECK12-NEXT: [[TMP76:%.*]] = bitcast i8** [[TMP75]] to i32* 4472 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP76]], align 4 4473 // CHECK12-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1 4474 // CHECK12-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32* 4475 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP78]], align 4 4476 // CHECK12-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1 4477 // CHECK12-NEXT: store i8* null, i8** [[TMP79]], align 4 4478 // CHECK12-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2 4479 // CHECK12-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i32** 4480 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP81]], align 4 4481 // CHECK12-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2 4482 // CHECK12-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 4483 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 4 4484 // CHECK12-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 2 4485 // CHECK12-NEXT: store i64 [[TMP68]], i64* [[TMP84]], align 4 4486 // CHECK12-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2 4487 // CHECK12-NEXT: store i8* null, i8** [[TMP85]], align 4 4488 // CHECK12-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3 4489 // CHECK12-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32* 4490 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP87]], align 4 4491 // CHECK12-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3 4492 // CHECK12-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32* 4493 // CHECK12-NEXT: store i32 [[TMP66]], i32* [[TMP89]], align 4 4494 // CHECK12-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3 4495 // CHECK12-NEXT: store i8* null, i8** [[TMP90]], align 4 4496 // CHECK12-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0 4497 // CHECK12-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0 4498 // CHECK12-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0 4499 // CHECK12-NEXT: [[TMP94:%.*]] = load i32, i32* [[N]], align 4 4500 // CHECK12-NEXT: store i32 [[TMP94]], i32* [[DOTCAPTURE_EXPR_24]], align 4 4501 // CHECK12-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 4502 // CHECK12-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0 4503 // CHECK12-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1 4504 // CHECK12-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1 4505 // CHECK12-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4 4506 // CHECK12-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4507 // CHECK12-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1 4508 // CHECK12-NEXT: [[TMP97:%.*]] = zext i32 [[ADD29]] to i64 4509 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 [[TMP97]]) 4510 // CHECK12-NEXT: [[TMP98:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, i32 4, i8** [[TMP91]], i8** [[TMP92]], i64* [[TMP93]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.6, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4511 // CHECK12-NEXT: [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0 4512 // CHECK12-NEXT: br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]] 4513 // CHECK12: omp_offload.failed30: 4514 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP64]], i32 [[TMP0]], i32* [[VLA]], i32 [[TMP66]]) #[[ATTR3]] 4515 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT31]] 4516 // CHECK12: omp_offload.cont31: 4517 // CHECK12-NEXT: [[TMP100:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4518 // CHECK12-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP100]]) 4519 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4520 // CHECK12-NEXT: [[TMP101:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 4521 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP101]]) 4522 // CHECK12-NEXT: [[TMP102:%.*]] = load i32, i32* [[RETVAL]], align 4 4523 // CHECK12-NEXT: ret i32 [[TMP102]] 4524 // 4525 // 4526 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94 4527 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4528 // CHECK12-NEXT: entry: 4529 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4530 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4531 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4532 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4533 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4534 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4535 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4536 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4537 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4538 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4539 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4540 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4541 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 4542 // CHECK12-NEXT: ret void 4543 // 4544 // 4545 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined. 4546 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4547 // CHECK12-NEXT: entry: 4548 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4549 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4550 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4551 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4552 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4553 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4554 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4555 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4556 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4557 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4558 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4559 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4560 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4561 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4562 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 4563 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4564 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4565 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4566 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4567 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4568 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4569 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4570 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4571 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4572 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4573 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4574 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4575 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4576 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4577 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 4578 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4579 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4580 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4581 // CHECK12: omp.precond.then: 4582 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4583 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4584 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4585 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4586 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4587 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4588 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 4589 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4590 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4591 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4592 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 4593 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4594 // CHECK12: cond.true: 4595 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4596 // CHECK12-NEXT: br label [[COND_END:%.*]] 4597 // CHECK12: cond.false: 4598 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4599 // CHECK12-NEXT: br label [[COND_END]] 4600 // CHECK12: cond.end: 4601 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 4602 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4603 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4604 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 4605 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4606 // CHECK12: omp.inner.for.cond: 4607 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4608 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4609 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4610 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4611 // CHECK12: omp.inner.for.body: 4612 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4613 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 4614 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4615 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4616 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 4617 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 4618 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4619 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4620 // CHECK12: omp.body.continue: 4621 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4622 // CHECK12: omp.inner.for.inc: 4623 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4624 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 4625 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4626 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4627 // CHECK12: omp.inner.for.end: 4628 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4629 // CHECK12: omp.loop.exit: 4630 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4631 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 4632 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 4633 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 4634 // CHECK12: omp.precond.end: 4635 // CHECK12-NEXT: ret void 4636 // 4637 // 4638 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98 4639 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4640 // CHECK12-NEXT: entry: 4641 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4642 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4643 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4644 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4645 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4646 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4647 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4648 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4649 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4650 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4651 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4652 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4653 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]]) 4654 // CHECK12-NEXT: ret void 4655 // 4656 // 4657 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1 4658 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4659 // CHECK12-NEXT: entry: 4660 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4661 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4662 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4663 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4664 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4665 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4666 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4667 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4668 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4669 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4670 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4671 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4672 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4673 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4674 // CHECK12-NEXT: [[I3:%.*]] = alloca i32, align 4 4675 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4676 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4677 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4678 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4679 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4680 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4681 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4682 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4683 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4684 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4685 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4686 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4687 // CHECK12-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4688 // CHECK12-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4689 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 4690 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4691 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4692 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4693 // CHECK12: omp.precond.then: 4694 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4695 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4696 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4697 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4698 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4699 // CHECK12-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4700 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 4701 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4702 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4703 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4704 // CHECK12-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]] 4705 // CHECK12-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4706 // CHECK12: cond.true: 4707 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4708 // CHECK12-NEXT: br label [[COND_END:%.*]] 4709 // CHECK12: cond.false: 4710 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4711 // CHECK12-NEXT: br label [[COND_END]] 4712 // CHECK12: cond.end: 4713 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ] 4714 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4715 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4716 // CHECK12-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4 4717 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4718 // CHECK12: omp.inner.for.cond: 4719 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4720 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4721 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 4722 // CHECK12-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4723 // CHECK12: omp.inner.for.body: 4724 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4725 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 4726 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4727 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 4728 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4 4729 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP16]] 4730 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4731 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4732 // CHECK12: omp.body.continue: 4733 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4734 // CHECK12: omp.inner.for.inc: 4735 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4736 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1 4737 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4738 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 4739 // CHECK12: omp.inner.for.end: 4740 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4741 // CHECK12: omp.loop.exit: 4742 // CHECK12-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4743 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 4744 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]]) 4745 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 4746 // CHECK12: omp.precond.end: 4747 // CHECK12-NEXT: ret void 4748 // 4749 // 4750 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102 4751 // CHECK12-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4752 // CHECK12-NEXT: entry: 4753 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4754 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4755 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4756 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4757 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 4758 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 4759 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4760 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4761 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4762 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4763 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4764 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4765 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4766 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 4767 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 4768 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4769 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4770 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 4771 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP3]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP5]]) 4772 // CHECK12-NEXT: ret void 4773 // 4774 // 4775 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..4 4776 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4777 // CHECK12-NEXT: entry: 4778 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4779 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4780 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 4781 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 4782 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 4783 // CHECK12-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 4784 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4785 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4786 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4787 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4788 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4789 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4790 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4791 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4792 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4793 // CHECK12-NEXT: [[I4:%.*]] = alloca i32, align 4 4794 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4795 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4796 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 4797 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 4798 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 4799 // CHECK12-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4800 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 4801 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 4802 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4 4803 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4804 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4805 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0 4806 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4807 // CHECK12-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4808 // CHECK12-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4809 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4 4810 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4811 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]] 4812 // CHECK12-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4813 // CHECK12: omp.precond.then: 4814 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4815 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4816 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4 4817 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4818 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4819 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 4820 // CHECK12-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4821 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4822 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]]) 4823 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4824 // CHECK12: omp.dispatch.cond: 4825 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4826 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4827 // CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4828 // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4829 // CHECK12: cond.true: 4830 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4831 // CHECK12-NEXT: br label [[COND_END:%.*]] 4832 // CHECK12: cond.false: 4833 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4834 // CHECK12-NEXT: br label [[COND_END]] 4835 // CHECK12: cond.end: 4836 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4837 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4838 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4839 // CHECK12-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4840 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4841 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4842 // CHECK12-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4843 // CHECK12-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4844 // CHECK12: omp.dispatch.body: 4845 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4846 // CHECK12: omp.inner.for.cond: 4847 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4848 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 4849 // CHECK12-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4850 // CHECK12-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4851 // CHECK12: omp.inner.for.body: 4852 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4853 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4854 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4855 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !12 4856 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !12 4857 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 [[TMP19]] 4858 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 4859 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4860 // CHECK12: omp.body.continue: 4861 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4862 // CHECK12: omp.inner.for.inc: 4863 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4864 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1 4865 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4866 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4867 // CHECK12: omp.inner.for.end: 4868 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4869 // CHECK12: omp.dispatch.inc: 4870 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4871 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4872 // CHECK12-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 4873 // CHECK12-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 4874 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4875 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4876 // CHECK12-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4877 // CHECK12-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 4878 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 4879 // CHECK12: omp.dispatch.end: 4880 // CHECK12-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4881 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 4882 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]]) 4883 // CHECK12-NEXT: br label [[OMP_PRECOND_END]] 4884 // CHECK12: omp.precond.end: 4885 // CHECK12-NEXT: ret void 4886 // 4887 // 4888 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 4889 // CHECK12-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 4890 // CHECK12-NEXT: entry: 4891 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4892 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 4893 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 4894 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 4895 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 4896 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4897 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 4898 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 4899 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 4900 // CHECK12-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4901 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [1 x i8*], align 4 4902 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [1 x i8*], align 4 4903 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [1 x i8*], align 4 4904 // CHECK12-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 4905 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4906 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4907 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 4908 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 4909 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4910 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 4911 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 4912 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 4913 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4 4914 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4915 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4916 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4917 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4918 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4919 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4920 // CHECK12: omp_offload.failed: 4921 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76([10 x i32]* [[A]]) #[[ATTR3]] 4922 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]] 4923 // CHECK12: omp_offload.cont: 4924 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4925 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 4926 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 4927 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4928 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 4929 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 4930 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 4931 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4 4932 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 4933 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 4934 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4935 // CHECK12-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.11, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.12, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4936 // CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 4937 // CHECK12-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 4938 // CHECK12: omp_offload.failed5: 4939 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80([10 x i32]* [[A]]) #[[ATTR3]] 4940 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT6]] 4941 // CHECK12: omp_offload.cont6: 4942 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4943 // CHECK12-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]** 4944 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4 4945 // CHECK12-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4946 // CHECK12-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]** 4947 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4 4948 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 4949 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4 4950 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 4951 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 4952 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 10) 4953 // CHECK12-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.14, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.15, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4954 // CHECK12-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 4955 // CHECK12-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 4956 // CHECK12: omp_offload.failed11: 4957 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84([10 x i32]* [[A]]) #[[ATTR3]] 4958 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT12]] 4959 // CHECK12: omp_offload.cont12: 4960 // CHECK12-NEXT: ret i32 0 4961 // 4962 // 4963 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76 4964 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4965 // CHECK12-NEXT: entry: 4966 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4967 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4968 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4969 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 4970 // CHECK12-NEXT: ret void 4971 // 4972 // 4973 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..7 4974 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 4975 // CHECK12-NEXT: entry: 4976 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 4977 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 4978 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 4979 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4980 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 4981 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4982 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4983 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4984 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4985 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 4986 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 4987 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 4988 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 4989 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 4990 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4991 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 4992 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4993 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4994 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 4995 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4996 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4997 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4998 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 4999 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5000 // CHECK12: cond.true: 5001 // CHECK12-NEXT: br label [[COND_END:%.*]] 5002 // CHECK12: cond.false: 5003 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5004 // CHECK12-NEXT: br label [[COND_END]] 5005 // CHECK12: cond.end: 5006 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5007 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5008 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5009 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5010 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5011 // CHECK12: omp.inner.for.cond: 5012 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5013 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5014 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5015 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5016 // CHECK12: omp.inner.for.body: 5017 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5018 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5019 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5020 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5021 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5022 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 5023 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5024 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5025 // CHECK12: omp.body.continue: 5026 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5027 // CHECK12: omp.inner.for.inc: 5028 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5029 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 5030 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 5031 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 5032 // CHECK12: omp.inner.for.end: 5033 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5034 // CHECK12: omp.loop.exit: 5035 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5036 // CHECK12-NEXT: ret void 5037 // 5038 // 5039 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80 5040 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5041 // CHECK12-NEXT: entry: 5042 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5043 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5044 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5045 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5046 // CHECK12-NEXT: ret void 5047 // 5048 // 5049 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..10 5050 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5051 // CHECK12-NEXT: entry: 5052 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5053 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5054 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5055 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5056 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5057 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5058 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5059 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5060 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5061 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5062 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5063 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5064 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5065 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5066 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5067 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5068 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5069 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5070 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5071 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5072 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5073 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5074 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5075 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5076 // CHECK12: cond.true: 5077 // CHECK12-NEXT: br label [[COND_END:%.*]] 5078 // CHECK12: cond.false: 5079 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5080 // CHECK12-NEXT: br label [[COND_END]] 5081 // CHECK12: cond.end: 5082 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5083 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5084 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5085 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5086 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5087 // CHECK12: omp.inner.for.cond: 5088 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5089 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5090 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5091 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5092 // CHECK12: omp.inner.for.body: 5093 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5094 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 5095 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5096 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5097 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 5098 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] 5099 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5100 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5101 // CHECK12: omp.body.continue: 5102 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5103 // CHECK12: omp.inner.for.inc: 5104 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5105 // CHECK12-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 5106 // CHECK12-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 5107 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]] 5108 // CHECK12: omp.inner.for.end: 5109 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5110 // CHECK12: omp.loop.exit: 5111 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5112 // CHECK12-NEXT: ret void 5113 // 5114 // 5115 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84 5116 // CHECK12-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5117 // CHECK12-NEXT: entry: 5118 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5119 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5120 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5121 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5122 // CHECK12-NEXT: ret void 5123 // 5124 // 5125 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..13 5126 // CHECK12-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5127 // CHECK12-NEXT: entry: 5128 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5129 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5130 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 5131 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5132 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4 5133 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5134 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5135 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5136 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5137 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4 5138 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5139 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5140 // CHECK12-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 5141 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 5142 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5143 // CHECK12-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5144 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5145 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5146 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5147 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5148 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 10) 5149 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5150 // CHECK12: omp.dispatch.cond: 5151 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5152 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5153 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5154 // CHECK12: cond.true: 5155 // CHECK12-NEXT: br label [[COND_END:%.*]] 5156 // CHECK12: cond.false: 5157 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5158 // CHECK12-NEXT: br label [[COND_END]] 5159 // CHECK12: cond.end: 5160 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5161 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5162 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5163 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5164 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5165 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5166 // CHECK12-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5167 // CHECK12-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5168 // CHECK12: omp.dispatch.body: 5169 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5170 // CHECK12: omp.inner.for.cond: 5171 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5172 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 5173 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5174 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5175 // CHECK12: omp.inner.for.body: 5176 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5177 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5178 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5179 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !15 5180 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !15 5181 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 5182 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 5183 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5184 // CHECK12: omp.body.continue: 5185 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5186 // CHECK12: omp.inner.for.inc: 5187 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5188 // CHECK12-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5189 // CHECK12-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5190 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 5191 // CHECK12: omp.inner.for.end: 5192 // CHECK12-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5193 // CHECK12: omp.dispatch.inc: 5194 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5195 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5196 // CHECK12-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 5197 // CHECK12-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 5198 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5199 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5200 // CHECK12-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 5201 // CHECK12-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 5202 // CHECK12-NEXT: br label [[OMP_DISPATCH_COND]] 5203 // CHECK12: omp.dispatch.end: 5204 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5205 // CHECK12-NEXT: ret void 5206 // 5207 // 5208 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5209 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] { 5210 // CHECK12-NEXT: entry: 5211 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1) 5212 // CHECK12-NEXT: ret void 5213 // 5214