1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 volatile int g __attribute__((aligned(128))) = 1212; 18 19 template <class T> 20 struct S { 21 T f; 22 S(T a) : f(a + g) {} 23 S() : f(g) {} 24 operator T() { return T(); } 25 S &operator&(const S &) { return *this; } 26 ~S() {} 27 }; 28 29 struct SS { 30 int a; 31 int b : 4; 32 int &c; 33 SS(int &d) : a(0), b(0), c(d) { 34 #pragma omp parallel reduction(default, +: a, b, c) 35 #ifdef LAMBDA 36 [&]() { 37 ++this->a, --b, (this)->c /= 1; 38 #pragma omp parallel reduction(&: a, b, c) 39 ++(this)->a, --b, this->c /= 1; 40 }(); 41 #elif defined(BLOCKS) 42 ^{ 43 ++a; 44 --this->b; 45 (this)->c /= 1; 46 #pragma omp parallel reduction(-: a, b, c) 47 ++(this)->a, --b, this->c /= 1; 48 }(); 49 #else 50 ++this->a, --b, c /= 1; 51 #endif 52 } 53 }; 54 55 template<typename T> 56 struct SST { 57 T a; 58 SST() : a(T()) { 59 #pragma omp parallel reduction(*: a) 60 #ifdef LAMBDA 61 [&]() { 62 [&]() { 63 ++this->a; 64 #pragma omp parallel reduction(&& :a) 65 ++(this)->a; 66 }(); 67 }(); 68 #elif defined(BLOCKS) 69 ^{ 70 ^{ 71 ++a; 72 #pragma omp parallel reduction(|: a) 73 ++(this)->a; 74 }(); 75 }(); 76 #else 77 ++(this)->a; 78 #endif 79 } 80 }; 81 82 83 void foo_array_sect(short x[1]) { 84 #pragma omp parallel reduction(default, + : x[:]) 85 {} 86 } 87 88 template <typename T> 89 T tmain() { 90 T t; 91 S<T> test; 92 SST<T> sst; 93 T t_var __attribute__((aligned(128))) = T(), t_var1 __attribute__((aligned(128))); 94 T vec[] = {1, 2}; 95 S<T> s_arr[] = {1, 2}; 96 S<T> var __attribute__((aligned(128))) (3), var1 __attribute__((aligned(128))); 97 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1) 98 { 99 vec[0] = t_var; 100 s_arr[0] = var; 101 } 102 return T(); 103 } 104 105 int sivar; 106 int main() { 107 SS ss(sivar); 108 #ifdef LAMBDA 109 [&]() { 110 #pragma omp parallel reduction(+:g) 111 { 112 113 114 115 116 // Reduction list for runtime. 117 118 g = 1; 119 120 [&]() { 121 g = 2; 122 }(); 123 } 124 }(); 125 return 0; 126 #elif defined(BLOCKS) 127 ^{ 128 #pragma omp parallel reduction(-:g) 129 { 130 131 // Reduction list for runtime. 132 133 g = 1; 134 135 ^{ 136 g = 2; 137 }(); 138 } 139 }(); 140 return 0; 141 142 143 #else 144 S<float> test; 145 float t_var = 0, t_var1; 146 int vec[] = {1, 2}; 147 S<float> s_arr[] = {1, 2}; 148 S<float> var(3), var1; 149 float _Complex cf; 150 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1) 151 { 152 vec[0] = t_var; 153 s_arr[0] = var; 154 } 155 if (var1) 156 #pragma omp parallel reduction(+ : t_var) reduction(& : var) reduction(&& : var1) reduction(min : t_var1) 157 while (1) { 158 vec[0] = t_var; 159 s_arr[0] = var; 160 } 161 #pragma omp parallel reduction(+ : cf) 162 ; 163 return tmain<int>(); 164 #endif 165 } 166 167 168 // Reduction list for runtime. 169 170 171 172 // For + reduction operation initial value of private variable is 0. 173 174 // For & reduction operation initial value of private variable is ones in all bits. 175 176 // For && reduction operation initial value of private variable is 1.0. 177 178 // For min reduction operation initial value of private variable is largest repesentable value. 179 180 // Skip checks for internal operations. 181 182 // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]}; 183 184 185 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>); 186 187 188 // switch(res) 189 190 // case 1: 191 // t_var += t_var_reduction; 192 193 // var = var.operator &(var_reduction); 194 195 // var1 = var1.operator &&(var1_reduction); 196 197 // t_var1 = min(t_var1, t_var1_reduction); 198 199 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>); 200 201 // break; 202 203 // case 2: 204 // t_var += t_var_reduction; 205 206 // var = var.operator &(var_reduction); 207 208 // var1 = var1.operator &&(var1_reduction); 209 210 // t_var1 = min(t_var1, t_var1_reduction); 211 212 // break; 213 214 215 // void reduce_func(void *lhs[<n>], void *rhs[<n>]) { 216 // *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]); 217 // ... 218 // *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1], 219 // *(Type<n>-1*)rhs[<n>-1]); 220 // } 221 // t_var_lhs = (float*)lhs[0]; 222 // t_var_rhs = (float*)rhs[0]; 223 224 // var_lhs = (S<float>*)lhs[1]; 225 // var_rhs = (S<float>*)rhs[1]; 226 227 // var1_lhs = (S<float>*)lhs[2]; 228 // var1_rhs = (S<float>*)rhs[2]; 229 230 // t_var1_lhs = (float*)lhs[3]; 231 // t_var1_rhs = (float*)rhs[3]; 232 233 // t_var_lhs += t_var_rhs; 234 235 // var_lhs = var_lhs.operator &(var_rhs); 236 237 // var1_lhs = var1_lhs.operator &&(var1_rhs); 238 239 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs); 240 241 242 243 244 // For + reduction operation initial value of private variable is 0. 245 246 // For & reduction operation initial value of private variable is ones in all bits. 247 248 // For && reduction operation initial value of private variable is 1.0. 249 250 // For min reduction operation initial value of private variable is largest repesentable value. 251 252 253 254 255 256 257 // Reduction list for runtime. 258 259 260 261 // For + reduction operation initial value of private variable is 0. 262 263 // For & reduction operation initial value of private variable is ones in all bits. 264 265 // For && reduction operation initial value of private variable is 1.0. 266 267 // For min reduction operation initial value of private variable is largest repesentable value. 268 269 // Skip checks for internal operations. 270 271 // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]}; 272 273 274 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>); 275 276 277 // switch(res) 278 279 // case 1: 280 // t_var += t_var_reduction; 281 282 // var = var.operator &(var_reduction); 283 284 // var1 = var1.operator &&(var1_reduction); 285 286 // t_var1 = min(t_var1, t_var1_reduction); 287 288 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>); 289 290 // break; 291 292 // case 2: 293 // t_var += t_var_reduction; 294 295 // var = var.operator &(var_reduction); 296 297 // var1 = var1.operator &&(var1_reduction); 298 299 // t_var1 = min(t_var1, t_var1_reduction); 300 301 // break; 302 303 304 // void reduce_func(void *lhs[<n>], void *rhs[<n>]) { 305 // *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]); 306 // ... 307 // *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1], 308 // *(Type<n>-1*)rhs[<n>-1]); 309 // } 310 // t_var_lhs = (i{{[0-9]+}}*)lhs[0]; 311 // t_var_rhs = (i{{[0-9]+}}*)rhs[0]; 312 313 // var_lhs = (S<i{{[0-9]+}}>*)lhs[1]; 314 // var_rhs = (S<i{{[0-9]+}}>*)rhs[1]; 315 316 // var1_lhs = (S<i{{[0-9]+}}>*)lhs[2]; 317 // var1_rhs = (S<i{{[0-9]+}}>*)rhs[2]; 318 319 // t_var1_lhs = (i{{[0-9]+}}*)lhs[3]; 320 // t_var1_rhs = (i{{[0-9]+}}*)rhs[3]; 321 322 // t_var_lhs += t_var_rhs; 323 324 // var_lhs = var_lhs.operator &(var_rhs); 325 326 // var1_lhs = var1_lhs.operator &&(var1_rhs); 327 328 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs); 329 330 #endif 331 // CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 332 // CHECK1-SAME: (i16* [[X:%.*]]) #[[ATTR0:[0-9]+]] { 333 // CHECK1-NEXT: entry: 334 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 335 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 336 // CHECK1-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 337 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 338 // CHECK1-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 339 // CHECK1-NEXT: store i16* [[TMP1]], i16** [[TMP0]], align 8 340 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 341 // CHECK1-NEXT: ret void 342 // 343 // 344 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 345 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] { 346 // CHECK1-NEXT: entry: 347 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 348 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 349 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 350 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 351 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 352 // CHECK1-NEXT: [[TMP:%.*]] = alloca i16*, align 8 353 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 354 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 355 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 356 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 357 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 358 // CHECK1-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 359 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 360 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 361 // CHECK1-NEXT: [[TMP2:%.*]] = load i16*, i16** [[TMP1]], align 8 362 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP2]], i64 0 363 // CHECK1-NEXT: [[TMP3:%.*]] = load i16*, i16** [[TMP1]], align 8 364 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 0 365 // CHECK1-NEXT: [[TMP4:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 366 // CHECK1-NEXT: [[TMP5:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 367 // CHECK1-NEXT: [[TMP6:%.*]] = sub i64 [[TMP4]], [[TMP5]] 368 // CHECK1-NEXT: [[TMP7:%.*]] = sdiv exact i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 369 // CHECK1-NEXT: [[TMP8:%.*]] = add nuw i64 [[TMP7]], 1 370 // CHECK1-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 371 // CHECK1-NEXT: [[TMP10:%.*]] = call i8* @llvm.stacksave() 372 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[SAVED_STACK]], align 8 373 // CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP8]], align 16 374 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[__VLA_EXPR0]], align 8 375 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP8]] 376 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP11]] 377 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 378 // CHECK1: omp.arrayinit.body: 379 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 380 // CHECK1-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 381 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 382 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]] 383 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 384 // CHECK1: omp.arrayinit.done: 385 // CHECK1-NEXT: [[TMP12:%.*]] = load i16*, i16** [[TMP1]], align 8 386 // CHECK1-NEXT: [[TMP13:%.*]] = ptrtoint i16* [[TMP12]] to i64 387 // CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 388 // CHECK1-NEXT: [[TMP15:%.*]] = sub i64 [[TMP13]], [[TMP14]] 389 // CHECK1-NEXT: [[TMP16:%.*]] = sdiv exact i64 [[TMP15]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 390 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP16]] 391 // CHECK1-NEXT: store i16* [[TMP17]], i16** [[TMP]], align 8 392 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 393 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i16* [[VLA]] to i8* 394 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 395 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 396 // CHECK1-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP8]] to i8* 397 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 398 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 399 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 400 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 401 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP23]], i32 1, i64 16, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 402 // CHECK1-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 403 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 404 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 405 // CHECK1-NEXT: ] 406 // CHECK1: .omp.reduction.case1: 407 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 408 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP26]] 409 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 410 // CHECK1: omp.arraycpy.body: 411 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 412 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 413 // CHECK1-NEXT: [[TMP27:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 414 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP27]] to i32 415 // CHECK1-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 416 // CHECK1-NEXT: [[CONV3:%.*]] = sext i16 [[TMP28]] to i32 417 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 418 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 419 // CHECK1-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 420 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 421 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 422 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP26]] 423 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 424 // CHECK1: omp.arraycpy.done7: 425 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 426 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 427 // CHECK1: .omp.reduction.case2: 428 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 429 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP29]] 430 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 431 // CHECK1: omp.arraycpy.body9: 432 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 433 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 434 // CHECK1-NEXT: [[TMP30:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 435 // CHECK1-NEXT: [[CONV12:%.*]] = sext i16 [[TMP30]] to i32 436 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 437 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 438 // CHECK1: atomic_cont: 439 // CHECK1-NEXT: [[TMP31:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP36:%.*]], [[ATOMIC_CONT]] ] 440 // CHECK1-NEXT: store i16 [[TMP31]], i16* [[_TMP13]], align 2 441 // CHECK1-NEXT: [[TMP32:%.*]] = load i16, i16* [[_TMP13]], align 2 442 // CHECK1-NEXT: [[CONV14:%.*]] = sext i16 [[TMP32]] to i32 443 // CHECK1-NEXT: [[TMP33:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 444 // CHECK1-NEXT: [[CONV15:%.*]] = sext i16 [[TMP33]] to i32 445 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 446 // CHECK1-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 447 // CHECK1-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 448 // CHECK1-NEXT: [[TMP34:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 449 // CHECK1-NEXT: [[TMP35:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP31]], i16 [[TMP34]] monotonic monotonic, align 2 450 // CHECK1-NEXT: [[TMP36]] = extractvalue { i16, i1 } [[TMP35]], 0 451 // CHECK1-NEXT: [[TMP37:%.*]] = extractvalue { i16, i1 } [[TMP35]], 1 452 // CHECK1-NEXT: br i1 [[TMP37]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 453 // CHECK1: atomic_exit: 454 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 455 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 456 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP29]] 457 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 458 // CHECK1: omp.arraycpy.done21: 459 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 460 // CHECK1: .omp.reduction.default: 461 // CHECK1-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 462 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 463 // CHECK1-NEXT: ret void 464 // 465 // 466 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 467 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 468 // CHECK1-NEXT: entry: 469 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 470 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 471 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 472 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 473 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 474 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 475 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 476 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 477 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 478 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 479 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 480 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 481 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 482 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 483 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 484 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 485 // CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 486 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 487 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 488 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 489 // CHECK1: omp.arraycpy.body: 490 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 491 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 492 // CHECK1-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 493 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 494 // CHECK1-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 495 // CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 496 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 497 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 498 // CHECK1-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 499 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 500 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 501 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 502 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 503 // CHECK1: omp.arraycpy.done4: 504 // CHECK1-NEXT: ret void 505 // 506 // 507 // CHECK1-LABEL: define {{[^@]+}}@main 508 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] { 509 // CHECK1-NEXT: entry: 510 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 511 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 512 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 513 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca float, align 4 514 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 515 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 516 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 517 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 518 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 519 // CHECK1-NEXT: [[CF:%.*]] = alloca { float, float }, align 4 520 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 521 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 522 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_2:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 523 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 524 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @sivar) 525 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 526 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 527 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 528 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 529 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 530 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 531 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 532 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 533 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 534 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 535 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 536 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 537 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 538 // CHECK1-NEXT: store float* [[T_VAR]], float** [[TMP2]], align 8 539 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 540 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP3]], align 8 541 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 542 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP4]], align 8 543 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 544 // CHECK1-NEXT: store %struct.S* [[VAR1]], %struct.S** [[TMP5]], align 8 545 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 546 // CHECK1-NEXT: store float* [[T_VAR1]], float** [[TMP6]], align 8 547 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 548 // CHECK1-NEXT: [[CALL:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 549 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL]], 0.000000e+00 550 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 551 // CHECK1: if.then: 552 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 553 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP7]], align 8 554 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 1 555 // CHECK1-NEXT: store float* [[T_VAR]], float** [[TMP8]], align 8 556 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 2 557 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP9]], align 8 558 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 3 559 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP10]], align 8 560 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 4 561 // CHECK1-NEXT: store %struct.S* [[VAR1]], %struct.S** [[TMP11]], align 8 562 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 5 563 // CHECK1-NEXT: store float* [[T_VAR1]], float** [[TMP12]], align 8 564 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]]) 565 // CHECK1-NEXT: br label [[IF_END]] 566 // CHECK1: if.end: 567 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_2]], i32 0, i32 0 568 // CHECK1-NEXT: store { float, float }* [[CF]], { float, float }** [[TMP13]], align 8 569 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_2]]) 570 // CHECK1-NEXT: [[CALL3:%.*]] = call i32 @_Z5tmainIiET_v() 571 // CHECK1-NEXT: store i32 [[CALL3]], i32* [[RETVAL]], align 4 572 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5:[0-9]+]] 573 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 574 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 575 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 576 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 577 // CHECK1: arraydestroy.body: 578 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP14]], [[IF_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 579 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 580 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 581 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 582 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 583 // CHECK1: arraydestroy.done4: 584 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 585 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 586 // CHECK1-NEXT: ret i32 [[TMP15]] 587 // 588 // 589 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 590 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 { 591 // CHECK1-NEXT: entry: 592 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 593 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 594 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 595 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 596 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 597 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 598 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 599 // CHECK1-NEXT: ret void 600 // 601 // 602 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 603 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 604 // CHECK1-NEXT: entry: 605 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 606 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 607 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 608 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 609 // CHECK1-NEXT: ret void 610 // 611 // 612 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 613 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 614 // CHECK1-NEXT: entry: 615 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 616 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 617 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 618 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 619 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 620 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 621 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 622 // CHECK1-NEXT: ret void 623 // 624 // 625 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 626 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 627 // CHECK1-NEXT: entry: 628 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 629 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 630 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 631 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca float, align 4 632 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 633 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 634 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 635 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 636 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S]], align 4 637 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca float, align 4 638 // CHECK1-NEXT: [[TMP:%.*]] = alloca float, align 4 639 // CHECK1-NEXT: [[REF_TMP8:%.*]] = alloca [[STRUCT_S]], align 4 640 // CHECK1-NEXT: [[ATOMIC_TEMP18:%.*]] = alloca float, align 4 641 // CHECK1-NEXT: [[_TMP19:%.*]] = alloca float, align 4 642 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 643 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 644 // CHECK1-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 645 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 646 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 647 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 648 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 1 649 // CHECK1-NEXT: [[TMP4:%.*]] = load float*, float** [[TMP3]], align 8 650 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 2 651 // CHECK1-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 8 652 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 3 653 // CHECK1-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 8 654 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 4 655 // CHECK1-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[TMP9]], align 8 656 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 5 657 // CHECK1-NEXT: [[TMP12:%.*]] = load float*, float** [[TMP11]], align 8 658 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 659 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 660 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 661 // CHECK1-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR1]], align 4 662 // CHECK1-NEXT: [[TMP13:%.*]] = load float, float* [[T_VAR]], align 4 663 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP13]] to i32 664 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP2]], i64 0, i64 0 665 // CHECK1-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 666 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP6]], i64 0, i64 0 667 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 668 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[VAR]] to i8* 669 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 670 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 671 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast float* [[T_VAR]] to i8* 672 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 673 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 674 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[VAR]] to i8* 675 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 676 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 677 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[VAR1]] to i8* 678 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 679 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 680 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast float* [[T_VAR1]] to i8* 681 // CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8 682 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 683 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 684 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 685 // CHECK1-NEXT: [[TMP27:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], i32 4, i64 32, i8* [[TMP26]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 686 // CHECK1-NEXT: switch i32 [[TMP27]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 687 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 688 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 689 // CHECK1-NEXT: ] 690 // CHECK1: .omp.reduction.case1: 691 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[TMP4]], align 4 692 // CHECK1-NEXT: [[TMP29:%.*]] = load float, float* [[T_VAR]], align 4 693 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP28]], [[TMP29]] 694 // CHECK1-NEXT: store float [[ADD]], float* [[TMP4]], align 4 695 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 696 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 697 // CHECK1-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[CALL]] to i8* 698 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 699 // CHECK1-NEXT: [[CALL2:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP10]]) 700 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00 701 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 702 // CHECK1: land.rhs: 703 // CHECK1-NEXT: [[CALL3:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 704 // CHECK1-NEXT: [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00 705 // CHECK1-NEXT: br label [[LAND_END]] 706 // CHECK1: land.end: 707 // CHECK1-NEXT: [[TMP32:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 708 // CHECK1-NEXT: [[CONV5:%.*]] = uitofp i1 [[TMP32]] to float 709 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]], float [[CONV5]]) 710 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 711 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 712 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 713 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 714 // CHECK1-NEXT: [[TMP35:%.*]] = load float, float* [[TMP12]], align 4 715 // CHECK1-NEXT: [[TMP36:%.*]] = load float, float* [[T_VAR1]], align 4 716 // CHECK1-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP35]], [[TMP36]] 717 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 718 // CHECK1: cond.true: 719 // CHECK1-NEXT: [[TMP37:%.*]] = load float, float* [[TMP12]], align 4 720 // CHECK1-NEXT: br label [[COND_END:%.*]] 721 // CHECK1: cond.false: 722 // CHECK1-NEXT: [[TMP38:%.*]] = load float, float* [[T_VAR1]], align 4 723 // CHECK1-NEXT: br label [[COND_END]] 724 // CHECK1: cond.end: 725 // CHECK1-NEXT: [[COND:%.*]] = phi float [ [[TMP37]], [[COND_TRUE]] ], [ [[TMP38]], [[COND_FALSE]] ] 726 // CHECK1-NEXT: store float [[COND]], float* [[TMP12]], align 4 727 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.reduction.var) 728 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 729 // CHECK1: .omp.reduction.case2: 730 // CHECK1-NEXT: [[TMP39:%.*]] = load float, float* [[T_VAR]], align 4 731 // CHECK1-NEXT: [[TMP40:%.*]] = bitcast float* [[TMP4]] to i32* 732 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP40]] monotonic, align 4 733 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 734 // CHECK1: atomic_cont: 735 // CHECK1-NEXT: [[TMP41:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP49:%.*]], [[ATOMIC_CONT]] ] 736 // CHECK1-NEXT: [[TMP42:%.*]] = bitcast float* [[ATOMIC_TEMP]] to i32* 737 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast i32 [[TMP41]] to float 738 // CHECK1-NEXT: store float [[TMP43]], float* [[TMP]], align 4 739 // CHECK1-NEXT: [[TMP44:%.*]] = load float, float* [[TMP]], align 4 740 // CHECK1-NEXT: [[TMP45:%.*]] = load float, float* [[T_VAR]], align 4 741 // CHECK1-NEXT: [[ADD6:%.*]] = fadd float [[TMP44]], [[TMP45]] 742 // CHECK1-NEXT: store float [[ADD6]], float* [[ATOMIC_TEMP]], align 4 743 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP42]], align 4 744 // CHECK1-NEXT: [[TMP47:%.*]] = bitcast float* [[TMP4]] to i32* 745 // CHECK1-NEXT: [[TMP48:%.*]] = cmpxchg i32* [[TMP47]], i32 [[TMP41]], i32 [[TMP46]] monotonic monotonic, align 4 746 // CHECK1-NEXT: [[TMP49]] = extractvalue { i32, i1 } [[TMP48]], 0 747 // CHECK1-NEXT: [[TMP50:%.*]] = extractvalue { i32, i1 } [[TMP48]], 1 748 // CHECK1-NEXT: br i1 [[TMP50]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 749 // CHECK1: atomic_exit: 750 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 751 // CHECK1-NEXT: [[CALL7:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 752 // CHECK1-NEXT: [[TMP51:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 753 // CHECK1-NEXT: [[TMP52:%.*]] = bitcast %struct.S* [[CALL7]] to i8* 754 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP51]], i8* align 4 [[TMP52]], i64 4, i1 false) 755 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 756 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 757 // CHECK1-NEXT: [[CALL9:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP10]]) 758 // CHECK1-NEXT: [[TOBOOL10:%.*]] = fcmp une float [[CALL9]], 0.000000e+00 759 // CHECK1-NEXT: br i1 [[TOBOOL10]], label [[LAND_RHS11:%.*]], label [[LAND_END14:%.*]] 760 // CHECK1: land.rhs11: 761 // CHECK1-NEXT: [[CALL12:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 762 // CHECK1-NEXT: [[TOBOOL13:%.*]] = fcmp une float [[CALL12]], 0.000000e+00 763 // CHECK1-NEXT: br label [[LAND_END14]] 764 // CHECK1: land.end14: 765 // CHECK1-NEXT: [[TMP53:%.*]] = phi i1 [ false, [[ATOMIC_EXIT]] ], [ [[TOBOOL13]], [[LAND_RHS11]] ] 766 // CHECK1-NEXT: [[CONV15:%.*]] = uitofp i1 [[TMP53]] to float 767 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP8]], float [[CONV15]]) 768 // CHECK1-NEXT: [[TMP54:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 769 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast %struct.S* [[REF_TMP8]] to i8* 770 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP54]], i8* align 4 [[TMP55]], i64 4, i1 false) 771 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP8]]) #[[ATTR5]] 772 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 773 // CHECK1-NEXT: [[TMP56:%.*]] = load float, float* [[T_VAR1]], align 4 774 // CHECK1-NEXT: [[TMP57:%.*]] = bitcast float* [[TMP12]] to i32* 775 // CHECK1-NEXT: [[ATOMIC_LOAD16:%.*]] = load atomic i32, i32* [[TMP57]] monotonic, align 4 776 // CHECK1-NEXT: br label [[ATOMIC_CONT17:%.*]] 777 // CHECK1: atomic_cont17: 778 // CHECK1-NEXT: [[TMP58:%.*]] = phi i32 [ [[ATOMIC_LOAD16]], [[LAND_END14]] ], [ [[TMP68:%.*]], [[COND_END23:%.*]] ] 779 // CHECK1-NEXT: [[TMP59:%.*]] = bitcast float* [[ATOMIC_TEMP18]] to i32* 780 // CHECK1-NEXT: [[TMP60:%.*]] = bitcast i32 [[TMP58]] to float 781 // CHECK1-NEXT: store float [[TMP60]], float* [[_TMP19]], align 4 782 // CHECK1-NEXT: [[TMP61:%.*]] = load float, float* [[_TMP19]], align 4 783 // CHECK1-NEXT: [[TMP62:%.*]] = load float, float* [[T_VAR1]], align 4 784 // CHECK1-NEXT: [[CMP20:%.*]] = fcmp olt float [[TMP61]], [[TMP62]] 785 // CHECK1-NEXT: br i1 [[CMP20]], label [[COND_TRUE21:%.*]], label [[COND_FALSE22:%.*]] 786 // CHECK1: cond.true21: 787 // CHECK1-NEXT: [[TMP63:%.*]] = load float, float* [[_TMP19]], align 4 788 // CHECK1-NEXT: br label [[COND_END23]] 789 // CHECK1: cond.false22: 790 // CHECK1-NEXT: [[TMP64:%.*]] = load float, float* [[T_VAR1]], align 4 791 // CHECK1-NEXT: br label [[COND_END23]] 792 // CHECK1: cond.end23: 793 // CHECK1-NEXT: [[COND24:%.*]] = phi float [ [[TMP63]], [[COND_TRUE21]] ], [ [[TMP64]], [[COND_FALSE22]] ] 794 // CHECK1-NEXT: store float [[COND24]], float* [[ATOMIC_TEMP18]], align 4 795 // CHECK1-NEXT: [[TMP65:%.*]] = load i32, i32* [[TMP59]], align 4 796 // CHECK1-NEXT: [[TMP66:%.*]] = bitcast float* [[TMP12]] to i32* 797 // CHECK1-NEXT: [[TMP67:%.*]] = cmpxchg i32* [[TMP66]], i32 [[TMP58]], i32 [[TMP65]] monotonic monotonic, align 4 798 // CHECK1-NEXT: [[TMP68]] = extractvalue { i32, i1 } [[TMP67]], 0 799 // CHECK1-NEXT: [[TMP69:%.*]] = extractvalue { i32, i1 } [[TMP67]], 1 800 // CHECK1-NEXT: br i1 [[TMP69]], label [[ATOMIC_EXIT25:%.*]], label [[ATOMIC_CONT17]] 801 // CHECK1: atomic_exit25: 802 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 803 // CHECK1: .omp.reduction.default: 804 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 805 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 806 // CHECK1-NEXT: ret void 807 // 808 // 809 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 810 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 811 // CHECK1-NEXT: entry: 812 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 813 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 814 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4 815 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 816 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 817 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 818 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 819 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 820 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 821 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 822 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 823 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to float* 824 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 825 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 826 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to float* 827 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 828 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 829 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S* 830 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 831 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 832 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S* 833 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 834 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 835 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S* 836 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 837 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 838 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S* 839 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 840 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 841 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to float* 842 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 843 // CHECK1-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 844 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to float* 845 // CHECK1-NEXT: [[TMP30:%.*]] = load float, float* [[TMP11]], align 4 846 // CHECK1-NEXT: [[TMP31:%.*]] = load float, float* [[TMP8]], align 4 847 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP30]], [[TMP31]] 848 // CHECK1-NEXT: store float [[ADD]], float* [[TMP11]], align 4 849 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP14]]) 850 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP17]] to i8* 851 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[CALL]] to i8* 852 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 853 // CHECK1-NEXT: [[CALL2:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP23]]) 854 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00 855 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 856 // CHECK1: land.rhs: 857 // CHECK1-NEXT: [[CALL3:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP20]]) 858 // CHECK1-NEXT: [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00 859 // CHECK1-NEXT: br label [[LAND_END]] 860 // CHECK1: land.end: 861 // CHECK1-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 862 // CHECK1-NEXT: [[CONV:%.*]] = uitofp i1 [[TMP34]] to float 863 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]], float [[CONV]]) 864 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 865 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 866 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 867 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 868 // CHECK1-NEXT: [[TMP37:%.*]] = load float, float* [[TMP29]], align 4 869 // CHECK1-NEXT: [[TMP38:%.*]] = load float, float* [[TMP26]], align 4 870 // CHECK1-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP37]], [[TMP38]] 871 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 872 // CHECK1: cond.true: 873 // CHECK1-NEXT: [[TMP39:%.*]] = load float, float* [[TMP29]], align 4 874 // CHECK1-NEXT: br label [[COND_END:%.*]] 875 // CHECK1: cond.false: 876 // CHECK1-NEXT: [[TMP40:%.*]] = load float, float* [[TMP26]], align 4 877 // CHECK1-NEXT: br label [[COND_END]] 878 // CHECK1: cond.end: 879 // CHECK1-NEXT: [[COND:%.*]] = phi float [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 880 // CHECK1-NEXT: store float [[COND]], float* [[TMP29]], align 4 881 // CHECK1-NEXT: ret void 882 // 883 // 884 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEanERKS0_ 885 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 886 // CHECK1-NEXT: entry: 887 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 888 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.S*, align 8 889 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 890 // CHECK1-NEXT: store %struct.S* [[TMP0]], %struct.S** [[DOTADDR]], align 8 891 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 892 // CHECK1-NEXT: ret %struct.S* [[THIS1]] 893 // 894 // 895 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEcvfEv 896 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 897 // CHECK1-NEXT: entry: 898 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 899 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 900 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 901 // CHECK1-NEXT: ret float 0.000000e+00 902 // 903 // 904 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 905 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 906 // CHECK1-NEXT: entry: 907 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 908 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 909 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 910 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 911 // CHECK1-NEXT: ret void 912 // 913 // 914 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 915 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 916 // CHECK1-NEXT: entry: 917 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 918 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 919 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 920 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca float, align 4 921 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 922 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 923 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 924 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 925 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 926 // CHECK1-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 927 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 928 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 929 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 930 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 931 // CHECK1-NEXT: [[TMP4:%.*]] = load float*, float** [[TMP3]], align 8 932 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 933 // CHECK1-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 8 934 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 935 // CHECK1-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 8 936 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 4 937 // CHECK1-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[TMP9]], align 8 938 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 5 939 // CHECK1-NEXT: [[TMP12:%.*]] = load float*, float** [[TMP11]], align 8 940 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 941 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 942 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 943 // CHECK1-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR1]], align 4 944 // CHECK1-NEXT: br label [[WHILE_COND:%.*]] 945 // CHECK1: while.cond: 946 // CHECK1-NEXT: br label [[WHILE_BODY:%.*]] 947 // CHECK1: while.body: 948 // CHECK1-NEXT: [[TMP13:%.*]] = load float, float* [[T_VAR]], align 4 949 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP13]] to i32 950 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP2]], i64 0, i64 0 951 // CHECK1-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 952 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP6]], i64 0, i64 0 953 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 954 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[VAR]] to i8* 955 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 956 // CHECK1-NEXT: br label [[WHILE_COND]], !llvm.loop [[LOOP4:![0-9]+]] 957 // 958 // 959 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 960 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 961 // CHECK1-NEXT: entry: 962 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 963 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 964 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 965 // CHECK1-NEXT: [[CF:%.*]] = alloca { float, float }, align 4 966 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 967 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca { float, float }, align 4 968 // CHECK1-NEXT: [[ATOMIC_TEMP9:%.*]] = alloca { float, float }, align 4 969 // CHECK1-NEXT: [[TMP:%.*]] = alloca { float, float }, align 4 970 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 971 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 972 // CHECK1-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 973 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 974 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 975 // CHECK1-NEXT: [[TMP2:%.*]] = load { float, float }*, { float, float }** [[TMP1]], align 8 976 // CHECK1-NEXT: [[CF_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 977 // CHECK1-NEXT: [[CF_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 978 // CHECK1-NEXT: store float 0.000000e+00, float* [[CF_REALP]], align 4 979 // CHECK1-NEXT: store float 0.000000e+00, float* [[CF_IMAGP]], align 4 980 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 981 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast { float, float }* [[CF]] to i8* 982 // CHECK1-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8 983 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 984 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 985 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 986 // CHECK1-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 1, i64 8, i8* [[TMP7]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 987 // CHECK1-NEXT: switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 988 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 989 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 990 // CHECK1-NEXT: ] 991 // CHECK1: .omp.reduction.case1: 992 // CHECK1-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 0 993 // CHECK1-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 994 // CHECK1-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 1 995 // CHECK1-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 996 // CHECK1-NEXT: [[CF_REALP1:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 997 // CHECK1-NEXT: [[CF_REAL:%.*]] = load float, float* [[CF_REALP1]], align 4 998 // CHECK1-NEXT: [[CF_IMAGP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 999 // CHECK1-NEXT: [[CF_IMAG:%.*]] = load float, float* [[CF_IMAGP2]], align 4 1000 // CHECK1-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[CF_REAL]] 1001 // CHECK1-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[CF_IMAG]] 1002 // CHECK1-NEXT: [[DOTREALP3:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 0 1003 // CHECK1-NEXT: [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 1 1004 // CHECK1-NEXT: store float [[ADD_R]], float* [[DOTREALP3]], align 4 1005 // CHECK1-NEXT: store float [[ADD_I]], float* [[DOTIMAGP4]], align 4 1006 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1007 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1008 // CHECK1: .omp.reduction.case2: 1009 // CHECK1-NEXT: [[CF_REALP5:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 1010 // CHECK1-NEXT: [[CF_REAL6:%.*]] = load float, float* [[CF_REALP5]], align 4 1011 // CHECK1-NEXT: [[CF_IMAGP7:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 1012 // CHECK1-NEXT: [[CF_IMAG8:%.*]] = load float, float* [[CF_IMAGP7]], align 4 1013 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast { float, float }* [[TMP2]] to i8* 1014 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 1015 // CHECK1-NEXT: call void @__atomic_load(i64 8, i8* [[TMP9]], i8* [[TMP10]], i32 0) 1016 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 1017 // CHECK1: atomic_cont: 1018 // CHECK1-NEXT: [[ATOMIC_TEMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 0 1019 // CHECK1-NEXT: [[ATOMIC_TEMP_REAL:%.*]] = load float, float* [[ATOMIC_TEMP_REALP]], align 4 1020 // CHECK1-NEXT: [[ATOMIC_TEMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 1 1021 // CHECK1-NEXT: [[ATOMIC_TEMP_IMAG:%.*]] = load float, float* [[ATOMIC_TEMP_IMAGP]], align 4 1022 // CHECK1-NEXT: [[TMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 1023 // CHECK1-NEXT: [[TMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 1024 // CHECK1-NEXT: store float [[ATOMIC_TEMP_REAL]], float* [[TMP_REALP]], align 4 1025 // CHECK1-NEXT: store float [[ATOMIC_TEMP_IMAG]], float* [[TMP_IMAGP]], align 4 1026 // CHECK1-NEXT: [[TMP_REALP10:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 1027 // CHECK1-NEXT: [[TMP_REAL:%.*]] = load float, float* [[TMP_REALP10]], align 4 1028 // CHECK1-NEXT: [[TMP_IMAGP11:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 1029 // CHECK1-NEXT: [[TMP_IMAG:%.*]] = load float, float* [[TMP_IMAGP11]], align 4 1030 // CHECK1-NEXT: [[CF_REALP12:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 1031 // CHECK1-NEXT: [[CF_REAL13:%.*]] = load float, float* [[CF_REALP12]], align 4 1032 // CHECK1-NEXT: [[CF_IMAGP14:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 1033 // CHECK1-NEXT: [[CF_IMAG15:%.*]] = load float, float* [[CF_IMAGP14]], align 4 1034 // CHECK1-NEXT: [[ADD_R16:%.*]] = fadd float [[TMP_REAL]], [[CF_REAL13]] 1035 // CHECK1-NEXT: [[ADD_I17:%.*]] = fadd float [[TMP_IMAG]], [[CF_IMAG15]] 1036 // CHECK1-NEXT: [[ATOMIC_TEMP9_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP9]], i32 0, i32 0 1037 // CHECK1-NEXT: [[ATOMIC_TEMP9_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP9]], i32 0, i32 1 1038 // CHECK1-NEXT: store float [[ADD_R16]], float* [[ATOMIC_TEMP9_REALP]], align 4 1039 // CHECK1-NEXT: store float [[ADD_I17]], float* [[ATOMIC_TEMP9_IMAGP]], align 4 1040 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast { float, float }* [[TMP2]] to i8* 1041 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 1042 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP9]] to i8* 1043 // CHECK1-NEXT: [[CALL:%.*]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* [[TMP11]], i8* [[TMP12]], i8* [[TMP13]], i32 0, i32 0) 1044 // CHECK1-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1045 // CHECK1: atomic_exit: 1046 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1047 // CHECK1: .omp.reduction.default: 1048 // CHECK1-NEXT: ret void 1049 // 1050 // 1051 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 1052 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1053 // CHECK1-NEXT: entry: 1054 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1055 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1056 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1057 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1058 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1059 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1060 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1061 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1062 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1063 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1064 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to { float, float }* 1065 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1066 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1067 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to { float, float }* 1068 // CHECK1-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 1069 // CHECK1-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 1070 // CHECK1-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 1071 // CHECK1-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 1072 // CHECK1-NEXT: [[DOTREALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 0 1073 // CHECK1-NEXT: [[DOTREAL3:%.*]] = load float, float* [[DOTREALP2]], align 4 1074 // CHECK1-NEXT: [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 1 1075 // CHECK1-NEXT: [[DOTIMAG5:%.*]] = load float, float* [[DOTIMAGP4]], align 4 1076 // CHECK1-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[DOTREAL3]] 1077 // CHECK1-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[DOTIMAG5]] 1078 // CHECK1-NEXT: [[DOTREALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 1079 // CHECK1-NEXT: [[DOTIMAGP7:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 1080 // CHECK1-NEXT: store float [[ADD_R]], float* [[DOTREALP6]], align 4 1081 // CHECK1-NEXT: store float [[ADD_I]], float* [[DOTIMAGP7]], align 4 1082 // CHECK1-NEXT: ret void 1083 // 1084 // 1085 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1086 // CHECK1-SAME: () #[[ATTR0]] { 1087 // CHECK1-NEXT: entry: 1088 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1089 // CHECK1-NEXT: [[T:%.*]] = alloca i32, align 4 1090 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_4:%.*]], align 4 1091 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1092 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1093 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1094 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1095 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.4], align 4 1096 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_4]], align 128 1097 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S_4]], align 128 1098 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 1099 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[TEST]]) 1100 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 1101 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128 1102 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1103 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1104 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.4], [2 x %struct.S.4]* [[S_ARR]], i64 0, i64 0 1105 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1106 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_4]], %struct.S.4* [[ARRAYINIT_BEGIN]], i64 1 1107 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1108 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 1109 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 1110 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1111 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 1112 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1113 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 1114 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1115 // CHECK1-NEXT: store [2 x %struct.S.4]* [[S_ARR]], [2 x %struct.S.4]** [[TMP3]], align 8 1116 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1117 // CHECK1-NEXT: store %struct.S.4* [[VAR]], %struct.S.4** [[TMP4]], align 8 1118 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 1119 // CHECK1-NEXT: store %struct.S.4* [[VAR1]], %struct.S.4** [[TMP5]], align 8 1120 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 1121 // CHECK1-NEXT: store i32* [[T_VAR1]], i32** [[TMP6]], align 8 1122 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 1123 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 1124 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 1125 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 1126 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.4], [2 x %struct.S.4]* [[S_ARR]], i32 0, i32 0 1127 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S_4]], %struct.S.4* [[ARRAY_BEGIN]], i64 2 1128 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1129 // CHECK1: arraydestroy.body: 1130 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.4* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1131 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_4]], %struct.S.4* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1132 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1133 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.4* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1134 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1135 // CHECK1: arraydestroy.done1: 1136 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 1137 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 1138 // CHECK1-NEXT: ret i32 [[TMP8]] 1139 // 1140 // 1141 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1142 // CHECK1-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1143 // CHECK1-NEXT: entry: 1144 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1145 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1146 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 8 1147 // CHECK1-NEXT: [[B4:%.*]] = alloca i32, align 4 1148 // CHECK1-NEXT: [[C5:%.*]] = alloca i32*, align 8 1149 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 1150 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1151 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1152 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1153 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1154 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 1155 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1156 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1157 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1158 // CHECK1-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 1159 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1160 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1161 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1162 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1163 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 8 1164 // CHECK1-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1165 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 1166 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 1167 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1168 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 1169 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1170 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 1171 // CHECK1-NEXT: store i32* [[TMP4]], i32** [[TMP3]], align 8 1172 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1173 // CHECK1-NEXT: store i32* [[B4]], i32** [[TMP5]], align 8 1174 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1175 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[C5]], align 8 1176 // CHECK1-NEXT: store i32* [[TMP7]], i32** [[TMP6]], align 8 1177 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 1178 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 1179 // CHECK1-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1180 // CHECK1-NEXT: [[TMP9:%.*]] = trunc i32 [[TMP8]] to i8 1181 // CHECK1-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 1182 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP9]], 15 1183 // CHECK1-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 1184 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 1185 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B7]], align 4 1186 // CHECK1-NEXT: ret void 1187 // 1188 // 1189 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 1190 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 1191 // CHECK1-NEXT: entry: 1192 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1193 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1194 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 1195 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1196 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1197 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1198 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1199 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4 1200 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4 1201 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1202 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 1203 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1204 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1205 // CHECK1-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 1206 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 1207 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 1208 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 1209 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 1210 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 1211 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 1212 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 1213 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 1214 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8 1215 // CHECK1-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 1216 // CHECK1-NEXT: store i32* [[TMP8]], i32** [[_TMP1]], align 8 1217 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 1218 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1219 // CHECK1-NEXT: store i32* [[A]], i32** [[_TMP2]], align 8 1220 // CHECK1-NEXT: store i32 0, i32* [[B]], align 4 1221 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP1]], align 8 1222 // CHECK1-NEXT: store i32 0, i32* [[C]], align 4 1223 // CHECK1-NEXT: store i32* [[C]], i32** [[_TMP3]], align 8 1224 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8 1225 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1226 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 1227 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP11]], align 4 1228 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[B]], align 4 1229 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP13]], -1 1230 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B]], align 4 1231 // CHECK1-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP3]], align 8 1232 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 1233 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP15]], 1 1234 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP14]], align 4 1235 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1236 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[A]] to i8* 1237 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 1238 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 1239 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i32* [[B]] to i8* 1240 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 1241 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 1242 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i32* [[C]] to i8* 1243 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 1244 // CHECK1-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1245 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 1246 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1247 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], i32 3, i64 24, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func.7, [8 x i32]* @.gomp_critical_user_.reduction.var) 1248 // CHECK1-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1249 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1250 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1251 // CHECK1-NEXT: ] 1252 // CHECK1: .omp.reduction.case1: 1253 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP9]], align 4 1254 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[A]], align 4 1255 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 1256 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP9]], align 4 1257 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP6]], align 4 1258 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[B]], align 4 1259 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 1260 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[TMP6]], align 4 1261 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP10]], align 4 1262 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[C]], align 4 1263 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 1264 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[TMP10]], align 4 1265 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1266 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1267 // CHECK1: .omp.reduction.case2: 1268 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[A]], align 4 1269 // CHECK1-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP9]], i32 [[TMP32]] monotonic, align 4 1270 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[B]], align 4 1271 // CHECK1-NEXT: [[TMP35:%.*]] = atomicrmw add i32* [[TMP6]], i32 [[TMP34]] monotonic, align 4 1272 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[C]], align 4 1273 // CHECK1-NEXT: [[TMP37:%.*]] = atomicrmw add i32* [[TMP10]], i32 [[TMP36]] monotonic, align 4 1274 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1275 // CHECK1: .omp.reduction.default: 1276 // CHECK1-NEXT: ret void 1277 // 1278 // 1279 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.7 1280 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1281 // CHECK1-NEXT: entry: 1282 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1283 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1284 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1285 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1286 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1287 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 1288 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1289 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 1290 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 1291 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1292 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1293 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 1294 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1295 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1296 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 1297 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 1298 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 1299 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 1300 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 1301 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 1302 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 1303 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1304 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 1305 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 1306 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 1307 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 1308 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 1309 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 1310 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 1311 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1312 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 1313 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 1314 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 1315 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 1316 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 1317 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 1318 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 1319 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 1320 // CHECK1-NEXT: ret void 1321 // 1322 // 1323 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1324 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1325 // CHECK1-NEXT: entry: 1326 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1327 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1328 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1329 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1330 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1331 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 1332 // CHECK1-NEXT: store float [[CONV]], float* [[F]], align 4 1333 // CHECK1-NEXT: ret void 1334 // 1335 // 1336 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1337 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1338 // CHECK1-NEXT: entry: 1339 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1340 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1341 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1342 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1343 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1344 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1345 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1346 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1347 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 1348 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 1349 // CHECK1-NEXT: store float [[ADD]], float* [[F]], align 4 1350 // CHECK1-NEXT: ret void 1351 // 1352 // 1353 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1354 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1355 // CHECK1-NEXT: entry: 1356 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1357 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1358 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1359 // CHECK1-NEXT: ret void 1360 // 1361 // 1362 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1363 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1364 // CHECK1-NEXT: entry: 1365 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1366 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1367 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1368 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS1]]) 1369 // CHECK1-NEXT: ret void 1370 // 1371 // 1372 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1373 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1374 // CHECK1-NEXT: entry: 1375 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1376 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1377 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1378 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 1379 // CHECK1-NEXT: ret void 1380 // 1381 // 1382 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1383 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1384 // CHECK1-NEXT: entry: 1385 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1386 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1387 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1388 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1389 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1390 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1391 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1392 // CHECK1-NEXT: ret void 1393 // 1394 // 1395 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 1396 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 1397 // CHECK1-NEXT: entry: 1398 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1399 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1400 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 1401 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1402 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_4:%.*]], align 128 1403 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S_4]], align 128 1404 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1405 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 1406 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_4]], align 4 1407 // CHECK1-NEXT: [[REF_TMP6:%.*]] = alloca [[STRUCT_S_4]], align 4 1408 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1409 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1410 // CHECK1-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 1411 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 1412 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 1413 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 1414 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 1415 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 1416 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 1417 // CHECK1-NEXT: [[TMP6:%.*]] = load [2 x %struct.S.4]*, [2 x %struct.S.4]** [[TMP5]], align 8 1418 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 1419 // CHECK1-NEXT: [[TMP8:%.*]] = load %struct.S.4*, %struct.S.4** [[TMP7]], align 8 1420 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 1421 // CHECK1-NEXT: [[TMP10:%.*]] = load %struct.S.4*, %struct.S.4** [[TMP9]], align 8 1422 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 5 1423 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8 1424 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128 1425 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) 1426 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 1427 // CHECK1-NEXT: store i32 2147483647, i32* [[T_VAR1]], align 128 1428 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR]], align 128 1429 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP2]], i64 0, i64 0 1430 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 1431 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.4], [2 x %struct.S.4]* [[TMP6]], i64 0, i64 0 1432 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S.4* [[ARRAYIDX1]] to i8* 1433 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast %struct.S.4* [[VAR]] to i8* 1434 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 128 [[TMP15]], i64 4, i1 false) 1435 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1436 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR]] to i8* 1437 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 1438 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 1439 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast %struct.S.4* [[VAR]] to i8* 1440 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 1441 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 1442 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast %struct.S.4* [[VAR1]] to i8* 1443 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 1444 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 1445 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i32* [[T_VAR1]] to i8* 1446 // CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8 1447 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1448 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1449 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1450 // CHECK1-NEXT: [[TMP27:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], i32 4, i64 32, i8* [[TMP26]], void (i8*, i8*)* @.omp.reduction.reduction_func.9, [8 x i32]* @.gomp_critical_user_.reduction.var) 1451 // CHECK1-NEXT: switch i32 [[TMP27]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1452 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1453 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1454 // CHECK1-NEXT: ] 1455 // CHECK1: .omp.reduction.case1: 1456 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP4]], align 128 1457 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[T_VAR]], align 128 1458 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 1459 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 128 1460 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.4* @_ZN1SIiEanERKS0_(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) 1461 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast %struct.S.4* [[TMP8]] to i8* 1462 // CHECK1-NEXT: [[TMP31:%.*]] = bitcast %struct.S.4* [[CALL]] to i8* 1463 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 1464 // CHECK1-NEXT: [[CALL2:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP10]]) 1465 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0 1466 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 1467 // CHECK1: land.rhs: 1468 // CHECK1-NEXT: [[CALL3:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 1469 // CHECK1-NEXT: [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0 1470 // CHECK1-NEXT: br label [[LAND_END]] 1471 // CHECK1: land.end: 1472 // CHECK1-NEXT: [[TMP32:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 1473 // CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[TMP32]] to i32 1474 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 [[CONV]]) 1475 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S.4* [[TMP10]] to i8* 1476 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S.4* [[REF_TMP]] to i8* 1477 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 1478 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 1479 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP12]], align 128 1480 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[T_VAR1]], align 128 1481 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP35]], [[TMP36]] 1482 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1483 // CHECK1: cond.true: 1484 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP12]], align 128 1485 // CHECK1-NEXT: br label [[COND_END:%.*]] 1486 // CHECK1: cond.false: 1487 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[T_VAR1]], align 128 1488 // CHECK1-NEXT: br label [[COND_END]] 1489 // CHECK1: cond.end: 1490 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE]] ], [ [[TMP38]], [[COND_FALSE]] ] 1491 // CHECK1-NEXT: store i32 [[COND]], i32* [[TMP12]], align 128 1492 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1493 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1494 // CHECK1: .omp.reduction.case2: 1495 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[T_VAR]], align 128 1496 // CHECK1-NEXT: [[TMP40:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP39]] monotonic, align 4 1497 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1498 // CHECK1-NEXT: [[CALL5:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.4* @_ZN1SIiEanERKS0_(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) 1499 // CHECK1-NEXT: [[TMP41:%.*]] = bitcast %struct.S.4* [[TMP8]] to i8* 1500 // CHECK1-NEXT: [[TMP42:%.*]] = bitcast %struct.S.4* [[CALL5]] to i8* 1501 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP41]], i8* align 4 [[TMP42]], i64 4, i1 false) 1502 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1503 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1504 // CHECK1-NEXT: [[CALL7:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP10]]) 1505 // CHECK1-NEXT: [[TOBOOL8:%.*]] = icmp ne i32 [[CALL7]], 0 1506 // CHECK1-NEXT: br i1 [[TOBOOL8]], label [[LAND_RHS9:%.*]], label [[LAND_END12:%.*]] 1507 // CHECK1: land.rhs9: 1508 // CHECK1-NEXT: [[CALL10:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 1509 // CHECK1-NEXT: [[TOBOOL11:%.*]] = icmp ne i32 [[CALL10]], 0 1510 // CHECK1-NEXT: br label [[LAND_END12]] 1511 // CHECK1: land.end12: 1512 // CHECK1-NEXT: [[TMP43:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL11]], [[LAND_RHS9]] ] 1513 // CHECK1-NEXT: [[CONV13:%.*]] = zext i1 [[TMP43]] to i32 1514 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP6]], i32 [[CONV13]]) 1515 // CHECK1-NEXT: [[TMP44:%.*]] = bitcast %struct.S.4* [[TMP10]] to i8* 1516 // CHECK1-NEXT: [[TMP45:%.*]] = bitcast %struct.S.4* [[REF_TMP6]] to i8* 1517 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP44]], i8* align 4 [[TMP45]], i64 4, i1 false) 1518 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR5]] 1519 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1520 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[T_VAR1]], align 128 1521 // CHECK1-NEXT: [[TMP47:%.*]] = atomicrmw min i32* [[TMP12]], i32 [[TMP46]] monotonic, align 4 1522 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1523 // CHECK1: .omp.reduction.default: 1524 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 1525 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 1526 // CHECK1-NEXT: ret void 1527 // 1528 // 1529 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.9 1530 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1531 // CHECK1-NEXT: entry: 1532 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1533 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1534 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_4:%.*]], align 4 1535 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1536 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1537 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1538 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 1539 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1540 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 1541 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 1542 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1543 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1544 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 1545 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1546 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1547 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 1548 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 1549 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S.4* 1550 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 1551 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 1552 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S.4* 1553 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 1554 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1555 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S.4* 1556 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 1557 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 1558 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S.4* 1559 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 1560 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 1561 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to i32* 1562 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 1563 // CHECK1-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 1564 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to i32* 1565 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP11]], align 128 1566 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP8]], align 128 1567 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 1568 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 1569 // CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.4* @_ZN1SIiEanERKS0_(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S.4* nonnull align 4 dereferenceable(4) [[TMP14]]) 1570 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S.4* [[TMP17]] to i8* 1571 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S.4* [[CALL]] to i8* 1572 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 1573 // CHECK1-NEXT: [[CALL2:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP23]]) 1574 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0 1575 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 1576 // CHECK1: land.rhs: 1577 // CHECK1-NEXT: [[CALL3:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP20]]) 1578 // CHECK1-NEXT: [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0 1579 // CHECK1-NEXT: br label [[LAND_END]] 1580 // CHECK1: land.end: 1581 // CHECK1-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 1582 // CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[TMP34]] to i32 1583 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 [[CONV]]) 1584 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S.4* [[TMP23]] to i8* 1585 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S.4* [[REF_TMP]] to i8* 1586 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 1587 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 1588 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP29]], align 128 1589 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP26]], align 128 1590 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP37]], [[TMP38]] 1591 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1592 // CHECK1: cond.true: 1593 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP29]], align 128 1594 // CHECK1-NEXT: br label [[COND_END:%.*]] 1595 // CHECK1: cond.false: 1596 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP26]], align 128 1597 // CHECK1-NEXT: br label [[COND_END]] 1598 // CHECK1: cond.end: 1599 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 1600 // CHECK1-NEXT: store i32 [[COND]], i32* [[TMP29]], align 128 1601 // CHECK1-NEXT: ret void 1602 // 1603 // 1604 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEanERKS0_ 1605 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.4* nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 1606 // CHECK1-NEXT: entry: 1607 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1608 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.S.4*, align 8 1609 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1610 // CHECK1-NEXT: store %struct.S.4* [[TMP0]], %struct.S.4** [[DOTADDR]], align 8 1611 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1612 // CHECK1-NEXT: ret %struct.S.4* [[THIS1]] 1613 // 1614 // 1615 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEcviEv 1616 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 1617 // CHECK1-NEXT: entry: 1618 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1619 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1620 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1621 // CHECK1-NEXT: ret i32 0 1622 // 1623 // 1624 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1625 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1626 // CHECK1-NEXT: entry: 1627 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1628 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1629 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1630 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 1631 // CHECK1-NEXT: ret void 1632 // 1633 // 1634 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1635 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1636 // CHECK1-NEXT: entry: 1637 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1638 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1639 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1640 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_4:%.*]], %struct.S.4* [[THIS1]], i32 0, i32 0 1641 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1642 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1643 // CHECK1-NEXT: ret void 1644 // 1645 // 1646 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1647 // CHECK1-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1648 // CHECK1-NEXT: entry: 1649 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1650 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 8 1651 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 8 1652 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1653 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1654 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 1655 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1656 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 1657 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 8 1658 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1659 // CHECK1-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 8 1660 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1661 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 1662 // CHECK1-NEXT: store i32* [[TMP2]], i32** [[TMP1]], align 8 1663 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 1664 // CHECK1-NEXT: ret void 1665 // 1666 // 1667 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1668 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 1669 // CHECK1-NEXT: entry: 1670 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1671 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1672 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 8 1673 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1674 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4 1675 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1676 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1677 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 1678 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1679 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1680 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1681 // CHECK1-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 8 1682 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 8 1683 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 1684 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 8 1685 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 1686 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 1687 // CHECK1-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 1688 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 1689 // CHECK1-NEXT: store i32 1, i32* [[A]], align 4 1690 // CHECK1-NEXT: store i32* [[A]], i32** [[_TMP1]], align 8 1691 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 1692 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1693 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 1694 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4 1695 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1696 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i32* [[A]] to i8* 1697 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 8 1698 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1699 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 1700 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1701 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 1, i64 8, i8* [[TMP12]], void (i8*, i8*)* @.omp.reduction.reduction_func.11, [8 x i32]* @.gomp_critical_user_.reduction.var) 1702 // CHECK1-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1703 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1704 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1705 // CHECK1-NEXT: ] 1706 // CHECK1: .omp.reduction.case1: 1707 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP5]], align 4 1708 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[A]], align 4 1709 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP15]] 1710 // CHECK1-NEXT: store i32 [[MUL]], i32* [[TMP5]], align 4 1711 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1712 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1713 // CHECK1: .omp.reduction.case2: 1714 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[A]], align 4 1715 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP5]] monotonic, align 4 1716 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 1717 // CHECK1: atomic_cont: 1718 // CHECK1-NEXT: [[TMP17:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP22:%.*]], [[ATOMIC_CONT]] ] 1719 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[_TMP2]], align 4 1720 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[_TMP2]], align 4 1721 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 1722 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP18]], [[TMP19]] 1723 // CHECK1-NEXT: store i32 [[MUL3]], i32* [[ATOMIC_TEMP]], align 4 1724 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[ATOMIC_TEMP]], align 4 1725 // CHECK1-NEXT: [[TMP21:%.*]] = cmpxchg i32* [[TMP5]], i32 [[TMP17]], i32 [[TMP20]] monotonic monotonic, align 4 1726 // CHECK1-NEXT: [[TMP22]] = extractvalue { i32, i1 } [[TMP21]], 0 1727 // CHECK1-NEXT: [[TMP23:%.*]] = extractvalue { i32, i1 } [[TMP21]], 1 1728 // CHECK1-NEXT: br i1 [[TMP23]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1729 // CHECK1: atomic_exit: 1730 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1731 // CHECK1: .omp.reduction.default: 1732 // CHECK1-NEXT: ret void 1733 // 1734 // 1735 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.11 1736 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1737 // CHECK1-NEXT: entry: 1738 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1739 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1740 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1741 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1742 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1743 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1744 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1745 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1746 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1747 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1748 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1749 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1750 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1751 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1752 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1753 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1754 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]] 1755 // CHECK1-NEXT: store i32 [[MUL]], i32* [[TMP11]], align 4 1756 // CHECK1-NEXT: ret void 1757 // 1758 // 1759 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1760 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1761 // CHECK1-NEXT: entry: 1762 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1763 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1764 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1765 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1766 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1767 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_4:%.*]], %struct.S.4* [[THIS1]], i32 0, i32 0 1768 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1769 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1770 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 1771 // CHECK1-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1772 // CHECK1-NEXT: ret void 1773 // 1774 // 1775 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1776 // CHECK1-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1777 // CHECK1-NEXT: entry: 1778 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 1779 // CHECK1-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 1780 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 1781 // CHECK1-NEXT: ret void 1782 // 1783 // 1784 // CHECK2-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 1785 // CHECK2-SAME: (i16* [[X:%.*]]) #[[ATTR0:[0-9]+]] { 1786 // CHECK2-NEXT: entry: 1787 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 1788 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 1789 // CHECK2-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 1790 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1791 // CHECK2-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 1792 // CHECK2-NEXT: store i16* [[TMP1]], i16** [[TMP0]], align 8 1793 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 1794 // CHECK2-NEXT: ret void 1795 // 1796 // 1797 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1798 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] { 1799 // CHECK2-NEXT: entry: 1800 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1801 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1802 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 1803 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1804 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1805 // CHECK2-NEXT: [[TMP:%.*]] = alloca i16*, align 8 1806 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 1807 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 1808 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 1809 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1810 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1811 // CHECK2-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 1812 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 1813 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 1814 // CHECK2-NEXT: [[TMP2:%.*]] = load i16*, i16** [[TMP1]], align 8 1815 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP2]], i64 0 1816 // CHECK2-NEXT: [[TMP3:%.*]] = load i16*, i16** [[TMP1]], align 8 1817 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 0 1818 // CHECK2-NEXT: [[TMP4:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 1819 // CHECK2-NEXT: [[TMP5:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 1820 // CHECK2-NEXT: [[TMP6:%.*]] = sub i64 [[TMP4]], [[TMP5]] 1821 // CHECK2-NEXT: [[TMP7:%.*]] = sdiv exact i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 1822 // CHECK2-NEXT: [[TMP8:%.*]] = add nuw i64 [[TMP7]], 1 1823 // CHECK2-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 1824 // CHECK2-NEXT: [[TMP10:%.*]] = call i8* @llvm.stacksave() 1825 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[SAVED_STACK]], align 8 1826 // CHECK2-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP8]], align 16 1827 // CHECK2-NEXT: store i64 [[TMP8]], i64* [[__VLA_EXPR0]], align 8 1828 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP8]] 1829 // CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP11]] 1830 // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 1831 // CHECK2: omp.arrayinit.body: 1832 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 1833 // CHECK2-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 1834 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1835 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]] 1836 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 1837 // CHECK2: omp.arrayinit.done: 1838 // CHECK2-NEXT: [[TMP12:%.*]] = load i16*, i16** [[TMP1]], align 8 1839 // CHECK2-NEXT: [[TMP13:%.*]] = ptrtoint i16* [[TMP12]] to i64 1840 // CHECK2-NEXT: [[TMP14:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 1841 // CHECK2-NEXT: [[TMP15:%.*]] = sub i64 [[TMP13]], [[TMP14]] 1842 // CHECK2-NEXT: [[TMP16:%.*]] = sdiv exact i64 [[TMP15]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 1843 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP16]] 1844 // CHECK2-NEXT: store i16* [[TMP17]], i16** [[TMP]], align 8 1845 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1846 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i16* [[VLA]] to i8* 1847 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 1848 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 1849 // CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP8]] to i8* 1850 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 1851 // CHECK2-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1852 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 1853 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1854 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP23]], i32 1, i64 16, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 1855 // CHECK2-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1856 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1857 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1858 // CHECK2-NEXT: ] 1859 // CHECK2: .omp.reduction.case1: 1860 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 1861 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP26]] 1862 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1863 // CHECK2: omp.arraycpy.body: 1864 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1865 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1866 // CHECK2-NEXT: [[TMP27:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 1867 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP27]] to i32 1868 // CHECK2-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 1869 // CHECK2-NEXT: [[CONV3:%.*]] = sext i16 [[TMP28]] to i32 1870 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 1871 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 1872 // CHECK2-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 1873 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 1874 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1875 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP26]] 1876 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 1877 // CHECK2: omp.arraycpy.done7: 1878 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1879 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1880 // CHECK2: .omp.reduction.case2: 1881 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 1882 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP29]] 1883 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 1884 // CHECK2: omp.arraycpy.body9: 1885 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 1886 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 1887 // CHECK2-NEXT: [[TMP30:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 1888 // CHECK2-NEXT: [[CONV12:%.*]] = sext i16 [[TMP30]] to i32 1889 // CHECK2-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 1890 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 1891 // CHECK2: atomic_cont: 1892 // CHECK2-NEXT: [[TMP31:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP36:%.*]], [[ATOMIC_CONT]] ] 1893 // CHECK2-NEXT: store i16 [[TMP31]], i16* [[_TMP13]], align 2 1894 // CHECK2-NEXT: [[TMP32:%.*]] = load i16, i16* [[_TMP13]], align 2 1895 // CHECK2-NEXT: [[CONV14:%.*]] = sext i16 [[TMP32]] to i32 1896 // CHECK2-NEXT: [[TMP33:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 1897 // CHECK2-NEXT: [[CONV15:%.*]] = sext i16 [[TMP33]] to i32 1898 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 1899 // CHECK2-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 1900 // CHECK2-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 1901 // CHECK2-NEXT: [[TMP34:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 1902 // CHECK2-NEXT: [[TMP35:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP31]], i16 [[TMP34]] monotonic monotonic, align 2 1903 // CHECK2-NEXT: [[TMP36]] = extractvalue { i16, i1 } [[TMP35]], 0 1904 // CHECK2-NEXT: [[TMP37:%.*]] = extractvalue { i16, i1 } [[TMP35]], 1 1905 // CHECK2-NEXT: br i1 [[TMP37]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 1906 // CHECK2: atomic_exit: 1907 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 1908 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 1909 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP29]] 1910 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 1911 // CHECK2: omp.arraycpy.done21: 1912 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1913 // CHECK2: .omp.reduction.default: 1914 // CHECK2-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1915 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 1916 // CHECK2-NEXT: ret void 1917 // 1918 // 1919 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 1920 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 1921 // CHECK2-NEXT: entry: 1922 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1923 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1924 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1925 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1926 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1927 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 1928 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1929 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 1930 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 1931 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1932 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 1933 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 1934 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1935 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 1936 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 1937 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 1938 // CHECK2-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 1939 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 1940 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 1941 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1942 // CHECK2: omp.arraycpy.body: 1943 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1944 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1945 // CHECK2-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 1946 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 1947 // CHECK2-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 1948 // CHECK2-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 1949 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 1950 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 1951 // CHECK2-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 1952 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1953 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1954 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 1955 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 1956 // CHECK2: omp.arraycpy.done4: 1957 // CHECK2-NEXT: ret void 1958 // 1959 // 1960 // CHECK2-LABEL: define {{[^@]+}}@main 1961 // CHECK2-SAME: () #[[ATTR6:[0-9]+]] { 1962 // CHECK2-NEXT: entry: 1963 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1964 // CHECK2-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1965 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1966 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca float, align 4 1967 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 1968 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1969 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1970 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1971 // CHECK2-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 1972 // CHECK2-NEXT: [[CF:%.*]] = alloca { float, float }, align 4 1973 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 1974 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_1:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 1975 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_2:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 1976 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 1977 // CHECK2-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @sivar) 1978 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 1979 // CHECK2-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 1980 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1981 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1982 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1983 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1984 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1985 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1986 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]], float 3.000000e+00) 1987 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 1988 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1989 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 1990 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1991 // CHECK2-NEXT: store float* [[T_VAR]], float** [[TMP2]], align 8 1992 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1993 // CHECK2-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP3]], align 8 1994 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 1995 // CHECK2-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP4]], align 8 1996 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 1997 // CHECK2-NEXT: store %struct.S* [[VAR1]], %struct.S** [[TMP5]], align 8 1998 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 1999 // CHECK2-NEXT: store float* [[T_VAR1]], float** [[TMP6]], align 8 2000 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 2001 // CHECK2-NEXT: [[CALL:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 2002 // CHECK2-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL]], 0.000000e+00 2003 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 2004 // CHECK2: if.then: 2005 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 0 2006 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP7]], align 8 2007 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 1 2008 // CHECK2-NEXT: store float* [[T_VAR]], float** [[TMP8]], align 8 2009 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 2 2010 // CHECK2-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP9]], align 8 2011 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 3 2012 // CHECK2-NEXT: store %struct.S* [[VAR]], %struct.S** [[TMP10]], align 8 2013 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 4 2014 // CHECK2-NEXT: store %struct.S* [[VAR1]], %struct.S** [[TMP11]], align 8 2015 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]], i32 0, i32 5 2016 // CHECK2-NEXT: store float* [[T_VAR1]], float** [[TMP12]], align 8 2017 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_1]]) 2018 // CHECK2-NEXT: br label [[IF_END]] 2019 // CHECK2: if.end: 2020 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_2]], i32 0, i32 0 2021 // CHECK2-NEXT: store { float, float }* [[CF]], { float, float }** [[TMP13]], align 8 2022 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_2]]) 2023 // CHECK2-NEXT: [[CALL3:%.*]] = call i32 @_Z5tmainIiET_v() 2024 // CHECK2-NEXT: store i32 [[CALL3]], i32* [[RETVAL]], align 4 2025 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5:[0-9]+]] 2026 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 2027 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 2028 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 2029 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2030 // CHECK2: arraydestroy.body: 2031 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP14]], [[IF_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2032 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2033 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2034 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2035 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE4:%.*]], label [[ARRAYDESTROY_BODY]] 2036 // CHECK2: arraydestroy.done4: 2037 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 2038 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[RETVAL]], align 4 2039 // CHECK2-NEXT: ret i32 [[TMP15]] 2040 // 2041 // 2042 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 2043 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 { 2044 // CHECK2-NEXT: entry: 2045 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2046 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2047 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2048 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2049 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2050 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2051 // CHECK2-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 2052 // CHECK2-NEXT: ret void 2053 // 2054 // 2055 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 2056 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2057 // CHECK2-NEXT: entry: 2058 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2059 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2060 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2061 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 2062 // CHECK2-NEXT: ret void 2063 // 2064 // 2065 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 2066 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2067 // CHECK2-NEXT: entry: 2068 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2069 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2070 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2071 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2072 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2073 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2074 // CHECK2-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]]) 2075 // CHECK2-NEXT: ret void 2076 // 2077 // 2078 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 2079 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 2080 // CHECK2-NEXT: entry: 2081 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2082 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2083 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 2084 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca float, align 4 2085 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2086 // CHECK2-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 2087 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 2088 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 2089 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S]], align 4 2090 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca float, align 4 2091 // CHECK2-NEXT: [[TMP:%.*]] = alloca float, align 4 2092 // CHECK2-NEXT: [[REF_TMP8:%.*]] = alloca [[STRUCT_S]], align 4 2093 // CHECK2-NEXT: [[ATOMIC_TEMP18:%.*]] = alloca float, align 4 2094 // CHECK2-NEXT: [[_TMP19:%.*]] = alloca float, align 4 2095 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2096 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2097 // CHECK2-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 2098 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 2099 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 2100 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 2101 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 1 2102 // CHECK2-NEXT: [[TMP4:%.*]] = load float*, float** [[TMP3]], align 8 2103 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 2 2104 // CHECK2-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 8 2105 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 3 2106 // CHECK2-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 8 2107 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 4 2108 // CHECK2-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[TMP9]], align 8 2109 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 5 2110 // CHECK2-NEXT: [[TMP12:%.*]] = load float*, float** [[TMP11]], align 8 2111 // CHECK2-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 2112 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2113 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 2114 // CHECK2-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR1]], align 4 2115 // CHECK2-NEXT: [[TMP13:%.*]] = load float, float* [[T_VAR]], align 4 2116 // CHECK2-NEXT: [[CONV:%.*]] = fptosi float [[TMP13]] to i32 2117 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP2]], i64 0, i64 0 2118 // CHECK2-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 2119 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP6]], i64 0, i64 0 2120 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 2121 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[VAR]] to i8* 2122 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 2123 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2124 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast float* [[T_VAR]] to i8* 2125 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 2126 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 2127 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast %struct.S* [[VAR]] to i8* 2128 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 2129 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 2130 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast %struct.S* [[VAR1]] to i8* 2131 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 2132 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 2133 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast float* [[T_VAR1]] to i8* 2134 // CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8 2135 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2136 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2137 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2138 // CHECK2-NEXT: [[TMP27:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], i32 4, i64 32, i8* [[TMP26]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 2139 // CHECK2-NEXT: switch i32 [[TMP27]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2140 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2141 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2142 // CHECK2-NEXT: ] 2143 // CHECK2: .omp.reduction.case1: 2144 // CHECK2-NEXT: [[TMP28:%.*]] = load float, float* [[TMP4]], align 4 2145 // CHECK2-NEXT: [[TMP29:%.*]] = load float, float* [[T_VAR]], align 4 2146 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP28]], [[TMP29]] 2147 // CHECK2-NEXT: store float [[ADD]], float* [[TMP4]], align 4 2148 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2149 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 2150 // CHECK2-NEXT: [[TMP31:%.*]] = bitcast %struct.S* [[CALL]] to i8* 2151 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 2152 // CHECK2-NEXT: [[CALL2:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP10]]) 2153 // CHECK2-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00 2154 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 2155 // CHECK2: land.rhs: 2156 // CHECK2-NEXT: [[CALL3:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 2157 // CHECK2-NEXT: [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00 2158 // CHECK2-NEXT: br label [[LAND_END]] 2159 // CHECK2: land.end: 2160 // CHECK2-NEXT: [[TMP32:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 2161 // CHECK2-NEXT: [[CONV5:%.*]] = uitofp i1 [[TMP32]] to float 2162 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]], float [[CONV5]]) 2163 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 2164 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 2165 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 2166 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 2167 // CHECK2-NEXT: [[TMP35:%.*]] = load float, float* [[TMP12]], align 4 2168 // CHECK2-NEXT: [[TMP36:%.*]] = load float, float* [[T_VAR1]], align 4 2169 // CHECK2-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP35]], [[TMP36]] 2170 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2171 // CHECK2: cond.true: 2172 // CHECK2-NEXT: [[TMP37:%.*]] = load float, float* [[TMP12]], align 4 2173 // CHECK2-NEXT: br label [[COND_END:%.*]] 2174 // CHECK2: cond.false: 2175 // CHECK2-NEXT: [[TMP38:%.*]] = load float, float* [[T_VAR1]], align 4 2176 // CHECK2-NEXT: br label [[COND_END]] 2177 // CHECK2: cond.end: 2178 // CHECK2-NEXT: [[COND:%.*]] = phi float [ [[TMP37]], [[COND_TRUE]] ], [ [[TMP38]], [[COND_FALSE]] ] 2179 // CHECK2-NEXT: store float [[COND]], float* [[TMP12]], align 4 2180 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2181 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2182 // CHECK2: .omp.reduction.case2: 2183 // CHECK2-NEXT: [[TMP39:%.*]] = load float, float* [[T_VAR]], align 4 2184 // CHECK2-NEXT: [[TMP40:%.*]] = bitcast float* [[TMP4]] to i32* 2185 // CHECK2-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP40]] monotonic, align 4 2186 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 2187 // CHECK2: atomic_cont: 2188 // CHECK2-NEXT: [[TMP41:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP49:%.*]], [[ATOMIC_CONT]] ] 2189 // CHECK2-NEXT: [[TMP42:%.*]] = bitcast float* [[ATOMIC_TEMP]] to i32* 2190 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast i32 [[TMP41]] to float 2191 // CHECK2-NEXT: store float [[TMP43]], float* [[TMP]], align 4 2192 // CHECK2-NEXT: [[TMP44:%.*]] = load float, float* [[TMP]], align 4 2193 // CHECK2-NEXT: [[TMP45:%.*]] = load float, float* [[T_VAR]], align 4 2194 // CHECK2-NEXT: [[ADD6:%.*]] = fadd float [[TMP44]], [[TMP45]] 2195 // CHECK2-NEXT: store float [[ADD6]], float* [[ATOMIC_TEMP]], align 4 2196 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP42]], align 4 2197 // CHECK2-NEXT: [[TMP47:%.*]] = bitcast float* [[TMP4]] to i32* 2198 // CHECK2-NEXT: [[TMP48:%.*]] = cmpxchg i32* [[TMP47]], i32 [[TMP41]], i32 [[TMP46]] monotonic monotonic, align 4 2199 // CHECK2-NEXT: [[TMP49]] = extractvalue { i32, i1 } [[TMP48]], 0 2200 // CHECK2-NEXT: [[TMP50:%.*]] = extractvalue { i32, i1 } [[TMP48]], 1 2201 // CHECK2-NEXT: br i1 [[TMP50]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 2202 // CHECK2: atomic_exit: 2203 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2204 // CHECK2-NEXT: [[CALL7:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2205 // CHECK2-NEXT: [[TMP51:%.*]] = bitcast %struct.S* [[TMP8]] to i8* 2206 // CHECK2-NEXT: [[TMP52:%.*]] = bitcast %struct.S* [[CALL7]] to i8* 2207 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP51]], i8* align 4 [[TMP52]], i64 4, i1 false) 2208 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2209 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2210 // CHECK2-NEXT: [[CALL9:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP10]]) 2211 // CHECK2-NEXT: [[TOBOOL10:%.*]] = fcmp une float [[CALL9]], 0.000000e+00 2212 // CHECK2-NEXT: br i1 [[TOBOOL10]], label [[LAND_RHS11:%.*]], label [[LAND_END14:%.*]] 2213 // CHECK2: land.rhs11: 2214 // CHECK2-NEXT: [[CALL12:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 2215 // CHECK2-NEXT: [[TOBOOL13:%.*]] = fcmp une float [[CALL12]], 0.000000e+00 2216 // CHECK2-NEXT: br label [[LAND_END14]] 2217 // CHECK2: land.end14: 2218 // CHECK2-NEXT: [[TMP53:%.*]] = phi i1 [ false, [[ATOMIC_EXIT]] ], [ [[TOBOOL13]], [[LAND_RHS11]] ] 2219 // CHECK2-NEXT: [[CONV15:%.*]] = uitofp i1 [[TMP53]] to float 2220 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP8]], float [[CONV15]]) 2221 // CHECK2-NEXT: [[TMP54:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 2222 // CHECK2-NEXT: [[TMP55:%.*]] = bitcast %struct.S* [[REF_TMP8]] to i8* 2223 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP54]], i8* align 4 [[TMP55]], i64 4, i1 false) 2224 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP8]]) #[[ATTR5]] 2225 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2226 // CHECK2-NEXT: [[TMP56:%.*]] = load float, float* [[T_VAR1]], align 4 2227 // CHECK2-NEXT: [[TMP57:%.*]] = bitcast float* [[TMP12]] to i32* 2228 // CHECK2-NEXT: [[ATOMIC_LOAD16:%.*]] = load atomic i32, i32* [[TMP57]] monotonic, align 4 2229 // CHECK2-NEXT: br label [[ATOMIC_CONT17:%.*]] 2230 // CHECK2: atomic_cont17: 2231 // CHECK2-NEXT: [[TMP58:%.*]] = phi i32 [ [[ATOMIC_LOAD16]], [[LAND_END14]] ], [ [[TMP68:%.*]], [[COND_END23:%.*]] ] 2232 // CHECK2-NEXT: [[TMP59:%.*]] = bitcast float* [[ATOMIC_TEMP18]] to i32* 2233 // CHECK2-NEXT: [[TMP60:%.*]] = bitcast i32 [[TMP58]] to float 2234 // CHECK2-NEXT: store float [[TMP60]], float* [[_TMP19]], align 4 2235 // CHECK2-NEXT: [[TMP61:%.*]] = load float, float* [[_TMP19]], align 4 2236 // CHECK2-NEXT: [[TMP62:%.*]] = load float, float* [[T_VAR1]], align 4 2237 // CHECK2-NEXT: [[CMP20:%.*]] = fcmp olt float [[TMP61]], [[TMP62]] 2238 // CHECK2-NEXT: br i1 [[CMP20]], label [[COND_TRUE21:%.*]], label [[COND_FALSE22:%.*]] 2239 // CHECK2: cond.true21: 2240 // CHECK2-NEXT: [[TMP63:%.*]] = load float, float* [[_TMP19]], align 4 2241 // CHECK2-NEXT: br label [[COND_END23]] 2242 // CHECK2: cond.false22: 2243 // CHECK2-NEXT: [[TMP64:%.*]] = load float, float* [[T_VAR1]], align 4 2244 // CHECK2-NEXT: br label [[COND_END23]] 2245 // CHECK2: cond.end23: 2246 // CHECK2-NEXT: [[COND24:%.*]] = phi float [ [[TMP63]], [[COND_TRUE21]] ], [ [[TMP64]], [[COND_FALSE22]] ] 2247 // CHECK2-NEXT: store float [[COND24]], float* [[ATOMIC_TEMP18]], align 4 2248 // CHECK2-NEXT: [[TMP65:%.*]] = load i32, i32* [[TMP59]], align 4 2249 // CHECK2-NEXT: [[TMP66:%.*]] = bitcast float* [[TMP12]] to i32* 2250 // CHECK2-NEXT: [[TMP67:%.*]] = cmpxchg i32* [[TMP66]], i32 [[TMP58]], i32 [[TMP65]] monotonic monotonic, align 4 2251 // CHECK2-NEXT: [[TMP68]] = extractvalue { i32, i1 } [[TMP67]], 0 2252 // CHECK2-NEXT: [[TMP69:%.*]] = extractvalue { i32, i1 } [[TMP67]], 1 2253 // CHECK2-NEXT: br i1 [[TMP69]], label [[ATOMIC_EXIT25:%.*]], label [[ATOMIC_CONT17]] 2254 // CHECK2: atomic_exit25: 2255 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2256 // CHECK2: .omp.reduction.default: 2257 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 2258 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 2259 // CHECK2-NEXT: ret void 2260 // 2261 // 2262 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 2263 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 2264 // CHECK2-NEXT: entry: 2265 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2266 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2267 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2268 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2269 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2270 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2271 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 2272 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2273 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 2274 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 2275 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2276 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to float* 2277 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 2278 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2279 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to float* 2280 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 2281 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 2282 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S* 2283 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 2284 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 2285 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S* 2286 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 2287 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2288 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S* 2289 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 2290 // CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 2291 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S* 2292 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 2293 // CHECK2-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 2294 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to float* 2295 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 2296 // CHECK2-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 2297 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to float* 2298 // CHECK2-NEXT: [[TMP30:%.*]] = load float, float* [[TMP11]], align 4 2299 // CHECK2-NEXT: [[TMP31:%.*]] = load float, float* [[TMP8]], align 4 2300 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP30]], [[TMP31]] 2301 // CHECK2-NEXT: store float [[ADD]], float* [[TMP11]], align 4 2302 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP14]]) 2303 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP17]] to i8* 2304 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[CALL]] to i8* 2305 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 2306 // CHECK2-NEXT: [[CALL2:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP23]]) 2307 // CHECK2-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00 2308 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 2309 // CHECK2: land.rhs: 2310 // CHECK2-NEXT: [[CALL3:%.*]] = call float @_ZN1SIfEcvfEv(%struct.S* nonnull align 4 dereferenceable(4) [[TMP20]]) 2311 // CHECK2-NEXT: [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00 2312 // CHECK2-NEXT: br label [[LAND_END]] 2313 // CHECK2: land.end: 2314 // CHECK2-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 2315 // CHECK2-NEXT: [[CONV:%.*]] = uitofp i1 [[TMP34]] to float 2316 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]], float [[CONV]]) 2317 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 2318 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 2319 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 2320 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 2321 // CHECK2-NEXT: [[TMP37:%.*]] = load float, float* [[TMP29]], align 4 2322 // CHECK2-NEXT: [[TMP38:%.*]] = load float, float* [[TMP26]], align 4 2323 // CHECK2-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP37]], [[TMP38]] 2324 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2325 // CHECK2: cond.true: 2326 // CHECK2-NEXT: [[TMP39:%.*]] = load float, float* [[TMP29]], align 4 2327 // CHECK2-NEXT: br label [[COND_END:%.*]] 2328 // CHECK2: cond.false: 2329 // CHECK2-NEXT: [[TMP40:%.*]] = load float, float* [[TMP26]], align 4 2330 // CHECK2-NEXT: br label [[COND_END]] 2331 // CHECK2: cond.end: 2332 // CHECK2-NEXT: [[COND:%.*]] = phi float [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 2333 // CHECK2-NEXT: store float [[COND]], float* [[TMP29]], align 4 2334 // CHECK2-NEXT: ret void 2335 // 2336 // 2337 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEanERKS0_ 2338 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 2339 // CHECK2-NEXT: entry: 2340 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2341 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct.S*, align 8 2342 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2343 // CHECK2-NEXT: store %struct.S* [[TMP0]], %struct.S** [[DOTADDR]], align 8 2344 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2345 // CHECK2-NEXT: ret %struct.S* [[THIS1]] 2346 // 2347 // 2348 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEcvfEv 2349 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 2350 // CHECK2-NEXT: entry: 2351 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2352 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2353 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2354 // CHECK2-NEXT: ret float 0.000000e+00 2355 // 2356 // 2357 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2358 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2359 // CHECK2-NEXT: entry: 2360 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2361 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2362 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2363 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 2364 // CHECK2-NEXT: ret void 2365 // 2366 // 2367 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 2368 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 2369 // CHECK2-NEXT: entry: 2370 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2371 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2372 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 2373 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca float, align 4 2374 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2375 // CHECK2-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 2376 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 2377 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2378 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2379 // CHECK2-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 2380 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 2381 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 2382 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 2383 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 2384 // CHECK2-NEXT: [[TMP4:%.*]] = load float*, float** [[TMP3]], align 8 2385 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 2386 // CHECK2-NEXT: [[TMP6:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[TMP5]], align 8 2387 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 2388 // CHECK2-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP7]], align 8 2389 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 4 2390 // CHECK2-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[TMP9]], align 8 2391 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 5 2392 // CHECK2-NEXT: [[TMP12:%.*]] = load float*, float** [[TMP11]], align 8 2393 // CHECK2-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 2394 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR]]) 2395 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR1]]) 2396 // CHECK2-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR1]], align 4 2397 // CHECK2-NEXT: br label [[WHILE_COND:%.*]] 2398 // CHECK2: while.cond: 2399 // CHECK2-NEXT: br label [[WHILE_BODY:%.*]] 2400 // CHECK2: while.body: 2401 // CHECK2-NEXT: [[TMP13:%.*]] = load float, float* [[T_VAR]], align 4 2402 // CHECK2-NEXT: [[CONV:%.*]] = fptosi float [[TMP13]] to i32 2403 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP2]], i64 0, i64 0 2404 // CHECK2-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 2405 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP6]], i64 0, i64 0 2406 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8* 2407 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[VAR]] to i8* 2408 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false) 2409 // CHECK2-NEXT: br label [[WHILE_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2410 // 2411 // 2412 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 2413 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 2414 // CHECK2-NEXT: entry: 2415 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2416 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2417 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 2418 // CHECK2-NEXT: [[CF:%.*]] = alloca { float, float }, align 4 2419 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2420 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca { float, float }, align 4 2421 // CHECK2-NEXT: [[ATOMIC_TEMP9:%.*]] = alloca { float, float }, align 4 2422 // CHECK2-NEXT: [[TMP:%.*]] = alloca { float, float }, align 4 2423 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2424 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2425 // CHECK2-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 2426 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 2427 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 2428 // CHECK2-NEXT: [[TMP2:%.*]] = load { float, float }*, { float, float }** [[TMP1]], align 8 2429 // CHECK2-NEXT: [[CF_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 2430 // CHECK2-NEXT: [[CF_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 2431 // CHECK2-NEXT: store float 0.000000e+00, float* [[CF_REALP]], align 4 2432 // CHECK2-NEXT: store float 0.000000e+00, float* [[CF_IMAGP]], align 4 2433 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2434 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast { float, float }* [[CF]] to i8* 2435 // CHECK2-NEXT: store i8* [[TMP4]], i8** [[TMP3]], align 8 2436 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2437 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2438 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2439 // CHECK2-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], i32 1, i64 8, i8* [[TMP7]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 2440 // CHECK2-NEXT: switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2441 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2442 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2443 // CHECK2-NEXT: ] 2444 // CHECK2: .omp.reduction.case1: 2445 // CHECK2-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 0 2446 // CHECK2-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 2447 // CHECK2-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 1 2448 // CHECK2-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 2449 // CHECK2-NEXT: [[CF_REALP1:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 2450 // CHECK2-NEXT: [[CF_REAL:%.*]] = load float, float* [[CF_REALP1]], align 4 2451 // CHECK2-NEXT: [[CF_IMAGP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 2452 // CHECK2-NEXT: [[CF_IMAG:%.*]] = load float, float* [[CF_IMAGP2]], align 4 2453 // CHECK2-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[CF_REAL]] 2454 // CHECK2-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[CF_IMAG]] 2455 // CHECK2-NEXT: [[DOTREALP3:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 0 2456 // CHECK2-NEXT: [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP2]], i32 0, i32 1 2457 // CHECK2-NEXT: store float [[ADD_R]], float* [[DOTREALP3]], align 4 2458 // CHECK2-NEXT: store float [[ADD_I]], float* [[DOTIMAGP4]], align 4 2459 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP6]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2460 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2461 // CHECK2: .omp.reduction.case2: 2462 // CHECK2-NEXT: [[CF_REALP5:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 2463 // CHECK2-NEXT: [[CF_REAL6:%.*]] = load float, float* [[CF_REALP5]], align 4 2464 // CHECK2-NEXT: [[CF_IMAGP7:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 2465 // CHECK2-NEXT: [[CF_IMAG8:%.*]] = load float, float* [[CF_IMAGP7]], align 4 2466 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast { float, float }* [[TMP2]] to i8* 2467 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 2468 // CHECK2-NEXT: call void @__atomic_load(i64 8, i8* [[TMP9]], i8* [[TMP10]], i32 0) 2469 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 2470 // CHECK2: atomic_cont: 2471 // CHECK2-NEXT: [[ATOMIC_TEMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 0 2472 // CHECK2-NEXT: [[ATOMIC_TEMP_REAL:%.*]] = load float, float* [[ATOMIC_TEMP_REALP]], align 4 2473 // CHECK2-NEXT: [[ATOMIC_TEMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 1 2474 // CHECK2-NEXT: [[ATOMIC_TEMP_IMAG:%.*]] = load float, float* [[ATOMIC_TEMP_IMAGP]], align 4 2475 // CHECK2-NEXT: [[TMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 2476 // CHECK2-NEXT: [[TMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 2477 // CHECK2-NEXT: store float [[ATOMIC_TEMP_REAL]], float* [[TMP_REALP]], align 4 2478 // CHECK2-NEXT: store float [[ATOMIC_TEMP_IMAG]], float* [[TMP_IMAGP]], align 4 2479 // CHECK2-NEXT: [[TMP_REALP10:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 2480 // CHECK2-NEXT: [[TMP_REAL:%.*]] = load float, float* [[TMP_REALP10]], align 4 2481 // CHECK2-NEXT: [[TMP_IMAGP11:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 2482 // CHECK2-NEXT: [[TMP_IMAG:%.*]] = load float, float* [[TMP_IMAGP11]], align 4 2483 // CHECK2-NEXT: [[CF_REALP12:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 0 2484 // CHECK2-NEXT: [[CF_REAL13:%.*]] = load float, float* [[CF_REALP12]], align 4 2485 // CHECK2-NEXT: [[CF_IMAGP14:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF]], i32 0, i32 1 2486 // CHECK2-NEXT: [[CF_IMAG15:%.*]] = load float, float* [[CF_IMAGP14]], align 4 2487 // CHECK2-NEXT: [[ADD_R16:%.*]] = fadd float [[TMP_REAL]], [[CF_REAL13]] 2488 // CHECK2-NEXT: [[ADD_I17:%.*]] = fadd float [[TMP_IMAG]], [[CF_IMAG15]] 2489 // CHECK2-NEXT: [[ATOMIC_TEMP9_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP9]], i32 0, i32 0 2490 // CHECK2-NEXT: [[ATOMIC_TEMP9_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP9]], i32 0, i32 1 2491 // CHECK2-NEXT: store float [[ADD_R16]], float* [[ATOMIC_TEMP9_REALP]], align 4 2492 // CHECK2-NEXT: store float [[ADD_I17]], float* [[ATOMIC_TEMP9_IMAGP]], align 4 2493 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast { float, float }* [[TMP2]] to i8* 2494 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 2495 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP9]] to i8* 2496 // CHECK2-NEXT: [[CALL:%.*]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* [[TMP11]], i8* [[TMP12]], i8* [[TMP13]], i32 0, i32 0) 2497 // CHECK2-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 2498 // CHECK2: atomic_exit: 2499 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2500 // CHECK2: .omp.reduction.default: 2501 // CHECK2-NEXT: ret void 2502 // 2503 // 2504 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 2505 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 2506 // CHECK2-NEXT: entry: 2507 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2508 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2509 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2510 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2511 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2512 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2513 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2514 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2515 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2516 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2517 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to { float, float }* 2518 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2519 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2520 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to { float, float }* 2521 // CHECK2-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 2522 // CHECK2-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 2523 // CHECK2-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 2524 // CHECK2-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 2525 // CHECK2-NEXT: [[DOTREALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 0 2526 // CHECK2-NEXT: [[DOTREAL3:%.*]] = load float, float* [[DOTREALP2]], align 4 2527 // CHECK2-NEXT: [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 1 2528 // CHECK2-NEXT: [[DOTIMAG5:%.*]] = load float, float* [[DOTIMAGP4]], align 4 2529 // CHECK2-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[DOTREAL3]] 2530 // CHECK2-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[DOTIMAG5]] 2531 // CHECK2-NEXT: [[DOTREALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 2532 // CHECK2-NEXT: [[DOTIMAGP7:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 2533 // CHECK2-NEXT: store float [[ADD_R]], float* [[DOTREALP6]], align 4 2534 // CHECK2-NEXT: store float [[ADD_I]], float* [[DOTIMAGP7]], align 4 2535 // CHECK2-NEXT: ret void 2536 // 2537 // 2538 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2539 // CHECK2-SAME: () #[[ATTR0]] { 2540 // CHECK2-NEXT: entry: 2541 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2542 // CHECK2-NEXT: [[T:%.*]] = alloca i32, align 4 2543 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_4:%.*]], align 4 2544 // CHECK2-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 2545 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2546 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 2547 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2548 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.4], align 4 2549 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_4]], align 128 2550 // CHECK2-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S_4]], align 128 2551 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 2552 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[TEST]]) 2553 // CHECK2-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[SST]]) 2554 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 128 2555 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2556 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2557 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.4], [2 x %struct.S.4]* [[S_ARR]], i64 0, i64 0 2558 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 2559 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_4]], %struct.S.4* [[ARRAYINIT_BEGIN]], i64 1 2560 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 2561 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]], i32 3) 2562 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 2563 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2564 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP1]], align 8 2565 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2566 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[TMP2]], align 8 2567 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2568 // CHECK2-NEXT: store [2 x %struct.S.4]* [[S_ARR]], [2 x %struct.S.4]** [[TMP3]], align 8 2569 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2570 // CHECK2-NEXT: store %struct.S.4* [[VAR]], %struct.S.4** [[TMP4]], align 8 2571 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 4 2572 // CHECK2-NEXT: store %struct.S.4* [[VAR1]], %struct.S.4** [[TMP5]], align 8 2573 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 5 2574 // CHECK2-NEXT: store i32* [[T_VAR1]], i32** [[TMP6]], align 8 2575 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.5*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.anon.5* [[OMP_OUTLINED_ARG_AGG_]]) 2576 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 2577 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 2578 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 2579 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.4], [2 x %struct.S.4]* [[S_ARR]], i32 0, i32 0 2580 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S_4]], %struct.S.4* [[ARRAY_BEGIN]], i64 2 2581 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2582 // CHECK2: arraydestroy.body: 2583 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.4* [ [[TMP7]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2584 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_4]], %struct.S.4* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2585 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2586 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.4* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2587 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2588 // CHECK2: arraydestroy.done1: 2589 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 2590 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[RETVAL]], align 4 2591 // CHECK2-NEXT: ret i32 [[TMP8]] 2592 // 2593 // 2594 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2595 // CHECK2-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2596 // CHECK2-NEXT: entry: 2597 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2598 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2599 // CHECK2-NEXT: [[A2:%.*]] = alloca i32*, align 8 2600 // CHECK2-NEXT: [[B4:%.*]] = alloca i32, align 4 2601 // CHECK2-NEXT: [[C5:%.*]] = alloca i32*, align 8 2602 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_3:%.*]], align 8 2603 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2604 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2605 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2606 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2607 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 2608 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2609 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2610 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2611 // CHECK2-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 2612 // CHECK2-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2613 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2614 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 2615 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2616 // CHECK2-NEXT: store i32* [[A3]], i32** [[A2]], align 8 2617 // CHECK2-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2618 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 2619 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 2620 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2621 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 2622 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2623 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 2624 // CHECK2-NEXT: store i32* [[TMP4]], i32** [[TMP3]], align 8 2625 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2626 // CHECK2-NEXT: store i32* [[B4]], i32** [[TMP5]], align 8 2627 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 2628 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[C5]], align 8 2629 // CHECK2-NEXT: store i32* [[TMP7]], i32** [[TMP6]], align 8 2630 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.3*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.anon.3* [[OMP_OUTLINED_ARG_AGG_]]) 2631 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 2632 // CHECK2-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2633 // CHECK2-NEXT: [[TMP9:%.*]] = trunc i32 [[TMP8]] to i8 2634 // CHECK2-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 2635 // CHECK2-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP9]], 15 2636 // CHECK2-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 2637 // CHECK2-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 2638 // CHECK2-NEXT: store i8 [[BF_SET]], i8* [[B7]], align 4 2639 // CHECK2-NEXT: ret void 2640 // 2641 // 2642 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 2643 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 2644 // CHECK2-NEXT: entry: 2645 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2646 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2647 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 2648 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2649 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 2650 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 2651 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2652 // CHECK2-NEXT: [[B:%.*]] = alloca i32, align 4 2653 // CHECK2-NEXT: [[C:%.*]] = alloca i32, align 4 2654 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2655 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 2656 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2657 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2658 // CHECK2-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 2659 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 2660 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 2661 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 2662 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 1 2663 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 2664 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 2 2665 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 2666 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_3]], %struct.anon.3* [[TMP0]], i32 0, i32 3 2667 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8 2668 // CHECK2-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 2669 // CHECK2-NEXT: store i32* [[TMP8]], i32** [[_TMP1]], align 8 2670 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 2671 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2672 // CHECK2-NEXT: store i32* [[A]], i32** [[_TMP2]], align 8 2673 // CHECK2-NEXT: store i32 0, i32* [[B]], align 4 2674 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP1]], align 8 2675 // CHECK2-NEXT: store i32 0, i32* [[C]], align 4 2676 // CHECK2-NEXT: store i32* [[C]], i32** [[_TMP3]], align 8 2677 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8 2678 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2679 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 2680 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP11]], align 4 2681 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[B]], align 4 2682 // CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP13]], -1 2683 // CHECK2-NEXT: store i32 [[DEC]], i32* [[B]], align 4 2684 // CHECK2-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP3]], align 8 2685 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 2686 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP15]], 1 2687 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TMP14]], align 4 2688 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2689 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[A]] to i8* 2690 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 2691 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 2692 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i32* [[B]] to i8* 2693 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 2694 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 2695 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i32* [[C]] to i8* 2696 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 2697 // CHECK2-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2698 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 2699 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2700 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], i32 3, i64 24, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func.7, [8 x i32]* @.gomp_critical_user_.reduction.var) 2701 // CHECK2-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2702 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2703 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2704 // CHECK2-NEXT: ] 2705 // CHECK2: .omp.reduction.case1: 2706 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP9]], align 4 2707 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[A]], align 4 2708 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 2709 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP9]], align 4 2710 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP6]], align 4 2711 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[B]], align 4 2712 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 2713 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[TMP6]], align 4 2714 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP10]], align 4 2715 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[C]], align 4 2716 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 2717 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[TMP10]], align 4 2718 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2719 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2720 // CHECK2: .omp.reduction.case2: 2721 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[A]], align 4 2722 // CHECK2-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP9]], i32 [[TMP32]] monotonic, align 4 2723 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[B]], align 4 2724 // CHECK2-NEXT: [[TMP35:%.*]] = atomicrmw add i32* [[TMP6]], i32 [[TMP34]] monotonic, align 4 2725 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[C]], align 4 2726 // CHECK2-NEXT: [[TMP37:%.*]] = atomicrmw add i32* [[TMP10]], i32 [[TMP36]] monotonic, align 4 2727 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2728 // CHECK2: .omp.reduction.default: 2729 // CHECK2-NEXT: ret void 2730 // 2731 // 2732 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.7 2733 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 2734 // CHECK2-NEXT: entry: 2735 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2736 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2737 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2738 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2739 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2740 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 2741 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2742 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 2743 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 2744 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2745 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2746 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 2747 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2748 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2749 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 2750 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 2751 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 2752 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 2753 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 2754 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 2755 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 2756 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2757 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 2758 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 2759 // CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 2760 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 2761 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 2762 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 2763 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 2764 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2765 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 2766 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 2767 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 2768 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 2769 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 2770 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 2771 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 2772 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 2773 // CHECK2-NEXT: ret void 2774 // 2775 // 2776 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2777 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2778 // CHECK2-NEXT: entry: 2779 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2780 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2781 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2782 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2783 // CHECK2-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 2784 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 2785 // CHECK2-NEXT: store float [[CONV]], float* [[F]], align 4 2786 // CHECK2-NEXT: ret void 2787 // 2788 // 2789 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2790 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2791 // CHECK2-NEXT: entry: 2792 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2793 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2794 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2795 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2796 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2797 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2798 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2799 // CHECK2-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 2800 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 2801 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 2802 // CHECK2-NEXT: store float [[ADD]], float* [[F]], align 4 2803 // CHECK2-NEXT: ret void 2804 // 2805 // 2806 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2807 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2808 // CHECK2-NEXT: entry: 2809 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2810 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2811 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2812 // CHECK2-NEXT: ret void 2813 // 2814 // 2815 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2816 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2817 // CHECK2-NEXT: entry: 2818 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 2819 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 2820 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 2821 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS1]]) 2822 // CHECK2-NEXT: ret void 2823 // 2824 // 2825 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 2826 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2827 // CHECK2-NEXT: entry: 2828 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2829 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2830 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2831 // CHECK2-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* nonnull align 4 dereferenceable(4) [[THIS1]]) 2832 // CHECK2-NEXT: ret void 2833 // 2834 // 2835 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2836 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2837 // CHECK2-NEXT: entry: 2838 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 2839 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2840 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 2841 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2842 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 2843 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2844 // CHECK2-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2845 // CHECK2-NEXT: ret void 2846 // 2847 // 2848 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8 2849 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.5* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 2850 // CHECK2-NEXT: entry: 2851 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2852 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2853 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.5*, align 8 2854 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2855 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_4:%.*]], align 128 2856 // CHECK2-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S_4]], align 128 2857 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 2858 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 2859 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_4]], align 4 2860 // CHECK2-NEXT: [[REF_TMP6:%.*]] = alloca [[STRUCT_S_4]], align 4 2861 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2862 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2863 // CHECK2-NEXT: store %struct.anon.5* [[__CONTEXT]], %struct.anon.5** [[__CONTEXT_ADDR]], align 8 2864 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR]], align 8 2865 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP0]], i32 0, i32 0 2866 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x i32]*, [2 x i32]** [[TMP1]], align 8 2867 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 1 2868 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 2869 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 2 2870 // CHECK2-NEXT: [[TMP6:%.*]] = load [2 x %struct.S.4]*, [2 x %struct.S.4]** [[TMP5]], align 8 2871 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 3 2872 // CHECK2-NEXT: [[TMP8:%.*]] = load %struct.S.4*, %struct.S.4** [[TMP7]], align 8 2873 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 4 2874 // CHECK2-NEXT: [[TMP10:%.*]] = load %struct.S.4*, %struct.S.4** [[TMP9]], align 8 2875 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP0]], i32 0, i32 5 2876 // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8 2877 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 128 2878 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) 2879 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 2880 // CHECK2-NEXT: store i32 2147483647, i32* [[T_VAR1]], align 128 2881 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[T_VAR]], align 128 2882 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP2]], i64 0, i64 0 2883 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[ARRAYIDX]], align 4 2884 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.4], [2 x %struct.S.4]* [[TMP6]], i64 0, i64 0 2885 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %struct.S.4* [[ARRAYIDX1]] to i8* 2886 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast %struct.S.4* [[VAR]] to i8* 2887 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 128 [[TMP15]], i64 4, i1 false) 2888 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2889 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR]] to i8* 2890 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 2891 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 2892 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast %struct.S.4* [[VAR]] to i8* 2893 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 2894 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 2895 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast %struct.S.4* [[VAR1]] to i8* 2896 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 2897 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 2898 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i32* [[T_VAR1]] to i8* 2899 // CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8 2900 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2901 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2902 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2903 // CHECK2-NEXT: [[TMP27:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], i32 4, i64 32, i8* [[TMP26]], void (i8*, i8*)* @.omp.reduction.reduction_func.9, [8 x i32]* @.gomp_critical_user_.reduction.var) 2904 // CHECK2-NEXT: switch i32 [[TMP27]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2905 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2906 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2907 // CHECK2-NEXT: ] 2908 // CHECK2: .omp.reduction.case1: 2909 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP4]], align 128 2910 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[T_VAR]], align 128 2911 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 2912 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 128 2913 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.4* @_ZN1SIiEanERKS0_(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) 2914 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast %struct.S.4* [[TMP8]] to i8* 2915 // CHECK2-NEXT: [[TMP31:%.*]] = bitcast %struct.S.4* [[CALL]] to i8* 2916 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP30]], i8* align 4 [[TMP31]], i64 4, i1 false) 2917 // CHECK2-NEXT: [[CALL2:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP10]]) 2918 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0 2919 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 2920 // CHECK2: land.rhs: 2921 // CHECK2-NEXT: [[CALL3:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 2922 // CHECK2-NEXT: [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0 2923 // CHECK2-NEXT: br label [[LAND_END]] 2924 // CHECK2: land.end: 2925 // CHECK2-NEXT: [[TMP32:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 2926 // CHECK2-NEXT: [[CONV:%.*]] = zext i1 [[TMP32]] to i32 2927 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 [[CONV]]) 2928 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast %struct.S.4* [[TMP10]] to i8* 2929 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast %struct.S.4* [[REF_TMP]] to i8* 2930 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP33]], i8* align 4 [[TMP34]], i64 4, i1 false) 2931 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 2932 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP12]], align 128 2933 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[T_VAR1]], align 128 2934 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP35]], [[TMP36]] 2935 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2936 // CHECK2: cond.true: 2937 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP12]], align 128 2938 // CHECK2-NEXT: br label [[COND_END:%.*]] 2939 // CHECK2: cond.false: 2940 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[T_VAR1]], align 128 2941 // CHECK2-NEXT: br label [[COND_END]] 2942 // CHECK2: cond.end: 2943 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE]] ], [ [[TMP38]], [[COND_FALSE]] ] 2944 // CHECK2-NEXT: store i32 [[COND]], i32* [[TMP12]], align 128 2945 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2946 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2947 // CHECK2: .omp.reduction.case2: 2948 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[T_VAR]], align 128 2949 // CHECK2-NEXT: [[TMP40:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP39]] monotonic, align 4 2950 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2951 // CHECK2-NEXT: [[CALL5:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.4* @_ZN1SIiEanERKS0_(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP8]], %struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) 2952 // CHECK2-NEXT: [[TMP41:%.*]] = bitcast %struct.S.4* [[TMP8]] to i8* 2953 // CHECK2-NEXT: [[TMP42:%.*]] = bitcast %struct.S.4* [[CALL5]] to i8* 2954 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP41]], i8* align 4 [[TMP42]], i64 4, i1 false) 2955 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2956 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2957 // CHECK2-NEXT: [[CALL7:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP10]]) 2958 // CHECK2-NEXT: [[TOBOOL8:%.*]] = icmp ne i32 [[CALL7]], 0 2959 // CHECK2-NEXT: br i1 [[TOBOOL8]], label [[LAND_RHS9:%.*]], label [[LAND_END12:%.*]] 2960 // CHECK2: land.rhs9: 2961 // CHECK2-NEXT: [[CALL10:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) 2962 // CHECK2-NEXT: [[TOBOOL11:%.*]] = icmp ne i32 [[CALL10]], 0 2963 // CHECK2-NEXT: br label [[LAND_END12]] 2964 // CHECK2: land.end12: 2965 // CHECK2-NEXT: [[TMP43:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL11]], [[LAND_RHS9]] ] 2966 // CHECK2-NEXT: [[CONV13:%.*]] = zext i1 [[TMP43]] to i32 2967 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP6]], i32 [[CONV13]]) 2968 // CHECK2-NEXT: [[TMP44:%.*]] = bitcast %struct.S.4* [[TMP10]] to i8* 2969 // CHECK2-NEXT: [[TMP45:%.*]] = bitcast %struct.S.4* [[REF_TMP6]] to i8* 2970 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP44]], i8* align 4 [[TMP45]], i64 4, i1 false) 2971 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP6]]) #[[ATTR5]] 2972 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP25]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2973 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[T_VAR1]], align 128 2974 // CHECK2-NEXT: [[TMP47:%.*]] = atomicrmw min i32* [[TMP12]], i32 [[TMP46]] monotonic, align 4 2975 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2976 // CHECK2: .omp.reduction.default: 2977 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 2978 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 2979 // CHECK2-NEXT: ret void 2980 // 2981 // 2982 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.9 2983 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 2984 // CHECK2-NEXT: entry: 2985 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2986 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2987 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_4:%.*]], align 4 2988 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2989 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2990 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2991 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 2992 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2993 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 2994 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 2995 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2996 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2997 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 2998 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2999 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3000 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 3001 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3002 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S.4* 3003 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 3004 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 3005 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S.4* 3006 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 3007 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 3008 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S.4* 3009 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 3010 // CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 3011 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S.4* 3012 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 3013 // CHECK2-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 3014 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to i32* 3015 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 3016 // CHECK2-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 3017 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to i32* 3018 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP11]], align 128 3019 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP8]], align 128 3020 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 3021 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 3022 // CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(4) %struct.S.4* @_ZN1SIiEanERKS0_(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S.4* nonnull align 4 dereferenceable(4) [[TMP14]]) 3023 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast %struct.S.4* [[TMP17]] to i8* 3024 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast %struct.S.4* [[CALL]] to i8* 3025 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 3026 // CHECK2-NEXT: [[CALL2:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP23]]) 3027 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0 3028 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 3029 // CHECK2: land.rhs: 3030 // CHECK2-NEXT: [[CALL3:%.*]] = call i32 @_ZN1SIiEcviEv(%struct.S.4* nonnull align 4 dereferenceable(4) [[TMP20]]) 3031 // CHECK2-NEXT: [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0 3032 // CHECK2-NEXT: br label [[LAND_END]] 3033 // CHECK2: land.end: 3034 // CHECK2-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 3035 // CHECK2-NEXT: [[CONV:%.*]] = zext i1 [[TMP34]] to i32 3036 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 [[CONV]]) 3037 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast %struct.S.4* [[TMP23]] to i8* 3038 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast %struct.S.4* [[REF_TMP]] to i8* 3039 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 3040 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 3041 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP29]], align 128 3042 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP26]], align 128 3043 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP37]], [[TMP38]] 3044 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3045 // CHECK2: cond.true: 3046 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP29]], align 128 3047 // CHECK2-NEXT: br label [[COND_END:%.*]] 3048 // CHECK2: cond.false: 3049 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP26]], align 128 3050 // CHECK2-NEXT: br label [[COND_END]] 3051 // CHECK2: cond.end: 3052 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 3053 // CHECK2-NEXT: store i32 [[COND]], i32* [[TMP29]], align 128 3054 // CHECK2-NEXT: ret void 3055 // 3056 // 3057 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEanERKS0_ 3058 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.4* nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 3059 // CHECK2-NEXT: entry: 3060 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 3061 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct.S.4*, align 8 3062 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 3063 // CHECK2-NEXT: store %struct.S.4* [[TMP0]], %struct.S.4** [[DOTADDR]], align 8 3064 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 3065 // CHECK2-NEXT: ret %struct.S.4* [[THIS1]] 3066 // 3067 // 3068 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEcviEv 3069 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 3070 // CHECK2-NEXT: entry: 3071 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 3072 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 3073 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 3074 // CHECK2-NEXT: ret i32 0 3075 // 3076 // 3077 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 3078 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3079 // CHECK2-NEXT: entry: 3080 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 3081 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 3082 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 3083 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 3084 // CHECK2-NEXT: ret void 3085 // 3086 // 3087 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 3088 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3089 // CHECK2-NEXT: entry: 3090 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 3091 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 3092 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 3093 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_4:%.*]], %struct.S.4* [[THIS1]], i32 0, i32 0 3094 // CHECK2-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 3095 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 3096 // CHECK2-NEXT: ret void 3097 // 3098 // 3099 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 3100 // CHECK2-SAME: (%struct.SST* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3101 // CHECK2-NEXT: entry: 3102 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 3103 // CHECK2-NEXT: [[A2:%.*]] = alloca i32*, align 8 3104 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_6:%.*]], align 8 3105 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 3106 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 3107 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 3108 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 3109 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 3110 // CHECK2-NEXT: store i32* [[A3]], i32** [[A2]], align 8 3111 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3112 // CHECK2-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP0]], align 8 3113 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3114 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 3115 // CHECK2-NEXT: store i32* [[TMP2]], i32** [[TMP1]], align 8 3116 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.6*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.anon.6* [[OMP_OUTLINED_ARG_AGG_]]) 3117 // CHECK2-NEXT: ret void 3118 // 3119 // 3120 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 3121 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.6* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 3122 // CHECK2-NEXT: entry: 3123 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3124 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3125 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.6*, align 8 3126 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3127 // CHECK2-NEXT: [[A:%.*]] = alloca i32, align 4 3128 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3129 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 3130 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 3131 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 3132 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3133 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3134 // CHECK2-NEXT: store %struct.anon.6* [[__CONTEXT]], %struct.anon.6** [[__CONTEXT_ADDR]], align 8 3135 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.6*, %struct.anon.6** [[__CONTEXT_ADDR]], align 8 3136 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_6:%.*]], %struct.anon.6* [[TMP0]], i32 0, i32 0 3137 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.SST*, %struct.SST** [[TMP1]], align 8 3138 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_6]], %struct.anon.6* [[TMP0]], i32 0, i32 1 3139 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 3140 // CHECK2-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 3141 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP]], align 8 3142 // CHECK2-NEXT: store i32 1, i32* [[A]], align 4 3143 // CHECK2-NEXT: store i32* [[A]], i32** [[_TMP1]], align 8 3144 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8 3145 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3146 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 3147 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4 3148 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3149 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i32* [[A]] to i8* 3150 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 8 3151 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3152 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4 3153 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3154 // CHECK2-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], i32 1, i64 8, i8* [[TMP12]], void (i8*, i8*)* @.omp.reduction.reduction_func.11, [8 x i32]* @.gomp_critical_user_.reduction.var) 3155 // CHECK2-NEXT: switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3156 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3157 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3158 // CHECK2-NEXT: ] 3159 // CHECK2: .omp.reduction.case1: 3160 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP5]], align 4 3161 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[A]], align 4 3162 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], [[TMP15]] 3163 // CHECK2-NEXT: store i32 [[MUL]], i32* [[TMP5]], align 4 3164 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3165 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3166 // CHECK2: .omp.reduction.case2: 3167 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[A]], align 4 3168 // CHECK2-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP5]] monotonic, align 4 3169 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 3170 // CHECK2: atomic_cont: 3171 // CHECK2-NEXT: [[TMP17:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP22:%.*]], [[ATOMIC_CONT]] ] 3172 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[_TMP2]], align 4 3173 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[_TMP2]], align 4 3174 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[A]], align 4 3175 // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP18]], [[TMP19]] 3176 // CHECK2-NEXT: store i32 [[MUL3]], i32* [[ATOMIC_TEMP]], align 4 3177 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[ATOMIC_TEMP]], align 4 3178 // CHECK2-NEXT: [[TMP21:%.*]] = cmpxchg i32* [[TMP5]], i32 [[TMP17]], i32 [[TMP20]] monotonic monotonic, align 4 3179 // CHECK2-NEXT: [[TMP22]] = extractvalue { i32, i1 } [[TMP21]], 0 3180 // CHECK2-NEXT: [[TMP23:%.*]] = extractvalue { i32, i1 } [[TMP21]], 1 3181 // CHECK2-NEXT: br i1 [[TMP23]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 3182 // CHECK2: atomic_exit: 3183 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3184 // CHECK2: .omp.reduction.default: 3185 // CHECK2-NEXT: ret void 3186 // 3187 // 3188 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.11 3189 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 3190 // CHECK2-NEXT: entry: 3191 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3192 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3193 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3194 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3195 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3196 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3197 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3198 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3199 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3200 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3201 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3202 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 3203 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3204 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3205 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3206 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 3207 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]] 3208 // CHECK2-NEXT: store i32 [[MUL]], i32* [[TMP11]], align 4 3209 // CHECK2-NEXT: ret void 3210 // 3211 // 3212 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3213 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3214 // CHECK2-NEXT: entry: 3215 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 3216 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3217 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 3218 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3219 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 3220 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_4:%.*]], %struct.S.4* [[THIS1]], i32 0, i32 0 3221 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3222 // CHECK2-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 3223 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 3224 // CHECK2-NEXT: store i32 [[ADD]], i32* [[F]], align 4 3225 // CHECK2-NEXT: ret void 3226 // 3227 // 3228 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3229 // CHECK2-SAME: (%struct.S.4* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3230 // CHECK2-NEXT: entry: 3231 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.4*, align 8 3232 // CHECK2-NEXT: store %struct.S.4* [[THIS]], %struct.S.4** [[THIS_ADDR]], align 8 3233 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.4*, %struct.S.4** [[THIS_ADDR]], align 8 3234 // CHECK2-NEXT: ret void 3235 // 3236 // 3237 // CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 3238 // CHECK3-SAME: (i16* [[X:%.*]]) #[[ATTR0:[0-9]+]] { 3239 // CHECK3-NEXT: entry: 3240 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 3241 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 3242 // CHECK3-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 3243 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3244 // CHECK3-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3245 // CHECK3-NEXT: store i16* [[TMP1]], i16** [[TMP0]], align 8 3246 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 3247 // CHECK3-NEXT: ret void 3248 // 3249 // 3250 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 3251 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] { 3252 // CHECK3-NEXT: entry: 3253 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3254 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3255 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 3256 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3257 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3258 // CHECK3-NEXT: [[TMP:%.*]] = alloca i16*, align 8 3259 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 3260 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 3261 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 3262 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3263 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3264 // CHECK3-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 3265 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 3266 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 3267 // CHECK3-NEXT: [[TMP2:%.*]] = load i16*, i16** [[TMP1]], align 8 3268 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP2]], i64 0 3269 // CHECK3-NEXT: [[TMP3:%.*]] = load i16*, i16** [[TMP1]], align 8 3270 // CHECK3-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 0 3271 // CHECK3-NEXT: [[TMP4:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 3272 // CHECK3-NEXT: [[TMP5:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3273 // CHECK3-NEXT: [[TMP6:%.*]] = sub i64 [[TMP4]], [[TMP5]] 3274 // CHECK3-NEXT: [[TMP7:%.*]] = sdiv exact i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3275 // CHECK3-NEXT: [[TMP8:%.*]] = add nuw i64 [[TMP7]], 1 3276 // CHECK3-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3277 // CHECK3-NEXT: [[TMP10:%.*]] = call i8* @llvm.stacksave() 3278 // CHECK3-NEXT: store i8* [[TMP10]], i8** [[SAVED_STACK]], align 8 3279 // CHECK3-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP8]], align 16 3280 // CHECK3-NEXT: store i64 [[TMP8]], i64* [[__VLA_EXPR0]], align 8 3281 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP8]] 3282 // CHECK3-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP11]] 3283 // CHECK3-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 3284 // CHECK3: omp.arrayinit.body: 3285 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 3286 // CHECK3-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3287 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3288 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]] 3289 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 3290 // CHECK3: omp.arrayinit.done: 3291 // CHECK3-NEXT: [[TMP12:%.*]] = load i16*, i16** [[TMP1]], align 8 3292 // CHECK3-NEXT: [[TMP13:%.*]] = ptrtoint i16* [[TMP12]] to i64 3293 // CHECK3-NEXT: [[TMP14:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3294 // CHECK3-NEXT: [[TMP15:%.*]] = sub i64 [[TMP13]], [[TMP14]] 3295 // CHECK3-NEXT: [[TMP16:%.*]] = sdiv exact i64 [[TMP15]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3296 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP16]] 3297 // CHECK3-NEXT: store i16* [[TMP17]], i16** [[TMP]], align 8 3298 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3299 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i16* [[VLA]] to i8* 3300 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 3301 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3302 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP8]] to i8* 3303 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 3304 // CHECK3-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3305 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 3306 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3307 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP23]], i32 1, i64 16, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 3308 // CHECK3-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3309 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3310 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3311 // CHECK3-NEXT: ] 3312 // CHECK3: .omp.reduction.case1: 3313 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 3314 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP26]] 3315 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3316 // CHECK3: omp.arraycpy.body: 3317 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3318 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3319 // CHECK3-NEXT: [[TMP27:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3320 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP27]] to i32 3321 // CHECK3-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 3322 // CHECK3-NEXT: [[CONV3:%.*]] = sext i16 [[TMP28]] to i32 3323 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 3324 // CHECK3-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 3325 // CHECK3-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3326 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 3327 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3328 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP26]] 3329 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 3330 // CHECK3: omp.arraycpy.done7: 3331 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3332 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3333 // CHECK3: .omp.reduction.case2: 3334 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 3335 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP29]] 3336 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 3337 // CHECK3: omp.arraycpy.body9: 3338 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 3339 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 3340 // CHECK3-NEXT: [[TMP30:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3341 // CHECK3-NEXT: [[CONV12:%.*]] = sext i16 [[TMP30]] to i32 3342 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 3343 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 3344 // CHECK3: atomic_cont: 3345 // CHECK3-NEXT: [[TMP31:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP36:%.*]], [[ATOMIC_CONT]] ] 3346 // CHECK3-NEXT: store i16 [[TMP31]], i16* [[_TMP13]], align 2 3347 // CHECK3-NEXT: [[TMP32:%.*]] = load i16, i16* [[_TMP13]], align 2 3348 // CHECK3-NEXT: [[CONV14:%.*]] = sext i16 [[TMP32]] to i32 3349 // CHECK3-NEXT: [[TMP33:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3350 // CHECK3-NEXT: [[CONV15:%.*]] = sext i16 [[TMP33]] to i32 3351 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 3352 // CHECK3-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 3353 // CHECK3-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 3354 // CHECK3-NEXT: [[TMP34:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 3355 // CHECK3-NEXT: [[TMP35:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP31]], i16 [[TMP34]] monotonic monotonic, align 2 3356 // CHECK3-NEXT: [[TMP36]] = extractvalue { i16, i1 } [[TMP35]], 0 3357 // CHECK3-NEXT: [[TMP37:%.*]] = extractvalue { i16, i1 } [[TMP35]], 1 3358 // CHECK3-NEXT: br i1 [[TMP37]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 3359 // CHECK3: atomic_exit: 3360 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 3361 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 3362 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP29]] 3363 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 3364 // CHECK3: omp.arraycpy.done21: 3365 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3366 // CHECK3: .omp.reduction.default: 3367 // CHECK3-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3368 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 3369 // CHECK3-NEXT: ret void 3370 // 3371 // 3372 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 3373 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 3374 // CHECK3-NEXT: entry: 3375 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3376 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3377 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3378 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3379 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3380 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 3381 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3382 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 3383 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 3384 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3385 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 3386 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 3387 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3388 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 3389 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 3390 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3391 // CHECK3-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 3392 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 3393 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 3394 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3395 // CHECK3: omp.arraycpy.body: 3396 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3397 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3398 // CHECK3-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3399 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 3400 // CHECK3-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 3401 // CHECK3-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 3402 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 3403 // CHECK3-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 3404 // CHECK3-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3405 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3406 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3407 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 3408 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 3409 // CHECK3: omp.arraycpy.done4: 3410 // CHECK3-NEXT: ret void 3411 // 3412 // 3413 // CHECK3-LABEL: define {{[^@]+}}@main 3414 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] { 3415 // CHECK3-NEXT: entry: 3416 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3417 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 3418 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 3419 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 3420 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @sivar) 3421 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 3422 // CHECK3-NEXT: ret i32 0 3423 // 3424 // 3425 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3426 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 { 3427 // CHECK3-NEXT: entry: 3428 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3429 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3430 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3431 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3432 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3433 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3434 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 3435 // CHECK3-NEXT: ret void 3436 // 3437 // 3438 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 3439 // CHECK3-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3440 // CHECK3-NEXT: entry: 3441 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3442 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3443 // CHECK3-NEXT: [[A2:%.*]] = alloca i32*, align 8 3444 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4 3445 // CHECK3-NEXT: [[C5:%.*]] = alloca i32*, align 8 3446 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 3447 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3448 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3449 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3450 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3451 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8 3452 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3453 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 3454 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3455 // CHECK3-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 3456 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3457 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3458 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 3459 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3460 // CHECK3-NEXT: store i32* [[A3]], i32** [[A2]], align 8 3461 // CHECK3-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3462 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 3463 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 3464 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3465 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 3466 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3467 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 3468 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[TMP3]], align 8 3469 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3470 // CHECK3-NEXT: store i32* [[B4]], i32** [[TMP5]], align 8 3471 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3472 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[C5]], align 8 3473 // CHECK3-NEXT: store i32* [[TMP7]], i32** [[TMP6]], align 8 3474 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 3475 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 3476 // CHECK3-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3477 // CHECK3-NEXT: [[TMP9:%.*]] = trunc i32 [[TMP8]] to i8 3478 // CHECK3-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 3479 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP9]], 15 3480 // CHECK3-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 3481 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 3482 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B7]], align 4 3483 // CHECK3-NEXT: ret void 3484 // 3485 // 3486 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 3487 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 3488 // CHECK3-NEXT: entry: 3489 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3490 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3491 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 3492 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3493 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3494 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 3495 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 3496 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 3497 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 3498 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 3499 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 3500 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 3501 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3502 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3503 // CHECK3-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 3504 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 3505 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 3506 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 3507 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 1 3508 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 3509 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 2 3510 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 3511 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[TMP0]], i32 0, i32 3 3512 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8 3513 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 3514 // CHECK3-NEXT: store i32* [[TMP8]], i32** [[_TMP1]], align 8 3515 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 3516 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4 3517 // CHECK3-NEXT: store i32* [[A]], i32** [[_TMP2]], align 8 3518 // CHECK3-NEXT: store i32 0, i32* [[B]], align 4 3519 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP1]], align 8 3520 // CHECK3-NEXT: store i32 0, i32* [[C]], align 4 3521 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP3]], align 8 3522 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 3523 // CHECK3-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[TMP11]], align 8 3524 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1 3525 // CHECK3-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP2]], align 8 3526 // CHECK3-NEXT: store i32* [[TMP13]], i32** [[TMP12]], align 8 3527 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 2 3528 // CHECK3-NEXT: store i32* [[B]], i32** [[TMP14]], align 8 3529 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 3 3530 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[_TMP3]], align 8 3531 // CHECK3-NEXT: store i32* [[TMP16]], i32** [[TMP15]], align 8 3532 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.1* nonnull align 8 dereferenceable(32) [[REF_TMP]]) 3533 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3534 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast i32* [[A]] to i8* 3535 // CHECK3-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8 3536 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3537 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32* [[B]] to i8* 3538 // CHECK3-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8 3539 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 3540 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast i32* [[C]] to i8* 3541 // CHECK3-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8 3542 // CHECK3-NEXT: [[TMP23:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3543 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP23]], align 4 3544 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3545 // CHECK3-NEXT: [[TMP26:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]], i32 3, i64 24, i8* [[TMP25]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 3546 // CHECK3-NEXT: switch i32 [[TMP26]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3547 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3548 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3549 // CHECK3-NEXT: ] 3550 // CHECK3: .omp.reduction.case1: 3551 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP9]], align 4 3552 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[A]], align 4 3553 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 3554 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP9]], align 4 3555 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP6]], align 4 3556 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[B]], align 4 3557 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] 3558 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[TMP6]], align 4 3559 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP10]], align 4 3560 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[C]], align 4 3561 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] 3562 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP10]], align 4 3563 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP24]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3564 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3565 // CHECK3: .omp.reduction.case2: 3566 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[A]], align 4 3567 // CHECK3-NEXT: [[TMP34:%.*]] = atomicrmw add i32* [[TMP9]], i32 [[TMP33]] monotonic, align 4 3568 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[B]], align 4 3569 // CHECK3-NEXT: [[TMP36:%.*]] = atomicrmw add i32* [[TMP6]], i32 [[TMP35]] monotonic, align 4 3570 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[C]], align 4 3571 // CHECK3-NEXT: [[TMP38:%.*]] = atomicrmw add i32* [[TMP10]], i32 [[TMP37]] monotonic, align 4 3572 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3573 // CHECK3: .omp.reduction.default: 3574 // CHECK3-NEXT: ret void 3575 // 3576 // 3577 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 3578 // CHECK3-SAME: (%class.anon.1* nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR0]] align 2 { 3579 // CHECK3-NEXT: entry: 3580 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.1*, align 8 3581 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 3582 // CHECK3-NEXT: store %class.anon.1* [[THIS]], %class.anon.1** [[THIS_ADDR]], align 8 3583 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.1*, %class.anon.1** [[THIS_ADDR]], align 8 3584 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1:%.*]], %class.anon.1* [[THIS1]], i32 0, i32 0 3585 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 3586 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1 3587 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 3588 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3589 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 3590 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 3591 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 2 3592 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 3593 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3594 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 3595 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 3596 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 3 3597 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 3598 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3599 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 3600 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 3601 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3602 // CHECK3-NEXT: store %struct.SS* [[TMP1]], %struct.SS** [[TMP11]], align 8 3603 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 3604 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 1 3605 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8 3606 // CHECK3-NEXT: store i32* [[TMP14]], i32** [[TMP12]], align 8 3607 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 3608 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 2 3609 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[TMP16]], align 8 3610 // CHECK3-NEXT: store i32* [[TMP17]], i32** [[TMP15]], align 8 3611 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 3612 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[THIS1]], i32 0, i32 3 3613 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[TMP19]], align 8 3614 // CHECK3-NEXT: store i32* [[TMP20]], i32** [[TMP18]], align 8 3615 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 3616 // CHECK3-NEXT: ret void 3617 // 3618 // 3619 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 3620 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 3621 // CHECK3-NEXT: entry: 3622 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3623 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3624 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3625 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3626 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3627 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 3628 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3629 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 3630 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 3631 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3632 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3633 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 3634 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3635 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3636 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 3637 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3638 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 3639 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 3640 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 3641 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 3642 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 3643 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 3644 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 3645 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 3646 // CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 3647 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 3648 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 3649 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 3650 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 3651 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 3652 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 3653 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 3654 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 3655 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 3656 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 3657 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 3658 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 3659 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 3660 // CHECK3-NEXT: ret void 3661 // 3662 // 3663 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 3664 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 3665 // CHECK3-NEXT: entry: 3666 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3667 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3668 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 3669 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3670 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3671 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4 3672 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 3673 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4 3674 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4 3675 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 3676 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 3677 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3678 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3679 // CHECK3-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 3680 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 3681 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 3682 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 3683 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 3684 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 3685 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 3686 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 3687 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 3688 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8 3689 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 3690 // CHECK3-NEXT: store i32* [[TMP8]], i32** [[_TMP1]], align 8 3691 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 3692 // CHECK3-NEXT: store i32 -1, i32* [[A]], align 4 3693 // CHECK3-NEXT: store i32* [[A]], i32** [[_TMP2]], align 8 3694 // CHECK3-NEXT: store i32 -1, i32* [[B]], align 4 3695 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP1]], align 8 3696 // CHECK3-NEXT: store i32 -1, i32* [[C]], align 4 3697 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP3]], align 8 3698 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8 3699 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3700 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 3701 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP11]], align 4 3702 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[B]], align 4 3703 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP13]], -1 3704 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B]], align 4 3705 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP3]], align 8 3706 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 3707 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP15]], 1 3708 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP14]], align 4 3709 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3710 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[A]] to i8* 3711 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 3712 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3713 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i32* [[B]] to i8* 3714 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 3715 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 3716 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i32* [[C]] to i8* 3717 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 3718 // CHECK3-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3719 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 3720 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3721 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], i32 3, i64 24, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func.4, [8 x i32]* @.gomp_critical_user_.reduction.var) 3722 // CHECK3-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3723 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3724 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3725 // CHECK3-NEXT: ] 3726 // CHECK3: .omp.reduction.case1: 3727 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP9]], align 4 3728 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[A]], align 4 3729 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP26]], [[TMP27]] 3730 // CHECK3-NEXT: store i32 [[AND]], i32* [[TMP9]], align 4 3731 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP6]], align 4 3732 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[B]], align 4 3733 // CHECK3-NEXT: [[AND4:%.*]] = and i32 [[TMP28]], [[TMP29]] 3734 // CHECK3-NEXT: store i32 [[AND4]], i32* [[TMP6]], align 4 3735 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP10]], align 4 3736 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[C]], align 4 3737 // CHECK3-NEXT: [[AND5:%.*]] = and i32 [[TMP30]], [[TMP31]] 3738 // CHECK3-NEXT: store i32 [[AND5]], i32* [[TMP10]], align 4 3739 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3740 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3741 // CHECK3: .omp.reduction.case2: 3742 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[A]], align 4 3743 // CHECK3-NEXT: [[TMP33:%.*]] = atomicrmw and i32* [[TMP9]], i32 [[TMP32]] monotonic, align 4 3744 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[B]], align 4 3745 // CHECK3-NEXT: [[TMP35:%.*]] = atomicrmw and i32* [[TMP6]], i32 [[TMP34]] monotonic, align 4 3746 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[C]], align 4 3747 // CHECK3-NEXT: [[TMP37:%.*]] = atomicrmw and i32* [[TMP10]], i32 [[TMP36]] monotonic, align 4 3748 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3749 // CHECK3: .omp.reduction.default: 3750 // CHECK3-NEXT: ret void 3751 // 3752 // 3753 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.4 3754 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 3755 // CHECK3-NEXT: entry: 3756 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3757 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3758 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3759 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3760 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3761 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 3762 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3763 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 3764 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 3765 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3766 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3767 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 3768 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3769 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3770 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 3771 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3772 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 3773 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 3774 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 3775 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 3776 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 3777 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 3778 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 3779 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 3780 // CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 3781 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 3782 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 3783 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 3784 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP24]], [[TMP25]] 3785 // CHECK3-NEXT: store i32 [[AND]], i32* [[TMP11]], align 4 3786 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 3787 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 3788 // CHECK3-NEXT: [[AND2:%.*]] = and i32 [[TMP26]], [[TMP27]] 3789 // CHECK3-NEXT: store i32 [[AND2]], i32* [[TMP17]], align 4 3790 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 3791 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 3792 // CHECK3-NEXT: [[AND3:%.*]] = and i32 [[TMP28]], [[TMP29]] 3793 // CHECK3-NEXT: store i32 [[AND3]], i32* [[TMP23]], align 4 3794 // CHECK3-NEXT: ret void 3795 // 3796 // 3797 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5 3798 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.3* noalias [[__CONTEXT:%.*]]) #[[ATTR1]] { 3799 // CHECK3-NEXT: entry: 3800 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3801 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3802 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.3*, align 8 3803 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128 3804 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_4:%.*]], align 8 3805 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 3806 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3807 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3808 // CHECK3-NEXT: store %struct.anon.3* [[__CONTEXT]], %struct.anon.3** [[__CONTEXT_ADDR]], align 8 3809 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.3*, %struct.anon.3** [[__CONTEXT_ADDR]], align 8 3810 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_3:%.*]], %struct.anon.3* [[TMP0]], i32 0, i32 0 3811 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 3812 // CHECK3-NEXT: store i32 0, i32* [[G]], align 128 3813 // CHECK3-NEXT: store i32 1, i32* [[G]], align 128 3814 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 3815 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP3]], align 8 3816 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.4* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 3817 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3818 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i32* [[G]] to i8* 3819 // CHECK3-NEXT: store i8* [[TMP5]], i8** [[TMP4]], align 8 3820 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3821 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3822 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3823 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 1, i64 8, i8* [[TMP8]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 3824 // CHECK3-NEXT: switch i32 [[TMP9]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3825 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3826 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3827 // CHECK3-NEXT: ] 3828 // CHECK3: .omp.reduction.case1: 3829 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP2]], align 128 3830 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[G]], align 128 3831 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3832 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP2]], align 128 3833 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3834 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3835 // CHECK3: .omp.reduction.case2: 3836 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[G]], align 128 3837 // CHECK3-NEXT: [[TMP13:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP12]] monotonic, align 4 3838 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3839 // CHECK3: .omp.reduction.default: 3840 // CHECK3-NEXT: ret void 3841 // 3842 // 3843 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 3844 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 3845 // CHECK3-NEXT: entry: 3846 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3847 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3848 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3849 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3850 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3851 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3852 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3853 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3854 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3855 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3856 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3857 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 3858 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3859 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3860 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 128 3861 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 128 3862 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3863 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 3864 // CHECK3-NEXT: ret void 3865 // 3866 // 3867 // CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 3868 // CHECK4-SAME: (i16* [[X:%.*]]) #[[ATTR1:[0-9]+]] { 3869 // CHECK4-NEXT: entry: 3870 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 3871 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 3872 // CHECK4-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 3873 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 3874 // CHECK4-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3875 // CHECK4-NEXT: store i16* [[TMP1]], i16** [[TMP0]], align 8 3876 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 3877 // CHECK4-NEXT: ret void 3878 // 3879 // 3880 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 3881 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 3882 // CHECK4-NEXT: entry: 3883 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3884 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3885 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 3886 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3887 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3888 // CHECK4-NEXT: [[TMP:%.*]] = alloca i16*, align 8 3889 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 3890 // CHECK4-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 3891 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 3892 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3893 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3894 // CHECK4-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 3895 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 3896 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 3897 // CHECK4-NEXT: [[TMP2:%.*]] = load i16*, i16** [[TMP1]], align 8 3898 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP2]], i64 0 3899 // CHECK4-NEXT: [[TMP3:%.*]] = load i16*, i16** [[TMP1]], align 8 3900 // CHECK4-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP3]], i64 0 3901 // CHECK4-NEXT: [[TMP4:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 3902 // CHECK4-NEXT: [[TMP5:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3903 // CHECK4-NEXT: [[TMP6:%.*]] = sub i64 [[TMP4]], [[TMP5]] 3904 // CHECK4-NEXT: [[TMP7:%.*]] = sdiv exact i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3905 // CHECK4-NEXT: [[TMP8:%.*]] = add nuw i64 [[TMP7]], 1 3906 // CHECK4-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP8]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3907 // CHECK4-NEXT: [[TMP10:%.*]] = call i8* @llvm.stacksave() 3908 // CHECK4-NEXT: store i8* [[TMP10]], i8** [[SAVED_STACK]], align 8 3909 // CHECK4-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP8]], align 16 3910 // CHECK4-NEXT: store i64 [[TMP8]], i64* [[__VLA_EXPR0]], align 8 3911 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP8]] 3912 // CHECK4-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP11]] 3913 // CHECK4-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 3914 // CHECK4: omp.arrayinit.body: 3915 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 3916 // CHECK4-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3917 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3918 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]] 3919 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 3920 // CHECK4: omp.arrayinit.done: 3921 // CHECK4-NEXT: [[TMP12:%.*]] = load i16*, i16** [[TMP1]], align 8 3922 // CHECK4-NEXT: [[TMP13:%.*]] = ptrtoint i16* [[TMP12]] to i64 3923 // CHECK4-NEXT: [[TMP14:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3924 // CHECK4-NEXT: [[TMP15:%.*]] = sub i64 [[TMP13]], [[TMP14]] 3925 // CHECK4-NEXT: [[TMP16:%.*]] = sdiv exact i64 [[TMP15]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3926 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP16]] 3927 // CHECK4-NEXT: store i16* [[TMP17]], i16** [[TMP]], align 8 3928 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3929 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i16* [[VLA]] to i8* 3930 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 3931 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3932 // CHECK4-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP8]] to i8* 3933 // CHECK4-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 3934 // CHECK4-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3935 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 3936 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3937 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP23]], i32 1, i64 16, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 3938 // CHECK4-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3939 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3940 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3941 // CHECK4-NEXT: ] 3942 // CHECK4: .omp.reduction.case1: 3943 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 3944 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP26]] 3945 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3946 // CHECK4: omp.arraycpy.body: 3947 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3948 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3949 // CHECK4-NEXT: [[TMP27:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3950 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP27]] to i32 3951 // CHECK4-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 3952 // CHECK4-NEXT: [[CONV3:%.*]] = sext i16 [[TMP28]] to i32 3953 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 3954 // CHECK4-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 3955 // CHECK4-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3956 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 3957 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3958 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP26]] 3959 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 3960 // CHECK4: omp.arraycpy.done7: 3961 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3962 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3963 // CHECK4: .omp.reduction.case2: 3964 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP8]] 3965 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP29]] 3966 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 3967 // CHECK4: omp.arraycpy.body9: 3968 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 3969 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 3970 // CHECK4-NEXT: [[TMP30:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3971 // CHECK4-NEXT: [[CONV12:%.*]] = sext i16 [[TMP30]] to i32 3972 // CHECK4-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 3973 // CHECK4-NEXT: br label [[ATOMIC_CONT:%.*]] 3974 // CHECK4: atomic_cont: 3975 // CHECK4-NEXT: [[TMP31:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP36:%.*]], [[ATOMIC_CONT]] ] 3976 // CHECK4-NEXT: store i16 [[TMP31]], i16* [[_TMP13]], align 2 3977 // CHECK4-NEXT: [[TMP32:%.*]] = load i16, i16* [[_TMP13]], align 2 3978 // CHECK4-NEXT: [[CONV14:%.*]] = sext i16 [[TMP32]] to i32 3979 // CHECK4-NEXT: [[TMP33:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3980 // CHECK4-NEXT: [[CONV15:%.*]] = sext i16 [[TMP33]] to i32 3981 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 3982 // CHECK4-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 3983 // CHECK4-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 3984 // CHECK4-NEXT: [[TMP34:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 3985 // CHECK4-NEXT: [[TMP35:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP31]], i16 [[TMP34]] monotonic monotonic, align 2 3986 // CHECK4-NEXT: [[TMP36]] = extractvalue { i16, i1 } [[TMP35]], 0 3987 // CHECK4-NEXT: [[TMP37:%.*]] = extractvalue { i16, i1 } [[TMP35]], 1 3988 // CHECK4-NEXT: br i1 [[TMP37]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 3989 // CHECK4: atomic_exit: 3990 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 3991 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 3992 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP29]] 3993 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 3994 // CHECK4: omp.arraycpy.done21: 3995 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3996 // CHECK4: .omp.reduction.default: 3997 // CHECK4-NEXT: [[TMP38:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3998 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP38]]) 3999 // CHECK4-NEXT: ret void 4000 // 4001 // 4002 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 4003 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 4004 // CHECK4-NEXT: entry: 4005 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4006 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 4007 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4008 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 4009 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 4010 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 4011 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 4012 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 4013 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 4014 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 4015 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 4016 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 4017 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 4018 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 4019 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 4020 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 4021 // CHECK4-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 4022 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 4023 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 4024 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 4025 // CHECK4: omp.arraycpy.body: 4026 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4027 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 4028 // CHECK4-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 4029 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 4030 // CHECK4-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 4031 // CHECK4-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 4032 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 4033 // CHECK4-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 4034 // CHECK4-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 4035 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 4036 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 4037 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 4038 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 4039 // CHECK4: omp.arraycpy.done4: 4040 // CHECK4-NEXT: ret void 4041 // 4042 // 4043 // CHECK4-LABEL: define {{[^@]+}}@main 4044 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] { 4045 // CHECK4-NEXT: entry: 4046 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4047 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 4048 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 4049 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[SS]], i32* nonnull align 4 dereferenceable(4) @sivar) 4050 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 4051 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 4052 // CHECK4-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 4053 // CHECK4-NEXT: ret i32 0 4054 // 4055 // 4056 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 4057 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 4058 // CHECK4-NEXT: entry: 4059 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4060 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 4061 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4062 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 4063 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4064 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 4065 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* nonnull align 8 dereferenceable(16) [[THIS1]], i32* nonnull align 4 dereferenceable(4) [[TMP0]]) 4066 // CHECK4-NEXT: ret void 4067 // 4068 // 4069 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 4070 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] { 4071 // CHECK4-NEXT: entry: 4072 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 4073 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 4074 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 8 4075 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 4076 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 4077 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 4078 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4079 // CHECK4-NEXT: store i32* @g, i32** [[TMP0]], align 8 4080 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.0* [[OMP_OUTLINED_ARG_AGG_]]) 4081 // CHECK4-NEXT: ret void 4082 // 4083 // 4084 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 4085 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.0* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4086 // CHECK4-NEXT: entry: 4087 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4088 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4089 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.0*, align 8 4090 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 128 4091 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, align 128 4092 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 4093 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4094 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4095 // CHECK4-NEXT: store %struct.anon.0* [[__CONTEXT]], %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4096 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR]], align 8 4097 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], %struct.anon.0* [[TMP0]], i32 0, i32 0 4098 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 4099 // CHECK4-NEXT: store i32 0, i32* [[G]], align 128 4100 // CHECK4-NEXT: store i32 1, i32* [[G]], align 128 4101 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 0 4102 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 4103 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 1 4104 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 4105 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 2 4106 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 4107 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 3 4108 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16 4109 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 4 4110 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.2 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 4111 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 6 4112 // CHECK4-NEXT: [[TMP3:%.*]] = load volatile i32, i32* [[G]], align 128 4113 // CHECK4-NEXT: store volatile i32 [[TMP3]], i32* [[BLOCK_CAPTURED]], align 128 4114 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]] to void ()* 4115 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP4]] to %struct.__block_literal_generic* 4116 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 4117 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 4118 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP5]], align 8 4119 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to void (i8*)* 4120 // CHECK4-NEXT: call void [[TMP8]](i8* [[TMP6]]) 4121 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 4122 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i32* [[G]] to i8* 4123 // CHECK4-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8 4124 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4125 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 4126 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 4127 // CHECK4-NEXT: [[TMP14:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 1, i64 8, i8* [[TMP13]], void (i8*, i8*)* @.omp.reduction.reduction_func.3, [8 x i32]* @.gomp_critical_user_.reduction.var) 4128 // CHECK4-NEXT: switch i32 [[TMP14]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4129 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4130 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4131 // CHECK4-NEXT: ] 4132 // CHECK4: .omp.reduction.case1: 4133 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP2]], align 128 4134 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[G]], align 128 4135 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] 4136 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP2]], align 128 4137 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], [8 x i32]* @.gomp_critical_user_.reduction.var) 4138 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4139 // CHECK4: .omp.reduction.case2: 4140 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[G]], align 128 4141 // CHECK4-NEXT: [[TMP18:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP17]] monotonic, align 4 4142 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4143 // CHECK4: .omp.reduction.default: 4144 // CHECK4-NEXT: ret void 4145 // 4146 // 4147 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke 4148 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] { 4149 // CHECK4-NEXT: entry: 4150 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 4151 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>*, align 8 4152 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 4153 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* 4154 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>** [[BLOCK_ADDR]], align 8 4155 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 6 4156 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 4157 // CHECK4-NEXT: ret void 4158 // 4159 // 4160 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.3 4161 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4]] { 4162 // CHECK4-NEXT: entry: 4163 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4164 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 4165 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4166 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 4167 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 4168 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 4169 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 4170 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 4171 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 4172 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 4173 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 4174 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 4175 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 4176 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 4177 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 128 4178 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 128 4179 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4180 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 4181 // CHECK4-NEXT: ret void 4182 // 4183 // 4184 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 4185 // CHECK4-SAME: (%struct.SS* nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 4186 // CHECK4-NEXT: entry: 4187 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4188 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 4189 // CHECK4-NEXT: [[A2:%.*]] = alloca i32*, align 8 4190 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4 4191 // CHECK4-NEXT: [[C5:%.*]] = alloca i32*, align 8 4192 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 4193 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4194 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 4195 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4196 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4197 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8 4198 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4199 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 4200 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 4201 // CHECK4-NEXT: store i8 [[BF_CLEAR]], i8* [[B]], align 4 4202 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4203 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 4204 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 4205 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4206 // CHECK4-NEXT: store i32* [[A3]], i32** [[A2]], align 8 4207 // CHECK4-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4208 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 4209 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 4210 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4211 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8 4212 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4213 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A2]], align 8 4214 // CHECK4-NEXT: store i32* [[TMP4]], i32** [[TMP3]], align 8 4215 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4216 // CHECK4-NEXT: store i32* [[B4]], i32** [[TMP5]], align 8 4217 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4218 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[C5]], align 8 4219 // CHECK4-NEXT: store i32* [[TMP7]], i32** [[TMP6]], align 8 4220 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 4221 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 4222 // CHECK4-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4223 // CHECK4-NEXT: [[TMP9:%.*]] = trunc i32 [[TMP8]] to i8 4224 // CHECK4-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 4225 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP9]], 15 4226 // CHECK4-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 4227 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 4228 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B7]], align 4 4229 // CHECK4-NEXT: ret void 4230 // 4231 // 4232 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4 4233 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4234 // CHECK4-NEXT: entry: 4235 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4236 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4237 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 4238 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 4239 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 4240 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 4241 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 4242 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 4243 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 4244 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 4245 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 4246 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 4247 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4248 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4249 // CHECK4-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 4250 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 4251 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 4252 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 4253 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 4254 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 4255 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 2 4256 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 4257 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 3 4258 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8 4259 // CHECK4-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 4260 // CHECK4-NEXT: store i32* [[TMP8]], i32** [[_TMP1]], align 8 4261 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 4262 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 4263 // CHECK4-NEXT: store i32* [[A]], i32** [[_TMP2]], align 8 4264 // CHECK4-NEXT: store i32 0, i32* [[B]], align 4 4265 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP1]], align 8 4266 // CHECK4-NEXT: store i32 0, i32* [[C]], align 4 4267 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP3]], align 8 4268 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 4269 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 4270 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 4271 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 4272 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 4273 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 4274 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 4275 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 4276 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 4277 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.7 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 4278 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 4279 // CHECK4-NEXT: store %struct.SS* [[TMP2]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 4280 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4281 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8 4282 // CHECK4-NEXT: store i32* [[TMP11]], i32** [[BLOCK_CAPTURED]], align 8 4283 // CHECK4-NEXT: [[BLOCK_CAPTURED4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4284 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[B]], align 4 4285 // CHECK4-NEXT: store i32 [[TMP12]], i32* [[BLOCK_CAPTURED4]], align 8 4286 // CHECK4-NEXT: [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4287 // CHECK4-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP3]], align 8 4288 // CHECK4-NEXT: store i32* [[TMP13]], i32** [[BLOCK_CAPTURED5]], align 8 4289 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 4290 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP14]] to %struct.__block_literal_generic* 4291 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 4292 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 4293 // CHECK4-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP15]], align 8 4294 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to void (i8*)* 4295 // CHECK4-NEXT: call void [[TMP18]](i8* [[TMP16]]) 4296 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 4297 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i32* [[A]] to i8* 4298 // CHECK4-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8 4299 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 4300 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast i32* [[B]] to i8* 4301 // CHECK4-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8 4302 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 4303 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast i32* [[C]] to i8* 4304 // CHECK4-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8 4305 // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4306 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4 4307 // CHECK4-NEXT: [[TMP27:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 4308 // CHECK4-NEXT: [[TMP28:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]], i32 3, i64 24, i8* [[TMP27]], void (i8*, i8*)* @.omp.reduction.reduction_func.8, [8 x i32]* @.gomp_critical_user_.reduction.var) 4309 // CHECK4-NEXT: switch i32 [[TMP28]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4310 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4311 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4312 // CHECK4-NEXT: ] 4313 // CHECK4: .omp.reduction.case1: 4314 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP9]], align 4 4315 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[A]], align 4 4316 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] 4317 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP9]], align 4 4318 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP6]], align 4 4319 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[B]], align 4 4320 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] 4321 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[TMP6]], align 4 4322 // CHECK4-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP10]], align 4 4323 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[C]], align 4 4324 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] 4325 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[TMP10]], align 4 4326 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]], [8 x i32]* @.gomp_critical_user_.reduction.var) 4327 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4328 // CHECK4: .omp.reduction.case2: 4329 // CHECK4-NEXT: [[TMP35:%.*]] = load i32, i32* [[A]], align 4 4330 // CHECK4-NEXT: [[TMP36:%.*]] = atomicrmw add i32* [[TMP9]], i32 [[TMP35]] monotonic, align 4 4331 // CHECK4-NEXT: [[TMP37:%.*]] = load i32, i32* [[B]], align 4 4332 // CHECK4-NEXT: [[TMP38:%.*]] = atomicrmw add i32* [[TMP6]], i32 [[TMP37]] monotonic, align 4 4333 // CHECK4-NEXT: [[TMP39:%.*]] = load i32, i32* [[C]], align 4 4334 // CHECK4-NEXT: [[TMP40:%.*]] = atomicrmw add i32* [[TMP10]], i32 [[TMP39]] monotonic, align 4 4335 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4336 // CHECK4: .omp.reduction.default: 4337 // CHECK4-NEXT: ret void 4338 // 4339 // 4340 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2 4341 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] { 4342 // CHECK4-NEXT: entry: 4343 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 4344 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 4345 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 4346 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 4347 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 4348 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 4349 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 4350 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 4351 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4352 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 4353 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4354 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 4355 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 4356 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4357 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 4358 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 4359 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 4360 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4361 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 4362 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4363 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 4364 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 4365 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 4366 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[TMP5]], align 8 4367 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 4368 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4369 // CHECK4-NEXT: [[TMP7:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8 4370 // CHECK4-NEXT: store i32* [[TMP7]], i32** [[TMP6]], align 8 4371 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 4372 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4373 // CHECK4-NEXT: store i32* [[BLOCK_CAPTURE_ADDR4]], i32** [[TMP8]], align 8 4374 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 3 4375 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4376 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8 4377 // CHECK4-NEXT: store i32* [[TMP10]], i32** [[TMP9]], align 8 4378 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.2*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.2* [[OMP_OUTLINED_ARG_AGG_]]) 4379 // CHECK4-NEXT: ret void 4380 // 4381 // 4382 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5 4383 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.2* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 4384 // CHECK4-NEXT: entry: 4385 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4386 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4387 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.2*, align 8 4388 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 4389 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 4390 // CHECK4-NEXT: [[A:%.*]] = alloca i32, align 4 4391 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 4392 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4 4393 // CHECK4-NEXT: [[C:%.*]] = alloca i32, align 4 4394 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 4395 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 4396 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4397 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4398 // CHECK4-NEXT: store %struct.anon.2* [[__CONTEXT]], %struct.anon.2** [[__CONTEXT_ADDR]], align 8 4399 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR]], align 8 4400 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP0]], i32 0, i32 0 4401 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[TMP1]], align 8 4402 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 1 4403 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 4404 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 2 4405 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 4406 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP0]], i32 0, i32 3 4407 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[TMP7]], align 8 4408 // CHECK4-NEXT: store i32* [[TMP4]], i32** [[TMP]], align 8 4409 // CHECK4-NEXT: store i32* [[TMP8]], i32** [[_TMP1]], align 8 4410 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP]], align 8 4411 // CHECK4-NEXT: store i32 0, i32* [[A]], align 4 4412 // CHECK4-NEXT: store i32* [[A]], i32** [[_TMP2]], align 8 4413 // CHECK4-NEXT: store i32 0, i32* [[B]], align 4 4414 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP1]], align 8 4415 // CHECK4-NEXT: store i32 0, i32* [[C]], align 4 4416 // CHECK4-NEXT: store i32* [[C]], i32** [[_TMP3]], align 8 4417 // CHECK4-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP2]], align 8 4418 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 4419 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP12]], 1 4420 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP11]], align 4 4421 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[B]], align 4 4422 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP13]], -1 4423 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B]], align 4 4424 // CHECK4-NEXT: [[TMP14:%.*]] = load i32*, i32** [[_TMP3]], align 8 4425 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 4426 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP15]], 1 4427 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP14]], align 4 4428 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 4429 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i32* [[A]] to i8* 4430 // CHECK4-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 4431 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 4432 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i32* [[B]] to i8* 4433 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 4434 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 4435 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i32* [[C]] to i8* 4436 // CHECK4-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 4437 // CHECK4-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4438 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 4439 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 4440 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], i32 3, i64 24, i8* [[TMP24]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 4441 // CHECK4-NEXT: switch i32 [[TMP25]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4442 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4443 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4444 // CHECK4-NEXT: ] 4445 // CHECK4: .omp.reduction.case1: 4446 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP9]], align 4 4447 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[A]], align 4 4448 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 4449 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP9]], align 4 4450 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP6]], align 4 4451 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[B]], align 4 4452 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 4453 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[TMP6]], align 4 4454 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP10]], align 4 4455 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[C]], align 4 4456 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 4457 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP10]], align 4 4458 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]], [8 x i32]* @.gomp_critical_user_.reduction.var) 4459 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4460 // CHECK4: .omp.reduction.case2: 4461 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[A]], align 4 4462 // CHECK4-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP9]], i32 [[TMP32]] monotonic, align 4 4463 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[B]], align 4 4464 // CHECK4-NEXT: [[TMP35:%.*]] = atomicrmw add i32* [[TMP6]], i32 [[TMP34]] monotonic, align 4 4465 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[C]], align 4 4466 // CHECK4-NEXT: [[TMP37:%.*]] = atomicrmw add i32* [[TMP10]], i32 [[TMP36]] monotonic, align 4 4467 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4468 // CHECK4: .omp.reduction.default: 4469 // CHECK4-NEXT: ret void 4470 // 4471 // 4472 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 4473 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4]] { 4474 // CHECK4-NEXT: entry: 4475 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4476 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 4477 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4478 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 4479 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 4480 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 4481 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 4482 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 4483 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 4484 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 4485 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 4486 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 4487 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 4488 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 4489 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 4490 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 4491 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 4492 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 4493 // CHECK4-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 4494 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 4495 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 4496 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 4497 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 4498 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 4499 // CHECK4-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 4500 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 4501 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 4502 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 4503 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 4504 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 4505 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 4506 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 4507 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 4508 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 4509 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 4510 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 4511 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 4512 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 4513 // CHECK4-NEXT: ret void 4514 // 4515 // 4516 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.8 4517 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4]] { 4518 // CHECK4-NEXT: entry: 4519 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4520 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 4521 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4522 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 4523 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 4524 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 4525 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 4526 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 4527 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 4528 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 4529 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 4530 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 4531 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 4532 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 4533 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 4534 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 4535 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 4536 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 4537 // CHECK4-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 4538 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 4539 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 4540 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 4541 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 4542 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 4543 // CHECK4-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 4544 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 4545 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 4546 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 4547 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 4548 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 4549 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 4550 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 4551 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 4552 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 4553 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 4554 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 4555 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 4556 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 4557 // CHECK4-NEXT: ret void 4558 // 4559