1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
7
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // expected-no-diagnostics
14 #ifndef HEADER
15 #define HEADER
16
17 volatile int g __attribute__((aligned(128))) = 1212;
18
19 template <class T>
20 struct S {
21 T f;
SS22 S(T a) : f(a + g) {}
SS23 S() : f(g) {}
operator TS24 operator T() { return T(); }
operator &S25 S &operator&(const S &) { return *this; }
~SS26 ~S() {}
27 };
28
29 struct SS {
30 int a;
31 int b : 4;
32 int &c;
SSSS33 SS(int &d) : a(0), b(0), c(d) {
34 #pragma omp parallel reduction(default, +: a, b, c)
35 #ifdef LAMBDA
36 [&]() {
37 ++this->a, --b, (this)->c /= 1;
38 #pragma omp parallel reduction(&: a, b, c)
39 ++(this)->a, --b, this->c /= 1;
40 }();
41 #elif defined(BLOCKS)
42 ^{
43 ++a;
44 --this->b;
45 (this)->c /= 1;
46 #pragma omp parallel reduction(-: a, b, c)
47 ++(this)->a, --b, this->c /= 1;
48 }();
49 #else
50 ++this->a, --b, c /= 1;
51 #endif
52 }
53 };
54
55 template<typename T>
56 struct SST {
57 T a;
SSTSST58 SST() : a(T()) {
59 #pragma omp parallel reduction(*: a)
60 #ifdef LAMBDA
61 [&]() {
62 [&]() {
63 ++this->a;
64 #pragma omp parallel reduction(&& :a)
65 ++(this)->a;
66 }();
67 }();
68 #elif defined(BLOCKS)
69 ^{
70 ^{
71 ++a;
72 #pragma omp parallel reduction(|: a)
73 ++(this)->a;
74 }();
75 }();
76 #else
77 ++(this)->a;
78 #endif
79 }
80 };
81
82
foo_array_sect(short x[1])83 void foo_array_sect(short x[1]) {
84 #pragma omp parallel reduction(default, + : x[:])
85 {}
86 }
87
88 template <typename T>
tmain()89 T tmain() {
90 T t;
91 S<T> test;
92 SST<T> sst;
93 T t_var __attribute__((aligned(128))) = T(), t_var1 __attribute__((aligned(128)));
94 T vec[] = {1, 2};
95 S<T> s_arr[] = {1, 2};
96 S<T> var __attribute__((aligned(128))) (3), var1 __attribute__((aligned(128)));
97 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1)
98 {
99 vec[0] = t_var;
100 s_arr[0] = var;
101 }
102 return T();
103 }
104
105 int sivar;
main()106 int main() {
107 SS ss(sivar);
108 #ifdef LAMBDA
109 [&]() {
110 #pragma omp parallel reduction(+:g)
111 {
112
113
114
115
116 // Reduction list for runtime.
117
118 g = 1;
119
120 [&]() {
121 g = 2;
122 }();
123 }
124 }();
125 return 0;
126 #elif defined(BLOCKS)
127 ^{
128 #pragma omp parallel reduction(-:g)
129 {
130
131 // Reduction list for runtime.
132
133 g = 1;
134
135 ^{
136 g = 2;
137 }();
138 }
139 }();
140 return 0;
141
142
143 #else
144 S<float> test;
145 float t_var = 0, t_var1;
146 int vec[] = {1, 2};
147 S<float> s_arr[] = {1, 2};
148 S<float> var(3), var1;
149 float _Complex cf;
150 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1)
151 {
152 vec[0] = t_var;
153 s_arr[0] = var;
154 }
155 if (var1)
156 #pragma omp parallel reduction(+ : t_var) reduction(& : var) reduction(&& : var1) reduction(min : t_var1)
157 while (1) {
158 vec[0] = t_var;
159 s_arr[0] = var;
160 }
161 #pragma omp parallel reduction(+ : cf)
162 ;
163 return tmain<int>();
164 #endif
165 }
166
167
168 // Reduction list for runtime.
169
170
171
172 // For + reduction operation initial value of private variable is 0.
173
174 // For & reduction operation initial value of private variable is ones in all bits.
175
176 // For && reduction operation initial value of private variable is 1.0.
177
178 // For min reduction operation initial value of private variable is largest repesentable value.
179
180 // Skip checks for internal operations.
181
182 // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
183
184
185 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>);
186
187
188 // switch(res)
189
190 // case 1:
191 // t_var += t_var_reduction;
192
193 // var = var.operator &(var_reduction);
194
195 // var1 = var1.operator &&(var1_reduction);
196
197 // t_var1 = min(t_var1, t_var1_reduction);
198
199 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>);
200
201 // break;
202
203 // case 2:
204 // t_var += t_var_reduction;
205
206 // var = var.operator &(var_reduction);
207
208 // var1 = var1.operator &&(var1_reduction);
209
210 // t_var1 = min(t_var1, t_var1_reduction);
211
212 // break;
213
214
215 // void reduce_func(void *lhs[<n>], void *rhs[<n>]) {
216 // *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]);
217 // ...
218 // *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1],
219 // *(Type<n>-1*)rhs[<n>-1]);
220 // }
221 // t_var_lhs = (float*)lhs[0];
222 // t_var_rhs = (float*)rhs[0];
223
224 // var_lhs = (S<float>*)lhs[1];
225 // var_rhs = (S<float>*)rhs[1];
226
227 // var1_lhs = (S<float>*)lhs[2];
228 // var1_rhs = (S<float>*)rhs[2];
229
230 // t_var1_lhs = (float*)lhs[3];
231 // t_var1_rhs = (float*)rhs[3];
232
233 // t_var_lhs += t_var_rhs;
234
235 // var_lhs = var_lhs.operator &(var_rhs);
236
237 // var1_lhs = var1_lhs.operator &&(var1_rhs);
238
239 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs);
240
241
242
243
244 // For + reduction operation initial value of private variable is 0.
245
246 // For & reduction operation initial value of private variable is ones in all bits.
247
248 // For && reduction operation initial value of private variable is 1.0.
249
250 // For min reduction operation initial value of private variable is largest repesentable value.
251
252
253
254
255
256
257 // Reduction list for runtime.
258
259
260
261 // For + reduction operation initial value of private variable is 0.
262
263 // For & reduction operation initial value of private variable is ones in all bits.
264
265 // For && reduction operation initial value of private variable is 1.0.
266
267 // For min reduction operation initial value of private variable is largest repesentable value.
268
269 // Skip checks for internal operations.
270
271 // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
272
273
274 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>);
275
276
277 // switch(res)
278
279 // case 1:
280 // t_var += t_var_reduction;
281
282 // var = var.operator &(var_reduction);
283
284 // var1 = var1.operator &&(var1_reduction);
285
286 // t_var1 = min(t_var1, t_var1_reduction);
287
288 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>);
289
290 // break;
291
292 // case 2:
293 // t_var += t_var_reduction;
294
295 // var = var.operator &(var_reduction);
296
297 // var1 = var1.operator &&(var1_reduction);
298
299 // t_var1 = min(t_var1, t_var1_reduction);
300
301 // break;
302
303
304 // void reduce_func(void *lhs[<n>], void *rhs[<n>]) {
305 // *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]);
306 // ...
307 // *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1],
308 // *(Type<n>-1*)rhs[<n>-1]);
309 // }
310 // t_var_lhs = (i{{[0-9]+}}*)lhs[0];
311 // t_var_rhs = (i{{[0-9]+}}*)rhs[0];
312
313 // var_lhs = (S<i{{[0-9]+}}>*)lhs[1];
314 // var_rhs = (S<i{{[0-9]+}}>*)rhs[1];
315
316 // var1_lhs = (S<i{{[0-9]+}}>*)lhs[2];
317 // var1_rhs = (S<i{{[0-9]+}}>*)rhs[2];
318
319 // t_var1_lhs = (i{{[0-9]+}}*)lhs[3];
320 // t_var1_rhs = (i{{[0-9]+}}*)rhs[3];
321
322 // t_var_lhs += t_var_rhs;
323
324 // var_lhs = var_lhs.operator &(var_rhs);
325
326 // var1_lhs = var1_lhs.operator &&(var1_rhs);
327
328 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs);
329
330 #endif
331 // CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs
332 // CHECK1-SAME: (i16* noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
333 // CHECK1-NEXT: entry:
334 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8
335 // CHECK1-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8
336 // CHECK1-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8
337 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i16*)* @.omp_outlined. to void (i32*, i32*, ...)*), i16* [[TMP0]])
338 // CHECK1-NEXT: ret void
339 //
340 //
341 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
342 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i16* noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {
343 // CHECK1-NEXT: entry:
344 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
345 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
346 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8
347 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
348 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
349 // CHECK1-NEXT: [[TMP:%.*]] = alloca i16*, align 8
350 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8
351 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2
352 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i16, align 2
353 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
354 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
355 // CHECK1-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8
356 // CHECK1-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8
357 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP0]], i64 0
358 // CHECK1-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8
359 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP1]], i64 0
360 // CHECK1-NEXT: [[TMP2:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64
361 // CHECK1-NEXT: [[TMP3:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64
362 // CHECK1-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]
363 // CHECK1-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
364 // CHECK1-NEXT: [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1
365 // CHECK1-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
366 // CHECK1-NEXT: [[TMP8:%.*]] = call i8* @llvm.stacksave()
367 // CHECK1-NEXT: store i8* [[TMP8]], i8** [[SAVED_STACK]], align 8
368 // CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16
369 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[__VLA_EXPR0]], align 8
370 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP6]]
371 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP9]]
372 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
373 // CHECK1: omp.arrayinit.body:
374 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
375 // CHECK1-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
376 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
377 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
378 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
379 // CHECK1: omp.arrayinit.done:
380 // CHECK1-NEXT: [[TMP10:%.*]] = load i16*, i16** [[X_ADDR]], align 8
381 // CHECK1-NEXT: [[TMP11:%.*]] = ptrtoint i16* [[TMP10]] to i64
382 // CHECK1-NEXT: [[TMP12:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64
383 // CHECK1-NEXT: [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]
384 // CHECK1-NEXT: [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
385 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP14]]
386 // CHECK1-NEXT: store i16* [[TMP15]], i16** [[TMP]], align 8
387 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
388 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i16* [[VLA]] to i8*
389 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
390 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
391 // CHECK1-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP6]] to i8*
392 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8
393 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
394 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
395 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
396 // CHECK1-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP21]], i32 1, i64 16, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
397 // CHECK1-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
398 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
399 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
400 // CHECK1-NEXT: ]
401 // CHECK1: .omp.reduction.case1:
402 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]]
403 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP24]]
404 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
405 // CHECK1: omp.arraycpy.body:
406 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
407 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]
408 // CHECK1-NEXT: [[TMP25:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
409 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP25]] to i32
410 // CHECK1-NEXT: [[TMP26:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
411 // CHECK1-NEXT: [[CONV3:%.*]] = sext i16 [[TMP26]] to i32
412 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]
413 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
414 // CHECK1-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
415 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1
416 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
417 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP24]]
418 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
419 // CHECK1: omp.arraycpy.done7:
420 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var)
421 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
422 // CHECK1: .omp.reduction.case2:
423 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]]
424 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP27]]
425 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]
426 // CHECK1: omp.arraycpy.body9:
427 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]
428 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]
429 // CHECK1-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
430 // CHECK1-NEXT: [[CONV12:%.*]] = sext i16 [[TMP28]] to i32
431 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2
432 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
433 // CHECK1: atomic_cont:
434 // CHECK1-NEXT: [[TMP29:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP34:%.*]], [[ATOMIC_CONT]] ]
435 // CHECK1-NEXT: store i16 [[TMP29]], i16* [[_TMP13]], align 2
436 // CHECK1-NEXT: [[TMP30:%.*]] = load i16, i16* [[_TMP13]], align 2
437 // CHECK1-NEXT: [[CONV14:%.*]] = sext i16 [[TMP30]] to i32
438 // CHECK1-NEXT: [[TMP31:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
439 // CHECK1-NEXT: [[CONV15:%.*]] = sext i16 [[TMP31]] to i32
440 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]
441 // CHECK1-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16
442 // CHECK1-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2
443 // CHECK1-NEXT: [[TMP32:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2
444 // CHECK1-NEXT: [[TMP33:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP29]], i16 [[TMP32]] monotonic monotonic, align 2
445 // CHECK1-NEXT: [[TMP34]] = extractvalue { i16, i1 } [[TMP33]], 0
446 // CHECK1-NEXT: [[TMP35:%.*]] = extractvalue { i16, i1 } [[TMP33]], 1
447 // CHECK1-NEXT: br i1 [[TMP35]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]
448 // CHECK1: atomic_exit:
449 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1
450 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1
451 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP27]]
452 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]
453 // CHECK1: omp.arraycpy.done21:
454 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
455 // CHECK1: .omp.reduction.default:
456 // CHECK1-NEXT: [[TMP36:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
457 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP36]])
458 // CHECK1-NEXT: ret void
459 //
460 //
461 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
462 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
463 // CHECK1-NEXT: entry:
464 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
465 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
466 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
467 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
468 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
469 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]*
470 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
471 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]*
472 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
473 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
474 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*
475 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0
476 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
477 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16*
478 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1
479 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
480 // CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64
481 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]]
482 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]]
483 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
484 // CHECK1: omp.arraycpy.body:
485 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
486 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
487 // CHECK1-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
488 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32
489 // CHECK1-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
490 // CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32
491 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
492 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
493 // CHECK1-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
494 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
495 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
496 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
497 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
498 // CHECK1: omp.arraycpy.done4:
499 // CHECK1-NEXT: ret void
500 //
501 //
502 // CHECK1-LABEL: define {{[^@]+}}@main
503 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] {
504 // CHECK1-NEXT: entry:
505 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
506 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
507 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
508 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca float, align 4
509 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca float, align 4
510 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
511 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
512 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
513 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4
514 // CHECK1-NEXT: [[CF:%.*]] = alloca { float, float }, align 4
515 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
516 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @sivar)
517 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
518 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4
519 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
520 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
521 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
522 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
523 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
524 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
525 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)
526 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]])
527 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, float*, [2 x %struct.S]*, %struct.S*, %struct.S*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], float* [[T_VAR]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], %struct.S* [[VAR1]], float* [[T_VAR1]])
528 // CHECK1-NEXT: [[CALL:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]])
529 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL]], 0.000000e+00
530 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
531 // CHECK1: if.then:
532 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, float*, [2 x %struct.S]*, %struct.S*, %struct.S*, float*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], float* [[T_VAR]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], %struct.S* [[VAR1]], float* [[T_VAR1]])
533 // CHECK1-NEXT: br label [[IF_END]]
534 // CHECK1: if.end:
535 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { float, float }*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), { float, float }* [[CF]])
536 // CHECK1-NEXT: [[CALL1:%.*]] = call noundef i32 @_Z5tmainIiET_v()
537 // CHECK1-NEXT: store i32 [[CALL1]], i32* [[RETVAL]], align 4
538 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5:[0-9]+]]
539 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
540 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
541 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
542 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
543 // CHECK1: arraydestroy.body:
544 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[IF_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
545 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
546 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
547 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
548 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
549 // CHECK1: arraydestroy.done2:
550 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
551 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
552 // CHECK1-NEXT: ret i32 [[TMP2]]
553 //
554 //
555 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
556 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 {
557 // CHECK1-NEXT: entry:
558 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
559 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
560 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
561 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
562 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
563 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
564 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]])
565 // CHECK1-NEXT: ret void
566 //
567 //
568 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
569 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
570 // CHECK1-NEXT: entry:
571 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
572 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
573 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
574 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
575 // CHECK1-NEXT: ret void
576 //
577 //
578 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
579 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
580 // CHECK1-NEXT: entry:
581 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
582 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
583 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
584 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4
585 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
586 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
587 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
588 // CHECK1-NEXT: ret void
589 //
590 //
591 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
592 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
593 // CHECK1-NEXT: entry:
594 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
595 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
596 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
597 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca float*, align 8
598 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
599 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
600 // CHECK1-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S*, align 8
601 // CHECK1-NEXT: [[T_VAR1_ADDR:%.*]] = alloca float*, align 8
602 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca float, align 4
603 // CHECK1-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4
604 // CHECK1-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4
605 // CHECK1-NEXT: [[T_VAR15:%.*]] = alloca float, align 4
606 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8
607 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S]], align 4
608 // CHECK1-NEXT: [[REF_TMP12:%.*]] = alloca [[STRUCT_S]], align 4
609 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca float, align 4
610 // CHECK1-NEXT: [[TMP:%.*]] = alloca float, align 4
611 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
612 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
613 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
614 // CHECK1-NEXT: store float* [[T_VAR]], float** [[T_VAR_ADDR]], align 8
615 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
616 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
617 // CHECK1-NEXT: store %struct.S* [[VAR1]], %struct.S** [[VAR1_ADDR]], align 8
618 // CHECK1-NEXT: store float* [[T_VAR1]], float** [[T_VAR1_ADDR]], align 8
619 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
620 // CHECK1-NEXT: [[TMP1:%.*]] = load float*, float** [[T_VAR_ADDR]], align 8
621 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
622 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
623 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR1_ADDR]], align 8
624 // CHECK1-NEXT: [[TMP5:%.*]] = load float*, float** [[T_VAR1_ADDR]], align 8
625 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR2]], align 4
626 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]])
627 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]])
628 // CHECK1-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR15]], align 4
629 // CHECK1-NEXT: [[TMP6:%.*]] = load float, float* [[T_VAR2]], align 4
630 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32
631 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0
632 // CHECK1-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
633 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i64 0, i64 0
634 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8*
635 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR3]] to i8*
636 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false)
637 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
638 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast float* [[T_VAR2]] to i8*
639 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8
640 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
641 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR3]] to i8*
642 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
643 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
644 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR14]] to i8*
645 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
646 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3
647 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast float* [[T_VAR15]] to i8*
648 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
649 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
650 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
651 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
652 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 4, i64 32, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
653 // CHECK1-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
654 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
655 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
656 // CHECK1-NEXT: ]
657 // CHECK1: .omp.reduction.case1:
658 // CHECK1-NEXT: [[TMP21:%.*]] = load float, float* [[TMP1]], align 4
659 // CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[T_VAR2]], align 4
660 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP21]], [[TMP22]]
661 // CHECK1-NEXT: store float [[ADD]], float* [[TMP1]], align 4
662 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]])
663 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast %struct.S* [[TMP3]] to i8*
664 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[CALL]] to i8*
665 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP23]], i8* align 4 [[TMP24]], i64 4, i1 false)
666 // CHECK1-NEXT: [[CALL7:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP4]])
667 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL7]], 0.000000e+00
668 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
669 // CHECK1: land.rhs:
670 // CHECK1-NEXT: [[CALL8:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]])
671 // CHECK1-NEXT: [[TOBOOL9:%.*]] = fcmp une float [[CALL8]], 0.000000e+00
672 // CHECK1-NEXT: br label [[LAND_END]]
673 // CHECK1: land.end:
674 // CHECK1-NEXT: [[TMP25:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ]
675 // CHECK1-NEXT: [[CONV10:%.*]] = uitofp i1 [[TMP25]] to float
676 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV10]])
677 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[TMP4]] to i8*
678 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8*
679 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
680 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
681 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[TMP5]], align 4
682 // CHECK1-NEXT: [[TMP29:%.*]] = load float, float* [[T_VAR15]], align 4
683 // CHECK1-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP28]], [[TMP29]]
684 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
685 // CHECK1: cond.true:
686 // CHECK1-NEXT: [[TMP30:%.*]] = load float, float* [[TMP5]], align 4
687 // CHECK1-NEXT: br label [[COND_END:%.*]]
688 // CHECK1: cond.false:
689 // CHECK1-NEXT: [[TMP31:%.*]] = load float, float* [[T_VAR15]], align 4
690 // CHECK1-NEXT: br label [[COND_END]]
691 // CHECK1: cond.end:
692 // CHECK1-NEXT: [[COND:%.*]] = phi float [ [[TMP30]], [[COND_TRUE]] ], [ [[TMP31]], [[COND_FALSE]] ]
693 // CHECK1-NEXT: store float [[COND]], float* [[TMP5]], align 4
694 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var)
695 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
696 // CHECK1: .omp.reduction.case2:
697 // CHECK1-NEXT: [[TMP32:%.*]] = load float, float* [[T_VAR2]], align 4
698 // CHECK1-NEXT: [[TMP33:%.*]] = atomicrmw fadd float* [[TMP1]], float [[TMP32]] monotonic, align 4
699 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
700 // CHECK1-NEXT: [[CALL11:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]])
701 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP3]] to i8*
702 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[CALL11]] to i8*
703 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
704 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
705 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
706 // CHECK1-NEXT: [[CALL13:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP4]])
707 // CHECK1-NEXT: [[TOBOOL14:%.*]] = fcmp une float [[CALL13]], 0.000000e+00
708 // CHECK1-NEXT: br i1 [[TOBOOL14]], label [[LAND_RHS15:%.*]], label [[LAND_END18:%.*]]
709 // CHECK1: land.rhs15:
710 // CHECK1-NEXT: [[CALL16:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]])
711 // CHECK1-NEXT: [[TOBOOL17:%.*]] = fcmp une float [[CALL16]], 0.000000e+00
712 // CHECK1-NEXT: br label [[LAND_END18]]
713 // CHECK1: land.end18:
714 // CHECK1-NEXT: [[TMP36:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL17]], [[LAND_RHS15]] ]
715 // CHECK1-NEXT: [[CONV19:%.*]] = uitofp i1 [[TMP36]] to float
716 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]], float noundef [[CONV19]])
717 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast %struct.S* [[TMP4]] to i8*
718 // CHECK1-NEXT: [[TMP38:%.*]] = bitcast %struct.S* [[REF_TMP12]] to i8*
719 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP37]], i8* align 4 [[TMP38]], i64 4, i1 false)
720 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]]) #[[ATTR5]]
721 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
722 // CHECK1-NEXT: [[TMP39:%.*]] = load float, float* [[T_VAR15]], align 4
723 // CHECK1-NEXT: [[TMP40:%.*]] = bitcast float* [[TMP5]] to i32*
724 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP40]] monotonic, align 4
725 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
726 // CHECK1: atomic_cont:
727 // CHECK1-NEXT: [[TMP41:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[LAND_END18]] ], [ [[TMP51:%.*]], [[COND_END23:%.*]] ]
728 // CHECK1-NEXT: [[TMP42:%.*]] = bitcast float* [[ATOMIC_TEMP]] to i32*
729 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast i32 [[TMP41]] to float
730 // CHECK1-NEXT: store float [[TMP43]], float* [[TMP]], align 4
731 // CHECK1-NEXT: [[TMP44:%.*]] = load float, float* [[TMP]], align 4
732 // CHECK1-NEXT: [[TMP45:%.*]] = load float, float* [[T_VAR15]], align 4
733 // CHECK1-NEXT: [[CMP20:%.*]] = fcmp olt float [[TMP44]], [[TMP45]]
734 // CHECK1-NEXT: br i1 [[CMP20]], label [[COND_TRUE21:%.*]], label [[COND_FALSE22:%.*]]
735 // CHECK1: cond.true21:
736 // CHECK1-NEXT: [[TMP46:%.*]] = load float, float* [[TMP]], align 4
737 // CHECK1-NEXT: br label [[COND_END23]]
738 // CHECK1: cond.false22:
739 // CHECK1-NEXT: [[TMP47:%.*]] = load float, float* [[T_VAR15]], align 4
740 // CHECK1-NEXT: br label [[COND_END23]]
741 // CHECK1: cond.end23:
742 // CHECK1-NEXT: [[COND24:%.*]] = phi float [ [[TMP46]], [[COND_TRUE21]] ], [ [[TMP47]], [[COND_FALSE22]] ]
743 // CHECK1-NEXT: store float [[COND24]], float* [[ATOMIC_TEMP]], align 4
744 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[TMP42]], align 4
745 // CHECK1-NEXT: [[TMP49:%.*]] = bitcast float* [[TMP5]] to i32*
746 // CHECK1-NEXT: [[TMP50:%.*]] = cmpxchg i32* [[TMP49]], i32 [[TMP41]], i32 [[TMP48]] monotonic monotonic, align 4
747 // CHECK1-NEXT: [[TMP51]] = extractvalue { i32, i1 } [[TMP50]], 0
748 // CHECK1-NEXT: [[TMP52:%.*]] = extractvalue { i32, i1 } [[TMP50]], 1
749 // CHECK1-NEXT: br i1 [[TMP52]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
750 // CHECK1: atomic_exit:
751 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
752 // CHECK1: .omp.reduction.default:
753 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]]
754 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]]
755 // CHECK1-NEXT: ret void
756 //
757 //
758 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
759 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
760 // CHECK1-NEXT: entry:
761 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
762 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
763 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4
764 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
765 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
766 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
767 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]*
768 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
769 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]*
770 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0
771 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
772 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to float*
773 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0
774 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
775 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to float*
776 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1
777 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
778 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S*
779 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1
780 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
781 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S*
782 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2
783 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
784 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S*
785 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2
786 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
787 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S*
788 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3
789 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8
790 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to float*
791 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3
792 // CHECK1-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8
793 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to float*
794 // CHECK1-NEXT: [[TMP30:%.*]] = load float, float* [[TMP11]], align 4
795 // CHECK1-NEXT: [[TMP31:%.*]] = load float, float* [[TMP8]], align 4
796 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP30]], [[TMP31]]
797 // CHECK1-NEXT: store float [[ADD]], float* [[TMP11]], align 4
798 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP14]])
799 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP17]] to i8*
800 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[CALL]] to i8*
801 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
802 // CHECK1-NEXT: [[CALL2:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP23]])
803 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00
804 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
805 // CHECK1: land.rhs:
806 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP20]])
807 // CHECK1-NEXT: [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00
808 // CHECK1-NEXT: br label [[LAND_END]]
809 // CHECK1: land.end:
810 // CHECK1-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ]
811 // CHECK1-NEXT: [[CONV:%.*]] = uitofp i1 [[TMP34]] to float
812 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV]])
813 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP23]] to i8*
814 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8*
815 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
816 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
817 // CHECK1-NEXT: [[TMP37:%.*]] = load float, float* [[TMP29]], align 4
818 // CHECK1-NEXT: [[TMP38:%.*]] = load float, float* [[TMP26]], align 4
819 // CHECK1-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP37]], [[TMP38]]
820 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
821 // CHECK1: cond.true:
822 // CHECK1-NEXT: [[TMP39:%.*]] = load float, float* [[TMP29]], align 4
823 // CHECK1-NEXT: br label [[COND_END:%.*]]
824 // CHECK1: cond.false:
825 // CHECK1-NEXT: [[TMP40:%.*]] = load float, float* [[TMP26]], align 4
826 // CHECK1-NEXT: br label [[COND_END]]
827 // CHECK1: cond.end:
828 // CHECK1-NEXT: [[COND:%.*]] = phi float [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ]
829 // CHECK1-NEXT: store float [[COND]], float* [[TMP29]], align 4
830 // CHECK1-NEXT: ret void
831 //
832 //
833 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEanERKS0_
834 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 {
835 // CHECK1-NEXT: entry:
836 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
837 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.S*, align 8
838 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
839 // CHECK1-NEXT: store %struct.S* [[TMP0]], %struct.S** [[DOTADDR]], align 8
840 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
841 // CHECK1-NEXT: ret %struct.S* [[THIS1]]
842 //
843 //
844 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEcvfEv
845 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 {
846 // CHECK1-NEXT: entry:
847 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
848 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
849 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
850 // CHECK1-NEXT: ret float 0.000000e+00
851 //
852 //
853 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
854 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
855 // CHECK1-NEXT: entry:
856 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
857 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
858 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
859 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
860 // CHECK1-NEXT: ret void
861 //
862 //
863 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
864 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
865 // CHECK1-NEXT: entry:
866 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
867 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
868 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
869 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca float*, align 8
870 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
871 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
872 // CHECK1-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S*, align 8
873 // CHECK1-NEXT: [[T_VAR1_ADDR:%.*]] = alloca float*, align 8
874 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca float, align 4
875 // CHECK1-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4
876 // CHECK1-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4
877 // CHECK1-NEXT: [[T_VAR15:%.*]] = alloca float, align 4
878 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
879 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
880 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
881 // CHECK1-NEXT: store float* [[T_VAR]], float** [[T_VAR_ADDR]], align 8
882 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
883 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
884 // CHECK1-NEXT: store %struct.S* [[VAR1]], %struct.S** [[VAR1_ADDR]], align 8
885 // CHECK1-NEXT: store float* [[T_VAR1]], float** [[T_VAR1_ADDR]], align 8
886 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
887 // CHECK1-NEXT: [[TMP1:%.*]] = load float*, float** [[T_VAR_ADDR]], align 8
888 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
889 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
890 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR1_ADDR]], align 8
891 // CHECK1-NEXT: [[TMP5:%.*]] = load float*, float** [[T_VAR1_ADDR]], align 8
892 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR2]], align 4
893 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]])
894 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]])
895 // CHECK1-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR15]], align 4
896 // CHECK1-NEXT: br label [[WHILE_COND:%.*]]
897 // CHECK1: while.cond:
898 // CHECK1-NEXT: br label [[WHILE_BODY:%.*]]
899 // CHECK1: while.body:
900 // CHECK1-NEXT: [[TMP6:%.*]] = load float, float* [[T_VAR2]], align 4
901 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32
902 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0
903 // CHECK1-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
904 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i64 0, i64 0
905 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8*
906 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR3]] to i8*
907 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false)
908 // CHECK1-NEXT: br label [[WHILE_COND]], !llvm.loop [[LOOP5:![0-9]+]]
909 //
910 //
911 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
912 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], { float, float }* noundef nonnull align 4 dereferenceable(8) [[CF:%.*]]) #[[ATTR1]] {
913 // CHECK1-NEXT: entry:
914 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
915 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
916 // CHECK1-NEXT: [[CF_ADDR:%.*]] = alloca { float, float }*, align 8
917 // CHECK1-NEXT: [[CF1:%.*]] = alloca { float, float }, align 4
918 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
919 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca { float, float }, align 4
920 // CHECK1-NEXT: [[ATOMIC_TEMP10:%.*]] = alloca { float, float }, align 4
921 // CHECK1-NEXT: [[TMP:%.*]] = alloca { float, float }, align 4
922 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
923 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
924 // CHECK1-NEXT: store { float, float }* [[CF]], { float, float }** [[CF_ADDR]], align 8
925 // CHECK1-NEXT: [[TMP0:%.*]] = load { float, float }*, { float, float }** [[CF_ADDR]], align 8
926 // CHECK1-NEXT: [[CF1_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0
927 // CHECK1-NEXT: [[CF1_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1
928 // CHECK1-NEXT: store float 0.000000e+00, float* [[CF1_REALP]], align 4
929 // CHECK1-NEXT: store float 0.000000e+00, float* [[CF1_IMAGP]], align 4
930 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
931 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast { float, float }* [[CF1]] to i8*
932 // CHECK1-NEXT: store i8* [[TMP2]], i8** [[TMP1]], align 8
933 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
934 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
935 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
936 // CHECK1-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP5]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
937 // CHECK1-NEXT: switch i32 [[TMP6]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
938 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
939 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
940 // CHECK1-NEXT: ]
941 // CHECK1: .omp.reduction.case1:
942 // CHECK1-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 0
943 // CHECK1-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4
944 // CHECK1-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 1
945 // CHECK1-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4
946 // CHECK1-NEXT: [[CF1_REALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0
947 // CHECK1-NEXT: [[CF1_REAL:%.*]] = load float, float* [[CF1_REALP2]], align 4
948 // CHECK1-NEXT: [[CF1_IMAGP3:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1
949 // CHECK1-NEXT: [[CF1_IMAG:%.*]] = load float, float* [[CF1_IMAGP3]], align 4
950 // CHECK1-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[CF1_REAL]]
951 // CHECK1-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[CF1_IMAG]]
952 // CHECK1-NEXT: [[DOTREALP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 0
953 // CHECK1-NEXT: [[DOTIMAGP5:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 1
954 // CHECK1-NEXT: store float [[ADD_R]], float* [[DOTREALP4]], align 4
955 // CHECK1-NEXT: store float [[ADD_I]], float* [[DOTIMAGP5]], align 4
956 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
957 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
958 // CHECK1: .omp.reduction.case2:
959 // CHECK1-NEXT: [[CF1_REALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0
960 // CHECK1-NEXT: [[CF1_REAL7:%.*]] = load float, float* [[CF1_REALP6]], align 4
961 // CHECK1-NEXT: [[CF1_IMAGP8:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1
962 // CHECK1-NEXT: [[CF1_IMAG9:%.*]] = load float, float* [[CF1_IMAGP8]], align 4
963 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast { float, float }* [[TMP0]] to i8*
964 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8*
965 // CHECK1-NEXT: call void @__atomic_load(i64 noundef 8, i8* noundef [[TMP7]], i8* noundef [[TMP8]], i32 noundef 0)
966 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
967 // CHECK1: atomic_cont:
968 // CHECK1-NEXT: [[ATOMIC_TEMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 0
969 // CHECK1-NEXT: [[ATOMIC_TEMP_REAL:%.*]] = load float, float* [[ATOMIC_TEMP_REALP]], align 4
970 // CHECK1-NEXT: [[ATOMIC_TEMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 1
971 // CHECK1-NEXT: [[ATOMIC_TEMP_IMAG:%.*]] = load float, float* [[ATOMIC_TEMP_IMAGP]], align 4
972 // CHECK1-NEXT: [[TMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0
973 // CHECK1-NEXT: [[TMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1
974 // CHECK1-NEXT: store float [[ATOMIC_TEMP_REAL]], float* [[TMP_REALP]], align 4
975 // CHECK1-NEXT: store float [[ATOMIC_TEMP_IMAG]], float* [[TMP_IMAGP]], align 4
976 // CHECK1-NEXT: [[TMP_REALP11:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0
977 // CHECK1-NEXT: [[TMP_REAL:%.*]] = load float, float* [[TMP_REALP11]], align 4
978 // CHECK1-NEXT: [[TMP_IMAGP12:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1
979 // CHECK1-NEXT: [[TMP_IMAG:%.*]] = load float, float* [[TMP_IMAGP12]], align 4
980 // CHECK1-NEXT: [[CF1_REALP13:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0
981 // CHECK1-NEXT: [[CF1_REAL14:%.*]] = load float, float* [[CF1_REALP13]], align 4
982 // CHECK1-NEXT: [[CF1_IMAGP15:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1
983 // CHECK1-NEXT: [[CF1_IMAG16:%.*]] = load float, float* [[CF1_IMAGP15]], align 4
984 // CHECK1-NEXT: [[ADD_R17:%.*]] = fadd float [[TMP_REAL]], [[CF1_REAL14]]
985 // CHECK1-NEXT: [[ADD_I18:%.*]] = fadd float [[TMP_IMAG]], [[CF1_IMAG16]]
986 // CHECK1-NEXT: [[ATOMIC_TEMP10_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP10]], i32 0, i32 0
987 // CHECK1-NEXT: [[ATOMIC_TEMP10_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP10]], i32 0, i32 1
988 // CHECK1-NEXT: store float [[ADD_R17]], float* [[ATOMIC_TEMP10_REALP]], align 4
989 // CHECK1-NEXT: store float [[ADD_I18]], float* [[ATOMIC_TEMP10_IMAGP]], align 4
990 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast { float, float }* [[TMP0]] to i8*
991 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8*
992 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP10]] to i8*
993 // CHECK1-NEXT: [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef [[TMP9]], i8* noundef [[TMP10]], i8* noundef [[TMP11]], i32 noundef 0, i32 noundef 0)
994 // CHECK1-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
995 // CHECK1: atomic_exit:
996 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
997 // CHECK1: .omp.reduction.default:
998 // CHECK1-NEXT: ret void
999 //
1000 //
1001 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
1002 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1003 // CHECK1-NEXT: entry:
1004 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1005 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1006 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1007 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1008 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1009 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1010 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1011 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1012 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1013 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1014 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to { float, float }*
1015 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1016 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1017 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to { float, float }*
1018 // CHECK1-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0
1019 // CHECK1-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4
1020 // CHECK1-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1
1021 // CHECK1-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4
1022 // CHECK1-NEXT: [[DOTREALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 0
1023 // CHECK1-NEXT: [[DOTREAL3:%.*]] = load float, float* [[DOTREALP2]], align 4
1024 // CHECK1-NEXT: [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 1
1025 // CHECK1-NEXT: [[DOTIMAG5:%.*]] = load float, float* [[DOTIMAGP4]], align 4
1026 // CHECK1-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[DOTREAL3]]
1027 // CHECK1-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[DOTIMAG5]]
1028 // CHECK1-NEXT: [[DOTREALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0
1029 // CHECK1-NEXT: [[DOTIMAGP7:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1
1030 // CHECK1-NEXT: store float [[ADD_R]], float* [[DOTREALP6]], align 4
1031 // CHECK1-NEXT: store float [[ADD_I]], float* [[DOTIMAGP7]], align 4
1032 // CHECK1-NEXT: ret void
1033 //
1034 //
1035 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1036 // CHECK1-SAME: () #[[ATTR0]] {
1037 // CHECK1-NEXT: entry:
1038 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1039 // CHECK1-NEXT: [[T:%.*]] = alloca i32, align 4
1040 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1041 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
1042 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
1043 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128
1044 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1045 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1046 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128
1047 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S_0]], align 128
1048 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1049 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]])
1050 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128
1051 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1052 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1053 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1054 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1055 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1056 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1057 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)
1058 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1]])
1059 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*, %struct.S.0*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], i32* [[T_VAR]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]], %struct.S.0* [[VAR1]], i32* [[T_VAR1]])
1060 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
1061 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]]
1062 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
1063 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1064 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1065 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1066 // CHECK1: arraydestroy.body:
1067 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1068 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1069 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1070 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1071 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1072 // CHECK1: arraydestroy.done1:
1073 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
1074 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
1075 // CHECK1-NEXT: ret i32 [[TMP2]]
1076 //
1077 //
1078 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
1079 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1080 // CHECK1-NEXT: entry:
1081 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1082 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
1083 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 8
1084 // CHECK1-NEXT: [[B4:%.*]] = alloca i32, align 4
1085 // CHECK1-NEXT: [[C5:%.*]] = alloca i32*, align 8
1086 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1087 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
1088 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1089 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1090 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8
1091 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
1092 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
1093 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1094 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
1095 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4
1096 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
1097 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
1098 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8
1099 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1100 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 8
1101 // CHECK1-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
1102 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8
1103 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8
1104 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8
1105 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8
1106 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]])
1107 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[B4]], align 4
1108 // CHECK1-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
1109 // CHECK1-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
1110 // CHECK1-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4
1111 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
1112 // CHECK1-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
1113 // CHECK1-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
1114 // CHECK1-NEXT: store i8 [[BF_SET10]], i8* [[B7]], align 4
1115 // CHECK1-NEXT: ret void
1116 //
1117 //
1118 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
1119 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
1120 // CHECK1-NEXT: entry:
1121 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1122 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1123 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1124 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1125 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8
1126 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
1127 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8
1128 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8
1129 // CHECK1-NEXT: [[A2:%.*]] = alloca i32, align 4
1130 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8
1131 // CHECK1-NEXT: [[B4:%.*]] = alloca i32, align 4
1132 // CHECK1-NEXT: [[C5:%.*]] = alloca i32, align 4
1133 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8
1134 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8
1135 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1136 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1137 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1138 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1139 // CHECK1-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8
1140 // CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
1141 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1142 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1143 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
1144 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
1145 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8
1146 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8
1147 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
1148 // CHECK1-NEXT: store i32 0, i32* [[A2]], align 4
1149 // CHECK1-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8
1150 // CHECK1-NEXT: store i32 0, i32* [[B4]], align 4
1151 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
1152 // CHECK1-NEXT: store i32 0, i32* [[C5]], align 4
1153 // CHECK1-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8
1154 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8
1155 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
1156 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
1157 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4
1158 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4
1159 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP8]], -1
1160 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B4]], align 4
1161 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP6]], align 8
1162 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
1163 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
1164 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4
1165 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1166 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i32* [[A2]] to i8*
1167 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
1168 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1169 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i32* [[B4]] to i8*
1170 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
1171 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
1172 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[C5]] to i8*
1173 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
1174 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1175 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1176 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1177 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 3, i64 24, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.7, [8 x i32]* @.gomp_critical_user_.reduction.var)
1178 // CHECK1-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1179 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1180 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1181 // CHECK1-NEXT: ]
1182 // CHECK1: .omp.reduction.case1:
1183 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4
1184 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[A2]], align 4
1185 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1186 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4
1187 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP2]], align 4
1188 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[B4]], align 4
1189 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
1190 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[TMP2]], align 4
1191 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP5]], align 4
1192 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[C5]], align 4
1193 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
1194 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[TMP5]], align 4
1195 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1196 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1197 // CHECK1: .omp.reduction.case2:
1198 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[A2]], align 4
1199 // CHECK1-NEXT: [[TMP28:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP27]] monotonic, align 4
1200 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[B4]], align 4
1201 // CHECK1-NEXT: [[TMP30:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP29]] monotonic, align 4
1202 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[C5]], align 4
1203 // CHECK1-NEXT: [[TMP32:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP31]] monotonic, align 4
1204 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1205 // CHECK1: .omp.reduction.default:
1206 // CHECK1-NEXT: ret void
1207 //
1208 //
1209 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.7
1210 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1211 // CHECK1-NEXT: entry:
1212 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1213 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1214 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1215 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1216 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1217 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]*
1218 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1219 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]*
1220 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0
1221 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1222 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1223 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0
1224 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1225 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1226 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1
1227 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
1228 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
1229 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1
1230 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
1231 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
1232 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2
1233 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
1234 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
1235 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2
1236 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
1237 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32*
1238 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4
1239 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4
1240 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
1241 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1242 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4
1243 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4
1244 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
1245 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4
1246 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4
1247 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4
1248 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
1249 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4
1250 // CHECK1-NEXT: ret void
1251 //
1252 //
1253 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1254 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1255 // CHECK1-NEXT: entry:
1256 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1257 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1258 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1259 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1260 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128
1261 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
1262 // CHECK1-NEXT: store float [[CONV]], float* [[F]], align 4
1263 // CHECK1-NEXT: ret void
1264 //
1265 //
1266 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1267 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1268 // CHECK1-NEXT: entry:
1269 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1270 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1271 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1272 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1273 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1274 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1275 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1276 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128
1277 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
1278 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
1279 // CHECK1-NEXT: store float [[ADD]], float* [[F]], align 4
1280 // CHECK1-NEXT: ret void
1281 //
1282 //
1283 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1284 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1285 // CHECK1-NEXT: entry:
1286 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1287 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1288 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1289 // CHECK1-NEXT: ret void
1290 //
1291 //
1292 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1293 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1294 // CHECK1-NEXT: entry:
1295 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1296 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1297 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1298 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1299 // CHECK1-NEXT: ret void
1300 //
1301 //
1302 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
1303 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1304 // CHECK1-NEXT: entry:
1305 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1306 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1307 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1308 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1309 // CHECK1-NEXT: ret void
1310 //
1311 //
1312 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1313 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1314 // CHECK1-NEXT: entry:
1315 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1316 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1317 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1318 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1319 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1320 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1321 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1322 // CHECK1-NEXT: ret void
1323 //
1324 //
1325 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
1326 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
1327 // CHECK1-NEXT: entry:
1328 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1329 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1330 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1331 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1332 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1333 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1334 // CHECK1-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S.0*, align 8
1335 // CHECK1-NEXT: [[T_VAR1_ADDR:%.*]] = alloca i32*, align 8
1336 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 128
1337 // CHECK1-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
1338 // CHECK1-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S_0]], align 128
1339 // CHECK1-NEXT: [[T_VAR15:%.*]] = alloca i32, align 128
1340 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8
1341 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_0]], align 4
1342 // CHECK1-NEXT: [[REF_TMP11:%.*]] = alloca [[STRUCT_S_0]], align 4
1343 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1344 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1345 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1346 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1347 // CHECK1-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1348 // CHECK1-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1349 // CHECK1-NEXT: store %struct.S.0* [[VAR1]], %struct.S.0** [[VAR1_ADDR]], align 8
1350 // CHECK1-NEXT: store i32* [[T_VAR1]], i32** [[T_VAR1_ADDR]], align 8
1351 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1352 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1353 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1354 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1355 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR1_ADDR]], align 8
1356 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[T_VAR1_ADDR]], align 8
1357 // CHECK1-NEXT: store i32 0, i32* [[T_VAR2]], align 128
1358 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]])
1359 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]])
1360 // CHECK1-NEXT: store i32 2147483647, i32* [[T_VAR15]], align 128
1361 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR2]], align 128
1362 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0
1363 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4
1364 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i64 0, i64 0
1365 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8*
1366 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S.0* [[VAR3]] to i8*
1367 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 128 [[TMP8]], i64 4, i1 false)
1368 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1369 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i32* [[T_VAR2]] to i8*
1370 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8
1371 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1372 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR3]] to i8*
1373 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
1374 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
1375 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[VAR14]] to i8*
1376 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
1377 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3
1378 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[T_VAR15]] to i8*
1379 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
1380 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1381 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1382 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1383 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 4, i64 32, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.9, [8 x i32]* @.gomp_critical_user_.reduction.var)
1384 // CHECK1-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1385 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1386 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1387 // CHECK1-NEXT: ]
1388 // CHECK1: .omp.reduction.case1:
1389 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP1]], align 128
1390 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 128
1391 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1392 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP1]], align 128
1393 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]])
1394 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8*
1395 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast %struct.S.0* [[CALL]] to i8*
1396 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP23]], i8* align 4 [[TMP24]], i64 4, i1 false)
1397 // CHECK1-NEXT: [[CALL7:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP4]])
1398 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL7]], 0
1399 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
1400 // CHECK1: land.rhs:
1401 // CHECK1-NEXT: [[CALL8:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]])
1402 // CHECK1-NEXT: [[TOBOOL9:%.*]] = icmp ne i32 [[CALL8]], 0
1403 // CHECK1-NEXT: br label [[LAND_END]]
1404 // CHECK1: land.end:
1405 // CHECK1-NEXT: [[TMP25:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ]
1406 // CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[TMP25]] to i32
1407 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]])
1408 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8*
1409 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[REF_TMP]] to i8*
1410 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false)
1411 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
1412 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP5]], align 128
1413 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[T_VAR15]], align 128
1414 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP28]], [[TMP29]]
1415 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1416 // CHECK1: cond.true:
1417 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP5]], align 128
1418 // CHECK1-NEXT: br label [[COND_END:%.*]]
1419 // CHECK1: cond.false:
1420 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[T_VAR15]], align 128
1421 // CHECK1-NEXT: br label [[COND_END]]
1422 // CHECK1: cond.end:
1423 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE]] ], [ [[TMP31]], [[COND_FALSE]] ]
1424 // CHECK1-NEXT: store i32 [[COND]], i32* [[TMP5]], align 128
1425 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1426 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1427 // CHECK1: .omp.reduction.case2:
1428 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[T_VAR2]], align 128
1429 // CHECK1-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP1]], i32 [[TMP32]] monotonic, align 4
1430 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
1431 // CHECK1-NEXT: [[CALL10:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]])
1432 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8*
1433 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[CALL10]] to i8*
1434 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false)
1435 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
1436 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
1437 // CHECK1-NEXT: [[CALL12:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP4]])
1438 // CHECK1-NEXT: [[TOBOOL13:%.*]] = icmp ne i32 [[CALL12]], 0
1439 // CHECK1-NEXT: br i1 [[TOBOOL13]], label [[LAND_RHS14:%.*]], label [[LAND_END17:%.*]]
1440 // CHECK1: land.rhs14:
1441 // CHECK1-NEXT: [[CALL15:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]])
1442 // CHECK1-NEXT: [[TOBOOL16:%.*]] = icmp ne i32 [[CALL15]], 0
1443 // CHECK1-NEXT: br label [[LAND_END17]]
1444 // CHECK1: land.end17:
1445 // CHECK1-NEXT: [[TMP36:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL16]], [[LAND_RHS14]] ]
1446 // CHECK1-NEXT: [[CONV18:%.*]] = zext i1 [[TMP36]] to i32
1447 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]], i32 noundef [[CONV18]])
1448 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8*
1449 // CHECK1-NEXT: [[TMP38:%.*]] = bitcast %struct.S.0* [[REF_TMP11]] to i8*
1450 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP37]], i8* align 4 [[TMP38]], i64 4, i1 false)
1451 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]]) #[[ATTR5]]
1452 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var)
1453 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[T_VAR15]], align 128
1454 // CHECK1-NEXT: [[TMP40:%.*]] = atomicrmw min i32* [[TMP5]], i32 [[TMP39]] monotonic, align 4
1455 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1456 // CHECK1: .omp.reduction.default:
1457 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]]
1458 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]]
1459 // CHECK1-NEXT: ret void
1460 //
1461 //
1462 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.9
1463 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1464 // CHECK1-NEXT: entry:
1465 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1466 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1467 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1468 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1469 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1470 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1471 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]*
1472 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1473 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]*
1474 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0
1475 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1476 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1477 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0
1478 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1479 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1480 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1
1481 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
1482 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S.0*
1483 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1
1484 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
1485 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S.0*
1486 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2
1487 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
1488 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S.0*
1489 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2
1490 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
1491 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S.0*
1492 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3
1493 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8
1494 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to i32*
1495 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3
1496 // CHECK1-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8
1497 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to i32*
1498 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP11]], align 128
1499 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP8]], align 128
1500 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
1501 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128
1502 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP14]])
1503 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8*
1504 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[CALL]] to i8*
1505 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false)
1506 // CHECK1-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP23]])
1507 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0
1508 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
1509 // CHECK1: land.rhs:
1510 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP20]])
1511 // CHECK1-NEXT: [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0
1512 // CHECK1-NEXT: br label [[LAND_END]]
1513 // CHECK1: land.end:
1514 // CHECK1-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ]
1515 // CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[TMP34]] to i32
1516 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]])
1517 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8*
1518 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[REF_TMP]] to i8*
1519 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false)
1520 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
1521 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP29]], align 128
1522 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP26]], align 128
1523 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP37]], [[TMP38]]
1524 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1525 // CHECK1: cond.true:
1526 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP29]], align 128
1527 // CHECK1-NEXT: br label [[COND_END:%.*]]
1528 // CHECK1: cond.false:
1529 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP26]], align 128
1530 // CHECK1-NEXT: br label [[COND_END]]
1531 // CHECK1: cond.end:
1532 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ]
1533 // CHECK1-NEXT: store i32 [[COND]], i32* [[TMP29]], align 128
1534 // CHECK1-NEXT: ret void
1535 //
1536 //
1537 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEanERKS0_
1538 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 {
1539 // CHECK1-NEXT: entry:
1540 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1541 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.S.0*, align 8
1542 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1543 // CHECK1-NEXT: store %struct.S.0* [[TMP0]], %struct.S.0** [[DOTADDR]], align 8
1544 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1545 // CHECK1-NEXT: ret %struct.S.0* [[THIS1]]
1546 //
1547 //
1548 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEcviEv
1549 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 {
1550 // CHECK1-NEXT: entry:
1551 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1552 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1553 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1554 // CHECK1-NEXT: ret i32 0
1555 //
1556 //
1557 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1558 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1559 // CHECK1-NEXT: entry:
1560 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1561 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1562 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1563 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
1564 // CHECK1-NEXT: ret void
1565 //
1566 //
1567 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1568 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1569 // CHECK1-NEXT: entry:
1570 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1571 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1572 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1573 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1574 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128
1575 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1576 // CHECK1-NEXT: ret void
1577 //
1578 //
1579 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
1580 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1581 // CHECK1-NEXT: entry:
1582 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1583 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 8
1584 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1585 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1586 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0
1587 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4
1588 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0
1589 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 8
1590 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A2]], align 8
1591 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]], i32* [[TMP0]])
1592 // CHECK1-NEXT: ret void
1593 //
1594 //
1595 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1596 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1]] {
1597 // CHECK1-NEXT: entry:
1598 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1599 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1600 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1601 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1602 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8
1603 // CHECK1-NEXT: [[A1:%.*]] = alloca i32, align 4
1604 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8
1605 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1606 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4
1607 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1608 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1609 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1610 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1611 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1612 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1613 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1614 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8
1615 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8
1616 // CHECK1-NEXT: store i32 1, i32* [[A1]], align 4
1617 // CHECK1-NEXT: store i32* [[A1]], i32** [[_TMP2]], align 8
1618 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[_TMP2]], align 8
1619 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1620 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
1621 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4
1622 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1623 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[A1]] to i8*
1624 // CHECK1-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8
1625 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1626 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1627 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1628 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 1, i64 8, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.11, [8 x i32]* @.gomp_critical_user_.reduction.var)
1629 // CHECK1-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1630 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1631 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1632 // CHECK1-NEXT: ]
1633 // CHECK1: .omp.reduction.case1:
1634 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP2]], align 4
1635 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[A1]], align 4
1636 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], [[TMP12]]
1637 // CHECK1-NEXT: store i32 [[MUL]], i32* [[TMP2]], align 4
1638 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1639 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1640 // CHECK1: .omp.reduction.case2:
1641 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[A1]], align 4
1642 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP2]] monotonic, align 4
1643 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
1644 // CHECK1: atomic_cont:
1645 // CHECK1-NEXT: [[TMP14:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP19:%.*]], [[ATOMIC_CONT]] ]
1646 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[_TMP3]], align 4
1647 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[_TMP3]], align 4
1648 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[A1]], align 4
1649 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP15]], [[TMP16]]
1650 // CHECK1-NEXT: store i32 [[MUL4]], i32* [[ATOMIC_TEMP]], align 4
1651 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[ATOMIC_TEMP]], align 4
1652 // CHECK1-NEXT: [[TMP18:%.*]] = cmpxchg i32* [[TMP2]], i32 [[TMP14]], i32 [[TMP17]] monotonic monotonic, align 4
1653 // CHECK1-NEXT: [[TMP19]] = extractvalue { i32, i1 } [[TMP18]], 0
1654 // CHECK1-NEXT: [[TMP20:%.*]] = extractvalue { i32, i1 } [[TMP18]], 1
1655 // CHECK1-NEXT: br i1 [[TMP20]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
1656 // CHECK1: atomic_exit:
1657 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1658 // CHECK1: .omp.reduction.default:
1659 // CHECK1-NEXT: ret void
1660 //
1661 //
1662 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.11
1663 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1664 // CHECK1-NEXT: entry:
1665 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1666 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1667 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1668 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1669 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1670 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1671 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1672 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1673 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1674 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1675 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1676 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1677 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1678 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1679 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1680 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1681 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
1682 // CHECK1-NEXT: store i32 [[MUL]], i32* [[TMP11]], align 4
1683 // CHECK1-NEXT: ret void
1684 //
1685 //
1686 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1687 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1688 // CHECK1-NEXT: entry:
1689 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1690 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1691 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1692 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1693 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1694 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1695 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1696 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128
1697 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
1698 // CHECK1-NEXT: store i32 [[ADD]], i32* [[F]], align 4
1699 // CHECK1-NEXT: ret void
1700 //
1701 //
1702 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1703 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1704 // CHECK1-NEXT: entry:
1705 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1706 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1707 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1708 // CHECK1-NEXT: ret void
1709 //
1710 //
1711 // CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs
1712 // CHECK3-SAME: (i16* noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
1713 // CHECK3-NEXT: entry:
1714 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8
1715 // CHECK3-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8
1716 // CHECK3-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8
1717 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i16*)* @.omp_outlined. to void (i32*, i32*, ...)*), i16* [[TMP0]])
1718 // CHECK3-NEXT: ret void
1719 //
1720 //
1721 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1722 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i16* noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {
1723 // CHECK3-NEXT: entry:
1724 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1725 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1726 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8
1727 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
1728 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1729 // CHECK3-NEXT: [[TMP:%.*]] = alloca i16*, align 8
1730 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8
1731 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2
1732 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i16, align 2
1733 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1734 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1735 // CHECK3-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8
1736 // CHECK3-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8
1737 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP0]], i64 0
1738 // CHECK3-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8
1739 // CHECK3-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP1]], i64 0
1740 // CHECK3-NEXT: [[TMP2:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64
1741 // CHECK3-NEXT: [[TMP3:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64
1742 // CHECK3-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]
1743 // CHECK3-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
1744 // CHECK3-NEXT: [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1
1745 // CHECK3-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
1746 // CHECK3-NEXT: [[TMP8:%.*]] = call i8* @llvm.stacksave()
1747 // CHECK3-NEXT: store i8* [[TMP8]], i8** [[SAVED_STACK]], align 8
1748 // CHECK3-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16
1749 // CHECK3-NEXT: store i64 [[TMP6]], i64* [[__VLA_EXPR0]], align 8
1750 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP6]]
1751 // CHECK3-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP9]]
1752 // CHECK3-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
1753 // CHECK3: omp.arrayinit.body:
1754 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
1755 // CHECK3-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
1756 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1757 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
1758 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
1759 // CHECK3: omp.arrayinit.done:
1760 // CHECK3-NEXT: [[TMP10:%.*]] = load i16*, i16** [[X_ADDR]], align 8
1761 // CHECK3-NEXT: [[TMP11:%.*]] = ptrtoint i16* [[TMP10]] to i64
1762 // CHECK3-NEXT: [[TMP12:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64
1763 // CHECK3-NEXT: [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]
1764 // CHECK3-NEXT: [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
1765 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP14]]
1766 // CHECK3-NEXT: store i16* [[TMP15]], i16** [[TMP]], align 8
1767 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1768 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i16* [[VLA]] to i8*
1769 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
1770 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1771 // CHECK3-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP6]] to i8*
1772 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8
1773 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1774 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
1775 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1776 // CHECK3-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP21]], i32 1, i64 16, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1777 // CHECK3-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1778 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1779 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1780 // CHECK3-NEXT: ]
1781 // CHECK3: .omp.reduction.case1:
1782 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]]
1783 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP24]]
1784 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1785 // CHECK3: omp.arraycpy.body:
1786 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1787 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1788 // CHECK3-NEXT: [[TMP25:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
1789 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP25]] to i32
1790 // CHECK3-NEXT: [[TMP26:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
1791 // CHECK3-NEXT: [[CONV3:%.*]] = sext i16 [[TMP26]] to i32
1792 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]
1793 // CHECK3-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
1794 // CHECK3-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
1795 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1
1796 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1797 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP24]]
1798 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
1799 // CHECK3: omp.arraycpy.done7:
1800 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1801 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1802 // CHECK3: .omp.reduction.case2:
1803 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]]
1804 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP27]]
1805 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]
1806 // CHECK3: omp.arraycpy.body9:
1807 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]
1808 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]
1809 // CHECK3-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
1810 // CHECK3-NEXT: [[CONV12:%.*]] = sext i16 [[TMP28]] to i32
1811 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2
1812 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]]
1813 // CHECK3: atomic_cont:
1814 // CHECK3-NEXT: [[TMP29:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP34:%.*]], [[ATOMIC_CONT]] ]
1815 // CHECK3-NEXT: store i16 [[TMP29]], i16* [[_TMP13]], align 2
1816 // CHECK3-NEXT: [[TMP30:%.*]] = load i16, i16* [[_TMP13]], align 2
1817 // CHECK3-NEXT: [[CONV14:%.*]] = sext i16 [[TMP30]] to i32
1818 // CHECK3-NEXT: [[TMP31:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
1819 // CHECK3-NEXT: [[CONV15:%.*]] = sext i16 [[TMP31]] to i32
1820 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]
1821 // CHECK3-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16
1822 // CHECK3-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2
1823 // CHECK3-NEXT: [[TMP32:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2
1824 // CHECK3-NEXT: [[TMP33:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP29]], i16 [[TMP32]] monotonic monotonic, align 2
1825 // CHECK3-NEXT: [[TMP34]] = extractvalue { i16, i1 } [[TMP33]], 0
1826 // CHECK3-NEXT: [[TMP35:%.*]] = extractvalue { i16, i1 } [[TMP33]], 1
1827 // CHECK3-NEXT: br i1 [[TMP35]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]
1828 // CHECK3: atomic_exit:
1829 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1
1830 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1
1831 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP27]]
1832 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]
1833 // CHECK3: omp.arraycpy.done21:
1834 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1835 // CHECK3: .omp.reduction.default:
1836 // CHECK3-NEXT: [[TMP36:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1837 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP36]])
1838 // CHECK3-NEXT: ret void
1839 //
1840 //
1841 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1842 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
1843 // CHECK3-NEXT: entry:
1844 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1845 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1846 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1847 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1848 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1849 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]*
1850 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1851 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]*
1852 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
1853 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1854 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*
1855 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0
1856 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1857 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16*
1858 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1
1859 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
1860 // CHECK3-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64
1861 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]]
1862 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]]
1863 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1864 // CHECK3: omp.arraycpy.body:
1865 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1866 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1867 // CHECK3-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
1868 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32
1869 // CHECK3-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
1870 // CHECK3-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32
1871 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
1872 // CHECK3-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
1873 // CHECK3-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
1874 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1875 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1876 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
1877 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
1878 // CHECK3: omp.arraycpy.done4:
1879 // CHECK3-NEXT: ret void
1880 //
1881 //
1882 // CHECK3-LABEL: define {{[^@]+}}@main
1883 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] {
1884 // CHECK3-NEXT: entry:
1885 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1886 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
1887 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1888 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
1889 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @sivar)
1890 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
1891 // CHECK3-NEXT: ret i32 0
1892 //
1893 //
1894 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
1895 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 {
1896 // CHECK3-NEXT: entry:
1897 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1898 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
1899 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1900 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
1901 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1902 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
1903 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]])
1904 // CHECK3-NEXT: ret void
1905 //
1906 //
1907 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
1908 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1909 // CHECK3-NEXT: entry:
1910 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1911 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
1912 // CHECK3-NEXT: [[A2:%.*]] = alloca i32*, align 8
1913 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4
1914 // CHECK3-NEXT: [[C5:%.*]] = alloca i32*, align 8
1915 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1916 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
1917 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1918 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1919 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8
1920 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
1921 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
1922 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1923 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
1924 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4
1925 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
1926 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
1927 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 8
1928 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1929 // CHECK3-NEXT: store i32* [[A3]], i32** [[A2]], align 8
1930 // CHECK3-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
1931 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8
1932 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8
1933 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8
1934 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8
1935 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]])
1936 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B4]], align 4
1937 // CHECK3-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
1938 // CHECK3-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
1939 // CHECK3-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4
1940 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
1941 // CHECK3-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
1942 // CHECK3-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
1943 // CHECK3-NEXT: store i8 [[BF_SET10]], i8* [[B7]], align 4
1944 // CHECK3-NEXT: ret void
1945 //
1946 //
1947 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1948 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
1949 // CHECK3-NEXT: entry:
1950 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1951 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1952 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1953 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1954 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8
1955 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
1956 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8
1957 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8
1958 // CHECK3-NEXT: [[A2:%.*]] = alloca i32, align 4
1959 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8
1960 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4
1961 // CHECK3-NEXT: [[C5:%.*]] = alloca i32, align 4
1962 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8
1963 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1964 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8
1965 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1966 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1967 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1968 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1969 // CHECK3-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8
1970 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
1971 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1972 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1973 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
1974 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
1975 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8
1976 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8
1977 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
1978 // CHECK3-NEXT: store i32 0, i32* [[A2]], align 4
1979 // CHECK3-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8
1980 // CHECK3-NEXT: store i32 0, i32* [[B4]], align 4
1981 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
1982 // CHECK3-NEXT: store i32 0, i32* [[C5]], align 4
1983 // CHECK3-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8
1984 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1985 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP6]], align 8
1986 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
1987 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP3]], align 8
1988 // CHECK3-NEXT: store i32* [[TMP8]], i32** [[TMP7]], align 8
1989 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
1990 // CHECK3-NEXT: store i32* [[B4]], i32** [[TMP9]], align 8
1991 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
1992 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP6]], align 8
1993 // CHECK3-NEXT: store i32* [[TMP11]], i32** [[TMP10]], align 8
1994 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
1995 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1996 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[A2]] to i8*
1997 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8
1998 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1999 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[B4]] to i8*
2000 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8
2001 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
2002 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[C5]] to i8*
2003 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
2004 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2005 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
2006 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2007 // CHECK3-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]], i32 3, i64 24, i8* [[TMP20]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
2008 // CHECK3-NEXT: switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2009 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2010 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2011 // CHECK3-NEXT: ]
2012 // CHECK3: .omp.reduction.case1:
2013 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP4]], align 4
2014 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[A2]], align 4
2015 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
2016 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4
2017 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP2]], align 4
2018 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[B4]], align 4
2019 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2020 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[TMP2]], align 4
2021 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP5]], align 4
2022 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[C5]], align 4
2023 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
2024 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[TMP5]], align 4
2025 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2026 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2027 // CHECK3: .omp.reduction.case2:
2028 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[A2]], align 4
2029 // CHECK3-NEXT: [[TMP29:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP28]] monotonic, align 4
2030 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[B4]], align 4
2031 // CHECK3-NEXT: [[TMP31:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP30]] monotonic, align 4
2032 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[C5]], align 4
2033 // CHECK3-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP32]] monotonic, align 4
2034 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2035 // CHECK3: .omp.reduction.default:
2036 // CHECK3-NEXT: ret void
2037 //
2038 //
2039 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
2040 // CHECK3-SAME: (%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR0]] align 2 {
2041 // CHECK3-NEXT: entry:
2042 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8
2043 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8
2044 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8
2045 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0
2046 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8
2047 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
2048 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
2049 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2050 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
2051 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4
2052 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
2053 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8
2054 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2055 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
2056 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4
2057 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
2058 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8
2059 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2060 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
2061 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4
2062 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
2063 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8
2064 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
2065 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8
2066 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
2067 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[TMP15]], align 8
2068 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP12]], i32* [[TMP14]], i32* [[TMP16]])
2069 // CHECK3-NEXT: ret void
2070 //
2071 //
2072 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
2073 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
2074 // CHECK3-NEXT: entry:
2075 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
2076 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
2077 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
2078 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
2079 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
2080 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]*
2081 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
2082 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]*
2083 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0
2084 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2085 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2086 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0
2087 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
2088 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2089 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1
2090 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
2091 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
2092 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1
2093 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
2094 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
2095 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2
2096 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
2097 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
2098 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2
2099 // CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
2100 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32*
2101 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4
2102 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4
2103 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2104 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
2105 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4
2106 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4
2107 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
2108 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4
2109 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4
2110 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4
2111 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2112 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4
2113 // CHECK3-NEXT: ret void
2114 //
2115 //
2116 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
2117 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
2118 // CHECK3-NEXT: entry:
2119 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2120 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2121 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2122 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2123 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8
2124 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
2125 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8
2126 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8
2127 // CHECK3-NEXT: [[A2:%.*]] = alloca i32, align 4
2128 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8
2129 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4
2130 // CHECK3-NEXT: [[C5:%.*]] = alloca i32, align 4
2131 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8
2132 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8
2133 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2134 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2135 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2136 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2137 // CHECK3-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8
2138 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
2139 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2140 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2141 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
2142 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
2143 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8
2144 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8
2145 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
2146 // CHECK3-NEXT: store i32 -1, i32* [[A2]], align 4
2147 // CHECK3-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8
2148 // CHECK3-NEXT: store i32 -1, i32* [[B4]], align 4
2149 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
2150 // CHECK3-NEXT: store i32 -1, i32* [[C5]], align 4
2151 // CHECK3-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8
2152 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8
2153 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2154 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
2155 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4
2156 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4
2157 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP8]], -1
2158 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B4]], align 4
2159 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP6]], align 8
2160 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2161 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
2162 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4
2163 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2164 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i32* [[A2]] to i8*
2165 // CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
2166 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2167 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i32* [[B4]] to i8*
2168 // CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
2169 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
2170 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i32* [[C5]] to i8*
2171 // CHECK3-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
2172 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2173 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2174 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2175 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 3, i64 24, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.4, [8 x i32]* @.gomp_critical_user_.reduction.var)
2176 // CHECK3-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2177 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2178 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2179 // CHECK3-NEXT: ]
2180 // CHECK3: .omp.reduction.case1:
2181 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4
2182 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[A2]], align 4
2183 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP21]], [[TMP22]]
2184 // CHECK3-NEXT: store i32 [[AND]], i32* [[TMP4]], align 4
2185 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP2]], align 4
2186 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[B4]], align 4
2187 // CHECK3-NEXT: [[AND7:%.*]] = and i32 [[TMP23]], [[TMP24]]
2188 // CHECK3-NEXT: store i32 [[AND7]], i32* [[TMP2]], align 4
2189 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP5]], align 4
2190 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[C5]], align 4
2191 // CHECK3-NEXT: [[AND8:%.*]] = and i32 [[TMP25]], [[TMP26]]
2192 // CHECK3-NEXT: store i32 [[AND8]], i32* [[TMP5]], align 4
2193 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2194 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2195 // CHECK3: .omp.reduction.case2:
2196 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[A2]], align 4
2197 // CHECK3-NEXT: [[TMP28:%.*]] = atomicrmw and i32* [[TMP4]], i32 [[TMP27]] monotonic, align 4
2198 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[B4]], align 4
2199 // CHECK3-NEXT: [[TMP30:%.*]] = atomicrmw and i32* [[TMP2]], i32 [[TMP29]] monotonic, align 4
2200 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[C5]], align 4
2201 // CHECK3-NEXT: [[TMP32:%.*]] = atomicrmw and i32* [[TMP5]], i32 [[TMP31]] monotonic, align 4
2202 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2203 // CHECK3: .omp.reduction.default:
2204 // CHECK3-NEXT: ret void
2205 //
2206 //
2207 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.4
2208 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
2209 // CHECK3-NEXT: entry:
2210 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
2211 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
2212 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
2213 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
2214 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
2215 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]*
2216 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
2217 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]*
2218 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0
2219 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2220 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2221 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0
2222 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
2223 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2224 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1
2225 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
2226 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
2227 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1
2228 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
2229 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
2230 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2
2231 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
2232 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
2233 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2
2234 // CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
2235 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32*
2236 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4
2237 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4
2238 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP24]], [[TMP25]]
2239 // CHECK3-NEXT: store i32 [[AND]], i32* [[TMP11]], align 4
2240 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4
2241 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4
2242 // CHECK3-NEXT: [[AND2:%.*]] = and i32 [[TMP26]], [[TMP27]]
2243 // CHECK3-NEXT: store i32 [[AND2]], i32* [[TMP17]], align 4
2244 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4
2245 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4
2246 // CHECK3-NEXT: [[AND3:%.*]] = and i32 [[TMP28]], [[TMP29]]
2247 // CHECK3-NEXT: store i32 [[AND3]], i32* [[TMP23]], align 4
2248 // CHECK3-NEXT: ret void
2249 //
2250 //
2251 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5
2252 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR1]] {
2253 // CHECK3-NEXT: entry:
2254 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2255 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2256 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
2257 // CHECK3-NEXT: [[G1:%.*]] = alloca i32, align 128
2258 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8
2259 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
2260 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2261 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2262 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
2263 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 8
2264 // CHECK3-NEXT: store i32 0, i32* [[G1]], align 128
2265 // CHECK3-NEXT: store i32 1, i32* [[G1]], align 128
2266 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0
2267 // CHECK3-NEXT: store i32* [[G1]], i32** [[TMP1]], align 8
2268 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])
2269 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2270 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i32* [[G1]] to i8*
2271 // CHECK3-NEXT: store i8* [[TMP3]], i8** [[TMP2]], align 8
2272 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2273 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
2274 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2275 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1, i64 8, i8* [[TMP6]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
2276 // CHECK3-NEXT: switch i32 [[TMP7]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2277 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2278 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2279 // CHECK3-NEXT: ]
2280 // CHECK3: .omp.reduction.case1:
2281 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP0]], align 128
2282 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[G1]], align 128
2283 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2284 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 128
2285 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2286 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2287 // CHECK3: .omp.reduction.case2:
2288 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[G1]], align 128
2289 // CHECK3-NEXT: [[TMP11:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP10]] monotonic, align 4
2290 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2291 // CHECK3: .omp.reduction.default:
2292 // CHECK3-NEXT: ret void
2293 //
2294 //
2295 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
2296 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
2297 // CHECK3-NEXT: entry:
2298 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
2299 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
2300 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
2301 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
2302 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
2303 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
2304 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
2305 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
2306 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
2307 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2308 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2309 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
2310 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
2311 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2312 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 128
2313 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 128
2314 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2315 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128
2316 // CHECK3-NEXT: ret void
2317 //
2318 //
2319 // CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs
2320 // CHECK4-SAME: (i16* noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {
2321 // CHECK4-NEXT: entry:
2322 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8
2323 // CHECK4-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8
2324 // CHECK4-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8
2325 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i16*)* @.omp_outlined. to void (i32*, i32*, ...)*), i16* [[TMP0]])
2326 // CHECK4-NEXT: ret void
2327 //
2328 //
2329 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
2330 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i16* noundef [[X:%.*]]) #[[ATTR2:[0-9]+]] {
2331 // CHECK4-NEXT: entry:
2332 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2333 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2334 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8
2335 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2336 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2337 // CHECK4-NEXT: [[TMP:%.*]] = alloca i16*, align 8
2338 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8
2339 // CHECK4-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2
2340 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i16, align 2
2341 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2342 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2343 // CHECK4-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8
2344 // CHECK4-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8
2345 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP0]], i64 0
2346 // CHECK4-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8
2347 // CHECK4-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP1]], i64 0
2348 // CHECK4-NEXT: [[TMP2:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64
2349 // CHECK4-NEXT: [[TMP3:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64
2350 // CHECK4-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]
2351 // CHECK4-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
2352 // CHECK4-NEXT: [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1
2353 // CHECK4-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
2354 // CHECK4-NEXT: [[TMP8:%.*]] = call i8* @llvm.stacksave()
2355 // CHECK4-NEXT: store i8* [[TMP8]], i8** [[SAVED_STACK]], align 8
2356 // CHECK4-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16
2357 // CHECK4-NEXT: store i64 [[TMP6]], i64* [[__VLA_EXPR0]], align 8
2358 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP6]]
2359 // CHECK4-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP9]]
2360 // CHECK4-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
2361 // CHECK4: omp.arrayinit.body:
2362 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
2363 // CHECK4-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
2364 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2365 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
2366 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
2367 // CHECK4: omp.arrayinit.done:
2368 // CHECK4-NEXT: [[TMP10:%.*]] = load i16*, i16** [[X_ADDR]], align 8
2369 // CHECK4-NEXT: [[TMP11:%.*]] = ptrtoint i16* [[TMP10]] to i64
2370 // CHECK4-NEXT: [[TMP12:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64
2371 // CHECK4-NEXT: [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]
2372 // CHECK4-NEXT: [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64)
2373 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP14]]
2374 // CHECK4-NEXT: store i16* [[TMP15]], i16** [[TMP]], align 8
2375 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2376 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i16* [[VLA]] to i8*
2377 // CHECK4-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
2378 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2379 // CHECK4-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP6]] to i8*
2380 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8
2381 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2382 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2383 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2384 // CHECK4-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP21]], i32 1, i64 16, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
2385 // CHECK4-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2386 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2387 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2388 // CHECK4-NEXT: ]
2389 // CHECK4: .omp.reduction.case1:
2390 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]]
2391 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP24]]
2392 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2393 // CHECK4: omp.arraycpy.body:
2394 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2395 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2396 // CHECK4-NEXT: [[TMP25:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
2397 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP25]] to i32
2398 // CHECK4-NEXT: [[TMP26:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
2399 // CHECK4-NEXT: [[CONV3:%.*]] = sext i16 [[TMP26]] to i32
2400 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]
2401 // CHECK4-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
2402 // CHECK4-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
2403 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1
2404 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2405 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP24]]
2406 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
2407 // CHECK4: omp.arraycpy.done7:
2408 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2409 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2410 // CHECK4: .omp.reduction.case2:
2411 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]]
2412 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP27]]
2413 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]
2414 // CHECK4: omp.arraycpy.body9:
2415 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]
2416 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]
2417 // CHECK4-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
2418 // CHECK4-NEXT: [[CONV12:%.*]] = sext i16 [[TMP28]] to i32
2419 // CHECK4-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2
2420 // CHECK4-NEXT: br label [[ATOMIC_CONT:%.*]]
2421 // CHECK4: atomic_cont:
2422 // CHECK4-NEXT: [[TMP29:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP34:%.*]], [[ATOMIC_CONT]] ]
2423 // CHECK4-NEXT: store i16 [[TMP29]], i16* [[_TMP13]], align 2
2424 // CHECK4-NEXT: [[TMP30:%.*]] = load i16, i16* [[_TMP13]], align 2
2425 // CHECK4-NEXT: [[CONV14:%.*]] = sext i16 [[TMP30]] to i32
2426 // CHECK4-NEXT: [[TMP31:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
2427 // CHECK4-NEXT: [[CONV15:%.*]] = sext i16 [[TMP31]] to i32
2428 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]
2429 // CHECK4-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16
2430 // CHECK4-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2
2431 // CHECK4-NEXT: [[TMP32:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2
2432 // CHECK4-NEXT: [[TMP33:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP29]], i16 [[TMP32]] monotonic monotonic, align 2
2433 // CHECK4-NEXT: [[TMP34]] = extractvalue { i16, i1 } [[TMP33]], 0
2434 // CHECK4-NEXT: [[TMP35:%.*]] = extractvalue { i16, i1 } [[TMP33]], 1
2435 // CHECK4-NEXT: br i1 [[TMP35]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]
2436 // CHECK4: atomic_exit:
2437 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1
2438 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1
2439 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP27]]
2440 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]
2441 // CHECK4: omp.arraycpy.done21:
2442 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2443 // CHECK4: .omp.reduction.default:
2444 // CHECK4-NEXT: [[TMP36:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2445 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP36]])
2446 // CHECK4-NEXT: ret void
2447 //
2448 //
2449 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
2450 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
2451 // CHECK4-NEXT: entry:
2452 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
2453 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
2454 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
2455 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
2456 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
2457 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]*
2458 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
2459 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]*
2460 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
2461 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2462 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16*
2463 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0
2464 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
2465 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16*
2466 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1
2467 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
2468 // CHECK4-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64
2469 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]]
2470 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]]
2471 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2472 // CHECK4: omp.arraycpy.body:
2473 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2474 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2475 // CHECK4-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
2476 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32
2477 // CHECK4-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
2478 // CHECK4-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32
2479 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
2480 // CHECK4-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
2481 // CHECK4-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
2482 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2483 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2484 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
2485 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
2486 // CHECK4: omp.arraycpy.done4:
2487 // CHECK4-NEXT: ret void
2488 //
2489 //
2490 // CHECK4-LABEL: define {{[^@]+}}@main
2491 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] {
2492 // CHECK4-NEXT: entry:
2493 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2494 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
2495 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
2496 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @sivar)
2497 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8
2498 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)*
2499 // CHECK4-NEXT: call void [[TMP1]](i8* noundef bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*))
2500 // CHECK4-NEXT: ret i32 0
2501 //
2502 //
2503 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
2504 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 {
2505 // CHECK4-NEXT: entry:
2506 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2507 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
2508 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2509 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
2510 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2511 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
2512 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]])
2513 // CHECK4-NEXT: ret void
2514 //
2515 //
2516 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke
2517 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {
2518 // CHECK4-NEXT: entry:
2519 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
2520 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8
2521 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2522 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*
2523 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8
2524 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* @g)
2525 // CHECK4-NEXT: ret void
2526 //
2527 //
2528 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
2529 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] {
2530 // CHECK4-NEXT: entry:
2531 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2532 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2533 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8
2534 // CHECK4-NEXT: [[G1:%.*]] = alloca i32, align 128
2535 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, align 128
2536 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
2537 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2538 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2539 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8
2540 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 8
2541 // CHECK4-NEXT: store i32 0, i32* [[G1]], align 128
2542 // CHECK4-NEXT: store i32 1, i32* [[G1]], align 128
2543 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 0
2544 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128
2545 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 1
2546 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
2547 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 2
2548 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4
2549 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 3
2550 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16
2551 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 4
2552 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.2 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
2553 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 6
2554 // CHECK4-NEXT: [[TMP1:%.*]] = load volatile i32, i32* [[G1]], align 128
2555 // CHECK4-NEXT: store volatile i32 [[TMP1]], i32* [[BLOCK_CAPTURED]], align 128
2556 // CHECK4-NEXT: [[TMP2:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]] to void ()*
2557 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP2]] to %struct.__block_literal_generic*
2558 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
2559 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
2560 // CHECK4-NEXT: [[TMP5:%.*]] = load i8*, i8** [[TMP3]], align 8
2561 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to void (i8*)*
2562 // CHECK4-NEXT: call void [[TMP6]](i8* noundef [[TMP4]])
2563 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2564 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i32* [[G1]] to i8*
2565 // CHECK4-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 8
2566 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2567 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2568 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2569 // CHECK4-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 1, i64 8, i8* [[TMP11]], void (i8*, i8*)* @.omp.reduction.reduction_func.3, [8 x i32]* @.gomp_critical_user_.reduction.var)
2570 // CHECK4-NEXT: switch i32 [[TMP12]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2571 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2572 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2573 // CHECK4-NEXT: ]
2574 // CHECK4: .omp.reduction.case1:
2575 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP0]], align 128
2576 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[G1]], align 128
2577 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2578 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 128
2579 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2580 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2581 // CHECK4: .omp.reduction.case2:
2582 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[G1]], align 128
2583 // CHECK4-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP15]] monotonic, align 4
2584 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2585 // CHECK4: .omp.reduction.default:
2586 // CHECK4-NEXT: ret void
2587 //
2588 //
2589 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke
2590 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {
2591 // CHECK4-NEXT: entry:
2592 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
2593 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>*, align 8
2594 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2595 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>*
2596 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>** [[BLOCK_ADDR]], align 8
2597 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 6
2598 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128
2599 // CHECK4-NEXT: ret void
2600 //
2601 //
2602 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.3
2603 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] {
2604 // CHECK4-NEXT: entry:
2605 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
2606 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
2607 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
2608 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
2609 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
2610 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
2611 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
2612 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
2613 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
2614 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2615 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2616 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
2617 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
2618 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2619 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 128
2620 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 128
2621 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2622 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128
2623 // CHECK4-NEXT: ret void
2624 //
2625 //
2626 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
2627 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8]] align 2 {
2628 // CHECK4-NEXT: entry:
2629 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2630 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
2631 // CHECK4-NEXT: [[A2:%.*]] = alloca i32*, align 8
2632 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4
2633 // CHECK4-NEXT: [[C5:%.*]] = alloca i32*, align 8
2634 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2635 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
2636 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2637 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2638 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8
2639 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
2640 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
2641 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2642 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
2643 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4
2644 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
2645 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
2646 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 8
2647 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2648 // CHECK4-NEXT: store i32* [[A3]], i32** [[A2]], align 8
2649 // CHECK4-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
2650 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8
2651 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8
2652 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8
2653 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8
2654 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]])
2655 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B4]], align 4
2656 // CHECK4-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
2657 // CHECK4-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
2658 // CHECK4-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4
2659 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
2660 // CHECK4-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
2661 // CHECK4-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
2662 // CHECK4-NEXT: store i8 [[BF_SET10]], i8* [[B7]], align 4
2663 // CHECK4-NEXT: ret void
2664 //
2665 //
2666 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4
2667 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
2668 // CHECK4-NEXT: entry:
2669 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2670 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2671 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2672 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2673 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8
2674 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
2675 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8
2676 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8
2677 // CHECK4-NEXT: [[A2:%.*]] = alloca i32, align 4
2678 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8
2679 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4
2680 // CHECK4-NEXT: [[C5:%.*]] = alloca i32, align 4
2681 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8
2682 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8
2683 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8
2684 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2685 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2686 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2687 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2688 // CHECK4-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8
2689 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
2690 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2691 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2692 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
2693 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
2694 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8
2695 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8
2696 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
2697 // CHECK4-NEXT: store i32 0, i32* [[A2]], align 4
2698 // CHECK4-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8
2699 // CHECK4-NEXT: store i32 0, i32* [[B4]], align 4
2700 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
2701 // CHECK4-NEXT: store i32 0, i32* [[C5]], align 4
2702 // CHECK4-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8
2703 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0
2704 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
2705 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1
2706 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
2707 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2
2708 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4
2709 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3
2710 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8
2711 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4
2712 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.7 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
2713 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5
2714 // CHECK4-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8
2715 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
2716 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8
2717 // CHECK4-NEXT: store i32* [[TMP6]], i32** [[BLOCK_CAPTURED]], align 8
2718 // CHECK4-NEXT: [[BLOCK_CAPTURED7:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
2719 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4
2720 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[BLOCK_CAPTURED7]], align 8
2721 // CHECK4-NEXT: [[BLOCK_CAPTURED8:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
2722 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP6]], align 8
2723 // CHECK4-NEXT: store i32* [[TMP8]], i32** [[BLOCK_CAPTURED8]], align 8
2724 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()*
2725 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP9]] to %struct.__block_literal_generic*
2726 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
2727 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
2728 // CHECK4-NEXT: [[TMP12:%.*]] = load i8*, i8** [[TMP10]], align 8
2729 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP12]] to void (i8*)*
2730 // CHECK4-NEXT: call void [[TMP13]](i8* noundef [[TMP11]])
2731 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2732 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i32* [[A2]] to i8*
2733 // CHECK4-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8
2734 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2735 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i32* [[B4]] to i8*
2736 // CHECK4-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
2737 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
2738 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i32* [[C5]] to i8*
2739 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8
2740 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2741 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
2742 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2743 // CHECK4-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], i32 3, i64 24, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func.8, [8 x i32]* @.gomp_critical_user_.reduction.var)
2744 // CHECK4-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2745 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2746 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2747 // CHECK4-NEXT: ]
2748 // CHECK4: .omp.reduction.case1:
2749 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP4]], align 4
2750 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[A2]], align 4
2751 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2752 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4
2753 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP2]], align 4
2754 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[B4]], align 4
2755 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
2756 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[TMP2]], align 4
2757 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP5]], align 4
2758 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[C5]], align 4
2759 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2760 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[TMP5]], align 4
2761 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2762 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2763 // CHECK4: .omp.reduction.case2:
2764 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[A2]], align 4
2765 // CHECK4-NEXT: [[TMP31:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP30]] monotonic, align 4
2766 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[B4]], align 4
2767 // CHECK4-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP32]] monotonic, align 4
2768 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[C5]], align 4
2769 // CHECK4-NEXT: [[TMP35:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP34]] monotonic, align 4
2770 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2771 // CHECK4: .omp.reduction.default:
2772 // CHECK4-NEXT: ret void
2773 //
2774 //
2775 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2
2776 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {
2777 // CHECK4-NEXT: entry:
2778 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
2779 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8
2780 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2781 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*
2782 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8
2783 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5
2784 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8
2785 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
2786 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8
2787 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2788 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2789 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
2790 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
2791 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8
2792 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1
2793 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8
2794 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
2795 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8
2796 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2797 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
2798 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4
2799 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6
2800 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8
2801 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8
2802 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7
2803 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8
2804 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]], i32* [[BLOCK_CAPTURE_ADDR4]], i32* [[TMP6]])
2805 // CHECK4-NEXT: ret void
2806 //
2807 //
2808 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5
2809 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
2810 // CHECK4-NEXT: entry:
2811 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2812 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2813 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2814 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2815 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8
2816 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
2817 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8
2818 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8
2819 // CHECK4-NEXT: [[A2:%.*]] = alloca i32, align 4
2820 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8
2821 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4
2822 // CHECK4-NEXT: [[C5:%.*]] = alloca i32, align 4
2823 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8
2824 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8
2825 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2826 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2827 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2828 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2829 // CHECK4-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8
2830 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8
2831 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2832 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2833 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8
2834 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8
2835 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8
2836 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8
2837 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8
2838 // CHECK4-NEXT: store i32 0, i32* [[A2]], align 4
2839 // CHECK4-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8
2840 // CHECK4-NEXT: store i32 0, i32* [[B4]], align 4
2841 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8
2842 // CHECK4-NEXT: store i32 0, i32* [[C5]], align 4
2843 // CHECK4-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8
2844 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8
2845 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
2846 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1
2847 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4
2848 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4
2849 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP8]], -1
2850 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B4]], align 4
2851 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP6]], align 8
2852 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
2853 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
2854 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4
2855 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2856 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i32* [[A2]] to i8*
2857 // CHECK4-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
2858 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2859 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i32* [[B4]] to i8*
2860 // CHECK4-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
2861 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
2862 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i32* [[C5]] to i8*
2863 // CHECK4-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
2864 // CHECK4-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2865 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2866 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
2867 // CHECK4-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 3, i64 24, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
2868 // CHECK4-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2869 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2870 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2871 // CHECK4-NEXT: ]
2872 // CHECK4: .omp.reduction.case1:
2873 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4
2874 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[A2]], align 4
2875 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2876 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4
2877 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP2]], align 4
2878 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[B4]], align 4
2879 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
2880 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[TMP2]], align 4
2881 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP5]], align 4
2882 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[C5]], align 4
2883 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
2884 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[TMP5]], align 4
2885 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var)
2886 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2887 // CHECK4: .omp.reduction.case2:
2888 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[A2]], align 4
2889 // CHECK4-NEXT: [[TMP28:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP27]] monotonic, align 4
2890 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[B4]], align 4
2891 // CHECK4-NEXT: [[TMP30:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP29]] monotonic, align 4
2892 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[C5]], align 4
2893 // CHECK4-NEXT: [[TMP32:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP31]] monotonic, align 4
2894 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
2895 // CHECK4: .omp.reduction.default:
2896 // CHECK4-NEXT: ret void
2897 //
2898 //
2899 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
2900 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] {
2901 // CHECK4-NEXT: entry:
2902 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
2903 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
2904 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
2905 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
2906 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
2907 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]*
2908 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
2909 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]*
2910 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0
2911 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2912 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2913 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0
2914 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
2915 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2916 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1
2917 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
2918 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
2919 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1
2920 // CHECK4-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
2921 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
2922 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2
2923 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
2924 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
2925 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2
2926 // CHECK4-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
2927 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32*
2928 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4
2929 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4
2930 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2931 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
2932 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4
2933 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4
2934 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
2935 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4
2936 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4
2937 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4
2938 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2939 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4
2940 // CHECK4-NEXT: ret void
2941 //
2942 //
2943 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.8
2944 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] {
2945 // CHECK4-NEXT: entry:
2946 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
2947 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
2948 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
2949 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
2950 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
2951 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]*
2952 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
2953 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]*
2954 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0
2955 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
2956 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
2957 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0
2958 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
2959 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
2960 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1
2961 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
2962 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
2963 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1
2964 // CHECK4-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
2965 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
2966 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2
2967 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
2968 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
2969 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2
2970 // CHECK4-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
2971 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32*
2972 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4
2973 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4
2974 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2975 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
2976 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4
2977 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4
2978 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
2979 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4
2980 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4
2981 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4
2982 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2983 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4
2984 // CHECK4-NEXT: ret void
2985 //
2986