1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 volatile int g __attribute__((aligned(128))) = 1212; 18 19 template <class T> 20 struct S { 21 T f; 22 S(T a) : f(a + g) {} 23 S() : f(g) {} 24 operator T() { return T(); } 25 S &operator&(const S &) { return *this; } 26 ~S() {} 27 }; 28 29 struct SS { 30 int a; 31 int b : 4; 32 int &c; 33 SS(int &d) : a(0), b(0), c(d) { 34 #pragma omp parallel reduction(default, +: a, b, c) 35 #ifdef LAMBDA 36 [&]() { 37 ++this->a, --b, (this)->c /= 1; 38 #pragma omp parallel reduction(&: a, b, c) 39 ++(this)->a, --b, this->c /= 1; 40 }(); 41 #elif defined(BLOCKS) 42 ^{ 43 ++a; 44 --this->b; 45 (this)->c /= 1; 46 #pragma omp parallel reduction(-: a, b, c) 47 ++(this)->a, --b, this->c /= 1; 48 }(); 49 #else 50 ++this->a, --b, c /= 1; 51 #endif 52 } 53 }; 54 55 template<typename T> 56 struct SST { 57 T a; 58 SST() : a(T()) { 59 #pragma omp parallel reduction(*: a) 60 #ifdef LAMBDA 61 [&]() { 62 [&]() { 63 ++this->a; 64 #pragma omp parallel reduction(&& :a) 65 ++(this)->a; 66 }(); 67 }(); 68 #elif defined(BLOCKS) 69 ^{ 70 ^{ 71 ++a; 72 #pragma omp parallel reduction(|: a) 73 ++(this)->a; 74 }(); 75 }(); 76 #else 77 ++(this)->a; 78 #endif 79 } 80 }; 81 82 83 void foo_array_sect(short x[1]) { 84 #pragma omp parallel reduction(default, + : x[:]) 85 {} 86 } 87 88 template <typename T> 89 T tmain() { 90 T t; 91 S<T> test; 92 SST<T> sst; 93 T t_var __attribute__((aligned(128))) = T(), t_var1 __attribute__((aligned(128))); 94 T vec[] = {1, 2}; 95 S<T> s_arr[] = {1, 2}; 96 S<T> var __attribute__((aligned(128))) (3), var1 __attribute__((aligned(128))); 97 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1) 98 { 99 vec[0] = t_var; 100 s_arr[0] = var; 101 } 102 return T(); 103 } 104 105 int sivar; 106 int main() { 107 SS ss(sivar); 108 #ifdef LAMBDA 109 [&]() { 110 #pragma omp parallel reduction(+:g) 111 { 112 113 114 115 116 // Reduction list for runtime. 117 118 g = 1; 119 120 [&]() { 121 g = 2; 122 }(); 123 } 124 }(); 125 return 0; 126 #elif defined(BLOCKS) 127 ^{ 128 #pragma omp parallel reduction(-:g) 129 { 130 131 // Reduction list for runtime. 132 133 g = 1; 134 135 ^{ 136 g = 2; 137 }(); 138 } 139 }(); 140 return 0; 141 142 143 #else 144 S<float> test; 145 float t_var = 0, t_var1; 146 int vec[] = {1, 2}; 147 S<float> s_arr[] = {1, 2}; 148 S<float> var(3), var1; 149 float _Complex cf; 150 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1) 151 { 152 vec[0] = t_var; 153 s_arr[0] = var; 154 } 155 if (var1) 156 #pragma omp parallel reduction(+ : t_var) reduction(& : var) reduction(&& : var1) reduction(min : t_var1) 157 while (1) { 158 vec[0] = t_var; 159 s_arr[0] = var; 160 } 161 #pragma omp parallel reduction(+ : cf) 162 ; 163 return tmain<int>(); 164 #endif 165 } 166 167 168 // Reduction list for runtime. 169 170 171 172 // For + reduction operation initial value of private variable is 0. 173 174 // For & reduction operation initial value of private variable is ones in all bits. 175 176 // For && reduction operation initial value of private variable is 1.0. 177 178 // For min reduction operation initial value of private variable is largest repesentable value. 179 180 // Skip checks for internal operations. 181 182 // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]}; 183 184 185 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>); 186 187 188 // switch(res) 189 190 // case 1: 191 // t_var += t_var_reduction; 192 193 // var = var.operator &(var_reduction); 194 195 // var1 = var1.operator &&(var1_reduction); 196 197 // t_var1 = min(t_var1, t_var1_reduction); 198 199 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>); 200 201 // break; 202 203 // case 2: 204 // t_var += t_var_reduction; 205 206 // var = var.operator &(var_reduction); 207 208 // var1 = var1.operator &&(var1_reduction); 209 210 // t_var1 = min(t_var1, t_var1_reduction); 211 212 // break; 213 214 215 // void reduce_func(void *lhs[<n>], void *rhs[<n>]) { 216 // *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]); 217 // ... 218 // *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1], 219 // *(Type<n>-1*)rhs[<n>-1]); 220 // } 221 // t_var_lhs = (float*)lhs[0]; 222 // t_var_rhs = (float*)rhs[0]; 223 224 // var_lhs = (S<float>*)lhs[1]; 225 // var_rhs = (S<float>*)rhs[1]; 226 227 // var1_lhs = (S<float>*)lhs[2]; 228 // var1_rhs = (S<float>*)rhs[2]; 229 230 // t_var1_lhs = (float*)lhs[3]; 231 // t_var1_rhs = (float*)rhs[3]; 232 233 // t_var_lhs += t_var_rhs; 234 235 // var_lhs = var_lhs.operator &(var_rhs); 236 237 // var1_lhs = var1_lhs.operator &&(var1_rhs); 238 239 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs); 240 241 242 243 244 // For + reduction operation initial value of private variable is 0. 245 246 // For & reduction operation initial value of private variable is ones in all bits. 247 248 // For && reduction operation initial value of private variable is 1.0. 249 250 // For min reduction operation initial value of private variable is largest repesentable value. 251 252 253 254 255 256 257 // Reduction list for runtime. 258 259 260 261 // For + reduction operation initial value of private variable is 0. 262 263 // For & reduction operation initial value of private variable is ones in all bits. 264 265 // For && reduction operation initial value of private variable is 1.0. 266 267 // For min reduction operation initial value of private variable is largest repesentable value. 268 269 // Skip checks for internal operations. 270 271 // void *RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]}; 272 273 274 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>); 275 276 277 // switch(res) 278 279 // case 1: 280 // t_var += t_var_reduction; 281 282 // var = var.operator &(var_reduction); 283 284 // var1 = var1.operator &&(var1_reduction); 285 286 // t_var1 = min(t_var1, t_var1_reduction); 287 288 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>); 289 290 // break; 291 292 // case 2: 293 // t_var += t_var_reduction; 294 295 // var = var.operator &(var_reduction); 296 297 // var1 = var1.operator &&(var1_reduction); 298 299 // t_var1 = min(t_var1, t_var1_reduction); 300 301 // break; 302 303 304 // void reduce_func(void *lhs[<n>], void *rhs[<n>]) { 305 // *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]); 306 // ... 307 // *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1], 308 // *(Type<n>-1*)rhs[<n>-1]); 309 // } 310 // t_var_lhs = (i{{[0-9]+}}*)lhs[0]; 311 // t_var_rhs = (i{{[0-9]+}}*)rhs[0]; 312 313 // var_lhs = (S<i{{[0-9]+}}>*)lhs[1]; 314 // var_rhs = (S<i{{[0-9]+}}>*)rhs[1]; 315 316 // var1_lhs = (S<i{{[0-9]+}}>*)lhs[2]; 317 // var1_rhs = (S<i{{[0-9]+}}>*)rhs[2]; 318 319 // t_var1_lhs = (i{{[0-9]+}}*)lhs[3]; 320 // t_var1_rhs = (i{{[0-9]+}}*)rhs[3]; 321 322 // t_var_lhs += t_var_rhs; 323 324 // var_lhs = var_lhs.operator &(var_rhs); 325 326 // var1_lhs = var1_lhs.operator &&(var1_rhs); 327 328 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs); 329 330 #endif 331 // CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 332 // CHECK1-SAME: (i16* noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] { 333 // CHECK1-NEXT: entry: 334 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 335 // CHECK1-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 336 // CHECK1-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 337 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i16*)* @.omp_outlined. to void (i32*, i32*, ...)*), i16* [[TMP0]]) 338 // CHECK1-NEXT: ret void 339 // 340 // 341 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 342 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i16* noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] { 343 // CHECK1-NEXT: entry: 344 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 345 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 346 // CHECK1-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 347 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 348 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 349 // CHECK1-NEXT: [[TMP:%.*]] = alloca i16*, align 8 350 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 351 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 352 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 353 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 354 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 355 // CHECK1-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 356 // CHECK1-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 357 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP0]], i64 0 358 // CHECK1-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 359 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP1]], i64 0 360 // CHECK1-NEXT: [[TMP2:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 361 // CHECK1-NEXT: [[TMP3:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 362 // CHECK1-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]] 363 // CHECK1-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 364 // CHECK1-NEXT: [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1 365 // CHECK1-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 366 // CHECK1-NEXT: [[TMP8:%.*]] = call i8* @llvm.stacksave() 367 // CHECK1-NEXT: store i8* [[TMP8]], i8** [[SAVED_STACK]], align 8 368 // CHECK1-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16 369 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[__VLA_EXPR0]], align 8 370 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP6]] 371 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP9]] 372 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 373 // CHECK1: omp.arrayinit.body: 374 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 375 // CHECK1-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 376 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 377 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 378 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 379 // CHECK1: omp.arrayinit.done: 380 // CHECK1-NEXT: [[TMP10:%.*]] = load i16*, i16** [[X_ADDR]], align 8 381 // CHECK1-NEXT: [[TMP11:%.*]] = ptrtoint i16* [[TMP10]] to i64 382 // CHECK1-NEXT: [[TMP12:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 383 // CHECK1-NEXT: [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]] 384 // CHECK1-NEXT: [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 385 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP14]] 386 // CHECK1-NEXT: store i16* [[TMP15]], i16** [[TMP]], align 8 387 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 388 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i16* [[VLA]] to i8* 389 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 390 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 391 // CHECK1-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP6]] to i8* 392 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 393 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 394 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 395 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 396 // CHECK1-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP21]], i32 1, i64 16, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 397 // CHECK1-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 398 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 399 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 400 // CHECK1-NEXT: ] 401 // CHECK1: .omp.reduction.case1: 402 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 403 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP24]] 404 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 405 // CHECK1: omp.arraycpy.body: 406 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 407 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 408 // CHECK1-NEXT: [[TMP25:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 409 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP25]] to i32 410 // CHECK1-NEXT: [[TMP26:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 411 // CHECK1-NEXT: [[CONV3:%.*]] = sext i16 [[TMP26]] to i32 412 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 413 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 414 // CHECK1-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 415 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 416 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 417 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP24]] 418 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 419 // CHECK1: omp.arraycpy.done7: 420 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var) 421 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 422 // CHECK1: .omp.reduction.case2: 423 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 424 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP27]] 425 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 426 // CHECK1: omp.arraycpy.body9: 427 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 428 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 429 // CHECK1-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 430 // CHECK1-NEXT: [[CONV12:%.*]] = sext i16 [[TMP28]] to i32 431 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 432 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 433 // CHECK1: atomic_cont: 434 // CHECK1-NEXT: [[TMP29:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP34:%.*]], [[ATOMIC_CONT]] ] 435 // CHECK1-NEXT: store i16 [[TMP29]], i16* [[_TMP13]], align 2 436 // CHECK1-NEXT: [[TMP30:%.*]] = load i16, i16* [[_TMP13]], align 2 437 // CHECK1-NEXT: [[CONV14:%.*]] = sext i16 [[TMP30]] to i32 438 // CHECK1-NEXT: [[TMP31:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 439 // CHECK1-NEXT: [[CONV15:%.*]] = sext i16 [[TMP31]] to i32 440 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 441 // CHECK1-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 442 // CHECK1-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 443 // CHECK1-NEXT: [[TMP32:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 444 // CHECK1-NEXT: [[TMP33:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP29]], i16 [[TMP32]] monotonic monotonic, align 2 445 // CHECK1-NEXT: [[TMP34]] = extractvalue { i16, i1 } [[TMP33]], 0 446 // CHECK1-NEXT: [[TMP35:%.*]] = extractvalue { i16, i1 } [[TMP33]], 1 447 // CHECK1-NEXT: br i1 [[TMP35]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 448 // CHECK1: atomic_exit: 449 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 450 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 451 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP27]] 452 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 453 // CHECK1: omp.arraycpy.done21: 454 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 455 // CHECK1: .omp.reduction.default: 456 // CHECK1-NEXT: [[TMP36:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 457 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP36]]) 458 // CHECK1-NEXT: ret void 459 // 460 // 461 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 462 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 463 // CHECK1-NEXT: entry: 464 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 465 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 466 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 467 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 468 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 469 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 470 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 471 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 472 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 473 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 474 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 475 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 476 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 477 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 478 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 479 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 480 // CHECK1-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 481 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 482 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 483 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 484 // CHECK1: omp.arraycpy.body: 485 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 486 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 487 // CHECK1-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 488 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 489 // CHECK1-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 490 // CHECK1-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 491 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 492 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 493 // CHECK1-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 494 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 495 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 496 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 497 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 498 // CHECK1: omp.arraycpy.done4: 499 // CHECK1-NEXT: ret void 500 // 501 // 502 // CHECK1-LABEL: define {{[^@]+}}@main 503 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] { 504 // CHECK1-NEXT: entry: 505 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 506 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 507 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 508 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca float, align 4 509 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 510 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 511 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 512 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 513 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 514 // CHECK1-NEXT: [[CF:%.*]] = alloca { float, float }, align 4 515 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 516 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @sivar) 517 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 518 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 519 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 520 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 521 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 522 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 523 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 524 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 525 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00) 526 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) 527 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, float*, [2 x %struct.S]*, %struct.S*, %struct.S*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], float* [[T_VAR]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], %struct.S* [[VAR1]], float* [[T_VAR1]]) 528 // CHECK1-NEXT: [[CALL:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) 529 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL]], 0.000000e+00 530 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 531 // CHECK1: if.then: 532 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, float*, [2 x %struct.S]*, %struct.S*, %struct.S*, float*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], float* [[T_VAR]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], %struct.S* [[VAR1]], float* [[T_VAR1]]) 533 // CHECK1-NEXT: br label [[IF_END]] 534 // CHECK1: if.end: 535 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { float, float }*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), { float, float }* [[CF]]) 536 // CHECK1-NEXT: [[CALL1:%.*]] = call noundef i32 @_Z5tmainIiET_v() 537 // CHECK1-NEXT: store i32 [[CALL1]], i32* [[RETVAL]], align 4 538 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5:[0-9]+]] 539 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 540 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 541 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 542 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 543 // CHECK1: arraydestroy.body: 544 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[IF_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 545 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 546 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 547 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 548 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 549 // CHECK1: arraydestroy.done2: 550 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 551 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 552 // CHECK1-NEXT: ret i32 [[TMP2]] 553 // 554 // 555 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 556 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 { 557 // CHECK1-NEXT: entry: 558 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 559 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 560 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 561 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 562 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 563 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 564 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 565 // CHECK1-NEXT: ret void 566 // 567 // 568 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 569 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 570 // CHECK1-NEXT: entry: 571 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 572 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 573 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 574 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 575 // CHECK1-NEXT: ret void 576 // 577 // 578 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 579 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 580 // CHECK1-NEXT: entry: 581 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 582 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 583 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 584 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 585 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 586 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 587 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 588 // CHECK1-NEXT: ret void 589 // 590 // 591 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 592 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] { 593 // CHECK1-NEXT: entry: 594 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 595 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 596 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 597 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca float*, align 8 598 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 599 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 600 // CHECK1-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S*, align 8 601 // CHECK1-NEXT: [[T_VAR1_ADDR:%.*]] = alloca float*, align 8 602 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca float, align 4 603 // CHECK1-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4 604 // CHECK1-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4 605 // CHECK1-NEXT: [[T_VAR15:%.*]] = alloca float, align 4 606 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 607 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S]], align 4 608 // CHECK1-NEXT: [[REF_TMP12:%.*]] = alloca [[STRUCT_S]], align 4 609 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca float, align 4 610 // CHECK1-NEXT: [[TMP:%.*]] = alloca float, align 4 611 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 612 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 613 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 614 // CHECK1-NEXT: store float* [[T_VAR]], float** [[T_VAR_ADDR]], align 8 615 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 616 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 617 // CHECK1-NEXT: store %struct.S* [[VAR1]], %struct.S** [[VAR1_ADDR]], align 8 618 // CHECK1-NEXT: store float* [[T_VAR1]], float** [[T_VAR1_ADDR]], align 8 619 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 620 // CHECK1-NEXT: [[TMP1:%.*]] = load float*, float** [[T_VAR_ADDR]], align 8 621 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 622 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 623 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR1_ADDR]], align 8 624 // CHECK1-NEXT: [[TMP5:%.*]] = load float*, float** [[T_VAR1_ADDR]], align 8 625 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR2]], align 4 626 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 627 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 628 // CHECK1-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR15]], align 4 629 // CHECK1-NEXT: [[TMP6:%.*]] = load float, float* [[T_VAR2]], align 4 630 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32 631 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0 632 // CHECK1-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 633 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i64 0, i64 0 634 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 635 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR3]] to i8* 636 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false) 637 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 638 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast float* [[T_VAR2]] to i8* 639 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8 640 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 641 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR3]] to i8* 642 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 643 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 644 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR14]] to i8* 645 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 646 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 647 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast float* [[T_VAR15]] to i8* 648 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 649 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 650 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 651 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 652 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 4, i64 32, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 653 // CHECK1-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 654 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 655 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 656 // CHECK1-NEXT: ] 657 // CHECK1: .omp.reduction.case1: 658 // CHECK1-NEXT: [[TMP21:%.*]] = load float, float* [[TMP1]], align 4 659 // CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[T_VAR2]], align 4 660 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP21]], [[TMP22]] 661 // CHECK1-NEXT: store float [[ADD]], float* [[TMP1]], align 4 662 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 663 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 664 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[CALL]] to i8* 665 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP23]], i8* align 4 [[TMP24]], i64 4, i1 false) 666 // CHECK1-NEXT: [[CALL7:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 667 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL7]], 0.000000e+00 668 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 669 // CHECK1: land.rhs: 670 // CHECK1-NEXT: [[CALL8:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 671 // CHECK1-NEXT: [[TOBOOL9:%.*]] = fcmp une float [[CALL8]], 0.000000e+00 672 // CHECK1-NEXT: br label [[LAND_END]] 673 // CHECK1: land.end: 674 // CHECK1-NEXT: [[TMP25:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ] 675 // CHECK1-NEXT: [[CONV10:%.*]] = uitofp i1 [[TMP25]] to float 676 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV10]]) 677 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 678 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 679 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 680 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 681 // CHECK1-NEXT: [[TMP28:%.*]] = load float, float* [[TMP5]], align 4 682 // CHECK1-NEXT: [[TMP29:%.*]] = load float, float* [[T_VAR15]], align 4 683 // CHECK1-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP28]], [[TMP29]] 684 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 685 // CHECK1: cond.true: 686 // CHECK1-NEXT: [[TMP30:%.*]] = load float, float* [[TMP5]], align 4 687 // CHECK1-NEXT: br label [[COND_END:%.*]] 688 // CHECK1: cond.false: 689 // CHECK1-NEXT: [[TMP31:%.*]] = load float, float* [[T_VAR15]], align 4 690 // CHECK1-NEXT: br label [[COND_END]] 691 // CHECK1: cond.end: 692 // CHECK1-NEXT: [[COND:%.*]] = phi float [ [[TMP30]], [[COND_TRUE]] ], [ [[TMP31]], [[COND_FALSE]] ] 693 // CHECK1-NEXT: store float [[COND]], float* [[TMP5]], align 4 694 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 695 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 696 // CHECK1: .omp.reduction.case2: 697 // CHECK1-NEXT: [[TMP32:%.*]] = load float, float* [[T_VAR2]], align 4 698 // CHECK1-NEXT: [[TMP33:%.*]] = atomicrmw fadd float* [[TMP1]], float [[TMP32]] monotonic, align 4 699 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 700 // CHECK1-NEXT: [[CALL11:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 701 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 702 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[CALL11]] to i8* 703 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false) 704 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 705 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 706 // CHECK1-NEXT: [[CALL13:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 707 // CHECK1-NEXT: [[TOBOOL14:%.*]] = fcmp une float [[CALL13]], 0.000000e+00 708 // CHECK1-NEXT: br i1 [[TOBOOL14]], label [[LAND_RHS15:%.*]], label [[LAND_END18:%.*]] 709 // CHECK1: land.rhs15: 710 // CHECK1-NEXT: [[CALL16:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 711 // CHECK1-NEXT: [[TOBOOL17:%.*]] = fcmp une float [[CALL16]], 0.000000e+00 712 // CHECK1-NEXT: br label [[LAND_END18]] 713 // CHECK1: land.end18: 714 // CHECK1-NEXT: [[TMP36:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL17]], [[LAND_RHS15]] ] 715 // CHECK1-NEXT: [[CONV19:%.*]] = uitofp i1 [[TMP36]] to float 716 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]], float noundef [[CONV19]]) 717 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 718 // CHECK1-NEXT: [[TMP38:%.*]] = bitcast %struct.S* [[REF_TMP12]] to i8* 719 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP37]], i8* align 4 [[TMP38]], i64 4, i1 false) 720 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]]) #[[ATTR5]] 721 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 722 // CHECK1-NEXT: [[TMP39:%.*]] = load float, float* [[T_VAR15]], align 4 723 // CHECK1-NEXT: [[TMP40:%.*]] = bitcast float* [[TMP5]] to i32* 724 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP40]] monotonic, align 4 725 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 726 // CHECK1: atomic_cont: 727 // CHECK1-NEXT: [[TMP41:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[LAND_END18]] ], [ [[TMP51:%.*]], [[COND_END23:%.*]] ] 728 // CHECK1-NEXT: [[TMP42:%.*]] = bitcast float* [[ATOMIC_TEMP]] to i32* 729 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast i32 [[TMP41]] to float 730 // CHECK1-NEXT: store float [[TMP43]], float* [[TMP]], align 4 731 // CHECK1-NEXT: [[TMP44:%.*]] = load float, float* [[TMP]], align 4 732 // CHECK1-NEXT: [[TMP45:%.*]] = load float, float* [[T_VAR15]], align 4 733 // CHECK1-NEXT: [[CMP20:%.*]] = fcmp olt float [[TMP44]], [[TMP45]] 734 // CHECK1-NEXT: br i1 [[CMP20]], label [[COND_TRUE21:%.*]], label [[COND_FALSE22:%.*]] 735 // CHECK1: cond.true21: 736 // CHECK1-NEXT: [[TMP46:%.*]] = load float, float* [[TMP]], align 4 737 // CHECK1-NEXT: br label [[COND_END23]] 738 // CHECK1: cond.false22: 739 // CHECK1-NEXT: [[TMP47:%.*]] = load float, float* [[T_VAR15]], align 4 740 // CHECK1-NEXT: br label [[COND_END23]] 741 // CHECK1: cond.end23: 742 // CHECK1-NEXT: [[COND24:%.*]] = phi float [ [[TMP46]], [[COND_TRUE21]] ], [ [[TMP47]], [[COND_FALSE22]] ] 743 // CHECK1-NEXT: store float [[COND24]], float* [[ATOMIC_TEMP]], align 4 744 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[TMP42]], align 4 745 // CHECK1-NEXT: [[TMP49:%.*]] = bitcast float* [[TMP5]] to i32* 746 // CHECK1-NEXT: [[TMP50:%.*]] = cmpxchg i32* [[TMP49]], i32 [[TMP41]], i32 [[TMP48]] monotonic monotonic, align 4 747 // CHECK1-NEXT: [[TMP51]] = extractvalue { i32, i1 } [[TMP50]], 0 748 // CHECK1-NEXT: [[TMP52:%.*]] = extractvalue { i32, i1 } [[TMP50]], 1 749 // CHECK1-NEXT: br i1 [[TMP52]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 750 // CHECK1: atomic_exit: 751 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 752 // CHECK1: .omp.reduction.default: 753 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]] 754 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]] 755 // CHECK1-NEXT: ret void 756 // 757 // 758 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 759 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 760 // CHECK1-NEXT: entry: 761 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 762 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 763 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4 764 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 765 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 766 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 767 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 768 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 769 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 770 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 771 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 772 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to float* 773 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 774 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 775 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to float* 776 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 777 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 778 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S* 779 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 780 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 781 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S* 782 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 783 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 784 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S* 785 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 786 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 787 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S* 788 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 789 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 790 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to float* 791 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 792 // CHECK1-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 793 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to float* 794 // CHECK1-NEXT: [[TMP30:%.*]] = load float, float* [[TMP11]], align 4 795 // CHECK1-NEXT: [[TMP31:%.*]] = load float, float* [[TMP8]], align 4 796 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP30]], [[TMP31]] 797 // CHECK1-NEXT: store float [[ADD]], float* [[TMP11]], align 4 798 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP14]]) 799 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP17]] to i8* 800 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[CALL]] to i8* 801 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 802 // CHECK1-NEXT: [[CALL2:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP23]]) 803 // CHECK1-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00 804 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 805 // CHECK1: land.rhs: 806 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP20]]) 807 // CHECK1-NEXT: [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00 808 // CHECK1-NEXT: br label [[LAND_END]] 809 // CHECK1: land.end: 810 // CHECK1-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 811 // CHECK1-NEXT: [[CONV:%.*]] = uitofp i1 [[TMP34]] to float 812 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV]]) 813 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 814 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 815 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 816 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 817 // CHECK1-NEXT: [[TMP37:%.*]] = load float, float* [[TMP29]], align 4 818 // CHECK1-NEXT: [[TMP38:%.*]] = load float, float* [[TMP26]], align 4 819 // CHECK1-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP37]], [[TMP38]] 820 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 821 // CHECK1: cond.true: 822 // CHECK1-NEXT: [[TMP39:%.*]] = load float, float* [[TMP29]], align 4 823 // CHECK1-NEXT: br label [[COND_END:%.*]] 824 // CHECK1: cond.false: 825 // CHECK1-NEXT: [[TMP40:%.*]] = load float, float* [[TMP26]], align 4 826 // CHECK1-NEXT: br label [[COND_END]] 827 // CHECK1: cond.end: 828 // CHECK1-NEXT: [[COND:%.*]] = phi float [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 829 // CHECK1-NEXT: store float [[COND]], float* [[TMP29]], align 4 830 // CHECK1-NEXT: ret void 831 // 832 // 833 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEanERKS0_ 834 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 835 // CHECK1-NEXT: entry: 836 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 837 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.S*, align 8 838 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 839 // CHECK1-NEXT: store %struct.S* [[TMP0]], %struct.S** [[DOTADDR]], align 8 840 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 841 // CHECK1-NEXT: ret %struct.S* [[THIS1]] 842 // 843 // 844 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEcvfEv 845 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 846 // CHECK1-NEXT: entry: 847 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 848 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 849 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 850 // CHECK1-NEXT: ret float 0.000000e+00 851 // 852 // 853 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 854 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 855 // CHECK1-NEXT: entry: 856 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 857 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 858 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 859 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 860 // CHECK1-NEXT: ret void 861 // 862 // 863 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 864 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] { 865 // CHECK1-NEXT: entry: 866 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 867 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 868 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 869 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca float*, align 8 870 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 871 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 872 // CHECK1-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S*, align 8 873 // CHECK1-NEXT: [[T_VAR1_ADDR:%.*]] = alloca float*, align 8 874 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca float, align 4 875 // CHECK1-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4 876 // CHECK1-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4 877 // CHECK1-NEXT: [[T_VAR15:%.*]] = alloca float, align 4 878 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 879 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 880 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 881 // CHECK1-NEXT: store float* [[T_VAR]], float** [[T_VAR_ADDR]], align 8 882 // CHECK1-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 883 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 884 // CHECK1-NEXT: store %struct.S* [[VAR1]], %struct.S** [[VAR1_ADDR]], align 8 885 // CHECK1-NEXT: store float* [[T_VAR1]], float** [[T_VAR1_ADDR]], align 8 886 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 887 // CHECK1-NEXT: [[TMP1:%.*]] = load float*, float** [[T_VAR_ADDR]], align 8 888 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 889 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 890 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR1_ADDR]], align 8 891 // CHECK1-NEXT: [[TMP5:%.*]] = load float*, float** [[T_VAR1_ADDR]], align 8 892 // CHECK1-NEXT: store float 0.000000e+00, float* [[T_VAR2]], align 4 893 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 894 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 895 // CHECK1-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR15]], align 4 896 // CHECK1-NEXT: br label [[WHILE_COND:%.*]] 897 // CHECK1: while.cond: 898 // CHECK1-NEXT: br label [[WHILE_BODY:%.*]] 899 // CHECK1: while.body: 900 // CHECK1-NEXT: [[TMP6:%.*]] = load float, float* [[T_VAR2]], align 4 901 // CHECK1-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32 902 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0 903 // CHECK1-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 904 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i64 0, i64 0 905 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 906 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR3]] to i8* 907 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false) 908 // CHECK1-NEXT: br label [[WHILE_COND]], !llvm.loop [[LOOP5:![0-9]+]] 909 // 910 // 911 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 912 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], { float, float }* noundef nonnull align 4 dereferenceable(8) [[CF:%.*]]) #[[ATTR1]] { 913 // CHECK1-NEXT: entry: 914 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 915 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 916 // CHECK1-NEXT: [[CF_ADDR:%.*]] = alloca { float, float }*, align 8 917 // CHECK1-NEXT: [[CF1:%.*]] = alloca { float, float }, align 4 918 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 919 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca { float, float }, align 4 920 // CHECK1-NEXT: [[ATOMIC_TEMP10:%.*]] = alloca { float, float }, align 4 921 // CHECK1-NEXT: [[TMP:%.*]] = alloca { float, float }, align 4 922 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 923 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 924 // CHECK1-NEXT: store { float, float }* [[CF]], { float, float }** [[CF_ADDR]], align 8 925 // CHECK1-NEXT: [[TMP0:%.*]] = load { float, float }*, { float, float }** [[CF_ADDR]], align 8 926 // CHECK1-NEXT: [[CF1_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 927 // CHECK1-NEXT: [[CF1_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 928 // CHECK1-NEXT: store float 0.000000e+00, float* [[CF1_REALP]], align 4 929 // CHECK1-NEXT: store float 0.000000e+00, float* [[CF1_IMAGP]], align 4 930 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 931 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast { float, float }* [[CF1]] to i8* 932 // CHECK1-NEXT: store i8* [[TMP2]], i8** [[TMP1]], align 8 933 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 934 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 935 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 936 // CHECK1-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP5]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 937 // CHECK1-NEXT: switch i32 [[TMP6]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 938 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 939 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 940 // CHECK1-NEXT: ] 941 // CHECK1: .omp.reduction.case1: 942 // CHECK1-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 0 943 // CHECK1-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 944 // CHECK1-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 1 945 // CHECK1-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 946 // CHECK1-NEXT: [[CF1_REALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 947 // CHECK1-NEXT: [[CF1_REAL:%.*]] = load float, float* [[CF1_REALP2]], align 4 948 // CHECK1-NEXT: [[CF1_IMAGP3:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 949 // CHECK1-NEXT: [[CF1_IMAG:%.*]] = load float, float* [[CF1_IMAGP3]], align 4 950 // CHECK1-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[CF1_REAL]] 951 // CHECK1-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[CF1_IMAG]] 952 // CHECK1-NEXT: [[DOTREALP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 0 953 // CHECK1-NEXT: [[DOTIMAGP5:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 1 954 // CHECK1-NEXT: store float [[ADD_R]], float* [[DOTREALP4]], align 4 955 // CHECK1-NEXT: store float [[ADD_I]], float* [[DOTIMAGP5]], align 4 956 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 957 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 958 // CHECK1: .omp.reduction.case2: 959 // CHECK1-NEXT: [[CF1_REALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 960 // CHECK1-NEXT: [[CF1_REAL7:%.*]] = load float, float* [[CF1_REALP6]], align 4 961 // CHECK1-NEXT: [[CF1_IMAGP8:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 962 // CHECK1-NEXT: [[CF1_IMAG9:%.*]] = load float, float* [[CF1_IMAGP8]], align 4 963 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast { float, float }* [[TMP0]] to i8* 964 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 965 // CHECK1-NEXT: call void @__atomic_load(i64 noundef 8, i8* noundef [[TMP7]], i8* noundef [[TMP8]], i32 noundef 0) 966 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 967 // CHECK1: atomic_cont: 968 // CHECK1-NEXT: [[ATOMIC_TEMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 0 969 // CHECK1-NEXT: [[ATOMIC_TEMP_REAL:%.*]] = load float, float* [[ATOMIC_TEMP_REALP]], align 4 970 // CHECK1-NEXT: [[ATOMIC_TEMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 1 971 // CHECK1-NEXT: [[ATOMIC_TEMP_IMAG:%.*]] = load float, float* [[ATOMIC_TEMP_IMAGP]], align 4 972 // CHECK1-NEXT: [[TMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 973 // CHECK1-NEXT: [[TMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 974 // CHECK1-NEXT: store float [[ATOMIC_TEMP_REAL]], float* [[TMP_REALP]], align 4 975 // CHECK1-NEXT: store float [[ATOMIC_TEMP_IMAG]], float* [[TMP_IMAGP]], align 4 976 // CHECK1-NEXT: [[TMP_REALP11:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 977 // CHECK1-NEXT: [[TMP_REAL:%.*]] = load float, float* [[TMP_REALP11]], align 4 978 // CHECK1-NEXT: [[TMP_IMAGP12:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 979 // CHECK1-NEXT: [[TMP_IMAG:%.*]] = load float, float* [[TMP_IMAGP12]], align 4 980 // CHECK1-NEXT: [[CF1_REALP13:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 981 // CHECK1-NEXT: [[CF1_REAL14:%.*]] = load float, float* [[CF1_REALP13]], align 4 982 // CHECK1-NEXT: [[CF1_IMAGP15:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 983 // CHECK1-NEXT: [[CF1_IMAG16:%.*]] = load float, float* [[CF1_IMAGP15]], align 4 984 // CHECK1-NEXT: [[ADD_R17:%.*]] = fadd float [[TMP_REAL]], [[CF1_REAL14]] 985 // CHECK1-NEXT: [[ADD_I18:%.*]] = fadd float [[TMP_IMAG]], [[CF1_IMAG16]] 986 // CHECK1-NEXT: [[ATOMIC_TEMP10_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP10]], i32 0, i32 0 987 // CHECK1-NEXT: [[ATOMIC_TEMP10_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP10]], i32 0, i32 1 988 // CHECK1-NEXT: store float [[ADD_R17]], float* [[ATOMIC_TEMP10_REALP]], align 4 989 // CHECK1-NEXT: store float [[ADD_I18]], float* [[ATOMIC_TEMP10_IMAGP]], align 4 990 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast { float, float }* [[TMP0]] to i8* 991 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 992 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP10]] to i8* 993 // CHECK1-NEXT: [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef [[TMP9]], i8* noundef [[TMP10]], i8* noundef [[TMP11]], i32 noundef 0, i32 noundef 0) 994 // CHECK1-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 995 // CHECK1: atomic_exit: 996 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 997 // CHECK1: .omp.reduction.default: 998 // CHECK1-NEXT: ret void 999 // 1000 // 1001 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 1002 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1003 // CHECK1-NEXT: entry: 1004 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1005 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1006 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1007 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1008 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1009 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1010 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1011 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1012 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1013 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1014 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to { float, float }* 1015 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1016 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1017 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to { float, float }* 1018 // CHECK1-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 1019 // CHECK1-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 1020 // CHECK1-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 1021 // CHECK1-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 1022 // CHECK1-NEXT: [[DOTREALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 0 1023 // CHECK1-NEXT: [[DOTREAL3:%.*]] = load float, float* [[DOTREALP2]], align 4 1024 // CHECK1-NEXT: [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 1 1025 // CHECK1-NEXT: [[DOTIMAG5:%.*]] = load float, float* [[DOTIMAGP4]], align 4 1026 // CHECK1-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[DOTREAL3]] 1027 // CHECK1-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[DOTIMAG5]] 1028 // CHECK1-NEXT: [[DOTREALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 1029 // CHECK1-NEXT: [[DOTIMAGP7:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 1030 // CHECK1-NEXT: store float [[ADD_R]], float* [[DOTREALP6]], align 4 1031 // CHECK1-NEXT: store float [[ADD_I]], float* [[DOTIMAGP7]], align 4 1032 // CHECK1-NEXT: ret void 1033 // 1034 // 1035 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1036 // CHECK1-SAME: () #[[ATTR0]] { 1037 // CHECK1-NEXT: entry: 1038 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1039 // CHECK1-NEXT: [[T:%.*]] = alloca i32, align 4 1040 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1041 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 1042 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 1043 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 1044 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1045 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1046 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 1047 // CHECK1-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S_0]], align 128 1048 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1049 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]]) 1050 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 128 1051 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1052 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1053 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1054 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 1055 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1056 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 1057 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3) 1058 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) 1059 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*, %struct.S.0*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], i32* [[T_VAR]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]], %struct.S.0* [[VAR1]], i32* [[T_VAR1]]) 1060 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 1061 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 1062 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 1063 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1064 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1065 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1066 // CHECK1: arraydestroy.body: 1067 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1068 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1069 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1070 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1071 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 1072 // CHECK1: arraydestroy.done1: 1073 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 1074 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 1075 // CHECK1-NEXT: ret i32 [[TMP2]] 1076 // 1077 // 1078 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 1079 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1080 // CHECK1-NEXT: entry: 1081 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1082 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1083 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 8 1084 // CHECK1-NEXT: [[B4:%.*]] = alloca i32, align 4 1085 // CHECK1-NEXT: [[C5:%.*]] = alloca i32*, align 8 1086 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1087 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1088 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1089 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1090 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8 1091 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1092 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 1093 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 1094 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 1095 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4 1096 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1097 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1098 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 1099 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1100 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 8 1101 // CHECK1-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 1102 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 1103 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 1104 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 1105 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8 1106 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]]) 1107 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[B4]], align 4 1108 // CHECK1-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 1109 // CHECK1-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8 1110 // CHECK1-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 1111 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15 1112 // CHECK1-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 1113 // CHECK1-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 1114 // CHECK1-NEXT: store i8 [[BF_SET10]], i8* [[B7]], align 4 1115 // CHECK1-NEXT: ret void 1116 // 1117 // 1118 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 1119 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 1120 // CHECK1-NEXT: entry: 1121 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1122 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1123 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1124 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1125 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 1126 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 1127 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1128 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1129 // CHECK1-NEXT: [[A2:%.*]] = alloca i32, align 4 1130 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 1131 // CHECK1-NEXT: [[B4:%.*]] = alloca i32, align 4 1132 // CHECK1-NEXT: [[C5:%.*]] = alloca i32, align 4 1133 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 1134 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 1135 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1136 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1137 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1138 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1139 // CHECK1-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 1140 // CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 1141 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1142 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1143 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 1144 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 1145 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1146 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 1147 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 1148 // CHECK1-NEXT: store i32 0, i32* [[A2]], align 4 1149 // CHECK1-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8 1150 // CHECK1-NEXT: store i32 0, i32* [[B4]], align 4 1151 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 1152 // CHECK1-NEXT: store i32 0, i32* [[C5]], align 4 1153 // CHECK1-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8 1154 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8 1155 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 1156 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 1157 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4 1158 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 1159 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP8]], -1 1160 // CHECK1-NEXT: store i32 [[DEC]], i32* [[B4]], align 4 1161 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP6]], align 8 1162 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1163 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 1164 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 1165 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1166 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i32* [[A2]] to i8* 1167 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 1168 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 1169 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i32* [[B4]] to i8* 1170 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 1171 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 1172 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[C5]] to i8* 1173 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 1174 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1175 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1176 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1177 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 3, i64 24, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.7, [8 x i32]* @.gomp_critical_user_.reduction.var) 1178 // CHECK1-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1179 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1180 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1181 // CHECK1-NEXT: ] 1182 // CHECK1: .omp.reduction.case1: 1183 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4 1184 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[A2]], align 4 1185 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1186 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4 1187 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP2]], align 4 1188 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[B4]], align 4 1189 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 1190 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[TMP2]], align 4 1191 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP5]], align 4 1192 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[C5]], align 4 1193 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 1194 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[TMP5]], align 4 1195 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1196 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1197 // CHECK1: .omp.reduction.case2: 1198 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[A2]], align 4 1199 // CHECK1-NEXT: [[TMP28:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP27]] monotonic, align 4 1200 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[B4]], align 4 1201 // CHECK1-NEXT: [[TMP30:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP29]] monotonic, align 4 1202 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[C5]], align 4 1203 // CHECK1-NEXT: [[TMP32:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP31]] monotonic, align 4 1204 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1205 // CHECK1: .omp.reduction.default: 1206 // CHECK1-NEXT: ret void 1207 // 1208 // 1209 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.7 1210 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1211 // CHECK1-NEXT: entry: 1212 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1213 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1214 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1215 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1216 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1217 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 1218 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1219 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 1220 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 1221 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1222 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1223 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 1224 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1225 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1226 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 1227 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 1228 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 1229 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 1230 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 1231 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 1232 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 1233 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1234 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 1235 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 1236 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 1237 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 1238 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 1239 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 1240 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 1241 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1242 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 1243 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 1244 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 1245 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 1246 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 1247 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 1248 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 1249 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 1250 // CHECK1-NEXT: ret void 1251 // 1252 // 1253 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1254 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1255 // CHECK1-NEXT: entry: 1256 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1257 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1258 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1259 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1260 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1261 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 1262 // CHECK1-NEXT: store float [[CONV]], float* [[F]], align 4 1263 // CHECK1-NEXT: ret void 1264 // 1265 // 1266 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1267 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1268 // CHECK1-NEXT: entry: 1269 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1270 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1271 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1272 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1273 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1274 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1275 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1276 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1277 // CHECK1-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 1278 // CHECK1-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 1279 // CHECK1-NEXT: store float [[ADD]], float* [[F]], align 4 1280 // CHECK1-NEXT: ret void 1281 // 1282 // 1283 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1284 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1285 // CHECK1-NEXT: entry: 1286 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1287 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1288 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1289 // CHECK1-NEXT: ret void 1290 // 1291 // 1292 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1293 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1294 // CHECK1-NEXT: entry: 1295 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1296 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1297 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1298 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1299 // CHECK1-NEXT: ret void 1300 // 1301 // 1302 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 1303 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1304 // CHECK1-NEXT: entry: 1305 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1306 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1307 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1308 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1309 // CHECK1-NEXT: ret void 1310 // 1311 // 1312 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1313 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1314 // CHECK1-NEXT: entry: 1315 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1316 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1317 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1318 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1319 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1320 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1321 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1322 // CHECK1-NEXT: ret void 1323 // 1324 // 1325 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 1326 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] { 1327 // CHECK1-NEXT: entry: 1328 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1329 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1330 // CHECK1-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1331 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1332 // CHECK1-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 1333 // CHECK1-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 1334 // CHECK1-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S.0*, align 8 1335 // CHECK1-NEXT: [[T_VAR1_ADDR:%.*]] = alloca i32*, align 8 1336 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 128 1337 // CHECK1-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 1338 // CHECK1-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S_0]], align 128 1339 // CHECK1-NEXT: [[T_VAR15:%.*]] = alloca i32, align 128 1340 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 1341 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_0]], align 4 1342 // CHECK1-NEXT: [[REF_TMP11:%.*]] = alloca [[STRUCT_S_0]], align 4 1343 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1344 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1345 // CHECK1-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1346 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1347 // CHECK1-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1348 // CHECK1-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 1349 // CHECK1-NEXT: store %struct.S.0* [[VAR1]], %struct.S.0** [[VAR1_ADDR]], align 8 1350 // CHECK1-NEXT: store i32* [[T_VAR1]], i32** [[T_VAR1_ADDR]], align 8 1351 // CHECK1-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 1352 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1353 // CHECK1-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 1354 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 1355 // CHECK1-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR1_ADDR]], align 8 1356 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[T_VAR1_ADDR]], align 8 1357 // CHECK1-NEXT: store i32 0, i32* [[T_VAR2]], align 128 1358 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 1359 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 1360 // CHECK1-NEXT: store i32 2147483647, i32* [[T_VAR15]], align 128 1361 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR2]], align 128 1362 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0 1363 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 1364 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i64 0, i64 0 1365 // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 1366 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S.0* [[VAR3]] to i8* 1367 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 128 [[TMP8]], i64 4, i1 false) 1368 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1369 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i32* [[T_VAR2]] to i8* 1370 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8 1371 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 1372 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR3]] to i8* 1373 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 1374 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 1375 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[VAR14]] to i8* 1376 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 1377 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 1378 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast i32* [[T_VAR15]] to i8* 1379 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 1380 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1381 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 1382 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1383 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 4, i64 32, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.9, [8 x i32]* @.gomp_critical_user_.reduction.var) 1384 // CHECK1-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1385 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1386 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1387 // CHECK1-NEXT: ] 1388 // CHECK1: .omp.reduction.case1: 1389 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP1]], align 128 1390 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 128 1391 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 1392 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP1]], align 128 1393 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 1394 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 1395 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast %struct.S.0* [[CALL]] to i8* 1396 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP23]], i8* align 4 [[TMP24]], i64 4, i1 false) 1397 // CHECK1-NEXT: [[CALL7:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 1398 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL7]], 0 1399 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 1400 // CHECK1: land.rhs: 1401 // CHECK1-NEXT: [[CALL8:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 1402 // CHECK1-NEXT: [[TOBOOL9:%.*]] = icmp ne i32 [[CALL8]], 0 1403 // CHECK1-NEXT: br label [[LAND_END]] 1404 // CHECK1: land.end: 1405 // CHECK1-NEXT: [[TMP25:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ] 1406 // CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[TMP25]] to i32 1407 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]]) 1408 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 1409 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[REF_TMP]] to i8* 1410 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 1411 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 1412 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP5]], align 128 1413 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[T_VAR15]], align 128 1414 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP28]], [[TMP29]] 1415 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1416 // CHECK1: cond.true: 1417 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP5]], align 128 1418 // CHECK1-NEXT: br label [[COND_END:%.*]] 1419 // CHECK1: cond.false: 1420 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[T_VAR15]], align 128 1421 // CHECK1-NEXT: br label [[COND_END]] 1422 // CHECK1: cond.end: 1423 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE]] ], [ [[TMP31]], [[COND_FALSE]] ] 1424 // CHECK1-NEXT: store i32 [[COND]], i32* [[TMP5]], align 128 1425 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1426 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1427 // CHECK1: .omp.reduction.case2: 1428 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[T_VAR2]], align 128 1429 // CHECK1-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP1]], i32 [[TMP32]] monotonic, align 4 1430 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1431 // CHECK1-NEXT: [[CALL10:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 1432 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 1433 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[CALL10]] to i8* 1434 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false) 1435 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1436 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1437 // CHECK1-NEXT: [[CALL12:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 1438 // CHECK1-NEXT: [[TOBOOL13:%.*]] = icmp ne i32 [[CALL12]], 0 1439 // CHECK1-NEXT: br i1 [[TOBOOL13]], label [[LAND_RHS14:%.*]], label [[LAND_END17:%.*]] 1440 // CHECK1: land.rhs14: 1441 // CHECK1-NEXT: [[CALL15:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 1442 // CHECK1-NEXT: [[TOBOOL16:%.*]] = icmp ne i32 [[CALL15]], 0 1443 // CHECK1-NEXT: br label [[LAND_END17]] 1444 // CHECK1: land.end17: 1445 // CHECK1-NEXT: [[TMP36:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL16]], [[LAND_RHS14]] ] 1446 // CHECK1-NEXT: [[CONV18:%.*]] = zext i1 [[TMP36]] to i32 1447 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]], i32 noundef [[CONV18]]) 1448 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 1449 // CHECK1-NEXT: [[TMP38:%.*]] = bitcast %struct.S.0* [[REF_TMP11]] to i8* 1450 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP37]], i8* align 4 [[TMP38]], i64 4, i1 false) 1451 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]]) #[[ATTR5]] 1452 // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 1453 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[T_VAR15]], align 128 1454 // CHECK1-NEXT: [[TMP40:%.*]] = atomicrmw min i32* [[TMP5]], i32 [[TMP39]] monotonic, align 4 1455 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1456 // CHECK1: .omp.reduction.default: 1457 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]] 1458 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]] 1459 // CHECK1-NEXT: ret void 1460 // 1461 // 1462 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.9 1463 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1464 // CHECK1-NEXT: entry: 1465 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1466 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1467 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1468 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1469 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1470 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1471 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 1472 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1473 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 1474 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 1475 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1476 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1477 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 1478 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1479 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1480 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 1481 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 1482 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S.0* 1483 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 1484 // CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 1485 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S.0* 1486 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 1487 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1488 // CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S.0* 1489 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 1490 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 1491 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S.0* 1492 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 1493 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 1494 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to i32* 1495 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 1496 // CHECK1-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 1497 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to i32* 1498 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP11]], align 128 1499 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP8]], align 128 1500 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 1501 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 1502 // CHECK1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP14]]) 1503 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8* 1504 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[CALL]] to i8* 1505 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 1506 // CHECK1-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP23]]) 1507 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0 1508 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 1509 // CHECK1: land.rhs: 1510 // CHECK1-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP20]]) 1511 // CHECK1-NEXT: [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0 1512 // CHECK1-NEXT: br label [[LAND_END]] 1513 // CHECK1: land.end: 1514 // CHECK1-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 1515 // CHECK1-NEXT: [[CONV:%.*]] = zext i1 [[TMP34]] to i32 1516 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]]) 1517 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8* 1518 // CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[REF_TMP]] to i8* 1519 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 1520 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 1521 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP29]], align 128 1522 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP26]], align 128 1523 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP37]], [[TMP38]] 1524 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1525 // CHECK1: cond.true: 1526 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP29]], align 128 1527 // CHECK1-NEXT: br label [[COND_END:%.*]] 1528 // CHECK1: cond.false: 1529 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP26]], align 128 1530 // CHECK1-NEXT: br label [[COND_END]] 1531 // CHECK1: cond.end: 1532 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 1533 // CHECK1-NEXT: store i32 [[COND]], i32* [[TMP29]], align 128 1534 // CHECK1-NEXT: ret void 1535 // 1536 // 1537 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEanERKS0_ 1538 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 1539 // CHECK1-NEXT: entry: 1540 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1541 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.S.0*, align 8 1542 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1543 // CHECK1-NEXT: store %struct.S.0* [[TMP0]], %struct.S.0** [[DOTADDR]], align 8 1544 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1545 // CHECK1-NEXT: ret %struct.S.0* [[THIS1]] 1546 // 1547 // 1548 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEcviEv 1549 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 1550 // CHECK1-NEXT: entry: 1551 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1552 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1553 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1554 // CHECK1-NEXT: ret i32 0 1555 // 1556 // 1557 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1558 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1559 // CHECK1-NEXT: entry: 1560 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1561 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1562 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1563 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 1564 // CHECK1-NEXT: ret void 1565 // 1566 // 1567 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1568 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1569 // CHECK1-NEXT: entry: 1570 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1571 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1572 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1573 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1574 // CHECK1-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 1575 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1576 // CHECK1-NEXT: ret void 1577 // 1578 // 1579 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 1580 // CHECK1-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1581 // CHECK1-NEXT: entry: 1582 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1583 // CHECK1-NEXT: [[A2:%.*]] = alloca i32*, align 8 1584 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1585 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1586 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 1587 // CHECK1-NEXT: store i32 0, i32* [[A]], align 4 1588 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 1589 // CHECK1-NEXT: store i32* [[A3]], i32** [[A2]], align 8 1590 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A2]], align 8 1591 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]], i32* [[TMP0]]) 1592 // CHECK1-NEXT: ret void 1593 // 1594 // 1595 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1596 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1]] { 1597 // CHECK1-NEXT: entry: 1598 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1599 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1600 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 1601 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 1602 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8 1603 // CHECK1-NEXT: [[A1:%.*]] = alloca i32, align 4 1604 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1605 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1606 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 1607 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 1608 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1609 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1610 // CHECK1-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 1611 // CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 1612 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 1613 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 1614 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 1615 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 1616 // CHECK1-NEXT: store i32 1, i32* [[A1]], align 4 1617 // CHECK1-NEXT: store i32* [[A1]], i32** [[_TMP2]], align 8 1618 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[_TMP2]], align 8 1619 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1620 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 1621 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 1622 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1623 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i32* [[A1]] to i8* 1624 // CHECK1-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8 1625 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1626 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1627 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1628 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 1, i64 8, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.11, [8 x i32]* @.gomp_critical_user_.reduction.var) 1629 // CHECK1-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1630 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1631 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1632 // CHECK1-NEXT: ] 1633 // CHECK1: .omp.reduction.case1: 1634 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP2]], align 4 1635 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[A1]], align 4 1636 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], [[TMP12]] 1637 // CHECK1-NEXT: store i32 [[MUL]], i32* [[TMP2]], align 4 1638 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1639 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1640 // CHECK1: .omp.reduction.case2: 1641 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[A1]], align 4 1642 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP2]] monotonic, align 4 1643 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]] 1644 // CHECK1: atomic_cont: 1645 // CHECK1-NEXT: [[TMP14:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP19:%.*]], [[ATOMIC_CONT]] ] 1646 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[_TMP3]], align 4 1647 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[_TMP3]], align 4 1648 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[A1]], align 4 1649 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP15]], [[TMP16]] 1650 // CHECK1-NEXT: store i32 [[MUL4]], i32* [[ATOMIC_TEMP]], align 4 1651 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[ATOMIC_TEMP]], align 4 1652 // CHECK1-NEXT: [[TMP18:%.*]] = cmpxchg i32* [[TMP2]], i32 [[TMP14]], i32 [[TMP17]] monotonic monotonic, align 4 1653 // CHECK1-NEXT: [[TMP19]] = extractvalue { i32, i1 } [[TMP18]], 0 1654 // CHECK1-NEXT: [[TMP20:%.*]] = extractvalue { i32, i1 } [[TMP18]], 1 1655 // CHECK1-NEXT: br i1 [[TMP20]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 1656 // CHECK1: atomic_exit: 1657 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1658 // CHECK1: .omp.reduction.default: 1659 // CHECK1-NEXT: ret void 1660 // 1661 // 1662 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.11 1663 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 1664 // CHECK1-NEXT: entry: 1665 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1666 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1667 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1668 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1669 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1670 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1671 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1672 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1673 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1674 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1675 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1676 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1677 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1678 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1679 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1680 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1681 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]] 1682 // CHECK1-NEXT: store i32 [[MUL]], i32* [[TMP11]], align 4 1683 // CHECK1-NEXT: ret void 1684 // 1685 // 1686 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1687 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1688 // CHECK1-NEXT: entry: 1689 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1690 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1691 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1692 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1693 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1694 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1695 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1696 // CHECK1-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 1697 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 1698 // CHECK1-NEXT: store i32 [[ADD]], i32* [[F]], align 4 1699 // CHECK1-NEXT: ret void 1700 // 1701 // 1702 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1703 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1704 // CHECK1-NEXT: entry: 1705 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1706 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1707 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1708 // CHECK1-NEXT: ret void 1709 // 1710 // 1711 // CHECK2-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 1712 // CHECK2-SAME: (i16* noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] { 1713 // CHECK2-NEXT: entry: 1714 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 1715 // CHECK2-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 1716 // CHECK2-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 1717 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i16*)* @.omp_outlined. to void (i32*, i32*, ...)*), i16* [[TMP0]]) 1718 // CHECK2-NEXT: ret void 1719 // 1720 // 1721 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1722 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i16* noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] { 1723 // CHECK2-NEXT: entry: 1724 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1725 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1726 // CHECK2-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 1727 // CHECK2-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 1728 // CHECK2-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 1729 // CHECK2-NEXT: [[TMP:%.*]] = alloca i16*, align 8 1730 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 1731 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 1732 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 1733 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1734 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1735 // CHECK2-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 1736 // CHECK2-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 1737 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP0]], i64 0 1738 // CHECK2-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 1739 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP1]], i64 0 1740 // CHECK2-NEXT: [[TMP2:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 1741 // CHECK2-NEXT: [[TMP3:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 1742 // CHECK2-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]] 1743 // CHECK2-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 1744 // CHECK2-NEXT: [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1 1745 // CHECK2-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 1746 // CHECK2-NEXT: [[TMP8:%.*]] = call i8* @llvm.stacksave() 1747 // CHECK2-NEXT: store i8* [[TMP8]], i8** [[SAVED_STACK]], align 8 1748 // CHECK2-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16 1749 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[__VLA_EXPR0]], align 8 1750 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP6]] 1751 // CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP9]] 1752 // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 1753 // CHECK2: omp.arrayinit.body: 1754 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 1755 // CHECK2-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 1756 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1757 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 1758 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 1759 // CHECK2: omp.arrayinit.done: 1760 // CHECK2-NEXT: [[TMP10:%.*]] = load i16*, i16** [[X_ADDR]], align 8 1761 // CHECK2-NEXT: [[TMP11:%.*]] = ptrtoint i16* [[TMP10]] to i64 1762 // CHECK2-NEXT: [[TMP12:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 1763 // CHECK2-NEXT: [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]] 1764 // CHECK2-NEXT: [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 1765 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP14]] 1766 // CHECK2-NEXT: store i16* [[TMP15]], i16** [[TMP]], align 8 1767 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1768 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i16* [[VLA]] to i8* 1769 // CHECK2-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 1770 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 1771 // CHECK2-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP6]] to i8* 1772 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 1773 // CHECK2-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1774 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 1775 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1776 // CHECK2-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP21]], i32 1, i64 16, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 1777 // CHECK2-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1778 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1779 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1780 // CHECK2-NEXT: ] 1781 // CHECK2: .omp.reduction.case1: 1782 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 1783 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP24]] 1784 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1785 // CHECK2: omp.arraycpy.body: 1786 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1787 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1788 // CHECK2-NEXT: [[TMP25:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 1789 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP25]] to i32 1790 // CHECK2-NEXT: [[TMP26:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 1791 // CHECK2-NEXT: [[CONV3:%.*]] = sext i16 [[TMP26]] to i32 1792 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 1793 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 1794 // CHECK2-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 1795 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 1796 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1797 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP24]] 1798 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 1799 // CHECK2: omp.arraycpy.done7: 1800 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1801 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1802 // CHECK2: .omp.reduction.case2: 1803 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 1804 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP27]] 1805 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 1806 // CHECK2: omp.arraycpy.body9: 1807 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 1808 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 1809 // CHECK2-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 1810 // CHECK2-NEXT: [[CONV12:%.*]] = sext i16 [[TMP28]] to i32 1811 // CHECK2-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 1812 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 1813 // CHECK2: atomic_cont: 1814 // CHECK2-NEXT: [[TMP29:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP34:%.*]], [[ATOMIC_CONT]] ] 1815 // CHECK2-NEXT: store i16 [[TMP29]], i16* [[_TMP13]], align 2 1816 // CHECK2-NEXT: [[TMP30:%.*]] = load i16, i16* [[_TMP13]], align 2 1817 // CHECK2-NEXT: [[CONV14:%.*]] = sext i16 [[TMP30]] to i32 1818 // CHECK2-NEXT: [[TMP31:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 1819 // CHECK2-NEXT: [[CONV15:%.*]] = sext i16 [[TMP31]] to i32 1820 // CHECK2-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 1821 // CHECK2-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 1822 // CHECK2-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 1823 // CHECK2-NEXT: [[TMP32:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 1824 // CHECK2-NEXT: [[TMP33:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP29]], i16 [[TMP32]] monotonic monotonic, align 2 1825 // CHECK2-NEXT: [[TMP34]] = extractvalue { i16, i1 } [[TMP33]], 0 1826 // CHECK2-NEXT: [[TMP35:%.*]] = extractvalue { i16, i1 } [[TMP33]], 1 1827 // CHECK2-NEXT: br i1 [[TMP35]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 1828 // CHECK2: atomic_exit: 1829 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 1830 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 1831 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP27]] 1832 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 1833 // CHECK2: omp.arraycpy.done21: 1834 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1835 // CHECK2: .omp.reduction.default: 1836 // CHECK2-NEXT: [[TMP36:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 1837 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP36]]) 1838 // CHECK2-NEXT: ret void 1839 // 1840 // 1841 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 1842 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 1843 // CHECK2-NEXT: entry: 1844 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1845 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1846 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1847 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1848 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1849 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 1850 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1851 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 1852 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 1853 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1854 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 1855 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 1856 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1857 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 1858 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 1859 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 1860 // CHECK2-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 1861 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 1862 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 1863 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 1864 // CHECK2: omp.arraycpy.body: 1865 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1866 // CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 1867 // CHECK2-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 1868 // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 1869 // CHECK2-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 1870 // CHECK2-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 1871 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 1872 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 1873 // CHECK2-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 1874 // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 1875 // CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 1876 // CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 1877 // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 1878 // CHECK2: omp.arraycpy.done4: 1879 // CHECK2-NEXT: ret void 1880 // 1881 // 1882 // CHECK2-LABEL: define {{[^@]+}}@main 1883 // CHECK2-SAME: () #[[ATTR6:[0-9]+]] { 1884 // CHECK2-NEXT: entry: 1885 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1886 // CHECK2-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 1887 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1888 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca float, align 4 1889 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca float, align 4 1890 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1891 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1892 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4 1893 // CHECK2-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4 1894 // CHECK2-NEXT: [[CF:%.*]] = alloca { float, float }, align 4 1895 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 1896 // CHECK2-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @sivar) 1897 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 1898 // CHECK2-NEXT: store float 0.000000e+00, float* [[T_VAR]], align 4 1899 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1900 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1901 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1902 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00) 1903 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1904 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00) 1905 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00) 1906 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) 1907 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, float*, [2 x %struct.S]*, %struct.S*, %struct.S*, float*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], float* [[T_VAR]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], %struct.S* [[VAR1]], float* [[T_VAR1]]) 1908 // CHECK2-NEXT: [[CALL:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) 1909 // CHECK2-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL]], 0.000000e+00 1910 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 1911 // CHECK2: if.then: 1912 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, float*, [2 x %struct.S]*, %struct.S*, %struct.S*, float*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], float* [[T_VAR]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[VAR]], %struct.S* [[VAR1]], float* [[T_VAR1]]) 1913 // CHECK2-NEXT: br label [[IF_END]] 1914 // CHECK2: if.end: 1915 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, { float, float }*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), { float, float }* [[CF]]) 1916 // CHECK2-NEXT: [[CALL1:%.*]] = call noundef i32 @_Z5tmainIiET_v() 1917 // CHECK2-NEXT: store i32 [[CALL1]], i32* [[RETVAL]], align 4 1918 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5:[0-9]+]] 1919 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 1920 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1921 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1922 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1923 // CHECK2: arraydestroy.body: 1924 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[IF_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1925 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1926 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 1927 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 1928 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]] 1929 // CHECK2: arraydestroy.done2: 1930 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 1931 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 1932 // CHECK2-NEXT: ret i32 [[TMP2]] 1933 // 1934 // 1935 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 1936 // CHECK2-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 { 1937 // CHECK2-NEXT: entry: 1938 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1939 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 1940 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1941 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 1942 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1943 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 1944 // CHECK2-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 1945 // CHECK2-NEXT: ret void 1946 // 1947 // 1948 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1949 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1950 // CHECK2-NEXT: entry: 1951 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1952 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1953 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1954 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 1955 // CHECK2-NEXT: ret void 1956 // 1957 // 1958 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1959 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 1960 // CHECK2-NEXT: entry: 1961 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1962 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1963 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1964 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1965 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1966 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1967 // CHECK2-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]]) 1968 // CHECK2-NEXT: ret void 1969 // 1970 // 1971 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1972 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] { 1973 // CHECK2-NEXT: entry: 1974 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1975 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1976 // CHECK2-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 1977 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca float*, align 8 1978 // CHECK2-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 1979 // CHECK2-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 1980 // CHECK2-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S*, align 8 1981 // CHECK2-NEXT: [[T_VAR1_ADDR:%.*]] = alloca float*, align 8 1982 // CHECK2-NEXT: [[T_VAR2:%.*]] = alloca float, align 4 1983 // CHECK2-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1984 // CHECK2-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4 1985 // CHECK2-NEXT: [[T_VAR15:%.*]] = alloca float, align 4 1986 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 1987 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S]], align 4 1988 // CHECK2-NEXT: [[REF_TMP12:%.*]] = alloca [[STRUCT_S]], align 4 1989 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca float, align 4 1990 // CHECK2-NEXT: [[TMP:%.*]] = alloca float, align 4 1991 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1992 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1993 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 1994 // CHECK2-NEXT: store float* [[T_VAR]], float** [[T_VAR_ADDR]], align 8 1995 // CHECK2-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 1996 // CHECK2-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 1997 // CHECK2-NEXT: store %struct.S* [[VAR1]], %struct.S** [[VAR1_ADDR]], align 8 1998 // CHECK2-NEXT: store float* [[T_VAR1]], float** [[T_VAR1_ADDR]], align 8 1999 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2000 // CHECK2-NEXT: [[TMP1:%.*]] = load float*, float** [[T_VAR_ADDR]], align 8 2001 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2002 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2003 // CHECK2-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR1_ADDR]], align 8 2004 // CHECK2-NEXT: [[TMP5:%.*]] = load float*, float** [[T_VAR1_ADDR]], align 8 2005 // CHECK2-NEXT: store float 0.000000e+00, float* [[T_VAR2]], align 4 2006 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 2007 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 2008 // CHECK2-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR15]], align 4 2009 // CHECK2-NEXT: [[TMP6:%.*]] = load float, float* [[T_VAR2]], align 4 2010 // CHECK2-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32 2011 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0 2012 // CHECK2-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 2013 // CHECK2-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i64 0, i64 0 2014 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 2015 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR3]] to i8* 2016 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false) 2017 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2018 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast float* [[T_VAR2]] to i8* 2019 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8 2020 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 2021 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[VAR3]] to i8* 2022 // CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 2023 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 2024 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR14]] to i8* 2025 // CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 2026 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 2027 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast float* [[T_VAR15]] to i8* 2028 // CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 2029 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2030 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2031 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2032 // CHECK2-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 4, i64 32, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 2033 // CHECK2-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2034 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2035 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2036 // CHECK2-NEXT: ] 2037 // CHECK2: .omp.reduction.case1: 2038 // CHECK2-NEXT: [[TMP21:%.*]] = load float, float* [[TMP1]], align 4 2039 // CHECK2-NEXT: [[TMP22:%.*]] = load float, float* [[T_VAR2]], align 4 2040 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP21]], [[TMP22]] 2041 // CHECK2-NEXT: store float [[ADD]], float* [[TMP1]], align 4 2042 // CHECK2-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 2043 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 2044 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast %struct.S* [[CALL]] to i8* 2045 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP23]], i8* align 4 [[TMP24]], i64 4, i1 false) 2046 // CHECK2-NEXT: [[CALL7:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 2047 // CHECK2-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL7]], 0.000000e+00 2048 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 2049 // CHECK2: land.rhs: 2050 // CHECK2-NEXT: [[CALL8:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 2051 // CHECK2-NEXT: [[TOBOOL9:%.*]] = fcmp une float [[CALL8]], 0.000000e+00 2052 // CHECK2-NEXT: br label [[LAND_END]] 2053 // CHECK2: land.end: 2054 // CHECK2-NEXT: [[TMP25:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ] 2055 // CHECK2-NEXT: [[CONV10:%.*]] = uitofp i1 [[TMP25]] to float 2056 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV10]]) 2057 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 2058 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 2059 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 2060 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 2061 // CHECK2-NEXT: [[TMP28:%.*]] = load float, float* [[TMP5]], align 4 2062 // CHECK2-NEXT: [[TMP29:%.*]] = load float, float* [[T_VAR15]], align 4 2063 // CHECK2-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP28]], [[TMP29]] 2064 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2065 // CHECK2: cond.true: 2066 // CHECK2-NEXT: [[TMP30:%.*]] = load float, float* [[TMP5]], align 4 2067 // CHECK2-NEXT: br label [[COND_END:%.*]] 2068 // CHECK2: cond.false: 2069 // CHECK2-NEXT: [[TMP31:%.*]] = load float, float* [[T_VAR15]], align 4 2070 // CHECK2-NEXT: br label [[COND_END]] 2071 // CHECK2: cond.end: 2072 // CHECK2-NEXT: [[COND:%.*]] = phi float [ [[TMP30]], [[COND_TRUE]] ], [ [[TMP31]], [[COND_FALSE]] ] 2073 // CHECK2-NEXT: store float [[COND]], float* [[TMP5]], align 4 2074 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2075 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2076 // CHECK2: .omp.reduction.case2: 2077 // CHECK2-NEXT: [[TMP32:%.*]] = load float, float* [[T_VAR2]], align 4 2078 // CHECK2-NEXT: [[TMP33:%.*]] = atomicrmw fadd float* [[TMP1]], float [[TMP32]] monotonic, align 4 2079 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2080 // CHECK2-NEXT: [[CALL11:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 2081 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast %struct.S* [[TMP3]] to i8* 2082 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[CALL11]] to i8* 2083 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false) 2084 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2085 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2086 // CHECK2-NEXT: [[CALL13:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 2087 // CHECK2-NEXT: [[TOBOOL14:%.*]] = fcmp une float [[CALL13]], 0.000000e+00 2088 // CHECK2-NEXT: br i1 [[TOBOOL14]], label [[LAND_RHS15:%.*]], label [[LAND_END18:%.*]] 2089 // CHECK2: land.rhs15: 2090 // CHECK2-NEXT: [[CALL16:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 2091 // CHECK2-NEXT: [[TOBOOL17:%.*]] = fcmp une float [[CALL16]], 0.000000e+00 2092 // CHECK2-NEXT: br label [[LAND_END18]] 2093 // CHECK2: land.end18: 2094 // CHECK2-NEXT: [[TMP36:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL17]], [[LAND_RHS15]] ] 2095 // CHECK2-NEXT: [[CONV19:%.*]] = uitofp i1 [[TMP36]] to float 2096 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]], float noundef [[CONV19]]) 2097 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 2098 // CHECK2-NEXT: [[TMP38:%.*]] = bitcast %struct.S* [[REF_TMP12]] to i8* 2099 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP37]], i8* align 4 [[TMP38]], i64 4, i1 false) 2100 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]]) #[[ATTR5]] 2101 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2102 // CHECK2-NEXT: [[TMP39:%.*]] = load float, float* [[T_VAR15]], align 4 2103 // CHECK2-NEXT: [[TMP40:%.*]] = bitcast float* [[TMP5]] to i32* 2104 // CHECK2-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP40]] monotonic, align 4 2105 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 2106 // CHECK2: atomic_cont: 2107 // CHECK2-NEXT: [[TMP41:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[LAND_END18]] ], [ [[TMP51:%.*]], [[COND_END23:%.*]] ] 2108 // CHECK2-NEXT: [[TMP42:%.*]] = bitcast float* [[ATOMIC_TEMP]] to i32* 2109 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast i32 [[TMP41]] to float 2110 // CHECK2-NEXT: store float [[TMP43]], float* [[TMP]], align 4 2111 // CHECK2-NEXT: [[TMP44:%.*]] = load float, float* [[TMP]], align 4 2112 // CHECK2-NEXT: [[TMP45:%.*]] = load float, float* [[T_VAR15]], align 4 2113 // CHECK2-NEXT: [[CMP20:%.*]] = fcmp olt float [[TMP44]], [[TMP45]] 2114 // CHECK2-NEXT: br i1 [[CMP20]], label [[COND_TRUE21:%.*]], label [[COND_FALSE22:%.*]] 2115 // CHECK2: cond.true21: 2116 // CHECK2-NEXT: [[TMP46:%.*]] = load float, float* [[TMP]], align 4 2117 // CHECK2-NEXT: br label [[COND_END23]] 2118 // CHECK2: cond.false22: 2119 // CHECK2-NEXT: [[TMP47:%.*]] = load float, float* [[T_VAR15]], align 4 2120 // CHECK2-NEXT: br label [[COND_END23]] 2121 // CHECK2: cond.end23: 2122 // CHECK2-NEXT: [[COND24:%.*]] = phi float [ [[TMP46]], [[COND_TRUE21]] ], [ [[TMP47]], [[COND_FALSE22]] ] 2123 // CHECK2-NEXT: store float [[COND24]], float* [[ATOMIC_TEMP]], align 4 2124 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[TMP42]], align 4 2125 // CHECK2-NEXT: [[TMP49:%.*]] = bitcast float* [[TMP5]] to i32* 2126 // CHECK2-NEXT: [[TMP50:%.*]] = cmpxchg i32* [[TMP49]], i32 [[TMP41]], i32 [[TMP48]] monotonic monotonic, align 4 2127 // CHECK2-NEXT: [[TMP51]] = extractvalue { i32, i1 } [[TMP50]], 0 2128 // CHECK2-NEXT: [[TMP52:%.*]] = extractvalue { i32, i1 } [[TMP50]], 1 2129 // CHECK2-NEXT: br i1 [[TMP52]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 2130 // CHECK2: atomic_exit: 2131 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2132 // CHECK2: .omp.reduction.default: 2133 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]] 2134 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]] 2135 // CHECK2-NEXT: ret void 2136 // 2137 // 2138 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 2139 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 2140 // CHECK2-NEXT: entry: 2141 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2142 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2143 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2144 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2145 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2146 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2147 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 2148 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2149 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 2150 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 2151 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2152 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to float* 2153 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 2154 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2155 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to float* 2156 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 2157 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 2158 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S* 2159 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 2160 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 2161 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S* 2162 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 2163 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2164 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S* 2165 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 2166 // CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 2167 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S* 2168 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 2169 // CHECK2-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 2170 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to float* 2171 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 2172 // CHECK2-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 2173 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to float* 2174 // CHECK2-NEXT: [[TMP30:%.*]] = load float, float* [[TMP11]], align 4 2175 // CHECK2-NEXT: [[TMP31:%.*]] = load float, float* [[TMP8]], align 4 2176 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP30]], [[TMP31]] 2177 // CHECK2-NEXT: store float [[ADD]], float* [[TMP11]], align 4 2178 // CHECK2-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S* @_ZN1SIfEanERKS0_(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP14]]) 2179 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast %struct.S* [[TMP17]] to i8* 2180 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast %struct.S* [[CALL]] to i8* 2181 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 2182 // CHECK2-NEXT: [[CALL2:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP23]]) 2183 // CHECK2-NEXT: [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00 2184 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 2185 // CHECK2: land.rhs: 2186 // CHECK2-NEXT: [[CALL3:%.*]] = call noundef float @_ZN1SIfEcvfEv(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP20]]) 2187 // CHECK2-NEXT: [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00 2188 // CHECK2-NEXT: br label [[LAND_END]] 2189 // CHECK2: land.end: 2190 // CHECK2-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 2191 // CHECK2-NEXT: [[CONV:%.*]] = uitofp i1 [[TMP34]] to float 2192 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV]]) 2193 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast %struct.S* [[TMP23]] to i8* 2194 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast %struct.S* [[REF_TMP]] to i8* 2195 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 2196 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 2197 // CHECK2-NEXT: [[TMP37:%.*]] = load float, float* [[TMP29]], align 4 2198 // CHECK2-NEXT: [[TMP38:%.*]] = load float, float* [[TMP26]], align 4 2199 // CHECK2-NEXT: [[CMP:%.*]] = fcmp olt float [[TMP37]], [[TMP38]] 2200 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2201 // CHECK2: cond.true: 2202 // CHECK2-NEXT: [[TMP39:%.*]] = load float, float* [[TMP29]], align 4 2203 // CHECK2-NEXT: br label [[COND_END:%.*]] 2204 // CHECK2: cond.false: 2205 // CHECK2-NEXT: [[TMP40:%.*]] = load float, float* [[TMP26]], align 4 2206 // CHECK2-NEXT: br label [[COND_END]] 2207 // CHECK2: cond.end: 2208 // CHECK2-NEXT: [[COND:%.*]] = phi float [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 2209 // CHECK2-NEXT: store float [[COND]], float* [[TMP29]], align 4 2210 // CHECK2-NEXT: ret void 2211 // 2212 // 2213 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEanERKS0_ 2214 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 2215 // CHECK2-NEXT: entry: 2216 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2217 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct.S*, align 8 2218 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2219 // CHECK2-NEXT: store %struct.S* [[TMP0]], %struct.S** [[DOTADDR]], align 8 2220 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2221 // CHECK2-NEXT: ret %struct.S* [[THIS1]] 2222 // 2223 // 2224 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEcvfEv 2225 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 2226 // CHECK2-NEXT: entry: 2227 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2228 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2229 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2230 // CHECK2-NEXT: ret float 0.000000e+00 2231 // 2232 // 2233 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 2234 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2235 // CHECK2-NEXT: entry: 2236 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2237 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2238 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2239 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 2240 // CHECK2-NEXT: ret void 2241 // 2242 // 2243 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 2244 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], float* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] { 2245 // CHECK2-NEXT: entry: 2246 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2247 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2248 // CHECK2-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2249 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca float*, align 8 2250 // CHECK2-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8 2251 // CHECK2-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8 2252 // CHECK2-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S*, align 8 2253 // CHECK2-NEXT: [[T_VAR1_ADDR:%.*]] = alloca float*, align 8 2254 // CHECK2-NEXT: [[T_VAR2:%.*]] = alloca float, align 4 2255 // CHECK2-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4 2256 // CHECK2-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4 2257 // CHECK2-NEXT: [[T_VAR15:%.*]] = alloca float, align 4 2258 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2259 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2260 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2261 // CHECK2-NEXT: store float* [[T_VAR]], float** [[T_VAR_ADDR]], align 8 2262 // CHECK2-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2263 // CHECK2-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8 2264 // CHECK2-NEXT: store %struct.S* [[VAR1]], %struct.S** [[VAR1_ADDR]], align 8 2265 // CHECK2-NEXT: store float* [[T_VAR1]], float** [[T_VAR1_ADDR]], align 8 2266 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2267 // CHECK2-NEXT: [[TMP1:%.*]] = load float*, float** [[T_VAR_ADDR]], align 8 2268 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8 2269 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8 2270 // CHECK2-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[VAR1_ADDR]], align 8 2271 // CHECK2-NEXT: [[TMP5:%.*]] = load float*, float** [[T_VAR1_ADDR]], align 8 2272 // CHECK2-NEXT: store float 0.000000e+00, float* [[T_VAR2]], align 4 2273 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 2274 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 2275 // CHECK2-NEXT: store float 0x47EFFFFFE0000000, float* [[T_VAR15]], align 4 2276 // CHECK2-NEXT: br label [[WHILE_COND:%.*]] 2277 // CHECK2: while.cond: 2278 // CHECK2-NEXT: br label [[WHILE_BODY:%.*]] 2279 // CHECK2: while.body: 2280 // CHECK2-NEXT: [[TMP6:%.*]] = load float, float* [[T_VAR2]], align 4 2281 // CHECK2-NEXT: [[CONV:%.*]] = fptosi float [[TMP6]] to i32 2282 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0 2283 // CHECK2-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 2284 // CHECK2-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP2]], i64 0, i64 0 2285 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 2286 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR3]] to i8* 2287 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 4, i1 false) 2288 // CHECK2-NEXT: br label [[WHILE_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2289 // 2290 // 2291 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 2292 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], { float, float }* noundef nonnull align 4 dereferenceable(8) [[CF:%.*]]) #[[ATTR1]] { 2293 // CHECK2-NEXT: entry: 2294 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2295 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2296 // CHECK2-NEXT: [[CF_ADDR:%.*]] = alloca { float, float }*, align 8 2297 // CHECK2-NEXT: [[CF1:%.*]] = alloca { float, float }, align 4 2298 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2299 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca { float, float }, align 4 2300 // CHECK2-NEXT: [[ATOMIC_TEMP10:%.*]] = alloca { float, float }, align 4 2301 // CHECK2-NEXT: [[TMP:%.*]] = alloca { float, float }, align 4 2302 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2303 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2304 // CHECK2-NEXT: store { float, float }* [[CF]], { float, float }** [[CF_ADDR]], align 8 2305 // CHECK2-NEXT: [[TMP0:%.*]] = load { float, float }*, { float, float }** [[CF_ADDR]], align 8 2306 // CHECK2-NEXT: [[CF1_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 2307 // CHECK2-NEXT: [[CF1_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 2308 // CHECK2-NEXT: store float 0.000000e+00, float* [[CF1_REALP]], align 4 2309 // CHECK2-NEXT: store float 0.000000e+00, float* [[CF1_IMAGP]], align 4 2310 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2311 // CHECK2-NEXT: [[TMP2:%.*]] = bitcast { float, float }* [[CF1]] to i8* 2312 // CHECK2-NEXT: store i8* [[TMP2]], i8** [[TMP1]], align 8 2313 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2314 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2315 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2316 // CHECK2-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP5]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 2317 // CHECK2-NEXT: switch i32 [[TMP6]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2318 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2319 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2320 // CHECK2-NEXT: ] 2321 // CHECK2: .omp.reduction.case1: 2322 // CHECK2-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 0 2323 // CHECK2-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 2324 // CHECK2-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 1 2325 // CHECK2-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 2326 // CHECK2-NEXT: [[CF1_REALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 2327 // CHECK2-NEXT: [[CF1_REAL:%.*]] = load float, float* [[CF1_REALP2]], align 4 2328 // CHECK2-NEXT: [[CF1_IMAGP3:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 2329 // CHECK2-NEXT: [[CF1_IMAG:%.*]] = load float, float* [[CF1_IMAGP3]], align 4 2330 // CHECK2-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[CF1_REAL]] 2331 // CHECK2-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[CF1_IMAG]] 2332 // CHECK2-NEXT: [[DOTREALP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 0 2333 // CHECK2-NEXT: [[DOTIMAGP5:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP0]], i32 0, i32 1 2334 // CHECK2-NEXT: store float [[ADD_R]], float* [[DOTREALP4]], align 4 2335 // CHECK2-NEXT: store float [[ADD_I]], float* [[DOTIMAGP5]], align 4 2336 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2337 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2338 // CHECK2: .omp.reduction.case2: 2339 // CHECK2-NEXT: [[CF1_REALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 2340 // CHECK2-NEXT: [[CF1_REAL7:%.*]] = load float, float* [[CF1_REALP6]], align 4 2341 // CHECK2-NEXT: [[CF1_IMAGP8:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 2342 // CHECK2-NEXT: [[CF1_IMAG9:%.*]] = load float, float* [[CF1_IMAGP8]], align 4 2343 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast { float, float }* [[TMP0]] to i8* 2344 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 2345 // CHECK2-NEXT: call void @__atomic_load(i64 noundef 8, i8* noundef [[TMP7]], i8* noundef [[TMP8]], i32 noundef 0) 2346 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 2347 // CHECK2: atomic_cont: 2348 // CHECK2-NEXT: [[ATOMIC_TEMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 0 2349 // CHECK2-NEXT: [[ATOMIC_TEMP_REAL:%.*]] = load float, float* [[ATOMIC_TEMP_REALP]], align 4 2350 // CHECK2-NEXT: [[ATOMIC_TEMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP]], i32 0, i32 1 2351 // CHECK2-NEXT: [[ATOMIC_TEMP_IMAG:%.*]] = load float, float* [[ATOMIC_TEMP_IMAGP]], align 4 2352 // CHECK2-NEXT: [[TMP_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 2353 // CHECK2-NEXT: [[TMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 2354 // CHECK2-NEXT: store float [[ATOMIC_TEMP_REAL]], float* [[TMP_REALP]], align 4 2355 // CHECK2-NEXT: store float [[ATOMIC_TEMP_IMAG]], float* [[TMP_IMAGP]], align 4 2356 // CHECK2-NEXT: [[TMP_REALP11:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 0 2357 // CHECK2-NEXT: [[TMP_REAL:%.*]] = load float, float* [[TMP_REALP11]], align 4 2358 // CHECK2-NEXT: [[TMP_IMAGP12:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP]], i32 0, i32 1 2359 // CHECK2-NEXT: [[TMP_IMAG:%.*]] = load float, float* [[TMP_IMAGP12]], align 4 2360 // CHECK2-NEXT: [[CF1_REALP13:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 0 2361 // CHECK2-NEXT: [[CF1_REAL14:%.*]] = load float, float* [[CF1_REALP13]], align 4 2362 // CHECK2-NEXT: [[CF1_IMAGP15:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[CF1]], i32 0, i32 1 2363 // CHECK2-NEXT: [[CF1_IMAG16:%.*]] = load float, float* [[CF1_IMAGP15]], align 4 2364 // CHECK2-NEXT: [[ADD_R17:%.*]] = fadd float [[TMP_REAL]], [[CF1_REAL14]] 2365 // CHECK2-NEXT: [[ADD_I18:%.*]] = fadd float [[TMP_IMAG]], [[CF1_IMAG16]] 2366 // CHECK2-NEXT: [[ATOMIC_TEMP10_REALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP10]], i32 0, i32 0 2367 // CHECK2-NEXT: [[ATOMIC_TEMP10_IMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[ATOMIC_TEMP10]], i32 0, i32 1 2368 // CHECK2-NEXT: store float [[ADD_R17]], float* [[ATOMIC_TEMP10_REALP]], align 4 2369 // CHECK2-NEXT: store float [[ADD_I18]], float* [[ATOMIC_TEMP10_IMAGP]], align 4 2370 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast { float, float }* [[TMP0]] to i8* 2371 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP]] to i8* 2372 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast { float, float }* [[ATOMIC_TEMP10]] to i8* 2373 // CHECK2-NEXT: [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef [[TMP9]], i8* noundef [[TMP10]], i8* noundef [[TMP11]], i32 noundef 0, i32 noundef 0) 2374 // CHECK2-NEXT: br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 2375 // CHECK2: atomic_exit: 2376 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2377 // CHECK2: .omp.reduction.default: 2378 // CHECK2-NEXT: ret void 2379 // 2380 // 2381 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 2382 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 2383 // CHECK2-NEXT: entry: 2384 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2385 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2386 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2387 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2388 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2389 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2390 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2391 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2392 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2393 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2394 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to { float, float }* 2395 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2396 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2397 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to { float, float }* 2398 // CHECK2-NEXT: [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 2399 // CHECK2-NEXT: [[DOTREAL:%.*]] = load float, float* [[DOTREALP]], align 4 2400 // CHECK2-NEXT: [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 2401 // CHECK2-NEXT: [[DOTIMAG:%.*]] = load float, float* [[DOTIMAGP]], align 4 2402 // CHECK2-NEXT: [[DOTREALP2:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 0 2403 // CHECK2-NEXT: [[DOTREAL3:%.*]] = load float, float* [[DOTREALP2]], align 4 2404 // CHECK2-NEXT: [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP8]], i32 0, i32 1 2405 // CHECK2-NEXT: [[DOTIMAG5:%.*]] = load float, float* [[DOTIMAGP4]], align 4 2406 // CHECK2-NEXT: [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[DOTREAL3]] 2407 // CHECK2-NEXT: [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[DOTIMAG5]] 2408 // CHECK2-NEXT: [[DOTREALP6:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 0 2409 // CHECK2-NEXT: [[DOTIMAGP7:%.*]] = getelementptr inbounds { float, float }, { float, float }* [[TMP11]], i32 0, i32 1 2410 // CHECK2-NEXT: store float [[ADD_R]], float* [[DOTREALP6]], align 4 2411 // CHECK2-NEXT: store float [[ADD_I]], float* [[DOTIMAGP7]], align 4 2412 // CHECK2-NEXT: ret void 2413 // 2414 // 2415 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2416 // CHECK2-SAME: () #[[ATTR0]] { 2417 // CHECK2-NEXT: entry: 2418 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2419 // CHECK2-NEXT: [[T:%.*]] = alloca i32, align 4 2420 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2421 // CHECK2-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4 2422 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 128 2423 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 128 2424 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2425 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 2426 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128 2427 // CHECK2-NEXT: [[VAR1:%.*]] = alloca [[STRUCT_S_0]], align 128 2428 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 2429 // CHECK2-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]]) 2430 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 128 2431 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2432 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2433 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 2434 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1) 2435 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 2436 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2) 2437 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3) 2438 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) 2439 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [2 x i32]*, i32*, [2 x %struct.S.0]*, %struct.S.0*, %struct.S.0*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), [2 x i32]* [[VEC]], i32* [[T_VAR]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[VAR]], %struct.S.0* [[VAR1]], i32* [[T_VAR1]]) 2440 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 2441 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]] 2442 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]] 2443 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 2444 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 2445 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 2446 // CHECK2: arraydestroy.body: 2447 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 2448 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 2449 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]] 2450 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 2451 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 2452 // CHECK2: arraydestroy.done1: 2453 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]] 2454 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 2455 // CHECK2-NEXT: ret i32 [[TMP2]] 2456 // 2457 // 2458 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 2459 // CHECK2-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2460 // CHECK2-NEXT: entry: 2461 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2462 // CHECK2-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 2463 // CHECK2-NEXT: [[A2:%.*]] = alloca i32*, align 8 2464 // CHECK2-NEXT: [[B4:%.*]] = alloca i32, align 4 2465 // CHECK2-NEXT: [[C5:%.*]] = alloca i32*, align 8 2466 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2467 // CHECK2-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 2468 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2469 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2470 // CHECK2-NEXT: store i32 0, i32* [[A]], align 8 2471 // CHECK2-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2472 // CHECK2-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 2473 // CHECK2-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 2474 // CHECK2-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 2475 // CHECK2-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4 2476 // CHECK2-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2477 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 2478 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 2479 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2480 // CHECK2-NEXT: store i32* [[A3]], i32** [[A2]], align 8 2481 // CHECK2-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 2482 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 2483 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 2484 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 2485 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8 2486 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]]) 2487 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[B4]], align 4 2488 // CHECK2-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 2489 // CHECK2-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8 2490 // CHECK2-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 2491 // CHECK2-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15 2492 // CHECK2-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 2493 // CHECK2-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 2494 // CHECK2-NEXT: store i8 [[BF_SET10]], i8* [[B7]], align 4 2495 // CHECK2-NEXT: ret void 2496 // 2497 // 2498 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 2499 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 2500 // CHECK2-NEXT: entry: 2501 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2502 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2503 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2504 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2505 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 2506 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 2507 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2508 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 2509 // CHECK2-NEXT: [[A2:%.*]] = alloca i32, align 4 2510 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 2511 // CHECK2-NEXT: [[B4:%.*]] = alloca i32, align 4 2512 // CHECK2-NEXT: [[C5:%.*]] = alloca i32, align 4 2513 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 2514 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 2515 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2516 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2517 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2518 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2519 // CHECK2-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 2520 // CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 2521 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2522 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2523 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 2524 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 2525 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2526 // CHECK2-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 2527 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 2528 // CHECK2-NEXT: store i32 0, i32* [[A2]], align 4 2529 // CHECK2-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8 2530 // CHECK2-NEXT: store i32 0, i32* [[B4]], align 4 2531 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 2532 // CHECK2-NEXT: store i32 0, i32* [[C5]], align 4 2533 // CHECK2-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8 2534 // CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8 2535 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 2536 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 2537 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4 2538 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 2539 // CHECK2-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP8]], -1 2540 // CHECK2-NEXT: store i32 [[DEC]], i32* [[B4]], align 4 2541 // CHECK2-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP6]], align 8 2542 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2543 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 2544 // CHECK2-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 2545 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2546 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i32* [[A2]] to i8* 2547 // CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 2548 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 2549 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i32* [[B4]] to i8* 2550 // CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 2551 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 2552 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i32* [[C5]] to i8* 2553 // CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 2554 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2555 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2556 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2557 // CHECK2-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 3, i64 24, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.7, [8 x i32]* @.gomp_critical_user_.reduction.var) 2558 // CHECK2-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2559 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2560 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2561 // CHECK2-NEXT: ] 2562 // CHECK2: .omp.reduction.case1: 2563 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4 2564 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[A2]], align 4 2565 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2566 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4 2567 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP2]], align 4 2568 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[B4]], align 4 2569 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 2570 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[TMP2]], align 4 2571 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP5]], align 4 2572 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[C5]], align 4 2573 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 2574 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[TMP5]], align 4 2575 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2576 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2577 // CHECK2: .omp.reduction.case2: 2578 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[A2]], align 4 2579 // CHECK2-NEXT: [[TMP28:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP27]] monotonic, align 4 2580 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[B4]], align 4 2581 // CHECK2-NEXT: [[TMP30:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP29]] monotonic, align 4 2582 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[C5]], align 4 2583 // CHECK2-NEXT: [[TMP32:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP31]] monotonic, align 4 2584 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2585 // CHECK2: .omp.reduction.default: 2586 // CHECK2-NEXT: ret void 2587 // 2588 // 2589 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.7 2590 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 2591 // CHECK2-NEXT: entry: 2592 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2593 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2594 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2595 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2596 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2597 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 2598 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2599 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 2600 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 2601 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2602 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2603 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 2604 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2605 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2606 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 2607 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 2608 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 2609 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 2610 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 2611 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 2612 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 2613 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2614 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 2615 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 2616 // CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 2617 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 2618 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 2619 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 2620 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 2621 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2622 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 2623 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 2624 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 2625 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 2626 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 2627 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 2628 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 2629 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 2630 // CHECK2-NEXT: ret void 2631 // 2632 // 2633 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 2634 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2635 // CHECK2-NEXT: entry: 2636 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2637 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2638 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2639 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2640 // CHECK2-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 2641 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to float 2642 // CHECK2-NEXT: store float [[CONV]], float* [[F]], align 4 2643 // CHECK2-NEXT: ret void 2644 // 2645 // 2646 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 2647 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2648 // CHECK2-NEXT: entry: 2649 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2650 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 2651 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2652 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 2653 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2654 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2655 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 2656 // CHECK2-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 2657 // CHECK2-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to float 2658 // CHECK2-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]] 2659 // CHECK2-NEXT: store float [[ADD]], float* [[F]], align 4 2660 // CHECK2-NEXT: ret void 2661 // 2662 // 2663 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 2664 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2665 // CHECK2-NEXT: entry: 2666 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2667 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2668 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2669 // CHECK2-NEXT: ret void 2670 // 2671 // 2672 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 2673 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2674 // CHECK2-NEXT: entry: 2675 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2676 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2677 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2678 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2679 // CHECK2-NEXT: ret void 2680 // 2681 // 2682 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev 2683 // CHECK2-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2684 // CHECK2-NEXT: entry: 2685 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2686 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2687 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2688 // CHECK2-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 2689 // CHECK2-NEXT: ret void 2690 // 2691 // 2692 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 2693 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2694 // CHECK2-NEXT: entry: 2695 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2696 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 2697 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2698 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 2699 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2700 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 2701 // CHECK2-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2702 // CHECK2-NEXT: ret void 2703 // 2704 // 2705 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8 2706 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [2 x i32]* noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x %struct.S.0]* noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] { 2707 // CHECK2-NEXT: entry: 2708 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2709 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2710 // CHECK2-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8 2711 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 2712 // CHECK2-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8 2713 // CHECK2-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8 2714 // CHECK2-NEXT: [[VAR1_ADDR:%.*]] = alloca %struct.S.0*, align 8 2715 // CHECK2-NEXT: [[T_VAR1_ADDR:%.*]] = alloca i32*, align 8 2716 // CHECK2-NEXT: [[T_VAR2:%.*]] = alloca i32, align 128 2717 // CHECK2-NEXT: [[VAR3:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128 2718 // CHECK2-NEXT: [[VAR14:%.*]] = alloca [[STRUCT_S_0]], align 128 2719 // CHECK2-NEXT: [[T_VAR15:%.*]] = alloca i32, align 128 2720 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x i8*], align 8 2721 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_0]], align 4 2722 // CHECK2-NEXT: [[REF_TMP11:%.*]] = alloca [[STRUCT_S_0]], align 4 2723 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2724 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2725 // CHECK2-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8 2726 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 2727 // CHECK2-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2728 // CHECK2-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8 2729 // CHECK2-NEXT: store %struct.S.0* [[VAR1]], %struct.S.0** [[VAR1_ADDR]], align 8 2730 // CHECK2-NEXT: store i32* [[T_VAR1]], i32** [[T_VAR1_ADDR]], align 8 2731 // CHECK2-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8 2732 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 2733 // CHECK2-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8 2734 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8 2735 // CHECK2-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR1_ADDR]], align 8 2736 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[T_VAR1_ADDR]], align 8 2737 // CHECK2-NEXT: store i32 0, i32* [[T_VAR2]], align 128 2738 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 2739 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 2740 // CHECK2-NEXT: store i32 2147483647, i32* [[T_VAR15]], align 128 2741 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR2]], align 128 2742 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP0]], i64 0, i64 0 2743 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[ARRAYIDX]], align 4 2744 // CHECK2-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[TMP2]], i64 0, i64 0 2745 // CHECK2-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 2746 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast %struct.S.0* [[VAR3]] to i8* 2747 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 128 [[TMP8]], i64 4, i1 false) 2748 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2749 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i32* [[T_VAR2]] to i8* 2750 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 8 2751 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 2752 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[VAR3]] to i8* 2753 // CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 2754 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 2755 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[VAR14]] to i8* 2756 // CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 2757 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3 2758 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast i32* [[T_VAR15]] to i8* 2759 // CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 2760 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2761 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 2762 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2763 // CHECK2-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 4, i64 32, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.9, [8 x i32]* @.gomp_critical_user_.reduction.var) 2764 // CHECK2-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2765 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2766 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2767 // CHECK2-NEXT: ] 2768 // CHECK2: .omp.reduction.case1: 2769 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP1]], align 128 2770 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 128 2771 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 2772 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP1]], align 128 2773 // CHECK2-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 2774 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 2775 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast %struct.S.0* [[CALL]] to i8* 2776 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP23]], i8* align 4 [[TMP24]], i64 4, i1 false) 2777 // CHECK2-NEXT: [[CALL7:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 2778 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL7]], 0 2779 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 2780 // CHECK2: land.rhs: 2781 // CHECK2-NEXT: [[CALL8:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 2782 // CHECK2-NEXT: [[TOBOOL9:%.*]] = icmp ne i32 [[CALL8]], 0 2783 // CHECK2-NEXT: br label [[LAND_END]] 2784 // CHECK2: land.end: 2785 // CHECK2-NEXT: [[TMP25:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ] 2786 // CHECK2-NEXT: [[CONV:%.*]] = zext i1 [[TMP25]] to i32 2787 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]]) 2788 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2789 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[REF_TMP]] to i8* 2790 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP26]], i8* align 4 [[TMP27]], i64 4, i1 false) 2791 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 2792 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP5]], align 128 2793 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[T_VAR15]], align 128 2794 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP28]], [[TMP29]] 2795 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2796 // CHECK2: cond.true: 2797 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP5]], align 128 2798 // CHECK2-NEXT: br label [[COND_END:%.*]] 2799 // CHECK2: cond.false: 2800 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[T_VAR15]], align 128 2801 // CHECK2-NEXT: br label [[COND_END]] 2802 // CHECK2: cond.end: 2803 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE]] ], [ [[TMP31]], [[COND_FALSE]] ] 2804 // CHECK2-NEXT: store i32 [[COND]], i32* [[TMP5]], align 128 2805 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2806 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2807 // CHECK2: .omp.reduction.case2: 2808 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[T_VAR2]], align 128 2809 // CHECK2-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP1]], i32 [[TMP32]] monotonic, align 4 2810 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2811 // CHECK2-NEXT: [[CALL10:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP3]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) 2812 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[TMP3]] to i8* 2813 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[CALL10]] to i8* 2814 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP34]], i8* align 4 [[TMP35]], i64 4, i1 false) 2815 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2816 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2817 // CHECK2-NEXT: [[CALL12:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP4]]) 2818 // CHECK2-NEXT: [[TOBOOL13:%.*]] = icmp ne i32 [[CALL12]], 0 2819 // CHECK2-NEXT: br i1 [[TOBOOL13]], label [[LAND_RHS14:%.*]], label [[LAND_END17:%.*]] 2820 // CHECK2: land.rhs14: 2821 // CHECK2-NEXT: [[CALL15:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) 2822 // CHECK2-NEXT: [[TOBOOL16:%.*]] = icmp ne i32 [[CALL15]], 0 2823 // CHECK2-NEXT: br label [[LAND_END17]] 2824 // CHECK2: land.end17: 2825 // CHECK2-NEXT: [[TMP36:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL16]], [[LAND_RHS14]] ] 2826 // CHECK2-NEXT: [[CONV18:%.*]] = zext i1 [[TMP36]] to i32 2827 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]], i32 noundef [[CONV18]]) 2828 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 2829 // CHECK2-NEXT: [[TMP38:%.*]] = bitcast %struct.S.0* [[REF_TMP11]] to i8* 2830 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP37]], i8* align 4 [[TMP38]], i64 4, i1 false) 2831 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]]) #[[ATTR5]] 2832 // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) 2833 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[T_VAR15]], align 128 2834 // CHECK2-NEXT: [[TMP40:%.*]] = atomicrmw min i32* [[TMP5]], i32 [[TMP39]] monotonic, align 4 2835 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2836 // CHECK2: .omp.reduction.default: 2837 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]] 2838 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]] 2839 // CHECK2-NEXT: ret void 2840 // 2841 // 2842 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.9 2843 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 2844 // CHECK2-NEXT: entry: 2845 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2846 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2847 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 2848 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2849 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2850 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2851 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [4 x i8*]* 2852 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2853 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [4 x i8*]* 2854 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 0 2855 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2856 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2857 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 0 2858 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2859 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2860 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 1 2861 // CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 2862 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.S.0* 2863 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 1 2864 // CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 2865 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to %struct.S.0* 2866 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 2 2867 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2868 // CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to %struct.S.0* 2869 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 2 2870 // CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 2871 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to %struct.S.0* 2872 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP5]], i64 0, i64 3 2873 // CHECK2-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 2874 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8* [[TMP25]] to i32* 2875 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[TMP3]], i64 0, i64 3 2876 // CHECK2-NEXT: [[TMP28:%.*]] = load i8*, i8** [[TMP27]], align 8 2877 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8* [[TMP28]] to i32* 2878 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP11]], align 128 2879 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP8]], align 128 2880 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]] 2881 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 2882 // CHECK2-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) %struct.S.0* @_ZN1SIiEanERKS0_(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP17]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP14]]) 2883 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[TMP17]] to i8* 2884 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast %struct.S.0* [[CALL]] to i8* 2885 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP32]], i8* align 4 [[TMP33]], i64 4, i1 false) 2886 // CHECK2-NEXT: [[CALL2:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP23]]) 2887 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0 2888 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]] 2889 // CHECK2: land.rhs: 2890 // CHECK2-NEXT: [[CALL3:%.*]] = call noundef i32 @_ZN1SIiEcviEv(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP20]]) 2891 // CHECK2-NEXT: [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0 2892 // CHECK2-NEXT: br label [[LAND_END]] 2893 // CHECK2: land.end: 2894 // CHECK2-NEXT: [[TMP34:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ] 2895 // CHECK2-NEXT: [[CONV:%.*]] = zext i1 [[TMP34]] to i32 2896 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]]) 2897 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast %struct.S.0* [[TMP23]] to i8* 2898 // CHECK2-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[REF_TMP]] to i8* 2899 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP35]], i8* align 4 [[TMP36]], i64 4, i1 false) 2900 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]] 2901 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP29]], align 128 2902 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP26]], align 128 2903 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP37]], [[TMP38]] 2904 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2905 // CHECK2: cond.true: 2906 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[TMP29]], align 128 2907 // CHECK2-NEXT: br label [[COND_END:%.*]] 2908 // CHECK2: cond.false: 2909 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP26]], align 128 2910 // CHECK2-NEXT: br label [[COND_END]] 2911 // CHECK2: cond.end: 2912 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE]] ], [ [[TMP40]], [[COND_FALSE]] ] 2913 // CHECK2-NEXT: store i32 [[COND]], i32* [[TMP29]], align 128 2914 // CHECK2-NEXT: ret void 2915 // 2916 // 2917 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEanERKS0_ 2918 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], %struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 { 2919 // CHECK2-NEXT: entry: 2920 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2921 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct.S.0*, align 8 2922 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2923 // CHECK2-NEXT: store %struct.S.0* [[TMP0]], %struct.S.0** [[DOTADDR]], align 8 2924 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2925 // CHECK2-NEXT: ret %struct.S.0* [[THIS1]] 2926 // 2927 // 2928 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEcviEv 2929 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 { 2930 // CHECK2-NEXT: entry: 2931 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2932 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2933 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2934 // CHECK2-NEXT: ret i32 0 2935 // 2936 // 2937 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 2938 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2939 // CHECK2-NEXT: entry: 2940 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2941 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2942 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2943 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]] 2944 // CHECK2-NEXT: ret void 2945 // 2946 // 2947 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 2948 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2949 // CHECK2-NEXT: entry: 2950 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 2951 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 2952 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 2953 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 2954 // CHECK2-NEXT: [[TMP0:%.*]] = load volatile i32, i32* @g, align 128 2955 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 2956 // CHECK2-NEXT: ret void 2957 // 2958 // 2959 // CHECK2-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev 2960 // CHECK2-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 2961 // CHECK2-NEXT: entry: 2962 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2963 // CHECK2-NEXT: [[A2:%.*]] = alloca i32*, align 8 2964 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2965 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2966 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0 2967 // CHECK2-NEXT: store i32 0, i32* [[A]], align 4 2968 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], %struct.SST* [[THIS1]], i32 0, i32 0 2969 // CHECK2-NEXT: store i32* [[A3]], i32** [[A2]], align 8 2970 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A2]], align 8 2971 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SST* [[THIS1]], i32* [[TMP0]]) 2972 // CHECK2-NEXT: ret void 2973 // 2974 // 2975 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 2976 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1]] { 2977 // CHECK2-NEXT: entry: 2978 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2979 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2980 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8 2981 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 2982 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32*, align 8 2983 // CHECK2-NEXT: [[A1:%.*]] = alloca i32, align 4 2984 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2985 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2986 // CHECK2-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i32, align 4 2987 // CHECK2-NEXT: [[_TMP3:%.*]] = alloca i32, align 4 2988 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2989 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2990 // CHECK2-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8 2991 // CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 2992 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8 2993 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 2994 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 2995 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP]], align 8 2996 // CHECK2-NEXT: store i32 1, i32* [[A1]], align 4 2997 // CHECK2-NEXT: store i32* [[A1]], i32** [[_TMP2]], align 8 2998 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[_TMP2]], align 8 2999 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3000 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 3001 // CHECK2-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 3002 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3003 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i32* [[A1]] to i8* 3004 // CHECK2-NEXT: store i8* [[TMP6]], i8** [[TMP5]], align 8 3005 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3006 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 3007 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3008 // CHECK2-NEXT: [[TMP10:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 1, i64 8, i8* [[TMP9]], void (i8*, i8*)* @.omp.reduction.reduction_func.11, [8 x i32]* @.gomp_critical_user_.reduction.var) 3009 // CHECK2-NEXT: switch i32 [[TMP10]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3010 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3011 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3012 // CHECK2-NEXT: ] 3013 // CHECK2: .omp.reduction.case1: 3014 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP2]], align 4 3015 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[A1]], align 4 3016 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], [[TMP12]] 3017 // CHECK2-NEXT: store i32 [[MUL]], i32* [[TMP2]], align 4 3018 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3019 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3020 // CHECK2: .omp.reduction.case2: 3021 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[A1]], align 4 3022 // CHECK2-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i32, i32* [[TMP2]] monotonic, align 4 3023 // CHECK2-NEXT: br label [[ATOMIC_CONT:%.*]] 3024 // CHECK2: atomic_cont: 3025 // CHECK2-NEXT: [[TMP14:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP19:%.*]], [[ATOMIC_CONT]] ] 3026 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[_TMP3]], align 4 3027 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[_TMP3]], align 4 3028 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[A1]], align 4 3029 // CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP15]], [[TMP16]] 3030 // CHECK2-NEXT: store i32 [[MUL4]], i32* [[ATOMIC_TEMP]], align 4 3031 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[ATOMIC_TEMP]], align 4 3032 // CHECK2-NEXT: [[TMP18:%.*]] = cmpxchg i32* [[TMP2]], i32 [[TMP14]], i32 [[TMP17]] monotonic monotonic, align 4 3033 // CHECK2-NEXT: [[TMP19]] = extractvalue { i32, i1 } [[TMP18]], 0 3034 // CHECK2-NEXT: [[TMP20:%.*]] = extractvalue { i32, i1 } [[TMP18]], 1 3035 // CHECK2-NEXT: br i1 [[TMP20]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]] 3036 // CHECK2: atomic_exit: 3037 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3038 // CHECK2: .omp.reduction.default: 3039 // CHECK2-NEXT: ret void 3040 // 3041 // 3042 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.11 3043 // CHECK2-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 3044 // CHECK2-NEXT: entry: 3045 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3046 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3047 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3048 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3049 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3050 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3051 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3052 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3053 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3054 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3055 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3056 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 3057 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3058 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3059 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3060 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 3061 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]] 3062 // CHECK2-NEXT: store i32 [[MUL]], i32* [[TMP11]], align 4 3063 // CHECK2-NEXT: ret void 3064 // 3065 // 3066 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 3067 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3068 // CHECK2-NEXT: entry: 3069 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3070 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 3071 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3072 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 3073 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3074 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 3075 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 3076 // CHECK2-NEXT: [[TMP1:%.*]] = load volatile i32, i32* @g, align 128 3077 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] 3078 // CHECK2-NEXT: store i32 [[ADD]], i32* [[F]], align 4 3079 // CHECK2-NEXT: ret void 3080 // 3081 // 3082 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 3083 // CHECK2-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3084 // CHECK2-NEXT: entry: 3085 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 3086 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 3087 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 3088 // CHECK2-NEXT: ret void 3089 // 3090 // 3091 // CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 3092 // CHECK3-SAME: (i16* noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] { 3093 // CHECK3-NEXT: entry: 3094 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 3095 // CHECK3-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 3096 // CHECK3-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3097 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i16*)* @.omp_outlined. to void (i32*, i32*, ...)*), i16* [[TMP0]]) 3098 // CHECK3-NEXT: ret void 3099 // 3100 // 3101 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 3102 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i16* noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] { 3103 // CHECK3-NEXT: entry: 3104 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3105 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3106 // CHECK3-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 3107 // CHECK3-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3108 // CHECK3-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3109 // CHECK3-NEXT: [[TMP:%.*]] = alloca i16*, align 8 3110 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 3111 // CHECK3-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 3112 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 3113 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3114 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3115 // CHECK3-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 3116 // CHECK3-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3117 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP0]], i64 0 3118 // CHECK3-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3119 // CHECK3-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP1]], i64 0 3120 // CHECK3-NEXT: [[TMP2:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 3121 // CHECK3-NEXT: [[TMP3:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3122 // CHECK3-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]] 3123 // CHECK3-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3124 // CHECK3-NEXT: [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1 3125 // CHECK3-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3126 // CHECK3-NEXT: [[TMP8:%.*]] = call i8* @llvm.stacksave() 3127 // CHECK3-NEXT: store i8* [[TMP8]], i8** [[SAVED_STACK]], align 8 3128 // CHECK3-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16 3129 // CHECK3-NEXT: store i64 [[TMP6]], i64* [[__VLA_EXPR0]], align 8 3130 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP6]] 3131 // CHECK3-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP9]] 3132 // CHECK3-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 3133 // CHECK3: omp.arrayinit.body: 3134 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 3135 // CHECK3-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3136 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3137 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 3138 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 3139 // CHECK3: omp.arrayinit.done: 3140 // CHECK3-NEXT: [[TMP10:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3141 // CHECK3-NEXT: [[TMP11:%.*]] = ptrtoint i16* [[TMP10]] to i64 3142 // CHECK3-NEXT: [[TMP12:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3143 // CHECK3-NEXT: [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]] 3144 // CHECK3-NEXT: [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3145 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP14]] 3146 // CHECK3-NEXT: store i16* [[TMP15]], i16** [[TMP]], align 8 3147 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3148 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i16* [[VLA]] to i8* 3149 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 3150 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3151 // CHECK3-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP6]] to i8* 3152 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 3153 // CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3154 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 3155 // CHECK3-NEXT: [[TMP22:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3156 // CHECK3-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP21]], i32 1, i64 16, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 3157 // CHECK3-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3158 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3159 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3160 // CHECK3-NEXT: ] 3161 // CHECK3: .omp.reduction.case1: 3162 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 3163 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP24]] 3164 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3165 // CHECK3: omp.arraycpy.body: 3166 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3167 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3168 // CHECK3-NEXT: [[TMP25:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3169 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP25]] to i32 3170 // CHECK3-NEXT: [[TMP26:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 3171 // CHECK3-NEXT: [[CONV3:%.*]] = sext i16 [[TMP26]] to i32 3172 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 3173 // CHECK3-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 3174 // CHECK3-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3175 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 3176 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3177 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP24]] 3178 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 3179 // CHECK3: omp.arraycpy.done7: 3180 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3181 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3182 // CHECK3: .omp.reduction.case2: 3183 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 3184 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP27]] 3185 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 3186 // CHECK3: omp.arraycpy.body9: 3187 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 3188 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 3189 // CHECK3-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3190 // CHECK3-NEXT: [[CONV12:%.*]] = sext i16 [[TMP28]] to i32 3191 // CHECK3-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 3192 // CHECK3-NEXT: br label [[ATOMIC_CONT:%.*]] 3193 // CHECK3: atomic_cont: 3194 // CHECK3-NEXT: [[TMP29:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP34:%.*]], [[ATOMIC_CONT]] ] 3195 // CHECK3-NEXT: store i16 [[TMP29]], i16* [[_TMP13]], align 2 3196 // CHECK3-NEXT: [[TMP30:%.*]] = load i16, i16* [[_TMP13]], align 2 3197 // CHECK3-NEXT: [[CONV14:%.*]] = sext i16 [[TMP30]] to i32 3198 // CHECK3-NEXT: [[TMP31:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3199 // CHECK3-NEXT: [[CONV15:%.*]] = sext i16 [[TMP31]] to i32 3200 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 3201 // CHECK3-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 3202 // CHECK3-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 3203 // CHECK3-NEXT: [[TMP32:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 3204 // CHECK3-NEXT: [[TMP33:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP29]], i16 [[TMP32]] monotonic monotonic, align 2 3205 // CHECK3-NEXT: [[TMP34]] = extractvalue { i16, i1 } [[TMP33]], 0 3206 // CHECK3-NEXT: [[TMP35:%.*]] = extractvalue { i16, i1 } [[TMP33]], 1 3207 // CHECK3-NEXT: br i1 [[TMP35]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 3208 // CHECK3: atomic_exit: 3209 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 3210 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 3211 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP27]] 3212 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 3213 // CHECK3: omp.arraycpy.done21: 3214 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3215 // CHECK3: .omp.reduction.default: 3216 // CHECK3-NEXT: [[TMP36:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3217 // CHECK3-NEXT: call void @llvm.stackrestore(i8* [[TMP36]]) 3218 // CHECK3-NEXT: ret void 3219 // 3220 // 3221 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 3222 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 3223 // CHECK3-NEXT: entry: 3224 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3225 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3226 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3227 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3228 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3229 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 3230 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3231 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 3232 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 3233 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3234 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 3235 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 3236 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3237 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 3238 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 3239 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3240 // CHECK3-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 3241 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 3242 // CHECK3-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 3243 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3244 // CHECK3: omp.arraycpy.body: 3245 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3246 // CHECK3-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3247 // CHECK3-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3248 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 3249 // CHECK3-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 3250 // CHECK3-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 3251 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 3252 // CHECK3-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 3253 // CHECK3-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3254 // CHECK3-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3255 // CHECK3-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3256 // CHECK3-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 3257 // CHECK3-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 3258 // CHECK3: omp.arraycpy.done4: 3259 // CHECK3-NEXT: ret void 3260 // 3261 // 3262 // CHECK3-LABEL: define {{[^@]+}}@main 3263 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] { 3264 // CHECK3-NEXT: entry: 3265 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3266 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 3267 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 3268 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 3269 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @sivar) 3270 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 3271 // CHECK3-NEXT: ret i32 0 3272 // 3273 // 3274 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3275 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 { 3276 // CHECK3-NEXT: entry: 3277 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3278 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3279 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3280 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3281 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3282 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3283 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 3284 // CHECK3-NEXT: ret void 3285 // 3286 // 3287 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 3288 // CHECK3-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 { 3289 // CHECK3-NEXT: entry: 3290 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3291 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3292 // CHECK3-NEXT: [[A2:%.*]] = alloca i32*, align 8 3293 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4 3294 // CHECK3-NEXT: [[C5:%.*]] = alloca i32*, align 8 3295 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3296 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3297 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3298 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3299 // CHECK3-NEXT: store i32 0, i32* [[A]], align 8 3300 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3301 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 3302 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 3303 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 3304 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4 3305 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3306 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3307 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 3308 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3309 // CHECK3-NEXT: store i32* [[A3]], i32** [[A2]], align 8 3310 // CHECK3-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 3311 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 3312 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 3313 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 3314 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8 3315 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]]) 3316 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[B4]], align 4 3317 // CHECK3-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 3318 // CHECK3-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8 3319 // CHECK3-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 3320 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15 3321 // CHECK3-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 3322 // CHECK3-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 3323 // CHECK3-NEXT: store i8 [[BF_SET10]], i8* [[B7]], align 4 3324 // CHECK3-NEXT: ret void 3325 // 3326 // 3327 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 3328 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 3329 // CHECK3-NEXT: entry: 3330 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3331 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3332 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3333 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3334 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 3335 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 3336 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3337 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3338 // CHECK3-NEXT: [[A2:%.*]] = alloca i32, align 4 3339 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 3340 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4 3341 // CHECK3-NEXT: [[C5:%.*]] = alloca i32, align 4 3342 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 3343 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 3344 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 3345 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3346 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3347 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3348 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3349 // CHECK3-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 3350 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 3351 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3352 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3353 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 3354 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 3355 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 3356 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 3357 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 3358 // CHECK3-NEXT: store i32 0, i32* [[A2]], align 4 3359 // CHECK3-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8 3360 // CHECK3-NEXT: store i32 0, i32* [[B4]], align 4 3361 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 3362 // CHECK3-NEXT: store i32 0, i32* [[C5]], align 4 3363 // CHECK3-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8 3364 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 3365 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP6]], align 8 3366 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 3367 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP3]], align 8 3368 // CHECK3-NEXT: store i32* [[TMP8]], i32** [[TMP7]], align 8 3369 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 3370 // CHECK3-NEXT: store i32* [[B4]], i32** [[TMP9]], align 8 3371 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 3372 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[_TMP6]], align 8 3373 // CHECK3-NEXT: store i32* [[TMP11]], i32** [[TMP10]], align 8 3374 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]) 3375 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3376 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[A2]] to i8* 3377 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 3378 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3379 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[B4]] to i8* 3380 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 3381 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 3382 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[C5]] to i8* 3383 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 3384 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3385 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 3386 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3387 // CHECK3-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]], i32 3, i64 24, i8* [[TMP20]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 3388 // CHECK3-NEXT: switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3389 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3390 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3391 // CHECK3-NEXT: ] 3392 // CHECK3: .omp.reduction.case1: 3393 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP4]], align 4 3394 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[A2]], align 4 3395 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 3396 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4 3397 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP2]], align 4 3398 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[B4]], align 4 3399 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 3400 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[TMP2]], align 4 3401 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP5]], align 4 3402 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[C5]], align 4 3403 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 3404 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[TMP5]], align 4 3405 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP19]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3406 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3407 // CHECK3: .omp.reduction.case2: 3408 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[A2]], align 4 3409 // CHECK3-NEXT: [[TMP29:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP28]] monotonic, align 4 3410 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[B4]], align 4 3411 // CHECK3-NEXT: [[TMP31:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP30]] monotonic, align 4 3412 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[C5]], align 4 3413 // CHECK3-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP32]] monotonic, align 4 3414 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3415 // CHECK3: .omp.reduction.default: 3416 // CHECK3-NEXT: ret void 3417 // 3418 // 3419 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv 3420 // CHECK3-SAME: (%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR0]] align 2 { 3421 // CHECK3-NEXT: entry: 3422 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8 3423 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8 3424 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8 3425 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0 3426 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8 3427 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 3428 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8 3429 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3430 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 3431 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4 3432 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 3433 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8 3434 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3435 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1 3436 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4 3437 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 3438 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8 3439 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3440 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 3441 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 3442 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1 3443 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[TMP11]], align 8 3444 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2 3445 // CHECK3-NEXT: [[TMP14:%.*]] = load i32*, i32** [[TMP13]], align 8 3446 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3 3447 // CHECK3-NEXT: [[TMP16:%.*]] = load i32*, i32** [[TMP15]], align 8 3448 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SS* [[TMP1]], i32* [[TMP12]], i32* [[TMP14]], i32* [[TMP16]]) 3449 // CHECK3-NEXT: ret void 3450 // 3451 // 3452 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 3453 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 3454 // CHECK3-NEXT: entry: 3455 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3456 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3457 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3458 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3459 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3460 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 3461 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3462 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 3463 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 3464 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3465 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3466 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 3467 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3468 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3469 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 3470 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3471 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 3472 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 3473 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 3474 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 3475 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 3476 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 3477 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 3478 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 3479 // CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 3480 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 3481 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 3482 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 3483 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 3484 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 3485 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 3486 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 3487 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 3488 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 3489 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 3490 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 3491 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 3492 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 3493 // CHECK3-NEXT: ret void 3494 // 3495 // 3496 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 3497 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] { 3498 // CHECK3-NEXT: entry: 3499 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3500 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3501 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3502 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 3503 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 3504 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 3505 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 8 3506 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3507 // CHECK3-NEXT: [[A2:%.*]] = alloca i32, align 4 3508 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 3509 // CHECK3-NEXT: [[B4:%.*]] = alloca i32, align 4 3510 // CHECK3-NEXT: [[C5:%.*]] = alloca i32, align 4 3511 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 3512 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 3513 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3514 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3515 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3516 // CHECK3-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 3517 // CHECK3-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 3518 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 3519 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3520 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 3521 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 3522 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 3523 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 3524 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 3525 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 3526 // CHECK3-NEXT: store i32 -1, i32* [[A2]], align 4 3527 // CHECK3-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8 3528 // CHECK3-NEXT: store i32 -1, i32* [[B4]], align 4 3529 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 3530 // CHECK3-NEXT: store i32 -1, i32* [[C5]], align 4 3531 // CHECK3-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8 3532 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8 3533 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 3534 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 3535 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4 3536 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 3537 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP8]], -1 3538 // CHECK3-NEXT: store i32 [[DEC]], i32* [[B4]], align 4 3539 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP6]], align 8 3540 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3541 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 3542 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 3543 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3544 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i32* [[A2]] to i8* 3545 // CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 3546 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3547 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i32* [[B4]] to i8* 3548 // CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 3549 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 3550 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast i32* [[C5]] to i8* 3551 // CHECK3-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 3552 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3553 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 3554 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3555 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 3, i64 24, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.4, [8 x i32]* @.gomp_critical_user_.reduction.var) 3556 // CHECK3-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3557 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3558 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3559 // CHECK3-NEXT: ] 3560 // CHECK3: .omp.reduction.case1: 3561 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4 3562 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[A2]], align 4 3563 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP21]], [[TMP22]] 3564 // CHECK3-NEXT: store i32 [[AND]], i32* [[TMP4]], align 4 3565 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP2]], align 4 3566 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[B4]], align 4 3567 // CHECK3-NEXT: [[AND7:%.*]] = and i32 [[TMP23]], [[TMP24]] 3568 // CHECK3-NEXT: store i32 [[AND7]], i32* [[TMP2]], align 4 3569 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP5]], align 4 3570 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[C5]], align 4 3571 // CHECK3-NEXT: [[AND8:%.*]] = and i32 [[TMP25]], [[TMP26]] 3572 // CHECK3-NEXT: store i32 [[AND8]], i32* [[TMP5]], align 4 3573 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3574 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3575 // CHECK3: .omp.reduction.case2: 3576 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[A2]], align 4 3577 // CHECK3-NEXT: [[TMP28:%.*]] = atomicrmw and i32* [[TMP4]], i32 [[TMP27]] monotonic, align 4 3578 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[B4]], align 4 3579 // CHECK3-NEXT: [[TMP30:%.*]] = atomicrmw and i32* [[TMP2]], i32 [[TMP29]] monotonic, align 4 3580 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[C5]], align 4 3581 // CHECK3-NEXT: [[TMP32:%.*]] = atomicrmw and i32* [[TMP5]], i32 [[TMP31]] monotonic, align 4 3582 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3583 // CHECK3: .omp.reduction.default: 3584 // CHECK3-NEXT: ret void 3585 // 3586 // 3587 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.4 3588 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 3589 // CHECK3-NEXT: entry: 3590 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3591 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3592 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3593 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3594 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3595 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 3596 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3597 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 3598 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 3599 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3600 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3601 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 3602 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3603 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3604 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 3605 // CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3606 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 3607 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 3608 // CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 3609 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 3610 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 3611 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 3612 // CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 3613 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 3614 // CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 3615 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 3616 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 3617 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 3618 // CHECK3-NEXT: [[AND:%.*]] = and i32 [[TMP24]], [[TMP25]] 3619 // CHECK3-NEXT: store i32 [[AND]], i32* [[TMP11]], align 4 3620 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 3621 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 3622 // CHECK3-NEXT: [[AND2:%.*]] = and i32 [[TMP26]], [[TMP27]] 3623 // CHECK3-NEXT: store i32 [[AND2]], i32* [[TMP17]], align 4 3624 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 3625 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 3626 // CHECK3-NEXT: [[AND3:%.*]] = and i32 [[TMP28]], [[TMP29]] 3627 // CHECK3-NEXT: store i32 [[AND3]], i32* [[TMP23]], align 4 3628 // CHECK3-NEXT: ret void 3629 // 3630 // 3631 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5 3632 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR1]] { 3633 // CHECK3-NEXT: entry: 3634 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3635 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3636 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 3637 // CHECK3-NEXT: [[G1:%.*]] = alloca i32, align 128 3638 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8 3639 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 3640 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3641 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3642 // CHECK3-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 3643 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 8 3644 // CHECK3-NEXT: store i32 0, i32* [[G1]], align 128 3645 // CHECK3-NEXT: store i32 1, i32* [[G1]], align 128 3646 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0 3647 // CHECK3-NEXT: store i32* [[G1]], i32** [[TMP1]], align 8 3648 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 3649 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3650 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i32* [[G1]] to i8* 3651 // CHECK3-NEXT: store i8* [[TMP3]], i8** [[TMP2]], align 8 3652 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3653 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 3654 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3655 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1, i64 8, i8* [[TMP6]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 3656 // CHECK3-NEXT: switch i32 [[TMP7]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3657 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3658 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3659 // CHECK3-NEXT: ] 3660 // CHECK3: .omp.reduction.case1: 3661 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP0]], align 128 3662 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[G1]], align 128 3663 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] 3664 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 128 3665 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3666 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3667 // CHECK3: .omp.reduction.case2: 3668 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[G1]], align 128 3669 // CHECK3-NEXT: [[TMP11:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP10]] monotonic, align 4 3670 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3671 // CHECK3: .omp.reduction.default: 3672 // CHECK3-NEXT: ret void 3673 // 3674 // 3675 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 3676 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] { 3677 // CHECK3-NEXT: entry: 3678 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3679 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3680 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3681 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3682 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3683 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3684 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3685 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3686 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3687 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3688 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3689 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 3690 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3691 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3692 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 128 3693 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 128 3694 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3695 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 3696 // CHECK3-NEXT: ret void 3697 // 3698 // 3699 // CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs 3700 // CHECK4-SAME: (i16* noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] { 3701 // CHECK4-NEXT: entry: 3702 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 3703 // CHECK4-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 3704 // CHECK4-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3705 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i16*)* @.omp_outlined. to void (i32*, i32*, ...)*), i16* [[TMP0]]) 3706 // CHECK4-NEXT: ret void 3707 // 3708 // 3709 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 3710 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i16* noundef [[X:%.*]]) #[[ATTR2:[0-9]+]] { 3711 // CHECK4-NEXT: entry: 3712 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3713 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3714 // CHECK4-NEXT: [[X_ADDR:%.*]] = alloca i16*, align 8 3715 // CHECK4-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3716 // CHECK4-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3717 // CHECK4-NEXT: [[TMP:%.*]] = alloca i16*, align 8 3718 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x i8*], align 8 3719 // CHECK4-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i16, align 2 3720 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i16, align 2 3721 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3722 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3723 // CHECK4-NEXT: store i16* [[X]], i16** [[X_ADDR]], align 8 3724 // CHECK4-NEXT: [[TMP0:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3725 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, i16* [[TMP0]], i64 0 3726 // CHECK4-NEXT: [[TMP1:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3727 // CHECK4-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, i16* [[TMP1]], i64 0 3728 // CHECK4-NEXT: [[TMP2:%.*]] = ptrtoint i16* [[ARRAYIDX1]] to i64 3729 // CHECK4-NEXT: [[TMP3:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3730 // CHECK4-NEXT: [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]] 3731 // CHECK4-NEXT: [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3732 // CHECK4-NEXT: [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1 3733 // CHECK4-NEXT: [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3734 // CHECK4-NEXT: [[TMP8:%.*]] = call i8* @llvm.stacksave() 3735 // CHECK4-NEXT: store i8* [[TMP8]], i8** [[SAVED_STACK]], align 8 3736 // CHECK4-NEXT: [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16 3737 // CHECK4-NEXT: store i64 [[TMP6]], i64* [[__VLA_EXPR0]], align 8 3738 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP6]] 3739 // CHECK4-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i16* [[VLA]], [[TMP9]] 3740 // CHECK4-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] 3741 // CHECK4: omp.arrayinit.body: 3742 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] 3743 // CHECK4-NEXT: store i16 0, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3744 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3745 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]] 3746 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] 3747 // CHECK4: omp.arrayinit.done: 3748 // CHECK4-NEXT: [[TMP10:%.*]] = load i16*, i16** [[X_ADDR]], align 8 3749 // CHECK4-NEXT: [[TMP11:%.*]] = ptrtoint i16* [[TMP10]] to i64 3750 // CHECK4-NEXT: [[TMP12:%.*]] = ptrtoint i16* [[ARRAYIDX]] to i64 3751 // CHECK4-NEXT: [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]] 3752 // CHECK4-NEXT: [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (i16* getelementptr (i16, i16* null, i32 1) to i64) 3753 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[VLA]], i64 [[TMP14]] 3754 // CHECK4-NEXT: store i16* [[TMP15]], i16** [[TMP]], align 8 3755 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3756 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i16* [[VLA]] to i8* 3757 // CHECK4-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 3758 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 3759 // CHECK4-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP6]] to i8* 3760 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 3761 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3762 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 3763 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3764 // CHECK4-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP21]], i32 1, i64 16, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 3765 // CHECK4-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3766 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3767 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3768 // CHECK4-NEXT: ] 3769 // CHECK4: .omp.reduction.case1: 3770 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 3771 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP24]] 3772 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3773 // CHECK4: omp.arraycpy.body: 3774 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3775 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3776 // CHECK4-NEXT: [[TMP25:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3777 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP25]] to i32 3778 // CHECK4-NEXT: [[TMP26:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 3779 // CHECK4-NEXT: [[CONV3:%.*]] = sext i16 [[TMP26]] to i32 3780 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]] 3781 // CHECK4-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD]] to i16 3782 // CHECK4-NEXT: store i16 [[CONV4]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2 3783 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1 3784 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3785 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP24]] 3786 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]] 3787 // CHECK4: omp.arraycpy.done7: 3788 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3789 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3790 // CHECK4: .omp.reduction.case2: 3791 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr i16, i16* [[ARRAYIDX]], i64 [[TMP6]] 3792 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq i16* [[ARRAYIDX]], [[TMP27]] 3793 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]] 3794 // CHECK4: omp.arraycpy.body9: 3795 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi i16* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ] 3796 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi i16* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ] 3797 // CHECK4-NEXT: [[TMP28:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3798 // CHECK4-NEXT: [[CONV12:%.*]] = sext i16 [[TMP28]] to i32 3799 // CHECK4-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2 3800 // CHECK4-NEXT: br label [[ATOMIC_CONT:%.*]] 3801 // CHECK4: atomic_cont: 3802 // CHECK4-NEXT: [[TMP29:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP34:%.*]], [[ATOMIC_CONT]] ] 3803 // CHECK4-NEXT: store i16 [[TMP29]], i16* [[_TMP13]], align 2 3804 // CHECK4-NEXT: [[TMP30:%.*]] = load i16, i16* [[_TMP13]], align 2 3805 // CHECK4-NEXT: [[CONV14:%.*]] = sext i16 [[TMP30]] to i32 3806 // CHECK4-NEXT: [[TMP31:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2 3807 // CHECK4-NEXT: [[CONV15:%.*]] = sext i16 [[TMP31]] to i32 3808 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]] 3809 // CHECK4-NEXT: [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16 3810 // CHECK4-NEXT: store i16 [[CONV17]], i16* [[ATOMIC_TEMP]], align 2 3811 // CHECK4-NEXT: [[TMP32:%.*]] = load i16, i16* [[ATOMIC_TEMP]], align 2 3812 // CHECK4-NEXT: [[TMP33:%.*]] = cmpxchg i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP29]], i16 [[TMP32]] monotonic monotonic, align 2 3813 // CHECK4-NEXT: [[TMP34]] = extractvalue { i16, i1 } [[TMP33]], 0 3814 // CHECK4-NEXT: [[TMP35:%.*]] = extractvalue { i16, i1 } [[TMP33]], 1 3815 // CHECK4-NEXT: br i1 [[TMP35]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]] 3816 // CHECK4: atomic_exit: 3817 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 3818 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 3819 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP27]] 3820 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]] 3821 // CHECK4: omp.arraycpy.done21: 3822 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3823 // CHECK4: .omp.reduction.default: 3824 // CHECK4-NEXT: [[TMP36:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 3825 // CHECK4-NEXT: call void @llvm.stackrestore(i8* [[TMP36]]) 3826 // CHECK4-NEXT: ret void 3827 // 3828 // 3829 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 3830 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 3831 // CHECK4-NEXT: entry: 3832 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3833 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3834 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3835 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3836 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3837 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [2 x i8*]* 3838 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3839 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [2 x i8*]* 3840 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0 3841 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3842 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i16* 3843 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 0 3844 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3845 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i16* 3846 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP3]], i64 0, i64 1 3847 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 3848 // CHECK4-NEXT: [[TMP14:%.*]] = ptrtoint i8* [[TMP13]] to i64 3849 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr i16, i16* [[TMP11]], i64 [[TMP14]] 3850 // CHECK4-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i16* [[TMP11]], [[TMP15]] 3851 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] 3852 // CHECK4: omp.arraycpy.body: 3853 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i16* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3854 // CHECK4-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i16* [ [[TMP11]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] 3855 // CHECK4-NEXT: [[TMP16:%.*]] = load i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3856 // CHECK4-NEXT: [[CONV:%.*]] = sext i16 [[TMP16]] to i32 3857 // CHECK4-NEXT: [[TMP17:%.*]] = load i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2 3858 // CHECK4-NEXT: [[CONV2:%.*]] = sext i16 [[TMP17]] to i32 3859 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]] 3860 // CHECK4-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i16 3861 // CHECK4-NEXT: store i16 [[CONV3]], i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2 3862 // CHECK4-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 3863 // CHECK4-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, i16* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 3864 // CHECK4-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i16* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]] 3865 // CHECK4-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]] 3866 // CHECK4: omp.arraycpy.done4: 3867 // CHECK4-NEXT: ret void 3868 // 3869 // 3870 // CHECK4-LABEL: define {{[^@]+}}@main 3871 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] { 3872 // CHECK4-NEXT: entry: 3873 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3874 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 3875 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 3876 // CHECK4-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @sivar) 3877 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 3878 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 3879 // CHECK4-NEXT: call void [[TMP1]](i8* noundef bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 3880 // CHECK4-NEXT: ret i32 0 3881 // 3882 // 3883 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi 3884 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 3885 // CHECK4-NEXT: entry: 3886 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3887 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 3888 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3889 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 3890 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3891 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 3892 // CHECK4-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]]) 3893 // CHECK4-NEXT: ret void 3894 // 3895 // 3896 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 3897 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] { 3898 // CHECK4-NEXT: entry: 3899 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 3900 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 3901 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 3902 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 3903 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 3904 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* @g) 3905 // CHECK4-NEXT: ret void 3906 // 3907 // 3908 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 3909 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] { 3910 // CHECK4-NEXT: entry: 3911 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3912 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3913 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca i32*, align 8 3914 // CHECK4-NEXT: [[G1:%.*]] = alloca i32, align 128 3915 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, align 128 3916 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 3917 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3918 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3919 // CHECK4-NEXT: store i32* [[G]], i32** [[G_ADDR]], align 8 3920 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[G_ADDR]], align 8 3921 // CHECK4-NEXT: store i32 0, i32* [[G1]], align 128 3922 // CHECK4-NEXT: store i32 1, i32* [[G1]], align 128 3923 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 0 3924 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 128 3925 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 1 3926 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 3927 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 2 3928 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 3929 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 3 3930 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 16 3931 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 4 3932 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.2 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 3933 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 6 3934 // CHECK4-NEXT: [[TMP1:%.*]] = load volatile i32, i32* [[G1]], align 128 3935 // CHECK4-NEXT: store volatile i32 [[TMP1]], i32* [[BLOCK_CAPTURED]], align 128 3936 // CHECK4-NEXT: [[TMP2:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]] to void ()* 3937 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP2]] to %struct.__block_literal_generic* 3938 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 3939 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 3940 // CHECK4-NEXT: [[TMP5:%.*]] = load i8*, i8** [[TMP3]], align 8 3941 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to void (i8*)* 3942 // CHECK4-NEXT: call void [[TMP6]](i8* noundef [[TMP4]]) 3943 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3944 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i32* [[G1]] to i8* 3945 // CHECK4-NEXT: store i8* [[TMP8]], i8** [[TMP7]], align 8 3946 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3947 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 3948 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3949 // CHECK4-NEXT: [[TMP12:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], i32 1, i64 8, i8* [[TMP11]], void (i8*, i8*)* @.omp.reduction.reduction_func.3, [8 x i32]* @.gomp_critical_user_.reduction.var) 3950 // CHECK4-NEXT: switch i32 [[TMP12]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3951 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3952 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3953 // CHECK4-NEXT: ] 3954 // CHECK4: .omp.reduction.case1: 3955 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP0]], align 128 3956 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[G1]], align 128 3957 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] 3958 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 128 3959 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP10]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3960 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3961 // CHECK4: .omp.reduction.case2: 3962 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[G1]], align 128 3963 // CHECK4-NEXT: [[TMP16:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP15]] monotonic, align 4 3964 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3965 // CHECK4: .omp.reduction.default: 3966 // CHECK4-NEXT: ret void 3967 // 3968 // 3969 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke 3970 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] { 3971 // CHECK4-NEXT: entry: 3972 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 3973 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>*, align 8 3974 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 3975 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* 3976 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>** [[BLOCK_ADDR]], align 8 3977 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, [96 x i8], i32 }>* [[BLOCK]], i32 0, i32 6 3978 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 128 3979 // CHECK4-NEXT: ret void 3980 // 3981 // 3982 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.3 3983 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] { 3984 // CHECK4-NEXT: entry: 3985 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3986 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3987 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3988 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3989 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3990 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3991 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3992 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3993 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3994 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3995 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3996 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 3997 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3998 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3999 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 128 4000 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 128 4001 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4002 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 128 4003 // CHECK4-NEXT: ret void 4004 // 4005 // 4006 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi 4007 // CHECK4-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 4008 // CHECK4-NEXT: entry: 4009 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4010 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8 4011 // CHECK4-NEXT: [[A2:%.*]] = alloca i32*, align 8 4012 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4 4013 // CHECK4-NEXT: [[C5:%.*]] = alloca i32*, align 8 4014 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4015 // CHECK4-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8 4016 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4017 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4018 // CHECK4-NEXT: store i32 0, i32* [[A]], align 8 4019 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4020 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4 4021 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16 4022 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0 4023 // CHECK4-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4 4024 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4025 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8 4026 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[C]], align 8 4027 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4028 // CHECK4-NEXT: store i32* [[A3]], i32** [[A2]], align 8 4029 // CHECK4-NEXT: [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2 4030 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C6]], align 8 4031 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[C5]], align 8 4032 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A2]], align 8 4033 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C5]], align 8 4034 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), %struct.SS* [[THIS1]], i32* [[TMP2]], i32* [[B4]], i32* [[TMP3]]) 4035 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[B4]], align 4 4036 // CHECK4-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1 4037 // CHECK4-NEXT: [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8 4038 // CHECK4-NEXT: [[BF_LOAD8:%.*]] = load i8, i8* [[B7]], align 4 4039 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15 4040 // CHECK4-NEXT: [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16 4041 // CHECK4-NEXT: [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]] 4042 // CHECK4-NEXT: store i8 [[BF_SET10]], i8* [[B7]], align 4 4043 // CHECK4-NEXT: ret void 4044 // 4045 // 4046 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4 4047 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4048 // CHECK4-NEXT: entry: 4049 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4050 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4051 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4052 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4053 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 4054 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 4055 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 4056 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 4057 // CHECK4-NEXT: [[A2:%.*]] = alloca i32, align 4 4058 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 4059 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4 4060 // CHECK4-NEXT: [[C5:%.*]] = alloca i32, align 4 4061 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 4062 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, align 8 4063 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 4064 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4065 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4066 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4067 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4068 // CHECK4-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 4069 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 4070 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4071 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4072 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 4073 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 4074 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 4075 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 4076 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 4077 // CHECK4-NEXT: store i32 0, i32* [[A2]], align 4 4078 // CHECK4-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8 4079 // CHECK4-NEXT: store i32 0, i32* [[B4]], align 4 4080 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 4081 // CHECK4-NEXT: store i32 0, i32* [[C5]], align 4 4082 // CHECK4-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8 4083 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 0 4084 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 4085 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 1 4086 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 4087 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 2 4088 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 4089 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 3 4090 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 4091 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 4 4092 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.7 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 4093 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 4094 // CHECK4-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[BLOCK_CAPTURED_THIS_ADDR]], align 8 4095 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4096 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8 4097 // CHECK4-NEXT: store i32* [[TMP6]], i32** [[BLOCK_CAPTURED]], align 8 4098 // CHECK4-NEXT: [[BLOCK_CAPTURED7:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4099 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[B4]], align 4 4100 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[BLOCK_CAPTURED7]], align 8 4101 // CHECK4-NEXT: [[BLOCK_CAPTURED8:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4102 // CHECK4-NEXT: [[TMP8:%.*]] = load i32*, i32** [[_TMP6]], align 8 4103 // CHECK4-NEXT: store i32* [[TMP8]], i32** [[BLOCK_CAPTURED8]], align 8 4104 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]] to void ()* 4105 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP9]] to %struct.__block_literal_generic* 4106 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 4107 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 4108 // CHECK4-NEXT: [[TMP12:%.*]] = load i8*, i8** [[TMP10]], align 8 4109 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP12]] to void (i8*)* 4110 // CHECK4-NEXT: call void [[TMP13]](i8* noundef [[TMP11]]) 4111 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 4112 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i32* [[A2]] to i8* 4113 // CHECK4-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 4114 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 4115 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i32* [[B4]] to i8* 4116 // CHECK4-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 4117 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 4118 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i32* [[C5]] to i8* 4119 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 8 4120 // CHECK4-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4121 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 4122 // CHECK4-NEXT: [[TMP22:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 4123 // CHECK4-NEXT: [[TMP23:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], i32 3, i64 24, i8* [[TMP22]], void (i8*, i8*)* @.omp.reduction.reduction_func.8, [8 x i32]* @.gomp_critical_user_.reduction.var) 4124 // CHECK4-NEXT: switch i32 [[TMP23]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4125 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4126 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4127 // CHECK4-NEXT: ] 4128 // CHECK4: .omp.reduction.case1: 4129 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP4]], align 4 4130 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[A2]], align 4 4131 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 4132 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4 4133 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP2]], align 4 4134 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[B4]], align 4 4135 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 4136 // CHECK4-NEXT: store i32 [[ADD9]], i32* [[TMP2]], align 4 4137 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP5]], align 4 4138 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[C5]], align 4 4139 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 4140 // CHECK4-NEXT: store i32 [[ADD10]], i32* [[TMP5]], align 4 4141 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]], [8 x i32]* @.gomp_critical_user_.reduction.var) 4142 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4143 // CHECK4: .omp.reduction.case2: 4144 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, i32* [[A2]], align 4 4145 // CHECK4-NEXT: [[TMP31:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP30]] monotonic, align 4 4146 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[B4]], align 4 4147 // CHECK4-NEXT: [[TMP33:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP32]] monotonic, align 4 4148 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[C5]], align 4 4149 // CHECK4-NEXT: [[TMP35:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP34]] monotonic, align 4 4150 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4151 // CHECK4: .omp.reduction.default: 4152 // CHECK4-NEXT: ret void 4153 // 4154 // 4155 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2 4156 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] { 4157 // CHECK4-NEXT: entry: 4158 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 4159 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>*, align 8 4160 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 4161 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* 4162 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>** [[BLOCK_ADDR]], align 8 4163 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 5 4164 // CHECK4-NEXT: [[THIS:%.*]] = load %struct.SS*, %struct.SS** [[BLOCK_CAPTURED_THIS]], align 8 4165 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4166 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR]], align 8 4167 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4168 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1 4169 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4 4170 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4171 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[BLOCK_CAPTURE_ADDR1]], align 8 4172 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1 4173 // CHECK4-NEXT: store i32 [[DEC]], i32* [[BLOCK_CAPTURE_ADDR1]], align 8 4174 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4175 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR2]], align 8 4176 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4177 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1 4178 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP3]], align 4 4179 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 6 4180 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR3]], align 8 4181 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 8 4182 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %struct.SS*, i32*, i32*, i32 }>* [[BLOCK]], i32 0, i32 7 4183 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[BLOCK_CAPTURE_ADDR5]], align 8 4184 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*, i32*, i32*, i32*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.SS* [[THIS]], i32* [[TMP5]], i32* [[BLOCK_CAPTURE_ADDR4]], i32* [[TMP6]]) 4185 // CHECK4-NEXT: ret void 4186 // 4187 // 4188 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5 4189 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[B:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] { 4190 // CHECK4-NEXT: entry: 4191 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4192 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4193 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4194 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4195 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca i32*, align 8 4196 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 4197 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32*, align 8 4198 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 4199 // CHECK4-NEXT: [[A2:%.*]] = alloca i32, align 4 4200 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca i32*, align 8 4201 // CHECK4-NEXT: [[B4:%.*]] = alloca i32, align 4 4202 // CHECK4-NEXT: [[C5:%.*]] = alloca i32, align 4 4203 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 4204 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8 4205 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4206 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4207 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4208 // CHECK4-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4209 // CHECK4-NEXT: store i32* [[B]], i32** [[B_ADDR]], align 8 4210 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 4211 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4212 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4213 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[B_ADDR]], align 8 4214 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[C_ADDR]], align 8 4215 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8 4216 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[_TMP1]], align 8 4217 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP]], align 8 4218 // CHECK4-NEXT: store i32 0, i32* [[A2]], align 4 4219 // CHECK4-NEXT: store i32* [[A2]], i32** [[_TMP3]], align 8 4220 // CHECK4-NEXT: store i32 0, i32* [[B4]], align 4 4221 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[_TMP1]], align 8 4222 // CHECK4-NEXT: store i32 0, i32* [[C5]], align 4 4223 // CHECK4-NEXT: store i32* [[C5]], i32** [[_TMP6]], align 8 4224 // CHECK4-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP3]], align 8 4225 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 4226 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 4227 // CHECK4-NEXT: store i32 [[INC]], i32* [[TMP6]], align 4 4228 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[B4]], align 4 4229 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP8]], -1 4230 // CHECK4-NEXT: store i32 [[DEC]], i32* [[B4]], align 4 4231 // CHECK4-NEXT: [[TMP9:%.*]] = load i32*, i32** [[_TMP6]], align 8 4232 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 4233 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1 4234 // CHECK4-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4 4235 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 4236 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i32* [[A2]] to i8* 4237 // CHECK4-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 4238 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1 4239 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i32* [[B4]] to i8* 4240 // CHECK4-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 4241 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2 4242 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast i32* [[C5]] to i8* 4243 // CHECK4-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 4244 // CHECK4-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4245 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4 4246 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 4247 // CHECK4-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], i32 3, i64 24, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 4248 // CHECK4-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 4249 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 4250 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 4251 // CHECK4-NEXT: ] 4252 // CHECK4: .omp.reduction.case1: 4253 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4 4254 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[A2]], align 4 4255 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 4256 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP4]], align 4 4257 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP2]], align 4 4258 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[B4]], align 4 4259 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4260 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[TMP2]], align 4 4261 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP5]], align 4 4262 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[C5]], align 4 4263 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 4264 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[TMP5]], align 4 4265 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB1]], i32 [[TMP18]], [8 x i32]* @.gomp_critical_user_.reduction.var) 4266 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4267 // CHECK4: .omp.reduction.case2: 4268 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[A2]], align 4 4269 // CHECK4-NEXT: [[TMP28:%.*]] = atomicrmw add i32* [[TMP4]], i32 [[TMP27]] monotonic, align 4 4270 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[B4]], align 4 4271 // CHECK4-NEXT: [[TMP30:%.*]] = atomicrmw add i32* [[TMP2]], i32 [[TMP29]] monotonic, align 4 4272 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[C5]], align 4 4273 // CHECK4-NEXT: [[TMP32:%.*]] = atomicrmw add i32* [[TMP5]], i32 [[TMP31]] monotonic, align 4 4274 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 4275 // CHECK4: .omp.reduction.default: 4276 // CHECK4-NEXT: ret void 4277 // 4278 // 4279 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 4280 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] { 4281 // CHECK4-NEXT: entry: 4282 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4283 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 4284 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4285 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 4286 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 4287 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 4288 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 4289 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 4290 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 4291 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 4292 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 4293 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 4294 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 4295 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 4296 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 4297 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 4298 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 4299 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 4300 // CHECK4-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 4301 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 4302 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 4303 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 4304 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 4305 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 4306 // CHECK4-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 4307 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 4308 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 4309 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 4310 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 4311 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 4312 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 4313 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 4314 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 4315 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 4316 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 4317 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 4318 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 4319 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 4320 // CHECK4-NEXT: ret void 4321 // 4322 // 4323 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.8 4324 // CHECK4-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] { 4325 // CHECK4-NEXT: entry: 4326 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 4327 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 4328 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 4329 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 4330 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 4331 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]* 4332 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 4333 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]* 4334 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0 4335 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 4336 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 4337 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0 4338 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 4339 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 4340 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1 4341 // CHECK4-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8 4342 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32* 4343 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1 4344 // CHECK4-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8 4345 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32* 4346 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 2 4347 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 4348 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32* 4349 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2 4350 // CHECK4-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 4351 // CHECK4-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to i32* 4352 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP11]], align 4 4353 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP8]], align 4 4354 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] 4355 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 4356 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP17]], align 4 4357 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP14]], align 4 4358 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] 4359 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[TMP17]], align 4 4360 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP23]], align 4 4361 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP20]], align 4 4362 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP28]], [[TMP29]] 4363 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP23]], align 4 4364 // CHECK4-NEXT: ret void 4365 // 4366