1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test target codegen - host bc file has to be created first.
3 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
4 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -fopenmp-optimistic-collapse -o - | FileCheck %s --check-prefix=CHECK2
6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
7 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK3
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK3
9
10 // expected-no-diagnostics
11 #ifndef HEADER
12 #define HEADER
13
14 #define N 1000
15 #define M 10
16
17 template<typename tx>
ftemplate(int n)18 tx ftemplate(int n) {
19 tx a[N];
20 short aa[N];
21 tx b[10];
22 tx c[M][M];
23 tx f = n;
24 tx l;
25 int k;
26 tx *v;
27
28 #pragma omp target teams distribute parallel for lastprivate(l) dist_schedule(static,128) schedule(static,32)
29 for(int i = 0; i < n; i++) {
30 a[i] = 1;
31 l = i;
32 }
33
34 #pragma omp target teams distribute parallel for map(tofrom: aa) num_teams(M) thread_limit(64)
35 for(int i = 0; i < n; i++) {
36 aa[i] += 1;
37 }
38
39 #pragma omp target teams distribute parallel for map(tofrom:a, aa, b) if(target: n>40) proc_bind(spread)
40 for(int i = 0; i < 10; i++) {
41 b[i] += 1;
42 }
43
44 #pragma omp target teams distribute parallel for collapse(2) firstprivate(f) private(k)
45 for(int i = 0; i < M; i++) {
46 for(int j = 0; j < M; j++) {
47 k = M;
48 c[i][j] = i + j * f + k;
49 }
50 }
51
52 #pragma omp target teams distribute parallel for collapse(2)
53 for(int i = 0; i < n; i++) {
54 for(int j = 0; j < n; j++) {
55 c[i][j] = i + j;
56 }
57 }
58
59 #pragma omp target teams distribute parallel for map(a, v[:N])
60 for(int i = 0; i < n; i++)
61 a[i] = v[i];
62 return a[0];
63 }
64
bar(int n)65 int bar(int n){
66 int a = 0;
67
68 a += ftemplate<int>(n);
69
70 return a;
71 }
72
73 #endif
74 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28
75 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR0:[0-9]+]] {
76 // CHECK1-NEXT: entry:
77 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
78 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
79 // CHECK1-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
80 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
81 // CHECK1-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
82 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
83 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
84 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
85 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
86 // CHECK1-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
87 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
88 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
89 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
90 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false, i1 false)
91 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
92 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
93 // CHECK1: user_code.entry:
94 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
95 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
96 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
97 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
98 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
99 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 4
100 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
101 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4
102 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[L_CASTED]], align 8
103 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
104 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
105 // CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i32]* [[TMP0]], i64 [[TMP6]]) #[[ATTR3:[0-9]+]]
106 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
107 // CHECK1-NEXT: ret void
108 // CHECK1: worker.exit:
109 // CHECK1-NEXT: ret void
110 //
111 //
112 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__
113 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR1:[0-9]+]] {
114 // CHECK1-NEXT: entry:
115 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
116 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
117 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
118 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
119 // CHECK1-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
120 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
121 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
122 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
123 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
124 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
125 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
126 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
127 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
128 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
129 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
130 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
131 // CHECK1-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
132 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
133 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
134 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
135 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
136 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
137 // CHECK1-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
138 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
139 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
140 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
141 // CHECK1-NEXT: [[L2:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i64 4)
142 // CHECK1-NEXT: [[L_ON_STACK:%.*]] = bitcast i8* [[L2]] to i32*
143 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
144 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
145 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
146 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
147 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
148 // CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
149 // CHECK1-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
150 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
151 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
152 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
153 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
154 // CHECK1: omp.precond.then:
155 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
156 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
157 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
158 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
159 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
160 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
161 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
162 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
163 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
164 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
165 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
166 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
167 // CHECK1: cond.true:
168 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
169 // CHECK1-NEXT: br label [[COND_END:%.*]]
170 // CHECK1: cond.false:
171 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
172 // CHECK1-NEXT: br label [[COND_END]]
173 // CHECK1: cond.end:
174 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
175 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
176 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
177 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
178 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
179 // CHECK1: omp.inner.for.cond:
180 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
181 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
182 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
183 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
184 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
185 // CHECK1: omp.inner.for.body:
186 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
187 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
188 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
189 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
190 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4
191 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
192 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
193 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
194 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4
195 // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
196 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
197 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[L_CASTED]], align 8
198 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
199 // CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP15]] to i8*
200 // CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
201 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
202 // CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8*
203 // CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
204 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
205 // CHECK1-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8*
206 // CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
207 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
208 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
209 // CHECK1-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8
210 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
211 // CHECK1-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP21]] to i8*
212 // CHECK1-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8
213 // CHECK1-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
214 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
215 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
216 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i64 5)
217 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
218 // CHECK1: omp.inner.for.inc:
219 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
220 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
221 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
222 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
223 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
224 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
225 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
226 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
227 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
228 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
229 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
230 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
231 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
232 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
233 // CHECK1-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
234 // CHECK1-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
235 // CHECK1: cond.true14:
236 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
237 // CHECK1-NEXT: br label [[COND_END16:%.*]]
238 // CHECK1: cond.false15:
239 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
240 // CHECK1-NEXT: br label [[COND_END16]]
241 // CHECK1: cond.end16:
242 // CHECK1-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE14]] ], [ [[TMP44]], [[COND_FALSE15]] ]
243 // CHECK1-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
244 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
245 // CHECK1-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
246 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
247 // CHECK1: omp.inner.for.end:
248 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
249 // CHECK1: omp.loop.exit:
250 // CHECK1-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
251 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
252 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP47]])
253 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
254 // CHECK1-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
255 // CHECK1-NEXT: br i1 [[TMP49]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
256 // CHECK1: .omp.lastprivate.then:
257 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[CONV1]], align 4
258 // CHECK1-NEXT: store i32 [[TMP50]], i32* [[CONV1]], align 4
259 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
260 // CHECK1: .omp.lastprivate.done:
261 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
262 // CHECK1: omp.precond.end:
263 // CHECK1-NEXT: call void @__kmpc_free_shared(i8* [[L2]], i64 4)
264 // CHECK1-NEXT: ret void
265 //
266 //
267 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__1
268 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR1]] {
269 // CHECK1-NEXT: entry:
270 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
271 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
272 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
273 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
274 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
275 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
276 // CHECK1-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
277 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
278 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
279 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
280 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
281 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
282 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
283 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
284 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
285 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
286 // CHECK1-NEXT: [[I6:%.*]] = alloca i32, align 4
287 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
288 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
289 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
290 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
291 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
292 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
293 // CHECK1-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
294 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
295 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
296 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
297 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
298 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
299 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
300 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
301 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
302 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
303 // CHECK1-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
304 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
305 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
306 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
307 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
308 // CHECK1: omp.precond.then:
309 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
310 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
311 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
312 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
313 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
314 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
315 // CHECK1-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
316 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
317 // CHECK1-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
318 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
319 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
320 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
321 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
322 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
323 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
324 // CHECK1: omp.dispatch.cond:
325 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
326 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
327 // CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP10]] to i32
328 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP9]], [[CONV7]]
329 // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
330 // CHECK1: cond.true:
331 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
332 // CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP11]] to i32
333 // CHECK1-NEXT: br label [[COND_END:%.*]]
334 // CHECK1: cond.false:
335 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
336 // CHECK1-NEXT: br label [[COND_END]]
337 // CHECK1: cond.end:
338 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
339 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
340 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
341 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
342 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
343 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
344 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
345 // CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
346 // CHECK1: omp.dispatch.body:
347 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
348 // CHECK1: omp.inner.for.cond:
349 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
350 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
351 // CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
352 // CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
353 // CHECK1: omp.inner.for.body:
354 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
355 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
356 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
357 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
358 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
359 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
360 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
361 // CHECK1-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
362 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
363 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 4
364 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
365 // CHECK1: omp.body.continue:
366 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
367 // CHECK1: omp.inner.for.inc:
368 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
369 // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1
370 // CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
371 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
372 // CHECK1: omp.inner.for.end:
373 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
374 // CHECK1: omp.dispatch.inc:
375 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
376 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
377 // CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
378 // CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_LB]], align 4
379 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
380 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
381 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
382 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_UB]], align 4
383 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
384 // CHECK1: omp.dispatch.end:
385 // CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
386 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
387 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP27]])
388 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
389 // CHECK1-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
390 // CHECK1-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
391 // CHECK1: .omp.lastprivate.then:
392 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[CONV1]], align 4
393 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[CONV1]], align 4
394 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
395 // CHECK1: .omp.lastprivate.done:
396 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
397 // CHECK1: omp.precond.end:
398 // CHECK1-NEXT: ret void
399 //
400 //
401 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l34
402 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
403 // CHECK1-NEXT: entry:
404 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
405 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
406 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
407 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
408 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
409 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
410 // CHECK1-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
411 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
412 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
413 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
414 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
415 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
416 // CHECK1: user_code.entry:
417 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
418 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
419 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
420 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
421 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
422 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
423 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
424 // CHECK1-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
425 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
426 // CHECK1-NEXT: ret void
427 // CHECK1: worker.exit:
428 // CHECK1-NEXT: ret void
429 //
430 //
431 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__2
432 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
433 // CHECK1-NEXT: entry:
434 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
435 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
436 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
437 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
438 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
439 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
440 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
441 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
442 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
443 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
444 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
445 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
446 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
447 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
448 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
449 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
450 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
451 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
452 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
453 // CHECK1-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
454 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
455 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
456 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
457 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
458 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
459 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
460 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
461 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
462 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
463 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
464 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
465 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
466 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
467 // CHECK1: omp.precond.then:
468 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
469 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
470 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
471 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
472 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
473 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
474 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
475 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
476 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
477 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
478 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
479 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
480 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
481 // CHECK1: cond.true:
482 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
483 // CHECK1-NEXT: br label [[COND_END:%.*]]
484 // CHECK1: cond.false:
485 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
486 // CHECK1-NEXT: br label [[COND_END]]
487 // CHECK1: cond.end:
488 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
489 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
490 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
491 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
492 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
493 // CHECK1: omp.inner.for.cond:
494 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
495 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
496 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
497 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
498 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
499 // CHECK1: omp.inner.for.body:
500 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
501 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
502 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
503 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
504 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4
505 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
506 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
507 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
508 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
509 // CHECK1-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
510 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
511 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
512 // CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
513 // CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
514 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
515 // CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
516 // CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
517 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
518 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
519 // CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
520 // CHECK1-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
521 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
522 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
523 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
524 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
525 // CHECK1: omp.inner.for.inc:
526 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
527 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
528 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
529 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
530 // CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
531 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
532 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
533 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
534 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
535 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
536 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
537 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
538 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
539 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
540 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
541 // CHECK1-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
542 // CHECK1: cond.true11:
543 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
544 // CHECK1-NEXT: br label [[COND_END13:%.*]]
545 // CHECK1: cond.false12:
546 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
547 // CHECK1-NEXT: br label [[COND_END13]]
548 // CHECK1: cond.end13:
549 // CHECK1-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
550 // CHECK1-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
551 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
552 // CHECK1-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
553 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
554 // CHECK1: omp.inner.for.end:
555 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
556 // CHECK1: omp.loop.exit:
557 // CHECK1-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
558 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
559 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP43]])
560 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
561 // CHECK1: omp.precond.end:
562 // CHECK1-NEXT: ret void
563 //
564 //
565 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__3
566 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
567 // CHECK1-NEXT: entry:
568 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
569 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
570 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
571 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
572 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
573 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
574 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
575 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
576 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
577 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
578 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
579 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
580 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
581 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
582 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
583 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
584 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
585 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
586 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
587 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
588 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
589 // CHECK1-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
590 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
591 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
592 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
593 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
594 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
595 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
596 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
597 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
598 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
599 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
600 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
601 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
602 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
603 // CHECK1: omp.precond.then:
604 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
605 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
606 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
607 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
608 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
609 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
610 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
611 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
612 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
613 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
614 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
615 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
616 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
617 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
618 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
619 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
620 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
621 // CHECK1: omp.inner.for.cond:
622 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
623 // CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
624 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
625 // CHECK1-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
626 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
627 // CHECK1: omp.inner.for.body:
628 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
629 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
630 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
631 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
632 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
633 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
634 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
635 // CHECK1-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
636 // CHECK1-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
637 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
638 // CHECK1-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
639 // CHECK1-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
640 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
641 // CHECK1: omp.body.continue:
642 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
643 // CHECK1: omp.inner.for.inc:
644 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
645 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
646 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
647 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
648 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
649 // CHECK1: omp.inner.for.end:
650 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
651 // CHECK1: omp.loop.exit:
652 // CHECK1-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
653 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
654 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]])
655 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
656 // CHECK1: omp.precond.end:
657 // CHECK1-NEXT: ret void
658 //
659 //
660 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l39
661 // CHECK1-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
662 // CHECK1-NEXT: entry:
663 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
664 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
665 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
666 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
667 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
668 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
669 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
670 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
671 // CHECK1: user_code.entry:
672 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
673 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
674 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
675 // CHECK1-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
676 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
677 // CHECK1-NEXT: ret void
678 // CHECK1: worker.exit:
679 // CHECK1-NEXT: ret void
680 //
681 //
682 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__4
683 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
684 // CHECK1-NEXT: entry:
685 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
686 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
687 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
688 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
689 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
690 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
691 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
692 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
693 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
694 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
695 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
696 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
697 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
698 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
699 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
700 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
701 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
702 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
703 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
704 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
705 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
706 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
707 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
708 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
709 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
710 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
711 // CHECK1: cond.true:
712 // CHECK1-NEXT: br label [[COND_END:%.*]]
713 // CHECK1: cond.false:
714 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
715 // CHECK1-NEXT: br label [[COND_END]]
716 // CHECK1: cond.end:
717 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
718 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
719 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
720 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
721 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
722 // CHECK1: omp.inner.for.cond:
723 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
724 // CHECK1-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
725 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
726 // CHECK1: omp.inner.for.body:
727 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
728 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
729 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
730 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
731 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
732 // CHECK1-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
733 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
734 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
735 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
736 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
737 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
738 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
739 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
740 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
741 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
742 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
743 // CHECK1: omp.inner.for.inc:
744 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
745 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
746 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
747 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
748 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
749 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
750 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
751 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
752 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
753 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
754 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
755 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
756 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
757 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
758 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
759 // CHECK1: cond.true5:
760 // CHECK1-NEXT: br label [[COND_END7:%.*]]
761 // CHECK1: cond.false6:
762 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
763 // CHECK1-NEXT: br label [[COND_END7]]
764 // CHECK1: cond.end7:
765 // CHECK1-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
766 // CHECK1-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
767 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
768 // CHECK1-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
769 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
770 // CHECK1: omp.inner.for.end:
771 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
772 // CHECK1: omp.loop.exit:
773 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
774 // CHECK1-NEXT: ret void
775 //
776 //
777 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__5
778 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
779 // CHECK1-NEXT: entry:
780 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
781 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
782 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
783 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
784 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
785 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
786 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
787 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
788 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
789 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
790 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
791 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
792 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
793 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
794 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
795 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
796 // CHECK1-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
797 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
798 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
799 // CHECK1-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
800 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
801 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
802 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
803 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
804 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
805 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
806 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
807 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
808 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
809 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
810 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
811 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
812 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
813 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
814 // CHECK1: omp.inner.for.cond:
815 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
816 // CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
817 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
818 // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
819 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
820 // CHECK1: omp.inner.for.body:
821 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
822 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
823 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
824 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
825 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
826 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
827 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
828 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
829 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
830 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
831 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
832 // CHECK1: omp.body.continue:
833 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
834 // CHECK1: omp.inner.for.inc:
835 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
836 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
837 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
838 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
839 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
840 // CHECK1: omp.inner.for.end:
841 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
842 // CHECK1: omp.loop.exit:
843 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
844 // CHECK1-NEXT: ret void
845 //
846 //
847 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
848 // CHECK1-SAME: ([10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR0]] {
849 // CHECK1-NEXT: entry:
850 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
851 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
852 // CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
853 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
854 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
855 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
856 // CHECK1-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
857 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
858 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
859 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
860 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
861 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
862 // CHECK1: user_code.entry:
863 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
864 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
865 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
866 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
867 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[F_CASTED]], align 8
868 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
869 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
870 // CHECK1-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP4]]) #[[ATTR3]]
871 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
872 // CHECK1-NEXT: ret void
873 // CHECK1: worker.exit:
874 // CHECK1-NEXT: ret void
875 //
876 //
877 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__6
878 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
879 // CHECK1-NEXT: entry:
880 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
881 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
882 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
883 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
884 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
885 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
886 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
887 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
888 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
889 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
890 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
891 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4
892 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
893 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
894 // CHECK1-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
895 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
896 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
897 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
898 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
899 // CHECK1-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
900 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
901 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
902 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
903 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
904 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
905 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
906 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
907 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
908 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
909 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
910 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
911 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
912 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
913 // CHECK1: cond.true:
914 // CHECK1-NEXT: br label [[COND_END:%.*]]
915 // CHECK1: cond.false:
916 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
917 // CHECK1-NEXT: br label [[COND_END]]
918 // CHECK1: cond.end:
919 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
920 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
921 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
922 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
923 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
924 // CHECK1: omp.inner.for.cond:
925 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
926 // CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
927 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
928 // CHECK1: omp.inner.for.body:
929 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
930 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
931 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
932 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
933 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 4
934 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
935 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
936 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
937 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
938 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
939 // CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
940 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
941 // CHECK1-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
942 // CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
943 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
944 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
945 // CHECK1-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
946 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
947 // CHECK1-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
948 // CHECK1-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
949 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
950 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
951 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
952 // CHECK1: omp.inner.for.inc:
953 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
954 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
955 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
956 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
957 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
958 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
959 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
960 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
961 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
962 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
963 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
964 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
965 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
966 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
967 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
968 // CHECK1: cond.true7:
969 // CHECK1-NEXT: br label [[COND_END9:%.*]]
970 // CHECK1: cond.false8:
971 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
972 // CHECK1-NEXT: br label [[COND_END9]]
973 // CHECK1: cond.end9:
974 // CHECK1-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
975 // CHECK1-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
976 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
977 // CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
978 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
979 // CHECK1: omp.inner.for.end:
980 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
981 // CHECK1: omp.loop.exit:
982 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
983 // CHECK1-NEXT: ret void
984 //
985 //
986 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__7
987 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
988 // CHECK1-NEXT: entry:
989 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
990 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
991 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
992 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
993 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
994 // CHECK1-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
995 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
996 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
997 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
998 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
999 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1000 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1001 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1002 // CHECK1-NEXT: [[K:%.*]] = alloca i32, align 4
1003 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1004 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
1005 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1006 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1007 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1008 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1009 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
1010 // CHECK1-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
1011 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
1012 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
1013 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1014 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1015 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1016 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1017 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1018 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
1019 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
1020 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
1021 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1022 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1023 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1024 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1025 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1026 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1027 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1028 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1029 // CHECK1: omp.inner.for.cond:
1030 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1031 // CHECK1-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
1032 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1033 // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
1034 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1035 // CHECK1: omp.inner.for.body:
1036 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1037 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
1038 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1039 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1040 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1041 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1042 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1043 // CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
1044 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
1045 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
1046 // CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
1047 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
1048 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
1049 // CHECK1-NEXT: store i32 10, i32* [[K]], align 4
1050 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1051 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
1052 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 4
1053 // CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
1054 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
1055 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
1056 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
1057 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1058 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1059 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1060 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
1061 // CHECK1-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
1062 // CHECK1-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
1063 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
1064 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1065 // CHECK1: omp.body.continue:
1066 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1067 // CHECK1: omp.inner.for.inc:
1068 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1069 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1070 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1071 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
1072 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1073 // CHECK1: omp.inner.for.end:
1074 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1075 // CHECK1: omp.loop.exit:
1076 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
1077 // CHECK1-NEXT: ret void
1078 //
1079 //
1080 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l52
1081 // CHECK1-SAME: (i64 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
1082 // CHECK1-NEXT: entry:
1083 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1084 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
1085 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1086 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1087 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1088 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1089 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
1090 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1091 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
1092 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
1093 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
1094 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1095 // CHECK1: user_code.entry:
1096 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
1097 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
1098 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1099 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
1100 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1101 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
1102 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
1103 // CHECK1-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
1104 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
1105 // CHECK1-NEXT: ret void
1106 // CHECK1: worker.exit:
1107 // CHECK1-NEXT: ret void
1108 //
1109 //
1110 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__8
1111 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
1112 // CHECK1-NEXT: entry:
1113 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1114 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1115 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1116 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
1117 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1118 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1119 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1120 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1121 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1122 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
1123 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1124 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
1125 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
1126 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
1127 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1128 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1129 // CHECK1-NEXT: [[I10:%.*]] = alloca i32, align 4
1130 // CHECK1-NEXT: [[J11:%.*]] = alloca i32, align 4
1131 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1132 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
1133 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1134 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1135 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1136 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
1137 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1138 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
1139 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
1140 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1141 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1142 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1143 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1144 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1145 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1146 // CHECK1-NEXT: [[CONV4:%.*]] = sext i32 [[DIV]] to i64
1147 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1148 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[TMP4]], 0
1149 // CHECK1-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB5]], 1
1150 // CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[DIV6]] to i64
1151 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV4]], [[CONV7]]
1152 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i64 [[MUL]], 1
1153 // CHECK1-NEXT: store i64 [[SUB8]], i64* [[DOTCAPTURE_EXPR_3]], align 8
1154 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
1155 // CHECK1-NEXT: store i32 0, i32* [[J]], align 4
1156 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1157 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1158 // CHECK1-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1159 // CHECK1: land.lhs.true:
1160 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1161 // CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i32 0, [[TMP6]]
1162 // CHECK1-NEXT: br i1 [[CMP9]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1163 // CHECK1: omp.precond.then:
1164 // CHECK1-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
1165 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1166 // CHECK1-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
1167 // CHECK1-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1168 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1169 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1170 // CHECK1-NEXT: [[CONV12:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
1171 // CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1172 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
1173 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV12]])
1174 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1175 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1176 // CHECK1-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
1177 // CHECK1-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1178 // CHECK1: cond.true:
1179 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1180 // CHECK1-NEXT: br label [[COND_END:%.*]]
1181 // CHECK1: cond.false:
1182 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1183 // CHECK1-NEXT: br label [[COND_END]]
1184 // CHECK1: cond.end:
1185 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
1186 // CHECK1-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1187 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1188 // CHECK1-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
1189 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1190 // CHECK1: omp.inner.for.cond:
1191 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1192 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1193 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
1194 // CHECK1-NEXT: [[CMP14:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
1195 // CHECK1-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1196 // CHECK1: omp.inner.for.body:
1197 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1198 // CHECK1-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1199 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[CONV]], align 4
1200 // CHECK1-NEXT: [[CONV15:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1201 // CHECK1-NEXT: store i32 [[TMP19]], i32* [[CONV15]], align 4
1202 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, i64* [[N_CASTED]], align 8
1203 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1204 // CHECK1-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP17]] to i8*
1205 // CHECK1-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
1206 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1207 // CHECK1-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to i8*
1208 // CHECK1-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
1209 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1210 // CHECK1-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to i8*
1211 // CHECK1-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
1212 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
1213 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
1214 // CHECK1-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
1215 // CHECK1-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1216 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
1217 // CHECK1-NEXT: [[TMP31:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
1218 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP31]], i64 4)
1219 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1220 // CHECK1: omp.inner.for.inc:
1221 // CHECK1-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1222 // CHECK1-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1223 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP32]], [[TMP33]]
1224 // CHECK1-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_IV]], align 8
1225 // CHECK1-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1226 // CHECK1-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1227 // CHECK1-NEXT: [[ADD17:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
1228 // CHECK1-NEXT: store i64 [[ADD17]], i64* [[DOTOMP_COMB_LB]], align 8
1229 // CHECK1-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1230 // CHECK1-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1231 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
1232 // CHECK1-NEXT: store i64 [[ADD18]], i64* [[DOTOMP_COMB_UB]], align 8
1233 // CHECK1-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1234 // CHECK1-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1235 // CHECK1-NEXT: [[CMP19:%.*]] = icmp sgt i64 [[TMP38]], [[TMP39]]
1236 // CHECK1-NEXT: br i1 [[CMP19]], label [[COND_TRUE20:%.*]], label [[COND_FALSE21:%.*]]
1237 // CHECK1: cond.true20:
1238 // CHECK1-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1239 // CHECK1-NEXT: br label [[COND_END22:%.*]]
1240 // CHECK1: cond.false21:
1241 // CHECK1-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1242 // CHECK1-NEXT: br label [[COND_END22]]
1243 // CHECK1: cond.end22:
1244 // CHECK1-NEXT: [[COND23:%.*]] = phi i64 [ [[TMP40]], [[COND_TRUE20]] ], [ [[TMP41]], [[COND_FALSE21]] ]
1245 // CHECK1-NEXT: store i64 [[COND23]], i64* [[DOTOMP_COMB_UB]], align 8
1246 // CHECK1-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1247 // CHECK1-NEXT: store i64 [[TMP42]], i64* [[DOTOMP_IV]], align 8
1248 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1249 // CHECK1: omp.inner.for.end:
1250 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1251 // CHECK1: omp.loop.exit:
1252 // CHECK1-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1253 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
1254 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP44]])
1255 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1256 // CHECK1: omp.precond.end:
1257 // CHECK1-NEXT: ret void
1258 //
1259 //
1260 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__9
1261 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
1262 // CHECK1-NEXT: entry:
1263 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1264 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1265 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1266 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1267 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1268 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
1269 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1270 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1271 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1272 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1273 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1274 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
1275 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1276 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
1277 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1278 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1279 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1280 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1281 // CHECK1-NEXT: [[I10:%.*]] = alloca i32, align 4
1282 // CHECK1-NEXT: [[J11:%.*]] = alloca i32, align 4
1283 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1284 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1285 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1286 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1287 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1288 // CHECK1-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
1289 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1290 // CHECK1-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
1291 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
1292 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1293 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
1294 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1295 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1296 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1297 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1298 // CHECK1-NEXT: [[CONV4:%.*]] = sext i32 [[DIV]] to i64
1299 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1300 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[TMP4]], 0
1301 // CHECK1-NEXT: [[DIV6:%.*]] = sdiv i32 [[SUB5]], 1
1302 // CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[DIV6]] to i64
1303 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV4]], [[CONV7]]
1304 // CHECK1-NEXT: [[SUB8:%.*]] = sub nsw i64 [[MUL]], 1
1305 // CHECK1-NEXT: store i64 [[SUB8]], i64* [[DOTCAPTURE_EXPR_3]], align 8
1306 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
1307 // CHECK1-NEXT: store i32 0, i32* [[J]], align 4
1308 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1309 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1310 // CHECK1-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1311 // CHECK1: land.lhs.true:
1312 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1313 // CHECK1-NEXT: [[CMP9:%.*]] = icmp slt i32 0, [[TMP6]]
1314 // CHECK1-NEXT: br i1 [[CMP9]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1315 // CHECK1: omp.precond.then:
1316 // CHECK1-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1317 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1318 // CHECK1-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
1319 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1320 // CHECK1-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1321 // CHECK1-NEXT: store i64 [[TMP8]], i64* [[DOTOMP_LB]], align 8
1322 // CHECK1-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
1323 // CHECK1-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1324 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1325 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1326 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
1327 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1328 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1329 // CHECK1-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
1330 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1331 // CHECK1: omp.inner.for.cond:
1332 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1333 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1334 // CHECK1-NEXT: [[CMP12:%.*]] = icmp ule i64 [[TMP13]], [[TMP14]]
1335 // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1336 // CHECK1: omp.inner.for.body:
1337 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1338 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1339 // CHECK1-NEXT: [[SUB13:%.*]] = sub nsw i32 [[TMP16]], 0
1340 // CHECK1-NEXT: [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
1341 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 1, [[DIV14]]
1342 // CHECK1-NEXT: [[CONV16:%.*]] = sext i32 [[MUL15]] to i64
1343 // CHECK1-NEXT: [[DIV17:%.*]] = sdiv i64 [[TMP15]], [[CONV16]]
1344 // CHECK1-NEXT: [[MUL18:%.*]] = mul nsw i64 [[DIV17]], 1
1345 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL18]]
1346 // CHECK1-NEXT: [[CONV19:%.*]] = trunc i64 [[ADD]] to i32
1347 // CHECK1-NEXT: store i32 [[CONV19]], i32* [[I10]], align 4
1348 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1349 // CHECK1-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1350 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1351 // CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP19]], 0
1352 // CHECK1-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1
1353 // CHECK1-NEXT: [[MUL22:%.*]] = mul nsw i32 1, [[DIV21]]
1354 // CHECK1-NEXT: [[CONV23:%.*]] = sext i32 [[MUL22]] to i64
1355 // CHECK1-NEXT: [[DIV24:%.*]] = sdiv i64 [[TMP18]], [[CONV23]]
1356 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1357 // CHECK1-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP20]], 0
1358 // CHECK1-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
1359 // CHECK1-NEXT: [[MUL27:%.*]] = mul nsw i32 1, [[DIV26]]
1360 // CHECK1-NEXT: [[CONV28:%.*]] = sext i32 [[MUL27]] to i64
1361 // CHECK1-NEXT: [[MUL29:%.*]] = mul nsw i64 [[DIV24]], [[CONV28]]
1362 // CHECK1-NEXT: [[SUB30:%.*]] = sub nsw i64 [[TMP17]], [[MUL29]]
1363 // CHECK1-NEXT: [[MUL31:%.*]] = mul nsw i64 [[SUB30]], 1
1364 // CHECK1-NEXT: [[ADD32:%.*]] = add nsw i64 0, [[MUL31]]
1365 // CHECK1-NEXT: [[CONV33:%.*]] = trunc i64 [[ADD32]] to i32
1366 // CHECK1-NEXT: store i32 [[CONV33]], i32* [[J11]], align 4
1367 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[I10]], align 4
1368 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[J11]], align 4
1369 // CHECK1-NEXT: [[ADD34:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1370 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[I10]], align 4
1371 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
1372 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1373 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[J11]], align 4
1374 // CHECK1-NEXT: [[IDXPROM35:%.*]] = sext i32 [[TMP24]] to i64
1375 // CHECK1-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM35]]
1376 // CHECK1-NEXT: store i32 [[ADD34]], i32* [[ARRAYIDX36]], align 4
1377 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1378 // CHECK1: omp.body.continue:
1379 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1380 // CHECK1: omp.inner.for.inc:
1381 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1382 // CHECK1-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1383 // CHECK1-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
1384 // CHECK1-NEXT: store i64 [[ADD37]], i64* [[DOTOMP_IV]], align 8
1385 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1386 // CHECK1: omp.inner.for.end:
1387 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1388 // CHECK1: omp.loop.exit:
1389 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1390 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
1391 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]])
1392 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1393 // CHECK1: omp.precond.end:
1394 // CHECK1-NEXT: ret void
1395 //
1396 //
1397 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
1398 // CHECK1-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR0]] {
1399 // CHECK1-NEXT: entry:
1400 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1401 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1402 // CHECK1-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
1403 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1404 // CHECK1-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1405 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1406 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1407 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1408 // CHECK1-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
1409 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1410 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1411 // CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
1412 // CHECK1-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
1413 // CHECK1-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1414 // CHECK1: user_code.entry:
1415 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
1416 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
1417 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1418 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
1419 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1420 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[V_ADDR]], align 8
1421 // CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
1422 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
1423 // CHECK1-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i32]* [[TMP0]], i32* [[TMP5]]) #[[ATTR3]]
1424 // CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
1425 // CHECK1-NEXT: ret void
1426 // CHECK1: worker.exit:
1427 // CHECK1-NEXT: ret void
1428 //
1429 //
1430 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__10
1431 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR1]] {
1432 // CHECK1-NEXT: entry:
1433 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1434 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1435 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1436 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1437 // CHECK1-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
1438 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1439 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1440 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1441 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1442 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1443 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1444 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1445 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1446 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1447 // CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4
1448 // CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1449 // CHECK1-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
1450 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1451 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1452 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1453 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1454 // CHECK1-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
1455 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1456 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1457 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
1458 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1459 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1460 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1461 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1462 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1463 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1464 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
1465 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1466 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1467 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1468 // CHECK1: omp.precond.then:
1469 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1470 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1471 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1472 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1473 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1474 // CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
1475 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1476 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1477 // CHECK1-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
1478 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1479 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1480 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1481 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1482 // CHECK1: cond.true:
1483 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1484 // CHECK1-NEXT: br label [[COND_END:%.*]]
1485 // CHECK1: cond.false:
1486 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1487 // CHECK1-NEXT: br label [[COND_END]]
1488 // CHECK1: cond.end:
1489 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1490 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1491 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1492 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1494 // CHECK1: omp.inner.for.cond:
1495 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1496 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1497 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
1498 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
1499 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1500 // CHECK1: omp.inner.for.body:
1501 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1502 // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1503 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1504 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1505 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4
1506 // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1507 // CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
1508 // CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
1509 // CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[V_ADDR]], align 8
1510 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1511 // CHECK1-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to i8*
1512 // CHECK1-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
1513 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1514 // CHECK1-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to i8*
1515 // CHECK1-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
1516 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1517 // CHECK1-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to i8*
1518 // CHECK1-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
1519 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
1520 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
1521 // CHECK1-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
1522 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
1523 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP20]] to i8*
1524 // CHECK1-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
1525 // CHECK1-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1526 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1527 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
1528 // CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP33]], i64 5)
1529 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1530 // CHECK1: omp.inner.for.inc:
1531 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1532 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1533 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
1534 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1535 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1536 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1537 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
1538 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
1539 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1540 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1541 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
1542 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
1543 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1544 // CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1545 // CHECK1-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
1546 // CHECK1-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
1547 // CHECK1: cond.true11:
1548 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1549 // CHECK1-NEXT: br label [[COND_END13:%.*]]
1550 // CHECK1: cond.false12:
1551 // CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1552 // CHECK1-NEXT: br label [[COND_END13]]
1553 // CHECK1: cond.end13:
1554 // CHECK1-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE11]] ], [ [[TMP43]], [[COND_FALSE12]] ]
1555 // CHECK1-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
1556 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1557 // CHECK1-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
1558 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1559 // CHECK1: omp.inner.for.end:
1560 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1561 // CHECK1: omp.loop.exit:
1562 // CHECK1-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1563 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
1564 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP46]])
1565 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1566 // CHECK1: omp.precond.end:
1567 // CHECK1-NEXT: ret void
1568 //
1569 //
1570 // CHECK1-LABEL: define {{[^@]+}}@__omp_outlined__11
1571 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR1]] {
1572 // CHECK1-NEXT: entry:
1573 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1574 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1575 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1576 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1577 // CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1578 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1579 // CHECK1-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
1580 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1581 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1582 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1583 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1584 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1585 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1586 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1587 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1588 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1589 // CHECK1-NEXT: [[I5:%.*]] = alloca i32, align 4
1590 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1591 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1592 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1593 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1594 // CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1595 // CHECK1-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1596 // CHECK1-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
1597 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1598 // CHECK1-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1599 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
1600 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1601 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1602 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1603 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1604 // CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1605 // CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
1606 // CHECK1-NEXT: store i32 0, i32* [[I]], align 4
1607 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1608 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1609 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1610 // CHECK1: omp.precond.then:
1611 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1612 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
1613 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
1614 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1615 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
1616 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1617 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
1618 // CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
1619 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
1620 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1621 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1622 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1623 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1624 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1625 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1626 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1627 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1628 // CHECK1: omp.inner.for.cond:
1629 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1630 // CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
1631 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1632 // CHECK1-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
1633 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1634 // CHECK1: omp.inner.for.body:
1635 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1636 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
1637 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1638 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
1639 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 8
1640 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[I5]], align 4
1641 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
1642 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i64 [[IDXPROM]]
1643 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1644 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[I5]], align 4
1645 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
1646 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM8]]
1647 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX9]], align 4
1648 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1649 // CHECK1: omp.body.continue:
1650 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1651 // CHECK1: omp.inner.for.inc:
1652 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1653 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1654 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1655 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1656 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1657 // CHECK1: omp.inner.for.end:
1658 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1659 // CHECK1: omp.loop.exit:
1660 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1661 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
1662 // CHECK1-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]])
1663 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
1664 // CHECK1: omp.precond.end:
1665 // CHECK1-NEXT: ret void
1666 //
1667 //
1668 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28
1669 // CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR0:[0-9]+]] {
1670 // CHECK2-NEXT: entry:
1671 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1672 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1673 // CHECK2-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
1674 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1675 // CHECK2-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
1676 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
1677 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
1678 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1679 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1680 // CHECK2-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
1681 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1682 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1683 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
1684 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false, i1 false)
1685 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
1686 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
1687 // CHECK2: user_code.entry:
1688 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
1689 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
1690 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1691 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
1692 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1693 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV1]], align 4
1694 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[L_CASTED]] to i32*
1695 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4
1696 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[L_CASTED]], align 8
1697 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
1698 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
1699 // CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i32]* [[TMP0]], i64 [[TMP6]]) #[[ATTR3:[0-9]+]]
1700 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
1701 // CHECK2-NEXT: ret void
1702 // CHECK2: worker.exit:
1703 // CHECK2-NEXT: ret void
1704 //
1705 //
1706 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__
1707 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR1:[0-9]+]] {
1708 // CHECK2-NEXT: entry:
1709 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1710 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1711 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1712 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1713 // CHECK2-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
1714 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1715 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1716 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1717 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1718 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1719 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1720 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1721 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1722 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1723 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4
1724 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1725 // CHECK2-NEXT: [[L_CASTED:%.*]] = alloca i64, align 8
1726 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
1727 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1728 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1729 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1730 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1731 // CHECK2-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
1732 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1733 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1734 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
1735 // CHECK2-NEXT: [[L2:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i64 4)
1736 // CHECK2-NEXT: [[L_ON_STACK:%.*]] = bitcast i8* [[L2]] to i32*
1737 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
1738 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1739 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1740 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1741 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1742 // CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1
1743 // CHECK2-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1744 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
1745 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1746 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1747 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1748 // CHECK2: omp.precond.then:
1749 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1750 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1751 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
1752 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1753 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1754 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1755 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1756 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
1757 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1758 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1759 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1760 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1761 // CHECK2: cond.true:
1762 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1763 // CHECK2-NEXT: br label [[COND_END:%.*]]
1764 // CHECK2: cond.false:
1765 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1766 // CHECK2-NEXT: br label [[COND_END]]
1767 // CHECK2: cond.end:
1768 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1769 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1770 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1771 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
1772 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1773 // CHECK2: omp.inner.for.cond:
1774 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1775 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1776 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
1777 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
1778 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1779 // CHECK2: omp.inner.for.body:
1780 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1781 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1782 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1783 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1784 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4
1785 // CHECK2-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1786 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4
1787 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
1788 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 4
1789 // CHECK2-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32*
1790 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4
1791 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, i64* [[L_CASTED]], align 8
1792 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
1793 // CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP15]] to i8*
1794 // CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
1795 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
1796 // CHECK2-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8*
1797 // CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
1798 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
1799 // CHECK2-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8*
1800 // CHECK2-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
1801 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
1802 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
1803 // CHECK2-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8
1804 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
1805 // CHECK2-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP21]] to i8*
1806 // CHECK2-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8
1807 // CHECK2-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1808 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
1809 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
1810 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i64 5)
1811 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1812 // CHECK2: omp.inner.for.inc:
1813 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1814 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1815 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
1816 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1817 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1818 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1819 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
1820 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4
1821 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1822 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1823 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP39]], [[TMP40]]
1824 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4
1825 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1826 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1827 // CHECK2-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]]
1828 // CHECK2-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]]
1829 // CHECK2: cond.true14:
1830 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1831 // CHECK2-NEXT: br label [[COND_END16:%.*]]
1832 // CHECK2: cond.false15:
1833 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1834 // CHECK2-NEXT: br label [[COND_END16]]
1835 // CHECK2: cond.end16:
1836 // CHECK2-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE14]] ], [ [[TMP44]], [[COND_FALSE15]] ]
1837 // CHECK2-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4
1838 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1839 // CHECK2-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4
1840 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1841 // CHECK2: omp.inner.for.end:
1842 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1843 // CHECK2: omp.loop.exit:
1844 // CHECK2-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1845 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4
1846 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP47]])
1847 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1848 // CHECK2-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
1849 // CHECK2-NEXT: br i1 [[TMP49]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1850 // CHECK2: .omp.lastprivate.then:
1851 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[CONV1]], align 4
1852 // CHECK2-NEXT: store i32 [[TMP50]], i32* [[CONV1]], align 4
1853 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1854 // CHECK2: .omp.lastprivate.done:
1855 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1856 // CHECK2: omp.precond.end:
1857 // CHECK2-NEXT: call void @__kmpc_free_shared(i8* [[L2]], i64 4)
1858 // CHECK2-NEXT: ret void
1859 //
1860 //
1861 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__1
1862 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[L:%.*]]) #[[ATTR1]] {
1863 // CHECK2-NEXT: entry:
1864 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1865 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1866 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1867 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1868 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1869 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
1870 // CHECK2-NEXT: [[L_ADDR:%.*]] = alloca i64, align 8
1871 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1872 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
1873 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1874 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1875 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
1876 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1877 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1878 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1879 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1880 // CHECK2-NEXT: [[I6:%.*]] = alloca i32, align 4
1881 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1882 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1883 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1884 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1885 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1886 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
1887 // CHECK2-NEXT: store i64 [[L]], i64* [[L_ADDR]], align 8
1888 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1889 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
1890 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[L_ADDR]] to i32*
1891 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
1892 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
1893 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1894 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1895 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1896 // CHECK2-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1897 // CHECK2-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1898 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
1899 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1900 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1901 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1902 // CHECK2: omp.precond.then:
1903 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1904 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1905 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
1906 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1907 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP5]] to i32
1908 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1909 // CHECK2-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP6]] to i32
1910 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
1911 // CHECK2-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
1912 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1913 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1914 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1915 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
1916 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
1917 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1918 // CHECK2: omp.dispatch.cond:
1919 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1920 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1921 // CHECK2-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP10]] to i32
1922 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP9]], [[CONV7]]
1923 // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1924 // CHECK2: cond.true:
1925 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1926 // CHECK2-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP11]] to i32
1927 // CHECK2-NEXT: br label [[COND_END:%.*]]
1928 // CHECK2: cond.false:
1929 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1930 // CHECK2-NEXT: br label [[COND_END]]
1931 // CHECK2: cond.end:
1932 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1933 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1934 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1935 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
1936 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1937 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1938 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1939 // CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1940 // CHECK2: omp.dispatch.body:
1941 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1942 // CHECK2: omp.inner.for.cond:
1943 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1944 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1945 // CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1946 // CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1947 // CHECK2: omp.inner.for.body:
1948 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1949 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1950 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1951 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
1952 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
1953 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
1954 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1955 // CHECK2-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
1956 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4
1957 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 4
1958 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1959 // CHECK2: omp.body.continue:
1960 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1961 // CHECK2: omp.inner.for.inc:
1962 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1963 // CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1
1964 // CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1965 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
1966 // CHECK2: omp.inner.for.end:
1967 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1968 // CHECK2: omp.dispatch.inc:
1969 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1970 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1971 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1972 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_LB]], align 4
1973 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1974 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1975 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
1976 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_UB]], align 4
1977 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]]
1978 // CHECK2: omp.dispatch.end:
1979 // CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1980 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
1981 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP27]])
1982 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1983 // CHECK2-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1984 // CHECK2-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1985 // CHECK2: .omp.lastprivate.then:
1986 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[CONV1]], align 4
1987 // CHECK2-NEXT: store i32 [[TMP30]], i32* [[CONV1]], align 4
1988 // CHECK2-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1989 // CHECK2: .omp.lastprivate.done:
1990 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
1991 // CHECK2: omp.precond.end:
1992 // CHECK2-NEXT: ret void
1993 //
1994 //
1995 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l34
1996 // CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
1997 // CHECK2-NEXT: entry:
1998 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1999 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
2000 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2001 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2002 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2003 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2004 // CHECK2-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
2005 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2006 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
2007 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
2008 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2009 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2010 // CHECK2: user_code.entry:
2011 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
2012 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
2013 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2014 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
2015 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
2016 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2017 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
2018 // CHECK2-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
2019 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
2020 // CHECK2-NEXT: ret void
2021 // CHECK2: worker.exit:
2022 // CHECK2-NEXT: ret void
2023 //
2024 //
2025 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__2
2026 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
2027 // CHECK2-NEXT: entry:
2028 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2029 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2030 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2031 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
2032 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2033 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2034 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2035 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2036 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2037 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2038 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2039 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2040 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2041 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
2042 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2043 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
2044 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2045 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2046 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2047 // CHECK2-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
2048 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2049 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
2050 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
2051 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2052 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2053 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2054 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2055 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2056 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2057 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
2058 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2059 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2060 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2061 // CHECK2: omp.precond.then:
2062 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2063 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2064 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
2065 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2066 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2067 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2068 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2069 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2070 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2071 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2072 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2073 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2074 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2075 // CHECK2: cond.true:
2076 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2077 // CHECK2-NEXT: br label [[COND_END:%.*]]
2078 // CHECK2: cond.false:
2079 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2080 // CHECK2-NEXT: br label [[COND_END]]
2081 // CHECK2: cond.end:
2082 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2083 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2084 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2085 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
2086 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2087 // CHECK2: omp.inner.for.cond:
2088 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2089 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2090 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
2091 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
2092 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2093 // CHECK2: omp.inner.for.body:
2094 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2095 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
2096 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2097 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
2098 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4
2099 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2100 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
2101 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
2102 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2103 // CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8*
2104 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8
2105 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2106 // CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8*
2107 // CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8
2108 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
2109 // CHECK2-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8*
2110 // CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
2111 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
2112 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
2113 // CHECK2-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
2114 // CHECK2-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2115 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4
2116 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
2117 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4)
2118 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2119 // CHECK2: omp.inner.for.inc:
2120 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2121 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2122 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
2123 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
2124 // CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2125 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2126 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
2127 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
2128 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2129 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2130 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
2131 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
2132 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2133 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2134 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]]
2135 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
2136 // CHECK2: cond.true11:
2137 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2138 // CHECK2-NEXT: br label [[COND_END13:%.*]]
2139 // CHECK2: cond.false12:
2140 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2141 // CHECK2-NEXT: br label [[COND_END13]]
2142 // CHECK2: cond.end13:
2143 // CHECK2-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ]
2144 // CHECK2-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
2145 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2146 // CHECK2-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4
2147 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2148 // CHECK2: omp.inner.for.end:
2149 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2150 // CHECK2: omp.loop.exit:
2151 // CHECK2-NEXT: [[TMP42:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2152 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[TMP42]], align 4
2153 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP43]])
2154 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2155 // CHECK2: omp.precond.end:
2156 // CHECK2-NEXT: ret void
2157 //
2158 //
2159 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__3
2160 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
2161 // CHECK2-NEXT: entry:
2162 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2163 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2164 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2165 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2166 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2167 // CHECK2-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 8
2168 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2169 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2170 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2171 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2172 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2173 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2174 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2175 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2176 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2177 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4
2178 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2179 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2180 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2181 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2182 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2183 // CHECK2-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 8
2184 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2185 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 8
2186 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
2187 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2188 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2189 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2190 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2191 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2192 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
2193 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
2194 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2195 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2196 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2197 // CHECK2: omp.precond.then:
2198 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2199 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
2200 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
2201 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2202 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
2203 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2204 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
2205 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
2206 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
2207 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2208 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2209 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2210 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
2211 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2212 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2213 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2214 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2215 // CHECK2: omp.inner.for.cond:
2216 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2217 // CHECK2-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
2218 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2219 // CHECK2-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
2220 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2221 // CHECK2: omp.inner.for.body:
2222 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2223 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2224 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2225 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
2226 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4
2227 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
2228 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2229 // CHECK2-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
2230 // CHECK2-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32
2231 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1
2232 // CHECK2-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16
2233 // CHECK2-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2
2234 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2235 // CHECK2: omp.body.continue:
2236 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2237 // CHECK2: omp.inner.for.inc:
2238 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2239 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2240 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2241 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2242 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2243 // CHECK2: omp.inner.for.end:
2244 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2245 // CHECK2: omp.loop.exit:
2246 // CHECK2-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2247 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2248 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]])
2249 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2250 // CHECK2: omp.precond.end:
2251 // CHECK2-NEXT: ret void
2252 //
2253 //
2254 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l39
2255 // CHECK2-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
2256 // CHECK2-NEXT: entry:
2257 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
2258 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2259 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2260 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
2261 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
2262 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
2263 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2264 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2265 // CHECK2: user_code.entry:
2266 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
2267 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2268 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
2269 // CHECK2-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
2270 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
2271 // CHECK2-NEXT: ret void
2272 // CHECK2: worker.exit:
2273 // CHECK2-NEXT: ret void
2274 //
2275 //
2276 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__4
2277 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
2278 // CHECK2-NEXT: entry:
2279 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2280 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2281 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
2282 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2283 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2284 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2285 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2286 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2287 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2288 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2289 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8
2290 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2291 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2292 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
2293 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
2294 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2295 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
2296 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2297 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2298 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2299 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2300 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2301 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2302 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2303 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2304 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2305 // CHECK2: cond.true:
2306 // CHECK2-NEXT: br label [[COND_END:%.*]]
2307 // CHECK2: cond.false:
2308 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2309 // CHECK2-NEXT: br label [[COND_END]]
2310 // CHECK2: cond.end:
2311 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2312 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2313 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2314 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2315 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2316 // CHECK2: omp.inner.for.cond:
2317 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2318 // CHECK2-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
2319 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2320 // CHECK2: omp.inner.for.body:
2321 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2322 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2323 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2324 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2325 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2326 // CHECK2-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8*
2327 // CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8
2328 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2329 // CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8*
2330 // CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
2331 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
2332 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
2333 // CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
2334 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
2335 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3)
2336 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2337 // CHECK2: omp.inner.for.inc:
2338 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2339 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2340 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2341 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2342 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2343 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2344 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2345 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
2346 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2347 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2348 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
2349 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
2350 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2351 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9
2352 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2353 // CHECK2: cond.true5:
2354 // CHECK2-NEXT: br label [[COND_END7:%.*]]
2355 // CHECK2: cond.false6:
2356 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2357 // CHECK2-NEXT: br label [[COND_END7]]
2358 // CHECK2: cond.end7:
2359 // CHECK2-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ]
2360 // CHECK2-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
2361 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2362 // CHECK2-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4
2363 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2364 // CHECK2: omp.inner.for.end:
2365 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2366 // CHECK2: omp.loop.exit:
2367 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
2368 // CHECK2-NEXT: ret void
2369 //
2370 //
2371 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__5
2372 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
2373 // CHECK2-NEXT: entry:
2374 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2375 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2376 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2377 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2378 // CHECK2-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 8
2379 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2380 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2381 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2382 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2383 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2384 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2385 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2386 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2387 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2388 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2389 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2390 // CHECK2-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 8
2391 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 8
2392 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2393 // CHECK2-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
2394 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2395 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2396 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2397 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2398 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2399 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2400 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2401 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2402 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2403 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2404 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2405 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2406 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2407 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2408 // CHECK2: omp.inner.for.cond:
2409 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2410 // CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64
2411 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2412 // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]]
2413 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2414 // CHECK2: omp.inner.for.body:
2415 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2416 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2417 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2418 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2419 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
2420 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2421 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2422 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2423 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2424 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4
2425 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2426 // CHECK2: omp.body.continue:
2427 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2428 // CHECK2: omp.inner.for.inc:
2429 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2430 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2431 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2432 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
2433 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2434 // CHECK2: omp.inner.for.end:
2435 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2436 // CHECK2: omp.loop.exit:
2437 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
2438 // CHECK2-NEXT: ret void
2439 //
2440 //
2441 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
2442 // CHECK2-SAME: ([10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR0]] {
2443 // CHECK2-NEXT: entry:
2444 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
2445 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
2446 // CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
2447 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2448 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2449 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
2450 // CHECK2-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
2451 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
2452 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
2453 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
2454 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2455 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2456 // CHECK2: user_code.entry:
2457 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
2458 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
2459 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[F_CASTED]] to i32*
2460 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
2461 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[F_CASTED]], align 8
2462 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2463 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
2464 // CHECK2-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i64 [[TMP4]]) #[[ATTR3]]
2465 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
2466 // CHECK2-NEXT: ret void
2467 // CHECK2: worker.exit:
2468 // CHECK2-NEXT: ret void
2469 //
2470 //
2471 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__6
2472 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
2473 // CHECK2-NEXT: entry:
2474 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2475 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2476 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
2477 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
2478 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2479 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2480 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2481 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2482 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2483 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2484 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2485 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4
2486 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2487 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
2488 // CHECK2-NEXT: [[F_CASTED:%.*]] = alloca i64, align 8
2489 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
2490 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2491 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2492 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
2493 // CHECK2-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
2494 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
2495 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
2496 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2497 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2498 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2499 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2500 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2501 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2502 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2503 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2504 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2505 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
2506 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2507 // CHECK2: cond.true:
2508 // CHECK2-NEXT: br label [[COND_END:%.*]]
2509 // CHECK2: cond.false:
2510 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2511 // CHECK2-NEXT: br label [[COND_END]]
2512 // CHECK2: cond.end:
2513 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2514 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2515 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2516 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2517 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2518 // CHECK2: omp.inner.for.cond:
2519 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2520 // CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
2521 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2522 // CHECK2: omp.inner.for.body:
2523 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2524 // CHECK2-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2525 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2526 // CHECK2-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2527 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 4
2528 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32*
2529 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4
2530 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8
2531 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2532 // CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8*
2533 // CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8
2534 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2535 // CHECK2-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8*
2536 // CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8
2537 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
2538 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
2539 // CHECK2-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
2540 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
2541 // CHECK2-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8*
2542 // CHECK2-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8
2543 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
2544 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4)
2545 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2546 // CHECK2: omp.inner.for.inc:
2547 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2548 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2549 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
2550 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2551 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2552 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2553 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2554 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4
2555 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2556 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2557 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
2558 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4
2559 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2560 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99
2561 // CHECK2-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
2562 // CHECK2: cond.true7:
2563 // CHECK2-NEXT: br label [[COND_END9:%.*]]
2564 // CHECK2: cond.false8:
2565 // CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2566 // CHECK2-NEXT: br label [[COND_END9]]
2567 // CHECK2: cond.end9:
2568 // CHECK2-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ]
2569 // CHECK2-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4
2570 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2571 // CHECK2-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4
2572 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2573 // CHECK2: omp.inner.for.end:
2574 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2575 // CHECK2: omp.loop.exit:
2576 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
2577 // CHECK2-NEXT: ret void
2578 //
2579 //
2580 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__7
2581 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i64 noundef [[F:%.*]]) #[[ATTR1]] {
2582 // CHECK2-NEXT: entry:
2583 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2584 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2585 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2586 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2587 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
2588 // CHECK2-NEXT: [[F_ADDR:%.*]] = alloca i64, align 8
2589 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2590 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2591 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2592 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2593 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2594 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2595 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2596 // CHECK2-NEXT: [[K:%.*]] = alloca i32, align 4
2597 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2598 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
2599 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2600 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2601 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2602 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2603 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
2604 // CHECK2-NEXT: store i64 [[F]], i64* [[F_ADDR]], align 8
2605 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
2606 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[F_ADDR]] to i32*
2607 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2608 // CHECK2-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2609 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2610 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2611 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2612 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP2]] to i32
2613 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_LB]], align 4
2614 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
2615 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2616 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2617 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2618 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2619 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2620 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2621 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2622 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2623 // CHECK2: omp.inner.for.cond:
2624 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2625 // CHECK2-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64
2626 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2627 // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]]
2628 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2629 // CHECK2: omp.inner.for.body:
2630 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2631 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
2632 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2633 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2634 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2635 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2636 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2637 // CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10
2638 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10
2639 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]]
2640 // CHECK2-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1
2641 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]]
2642 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[J]], align 4
2643 // CHECK2-NEXT: store i32 10, i32* [[K]], align 4
2644 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2645 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
2646 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 4
2647 // CHECK2-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
2648 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]]
2649 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
2650 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]]
2651 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2652 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2653 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2654 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
2655 // CHECK2-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64
2656 // CHECK2-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]]
2657 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4
2658 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2659 // CHECK2: omp.body.continue:
2660 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2661 // CHECK2: omp.inner.for.inc:
2662 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2663 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2664 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2665 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
2666 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2667 // CHECK2: omp.inner.for.end:
2668 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2669 // CHECK2: omp.loop.exit:
2670 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
2671 // CHECK2-NEXT: ret void
2672 //
2673 //
2674 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l52
2675 // CHECK2-SAME: (i64 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
2676 // CHECK2-NEXT: entry:
2677 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2678 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
2679 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2680 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2681 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2682 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2683 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
2684 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2685 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
2686 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
2687 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
2688 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
2689 // CHECK2: user_code.entry:
2690 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
2691 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
2692 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2693 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
2694 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
2695 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
2696 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
2697 // CHECK2-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
2698 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
2699 // CHECK2-NEXT: ret void
2700 // CHECK2: worker.exit:
2701 // CHECK2-NEXT: ret void
2702 //
2703 //
2704 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__8
2705 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
2706 // CHECK2-NEXT: entry:
2707 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2708 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2709 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2710 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
2711 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2712 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2713 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2714 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2715 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2716 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2717 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2718 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
2719 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2720 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2721 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2722 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2723 // CHECK2-NEXT: [[I8:%.*]] = alloca i32, align 4
2724 // CHECK2-NEXT: [[J9:%.*]] = alloca i32, align 4
2725 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2726 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 8
2727 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2728 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2729 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2730 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
2731 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2732 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
2733 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
2734 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2735 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
2736 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2737 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2738 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2739 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2740 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2741 // CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
2742 // CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2743 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
2744 // CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
2745 // CHECK2-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2746 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
2747 // CHECK2-NEXT: store i32 0, i32* [[J]], align 4
2748 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2749 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2750 // CHECK2-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2751 // CHECK2: land.lhs.true:
2752 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2753 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
2754 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2755 // CHECK2: omp.precond.then:
2756 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2757 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2758 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_COMB_UB]], align 4
2759 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2760 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2761 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
2762 // CHECK2-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2763 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
2764 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
2765 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2766 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2767 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
2768 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2769 // CHECK2: cond.true:
2770 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2771 // CHECK2-NEXT: br label [[COND_END:%.*]]
2772 // CHECK2: cond.false:
2773 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2774 // CHECK2-NEXT: br label [[COND_END]]
2775 // CHECK2: cond.end:
2776 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
2777 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2778 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2779 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
2780 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2781 // CHECK2: omp.inner.for.cond:
2782 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2783 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2784 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
2785 // CHECK2-NEXT: [[CMP11:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
2786 // CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2787 // CHECK2: omp.inner.for.body:
2788 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2789 // CHECK2-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
2790 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2791 // CHECK2-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
2792 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4
2793 // CHECK2-NEXT: [[CONV12:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2794 // CHECK2-NEXT: store i32 [[TMP21]], i32* [[CONV12]], align 4
2795 // CHECK2-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
2796 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
2797 // CHECK2-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP18]] to i8*
2798 // CHECK2-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
2799 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
2800 // CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP20]] to i8*
2801 // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
2802 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
2803 // CHECK2-NEXT: [[TMP28:%.*]] = inttoptr i64 [[TMP22]] to i8*
2804 // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
2805 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
2806 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
2807 // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
2808 // CHECK2-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2809 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
2810 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
2811 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i64 4)
2812 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2813 // CHECK2: omp.inner.for.inc:
2814 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2815 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2816 // CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
2817 // CHECK2-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
2818 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2819 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2820 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
2821 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_COMB_LB]], align 4
2822 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2823 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2824 // CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
2825 // CHECK2-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_COMB_UB]], align 4
2826 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2827 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2828 // CHECK2-NEXT: [[CMP16:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
2829 // CHECK2-NEXT: br i1 [[CMP16]], label [[COND_TRUE17:%.*]], label [[COND_FALSE18:%.*]]
2830 // CHECK2: cond.true17:
2831 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2832 // CHECK2-NEXT: br label [[COND_END19:%.*]]
2833 // CHECK2: cond.false18:
2834 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2835 // CHECK2-NEXT: br label [[COND_END19]]
2836 // CHECK2: cond.end19:
2837 // CHECK2-NEXT: [[COND20:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE17]] ], [ [[TMP43]], [[COND_FALSE18]] ]
2838 // CHECK2-NEXT: store i32 [[COND20]], i32* [[DOTOMP_COMB_UB]], align 4
2839 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2840 // CHECK2-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
2841 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2842 // CHECK2: omp.inner.for.end:
2843 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2844 // CHECK2: omp.loop.exit:
2845 // CHECK2-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2846 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
2847 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP46]])
2848 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2849 // CHECK2: omp.precond.end:
2850 // CHECK2-NEXT: ret void
2851 //
2852 //
2853 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__9
2854 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
2855 // CHECK2-NEXT: entry:
2856 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2857 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2858 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2859 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2860 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2861 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 8
2862 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2863 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
2864 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2865 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2866 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2867 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2868 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
2869 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
2870 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2871 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2872 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2873 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2874 // CHECK2-NEXT: [[I10:%.*]] = alloca i32, align 4
2875 // CHECK2-NEXT: [[J11:%.*]] = alloca i32, align 4
2876 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2877 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2878 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2879 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2880 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2881 // CHECK2-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 8
2882 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2883 // CHECK2-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 8
2884 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
2885 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
2886 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
2887 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2888 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2889 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2890 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2891 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2892 // CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
2893 // CHECK2-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2894 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], [[DIV5]]
2895 // CHECK2-NEXT: [[SUB6:%.*]] = sub nsw i32 [[MUL]], 1
2896 // CHECK2-NEXT: store i32 [[SUB6]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2897 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
2898 // CHECK2-NEXT: store i32 0, i32* [[J]], align 4
2899 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2900 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2901 // CHECK2-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2902 // CHECK2: land.lhs.true:
2903 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2904 // CHECK2-NEXT: [[CMP7:%.*]] = icmp slt i32 0, [[TMP6]]
2905 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2906 // CHECK2: omp.precond.then:
2907 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2908 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2909 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4
2910 // CHECK2-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2911 // CHECK2-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP8]] to i32
2912 // CHECK2-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2913 // CHECK2-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP9]] to i32
2914 // CHECK2-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_LB]], align 4
2915 // CHECK2-NEXT: store i32 [[CONV9]], i32* [[DOTOMP_UB]], align 4
2916 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2917 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2918 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2919 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
2920 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2921 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2922 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4
2923 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2924 // CHECK2: omp.inner.for.cond:
2925 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2926 // CHECK2-NEXT: [[CONV12:%.*]] = sext i32 [[TMP13]] to i64
2927 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2928 // CHECK2-NEXT: [[CMP13:%.*]] = icmp ule i64 [[CONV12]], [[TMP14]]
2929 // CHECK2-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2930 // CHECK2: omp.inner.for.body:
2931 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2932 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2933 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP16]], 0
2934 // CHECK2-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
2935 // CHECK2-NEXT: [[MUL16:%.*]] = mul nsw i32 1, [[DIV15]]
2936 // CHECK2-NEXT: [[DIV17:%.*]] = sdiv i32 [[TMP15]], [[MUL16]]
2937 // CHECK2-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1
2938 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL18]]
2939 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I10]], align 4
2940 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2941 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2942 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2943 // CHECK2-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP19]], 0
2944 // CHECK2-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
2945 // CHECK2-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
2946 // CHECK2-NEXT: [[DIV22:%.*]] = sdiv i32 [[TMP18]], [[MUL21]]
2947 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2948 // CHECK2-NEXT: [[SUB23:%.*]] = sub nsw i32 [[TMP20]], 0
2949 // CHECK2-NEXT: [[DIV24:%.*]] = sdiv i32 [[SUB23]], 1
2950 // CHECK2-NEXT: [[MUL25:%.*]] = mul nsw i32 1, [[DIV24]]
2951 // CHECK2-NEXT: [[MUL26:%.*]] = mul nsw i32 [[DIV22]], [[MUL25]]
2952 // CHECK2-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP17]], [[MUL26]]
2953 // CHECK2-NEXT: [[MUL28:%.*]] = mul nsw i32 [[SUB27]], 1
2954 // CHECK2-NEXT: [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
2955 // CHECK2-NEXT: store i32 [[ADD29]], i32* [[J11]], align 4
2956 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[I10]], align 4
2957 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[J11]], align 4
2958 // CHECK2-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2959 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[I10]], align 4
2960 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP23]] to i64
2961 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2962 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[J11]], align 4
2963 // CHECK2-NEXT: [[IDXPROM31:%.*]] = sext i32 [[TMP24]] to i64
2964 // CHECK2-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM31]]
2965 // CHECK2-NEXT: store i32 [[ADD30]], i32* [[ARRAYIDX32]], align 4
2966 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2967 // CHECK2: omp.body.continue:
2968 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2969 // CHECK2: omp.inner.for.inc:
2970 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2971 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2972 // CHECK2-NEXT: [[ADD33:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
2973 // CHECK2-NEXT: store i32 [[ADD33]], i32* [[DOTOMP_IV]], align 4
2974 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
2975 // CHECK2: omp.inner.for.end:
2976 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2977 // CHECK2: omp.loop.exit:
2978 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2979 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
2980 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]])
2981 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
2982 // CHECK2: omp.precond.end:
2983 // CHECK2-NEXT: ret void
2984 //
2985 //
2986 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
2987 // CHECK2-SAME: (i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR0]] {
2988 // CHECK2-NEXT: entry:
2989 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2990 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
2991 // CHECK2-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
2992 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2993 // CHECK2-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
2994 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
2995 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2996 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
2997 // CHECK2-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
2998 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2999 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3000 // CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
3001 // CHECK2-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
3002 // CHECK2-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3003 // CHECK2: user_code.entry:
3004 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
3005 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
3006 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3007 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4
3008 // CHECK2-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
3009 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[V_ADDR]], align 8
3010 // CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3011 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
3012 // CHECK2-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP4]], [1000 x i32]* [[TMP0]], i32* [[TMP5]]) #[[ATTR3]]
3013 // CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
3014 // CHECK2-NEXT: ret void
3015 // CHECK2: worker.exit:
3016 // CHECK2-NEXT: ret void
3017 //
3018 //
3019 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__10
3020 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR1]] {
3021 // CHECK2-NEXT: entry:
3022 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3023 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3024 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3025 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3026 // CHECK2-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
3027 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3028 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3029 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3030 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3031 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
3032 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3033 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3034 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3035 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3036 // CHECK2-NEXT: [[I3:%.*]] = alloca i32, align 4
3037 // CHECK2-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
3038 // CHECK2-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 8
3039 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3040 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3041 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3042 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3043 // CHECK2-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
3044 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3045 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3046 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
3047 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3048 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3049 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3050 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3051 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3052 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3053 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
3054 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3055 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3056 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3057 // CHECK2: omp.precond.then:
3058 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3059 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3060 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
3061 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3062 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3063 // CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3064 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3065 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3066 // CHECK2-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3067 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3068 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3069 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3070 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3071 // CHECK2: cond.true:
3072 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3073 // CHECK2-NEXT: br label [[COND_END:%.*]]
3074 // CHECK2: cond.false:
3075 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3076 // CHECK2-NEXT: br label [[COND_END]]
3077 // CHECK2: cond.end:
3078 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3079 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3080 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3081 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3082 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3083 // CHECK2: omp.inner.for.cond:
3084 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3085 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3086 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
3087 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
3088 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3089 // CHECK2: omp.inner.for.body:
3090 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3091 // CHECK2-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
3092 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3093 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
3094 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 4
3095 // CHECK2-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32*
3096 // CHECK2-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4
3097 // CHECK2-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8
3098 // CHECK2-NEXT: [[TMP20:%.*]] = load i32*, i32** [[V_ADDR]], align 8
3099 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
3100 // CHECK2-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP15]] to i8*
3101 // CHECK2-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 8
3102 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1
3103 // CHECK2-NEXT: [[TMP24:%.*]] = inttoptr i64 [[TMP17]] to i8*
3104 // CHECK2-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 8
3105 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2
3106 // CHECK2-NEXT: [[TMP26:%.*]] = inttoptr i64 [[TMP19]] to i8*
3107 // CHECK2-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 8
3108 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3
3109 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
3110 // CHECK2-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 8
3111 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4
3112 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i32* [[TMP20]] to i8*
3113 // CHECK2-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 8
3114 // CHECK2-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3115 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
3116 // CHECK2-NEXT: [[TMP33:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3117 // CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP33]], i64 5)
3118 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3119 // CHECK2: omp.inner.for.inc:
3120 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3121 // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3122 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
3123 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
3124 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3125 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3126 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
3127 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
3128 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3129 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3130 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP38]], [[TMP39]]
3131 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
3132 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3133 // CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3134 // CHECK2-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP40]], [[TMP41]]
3135 // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
3136 // CHECK2: cond.true11:
3137 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3138 // CHECK2-NEXT: br label [[COND_END13:%.*]]
3139 // CHECK2: cond.false12:
3140 // CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3141 // CHECK2-NEXT: br label [[COND_END13]]
3142 // CHECK2: cond.end13:
3143 // CHECK2-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP42]], [[COND_TRUE11]] ], [ [[TMP43]], [[COND_FALSE12]] ]
3144 // CHECK2-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
3145 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3146 // CHECK2-NEXT: store i32 [[TMP44]], i32* [[DOTOMP_IV]], align 4
3147 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
3148 // CHECK2: omp.inner.for.end:
3149 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3150 // CHECK2: omp.loop.exit:
3151 // CHECK2-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3152 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
3153 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP46]])
3154 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
3155 // CHECK2: omp.precond.end:
3156 // CHECK2-NEXT: ret void
3157 //
3158 //
3159 // CHECK2-LABEL: define {{[^@]+}}@__omp_outlined__11
3160 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR1]] {
3161 // CHECK2-NEXT: entry:
3162 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3163 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3164 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3165 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3166 // CHECK2-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
3167 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 8
3168 // CHECK2-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 8
3169 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3170 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
3171 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3172 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3173 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
3174 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3175 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3176 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3177 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3178 // CHECK2-NEXT: [[I5:%.*]] = alloca i32, align 4
3179 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3180 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3181 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3182 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3183 // CHECK2-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
3184 // CHECK2-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 8
3185 // CHECK2-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 8
3186 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
3187 // CHECK2-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 8
3188 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
3189 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3190 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3191 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3192 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3193 // CHECK2-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3194 // CHECK2-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3195 // CHECK2-NEXT: store i32 0, i32* [[I]], align 4
3196 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3197 // CHECK2-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3198 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3199 // CHECK2: omp.precond.then:
3200 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3201 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3202 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3203 // CHECK2-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3204 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP5]] to i32
3205 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3206 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP6]] to i32
3207 // CHECK2-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_LB]], align 4
3208 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
3209 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3210 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3211 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3212 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3213 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3214 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3215 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3216 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3217 // CHECK2: omp.inner.for.cond:
3218 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3219 // CHECK2-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64
3220 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3221 // CHECK2-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]]
3222 // CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3223 // CHECK2: omp.inner.for.body:
3224 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3225 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3226 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3227 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I5]], align 4
3228 // CHECK2-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 8
3229 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[I5]], align 4
3230 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
3231 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i64 [[IDXPROM]]
3232 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3233 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[I5]], align 4
3234 // CHECK2-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64
3235 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM8]]
3236 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX9]], align 4
3237 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3238 // CHECK2: omp.body.continue:
3239 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3240 // CHECK2: omp.inner.for.inc:
3241 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3242 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3243 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3244 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
3245 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
3246 // CHECK2: omp.inner.for.end:
3247 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3248 // CHECK2: omp.loop.exit:
3249 // CHECK2-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3250 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
3251 // CHECK2-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]])
3252 // CHECK2-NEXT: br label [[OMP_PRECOND_END]]
3253 // CHECK2: omp.precond.end:
3254 // CHECK2-NEXT: ret void
3255 //
3256 //
3257 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l28
3258 // CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[L:%.*]]) #[[ATTR0:[0-9]+]] {
3259 // CHECK3-NEXT: entry:
3260 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3261 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
3262 // CHECK3-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
3263 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3264 // CHECK3-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
3265 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3266 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3267 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3268 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
3269 // CHECK3-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
3270 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
3271 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false, i1 false)
3272 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
3273 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3274 // CHECK3: user_code.entry:
3275 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4:[0-9]+]])
3276 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
3277 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
3278 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
3279 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[L_ADDR]], align 4
3280 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[L_CASTED]], align 4
3281 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[L_CASTED]], align 4
3282 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3283 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
3284 // CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [1000 x i32]* [[TMP0]], i32 [[TMP6]]) #[[ATTR3:[0-9]+]]
3285 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
3286 // CHECK3-NEXT: ret void
3287 // CHECK3: worker.exit:
3288 // CHECK3-NEXT: ret void
3289 //
3290 //
3291 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__
3292 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[L:%.*]]) #[[ATTR1:[0-9]+]] {
3293 // CHECK3-NEXT: entry:
3294 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3295 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3296 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3297 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
3298 // CHECK3-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
3299 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3300 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3301 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3302 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3303 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3304 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3305 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3306 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3307 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3308 // CHECK3-NEXT: [[I4:%.*]] = alloca i32, align 4
3309 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3310 // CHECK3-NEXT: [[L_CASTED:%.*]] = alloca i32, align 4
3311 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
3312 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3313 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3314 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3315 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
3316 // CHECK3-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
3317 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
3318 // CHECK3-NEXT: [[L1:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 4)
3319 // CHECK3-NEXT: [[L_ON_STACK:%.*]] = bitcast i8* [[L1]] to i32*
3320 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3321 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3322 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3323 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3324 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3325 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
3326 // CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3327 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
3328 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3329 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3330 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3331 // CHECK3: omp.precond.then:
3332 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3333 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3334 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
3335 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3336 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3337 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3338 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3339 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 128)
3340 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3341 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3342 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3343 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3344 // CHECK3: cond.true:
3345 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3346 // CHECK3-NEXT: br label [[COND_END:%.*]]
3347 // CHECK3: cond.false:
3348 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3349 // CHECK3-NEXT: br label [[COND_END]]
3350 // CHECK3: cond.end:
3351 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3352 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3353 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3354 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3355 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3356 // CHECK3: omp.inner.for.cond:
3357 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3358 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3359 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
3360 // CHECK3-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
3361 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3362 // CHECK3: omp.inner.for.body:
3363 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3364 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3365 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
3366 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
3367 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
3368 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[L_ADDR]], align 4
3369 // CHECK3-NEXT: store i32 [[TMP18]], i32* [[L_CASTED]], align 4
3370 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[L_CASTED]], align 4
3371 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
3372 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP14]] to i8*
3373 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
3374 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
3375 // CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP15]] to i8*
3376 // CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
3377 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
3378 // CHECK3-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8*
3379 // CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
3380 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
3381 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
3382 // CHECK3-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4
3383 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
3384 // CHECK3-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP19]] to i8*
3385 // CHECK3-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4
3386 // CHECK3-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3387 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
3388 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3389 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP32]], i32 5)
3390 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3391 // CHECK3: omp.inner.for.inc:
3392 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3393 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3394 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
3395 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
3396 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3397 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3398 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]]
3399 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
3400 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3401 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3402 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP37]], [[TMP38]]
3403 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
3404 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3405 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3406 // CHECK3-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP39]], [[TMP40]]
3407 // CHECK3-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
3408 // CHECK3: cond.true11:
3409 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3410 // CHECK3-NEXT: br label [[COND_END13:%.*]]
3411 // CHECK3: cond.false12:
3412 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3413 // CHECK3-NEXT: br label [[COND_END13]]
3414 // CHECK3: cond.end13:
3415 // CHECK3-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP41]], [[COND_TRUE11]] ], [ [[TMP42]], [[COND_FALSE12]] ]
3416 // CHECK3-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
3417 // CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3418 // CHECK3-NEXT: store i32 [[TMP43]], i32* [[DOTOMP_IV]], align 4
3419 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3420 // CHECK3: omp.inner.for.end:
3421 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3422 // CHECK3: omp.loop.exit:
3423 // CHECK3-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3424 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4
3425 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP45]])
3426 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3427 // CHECK3-NEXT: [[TMP47:%.*]] = icmp ne i32 [[TMP46]], 0
3428 // CHECK3-NEXT: br i1 [[TMP47]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3429 // CHECK3: .omp.lastprivate.then:
3430 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[L_ADDR]], align 4
3431 // CHECK3-NEXT: store i32 [[TMP48]], i32* [[L_ADDR]], align 4
3432 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3433 // CHECK3: .omp.lastprivate.done:
3434 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3435 // CHECK3: omp.precond.end:
3436 // CHECK3-NEXT: call void @__kmpc_free_shared(i8* [[L1]], i32 4)
3437 // CHECK3-NEXT: ret void
3438 //
3439 //
3440 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__1
3441 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[L:%.*]]) #[[ATTR1]] {
3442 // CHECK3-NEXT: entry:
3443 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3444 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3445 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3446 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3447 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3448 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
3449 // CHECK3-NEXT: [[L_ADDR:%.*]] = alloca i32, align 4
3450 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3451 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3452 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3453 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3454 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3455 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3456 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3457 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3458 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3459 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
3460 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3461 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3462 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3463 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3464 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3465 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
3466 // CHECK3-NEXT: store i32 [[L]], i32* [[L_ADDR]], align 4
3467 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
3468 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3469 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3470 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3471 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3472 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3473 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3474 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3475 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
3476 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3477 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3478 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3479 // CHECK3: omp.precond.then:
3480 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3481 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3482 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3483 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3484 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3485 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
3486 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3487 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3488 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3489 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3490 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3491 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 32)
3492 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3493 // CHECK3: omp.dispatch.cond:
3494 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3495 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3496 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3497 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3498 // CHECK3: cond.true:
3499 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3500 // CHECK3-NEXT: br label [[COND_END:%.*]]
3501 // CHECK3: cond.false:
3502 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3503 // CHECK3-NEXT: br label [[COND_END]]
3504 // CHECK3: cond.end:
3505 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3506 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3507 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3508 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
3509 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3510 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3511 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3512 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3513 // CHECK3: omp.dispatch.body:
3514 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3515 // CHECK3: omp.inner.for.cond:
3516 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3517 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3518 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
3519 // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3520 // CHECK3: omp.inner.for.body:
3521 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3522 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
3523 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3524 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
3525 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
3526 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]]
3527 // CHECK3-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4
3528 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4
3529 // CHECK3-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4
3530 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3531 // CHECK3: omp.body.continue:
3532 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3533 // CHECK3: omp.inner.for.inc:
3534 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3535 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
3536 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
3537 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3538 // CHECK3: omp.inner.for.end:
3539 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3540 // CHECK3: omp.dispatch.inc:
3541 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3542 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3543 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
3544 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
3545 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3546 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3547 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
3548 // CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
3549 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
3550 // CHECK3: omp.dispatch.end:
3551 // CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3552 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
3553 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP27]])
3554 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3555 // CHECK3-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3556 // CHECK3-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3557 // CHECK3: .omp.lastprivate.then:
3558 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[L_ADDR]], align 4
3559 // CHECK3-NEXT: store i32 [[TMP30]], i32* [[L_ADDR]], align 4
3560 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
3561 // CHECK3: .omp.lastprivate.done:
3562 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3563 // CHECK3: omp.precond.end:
3564 // CHECK3-NEXT: ret void
3565 //
3566 //
3567 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l34
3568 // CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR6:[0-9]+]] {
3569 // CHECK3-NEXT: entry:
3570 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3571 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
3572 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3573 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3574 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3575 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3576 // CHECK3-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
3577 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
3578 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
3579 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
3580 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3581 // CHECK3: user_code.entry:
3582 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
3583 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
3584 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
3585 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
3586 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3587 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
3588 // CHECK3-NEXT: call void @__omp_outlined__2(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [1000 x i16]* [[TMP0]]) #[[ATTR3]]
3589 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
3590 // CHECK3-NEXT: ret void
3591 // CHECK3: worker.exit:
3592 // CHECK3-NEXT: ret void
3593 //
3594 //
3595 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__2
3596 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
3597 // CHECK3-NEXT: entry:
3598 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3599 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3600 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3601 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
3602 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3603 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3604 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3605 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3606 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3607 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3608 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3609 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3610 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3611 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
3612 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3613 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
3614 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3615 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3616 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3617 // CHECK3-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
3618 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
3619 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3620 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3621 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3622 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3623 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3624 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3625 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3626 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
3627 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3628 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3629 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3630 // CHECK3: omp.precond.then:
3631 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3632 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3633 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
3634 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3635 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3636 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3637 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3638 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3639 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3640 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3641 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3642 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3643 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3644 // CHECK3: cond.true:
3645 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3646 // CHECK3-NEXT: br label [[COND_END:%.*]]
3647 // CHECK3: cond.false:
3648 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3649 // CHECK3-NEXT: br label [[COND_END]]
3650 // CHECK3: cond.end:
3651 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3652 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3653 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3654 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
3655 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3656 // CHECK3: omp.inner.for.cond:
3657 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3658 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3659 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
3660 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
3661 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3662 // CHECK3: omp.inner.for.body:
3663 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3664 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3665 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
3666 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
3667 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
3668 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
3669 // CHECK3-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8*
3670 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4
3671 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
3672 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8*
3673 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4
3674 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
3675 // CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8*
3676 // CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4
3677 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
3678 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8*
3679 // CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4
3680 // CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3681 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4
3682 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3683 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4)
3684 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3685 // CHECK3: omp.inner.for.inc:
3686 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3687 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3688 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]]
3689 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
3690 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3691 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3692 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]]
3693 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
3694 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3695 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3696 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]]
3697 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
3698 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3699 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3700 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]]
3701 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
3702 // CHECK3: cond.true10:
3703 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3704 // CHECK3-NEXT: br label [[COND_END12:%.*]]
3705 // CHECK3: cond.false11:
3706 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3707 // CHECK3-NEXT: br label [[COND_END12]]
3708 // CHECK3: cond.end12:
3709 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ]
3710 // CHECK3-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
3711 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3712 // CHECK3-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4
3713 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3714 // CHECK3: omp.inner.for.end:
3715 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3716 // CHECK3: omp.loop.exit:
3717 // CHECK3-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3718 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[TMP40]], align 4
3719 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP41]])
3720 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3721 // CHECK3: omp.precond.end:
3722 // CHECK3-NEXT: ret void
3723 //
3724 //
3725 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__3
3726 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i16]* noundef nonnull align 2 dereferenceable(2000) [[AA:%.*]]) #[[ATTR1]] {
3727 // CHECK3-NEXT: entry:
3728 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3729 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3730 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3731 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3732 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3733 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca [1000 x i16]*, align 4
3734 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3735 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3736 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3737 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3738 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3739 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3740 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3741 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3742 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3743 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
3744 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3745 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3746 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3747 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3748 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3749 // CHECK3-NEXT: store [1000 x i16]* [[AA]], [1000 x i16]** [[AA_ADDR]], align 4
3750 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i16]*, [1000 x i16]** [[AA_ADDR]], align 4
3751 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
3752 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
3753 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3754 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3755 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3756 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3757 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
3758 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
3759 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3760 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3761 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3762 // CHECK3: omp.precond.then:
3763 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3764 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
3765 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
3766 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3767 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3768 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
3769 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
3770 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3771 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3772 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3773 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
3774 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3775 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3776 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3777 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3778 // CHECK3: omp.inner.for.cond:
3779 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3780 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3781 // CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
3782 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3783 // CHECK3: omp.inner.for.body:
3784 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3785 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
3786 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3787 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
3788 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4
3789 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]]
3790 // CHECK3-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2
3791 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32
3792 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1
3793 // CHECK3-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16
3794 // CHECK3-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2
3795 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3796 // CHECK3: omp.body.continue:
3797 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3798 // CHECK3: omp.inner.for.inc:
3799 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3800 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3801 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3802 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
3803 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3804 // CHECK3: omp.inner.for.end:
3805 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3806 // CHECK3: omp.loop.exit:
3807 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3808 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
3809 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP18]])
3810 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
3811 // CHECK3: omp.precond.end:
3812 // CHECK3-NEXT: ret void
3813 //
3814 //
3815 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l39
3816 // CHECK3-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR0]] {
3817 // CHECK3-NEXT: entry:
3818 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
3819 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
3820 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
3821 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
3822 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
3823 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
3824 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
3825 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
3826 // CHECK3: user_code.entry:
3827 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
3828 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
3829 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
3830 // CHECK3-NEXT: call void @__omp_outlined__4(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x i32]* [[TMP0]]) #[[ATTR3]]
3831 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
3832 // CHECK3-NEXT: ret void
3833 // CHECK3: worker.exit:
3834 // CHECK3-NEXT: ret void
3835 //
3836 //
3837 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__4
3838 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
3839 // CHECK3-NEXT: entry:
3840 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3841 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3842 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
3843 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3844 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3845 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3846 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3847 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3848 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3849 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3850 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4
3851 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3852 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3853 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
3854 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
3855 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3856 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
3857 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3858 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3859 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
3860 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3861 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3862 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
3863 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3864 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3865 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3866 // CHECK3: cond.true:
3867 // CHECK3-NEXT: br label [[COND_END:%.*]]
3868 // CHECK3: cond.false:
3869 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3870 // CHECK3-NEXT: br label [[COND_END]]
3871 // CHECK3: cond.end:
3872 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3873 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3874 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3875 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3876 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3877 // CHECK3: omp.inner.for.cond:
3878 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3879 // CHECK3-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10
3880 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3881 // CHECK3: omp.inner.for.body:
3882 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3883 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3884 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
3885 // CHECK3-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8*
3886 // CHECK3-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4
3887 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
3888 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8*
3889 // CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
3890 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
3891 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8*
3892 // CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
3893 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
3894 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3)
3895 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3896 // CHECK3: omp.inner.for.inc:
3897 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3898 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3899 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
3900 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3901 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3902 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3903 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
3904 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4
3905 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3906 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3907 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
3908 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4
3909 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3910 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9
3911 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
3912 // CHECK3: cond.true5:
3913 // CHECK3-NEXT: br label [[COND_END7:%.*]]
3914 // CHECK3: cond.false6:
3915 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3916 // CHECK3-NEXT: br label [[COND_END7]]
3917 // CHECK3: cond.end7:
3918 // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ]
3919 // CHECK3-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4
3920 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3921 // CHECK3-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4
3922 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3923 // CHECK3: omp.inner.for.end:
3924 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3925 // CHECK3: omp.loop.exit:
3926 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
3927 // CHECK3-NEXT: ret void
3928 //
3929 //
3930 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__5
3931 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[B:%.*]]) #[[ATTR1]] {
3932 // CHECK3-NEXT: entry:
3933 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3934 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3935 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3936 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3937 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca [10 x i32]*, align 4
3938 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3939 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3940 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3941 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3942 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3943 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3944 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3945 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3946 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3947 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3948 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3949 // CHECK3-NEXT: store [10 x i32]* [[B]], [10 x i32]** [[B_ADDR]], align 4
3950 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align 4
3951 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3952 // CHECK3-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
3953 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3954 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3955 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3956 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3957 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3958 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3959 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3960 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3961 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3962 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3963 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3964 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3965 // CHECK3: omp.inner.for.cond:
3966 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3967 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3968 // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
3969 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3970 // CHECK3: omp.inner.for.body:
3971 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3972 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3973 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3974 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3975 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
3976 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]]
3977 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3978 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1
3979 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4
3980 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3981 // CHECK3: omp.body.continue:
3982 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3983 // CHECK3: omp.inner.for.inc:
3984 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3985 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3986 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3987 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3988 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
3989 // CHECK3: omp.inner.for.end:
3990 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3991 // CHECK3: omp.loop.exit:
3992 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
3993 // CHECK3-NEXT: ret void
3994 //
3995 //
3996 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l44
3997 // CHECK3-SAME: ([10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR0]] {
3998 // CHECK3-NEXT: entry:
3999 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
4000 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
4001 // CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
4002 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4003 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4004 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
4005 // CHECK3-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
4006 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
4007 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
4008 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
4009 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4010 // CHECK3: user_code.entry:
4011 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
4012 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[F_ADDR]], align 4
4013 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[F_CASTED]], align 4
4014 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[F_CASTED]], align 4
4015 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
4016 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
4017 // CHECK3-NEXT: call void @__omp_outlined__6(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], [10 x [10 x i32]]* [[TMP0]], i32 [[TMP4]]) #[[ATTR3]]
4018 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
4019 // CHECK3-NEXT: ret void
4020 // CHECK3: worker.exit:
4021 // CHECK3-NEXT: ret void
4022 //
4023 //
4024 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__6
4025 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR1]] {
4026 // CHECK3-NEXT: entry:
4027 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4028 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4029 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
4030 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
4031 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4032 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4033 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4034 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4035 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4036 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4037 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4038 // CHECK3-NEXT: [[K:%.*]] = alloca i32, align 4
4039 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4040 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
4041 // CHECK3-NEXT: [[F_CASTED:%.*]] = alloca i32, align 4
4042 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
4043 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4044 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4045 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
4046 // CHECK3-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
4047 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
4048 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4049 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4050 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4051 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4052 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4053 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4054 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4055 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4056 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4057 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
4058 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4059 // CHECK3: cond.true:
4060 // CHECK3-NEXT: br label [[COND_END:%.*]]
4061 // CHECK3: cond.false:
4062 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4063 // CHECK3-NEXT: br label [[COND_END]]
4064 // CHECK3: cond.end:
4065 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4066 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4067 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4068 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4069 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4070 // CHECK3: omp.inner.for.cond:
4071 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4072 // CHECK3-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100
4073 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4074 // CHECK3: omp.inner.for.body:
4075 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4076 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4077 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4
4078 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4
4079 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4
4080 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
4081 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8*
4082 // CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4
4083 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
4084 // CHECK3-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8*
4085 // CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4
4086 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
4087 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
4088 // CHECK3-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4
4089 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
4090 // CHECK3-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8*
4091 // CHECK3-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4
4092 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
4093 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4)
4094 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4095 // CHECK3: omp.inner.for.inc:
4096 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4097 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4098 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
4099 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4100 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4101 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4102 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
4103 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4
4104 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4105 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4106 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
4107 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4
4108 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4109 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99
4110 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
4111 // CHECK3: cond.true6:
4112 // CHECK3-NEXT: br label [[COND_END8:%.*]]
4113 // CHECK3: cond.false7:
4114 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4115 // CHECK3-NEXT: br label [[COND_END8]]
4116 // CHECK3: cond.end8:
4117 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ]
4118 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4
4119 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4120 // CHECK3-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4
4121 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4122 // CHECK3: omp.inner.for.end:
4123 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4124 // CHECK3: omp.loop.exit:
4125 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
4126 // CHECK3-NEXT: ret void
4127 //
4128 //
4129 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__7
4130 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]], i32 noundef [[F:%.*]]) #[[ATTR1]] {
4131 // CHECK3-NEXT: entry:
4132 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4133 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4134 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4135 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4136 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
4137 // CHECK3-NEXT: [[F_ADDR:%.*]] = alloca i32, align 4
4138 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4139 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4140 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4141 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4142 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4143 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4144 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4145 // CHECK3-NEXT: [[K:%.*]] = alloca i32, align 4
4146 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4147 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
4148 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4149 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4150 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4151 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4152 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
4153 // CHECK3-NEXT: store i32 [[F]], i32* [[F_ADDR]], align 4
4154 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
4155 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4156 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4157 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4158 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4159 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4160 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4161 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4162 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4163 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4164 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4165 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4166 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4167 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4168 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4169 // CHECK3: omp.inner.for.cond:
4170 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4171 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4172 // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]]
4173 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4174 // CHECK3: omp.inner.for.body:
4175 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4176 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10
4177 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
4178 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4179 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4180 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4181 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4182 // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10
4183 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10
4184 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]]
4185 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
4186 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
4187 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[J]], align 4
4188 // CHECK3-NEXT: store i32 10, i32* [[K]], align 4
4189 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4190 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4
4191 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4
4192 // CHECK3-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]]
4193 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]]
4194 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4
4195 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]]
4196 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
4197 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]]
4198 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4
4199 // CHECK3-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]]
4200 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4
4201 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4202 // CHECK3: omp.body.continue:
4203 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4204 // CHECK3: omp.inner.for.inc:
4205 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4206 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4207 // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4208 // CHECK3-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
4209 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4210 // CHECK3: omp.inner.for.end:
4211 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4212 // CHECK3: omp.loop.exit:
4213 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]])
4214 // CHECK3-NEXT: ret void
4215 //
4216 //
4217 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l52
4218 // CHECK3-SAME: (i32 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR0]] {
4219 // CHECK3-NEXT: entry:
4220 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4221 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
4222 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4223 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4224 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4225 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4226 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
4227 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
4228 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
4229 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
4230 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4231 // CHECK3: user_code.entry:
4232 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
4233 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
4234 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
4235 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
4236 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
4237 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
4238 // CHECK3-NEXT: call void @__omp_outlined__8(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [10 x [10 x i32]]* [[TMP0]]) #[[ATTR3]]
4239 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
4240 // CHECK3-NEXT: ret void
4241 // CHECK3: worker.exit:
4242 // CHECK3-NEXT: ret void
4243 //
4244 //
4245 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__8
4246 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
4247 // CHECK3-NEXT: entry:
4248 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4249 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4250 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4251 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
4252 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
4253 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4254 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4255 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4256 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4257 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
4258 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4259 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
4260 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
4261 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
4262 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
4263 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4264 // CHECK3-NEXT: [[I9:%.*]] = alloca i32, align 4
4265 // CHECK3-NEXT: [[J10:%.*]] = alloca i32, align 4
4266 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4267 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [4 x i8*], align 4
4268 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4269 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4270 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4271 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
4272 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
4273 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4274 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4275 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4276 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4277 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4278 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4279 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4280 // CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
4281 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4282 // CHECK3-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
4283 // CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
4284 // CHECK3-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
4285 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
4286 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
4287 // CHECK3-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
4288 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
4289 // CHECK3-NEXT: store i32 0, i32* [[J]], align 4
4290 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4291 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4292 // CHECK3-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
4293 // CHECK3: land.lhs.true:
4294 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4295 // CHECK3-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
4296 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
4297 // CHECK3: omp.precond.then:
4298 // CHECK3-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
4299 // CHECK3-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4300 // CHECK3-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_COMB_UB]], align 8
4301 // CHECK3-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
4302 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4303 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4304 // CHECK3-NEXT: [[CONV11:%.*]] = zext i32 [[NVPTX_NUM_THREADS]] to i64
4305 // CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4306 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
4307 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_8(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 [[CONV11]])
4308 // CHECK3-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
4309 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4310 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sgt i64 [[TMP10]], [[TMP11]]
4311 // CHECK3-NEXT: br i1 [[CMP12]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4312 // CHECK3: cond.true:
4313 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4314 // CHECK3-NEXT: br label [[COND_END:%.*]]
4315 // CHECK3: cond.false:
4316 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
4317 // CHECK3-NEXT: br label [[COND_END]]
4318 // CHECK3: cond.end:
4319 // CHECK3-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
4320 // CHECK3-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
4321 // CHECK3-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
4322 // CHECK3-NEXT: store i64 [[TMP14]], i64* [[DOTOMP_IV]], align 8
4323 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4324 // CHECK3: omp.inner.for.cond:
4325 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
4326 // CHECK3-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4327 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP16]], 1
4328 // CHECK3-NEXT: [[CMP13:%.*]] = icmp slt i64 [[TMP15]], [[ADD]]
4329 // CHECK3-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4330 // CHECK3: omp.inner.for.body:
4331 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
4332 // CHECK3-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i32
4333 // CHECK3-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
4334 // CHECK3-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
4335 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[N_ADDR]], align 4
4336 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[N_CASTED]], align 4
4337 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[N_CASTED]], align 4
4338 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
4339 // CHECK3-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP18]] to i8*
4340 // CHECK3-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
4341 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
4342 // CHECK3-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP20]] to i8*
4343 // CHECK3-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
4344 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
4345 // CHECK3-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP22]] to i8*
4346 // CHECK3-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
4347 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
4348 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8*
4349 // CHECK3-NEXT: store i8* [[TMP30]], i8** [[TMP29]], align 4
4350 // CHECK3-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4351 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
4352 // CHECK3-NEXT: [[TMP33:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
4353 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP32]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [10 x [10 x i32]]*)* @__omp_outlined__9 to i8*), i8* null, i8** [[TMP33]], i32 4)
4354 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4355 // CHECK3: omp.inner.for.inc:
4356 // CHECK3-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
4357 // CHECK3-NEXT: [[TMP35:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
4358 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP34]], [[TMP35]]
4359 // CHECK3-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
4360 // CHECK3-NEXT: [[TMP36:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
4361 // CHECK3-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
4362 // CHECK3-NEXT: [[ADD15:%.*]] = add nsw i64 [[TMP36]], [[TMP37]]
4363 // CHECK3-NEXT: store i64 [[ADD15]], i64* [[DOTOMP_COMB_LB]], align 8
4364 // CHECK3-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
4365 // CHECK3-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
4366 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i64 [[TMP38]], [[TMP39]]
4367 // CHECK3-NEXT: store i64 [[ADD16]], i64* [[DOTOMP_COMB_UB]], align 8
4368 // CHECK3-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
4369 // CHECK3-NEXT: [[TMP41:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4370 // CHECK3-NEXT: [[CMP17:%.*]] = icmp sgt i64 [[TMP40]], [[TMP41]]
4371 // CHECK3-NEXT: br i1 [[CMP17]], label [[COND_TRUE18:%.*]], label [[COND_FALSE19:%.*]]
4372 // CHECK3: cond.true18:
4373 // CHECK3-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4374 // CHECK3-NEXT: br label [[COND_END20:%.*]]
4375 // CHECK3: cond.false19:
4376 // CHECK3-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
4377 // CHECK3-NEXT: br label [[COND_END20]]
4378 // CHECK3: cond.end20:
4379 // CHECK3-NEXT: [[COND21:%.*]] = phi i64 [ [[TMP42]], [[COND_TRUE18]] ], [ [[TMP43]], [[COND_FALSE19]] ]
4380 // CHECK3-NEXT: store i64 [[COND21]], i64* [[DOTOMP_COMB_UB]], align 8
4381 // CHECK3-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
4382 // CHECK3-NEXT: store i64 [[TMP44]], i64* [[DOTOMP_IV]], align 8
4383 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4384 // CHECK3: omp.inner.for.end:
4385 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4386 // CHECK3: omp.loop.exit:
4387 // CHECK3-NEXT: [[TMP45:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4388 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[TMP45]], align 4
4389 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP46]])
4390 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
4391 // CHECK3: omp.precond.end:
4392 // CHECK3-NEXT: ret void
4393 //
4394 //
4395 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__9
4396 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [10 x [10 x i32]]* noundef nonnull align 4 dereferenceable(400) [[C:%.*]]) #[[ATTR1]] {
4397 // CHECK3-NEXT: entry:
4398 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4399 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4400 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4401 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4402 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4403 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca [10 x [10 x i32]]*, align 4
4404 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
4405 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4406 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4407 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4408 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4409 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
4410 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4411 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
4412 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
4413 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
4414 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
4415 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4416 // CHECK3-NEXT: [[I11:%.*]] = alloca i32, align 4
4417 // CHECK3-NEXT: [[J12:%.*]] = alloca i32, align 4
4418 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4419 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4420 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4421 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4422 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4423 // CHECK3-NEXT: store [10 x [10 x i32]]* [[C]], [10 x [10 x i32]]** [[C_ADDR]], align 4
4424 // CHECK3-NEXT: [[TMP0:%.*]] = load [10 x [10 x i32]]*, [10 x [10 x i32]]** [[C_ADDR]], align 4
4425 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4426 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4427 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[N_ADDR]], align 4
4428 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4429 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4430 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4431 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4432 // CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
4433 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4434 // CHECK3-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP4]], 0
4435 // CHECK3-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
4436 // CHECK3-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
4437 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
4438 // CHECK3-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
4439 // CHECK3-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
4440 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
4441 // CHECK3-NEXT: store i32 0, i32* [[J]], align 4
4442 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4443 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4444 // CHECK3-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
4445 // CHECK3: land.lhs.true:
4446 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4447 // CHECK3-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP6]]
4448 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
4449 // CHECK3: omp.precond.then:
4450 // CHECK3-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
4451 // CHECK3-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4452 // CHECK3-NEXT: store i64 [[TMP7]], i64* [[DOTOMP_UB]], align 8
4453 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4454 // CHECK3-NEXT: [[CONV9:%.*]] = zext i32 [[TMP8]] to i64
4455 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4456 // CHECK3-NEXT: [[CONV10:%.*]] = zext i32 [[TMP9]] to i64
4457 // CHECK3-NEXT: store i64 [[CONV9]], i64* [[DOTOMP_LB]], align 8
4458 // CHECK3-NEXT: store i64 [[CONV10]], i64* [[DOTOMP_UB]], align 8
4459 // CHECK3-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
4460 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4461 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4462 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
4463 // CHECK3-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB3]], i32 [[TMP11]], i32 33, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
4464 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
4465 // CHECK3-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_IV]], align 8
4466 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4467 // CHECK3: omp.inner.for.cond:
4468 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
4469 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4470 // CHECK3-NEXT: [[CONV13:%.*]] = zext i32 [[TMP14]] to i64
4471 // CHECK3-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP13]], [[CONV13]]
4472 // CHECK3-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4473 // CHECK3: omp.inner.for.body:
4474 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
4475 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4476 // CHECK3-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP16]], 0
4477 // CHECK3-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
4478 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
4479 // CHECK3-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
4480 // CHECK3-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP15]], [[CONV18]]
4481 // CHECK3-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
4482 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
4483 // CHECK3-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
4484 // CHECK3-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
4485 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
4486 // CHECK3-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
4487 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4488 // CHECK3-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP19]], 0
4489 // CHECK3-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
4490 // CHECK3-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
4491 // CHECK3-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
4492 // CHECK3-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP18]], [[CONV25]]
4493 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4494 // CHECK3-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 0
4495 // CHECK3-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
4496 // CHECK3-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
4497 // CHECK3-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
4498 // CHECK3-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
4499 // CHECK3-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP17]], [[MUL31]]
4500 // CHECK3-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
4501 // CHECK3-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
4502 // CHECK3-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
4503 // CHECK3-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
4504 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[I11]], align 4
4505 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[J12]], align 4
4506 // CHECK3-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
4507 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[I11]], align 4
4508 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP23]]
4509 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[J12]], align 4
4510 // CHECK3-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP24]]
4511 // CHECK3-NEXT: store i32 [[ADD36]], i32* [[ARRAYIDX37]], align 4
4512 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4513 // CHECK3: omp.body.continue:
4514 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4515 // CHECK3: omp.inner.for.inc:
4516 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
4517 // CHECK3-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
4518 // CHECK3-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
4519 // CHECK3-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
4520 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4521 // CHECK3: omp.inner.for.end:
4522 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4523 // CHECK3: omp.loop.exit:
4524 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4525 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
4526 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP28]])
4527 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
4528 // CHECK3: omp.precond.end:
4529 // CHECK3-NEXT: ret void
4530 //
4531 //
4532 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_i_l59
4533 // CHECK3-SAME: (i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR0]] {
4534 // CHECK3-NEXT: entry:
4535 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4536 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4537 // CHECK3-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
4538 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4539 // CHECK3-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
4540 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
4541 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4542 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4543 // CHECK3-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
4544 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4545 // CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
4546 // CHECK3-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
4547 // CHECK3-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
4548 // CHECK3: user_code.entry:
4549 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB4]])
4550 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
4551 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
4552 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
4553 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[V_ADDR]], align 4
4554 // CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
4555 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
4556 // CHECK3-NEXT: call void @__omp_outlined__10(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP4]], [1000 x i32]* [[TMP0]], i32* [[TMP5]]) #[[ATTR3]]
4557 // CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
4558 // CHECK3-NEXT: ret void
4559 // CHECK3: worker.exit:
4560 // CHECK3-NEXT: ret void
4561 //
4562 //
4563 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__10
4564 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR1]] {
4565 // CHECK3-NEXT: entry:
4566 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4567 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4568 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4569 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4570 // CHECK3-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
4571 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4572 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4573 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4574 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4575 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4576 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4577 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4578 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4579 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4580 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
4581 // CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
4582 // CHECK3-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [5 x i8*], align 4
4583 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4584 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4585 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4586 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4587 // CHECK3-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
4588 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4589 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4590 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4591 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4592 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4593 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4594 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4595 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4596 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
4597 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4598 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4599 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4600 // CHECK3: omp.precond.then:
4601 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4602 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4603 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_COMB_UB]], align 4
4604 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4605 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4606 // CHECK3-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
4607 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4608 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4609 // CHECK3-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP6]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]])
4610 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4611 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4612 // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
4613 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4614 // CHECK3: cond.true:
4615 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4616 // CHECK3-NEXT: br label [[COND_END:%.*]]
4617 // CHECK3: cond.false:
4618 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4619 // CHECK3-NEXT: br label [[COND_END]]
4620 // CHECK3: cond.end:
4621 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
4622 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4623 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4624 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4
4625 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4626 // CHECK3: omp.inner.for.cond:
4627 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4628 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4629 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1
4630 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]]
4631 // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4632 // CHECK3: omp.inner.for.body:
4633 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4634 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4635 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4
4636 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4
4637 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4
4638 // CHECK3-NEXT: [[TMP18:%.*]] = load i32*, i32** [[V_ADDR]], align 4
4639 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
4640 // CHECK3-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP14]] to i8*
4641 // CHECK3-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 4
4642 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1
4643 // CHECK3-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP15]] to i8*
4644 // CHECK3-NEXT: store i8* [[TMP22]], i8** [[TMP21]], align 4
4645 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2
4646 // CHECK3-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP17]] to i8*
4647 // CHECK3-NEXT: store i8* [[TMP24]], i8** [[TMP23]], align 4
4648 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3
4649 // CHECK3-NEXT: [[TMP26:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8*
4650 // CHECK3-NEXT: store i8* [[TMP26]], i8** [[TMP25]], align 4
4651 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4
4652 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i32* [[TMP18]] to i8*
4653 // CHECK3-NEXT: store i8* [[TMP28]], i8** [[TMP27]], align 4
4654 // CHECK3-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4655 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
4656 // CHECK3-NEXT: [[TMP31:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
4657 // CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB4]], i32 [[TMP30]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32*)* @__omp_outlined__11 to i8*), i8* null, i8** [[TMP31]], i32 5)
4658 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4659 // CHECK3: omp.inner.for.inc:
4660 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4661 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4662 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP32]], [[TMP33]]
4663 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4664 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4665 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4666 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP34]], [[TMP35]]
4667 // CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4
4668 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4669 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4670 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP36]], [[TMP37]]
4671 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4
4672 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4673 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4674 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP38]], [[TMP39]]
4675 // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]]
4676 // CHECK3: cond.true10:
4677 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4678 // CHECK3-NEXT: br label [[COND_END12:%.*]]
4679 // CHECK3: cond.false11:
4680 // CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4681 // CHECK3-NEXT: br label [[COND_END12]]
4682 // CHECK3: cond.end12:
4683 // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP40]], [[COND_TRUE10]] ], [ [[TMP41]], [[COND_FALSE11]] ]
4684 // CHECK3-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4
4685 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4686 // CHECK3-NEXT: store i32 [[TMP42]], i32* [[DOTOMP_IV]], align 4
4687 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4688 // CHECK3: omp.inner.for.end:
4689 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4690 // CHECK3: omp.loop.exit:
4691 // CHECK3-NEXT: [[TMP43:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4692 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4
4693 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP44]])
4694 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
4695 // CHECK3: omp.precond.end:
4696 // CHECK3-NEXT: ret void
4697 //
4698 //
4699 // CHECK3-LABEL: define {{[^@]+}}@__omp_outlined__11
4700 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], [1000 x i32]* noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32* noundef [[V:%.*]]) #[[ATTR1]] {
4701 // CHECK3-NEXT: entry:
4702 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4703 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4704 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4705 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4706 // CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
4707 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [1000 x i32]*, align 4
4708 // CHECK3-NEXT: [[V_ADDR:%.*]] = alloca i32*, align 4
4709 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4710 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
4711 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4712 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4713 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
4714 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4715 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4716 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4717 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4718 // CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4
4719 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4720 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4721 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4722 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4723 // CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
4724 // CHECK3-NEXT: store [1000 x i32]* [[A]], [1000 x i32]** [[A_ADDR]], align 4
4725 // CHECK3-NEXT: store i32* [[V]], i32** [[V_ADDR]], align 4
4726 // CHECK3-NEXT: [[TMP0:%.*]] = load [1000 x i32]*, [1000 x i32]** [[A_ADDR]], align 4
4727 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[N_ADDR]], align 4
4728 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
4729 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4730 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
4731 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4732 // CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4733 // CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4734 // CHECK3-NEXT: store i32 0, i32* [[I]], align 4
4735 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4736 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
4737 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4738 // CHECK3: omp.precond.then:
4739 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4740 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4741 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_UB]], align 4
4742 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4743 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4744 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_LB]], align 4
4745 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4746 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4747 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4748 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4749 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4750 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP8]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4751 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4752 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4753 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4754 // CHECK3: omp.inner.for.cond:
4755 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4756 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4757 // CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]]
4758 // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4759 // CHECK3: omp.inner.for.body:
4760 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4761 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
4762 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4763 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
4764 // CHECK3-NEXT: [[TMP13:%.*]] = load i32*, i32** [[V_ADDR]], align 4
4765 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[I3]], align 4
4766 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 [[TMP14]]
4767 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4768 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[I3]], align 4
4769 // CHECK3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
4770 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX5]], align 4
4771 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4772 // CHECK3: omp.body.continue:
4773 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4774 // CHECK3: omp.inner.for.inc:
4775 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4776 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4777 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4778 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4779 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
4780 // CHECK3: omp.inner.for.end:
4781 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4782 // CHECK3: omp.loop.exit:
4783 // CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4784 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4
4785 // CHECK3-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]])
4786 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
4787 // CHECK3: omp.precond.end:
4788 // CHECK3-NEXT: ret void
4789 //
4790