1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK8 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 template <class T> 18 struct S { 19 T f; 20 S(T a) : f(a) {} 21 S() : f() {} 22 operator T() { return T(); } 23 ~S() {} 24 }; 25 26 volatile double g; 27 volatile double &g1 = g; 28 29 template <typename T> 30 T tmain() { 31 S<T> test; 32 T t_var = T(); 33 T vec[] = {1, 2}; 34 S<T> s_arr[] = {1, 2}; 35 S<T> &var = test; 36 #pragma omp parallel 37 #pragma omp for private(t_var, vec, s_arr, s_arr, var, var) 38 for (int i = 0; i < 2; ++i) { 39 vec[i] = t_var; 40 s_arr[i] = var; 41 } 42 return T(); 43 } 44 45 int main() { 46 static int svar; 47 #ifdef LAMBDA 48 [&]() { 49 static float sfvar; 50 #pragma omp parallel 51 #pragma omp for private(g, g1, svar, sfvar) 52 for (int i = 0; i < 2; ++i) { 53 g = 1; 54 g1 = 1; 55 svar = 3; 56 sfvar = 4.0; 57 [&]() { 58 g = 2; 59 g1 = 2; 60 svar = 4; 61 sfvar = 8.0; 62 }(); 63 } 64 }(); 65 return 0; 66 #elif defined(BLOCKS) 67 ^{ 68 static float sfvar; 69 #pragma omp parallel 70 #pragma omp for private(g, g1, svar, sfvar) 71 for (int i = 0; i < 2; ++i) { 72 g = 1; 73 g1 = 1; 74 svar = 2; 75 sfvar = 3.0; 76 ^{ 77 g = 2; 78 g1 = 2; 79 svar = 4; 80 sfvar = 9.0; 81 }(); 82 } 83 }(); 84 return 0; 85 #else 86 S<float> test; 87 int t_var = 0; 88 int vec[] = {1, 2}; 89 S<float> s_arr[] = {1, 2}; 90 S<float> &var = test; 91 #pragma omp parallel 92 #pragma omp for private(t_var, vec, s_arr, s_arr, var, var, svar) 93 for (int i = 0; i < 2; ++i) { 94 vec[i] = t_var; 95 s_arr[i] = var; 96 } 97 int i; 98 #pragma omp parallel 99 #pragma omp for private(i) 100 for (i = 0; i < 2; ++i) { 101 ; 102 } 103 return tmain<int>(); 104 #endif 105 } 106 107 108 #endif 109 110 // CHECK1-LABEL: define {{[^@]+}}@main 111 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 112 // CHECK1-NEXT: entry: 113 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 114 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 115 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 116 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 117 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 118 // CHECK1-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 119 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 120 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 121 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 122 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 123 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 124 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 125 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 126 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 127 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 128 // CHECK1-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 129 // CHECK1-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 130 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 131 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 132 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 133 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 134 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 135 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 136 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 137 // CHECK1: arraydestroy.body: 138 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 139 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 140 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 141 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 142 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 143 // CHECK1: arraydestroy.done1: 144 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 145 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 146 // CHECK1-NEXT: ret i32 [[TMP2]] 147 // 148 // 149 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 150 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 151 // CHECK1-NEXT: entry: 152 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 153 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 154 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 155 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 156 // CHECK1-NEXT: ret void 157 // 158 // 159 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 160 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 161 // CHECK1-NEXT: entry: 162 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 163 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 164 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 165 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 166 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 167 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 168 // CHECK1-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 169 // CHECK1-NEXT: ret void 170 // 171 // 172 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 173 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 174 // CHECK1-NEXT: entry: 175 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 176 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 177 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 178 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 179 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 180 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 181 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 182 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 183 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 184 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 185 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 186 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 187 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 188 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 189 // CHECK1-NEXT: [[SVAR:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 192 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 193 // CHECK1-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 194 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 195 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 196 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 197 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 198 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 199 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 200 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 201 // CHECK1: arrayctor.loop: 202 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 203 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 204 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 205 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 206 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 207 // CHECK1: arrayctor.cont: 208 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[VAR]]) 209 // CHECK1-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 210 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 211 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 212 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 213 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 214 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 215 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 216 // CHECK1: cond.true: 217 // CHECK1-NEXT: br label [[COND_END:%.*]] 218 // CHECK1: cond.false: 219 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 220 // CHECK1-NEXT: br label [[COND_END]] 221 // CHECK1: cond.end: 222 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 223 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 224 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 225 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 226 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 227 // CHECK1: omp.inner.for.cond: 228 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 229 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 230 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 231 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 232 // CHECK1: omp.inner.for.cond.cleanup: 233 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 234 // CHECK1: omp.inner.for.body: 235 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 236 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 237 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 238 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 239 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 240 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 241 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 242 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 243 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 244 // CHECK1-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 245 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 246 // CHECK1-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 247 // CHECK1-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 248 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 249 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 250 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 251 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 252 // CHECK1: omp.body.continue: 253 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 254 // CHECK1: omp.inner.for.inc: 255 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 256 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 257 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 258 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 259 // CHECK1: omp.inner.for.end: 260 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 261 // CHECK1: omp.loop.exit: 262 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 263 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 264 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 265 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR]]) #[[ATTR4]] 266 // CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 267 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 268 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 269 // CHECK1: arraydestroy.body: 270 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 271 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 272 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 273 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 274 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 275 // CHECK1: arraydestroy.done8: 276 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 277 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 278 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP19]]) 279 // CHECK1-NEXT: ret void 280 // 281 // 282 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 283 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 284 // CHECK1-NEXT: entry: 285 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 286 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 287 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 288 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 289 // CHECK1-NEXT: ret void 290 // 291 // 292 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 293 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 294 // CHECK1-NEXT: entry: 295 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 296 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 297 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 299 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 303 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 304 // CHECK1-NEXT: [[I1:%.*]] = alloca i32, align 4 305 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 306 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 307 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 308 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 310 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 311 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 312 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 313 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 314 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 315 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 316 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 317 // CHECK1: cond.true: 318 // CHECK1-NEXT: br label [[COND_END:%.*]] 319 // CHECK1: cond.false: 320 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 321 // CHECK1-NEXT: br label [[COND_END]] 322 // CHECK1: cond.end: 323 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 324 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 325 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 326 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 327 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 328 // CHECK1: omp.inner.for.cond: 329 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 330 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 331 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 332 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 333 // CHECK1: omp.inner.for.body: 334 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 335 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 336 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 337 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 338 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 339 // CHECK1: omp.body.continue: 340 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 341 // CHECK1: omp.inner.for.inc: 342 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 343 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 344 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 345 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 346 // CHECK1: omp.inner.for.end: 347 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 348 // CHECK1: omp.loop.exit: 349 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 350 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 351 // CHECK1-NEXT: ret void 352 // 353 // 354 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 355 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat { 356 // CHECK1-NEXT: entry: 357 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 358 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 359 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 360 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 361 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 362 // CHECK1-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 363 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 364 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 365 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 366 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 367 // CHECK1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 368 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 369 // CHECK1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 370 // CHECK1-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 371 // CHECK1-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 372 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 373 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 374 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 375 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 376 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 377 // CHECK1: arraydestroy.body: 378 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 379 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 380 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 381 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 382 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 383 // CHECK1: arraydestroy.done1: 384 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 385 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 386 // CHECK1-NEXT: ret i32 [[TMP2]] 387 // 388 // 389 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 390 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 391 // CHECK1-NEXT: entry: 392 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 393 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 394 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 395 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 396 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 397 // CHECK1-NEXT: ret void 398 // 399 // 400 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 401 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 402 // CHECK1-NEXT: entry: 403 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 404 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 405 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 406 // CHECK1-NEXT: store float [[A]], float* [[A_ADDR]], align 4 407 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 408 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 409 // CHECK1-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 410 // CHECK1-NEXT: store float [[TMP0]], float* [[F]], align 4 411 // CHECK1-NEXT: ret void 412 // 413 // 414 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 415 // CHECK1-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 416 // CHECK1-NEXT: entry: 417 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 418 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 419 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 420 // CHECK1-NEXT: ret void 421 // 422 // 423 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 424 // CHECK1-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 425 // CHECK1-NEXT: entry: 426 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 427 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 428 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 429 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 430 // CHECK1-NEXT: ret void 431 // 432 // 433 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 434 // CHECK1-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 435 // CHECK1-NEXT: entry: 436 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 437 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 438 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 439 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 440 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 441 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 442 // CHECK1-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 443 // CHECK1-NEXT: ret void 444 // 445 // 446 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 447 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 448 // CHECK1-NEXT: entry: 449 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 450 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 451 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 452 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 453 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 454 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 455 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 456 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 457 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 458 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 459 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 460 // CHECK1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 461 // CHECK1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 462 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 463 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 464 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 465 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 466 // CHECK1-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 467 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 468 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 469 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 470 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 471 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 472 // CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 473 // CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 474 // CHECK1: arrayctor.loop: 475 // CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 476 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 477 // CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 478 // CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 479 // CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 480 // CHECK1: arrayctor.cont: 481 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR]]) 482 // CHECK1-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 483 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 484 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 485 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 486 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 487 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 488 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 489 // CHECK1: cond.true: 490 // CHECK1-NEXT: br label [[COND_END:%.*]] 491 // CHECK1: cond.false: 492 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 493 // CHECK1-NEXT: br label [[COND_END]] 494 // CHECK1: cond.end: 495 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 496 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 497 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 498 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 499 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 500 // CHECK1: omp.inner.for.cond: 501 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 502 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 503 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 504 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 505 // CHECK1: omp.inner.for.cond.cleanup: 506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 507 // CHECK1: omp.inner.for.body: 508 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 509 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 510 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 511 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 512 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 513 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 514 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 515 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 516 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 517 // CHECK1-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 518 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 519 // CHECK1-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 520 // CHECK1-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 521 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 522 // CHECK1-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 523 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 524 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 525 // CHECK1: omp.body.continue: 526 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 527 // CHECK1: omp.inner.for.inc: 528 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 529 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 530 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 531 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 532 // CHECK1: omp.inner.for.end: 533 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 534 // CHECK1: omp.loop.exit: 535 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 536 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 537 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 538 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR]]) #[[ATTR4]] 539 // CHECK1-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 540 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 541 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 542 // CHECK1: arraydestroy.body: 543 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 544 // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 545 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 546 // CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 547 // CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 548 // CHECK1: arraydestroy.done8: 549 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 550 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 551 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP19]]) 552 // CHECK1-NEXT: ret void 553 // 554 // 555 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 556 // CHECK1-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 557 // CHECK1-NEXT: entry: 558 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 559 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 560 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 561 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 562 // CHECK1-NEXT: ret void 563 // 564 // 565 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 566 // CHECK1-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 567 // CHECK1-NEXT: entry: 568 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 569 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 570 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 571 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 572 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 573 // CHECK1-NEXT: ret void 574 // 575 // 576 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 577 // CHECK1-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 578 // CHECK1-NEXT: entry: 579 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 580 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 581 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 582 // CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 583 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 584 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 585 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 586 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 587 // CHECK1-NEXT: ret void 588 // 589 // 590 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 591 // CHECK1-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 592 // CHECK1-NEXT: entry: 593 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 594 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 595 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 596 // CHECK1-NEXT: ret void 597 // 598 // 599 // CHECK2-LABEL: define {{[^@]+}}@main 600 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 601 // CHECK2-NEXT: entry: 602 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 603 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 604 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 605 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 606 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 607 // CHECK2-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 608 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 609 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 610 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 611 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4 612 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 613 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 614 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 615 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 616 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 617 // CHECK2-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 618 // CHECK2-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 619 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 620 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*)) 621 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 622 // CHECK2-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 623 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 624 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 625 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 626 // CHECK2: arraydestroy.body: 627 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 628 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 629 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]] 630 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 631 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 632 // CHECK2: arraydestroy.done1: 633 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 634 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 635 // CHECK2-NEXT: ret i32 [[TMP2]] 636 // 637 // 638 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 639 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 640 // CHECK2-NEXT: entry: 641 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 642 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 643 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 644 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 645 // CHECK2-NEXT: ret void 646 // 647 // 648 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 649 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 650 // CHECK2-NEXT: entry: 651 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 652 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 653 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 654 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 655 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 656 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 657 // CHECK2-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 658 // CHECK2-NEXT: ret void 659 // 660 // 661 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 662 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 663 // CHECK2-NEXT: entry: 664 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 665 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 666 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 667 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 668 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8 669 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 670 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 671 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 672 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 673 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 674 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 675 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 676 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4 677 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca %struct.S*, align 8 678 // CHECK2-NEXT: [[SVAR:%.*]] = alloca i32, align 4 679 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 680 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 681 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 682 // CHECK2-NEXT: store %struct.S* undef, %struct.S** [[_TMP1]], align 8 683 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 684 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 685 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 686 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 687 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 688 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 689 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 690 // CHECK2: arrayctor.loop: 691 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 692 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 693 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 694 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 695 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 696 // CHECK2: arrayctor.cont: 697 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[VAR]]) 698 // CHECK2-NEXT: store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8 699 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 700 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 701 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 702 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 703 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 704 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 705 // CHECK2: cond.true: 706 // CHECK2-NEXT: br label [[COND_END:%.*]] 707 // CHECK2: cond.false: 708 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 709 // CHECK2-NEXT: br label [[COND_END]] 710 // CHECK2: cond.end: 711 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 712 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 713 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 714 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 715 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 716 // CHECK2: omp.inner.for.cond: 717 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 718 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 719 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 720 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 721 // CHECK2: omp.inner.for.cond.cleanup: 722 // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 723 // CHECK2: omp.inner.for.body: 724 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 725 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 726 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 727 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 728 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 729 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 730 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 731 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 732 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 733 // CHECK2-NEXT: [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8 734 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 735 // CHECK2-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 736 // CHECK2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 737 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8* 738 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8* 739 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 740 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 741 // CHECK2: omp.body.continue: 742 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 743 // CHECK2: omp.inner.for.inc: 744 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 745 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 746 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 747 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 748 // CHECK2: omp.inner.for.end: 749 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 750 // CHECK2: omp.loop.exit: 751 // CHECK2-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 752 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 753 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 754 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR]]) #[[ATTR4]] 755 // CHECK2-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 756 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 757 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 758 // CHECK2: arraydestroy.body: 759 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 760 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 761 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 762 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 763 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 764 // CHECK2: arraydestroy.done8: 765 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 766 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 767 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP19]]) 768 // CHECK2-NEXT: ret void 769 // 770 // 771 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 772 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 773 // CHECK2-NEXT: entry: 774 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 775 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 776 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 777 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 778 // CHECK2-NEXT: ret void 779 // 780 // 781 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 782 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 783 // CHECK2-NEXT: entry: 784 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 785 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 786 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 787 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 788 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 789 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 790 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 791 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 792 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 793 // CHECK2-NEXT: [[I1:%.*]] = alloca i32, align 4 794 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 795 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 796 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 797 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 798 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 799 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 800 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 801 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 802 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 803 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 804 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 805 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 806 // CHECK2: cond.true: 807 // CHECK2-NEXT: br label [[COND_END:%.*]] 808 // CHECK2: cond.false: 809 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 810 // CHECK2-NEXT: br label [[COND_END]] 811 // CHECK2: cond.end: 812 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 813 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 814 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 815 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 816 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 817 // CHECK2: omp.inner.for.cond: 818 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 819 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 820 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 821 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 822 // CHECK2: omp.inner.for.body: 823 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 824 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 825 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 826 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 827 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 828 // CHECK2: omp.body.continue: 829 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 830 // CHECK2: omp.inner.for.inc: 831 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 832 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1 833 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 834 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 835 // CHECK2: omp.inner.for.end: 836 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 837 // CHECK2: omp.loop.exit: 838 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 839 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) 840 // CHECK2-NEXT: ret void 841 // 842 // 843 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 844 // CHECK2-SAME: () #[[ATTR6:[0-9]+]] comdat { 845 // CHECK2-NEXT: entry: 846 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 847 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 848 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 849 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 850 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 851 // CHECK2-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 852 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 853 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4 854 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 855 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 856 // CHECK2-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 857 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 858 // CHECK2-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 859 // CHECK2-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 860 // CHECK2-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 861 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*)) 862 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 863 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 864 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 865 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 866 // CHECK2: arraydestroy.body: 867 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 868 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 869 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 870 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]] 871 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]] 872 // CHECK2: arraydestroy.done1: 873 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 874 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 875 // CHECK2-NEXT: ret i32 [[TMP2]] 876 // 877 // 878 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 879 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 880 // CHECK2-NEXT: entry: 881 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 882 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 883 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 884 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 885 // CHECK2-NEXT: store float 0.000000e+00, float* [[F]], align 4 886 // CHECK2-NEXT: ret void 887 // 888 // 889 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 890 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 891 // CHECK2-NEXT: entry: 892 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 893 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 894 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 895 // CHECK2-NEXT: store float [[A]], float* [[A_ADDR]], align 4 896 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 897 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 898 // CHECK2-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 899 // CHECK2-NEXT: store float [[TMP0]], float* [[F]], align 4 900 // CHECK2-NEXT: ret void 901 // 902 // 903 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 904 // CHECK2-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 905 // CHECK2-NEXT: entry: 906 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 907 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 908 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 909 // CHECK2-NEXT: ret void 910 // 911 // 912 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 913 // CHECK2-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 914 // CHECK2-NEXT: entry: 915 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 916 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 917 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 918 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 919 // CHECK2-NEXT: ret void 920 // 921 // 922 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 923 // CHECK2-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 924 // CHECK2-NEXT: entry: 925 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 926 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 927 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 928 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 929 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 930 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 931 // CHECK2-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 932 // CHECK2-NEXT: ret void 933 // 934 // 935 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 936 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 937 // CHECK2-NEXT: entry: 938 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 939 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 940 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 941 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 942 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8 943 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 944 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 945 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 946 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 947 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 948 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 949 // CHECK2-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 950 // CHECK2-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 951 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca %struct.S.0*, align 8 952 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 953 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 954 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 955 // CHECK2-NEXT: store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8 956 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 957 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 958 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 959 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 960 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 961 // CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 962 // CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 963 // CHECK2: arrayctor.loop: 964 // CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 965 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 966 // CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 967 // CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 968 // CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 969 // CHECK2: arrayctor.cont: 970 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR]]) 971 // CHECK2-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8 972 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 973 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 974 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 975 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 976 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 977 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 978 // CHECK2: cond.true: 979 // CHECK2-NEXT: br label [[COND_END:%.*]] 980 // CHECK2: cond.false: 981 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 982 // CHECK2-NEXT: br label [[COND_END]] 983 // CHECK2: cond.end: 984 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 985 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 986 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 987 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 988 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 989 // CHECK2: omp.inner.for.cond: 990 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 991 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 992 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 993 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] 994 // CHECK2: omp.inner.for.cond.cleanup: 995 // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] 996 // CHECK2: omp.inner.for.body: 997 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 998 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 999 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1000 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1001 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4 1002 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 1003 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 1004 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]] 1005 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4 1006 // CHECK2-NEXT: [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8 1007 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1008 // CHECK2-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64 1009 // CHECK2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]] 1010 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8* 1011 // CHECK2-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8* 1012 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false) 1013 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1014 // CHECK2: omp.body.continue: 1015 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1016 // CHECK2: omp.inner.for.inc: 1017 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1018 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1 1019 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1020 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1021 // CHECK2: omp.inner.for.end: 1022 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1023 // CHECK2: omp.loop.exit: 1024 // CHECK2-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1025 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4 1026 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]]) 1027 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR]]) #[[ATTR4]] 1028 // CHECK2-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1029 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1030 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1031 // CHECK2: arraydestroy.body: 1032 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1033 // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1034 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1035 // CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1036 // CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1037 // CHECK2: arraydestroy.done8: 1038 // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1039 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 1040 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP19]]) 1041 // CHECK2-NEXT: ret void 1042 // 1043 // 1044 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1045 // CHECK2-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1046 // CHECK2-NEXT: entry: 1047 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1048 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1049 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1050 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1051 // CHECK2-NEXT: ret void 1052 // 1053 // 1054 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1055 // CHECK2-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1056 // CHECK2-NEXT: entry: 1057 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1058 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1059 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1060 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1061 // CHECK2-NEXT: store i32 0, i32* [[F]], align 4 1062 // CHECK2-NEXT: ret void 1063 // 1064 // 1065 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1066 // CHECK2-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1067 // CHECK2-NEXT: entry: 1068 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1069 // CHECK2-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1070 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1071 // CHECK2-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1072 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1073 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1074 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1075 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1076 // CHECK2-NEXT: ret void 1077 // 1078 // 1079 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1080 // CHECK2-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1081 // CHECK2-NEXT: entry: 1082 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1083 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1084 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1085 // CHECK2-NEXT: ret void 1086 // 1087 // 1088 // CHECK3-LABEL: define {{[^@]+}}@main 1089 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1090 // CHECK3-NEXT: entry: 1091 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1092 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1093 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1094 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) [[REF_TMP]]) 1095 // CHECK3-NEXT: ret i32 0 1096 // 1097 // 1098 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1099 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR2:[0-9]+]] { 1100 // CHECK3-NEXT: entry: 1101 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1102 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1103 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1104 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1105 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 1106 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1107 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1108 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1109 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1110 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8 1111 // CHECK3-NEXT: [[G1:%.*]] = alloca double, align 8 1112 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 1113 // CHECK3-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1114 // CHECK3-NEXT: [[SFVAR:%.*]] = alloca float, align 4 1115 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1116 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 1117 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1118 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1119 // CHECK3-NEXT: store double* undef, double** [[_TMP1]], align 8 1120 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1121 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1122 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1123 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1124 // CHECK3-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 1125 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1126 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1127 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1128 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1129 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1130 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1131 // CHECK3: cond.true: 1132 // CHECK3-NEXT: br label [[COND_END:%.*]] 1133 // CHECK3: cond.false: 1134 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1135 // CHECK3-NEXT: br label [[COND_END]] 1136 // CHECK3: cond.end: 1137 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1138 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1139 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1140 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1141 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1142 // CHECK3: omp.inner.for.cond: 1143 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1144 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1145 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1146 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1147 // CHECK3: omp.inner.for.body: 1148 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1149 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1150 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1151 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1152 // CHECK3-NEXT: store double 1.000000e+00, double* [[G]], align 8 1153 // CHECK3-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8 1154 // CHECK3-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8 1155 // CHECK3-NEXT: store i32 3, i32* [[SVAR]], align 4 1156 // CHECK3-NEXT: store float 4.000000e+00, float* [[SFVAR]], align 4 1157 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 1158 // CHECK3-NEXT: store double* [[G]], double** [[TMP9]], align 8 1159 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1 1160 // CHECK3-NEXT: [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8 1161 // CHECK3-NEXT: store double* [[TMP11]], double** [[TMP10]], align 8 1162 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2 1163 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[TMP12]], align 8 1164 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3 1165 // CHECK3-NEXT: store float* [[SFVAR]], float** [[TMP13]], align 8 1166 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull dereferenceable(32) [[REF_TMP]]) 1167 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1168 // CHECK3: omp.body.continue: 1169 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1170 // CHECK3: omp.inner.for.inc: 1171 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1172 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1 1173 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1174 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1175 // CHECK3: omp.inner.for.end: 1176 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1177 // CHECK3: omp.loop.exit: 1178 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1179 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]]) 1180 // CHECK3-NEXT: ret void 1181 // 1182 // 1183 // CHECK4-LABEL: define {{[^@]+}}@main 1184 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 1185 // CHECK4-NEXT: entry: 1186 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1187 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1188 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 1189 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 1190 // CHECK4-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 1191 // CHECK4-NEXT: ret i32 0 1192 // 1193 // 1194 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 1195 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] { 1196 // CHECK4-NEXT: entry: 1197 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1198 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 1199 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1200 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 1201 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 1202 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1203 // CHECK4-NEXT: ret void 1204 // 1205 // 1206 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1207 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] { 1208 // CHECK4-NEXT: entry: 1209 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1210 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1211 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1212 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1213 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 8 1214 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1215 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1216 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1217 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1218 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8 1219 // CHECK4-NEXT: [[G1:%.*]] = alloca double, align 8 1220 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca double*, align 8 1221 // CHECK4-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1222 // CHECK4-NEXT: [[SFVAR:%.*]] = alloca float, align 4 1223 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1224 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, align 8 1225 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1226 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1227 // CHECK4-NEXT: store double* undef, double** [[_TMP1]], align 8 1228 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1229 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1230 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1231 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1232 // CHECK4-NEXT: store double* [[G1]], double** [[_TMP2]], align 8 1233 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1234 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1235 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1236 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1237 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1 1238 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1239 // CHECK4: cond.true: 1240 // CHECK4-NEXT: br label [[COND_END:%.*]] 1241 // CHECK4: cond.false: 1242 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1243 // CHECK4-NEXT: br label [[COND_END]] 1244 // CHECK4: cond.end: 1245 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1246 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1247 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1248 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1249 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1250 // CHECK4: omp.inner.for.cond: 1251 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1252 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1253 // CHECK4-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1254 // CHECK4-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1255 // CHECK4: omp.inner.for.body: 1256 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1257 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 1258 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1259 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1260 // CHECK4-NEXT: store double 1.000000e+00, double* [[G]], align 8 1261 // CHECK4-NEXT: [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8 1262 // CHECK4-NEXT: store volatile double 1.000000e+00, double* [[TMP8]], align 8 1263 // CHECK4-NEXT: store i32 2, i32* [[SVAR]], align 4 1264 // CHECK4-NEXT: store float 3.000000e+00, float* [[SFVAR]], align 4 1265 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 0 1266 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 1267 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 1 1268 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 1269 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 2 1270 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 1271 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 3 1272 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g1_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 1273 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 4 1274 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 1275 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 5 1276 // CHECK4-NEXT: [[TMP9:%.*]] = load volatile double, double* [[G]], align 8 1277 // CHECK4-NEXT: store volatile double [[TMP9]], double* [[BLOCK_CAPTURED]], align 8 1278 // CHECK4-NEXT: [[BLOCK_CAPTURED4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 6 1279 // CHECK4-NEXT: [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 8 1280 // CHECK4-NEXT: store double* [[TMP10]], double** [[BLOCK_CAPTURED4]], align 8 1281 // CHECK4-NEXT: [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 7 1282 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[SVAR]], align 4 1283 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[BLOCK_CAPTURED5]], align 8 1284 // CHECK4-NEXT: [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 8 1285 // CHECK4-NEXT: [[TMP12:%.*]] = load float, float* [[SFVAR]], align 4 1286 // CHECK4-NEXT: store float [[TMP12]], float* [[BLOCK_CAPTURED6]], align 4 1287 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]] to void ()* 1288 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP13]] to %struct.__block_literal_generic* 1289 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 1290 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 1291 // CHECK4-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP14]], align 8 1292 // CHECK4-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to void (i8*)* 1293 // CHECK4-NEXT: call void [[TMP17]](i8* [[TMP15]]) 1294 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1295 // CHECK4: omp.body.continue: 1296 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1297 // CHECK4: omp.inner.for.inc: 1298 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1299 // CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1 1300 // CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1301 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1302 // CHECK4: omp.inner.for.end: 1303 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1304 // CHECK4: omp.loop.exit: 1305 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1306 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]]) 1307 // CHECK4-NEXT: ret void 1308 // 1309 // 1310 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2 1311 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 1312 // CHECK4-NEXT: entry: 1313 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1314 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>*, align 8 1315 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1316 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* 1317 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>** [[BLOCK_ADDR]], align 8 1318 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 5 1319 // CHECK4-NEXT: store double 2.000000e+00, double* [[BLOCK_CAPTURE_ADDR]], align 8 1320 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 6 1321 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[BLOCK_CAPTURE_ADDR1]], align 8 1322 // CHECK4-NEXT: store double 2.000000e+00, double* [[TMP0]], align 8 1323 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 7 1324 // CHECK4-NEXT: store i32 4, i32* [[BLOCK_CAPTURE_ADDR2]], align 8 1325 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 8 1326 // CHECK4-NEXT: store float 9.000000e+00, float* [[BLOCK_CAPTURE_ADDR3]], align 4 1327 // CHECK4-NEXT: ret void 1328 // 1329 // 1330 // CHECK5-LABEL: define {{[^@]+}}@main 1331 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 1332 // CHECK5-NEXT: entry: 1333 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1334 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1335 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1336 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1337 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1338 // CHECK5-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1339 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1340 // CHECK5-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 1341 // CHECK5-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 1342 // CHECK5-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 1343 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1344 // CHECK5-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1345 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1346 // CHECK5-NEXT: [[I9:%.*]] = alloca i32, align 4 1347 // CHECK5-NEXT: [[I10:%.*]] = alloca i32, align 4 1348 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1349 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 1350 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4 1351 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1352 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1353 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1354 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1355 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1356 // CHECK5-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1357 // CHECK5-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1358 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1359 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1360 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1361 // CHECK5: arrayctor.loop: 1362 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1363 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 1364 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1365 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1366 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1367 // CHECK5: arrayctor.cont: 1368 // CHECK5-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[VAR4]]) 1369 // CHECK5-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 8 1370 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1371 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 1372 // CHECK5: for.cond: 1373 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1374 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 1375 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1376 // CHECK5: for.body: 1377 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 1378 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1379 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 1380 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 1381 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 1382 // CHECK5-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1383 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1384 // CHECK5-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 1385 // CHECK5-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 1386 // CHECK5-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 1387 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 1388 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 1389 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 1390 // CHECK5: for.inc: 1391 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 1392 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 1393 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 1394 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 1395 // CHECK5: for.end: 1396 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 1397 // CHECK5-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1398 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 1399 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1400 // CHECK5: arraydestroy.body: 1401 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1402 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1403 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1404 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1405 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1406 // CHECK5: arraydestroy.done8: 1407 // CHECK5-NEXT: store i32 0, i32* [[I10]], align 4 1408 // CHECK5-NEXT: br label [[FOR_COND11:%.*]] 1409 // CHECK5: for.cond11: 1410 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[I10]], align 4 1411 // CHECK5-NEXT: [[CMP12:%.*]] = icmp slt i32 [[TMP10]], 2 1412 // CHECK5-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END16:%.*]] 1413 // CHECK5: for.body13: 1414 // CHECK5-NEXT: br label [[FOR_INC14:%.*]] 1415 // CHECK5: for.inc14: 1416 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I10]], align 4 1417 // CHECK5-NEXT: [[INC15:%.*]] = add nsw i32 [[TMP11]], 1 1418 // CHECK5-NEXT: store i32 [[INC15]], i32* [[I10]], align 4 1419 // CHECK5-NEXT: br label [[FOR_COND11]], !llvm.loop [[LOOP4:![0-9]+]] 1420 // CHECK5: for.end16: 1421 // CHECK5-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1422 // CHECK5-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1423 // CHECK5-NEXT: [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1424 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN17]], i64 2 1425 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY18:%.*]] 1426 // CHECK5: arraydestroy.body18: 1427 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END16]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ] 1428 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1 1429 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]] 1430 // CHECK5-NEXT: [[ARRAYDESTROY_DONE21:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]] 1431 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]] 1432 // CHECK5: arraydestroy.done22: 1433 // CHECK5-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 1434 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 1435 // CHECK5-NEXT: ret i32 [[TMP13]] 1436 // 1437 // 1438 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1439 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1440 // CHECK5-NEXT: entry: 1441 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1442 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1443 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1444 // CHECK5-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 1445 // CHECK5-NEXT: ret void 1446 // 1447 // 1448 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1449 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1450 // CHECK5-NEXT: entry: 1451 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1452 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1453 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1454 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1455 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1456 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1457 // CHECK5-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 1458 // CHECK5-NEXT: ret void 1459 // 1460 // 1461 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1462 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1463 // CHECK5-NEXT: entry: 1464 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1465 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1466 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1467 // CHECK5-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1468 // CHECK5-NEXT: ret void 1469 // 1470 // 1471 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1472 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] comdat { 1473 // CHECK5-NEXT: entry: 1474 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1475 // CHECK5-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1476 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1477 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1478 // CHECK5-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1479 // CHECK5-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1480 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1481 // CHECK5-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 1482 // CHECK5-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 1483 // CHECK5-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 1484 // CHECK5-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1485 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1486 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 1487 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4 1488 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1489 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1490 // CHECK5-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1491 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1492 // CHECK5-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1493 // CHECK5-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1494 // CHECK5-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1495 // CHECK5-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1496 // CHECK5-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1497 // CHECK5-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1498 // CHECK5: arrayctor.loop: 1499 // CHECK5-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1500 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 1501 // CHECK5-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1502 // CHECK5-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1503 // CHECK5-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1504 // CHECK5: arrayctor.cont: 1505 // CHECK5-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR4]]) 1506 // CHECK5-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 8 1507 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 1508 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 1509 // CHECK5: for.cond: 1510 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1511 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 1512 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1513 // CHECK5: for.body: 1514 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 1515 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1516 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 1517 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 1518 // CHECK5-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 1519 // CHECK5-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1520 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1521 // CHECK5-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 1522 // CHECK5-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 1523 // CHECK5-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 1524 // CHECK5-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 1525 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 1526 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 1527 // CHECK5: for.inc: 1528 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 1529 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 1530 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 1531 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 1532 // CHECK5: for.end: 1533 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR4]]) #[[ATTR4]] 1534 // CHECK5-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1535 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1536 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1537 // CHECK5: arraydestroy.body: 1538 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1539 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1540 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1541 // CHECK5-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1542 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1543 // CHECK5: arraydestroy.done8: 1544 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1545 // CHECK5-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1546 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2 1547 // CHECK5-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 1548 // CHECK5: arraydestroy.body10: 1549 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 1550 // CHECK5-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 1551 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 1552 // CHECK5-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 1553 // CHECK5-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 1554 // CHECK5: arraydestroy.done14: 1555 // CHECK5-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 1556 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 1557 // CHECK5-NEXT: ret i32 [[TMP11]] 1558 // 1559 // 1560 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1561 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1562 // CHECK5-NEXT: entry: 1563 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1564 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1565 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1566 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1567 // CHECK5-NEXT: store float 0.000000e+00, float* [[F]], align 4 1568 // CHECK5-NEXT: ret void 1569 // 1570 // 1571 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1572 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1573 // CHECK5-NEXT: entry: 1574 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1575 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1576 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1577 // CHECK5-NEXT: ret void 1578 // 1579 // 1580 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1581 // CHECK5-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1582 // CHECK5-NEXT: entry: 1583 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1584 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1585 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1586 // CHECK5-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1587 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1588 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1589 // CHECK5-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1590 // CHECK5-NEXT: store float [[TMP0]], float* [[F]], align 4 1591 // CHECK5-NEXT: ret void 1592 // 1593 // 1594 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1595 // CHECK5-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1596 // CHECK5-NEXT: entry: 1597 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1598 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1599 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1600 // CHECK5-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 1601 // CHECK5-NEXT: ret void 1602 // 1603 // 1604 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1605 // CHECK5-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1606 // CHECK5-NEXT: entry: 1607 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1608 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1609 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1610 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1611 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1612 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1613 // CHECK5-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1614 // CHECK5-NEXT: ret void 1615 // 1616 // 1617 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1618 // CHECK5-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1619 // CHECK5-NEXT: entry: 1620 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1621 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1622 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1623 // CHECK5-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1624 // CHECK5-NEXT: ret void 1625 // 1626 // 1627 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1628 // CHECK5-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1629 // CHECK5-NEXT: entry: 1630 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1631 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1632 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1633 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1634 // CHECK5-NEXT: store i32 0, i32* [[F]], align 4 1635 // CHECK5-NEXT: ret void 1636 // 1637 // 1638 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1639 // CHECK5-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1640 // CHECK5-NEXT: entry: 1641 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1642 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1643 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1644 // CHECK5-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1645 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1646 // CHECK5-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1647 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1648 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1649 // CHECK5-NEXT: ret void 1650 // 1651 // 1652 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1653 // CHECK5-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1654 // CHECK5-NEXT: entry: 1655 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1656 // CHECK5-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1657 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1658 // CHECK5-NEXT: ret void 1659 // 1660 // 1661 // CHECK6-LABEL: define {{[^@]+}}@main 1662 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 1663 // CHECK6-NEXT: entry: 1664 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1665 // CHECK6-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 1666 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1667 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1668 // CHECK6-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4 1669 // CHECK6-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8 1670 // CHECK6-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1671 // CHECK6-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 1672 // CHECK6-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4 1673 // CHECK6-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S]], align 4 1674 // CHECK6-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8 1675 // CHECK6-NEXT: [[SVAR:%.*]] = alloca i32, align 4 1676 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1677 // CHECK6-NEXT: [[I9:%.*]] = alloca i32, align 4 1678 // CHECK6-NEXT: [[I10:%.*]] = alloca i32, align 4 1679 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1680 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) 1681 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 4 1682 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1683 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false) 1684 // CHECK6-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0 1685 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00) 1686 // CHECK6-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1 1687 // CHECK6-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00) 1688 // CHECK6-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8 1689 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1690 // CHECK6-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2 1691 // CHECK6-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1692 // CHECK6: arrayctor.loop: 1693 // CHECK6-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1694 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 1695 // CHECK6-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 1696 // CHECK6-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1697 // CHECK6-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1698 // CHECK6: arrayctor.cont: 1699 // CHECK6-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull dereferenceable(4) [[VAR4]]) 1700 // CHECK6-NEXT: store %struct.S* [[VAR4]], %struct.S** [[TMP]], align 8 1701 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1702 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 1703 // CHECK6: for.cond: 1704 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1705 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 1706 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1707 // CHECK6: for.body: 1708 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 1709 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1710 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 1711 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 1712 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 1713 // CHECK6-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8 1714 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1715 // CHECK6-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 1716 // CHECK6-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 1717 // CHECK6-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[ARRAYIDX6]] to i8* 1718 // CHECK6-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[TMP4]] to i8* 1719 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 1720 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 1721 // CHECK6: for.inc: 1722 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 1723 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 1724 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 1725 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 1726 // CHECK6: for.end: 1727 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[VAR4]]) #[[ATTR4:[0-9]+]] 1728 // CHECK6-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR3]], i32 0, i32 0 1729 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2 1730 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1731 // CHECK6: arraydestroy.body: 1732 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1733 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1734 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1735 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1736 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1737 // CHECK6: arraydestroy.done8: 1738 // CHECK6-NEXT: store i32 0, i32* [[I10]], align 4 1739 // CHECK6-NEXT: br label [[FOR_COND11:%.*]] 1740 // CHECK6: for.cond11: 1741 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[I10]], align 4 1742 // CHECK6-NEXT: [[CMP12:%.*]] = icmp slt i32 [[TMP10]], 2 1743 // CHECK6-NEXT: br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END16:%.*]] 1744 // CHECK6: for.body13: 1745 // CHECK6-NEXT: br label [[FOR_INC14:%.*]] 1746 // CHECK6: for.inc14: 1747 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I10]], align 4 1748 // CHECK6-NEXT: [[INC15:%.*]] = add nsw i32 [[TMP11]], 1 1749 // CHECK6-NEXT: store i32 [[INC15]], i32* [[I10]], align 4 1750 // CHECK6-NEXT: br label [[FOR_COND11]], !llvm.loop [[LOOP4:![0-9]+]] 1751 // CHECK6: for.end16: 1752 // CHECK6-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1753 // CHECK6-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 1754 // CHECK6-NEXT: [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0 1755 // CHECK6-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN17]], i64 2 1756 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY18:%.*]] 1757 // CHECK6: arraydestroy.body18: 1758 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi %struct.S* [ [[TMP12]], [[FOR_END16]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ] 1759 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1 1760 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]] 1761 // CHECK6-NEXT: [[ARRAYDESTROY_DONE21:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]] 1762 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]] 1763 // CHECK6: arraydestroy.done22: 1764 // CHECK6-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 1765 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4 1766 // CHECK6-NEXT: ret i32 [[TMP13]] 1767 // 1768 // 1769 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 1770 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1771 // CHECK6-NEXT: entry: 1772 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1773 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1774 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1775 // CHECK6-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) 1776 // CHECK6-NEXT: ret void 1777 // 1778 // 1779 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef 1780 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1781 // CHECK6-NEXT: entry: 1782 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1783 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1784 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1785 // CHECK6-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1786 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1787 // CHECK6-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1788 // CHECK6-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull dereferenceable(4) [[THIS1]], float [[TMP0]]) 1789 // CHECK6-NEXT: ret void 1790 // 1791 // 1792 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 1793 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1794 // CHECK6-NEXT: entry: 1795 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1796 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1797 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1798 // CHECK6-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1799 // CHECK6-NEXT: ret void 1800 // 1801 // 1802 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1803 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] comdat { 1804 // CHECK6-NEXT: entry: 1805 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1806 // CHECK6-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 1807 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1808 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1809 // CHECK6-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4 1810 // CHECK6-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8 1811 // CHECK6-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1812 // CHECK6-NEXT: [[VEC2:%.*]] = alloca [2 x i32], align 4 1813 // CHECK6-NEXT: [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4 1814 // CHECK6-NEXT: [[VAR4:%.*]] = alloca [[STRUCT_S_0]], align 4 1815 // CHECK6-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8 1816 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 1817 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) 1818 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 4 1819 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1820 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 1821 // CHECK6-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0 1822 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1) 1823 // CHECK6-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1 1824 // CHECK6-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2) 1825 // CHECK6-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8 1826 // CHECK6-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1827 // CHECK6-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 1828 // CHECK6-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] 1829 // CHECK6: arrayctor.loop: 1830 // CHECK6-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] 1831 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYCTOR_CUR]]) 1832 // CHECK6-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 1833 // CHECK6-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] 1834 // CHECK6-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] 1835 // CHECK6: arrayctor.cont: 1836 // CHECK6-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR4]]) 1837 // CHECK6-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[TMP]], align 8 1838 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 1839 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 1840 // CHECK6: for.cond: 1841 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 1842 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 1843 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 1844 // CHECK6: for.body: 1845 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR1]], align 4 1846 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 1847 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP3]] to i64 1848 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC2]], i64 0, i64 [[IDXPROM]] 1849 // CHECK6-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4 1850 // CHECK6-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8 1851 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4 1852 // CHECK6-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP5]] to i64 1853 // CHECK6-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i64 0, i64 [[IDXPROM5]] 1854 // CHECK6-NEXT: [[TMP6:%.*]] = bitcast %struct.S.0* [[ARRAYIDX6]] to i8* 1855 // CHECK6-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[TMP4]] to i8* 1856 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 4, i1 false) 1857 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 1858 // CHECK6: for.inc: 1859 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 1860 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1 1861 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 1862 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 1863 // CHECK6: for.end: 1864 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[VAR4]]) #[[ATTR4]] 1865 // CHECK6-NEXT: [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR3]], i32 0, i32 0 1866 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2 1867 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] 1868 // CHECK6: arraydestroy.body: 1869 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP9]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] 1870 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 1871 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] 1872 // CHECK6-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]] 1873 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]] 1874 // CHECK6: arraydestroy.done8: 1875 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 1876 // CHECK6-NEXT: [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0 1877 // CHECK6-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN9]], i64 2 1878 // CHECK6-NEXT: br label [[ARRAYDESTROY_BODY10:%.*]] 1879 // CHECK6: arraydestroy.body10: 1880 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[TMP10]], [[ARRAYDESTROY_DONE8]] ], [ [[ARRAYDESTROY_ELEMENT12:%.*]], [[ARRAYDESTROY_BODY10]] ] 1881 // CHECK6-NEXT: [[ARRAYDESTROY_ELEMENT12]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST11]], i64 -1 1882 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[ARRAYDESTROY_ELEMENT12]]) #[[ATTR4]] 1883 // CHECK6-NEXT: [[ARRAYDESTROY_DONE13:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT12]], [[ARRAY_BEGIN9]] 1884 // CHECK6-NEXT: br i1 [[ARRAYDESTROY_DONE13]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY10]] 1885 // CHECK6: arraydestroy.done14: 1886 // CHECK6-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull dereferenceable(4) [[TEST]]) #[[ATTR4]] 1887 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[RETVAL]], align 4 1888 // CHECK6-NEXT: ret i32 [[TMP11]] 1889 // 1890 // 1891 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 1892 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1893 // CHECK6-NEXT: entry: 1894 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1895 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1896 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1897 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1898 // CHECK6-NEXT: store float 0.000000e+00, float* [[F]], align 4 1899 // CHECK6-NEXT: ret void 1900 // 1901 // 1902 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 1903 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1904 // CHECK6-NEXT: entry: 1905 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1906 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1907 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1908 // CHECK6-NEXT: ret void 1909 // 1910 // 1911 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef 1912 // CHECK6-SAME: (%struct.S* nonnull dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1913 // CHECK6-NEXT: entry: 1914 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1915 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca float, align 4 1916 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1917 // CHECK6-NEXT: store float [[A]], float* [[A_ADDR]], align 4 1918 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1919 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1920 // CHECK6-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4 1921 // CHECK6-NEXT: store float [[TMP0]], float* [[F]], align 4 1922 // CHECK6-NEXT: ret void 1923 // 1924 // 1925 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 1926 // CHECK6-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1927 // CHECK6-NEXT: entry: 1928 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1929 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1930 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1931 // CHECK6-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) 1932 // CHECK6-NEXT: ret void 1933 // 1934 // 1935 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei 1936 // CHECK6-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1937 // CHECK6-NEXT: entry: 1938 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1939 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1940 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1941 // CHECK6-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1942 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1943 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1944 // CHECK6-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1945 // CHECK6-NEXT: ret void 1946 // 1947 // 1948 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 1949 // CHECK6-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1950 // CHECK6-NEXT: entry: 1951 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1952 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1953 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1954 // CHECK6-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull dereferenceable(4) [[THIS1]]) #[[ATTR4]] 1955 // CHECK6-NEXT: ret void 1956 // 1957 // 1958 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 1959 // CHECK6-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1960 // CHECK6-NEXT: entry: 1961 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1962 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1963 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1964 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1965 // CHECK6-NEXT: store i32 0, i32* [[F]], align 4 1966 // CHECK6-NEXT: ret void 1967 // 1968 // 1969 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei 1970 // CHECK6-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1971 // CHECK6-NEXT: entry: 1972 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1973 // CHECK6-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 1974 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1975 // CHECK6-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 1976 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1977 // CHECK6-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 1978 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 1979 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[F]], align 4 1980 // CHECK6-NEXT: ret void 1981 // 1982 // 1983 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 1984 // CHECK6-SAME: (%struct.S.0* nonnull dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 { 1985 // CHECK6-NEXT: entry: 1986 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 1987 // CHECK6-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 1988 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 1989 // CHECK6-NEXT: ret void 1990 // 1991 // 1992 // CHECK7-LABEL: define {{[^@]+}}@main 1993 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 1994 // CHECK7-NEXT: entry: 1995 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1996 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 1997 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 1998 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) [[REF_TMP]]) 1999 // CHECK7-NEXT: ret i32 0 2000 // 2001 // 2002 // CHECK8-LABEL: define {{[^@]+}}@main 2003 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] { 2004 // CHECK8-NEXT: entry: 2005 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2006 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 2007 // CHECK8-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 2008 // CHECK8-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 2009 // CHECK8-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 2010 // CHECK8-NEXT: ret i32 0 2011 // 2012 // 2013 // CHECK8-LABEL: define {{[^@]+}}@__main_block_invoke 2014 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] { 2015 // CHECK8-NEXT: entry: 2016 // CHECK8-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2017 // CHECK8-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 2018 // CHECK8-NEXT: [[G:%.*]] = alloca double, align 8 2019 // CHECK8-NEXT: [[G1:%.*]] = alloca double, align 8 2020 // CHECK8-NEXT: [[TMP:%.*]] = alloca double*, align 8 2021 // CHECK8-NEXT: [[SVAR:%.*]] = alloca i32, align 4 2022 // CHECK8-NEXT: [[SFVAR:%.*]] = alloca float, align 4 2023 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2024 // CHECK8-NEXT: [[BLOCK1:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, align 8 2025 // CHECK8-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2026 // CHECK8-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 2027 // CHECK8-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 2028 // CHECK8-NEXT: store double* [[G1]], double** [[TMP]], align 8 2029 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 2030 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 2031 // CHECK8: for.cond: 2032 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2033 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 2034 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2035 // CHECK8: for.body: 2036 // CHECK8-NEXT: store double 1.000000e+00, double* [[G]], align 8 2037 // CHECK8-NEXT: [[TMP1:%.*]] = load double*, double** [[TMP]], align 8 2038 // CHECK8-NEXT: store volatile double 1.000000e+00, double* [[TMP1]], align 8 2039 // CHECK8-NEXT: store i32 2, i32* [[SVAR]], align 4 2040 // CHECK8-NEXT: store float 3.000000e+00, float* [[SFVAR]], align 4 2041 // CHECK8-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 0 2042 // CHECK8-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 2043 // CHECK8-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 1 2044 // CHECK8-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 2045 // CHECK8-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 2 2046 // CHECK8-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 2047 // CHECK8-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 3 2048 // CHECK8-NEXT: store i8* bitcast (void (i8*)* @__main_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8 2049 // CHECK8-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 4 2050 // CHECK8-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 2051 // CHECK8-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 5 2052 // CHECK8-NEXT: [[TMP2:%.*]] = load volatile double, double* [[G]], align 8 2053 // CHECK8-NEXT: store volatile double [[TMP2]], double* [[BLOCK_CAPTURED]], align 8 2054 // CHECK8-NEXT: [[BLOCK_CAPTURED2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 6 2055 // CHECK8-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 8 2056 // CHECK8-NEXT: store double* [[TMP3]], double** [[BLOCK_CAPTURED2]], align 8 2057 // CHECK8-NEXT: [[BLOCK_CAPTURED3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 7 2058 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[SVAR]], align 4 2059 // CHECK8-NEXT: store i32 [[TMP4]], i32* [[BLOCK_CAPTURED3]], align 8 2060 // CHECK8-NEXT: [[BLOCK_CAPTURED4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]], i32 0, i32 8 2061 // CHECK8-NEXT: [[TMP5:%.*]] = load float, float* [[SFVAR]], align 4 2062 // CHECK8-NEXT: store float [[TMP5]], float* [[BLOCK_CAPTURED4]], align 4 2063 // CHECK8-NEXT: [[TMP6:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK1]] to void ()* 2064 // CHECK8-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP6]] to %struct.__block_literal_generic* 2065 // CHECK8-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 2066 // CHECK8-NEXT: [[TMP8:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 2067 // CHECK8-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP7]], align 8 2068 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to void (i8*)* 2069 // CHECK8-NEXT: call void [[TMP10]](i8* [[TMP8]]) 2070 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 2071 // CHECK8: for.inc: 2072 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2073 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP11]], 1 2074 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 2075 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2076 // CHECK8: for.end: 2077 // CHECK8-NEXT: ret void 2078 // 2079 // 2080 // CHECK8-LABEL: define {{[^@]+}}@__main_block_invoke_2 2081 // CHECK8-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 2082 // CHECK8-NEXT: entry: 2083 // CHECK8-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 2084 // CHECK8-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>*, align 8 2085 // CHECK8-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 2086 // CHECK8-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* 2087 // CHECK8-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>** [[BLOCK_ADDR]], align 8 2088 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 5 2089 // CHECK8-NEXT: store double 2.000000e+00, double* [[BLOCK_CAPTURE_ADDR]], align 8 2090 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 6 2091 // CHECK8-NEXT: [[TMP0:%.*]] = load double*, double** [[BLOCK_CAPTURE_ADDR1]], align 8 2092 // CHECK8-NEXT: store double 2.000000e+00, double* [[TMP0]], align 8 2093 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 7 2094 // CHECK8-NEXT: store i32 4, i32* [[BLOCK_CAPTURE_ADDR2]], align 8 2095 // CHECK8-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 8 2096 // CHECK8-NEXT: store float 9.000000e+00, float* [[BLOCK_CAPTURE_ADDR3]], align 4 2097 // CHECK8-NEXT: ret void 2098 // 2099