1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
7 
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // expected-no-diagnostics
14 #ifndef HEADER
15 #define HEADER
16 
17 template <class T>
18 struct S {
19   T f;
SS20   S(T a) : f(a) {}
SS21   S() : f() {}
operator TS22   operator T() { return T(); }
~SS23   ~S() {}
24 };
25 
26 volatile double g;
27 volatile double &g1 = g;
28 
29 template <typename T>
tmain()30 T tmain() {
31   S<T> test;
32   T t_var = T();
33   T vec[] = {1, 2};
34   S<T> s_arr[] = {1, 2};
35   S<T> &var = test;
36 #pragma omp parallel
37 #pragma omp for private(t_var, vec, s_arr, s_arr, var, var)
38   for (int i = 0; i < 2; ++i) {
39     vec[i] = t_var;
40     s_arr[i] = var;
41   }
42   return T();
43 }
44 
main()45 int main() {
46   static int svar;
47 #ifdef LAMBDA
48   [&]() {
49   static float sfvar;
50 #pragma omp parallel
51 #pragma omp for private(g, g1, svar, sfvar)
52   for (int i = 0; i < 2; ++i) {
53     g = 1;
54     g1 = 1;
55     svar = 3;
56     sfvar = 4.0;
57     [&]() {
58       g = 2;
59       g1 = 2;
60       svar = 4;
61       sfvar = 8.0;
62     }();
63   }
64   }();
65   return 0;
66 #elif defined(BLOCKS)
67   ^{
68   static float sfvar;
69 #pragma omp parallel
70 #pragma omp for private(g, g1, svar, sfvar)
71   for (int i = 0; i < 2; ++i) {
72     g = 1;
73     g1 = 1;
74     svar = 2;
75     sfvar = 3.0;
76     ^{
77       g = 2;
78       g1 = 2;
79       svar = 4;
80       sfvar = 9.0;
81     }();
82   }
83   }();
84   return 0;
85 #else
86   S<float> test;
87   int t_var = 0;
88   int vec[] = {1, 2};
89   S<float> s_arr[] = {1, 2};
90   S<float> &var = test;
91 #pragma omp parallel
92 #pragma omp for private(t_var, vec, s_arr, s_arr, var, var, svar)
93   for (int i = 0; i < 2; ++i) {
94     vec[i] = t_var;
95     s_arr[i] = var;
96   }
97   int i;
98 #pragma omp parallel
99 #pragma omp for private(i)
100   for (i = 0; i < 2; ++i) {
101     ;
102   }
103   return tmain<int>();
104 #endif
105 }
106 
107 
108 #endif
109 
110 // CHECK1-LABEL: define {{[^@]+}}@main
111 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
112 // CHECK1-NEXT:  entry:
113 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
114 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
115 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
116 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
117 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
118 // CHECK1-NEXT:    [[VAR:%.*]] = alloca %struct.S*, align 8
119 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
120 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
121 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
122 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 4
123 // CHECK1-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
124 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
125 // CHECK1-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
126 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
127 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
128 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
129 // CHECK1-NEXT:    store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
130 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
131 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
132 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
133 // CHECK1-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
134 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
135 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
136 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
137 // CHECK1:       arraydestroy.body:
138 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
139 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
140 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4:[0-9]+]]
141 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
142 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
143 // CHECK1:       arraydestroy.done1:
144 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
145 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
146 // CHECK1-NEXT:    ret i32 [[TMP2]]
147 //
148 //
149 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
150 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
151 // CHECK1-NEXT:  entry:
152 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
153 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
154 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
155 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
156 // CHECK1-NEXT:    ret void
157 //
158 //
159 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
160 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
161 // CHECK1-NEXT:  entry:
162 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
163 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
164 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
165 // CHECK1-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
166 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
167 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
168 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
169 // CHECK1-NEXT:    ret void
170 //
171 //
172 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
173 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
174 // CHECK1-NEXT:  entry:
175 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
176 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
177 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
178 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
179 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca %struct.S*, align 8
180 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
181 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
182 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
183 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
184 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
185 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
186 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
187 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
188 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca %struct.S*, align 8
189 // CHECK1-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
191 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
192 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
193 // CHECK1-NEXT:    store %struct.S* undef, %struct.S** [[_TMP1]], align 8
194 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
195 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
196 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
197 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
198 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
199 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
200 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
201 // CHECK1:       arrayctor.loop:
202 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
203 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
204 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
205 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
206 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
207 // CHECK1:       arrayctor.cont:
208 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]])
209 // CHECK1-NEXT:    store %struct.S* [[VAR]], %struct.S** [[_TMP2]], align 8
210 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
211 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
212 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
213 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
214 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
215 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
216 // CHECK1:       cond.true:
217 // CHECK1-NEXT:    br label [[COND_END:%.*]]
218 // CHECK1:       cond.false:
219 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
220 // CHECK1-NEXT:    br label [[COND_END]]
221 // CHECK1:       cond.end:
222 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
223 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
224 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
225 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
226 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
227 // CHECK1:       omp.inner.for.cond:
228 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
229 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
230 // CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
231 // CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
232 // CHECK1:       omp.inner.for.cond.cleanup:
233 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
234 // CHECK1:       omp.inner.for.body:
235 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
236 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
237 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
238 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
239 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
240 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
241 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
242 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
243 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4
244 // CHECK1-NEXT:    [[TMP10:%.*]] = load %struct.S*, %struct.S** [[_TMP2]], align 8
245 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
246 // CHECK1-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64
247 // CHECK1-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 [[IDXPROM4]]
248 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast %struct.S* [[ARRAYIDX5]] to i8*
249 // CHECK1-NEXT:    [[TMP13:%.*]] = bitcast %struct.S* [[TMP10]] to i8*
250 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
251 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
252 // CHECK1:       omp.body.continue:
253 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
254 // CHECK1:       omp.inner.for.inc:
255 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
256 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1
257 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
258 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
259 // CHECK1:       omp.inner.for.end:
260 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
261 // CHECK1:       omp.loop.exit:
262 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
263 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
264 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]])
265 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
266 // CHECK1-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
267 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN7]], i64 2
268 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
269 // CHECK1:       arraydestroy.body:
270 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
271 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
272 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
273 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
274 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
275 // CHECK1:       arraydestroy.done8:
276 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
277 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
278 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP19]])
279 // CHECK1-NEXT:    ret void
280 //
281 //
282 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
283 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
284 // CHECK1-NEXT:  entry:
285 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
286 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
287 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
288 // CHECK1-NEXT:    call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
289 // CHECK1-NEXT:    ret void
290 //
291 //
292 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
293 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
294 // CHECK1-NEXT:  entry:
295 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
296 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
297 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
298 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
299 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
300 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
301 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
302 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
303 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
304 // CHECK1-NEXT:    [[I1:%.*]] = alloca i32, align 4
305 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
306 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
307 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
308 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
309 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
310 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
311 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
312 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
313 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
314 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
315 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
316 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
317 // CHECK1:       cond.true:
318 // CHECK1-NEXT:    br label [[COND_END:%.*]]
319 // CHECK1:       cond.false:
320 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
321 // CHECK1-NEXT:    br label [[COND_END]]
322 // CHECK1:       cond.end:
323 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
324 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
325 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
326 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
327 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
328 // CHECK1:       omp.inner.for.cond:
329 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
330 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
331 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
332 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
333 // CHECK1:       omp.inner.for.body:
334 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
335 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
336 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
337 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
338 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
339 // CHECK1:       omp.body.continue:
340 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
341 // CHECK1:       omp.inner.for.inc:
342 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
343 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP8]], 1
344 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
345 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
346 // CHECK1:       omp.inner.for.end:
347 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
348 // CHECK1:       omp.loop.exit:
349 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
350 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]])
351 // CHECK1-NEXT:    ret void
352 //
353 //
354 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
355 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
356 // CHECK1-NEXT:  entry:
357 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
358 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
359 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
360 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
361 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
362 // CHECK1-NEXT:    [[VAR:%.*]] = alloca %struct.S.0*, align 8
363 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
364 // CHECK1-NEXT:    store i32 0, i32* [[T_VAR]], align 4
365 // CHECK1-NEXT:    [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
366 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
367 // CHECK1-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
368 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
369 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
370 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
371 // CHECK1-NEXT:    store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
372 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
373 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
374 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
375 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
376 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
377 // CHECK1:       arraydestroy.body:
378 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
379 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
380 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
381 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
382 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
383 // CHECK1:       arraydestroy.done1:
384 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
385 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4
386 // CHECK1-NEXT:    ret i32 [[TMP2]]
387 //
388 //
389 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
390 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
391 // CHECK1-NEXT:  entry:
392 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
393 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
394 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
395 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
396 // CHECK1-NEXT:    store float 0.000000e+00, float* [[F]], align 4
397 // CHECK1-NEXT:    ret void
398 //
399 //
400 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
401 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
402 // CHECK1-NEXT:  entry:
403 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
404 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
405 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
406 // CHECK1-NEXT:    store float [[A]], float* [[A_ADDR]], align 4
407 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
408 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
409 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
410 // CHECK1-NEXT:    store float [[TMP0]], float* [[F]], align 4
411 // CHECK1-NEXT:    ret void
412 //
413 //
414 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
415 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
416 // CHECK1-NEXT:  entry:
417 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
418 // CHECK1-NEXT:    store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
419 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
420 // CHECK1-NEXT:    ret void
421 //
422 //
423 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
424 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
425 // CHECK1-NEXT:  entry:
426 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
427 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
428 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
429 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
430 // CHECK1-NEXT:    ret void
431 //
432 //
433 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
434 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
435 // CHECK1-NEXT:  entry:
436 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
437 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
438 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
439 // CHECK1-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
440 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
441 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
442 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
443 // CHECK1-NEXT:    ret void
444 //
445 //
446 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
447 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
448 // CHECK1-NEXT:  entry:
449 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
450 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
451 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
452 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
454 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
455 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
456 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
457 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
458 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
459 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
460 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
461 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
462 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca %struct.S.0*, align 8
463 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
464 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
465 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
466 // CHECK1-NEXT:    store %struct.S.0* undef, %struct.S.0** [[_TMP1]], align 8
467 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
468 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
469 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
470 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
471 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
472 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
473 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
474 // CHECK1:       arrayctor.loop:
475 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
476 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
477 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
478 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
479 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
480 // CHECK1:       arrayctor.cont:
481 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]])
482 // CHECK1-NEXT:    store %struct.S.0* [[VAR]], %struct.S.0** [[_TMP2]], align 8
483 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
484 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
485 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
486 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
487 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
488 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
489 // CHECK1:       cond.true:
490 // CHECK1-NEXT:    br label [[COND_END:%.*]]
491 // CHECK1:       cond.false:
492 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
493 // CHECK1-NEXT:    br label [[COND_END]]
494 // CHECK1:       cond.end:
495 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
496 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
497 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
498 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
499 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
500 // CHECK1:       omp.inner.for.cond:
501 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
502 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
503 // CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
504 // CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
505 // CHECK1:       omp.inner.for.cond.cleanup:
506 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
507 // CHECK1:       omp.inner.for.body:
508 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
509 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
510 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
511 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
512 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
513 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I]], align 4
514 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
515 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 [[IDXPROM]]
516 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[ARRAYIDX]], align 4
517 // CHECK1-NEXT:    [[TMP10:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP2]], align 8
518 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
519 // CHECK1-NEXT:    [[IDXPROM4:%.*]] = sext i32 [[TMP11]] to i64
520 // CHECK1-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 [[IDXPROM4]]
521 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast %struct.S.0* [[ARRAYIDX5]] to i8*
522 // CHECK1-NEXT:    [[TMP13:%.*]] = bitcast %struct.S.0* [[TMP10]] to i8*
523 // CHECK1-NEXT:    call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP12]], i8* align 4 [[TMP13]], i64 4, i1 false)
524 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
525 // CHECK1:       omp.body.continue:
526 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
527 // CHECK1:       omp.inner.for.inc:
528 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
529 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP14]], 1
530 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
531 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
532 // CHECK1:       omp.inner.for.end:
533 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
534 // CHECK1:       omp.loop.exit:
535 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
536 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
537 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]])
538 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
539 // CHECK1-NEXT:    [[ARRAY_BEGIN7:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
540 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN7]], i64 2
541 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
542 // CHECK1:       arraydestroy.body:
543 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP17]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
544 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
545 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
546 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN7]]
547 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE8:%.*]], label [[ARRAYDESTROY_BODY]]
548 // CHECK1:       arraydestroy.done8:
549 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
550 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
551 // CHECK1-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP19]])
552 // CHECK1-NEXT:    ret void
553 //
554 //
555 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
556 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
557 // CHECK1-NEXT:  entry:
558 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
559 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
560 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
561 // CHECK1-NEXT:    call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
562 // CHECK1-NEXT:    ret void
563 //
564 //
565 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
566 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
567 // CHECK1-NEXT:  entry:
568 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
569 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
570 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
571 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
572 // CHECK1-NEXT:    store i32 0, i32* [[F]], align 4
573 // CHECK1-NEXT:    ret void
574 //
575 //
576 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
577 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
578 // CHECK1-NEXT:  entry:
579 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
580 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
581 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
582 // CHECK1-NEXT:    store i32 [[A]], i32* [[A_ADDR]], align 4
583 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
584 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
585 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
586 // CHECK1-NEXT:    store i32 [[TMP0]], i32* [[F]], align 4
587 // CHECK1-NEXT:    ret void
588 //
589 //
590 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
591 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
592 // CHECK1-NEXT:  entry:
593 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
594 // CHECK1-NEXT:    store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
595 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
596 // CHECK1-NEXT:    ret void
597 //
598 //
599 // CHECK3-LABEL: define {{[^@]+}}@main
600 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
601 // CHECK3-NEXT:  entry:
602 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
603 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
604 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
605 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
606 // CHECK3-NEXT:    ret i32 0
607 //
608 //
609 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
610 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2:[0-9]+]] {
611 // CHECK3-NEXT:  entry:
612 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
613 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
614 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
615 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
616 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca double*, align 8
617 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
618 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
619 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
620 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
621 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
622 // CHECK3-NEXT:    [[G1:%.*]] = alloca double, align 8
623 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca double*, align 8
624 // CHECK3-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
625 // CHECK3-NEXT:    [[SFVAR:%.*]] = alloca float, align 4
626 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
627 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
628 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
629 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
630 // CHECK3-NEXT:    store double* undef, double** [[_TMP1]], align 8
631 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
632 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
633 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
634 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
635 // CHECK3-NEXT:    store double* [[G1]], double** [[_TMP2]], align 8
636 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
637 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
638 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
639 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
640 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
641 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
642 // CHECK3:       cond.true:
643 // CHECK3-NEXT:    br label [[COND_END:%.*]]
644 // CHECK3:       cond.false:
645 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
646 // CHECK3-NEXT:    br label [[COND_END]]
647 // CHECK3:       cond.end:
648 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
649 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
650 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
651 // CHECK3-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
652 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
653 // CHECK3:       omp.inner.for.cond:
654 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
655 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
656 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
657 // CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
658 // CHECK3:       omp.inner.for.body:
659 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
660 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
661 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
662 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
663 // CHECK3-NEXT:    store double 1.000000e+00, double* [[G]], align 8
664 // CHECK3-NEXT:    [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8
665 // CHECK3-NEXT:    store volatile double 1.000000e+00, double* [[TMP8]], align 8
666 // CHECK3-NEXT:    store i32 3, i32* [[SVAR]], align 4
667 // CHECK3-NEXT:    store float 4.000000e+00, float* [[SFVAR]], align 4
668 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
669 // CHECK3-NEXT:    store double* [[G]], double** [[TMP9]], align 8
670 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
671 // CHECK3-NEXT:    [[TMP11:%.*]] = load double*, double** [[_TMP2]], align 8
672 // CHECK3-NEXT:    store double* [[TMP11]], double** [[TMP10]], align 8
673 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
674 // CHECK3-NEXT:    store i32* [[SVAR]], i32** [[TMP12]], align 8
675 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
676 // CHECK3-NEXT:    store float* [[SFVAR]], float** [[TMP13]], align 8
677 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
678 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
679 // CHECK3:       omp.body.continue:
680 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
681 // CHECK3:       omp.inner.for.inc:
682 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
683 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP14]], 1
684 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4
685 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
686 // CHECK3:       omp.inner.for.end:
687 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
688 // CHECK3:       omp.loop.exit:
689 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
690 // CHECK3-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]])
691 // CHECK3-NEXT:    ret void
692 //
693 //
694 // CHECK4-LABEL: define {{[^@]+}}@main
695 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] {
696 // CHECK4-NEXT:  entry:
697 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
698 // CHECK4-NEXT:    store i32 0, i32* [[RETVAL]], align 4
699 // CHECK4-NEXT:    [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8
700 // CHECK4-NEXT:    [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)*
701 // CHECK4-NEXT:    call void [[TMP1]](i8* noundef bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*))
702 // CHECK4-NEXT:    ret i32 0
703 //
704 //
705 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke
706 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] {
707 // CHECK4-NEXT:  entry:
708 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
709 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8
710 // CHECK4-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
711 // CHECK4-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*
712 // CHECK4-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8
713 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
714 // CHECK4-NEXT:    ret void
715 //
716 //
717 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
718 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
719 // CHECK4-NEXT:  entry:
720 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
721 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
722 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
723 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
724 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca double*, align 8
725 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
726 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
727 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
728 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
729 // CHECK4-NEXT:    [[G:%.*]] = alloca double, align 8
730 // CHECK4-NEXT:    [[G1:%.*]] = alloca double, align 8
731 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca double*, align 8
732 // CHECK4-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
733 // CHECK4-NEXT:    [[SFVAR:%.*]] = alloca float, align 4
734 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
735 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, align 8
736 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
737 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
738 // CHECK4-NEXT:    store double* undef, double** [[_TMP1]], align 8
739 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
740 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_UB]], align 4
741 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
742 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
743 // CHECK4-NEXT:    store double* [[G1]], double** [[_TMP2]], align 8
744 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
745 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
746 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
747 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
748 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
749 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
750 // CHECK4:       cond.true:
751 // CHECK4-NEXT:    br label [[COND_END:%.*]]
752 // CHECK4:       cond.false:
753 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
754 // CHECK4-NEXT:    br label [[COND_END]]
755 // CHECK4:       cond.end:
756 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
757 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
758 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
759 // CHECK4-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
760 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
761 // CHECK4:       omp.inner.for.cond:
762 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
763 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
764 // CHECK4-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
765 // CHECK4-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
766 // CHECK4:       omp.inner.for.body:
767 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
768 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
769 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
770 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
771 // CHECK4-NEXT:    store double 1.000000e+00, double* [[G]], align 8
772 // CHECK4-NEXT:    [[TMP8:%.*]] = load double*, double** [[_TMP2]], align 8
773 // CHECK4-NEXT:    store volatile double 1.000000e+00, double* [[TMP8]], align 8
774 // CHECK4-NEXT:    store i32 2, i32* [[SVAR]], align 4
775 // CHECK4-NEXT:    store float 3.000000e+00, float* [[SFVAR]], align 4
776 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 0
777 // CHECK4-NEXT:    store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8
778 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 1
779 // CHECK4-NEXT:    store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8
780 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 2
781 // CHECK4-NEXT:    store i32 0, i32* [[BLOCK_RESERVED]], align 4
782 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 3
783 // CHECK4-NEXT:    store i8* bitcast (void (i8*)* @g1_block_invoke_2 to i8*), i8** [[BLOCK_INVOKE]], align 8
784 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 4
785 // CHECK4-NEXT:    store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8
786 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 5
787 // CHECK4-NEXT:    [[TMP9:%.*]] = load volatile double, double* [[G]], align 8
788 // CHECK4-NEXT:    store volatile double [[TMP9]], double* [[BLOCK_CAPTURED]], align 8
789 // CHECK4-NEXT:    [[BLOCK_CAPTURED4:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 6
790 // CHECK4-NEXT:    [[TMP10:%.*]] = load double*, double** [[_TMP2]], align 8
791 // CHECK4-NEXT:    store double* [[TMP10]], double** [[BLOCK_CAPTURED4]], align 8
792 // CHECK4-NEXT:    [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 7
793 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[SVAR]], align 4
794 // CHECK4-NEXT:    store i32 [[TMP11]], i32* [[BLOCK_CAPTURED5]], align 8
795 // CHECK4-NEXT:    [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 8
796 // CHECK4-NEXT:    [[TMP12:%.*]] = load float, float* [[SFVAR]], align 4
797 // CHECK4-NEXT:    store float [[TMP12]], float* [[BLOCK_CAPTURED6]], align 4
798 // CHECK4-NEXT:    [[TMP13:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]] to void ()*
799 // CHECK4-NEXT:    [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP13]] to %struct.__block_literal_generic*
800 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3
801 // CHECK4-NEXT:    [[TMP15:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8*
802 // CHECK4-NEXT:    [[TMP16:%.*]] = load i8*, i8** [[TMP14]], align 8
803 // CHECK4-NEXT:    [[TMP17:%.*]] = bitcast i8* [[TMP16]] to void (i8*)*
804 // CHECK4-NEXT:    call void [[TMP17]](i8* noundef [[TMP15]])
805 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
806 // CHECK4:       omp.body.continue:
807 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
808 // CHECK4:       omp.inner.for.inc:
809 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
810 // CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
811 // CHECK4-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
812 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
813 // CHECK4:       omp.inner.for.end:
814 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
815 // CHECK4:       omp.loop.exit:
816 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
817 // CHECK4-NEXT:    call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]])
818 // CHECK4-NEXT:    ret void
819 //
820 //
821 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2
822 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {
823 // CHECK4-NEXT:  entry:
824 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8
825 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>*, align 8
826 // CHECK4-NEXT:    store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
827 // CHECK4-NEXT:    [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>*
828 // CHECK4-NEXT:    store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>** [[BLOCK_ADDR]], align 8
829 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 5
830 // CHECK4-NEXT:    store double 2.000000e+00, double* [[BLOCK_CAPTURE_ADDR]], align 8
831 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 6
832 // CHECK4-NEXT:    [[TMP0:%.*]] = load double*, double** [[BLOCK_CAPTURE_ADDR1]], align 8
833 // CHECK4-NEXT:    store double 2.000000e+00, double* [[TMP0]], align 8
834 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 7
835 // CHECK4-NEXT:    store i32 4, i32* [[BLOCK_CAPTURE_ADDR2]], align 8
836 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, double, double*, i32, float }>* [[BLOCK]], i32 0, i32 8
837 // CHECK4-NEXT:    store float 9.000000e+00, float* [[BLOCK_CAPTURE_ADDR3]], align 4
838 // CHECK4-NEXT:    ret void
839 //
840