1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // add -fopenmp-targets
3 
4 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
7 
8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
11 // expected-no-diagnostics
12 #ifndef HEADER
13 #define HEADER
14 
15 typedef __INTPTR_TYPE__ intptr_t;
16 
17 
18 void foo();
19 
20 struct S {
21   intptr_t a, b, c;
SS22   S(intptr_t a) : a(a) {}
operator charS23   operator char() { return a; }
~SS24   ~S() {}
25 };
26 
27 template <typename T>
tmain()28 T tmain() {
29 #pragma omp target
30 #pragma omp teams
31 #pragma omp distribute parallel for simd proc_bind(master)
32   for(int i = 0; i < 1000; i++) {}
33   return T();
34 }
35 
main()36 int main() {
37 #pragma omp target
38 #pragma omp teams
39 #pragma omp distribute parallel for simd proc_bind(spread)
40   for(int i = 0; i < 1000; i++) {}
41 #pragma omp target
42 #pragma omp teams
43 #pragma omp distribute parallel for simd proc_bind(close)
44   for(int i = 0; i < 1000; i++) {}
45   return tmain<int>();
46 }
47 
48 
49 
50 
51 
52 
53 
54 
55 #endif
56 // CHECK1-LABEL: define {{[^@]+}}@main
57 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
58 // CHECK1-NEXT:  entry:
59 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
60 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
61 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
62 // CHECK1-NEXT:    store i32 0, i32* [[RETVAL]], align 4
63 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
64 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
65 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
66 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
67 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
68 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
69 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
70 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
71 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
72 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
73 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
74 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
75 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
76 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
77 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
78 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
79 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
80 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
81 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
82 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
83 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
84 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
85 // CHECK1:       omp_offload.failed:
86 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37() #[[ATTR2:[0-9]+]]
87 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
88 // CHECK1:       omp_offload.cont:
89 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
90 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
91 // CHECK1-NEXT:    store i32 1, i32* [[TMP11]], align 4
92 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
93 // CHECK1-NEXT:    store i32 0, i32* [[TMP12]], align 4
94 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
95 // CHECK1-NEXT:    store i8** null, i8*** [[TMP13]], align 8
96 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
97 // CHECK1-NEXT:    store i8** null, i8*** [[TMP14]], align 8
98 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
99 // CHECK1-NEXT:    store i64* null, i64** [[TMP15]], align 8
100 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
101 // CHECK1-NEXT:    store i64* null, i64** [[TMP16]], align 8
102 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
103 // CHECK1-NEXT:    store i8** null, i8*** [[TMP17]], align 8
104 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
105 // CHECK1-NEXT:    store i8** null, i8*** [[TMP18]], align 8
106 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
107 // CHECK1-NEXT:    store i64 1000, i64* [[TMP19]], align 8
108 // CHECK1-NEXT:    [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
109 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
110 // CHECK1-NEXT:    br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
111 // CHECK1:       omp_offload.failed3:
112 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41() #[[ATTR2]]
113 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
114 // CHECK1:       omp_offload.cont4:
115 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
116 // CHECK1-NEXT:    ret i32 [[CALL]]
117 //
118 //
119 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l37
120 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
121 // CHECK1-NEXT:  entry:
122 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
123 // CHECK1-NEXT:    ret void
124 //
125 //
126 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
127 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
128 // CHECK1-NEXT:  entry:
129 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
130 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
131 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
132 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
133 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
134 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
135 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
136 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
137 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
138 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
139 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
140 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
141 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
142 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
143 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
144 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
145 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
146 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
147 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
148 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
149 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
150 // CHECK1:       cond.true:
151 // CHECK1-NEXT:    br label [[COND_END:%.*]]
152 // CHECK1:       cond.false:
153 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
154 // CHECK1-NEXT:    br label [[COND_END]]
155 // CHECK1:       cond.end:
156 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
157 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
158 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
159 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
160 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
161 // CHECK1:       omp.inner.for.cond:
162 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
163 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6
164 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
165 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
166 // CHECK1:       omp.inner.for.body:
167 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 4), !llvm.access.group !6
168 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6
169 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
170 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6
171 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
172 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !6
173 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
174 // CHECK1:       omp.inner.for.inc:
175 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
176 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6
177 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
178 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
179 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
180 // CHECK1:       omp.inner.for.end:
181 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
182 // CHECK1:       omp.loop.exit:
183 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
184 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
185 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
186 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
187 // CHECK1:       .omp.final.then:
188 // CHECK1-NEXT:    store i32 1000, i32* [[I]], align 4
189 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
190 // CHECK1:       .omp.final.done:
191 // CHECK1-NEXT:    ret void
192 //
193 //
194 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
195 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
196 // CHECK1-NEXT:  entry:
197 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
198 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
199 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
200 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
201 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
202 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
203 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
204 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
205 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
206 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
207 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
208 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
209 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
210 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
211 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
212 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
213 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
214 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
215 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
216 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
217 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
218 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
219 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
220 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
221 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
222 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
223 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
224 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
225 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
226 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
227 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
228 // CHECK1:       cond.true:
229 // CHECK1-NEXT:    br label [[COND_END:%.*]]
230 // CHECK1:       cond.false:
231 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
232 // CHECK1-NEXT:    br label [[COND_END]]
233 // CHECK1:       cond.end:
234 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
235 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
236 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
237 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
238 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
239 // CHECK1:       omp.inner.for.cond:
240 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
241 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
242 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
243 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
244 // CHECK1:       omp.inner.for.body:
245 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
246 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
247 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
248 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
249 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
250 // CHECK1:       omp.body.continue:
251 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
252 // CHECK1:       omp.inner.for.inc:
253 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
254 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
255 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
256 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
257 // CHECK1:       omp.inner.for.end:
258 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
259 // CHECK1:       omp.loop.exit:
260 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
261 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
262 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
263 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
264 // CHECK1:       .omp.final.then:
265 // CHECK1-NEXT:    store i32 1000, i32* [[I]], align 4
266 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
267 // CHECK1:       .omp.final.done:
268 // CHECK1-NEXT:    ret void
269 //
270 //
271 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l41
272 // CHECK1-SAME: () #[[ATTR1]] {
273 // CHECK1-NEXT:  entry:
274 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
275 // CHECK1-NEXT:    ret void
276 //
277 //
278 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
279 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
280 // CHECK1-NEXT:  entry:
281 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
282 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
283 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
284 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
285 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
286 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
287 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
288 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
289 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
290 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
291 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
292 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
293 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
294 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
295 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
296 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
297 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
298 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
299 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
300 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
301 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
302 // CHECK1:       cond.true:
303 // CHECK1-NEXT:    br label [[COND_END:%.*]]
304 // CHECK1:       cond.false:
305 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
306 // CHECK1-NEXT:    br label [[COND_END]]
307 // CHECK1:       cond.end:
308 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
309 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
310 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
311 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
312 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
313 // CHECK1:       omp.inner.for.cond:
314 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
315 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
316 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
317 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
318 // CHECK1:       omp.inner.for.body:
319 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 3), !llvm.access.group !15
320 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15
321 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
322 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
323 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
324 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !15
325 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
326 // CHECK1:       omp.inner.for.inc:
327 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
328 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15
329 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
330 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
331 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
332 // CHECK1:       omp.inner.for.end:
333 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
334 // CHECK1:       omp.loop.exit:
335 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
336 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
337 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
338 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
339 // CHECK1:       .omp.final.then:
340 // CHECK1-NEXT:    store i32 1000, i32* [[I]], align 4
341 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
342 // CHECK1:       .omp.final.done:
343 // CHECK1-NEXT:    ret void
344 //
345 //
346 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
347 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
348 // CHECK1-NEXT:  entry:
349 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
350 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
351 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
352 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
353 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
354 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
355 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
356 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
357 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
358 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
359 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
360 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
361 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
362 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
363 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
364 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
365 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
366 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
367 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
368 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
369 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
370 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
371 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
372 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
373 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
374 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
375 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
376 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
377 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
378 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
379 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
380 // CHECK1:       cond.true:
381 // CHECK1-NEXT:    br label [[COND_END:%.*]]
382 // CHECK1:       cond.false:
383 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
384 // CHECK1-NEXT:    br label [[COND_END]]
385 // CHECK1:       cond.end:
386 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
387 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
388 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
389 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
390 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
391 // CHECK1:       omp.inner.for.cond:
392 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
393 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
394 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
395 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
396 // CHECK1:       omp.inner.for.body:
397 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
398 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
399 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
400 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
401 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
402 // CHECK1:       omp.body.continue:
403 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
404 // CHECK1:       omp.inner.for.inc:
405 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
406 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
407 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
408 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
409 // CHECK1:       omp.inner.for.end:
410 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
411 // CHECK1:       omp.loop.exit:
412 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
413 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
414 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
415 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
416 // CHECK1:       .omp.final.then:
417 // CHECK1-NEXT:    store i32 1000, i32* [[I]], align 4
418 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
419 // CHECK1:       .omp.final.done:
420 // CHECK1-NEXT:    ret void
421 //
422 //
423 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
424 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] comdat {
425 // CHECK1-NEXT:  entry:
426 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
427 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
428 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
429 // CHECK1-NEXT:    store i32 1, i32* [[TMP0]], align 4
430 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
431 // CHECK1-NEXT:    store i32 0, i32* [[TMP1]], align 4
432 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
433 // CHECK1-NEXT:    store i8** null, i8*** [[TMP2]], align 8
434 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
435 // CHECK1-NEXT:    store i8** null, i8*** [[TMP3]], align 8
436 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
437 // CHECK1-NEXT:    store i64* null, i64** [[TMP4]], align 8
438 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
439 // CHECK1-NEXT:    store i64* null, i64** [[TMP5]], align 8
440 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
441 // CHECK1-NEXT:    store i8** null, i8*** [[TMP6]], align 8
442 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
443 // CHECK1-NEXT:    store i8** null, i8*** [[TMP7]], align 8
444 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
445 // CHECK1-NEXT:    store i64 1000, i64* [[TMP8]], align 8
446 // CHECK1-NEXT:    [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
447 // CHECK1-NEXT:    [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
448 // CHECK1-NEXT:    br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
449 // CHECK1:       omp_offload.failed:
450 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29() #[[ATTR2]]
451 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
452 // CHECK1:       omp_offload.cont:
453 // CHECK1-NEXT:    ret i32 0
454 //
455 //
456 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l29
457 // CHECK1-SAME: () #[[ATTR1]] {
458 // CHECK1-NEXT:  entry:
459 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
460 // CHECK1-NEXT:    ret void
461 //
462 //
463 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
464 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
465 // CHECK1-NEXT:  entry:
466 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
467 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
468 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
469 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
470 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
471 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
472 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
473 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
474 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
475 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
476 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
477 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
478 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_COMB_UB]], align 4
479 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
480 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
481 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
482 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
483 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
484 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
485 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 999
486 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
487 // CHECK1:       cond.true:
488 // CHECK1-NEXT:    br label [[COND_END:%.*]]
489 // CHECK1:       cond.false:
490 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
491 // CHECK1-NEXT:    br label [[COND_END]]
492 // CHECK1:       cond.end:
493 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
494 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
495 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
496 // CHECK1-NEXT:    store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
497 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
498 // CHECK1:       omp.inner.for.cond:
499 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
500 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !21
501 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
502 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
503 // CHECK1:       omp.inner.for.body:
504 // CHECK1-NEXT:    call void @__kmpc_push_proc_bind(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group !21
505 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !21
506 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
507 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !21
508 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
509 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group !21
510 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
511 // CHECK1:       omp.inner.for.inc:
512 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
513 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !21
514 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
515 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
516 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
517 // CHECK1:       omp.inner.for.end:
518 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
519 // CHECK1:       omp.loop.exit:
520 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
521 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
522 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
523 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
524 // CHECK1:       .omp.final.then:
525 // CHECK1-NEXT:    store i32 1000, i32* [[I]], align 4
526 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
527 // CHECK1:       .omp.final.done:
528 // CHECK1-NEXT:    ret void
529 //
530 //
531 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
532 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
533 // CHECK1-NEXT:  entry:
534 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
535 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
536 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
537 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
538 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
539 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
540 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
541 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
542 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
543 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
544 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
545 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
546 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
547 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
548 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
549 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
550 // CHECK1-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
551 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
552 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
553 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
554 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
555 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
556 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
557 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
558 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
559 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
560 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
561 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
562 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
563 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 999
564 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
565 // CHECK1:       cond.true:
566 // CHECK1-NEXT:    br label [[COND_END:%.*]]
567 // CHECK1:       cond.false:
568 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
569 // CHECK1-NEXT:    br label [[COND_END]]
570 // CHECK1:       cond.end:
571 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 999, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
572 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
573 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
574 // CHECK1-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
575 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
576 // CHECK1:       omp.inner.for.cond:
577 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
578 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
579 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
580 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
581 // CHECK1:       omp.inner.for.body:
582 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
583 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
584 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
585 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
586 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
587 // CHECK1:       omp.body.continue:
588 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
589 // CHECK1:       omp.inner.for.inc:
590 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
591 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
592 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
593 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
594 // CHECK1:       omp.inner.for.end:
595 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
596 // CHECK1:       omp.loop.exit:
597 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
598 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
599 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
600 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
601 // CHECK1:       .omp.final.then:
602 // CHECK1-NEXT:    store i32 1000, i32* [[I]], align 4
603 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
604 // CHECK1:       .omp.final.done:
605 // CHECK1-NEXT:    ret void
606 //
607 //
608 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
609 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
610 // CHECK1-NEXT:  entry:
611 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
612 // CHECK1-NEXT:    ret void
613 //
614 //
615 // CHECK3-LABEL: define {{[^@]+}}@main
616 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
617 // CHECK3-NEXT:  entry:
618 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
619 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
620 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
621 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
622 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
623 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
624 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
625 // CHECK3-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
626 // CHECK3-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
627 // CHECK3-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
628 // CHECK3-NEXT:    [[I6:%.*]] = alloca i32, align 4
629 // CHECK3-NEXT:    store i32 0, i32* [[RETVAL]], align 4
630 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
631 // CHECK3-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
632 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
633 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
634 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
635 // CHECK3:       omp.inner.for.cond:
636 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
637 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
638 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
639 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
640 // CHECK3:       omp.inner.for.body:
641 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
642 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
643 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
644 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
645 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
646 // CHECK3:       omp.body.continue:
647 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
648 // CHECK3:       omp.inner.for.inc:
649 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
650 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
651 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
652 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
653 // CHECK3:       omp.inner.for.end:
654 // CHECK3-NEXT:    store i32 1000, i32* [[I]], align 4
655 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB3]], align 4
656 // CHECK3-NEXT:    store i32 999, i32* [[DOTOMP_UB4]], align 4
657 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
658 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
659 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
660 // CHECK3:       omp.inner.for.cond7:
661 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
662 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group !6
663 // CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
664 // CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
665 // CHECK3:       omp.inner.for.body9:
666 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
667 // CHECK3-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
668 // CHECK3-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
669 // CHECK3-NEXT:    store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group !6
670 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
671 // CHECK3:       omp.body.continue12:
672 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
673 // CHECK3:       omp.inner.for.inc13:
674 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
675 // CHECK3-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
676 // CHECK3-NEXT:    store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group !6
677 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
678 // CHECK3:       omp.inner.for.end15:
679 // CHECK3-NEXT:    store i32 1000, i32* [[I6]], align 4
680 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
681 // CHECK3-NEXT:    ret i32 [[CALL]]
682 //
683 //
684 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
685 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] comdat {
686 // CHECK3-NEXT:  entry:
687 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
688 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
689 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
690 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
691 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
692 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
693 // CHECK3-NEXT:    store i32 999, i32* [[DOTOMP_UB]], align 4
694 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
695 // CHECK3-NEXT:    store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
696 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
697 // CHECK3:       omp.inner.for.cond:
698 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
699 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
700 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
701 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
702 // CHECK3:       omp.inner.for.body:
703 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
704 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
705 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
706 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
707 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
708 // CHECK3:       omp.body.continue:
709 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
710 // CHECK3:       omp.inner.for.inc:
711 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
712 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
713 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
714 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
715 // CHECK3:       omp.inner.for.end:
716 // CHECK3-NEXT:    store i32 1000, i32* [[I]], align 4
717 // CHECK3-NEXT:    ret i32 0
718 //
719