1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5
6 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK3
7 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
8 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
9
10 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5
11 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
13
14 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK3
15 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
17
18 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
20 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
21
22 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK11
23 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
24 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
25
26 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13
27 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
29
30 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK11
31 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
32 // RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
33
34 // expected-no-diagnostics
35 #ifndef HEADER
36 #define HEADER
37
38 typedef __INTPTR_TYPE__ intptr_t;
39
40
41 void foo();
42
43 struct S {
44 intptr_t a, b, c;
SS45 S(intptr_t a) : a(a) {}
operator charS46 operator char() { extern void mayThrow(); mayThrow(); return a; }
~SS47 ~S() {}
48 };
49
50 template <typename T, int C>
tmain()51 int tmain() {
52 #pragma omp target
53 #pragma omp teams
54 #pragma omp distribute parallel for simd num_threads(C)
55 for (int i = 0; i < 100; i++)
56 foo();
57 #pragma omp target
58 #pragma omp teams
59 #pragma omp distribute parallel for simd num_threads(T(23))
60 for (int i = 0; i < 100; i++)
61 foo();
62 return 0;
63 }
64
main()65 int main() {
66 S s(0);
67 char a = s;
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute parallel for simd num_threads(2)
71 for (int i = 0; i < 100; i++) {
72 foo();
73 }
74 #pragma omp target
75 #pragma omp teams
76
77 #pragma omp distribute parallel for simd num_threads(a)
78 for (int i = 0; i < 100; i++) {
79 foo();
80 }
81 return a + tmain<char, 5>() + tmain<S, 1>();
82 }
83
84 // tmain 5
85
86 // tmain 1
87
88
89
90
91
92
93
94
95 #endif
96 // CHECK1-LABEL: define {{[^@]+}}@main
97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
98 // CHECK1-NEXT: entry:
99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
101 // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1
102 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
103 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
105 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
106 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
107 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
108 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
109 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
110 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
111 // CHECK1-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
112 // CHECK1-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
113 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
114 // CHECK1: invoke.cont:
115 // CHECK1-NEXT: store i8 [[CALL]], i8* [[A]], align 1
116 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
117 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
118 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
119 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
120 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
121 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
122 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
123 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
124 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
125 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
126 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
127 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
128 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
129 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
130 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
131 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
132 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
133 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
134 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
135 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
136 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
137 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
138 // CHECK1: omp_offload.failed:
139 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
140 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
141 // CHECK1: lpad:
142 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
143 // CHECK1-NEXT: cleanup
144 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
145 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
146 // CHECK1-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
147 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
148 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
149 // CHECK1-NEXT: br label [[EH_RESUME:%.*]]
150 // CHECK1: omp_offload.cont:
151 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
152 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
153 // CHECK1-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
154 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
155 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
156 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
157 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
158 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
159 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
160 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
161 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
162 // CHECK1-NEXT: store i8* null, i8** [[TMP20]], align 8
163 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
164 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
165 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
166 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
167 // CHECK1-NEXT: store i32 1, i32* [[TMP23]], align 4
168 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
169 // CHECK1-NEXT: store i32 1, i32* [[TMP24]], align 4
170 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
171 // CHECK1-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
172 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
173 // CHECK1-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
174 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
175 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
176 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
177 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
178 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
179 // CHECK1-NEXT: store i8** null, i8*** [[TMP29]], align 8
180 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
181 // CHECK1-NEXT: store i8** null, i8*** [[TMP30]], align 8
182 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
183 // CHECK1-NEXT: store i64 100, i64* [[TMP31]], align 8
184 // CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
185 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
186 // CHECK1-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
187 // CHECK1: omp_offload.failed3:
188 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
189 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
190 // CHECK1: omp_offload.cont4:
191 // CHECK1-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
192 // CHECK1-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
193 // CHECK1-NEXT: [[CALL7:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
194 // CHECK1-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
195 // CHECK1: invoke.cont6:
196 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
197 // CHECK1-NEXT: [[CALL9:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
198 // CHECK1-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
199 // CHECK1: invoke.cont8:
200 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
201 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
202 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
203 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
204 // CHECK1-NEXT: ret i32 [[TMP35]]
205 // CHECK1: eh.resume:
206 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
207 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
208 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
209 // CHECK1-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
210 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
211 //
212 //
213 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El
214 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
215 // CHECK1-NEXT: entry:
216 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
217 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
218 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
219 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
220 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
221 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
222 // CHECK1-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
223 // CHECK1-NEXT: ret void
224 //
225 //
226 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv
227 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
228 // CHECK1-NEXT: entry:
229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
230 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
231 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
232 // CHECK1-NEXT: call void @_Z8mayThrowv()
233 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
234 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
235 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
236 // CHECK1-NEXT: ret i8 [[CONV]]
237 //
238 //
239 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
240 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
241 // CHECK1-NEXT: entry:
242 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
243 // CHECK1-NEXT: ret void
244 //
245 //
246 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
247 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
248 // CHECK1-NEXT: entry:
249 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
250 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
251 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
253 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
254 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
255 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
256 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
258 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
259 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
260 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
261 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
262 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
263 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
264 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
265 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
266 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
267 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
268 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
269 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
270 // CHECK1: cond.true:
271 // CHECK1-NEXT: br label [[COND_END:%.*]]
272 // CHECK1: cond.false:
273 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
274 // CHECK1-NEXT: br label [[COND_END]]
275 // CHECK1: cond.end:
276 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
277 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
278 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
279 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
280 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
281 // CHECK1: omp.inner.for.cond:
282 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
283 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
284 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
285 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
286 // CHECK1: omp.inner.for.body:
287 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group [[ACC_GRP9]]
288 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
289 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
290 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
291 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
292 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP9]]
293 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
294 // CHECK1: omp.inner.for.inc:
295 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
296 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
297 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
298 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
299 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
300 // CHECK1: omp.inner.for.end:
301 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
302 // CHECK1: omp.loop.exit:
303 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
304 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
305 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
306 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
307 // CHECK1: .omp.final.then:
308 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
309 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
310 // CHECK1: .omp.final.done:
311 // CHECK1-NEXT: ret void
312 //
313 //
314 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
315 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
316 // CHECK1-NEXT: entry:
317 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
318 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
319 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
320 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
321 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
322 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
323 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
324 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
325 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
326 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
327 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
328 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
329 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
330 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
331 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
332 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
333 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
334 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
335 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
336 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
337 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
338 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
339 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
340 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
341 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
342 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
343 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
344 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
345 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
346 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
347 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
348 // CHECK1: cond.true:
349 // CHECK1-NEXT: br label [[COND_END:%.*]]
350 // CHECK1: cond.false:
351 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
352 // CHECK1-NEXT: br label [[COND_END]]
353 // CHECK1: cond.end:
354 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
355 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
356 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
357 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
358 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
359 // CHECK1: omp.inner.for.cond:
360 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
361 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
362 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
363 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
364 // CHECK1: omp.inner.for.body:
365 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
366 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
367 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
368 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
369 // CHECK1-NEXT: invoke void @_Z3foov()
370 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP13]]
371 // CHECK1: invoke.cont:
372 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
373 // CHECK1: omp.body.continue:
374 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
375 // CHECK1: omp.inner.for.inc:
376 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
377 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
378 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
379 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
380 // CHECK1: omp.inner.for.end:
381 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
382 // CHECK1: omp.loop.exit:
383 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
384 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
385 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
386 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
387 // CHECK1: .omp.final.then:
388 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
389 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
390 // CHECK1: .omp.final.done:
391 // CHECK1-NEXT: ret void
392 // CHECK1: terminate.lpad:
393 // CHECK1-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
394 // CHECK1-NEXT: catch i8* null
395 // CHECK1-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
396 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group [[ACC_GRP13]]
397 // CHECK1-NEXT: unreachable
398 //
399 //
400 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate
401 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
402 // CHECK1-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
403 // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
404 // CHECK1-NEXT: unreachable
405 //
406 //
407 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
408 // CHECK1-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
409 // CHECK1-NEXT: entry:
410 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
411 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
412 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
413 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
414 // CHECK1-NEXT: ret void
415 //
416 //
417 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
418 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
419 // CHECK1-NEXT: entry:
420 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
421 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
422 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
423 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
424 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
425 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
426 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
427 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
428 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
429 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
430 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
431 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
432 // CHECK1-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
433 // CHECK1-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
434 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
435 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
436 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
437 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
438 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
439 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
440 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
441 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
442 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
443 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
444 // CHECK1: cond.true:
445 // CHECK1-NEXT: br label [[COND_END:%.*]]
446 // CHECK1: cond.false:
447 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
448 // CHECK1-NEXT: br label [[COND_END]]
449 // CHECK1: cond.end:
450 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
451 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
452 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
453 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
454 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
455 // CHECK1: omp.inner.for.cond:
456 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
457 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
458 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
459 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
460 // CHECK1: omp.inner.for.body:
461 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group [[ACC_GRP18]]
462 // CHECK1-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
463 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group [[ACC_GRP18]]
464 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]
465 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
466 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
467 // CHECK1-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
468 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP18]]
469 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
470 // CHECK1: omp.inner.for.inc:
471 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
472 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]
473 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
474 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
475 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
476 // CHECK1: omp.inner.for.end:
477 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
478 // CHECK1: omp.loop.exit:
479 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
480 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
481 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
482 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
483 // CHECK1: .omp.final.then:
484 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
485 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
486 // CHECK1: .omp.final.done:
487 // CHECK1-NEXT: ret void
488 //
489 //
490 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
491 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
492 // CHECK1-NEXT: entry:
493 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
494 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
495 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
496 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
497 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
498 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
499 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
500 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
501 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
502 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
503 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
504 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
505 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
506 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
507 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
508 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
509 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
510 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
511 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
512 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
513 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
514 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
515 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
516 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
517 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
518 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
519 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
520 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
521 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
522 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
523 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
524 // CHECK1: cond.true:
525 // CHECK1-NEXT: br label [[COND_END:%.*]]
526 // CHECK1: cond.false:
527 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
528 // CHECK1-NEXT: br label [[COND_END]]
529 // CHECK1: cond.end:
530 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
531 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
532 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
533 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
534 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
535 // CHECK1: omp.inner.for.cond:
536 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
537 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
538 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
539 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
540 // CHECK1: omp.inner.for.body:
541 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
542 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
543 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
544 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
545 // CHECK1-NEXT: invoke void @_Z3foov()
546 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP21]]
547 // CHECK1: invoke.cont:
548 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
549 // CHECK1: omp.body.continue:
550 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
551 // CHECK1: omp.inner.for.inc:
552 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
553 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
554 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
555 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
556 // CHECK1: omp.inner.for.end:
557 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
558 // CHECK1: omp.loop.exit:
559 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
560 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
561 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
562 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
563 // CHECK1: .omp.final.then:
564 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
565 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
566 // CHECK1: .omp.final.done:
567 // CHECK1-NEXT: ret void
568 // CHECK1: terminate.lpad:
569 // CHECK1-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
570 // CHECK1-NEXT: catch i8* null
571 // CHECK1-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
572 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP21]]
573 // CHECK1-NEXT: unreachable
574 //
575 //
576 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
577 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
578 // CHECK1-NEXT: entry:
579 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
580 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
581 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
582 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
583 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
584 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
585 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
586 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
587 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
588 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
589 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
590 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
591 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
592 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
593 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
594 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
595 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
596 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
597 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
598 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
599 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
600 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
601 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
602 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
603 // CHECK1: omp_offload.failed:
604 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
605 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
606 // CHECK1: omp_offload.cont:
607 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
608 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
609 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
610 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
611 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
612 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
613 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
614 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
615 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
616 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
617 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
618 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
619 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
620 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
621 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
622 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
623 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
624 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
625 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
626 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
627 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
628 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
629 // CHECK1: omp_offload.failed3:
630 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
631 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
632 // CHECK1: omp_offload.cont4:
633 // CHECK1-NEXT: ret i32 0
634 //
635 //
636 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
637 // CHECK1-SAME: () #[[ATTR7]] comdat {
638 // CHECK1-NEXT: entry:
639 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
640 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
641 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
642 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
643 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
644 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
645 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
646 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
647 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
648 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
649 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
650 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
651 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
652 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
653 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
654 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
655 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
656 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
657 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
658 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
659 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
660 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
661 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
662 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
663 // CHECK1: omp_offload.failed:
664 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
665 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
666 // CHECK1: omp_offload.cont:
667 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
668 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
669 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
670 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
671 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
672 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
673 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
674 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
675 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
676 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
677 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
678 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
679 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
680 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
681 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
682 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
683 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
684 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
685 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
686 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
687 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
688 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
689 // CHECK1: omp_offload.failed3:
690 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
691 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
692 // CHECK1: omp_offload.cont4:
693 // CHECK1-NEXT: ret i32 0
694 //
695 //
696 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev
697 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
698 // CHECK1-NEXT: entry:
699 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
700 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
701 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
702 // CHECK1-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
703 // CHECK1-NEXT: ret void
704 //
705 //
706 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El
707 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
708 // CHECK1-NEXT: entry:
709 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
710 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
711 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
712 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
713 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
714 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
715 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
716 // CHECK1-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
717 // CHECK1-NEXT: ret void
718 //
719 //
720 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev
721 // CHECK1-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
722 // CHECK1-NEXT: entry:
723 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
724 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
725 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
726 // CHECK1-NEXT: ret void
727 //
728 //
729 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
730 // CHECK1-SAME: () #[[ATTR3]] {
731 // CHECK1-NEXT: entry:
732 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
733 // CHECK1-NEXT: ret void
734 //
735 //
736 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
737 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
738 // CHECK1-NEXT: entry:
739 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
740 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
741 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
742 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
743 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
744 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
745 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
746 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
747 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
748 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
749 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
750 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
751 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
752 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
753 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
754 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
755 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
756 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
757 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
758 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
759 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
760 // CHECK1: cond.true:
761 // CHECK1-NEXT: br label [[COND_END:%.*]]
762 // CHECK1: cond.false:
763 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
764 // CHECK1-NEXT: br label [[COND_END]]
765 // CHECK1: cond.end:
766 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
767 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
768 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
769 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
770 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
771 // CHECK1: omp.inner.for.cond:
772 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
773 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
774 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
775 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
776 // CHECK1: omp.inner.for.body:
777 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group [[ACC_GRP24]]
778 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]]
779 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
780 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
781 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
782 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]]
783 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
784 // CHECK1: omp.inner.for.inc:
785 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
786 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]]
787 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
788 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
789 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
790 // CHECK1: omp.inner.for.end:
791 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
792 // CHECK1: omp.loop.exit:
793 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
794 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
795 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
796 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
797 // CHECK1: .omp.final.then:
798 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
799 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
800 // CHECK1: .omp.final.done:
801 // CHECK1-NEXT: ret void
802 //
803 //
804 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
805 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
806 // CHECK1-NEXT: entry:
807 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
808 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
809 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
810 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
811 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
812 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
813 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
814 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
815 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
816 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
817 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
818 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
819 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
820 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
821 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
822 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
823 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
824 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
825 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
826 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
827 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
828 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
829 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
830 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
831 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
832 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
833 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
834 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
835 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
836 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
837 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
838 // CHECK1: cond.true:
839 // CHECK1-NEXT: br label [[COND_END:%.*]]
840 // CHECK1: cond.false:
841 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
842 // CHECK1-NEXT: br label [[COND_END]]
843 // CHECK1: cond.end:
844 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
845 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
846 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
847 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
848 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
849 // CHECK1: omp.inner.for.cond:
850 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]
851 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]
852 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
853 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
854 // CHECK1: omp.inner.for.body:
855 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
856 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
857 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
858 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
859 // CHECK1-NEXT: invoke void @_Z3foov()
860 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP27]]
861 // CHECK1: invoke.cont:
862 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
863 // CHECK1: omp.body.continue:
864 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
865 // CHECK1: omp.inner.for.inc:
866 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
867 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
868 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
869 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
870 // CHECK1: omp.inner.for.end:
871 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
872 // CHECK1: omp.loop.exit:
873 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
874 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
875 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
876 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
877 // CHECK1: .omp.final.then:
878 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
879 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
880 // CHECK1: .omp.final.done:
881 // CHECK1-NEXT: ret void
882 // CHECK1: terminate.lpad:
883 // CHECK1-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
884 // CHECK1-NEXT: catch i8* null
885 // CHECK1-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
886 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP27]]
887 // CHECK1-NEXT: unreachable
888 //
889 //
890 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
891 // CHECK1-SAME: () #[[ATTR3]] {
892 // CHECK1-NEXT: entry:
893 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
894 // CHECK1-NEXT: ret void
895 //
896 //
897 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
898 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
899 // CHECK1-NEXT: entry:
900 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
901 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
902 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
903 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
904 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
905 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
906 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
907 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
908 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
909 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
910 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
911 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
912 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
913 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
914 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
915 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
916 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
917 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
918 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
919 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
920 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
921 // CHECK1: cond.true:
922 // CHECK1-NEXT: br label [[COND_END:%.*]]
923 // CHECK1: cond.false:
924 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
925 // CHECK1-NEXT: br label [[COND_END]]
926 // CHECK1: cond.end:
927 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
928 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
929 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
930 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
931 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
932 // CHECK1: omp.inner.for.cond:
933 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]]
934 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
935 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
936 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
937 // CHECK1: omp.inner.for.body:
938 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group [[ACC_GRP30]]
939 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]]
940 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
941 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
942 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
943 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP30]]
944 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
945 // CHECK1: omp.inner.for.inc:
946 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
947 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]]
948 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
949 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
950 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
951 // CHECK1: omp.inner.for.end:
952 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
953 // CHECK1: omp.loop.exit:
954 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
955 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
956 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
957 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
958 // CHECK1: .omp.final.then:
959 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
960 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
961 // CHECK1: .omp.final.done:
962 // CHECK1-NEXT: ret void
963 //
964 //
965 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
966 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
967 // CHECK1-NEXT: entry:
968 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
969 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
970 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
971 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
972 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
973 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
974 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
975 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
976 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
977 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
978 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
979 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
980 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
981 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
982 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
983 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
984 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
985 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
986 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
987 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
988 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
989 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
990 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
991 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
992 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
993 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
994 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
995 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
996 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
997 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
998 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
999 // CHECK1: cond.true:
1000 // CHECK1-NEXT: br label [[COND_END:%.*]]
1001 // CHECK1: cond.false:
1002 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1003 // CHECK1-NEXT: br label [[COND_END]]
1004 // CHECK1: cond.end:
1005 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1006 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1007 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1008 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1009 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1010 // CHECK1: omp.inner.for.cond:
1011 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]]
1012 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]]
1013 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1014 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1015 // CHECK1: omp.inner.for.body:
1016 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
1017 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1018 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1019 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP33]]
1020 // CHECK1-NEXT: invoke void @_Z3foov()
1021 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP33]]
1022 // CHECK1: invoke.cont:
1023 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1024 // CHECK1: omp.body.continue:
1025 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1026 // CHECK1: omp.inner.for.inc:
1027 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
1028 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1029 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
1030 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
1031 // CHECK1: omp.inner.for.end:
1032 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1033 // CHECK1: omp.loop.exit:
1034 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1035 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1036 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1037 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1038 // CHECK1: .omp.final.then:
1039 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1040 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1041 // CHECK1: .omp.final.done:
1042 // CHECK1-NEXT: ret void
1043 // CHECK1: terminate.lpad:
1044 // CHECK1-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
1045 // CHECK1-NEXT: catch i8* null
1046 // CHECK1-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1047 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP33]]
1048 // CHECK1-NEXT: unreachable
1049 //
1050 //
1051 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
1052 // CHECK1-SAME: () #[[ATTR3]] {
1053 // CHECK1-NEXT: entry:
1054 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
1055 // CHECK1-NEXT: ret void
1056 //
1057 //
1058 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
1059 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1060 // CHECK1-NEXT: entry:
1061 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1062 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1063 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1064 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1065 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1066 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1067 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1068 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1069 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1070 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1071 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1072 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1073 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1074 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1075 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1076 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1078 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1079 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1080 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1081 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1082 // CHECK1: cond.true:
1083 // CHECK1-NEXT: br label [[COND_END:%.*]]
1084 // CHECK1: cond.false:
1085 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1086 // CHECK1-NEXT: br label [[COND_END]]
1087 // CHECK1: cond.end:
1088 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1089 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1090 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1091 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1092 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1093 // CHECK1: omp.inner.for.cond:
1094 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]]
1095 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
1096 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1097 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1098 // CHECK1: omp.inner.for.body:
1099 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group [[ACC_GRP36]]
1100 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]]
1101 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1102 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
1103 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1104 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]]
1105 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1106 // CHECK1: omp.inner.for.inc:
1107 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
1108 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]]
1109 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1110 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
1111 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
1112 // CHECK1: omp.inner.for.end:
1113 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1114 // CHECK1: omp.loop.exit:
1115 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1116 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1117 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1118 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1119 // CHECK1: .omp.final.then:
1120 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1121 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1122 // CHECK1: .omp.final.done:
1123 // CHECK1-NEXT: ret void
1124 //
1125 //
1126 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
1127 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1128 // CHECK1-NEXT: entry:
1129 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1130 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1131 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1132 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1133 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1134 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1135 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1136 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1137 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1138 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1139 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1140 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1141 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1142 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1143 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1144 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1145 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1146 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1147 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1148 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1149 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1150 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1151 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1152 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1153 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1154 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1155 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1156 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1157 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1158 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1159 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1160 // CHECK1: cond.true:
1161 // CHECK1-NEXT: br label [[COND_END:%.*]]
1162 // CHECK1: cond.false:
1163 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1164 // CHECK1-NEXT: br label [[COND_END]]
1165 // CHECK1: cond.end:
1166 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1167 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1168 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1169 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1170 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1171 // CHECK1: omp.inner.for.cond:
1172 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
1173 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
1174 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1175 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1176 // CHECK1: omp.inner.for.body:
1177 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
1178 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1179 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1180 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
1181 // CHECK1-NEXT: invoke void @_Z3foov()
1182 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP39]]
1183 // CHECK1: invoke.cont:
1184 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1185 // CHECK1: omp.body.continue:
1186 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1187 // CHECK1: omp.inner.for.inc:
1188 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
1189 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1190 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
1191 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
1192 // CHECK1: omp.inner.for.end:
1193 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1194 // CHECK1: omp.loop.exit:
1195 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1196 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1197 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1198 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1199 // CHECK1: .omp.final.then:
1200 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1201 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1202 // CHECK1: .omp.final.done:
1203 // CHECK1-NEXT: ret void
1204 // CHECK1: terminate.lpad:
1205 // CHECK1-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
1206 // CHECK1-NEXT: catch i8* null
1207 // CHECK1-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1208 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP39]]
1209 // CHECK1-NEXT: unreachable
1210 //
1211 //
1212 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
1213 // CHECK1-SAME: () #[[ATTR3]] {
1214 // CHECK1-NEXT: entry:
1215 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1216 // CHECK1-NEXT: ret void
1217 //
1218 //
1219 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1220 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1221 // CHECK1-NEXT: entry:
1222 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1223 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1224 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1225 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1226 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1227 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1228 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1229 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1230 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1231 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1232 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1233 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1234 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1235 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1236 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1237 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1238 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1239 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1240 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1241 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1242 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1243 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1244 // CHECK1: cond.true:
1245 // CHECK1-NEXT: br label [[COND_END:%.*]]
1246 // CHECK1: cond.false:
1247 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1248 // CHECK1-NEXT: br label [[COND_END]]
1249 // CHECK1: cond.end:
1250 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1251 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1252 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1253 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1254 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1255 // CHECK1: omp.inner.for.cond:
1256 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
1257 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
1258 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1259 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1260 // CHECK1: omp.inner.for.body:
1261 // CHECK1-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
1262 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP42]]
1263 // CHECK1: invoke.cont:
1264 // CHECK1-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
1265 // CHECK1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP42]]
1266 // CHECK1: invoke.cont2:
1267 // CHECK1-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
1268 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group [[ACC_GRP42]]
1269 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group [[ACC_GRP42]]
1270 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]]
1271 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1272 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
1273 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1274 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP42]]
1275 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1276 // CHECK1: omp.inner.for.inc:
1277 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
1278 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]]
1279 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1280 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
1281 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
1282 // CHECK1: omp.inner.for.end:
1283 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1284 // CHECK1: omp.loop.exit:
1285 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1286 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1287 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1288 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1289 // CHECK1: .omp.final.then:
1290 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1291 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1292 // CHECK1: .omp.final.done:
1293 // CHECK1-NEXT: ret void
1294 // CHECK1: terminate.lpad:
1295 // CHECK1-NEXT: [[TMP16:%.*]] = landingpad { i8*, i32 }
1296 // CHECK1-NEXT: catch i8* null
1297 // CHECK1-NEXT: [[TMP17:%.*]] = extractvalue { i8*, i32 } [[TMP16]], 0
1298 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP17]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP42]]
1299 // CHECK1-NEXT: unreachable
1300 //
1301 //
1302 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1303 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1304 // CHECK1-NEXT: entry:
1305 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1306 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1307 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1308 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1309 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1310 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1311 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1312 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1313 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1314 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1315 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1316 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1317 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1318 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1319 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1320 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1321 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1322 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1323 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1324 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1325 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1326 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1327 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1328 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1329 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1330 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1331 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1332 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1333 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1334 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1335 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1336 // CHECK1: cond.true:
1337 // CHECK1-NEXT: br label [[COND_END:%.*]]
1338 // CHECK1: cond.false:
1339 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1340 // CHECK1-NEXT: br label [[COND_END]]
1341 // CHECK1: cond.end:
1342 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1343 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1344 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1345 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1346 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1347 // CHECK1: omp.inner.for.cond:
1348 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]]
1349 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
1350 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1351 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1352 // CHECK1: omp.inner.for.body:
1353 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
1354 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1355 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1356 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP45]]
1357 // CHECK1-NEXT: invoke void @_Z3foov()
1358 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP45]]
1359 // CHECK1: invoke.cont:
1360 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1361 // CHECK1: omp.body.continue:
1362 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1363 // CHECK1: omp.inner.for.inc:
1364 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
1365 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1366 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
1367 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
1368 // CHECK1: omp.inner.for.end:
1369 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1370 // CHECK1: omp.loop.exit:
1371 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1372 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1373 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1374 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1375 // CHECK1: .omp.final.then:
1376 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1377 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1378 // CHECK1: .omp.final.done:
1379 // CHECK1-NEXT: ret void
1380 // CHECK1: terminate.lpad:
1381 // CHECK1-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
1382 // CHECK1-NEXT: catch i8* null
1383 // CHECK1-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
1384 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP45]]
1385 // CHECK1-NEXT: unreachable
1386 //
1387 //
1388 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1389 // CHECK1-SAME: () #[[ATTR9:[0-9]+]] {
1390 // CHECK1-NEXT: entry:
1391 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1392 // CHECK1-NEXT: ret void
1393 //
1394 //
1395 // CHECK3-LABEL: define {{[^@]+}}@main
1396 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1397 // CHECK3-NEXT: entry:
1398 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1399 // CHECK3-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1400 // CHECK3-NEXT: [[A:%.*]] = alloca i8, align 1
1401 // CHECK3-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
1402 // CHECK3-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1403 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1404 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1405 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1406 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1407 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1408 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1409 // CHECK3-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1410 // CHECK3-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1411 // CHECK3-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1412 // CHECK3-NEXT: [[I7:%.*]] = alloca i32, align 4
1413 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
1414 // CHECK3-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
1415 // CHECK3-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
1416 // CHECK3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1417 // CHECK3: invoke.cont:
1418 // CHECK3-NEXT: store i8 [[CALL]], i8* [[A]], align 1
1419 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1420 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1421 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1422 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1423 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1424 // CHECK3: omp.inner.for.cond:
1425 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
1426 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
1427 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1428 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1429 // CHECK3: omp.inner.for.body:
1430 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
1431 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1432 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1433 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
1434 // CHECK3-NEXT: invoke void @_Z3foov()
1435 // CHECK3-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP2]]
1436 // CHECK3: invoke.cont1:
1437 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1438 // CHECK3: omp.body.continue:
1439 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1440 // CHECK3: omp.inner.for.inc:
1441 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
1442 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
1443 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
1444 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1445 // CHECK3: lpad:
1446 // CHECK3-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
1447 // CHECK3-NEXT: cleanup
1448 // CHECK3-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
1449 // CHECK3-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
1450 // CHECK3-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
1451 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
1452 // CHECK3-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
1453 // CHECK3-NEXT: br label [[EH_RESUME:%.*]]
1454 // CHECK3: omp.inner.for.end:
1455 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1456 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
1457 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB5]], align 4
1458 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
1459 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
1460 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
1461 // CHECK3: omp.inner.for.cond8:
1462 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
1463 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]]
1464 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1465 // CHECK3-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
1466 // CHECK3: omp.inner.for.body10:
1467 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
1468 // CHECK3-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
1469 // CHECK3-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1470 // CHECK3-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]
1471 // CHECK3-NEXT: invoke void @_Z3foov()
1472 // CHECK3-NEXT: to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP6]]
1473 // CHECK3: invoke.cont13:
1474 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
1475 // CHECK3: omp.body.continue14:
1476 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
1477 // CHECK3: omp.inner.for.inc15:
1478 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
1479 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
1480 // CHECK3-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
1481 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
1482 // CHECK3: omp.inner.for.end17:
1483 // CHECK3-NEXT: store i32 100, i32* [[I7]], align 4
1484 // CHECK3-NEXT: [[TMP13:%.*]] = load i8, i8* [[A]], align 1
1485 // CHECK3-NEXT: [[CONV:%.*]] = sext i8 [[TMP13]] to i32
1486 // CHECK3-NEXT: [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
1487 // CHECK3-NEXT: to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
1488 // CHECK3: invoke.cont18:
1489 // CHECK3-NEXT: [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
1490 // CHECK3-NEXT: [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
1491 // CHECK3-NEXT: to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
1492 // CHECK3: invoke.cont21:
1493 // CHECK3-NEXT: [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
1494 // CHECK3-NEXT: store i32 [[ADD23]], i32* [[RETVAL]], align 4
1495 // CHECK3-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
1496 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
1497 // CHECK3-NEXT: ret i32 [[TMP14]]
1498 // CHECK3: eh.resume:
1499 // CHECK3-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
1500 // CHECK3-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1501 // CHECK3-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1502 // CHECK3-NEXT: [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1503 // CHECK3-NEXT: resume { i8*, i32 } [[LPAD_VAL24]]
1504 // CHECK3: terminate.lpad:
1505 // CHECK3-NEXT: [[TMP15:%.*]] = landingpad { i8*, i32 }
1506 // CHECK3-NEXT: catch i8* null
1507 // CHECK3-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
1508 // CHECK3-NEXT: call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group [[ACC_GRP2]]
1509 // CHECK3-NEXT: unreachable
1510 //
1511 //
1512 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC1El
1513 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1514 // CHECK3-NEXT: entry:
1515 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1516 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1517 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1518 // CHECK3-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1519 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1520 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1521 // CHECK3-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
1522 // CHECK3-NEXT: ret void
1523 //
1524 //
1525 // CHECK3-LABEL: define {{[^@]+}}@_ZN1ScvcEv
1526 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
1527 // CHECK3-NEXT: entry:
1528 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1529 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1530 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1531 // CHECK3-NEXT: call void @_Z8mayThrowv()
1532 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1533 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
1534 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
1535 // CHECK3-NEXT: ret i8 [[CONV]]
1536 //
1537 //
1538 // CHECK3-LABEL: define {{[^@]+}}@__clang_call_terminate
1539 // CHECK3-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
1540 // CHECK3-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
1541 // CHECK3-NEXT: call void @_ZSt9terminatev() #[[ATTR8]]
1542 // CHECK3-NEXT: unreachable
1543 //
1544 //
1545 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
1546 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1547 // CHECK3-NEXT: entry:
1548 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1549 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1550 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1551 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1552 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1553 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1554 // CHECK3-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
1555 // CHECK3-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
1556 // CHECK3-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
1557 // CHECK3-NEXT: [[I6:%.*]] = alloca i32, align 4
1558 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1559 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1560 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1561 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1562 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1563 // CHECK3: omp.inner.for.cond:
1564 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
1565 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1566 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1567 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1568 // CHECK3: omp.inner.for.body:
1569 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1570 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1571 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1572 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
1573 // CHECK3-NEXT: invoke void @_Z3foov()
1574 // CHECK3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP9]]
1575 // CHECK3: invoke.cont:
1576 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1577 // CHECK3: omp.body.continue:
1578 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1579 // CHECK3: omp.inner.for.inc:
1580 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1581 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
1582 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1583 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1584 // CHECK3: omp.inner.for.end:
1585 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1586 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
1587 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
1588 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
1589 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
1590 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
1591 // CHECK3: omp.inner.for.cond7:
1592 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
1593 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
1594 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1595 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
1596 // CHECK3: omp.inner.for.body9:
1597 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
1598 // CHECK3-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
1599 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1600 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
1601 // CHECK3-NEXT: invoke void @_Z3foov()
1602 // CHECK3-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP12]]
1603 // CHECK3: invoke.cont12:
1604 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
1605 // CHECK3: omp.body.continue13:
1606 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
1607 // CHECK3: omp.inner.for.inc14:
1608 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
1609 // CHECK3-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
1610 // CHECK3-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
1611 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
1612 // CHECK3: omp.inner.for.end16:
1613 // CHECK3-NEXT: store i32 100, i32* [[I6]], align 4
1614 // CHECK3-NEXT: ret i32 0
1615 // CHECK3: terminate.lpad:
1616 // CHECK3-NEXT: [[TMP10:%.*]] = landingpad { i8*, i32 }
1617 // CHECK3-NEXT: catch i8* null
1618 // CHECK3-NEXT: [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
1619 // CHECK3-NEXT: call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group [[ACC_GRP9]]
1620 // CHECK3-NEXT: unreachable
1621 //
1622 //
1623 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
1624 // CHECK3-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1625 // CHECK3-NEXT: entry:
1626 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1627 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1628 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1629 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1630 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1631 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1632 // CHECK3-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
1633 // CHECK3-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
1634 // CHECK3-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
1635 // CHECK3-NEXT: [[I6:%.*]] = alloca i32, align 4
1636 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1637 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1638 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1639 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1640 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1641 // CHECK3: omp.inner.for.cond:
1642 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
1643 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1644 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1645 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1646 // CHECK3: omp.inner.for.body:
1647 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1648 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1649 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1650 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
1651 // CHECK3-NEXT: invoke void @_Z3foov()
1652 // CHECK3-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP15]]
1653 // CHECK3: invoke.cont:
1654 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1655 // CHECK3: omp.body.continue:
1656 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1657 // CHECK3: omp.inner.for.inc:
1658 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1659 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
1660 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1661 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1662 // CHECK3: omp.inner.for.end:
1663 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1664 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
1665 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
1666 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
1667 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
1668 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
1669 // CHECK3: omp.inner.for.cond7:
1670 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
1671 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP18]]
1672 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1673 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
1674 // CHECK3: omp.inner.for.body9:
1675 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18]]
1676 // CHECK3-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
1677 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1678 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP18]]
1679 // CHECK3-NEXT: invoke void @_Z3foov()
1680 // CHECK3-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP18]]
1681 // CHECK3: invoke.cont12:
1682 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
1683 // CHECK3: omp.body.continue13:
1684 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
1685 // CHECK3: omp.inner.for.inc14:
1686 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18]]
1687 // CHECK3-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
1688 // CHECK3-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18]]
1689 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP19:![0-9]+]]
1690 // CHECK3: omp.inner.for.end16:
1691 // CHECK3-NEXT: store i32 100, i32* [[I6]], align 4
1692 // CHECK3-NEXT: ret i32 0
1693 // CHECK3: terminate.lpad:
1694 // CHECK3-NEXT: [[TMP10:%.*]] = landingpad { i8*, i32 }
1695 // CHECK3-NEXT: catch i8* null
1696 // CHECK3-NEXT: [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
1697 // CHECK3-NEXT: call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group [[ACC_GRP15]]
1698 // CHECK3-NEXT: unreachable
1699 //
1700 //
1701 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SD1Ev
1702 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
1703 // CHECK3-NEXT: entry:
1704 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1705 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1706 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1707 // CHECK3-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
1708 // CHECK3-NEXT: ret void
1709 //
1710 //
1711 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC2El
1712 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
1713 // CHECK3-NEXT: entry:
1714 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1715 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1716 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1717 // CHECK3-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1718 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1719 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1720 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1721 // CHECK3-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
1722 // CHECK3-NEXT: ret void
1723 //
1724 //
1725 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SD2Ev
1726 // CHECK3-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
1727 // CHECK3-NEXT: entry:
1728 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1729 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1730 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1731 // CHECK3-NEXT: ret void
1732 //
1733 //
1734 // CHECK5-LABEL: define {{[^@]+}}@main
1735 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1736 // CHECK5-NEXT: entry:
1737 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1738 // CHECK5-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1739 // CHECK5-NEXT: [[A:%.*]] = alloca i8, align 1
1740 // CHECK5-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
1741 // CHECK5-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1742 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1743 // CHECK5-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1744 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1745 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1746 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1747 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1748 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
1749 // CHECK5-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
1750 // CHECK5-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
1751 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1752 // CHECK5: invoke.cont:
1753 // CHECK5-NEXT: store i8 [[CALL]], i8* [[A]], align 1
1754 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1755 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1756 // CHECK5-NEXT: store i32 1, i32* [[TMP0]], align 4
1757 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1758 // CHECK5-NEXT: store i32 0, i32* [[TMP1]], align 4
1759 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1760 // CHECK5-NEXT: store i8** null, i8*** [[TMP2]], align 8
1761 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1762 // CHECK5-NEXT: store i8** null, i8*** [[TMP3]], align 8
1763 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1764 // CHECK5-NEXT: store i64* null, i64** [[TMP4]], align 8
1765 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1766 // CHECK5-NEXT: store i64* null, i64** [[TMP5]], align 8
1767 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1768 // CHECK5-NEXT: store i8** null, i8*** [[TMP6]], align 8
1769 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1770 // CHECK5-NEXT: store i8** null, i8*** [[TMP7]], align 8
1771 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1772 // CHECK5-NEXT: store i64 100, i64* [[TMP8]], align 8
1773 // CHECK5-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1774 // CHECK5-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1775 // CHECK5-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1776 // CHECK5: omp_offload.failed:
1777 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
1778 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
1779 // CHECK5: lpad:
1780 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
1781 // CHECK5-NEXT: cleanup
1782 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1783 // CHECK5-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
1784 // CHECK5-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
1785 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
1786 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1787 // CHECK5-NEXT: br label [[EH_RESUME:%.*]]
1788 // CHECK5: omp_offload.cont:
1789 // CHECK5-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
1790 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
1791 // CHECK5-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
1792 // CHECK5-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
1793 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1794 // CHECK5-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
1795 // CHECK5-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
1796 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1797 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
1798 // CHECK5-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
1799 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1800 // CHECK5-NEXT: store i8* null, i8** [[TMP20]], align 8
1801 // CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1802 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1803 // CHECK5-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1804 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1805 // CHECK5-NEXT: store i32 1, i32* [[TMP23]], align 4
1806 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1807 // CHECK5-NEXT: store i32 1, i32* [[TMP24]], align 4
1808 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1809 // CHECK5-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
1810 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1811 // CHECK5-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
1812 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1813 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
1814 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1815 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
1816 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1817 // CHECK5-NEXT: store i8** null, i8*** [[TMP29]], align 8
1818 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1819 // CHECK5-NEXT: store i8** null, i8*** [[TMP30]], align 8
1820 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1821 // CHECK5-NEXT: store i64 100, i64* [[TMP31]], align 8
1822 // CHECK5-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1823 // CHECK5-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
1824 // CHECK5-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1825 // CHECK5: omp_offload.failed3:
1826 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
1827 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1828 // CHECK5: omp_offload.cont4:
1829 // CHECK5-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
1830 // CHECK5-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
1831 // CHECK5-NEXT: [[CALL7:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
1832 // CHECK5-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
1833 // CHECK5: invoke.cont6:
1834 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
1835 // CHECK5-NEXT: [[CALL9:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
1836 // CHECK5-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
1837 // CHECK5: invoke.cont8:
1838 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
1839 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
1840 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1841 // CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
1842 // CHECK5-NEXT: ret i32 [[TMP35]]
1843 // CHECK5: eh.resume:
1844 // CHECK5-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
1845 // CHECK5-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1846 // CHECK5-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1847 // CHECK5-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1848 // CHECK5-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
1849 //
1850 //
1851 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El
1852 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1853 // CHECK5-NEXT: entry:
1854 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1855 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1856 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1857 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1858 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1859 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1860 // CHECK5-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
1861 // CHECK5-NEXT: ret void
1862 //
1863 //
1864 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv
1865 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
1866 // CHECK5-NEXT: entry:
1867 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1868 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1869 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1870 // CHECK5-NEXT: call void @_Z8mayThrowv()
1871 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1872 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
1873 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
1874 // CHECK5-NEXT: ret i8 [[CONV]]
1875 //
1876 //
1877 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
1878 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
1879 // CHECK5-NEXT: entry:
1880 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1881 // CHECK5-NEXT: ret void
1882 //
1883 //
1884 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
1885 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1886 // CHECK5-NEXT: entry:
1887 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1888 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1889 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1890 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1891 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1892 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1893 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1894 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1895 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1896 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1897 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1898 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1899 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1900 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1901 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1902 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1903 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1904 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1905 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1906 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1907 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1908 // CHECK5: cond.true:
1909 // CHECK5-NEXT: br label [[COND_END:%.*]]
1910 // CHECK5: cond.false:
1911 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1912 // CHECK5-NEXT: br label [[COND_END]]
1913 // CHECK5: cond.end:
1914 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1915 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1916 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1917 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1918 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1919 // CHECK5: omp.inner.for.cond:
1920 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
1921 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1922 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1923 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1924 // CHECK5: omp.inner.for.body:
1925 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group [[ACC_GRP9]]
1926 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
1927 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1928 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1929 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1930 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP9]]
1931 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1932 // CHECK5: omp.inner.for.inc:
1933 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1934 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
1935 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1936 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1937 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1938 // CHECK5: omp.inner.for.end:
1939 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1940 // CHECK5: omp.loop.exit:
1941 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1942 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1943 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1944 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1945 // CHECK5: .omp.final.then:
1946 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
1947 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
1948 // CHECK5: .omp.final.done:
1949 // CHECK5-NEXT: ret void
1950 //
1951 //
1952 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
1953 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1954 // CHECK5-NEXT: entry:
1955 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1956 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1957 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1958 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1959 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1960 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1961 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1962 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1963 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1964 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1965 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1966 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1967 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1968 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1969 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1970 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1971 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1972 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1973 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1974 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1975 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1976 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1977 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1978 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1979 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1980 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1981 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1982 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1983 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1984 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1985 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1986 // CHECK5: cond.true:
1987 // CHECK5-NEXT: br label [[COND_END:%.*]]
1988 // CHECK5: cond.false:
1989 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1990 // CHECK5-NEXT: br label [[COND_END]]
1991 // CHECK5: cond.end:
1992 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1993 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1994 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1995 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1996 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1997 // CHECK5: omp.inner.for.cond:
1998 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
1999 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
2000 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2001 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2002 // CHECK5: omp.inner.for.body:
2003 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
2004 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2005 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2006 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
2007 // CHECK5-NEXT: invoke void @_Z3foov()
2008 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP13]]
2009 // CHECK5: invoke.cont:
2010 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2011 // CHECK5: omp.body.continue:
2012 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2013 // CHECK5: omp.inner.for.inc:
2014 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
2015 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2016 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
2017 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2018 // CHECK5: omp.inner.for.end:
2019 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2020 // CHECK5: omp.loop.exit:
2021 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2022 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2023 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2024 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2025 // CHECK5: .omp.final.then:
2026 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2027 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2028 // CHECK5: .omp.final.done:
2029 // CHECK5-NEXT: ret void
2030 // CHECK5: terminate.lpad:
2031 // CHECK5-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
2032 // CHECK5-NEXT: catch i8* null
2033 // CHECK5-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2034 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group [[ACC_GRP13]]
2035 // CHECK5-NEXT: unreachable
2036 //
2037 //
2038 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate
2039 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2040 // CHECK5-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
2041 // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
2042 // CHECK5-NEXT: unreachable
2043 //
2044 //
2045 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
2046 // CHECK5-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
2047 // CHECK5-NEXT: entry:
2048 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2049 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2050 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
2051 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
2052 // CHECK5-NEXT: ret void
2053 //
2054 //
2055 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
2056 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
2057 // CHECK5-NEXT: entry:
2058 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2059 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2060 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
2061 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2062 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2063 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2064 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2065 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2066 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2067 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2068 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2069 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2070 // CHECK5-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
2071 // CHECK5-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
2072 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2073 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2074 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2075 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2076 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2077 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2078 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2079 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2080 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
2081 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2082 // CHECK5: cond.true:
2083 // CHECK5-NEXT: br label [[COND_END:%.*]]
2084 // CHECK5: cond.false:
2085 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2086 // CHECK5-NEXT: br label [[COND_END]]
2087 // CHECK5: cond.end:
2088 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2089 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2090 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2091 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2092 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2093 // CHECK5: omp.inner.for.cond:
2094 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
2095 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
2096 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2097 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2098 // CHECK5: omp.inner.for.body:
2099 // CHECK5-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group [[ACC_GRP18]]
2100 // CHECK5-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
2101 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group [[ACC_GRP18]]
2102 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]
2103 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2104 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
2105 // CHECK5-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
2106 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP18]]
2107 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2108 // CHECK5: omp.inner.for.inc:
2109 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2110 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]
2111 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2112 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2113 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
2114 // CHECK5: omp.inner.for.end:
2115 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2116 // CHECK5: omp.loop.exit:
2117 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2118 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2119 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2120 // CHECK5-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2121 // CHECK5: .omp.final.then:
2122 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2123 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2124 // CHECK5: .omp.final.done:
2125 // CHECK5-NEXT: ret void
2126 //
2127 //
2128 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
2129 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2130 // CHECK5-NEXT: entry:
2131 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2132 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2133 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2134 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2135 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2136 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2137 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2138 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2139 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2140 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2141 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2142 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2143 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2144 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2145 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2146 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2147 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2148 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2149 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2150 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2151 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2152 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2153 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2154 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2155 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2156 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2157 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2158 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2159 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2160 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2161 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2162 // CHECK5: cond.true:
2163 // CHECK5-NEXT: br label [[COND_END:%.*]]
2164 // CHECK5: cond.false:
2165 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2166 // CHECK5-NEXT: br label [[COND_END]]
2167 // CHECK5: cond.end:
2168 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2169 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2170 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2171 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2172 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2173 // CHECK5: omp.inner.for.cond:
2174 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
2175 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
2176 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2177 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2178 // CHECK5: omp.inner.for.body:
2179 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
2180 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2181 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2182 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
2183 // CHECK5-NEXT: invoke void @_Z3foov()
2184 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP21]]
2185 // CHECK5: invoke.cont:
2186 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2187 // CHECK5: omp.body.continue:
2188 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2189 // CHECK5: omp.inner.for.inc:
2190 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
2191 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2192 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
2193 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
2194 // CHECK5: omp.inner.for.end:
2195 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2196 // CHECK5: omp.loop.exit:
2197 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2198 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2199 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2200 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2201 // CHECK5: .omp.final.then:
2202 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2203 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2204 // CHECK5: .omp.final.done:
2205 // CHECK5-NEXT: ret void
2206 // CHECK5: terminate.lpad:
2207 // CHECK5-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
2208 // CHECK5-NEXT: catch i8* null
2209 // CHECK5-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2210 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP21]]
2211 // CHECK5-NEXT: unreachable
2212 //
2213 //
2214 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
2215 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat {
2216 // CHECK5-NEXT: entry:
2217 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2218 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2219 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2220 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2221 // CHECK5-NEXT: store i32 1, i32* [[TMP0]], align 4
2222 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2223 // CHECK5-NEXT: store i32 0, i32* [[TMP1]], align 4
2224 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2225 // CHECK5-NEXT: store i8** null, i8*** [[TMP2]], align 8
2226 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2227 // CHECK5-NEXT: store i8** null, i8*** [[TMP3]], align 8
2228 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2229 // CHECK5-NEXT: store i64* null, i64** [[TMP4]], align 8
2230 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2231 // CHECK5-NEXT: store i64* null, i64** [[TMP5]], align 8
2232 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2233 // CHECK5-NEXT: store i8** null, i8*** [[TMP6]], align 8
2234 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2235 // CHECK5-NEXT: store i8** null, i8*** [[TMP7]], align 8
2236 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2237 // CHECK5-NEXT: store i64 100, i64* [[TMP8]], align 8
2238 // CHECK5-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2239 // CHECK5-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2240 // CHECK5-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2241 // CHECK5: omp_offload.failed:
2242 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
2243 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
2244 // CHECK5: omp_offload.cont:
2245 // CHECK5-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2246 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
2247 // CHECK5-NEXT: store i32 1, i32* [[TMP11]], align 4
2248 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
2249 // CHECK5-NEXT: store i32 0, i32* [[TMP12]], align 4
2250 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
2251 // CHECK5-NEXT: store i8** null, i8*** [[TMP13]], align 8
2252 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
2253 // CHECK5-NEXT: store i8** null, i8*** [[TMP14]], align 8
2254 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
2255 // CHECK5-NEXT: store i64* null, i64** [[TMP15]], align 8
2256 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
2257 // CHECK5-NEXT: store i64* null, i64** [[TMP16]], align 8
2258 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
2259 // CHECK5-NEXT: store i8** null, i8*** [[TMP17]], align 8
2260 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
2261 // CHECK5-NEXT: store i8** null, i8*** [[TMP18]], align 8
2262 // CHECK5-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
2263 // CHECK5-NEXT: store i64 100, i64* [[TMP19]], align 8
2264 // CHECK5-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
2265 // CHECK5-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2266 // CHECK5-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2267 // CHECK5: omp_offload.failed3:
2268 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
2269 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT4]]
2270 // CHECK5: omp_offload.cont4:
2271 // CHECK5-NEXT: ret i32 0
2272 //
2273 //
2274 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
2275 // CHECK5-SAME: () #[[ATTR7]] comdat {
2276 // CHECK5-NEXT: entry:
2277 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2278 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2279 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2280 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2281 // CHECK5-NEXT: store i32 1, i32* [[TMP0]], align 4
2282 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2283 // CHECK5-NEXT: store i32 0, i32* [[TMP1]], align 4
2284 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2285 // CHECK5-NEXT: store i8** null, i8*** [[TMP2]], align 8
2286 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2287 // CHECK5-NEXT: store i8** null, i8*** [[TMP3]], align 8
2288 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2289 // CHECK5-NEXT: store i64* null, i64** [[TMP4]], align 8
2290 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2291 // CHECK5-NEXT: store i64* null, i64** [[TMP5]], align 8
2292 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2293 // CHECK5-NEXT: store i8** null, i8*** [[TMP6]], align 8
2294 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2295 // CHECK5-NEXT: store i8** null, i8*** [[TMP7]], align 8
2296 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2297 // CHECK5-NEXT: store i64 100, i64* [[TMP8]], align 8
2298 // CHECK5-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2299 // CHECK5-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2300 // CHECK5-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2301 // CHECK5: omp_offload.failed:
2302 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
2303 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
2304 // CHECK5: omp_offload.cont:
2305 // CHECK5-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2306 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
2307 // CHECK5-NEXT: store i32 1, i32* [[TMP11]], align 4
2308 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
2309 // CHECK5-NEXT: store i32 0, i32* [[TMP12]], align 4
2310 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
2311 // CHECK5-NEXT: store i8** null, i8*** [[TMP13]], align 8
2312 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
2313 // CHECK5-NEXT: store i8** null, i8*** [[TMP14]], align 8
2314 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
2315 // CHECK5-NEXT: store i64* null, i64** [[TMP15]], align 8
2316 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
2317 // CHECK5-NEXT: store i64* null, i64** [[TMP16]], align 8
2318 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
2319 // CHECK5-NEXT: store i8** null, i8*** [[TMP17]], align 8
2320 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
2321 // CHECK5-NEXT: store i8** null, i8*** [[TMP18]], align 8
2322 // CHECK5-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
2323 // CHECK5-NEXT: store i64 100, i64* [[TMP19]], align 8
2324 // CHECK5-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
2325 // CHECK5-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2326 // CHECK5-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2327 // CHECK5: omp_offload.failed3:
2328 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
2329 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT4]]
2330 // CHECK5: omp_offload.cont4:
2331 // CHECK5-NEXT: ret i32 0
2332 //
2333 //
2334 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev
2335 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
2336 // CHECK5-NEXT: entry:
2337 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2338 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2339 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2340 // CHECK5-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
2341 // CHECK5-NEXT: ret void
2342 //
2343 //
2344 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El
2345 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
2346 // CHECK5-NEXT: entry:
2347 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2348 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2349 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2350 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2351 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2352 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2353 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
2354 // CHECK5-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
2355 // CHECK5-NEXT: ret void
2356 //
2357 //
2358 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
2359 // CHECK5-SAME: () #[[ATTR3]] {
2360 // CHECK5-NEXT: entry:
2361 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2362 // CHECK5-NEXT: ret void
2363 //
2364 //
2365 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4
2366 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2367 // CHECK5-NEXT: entry:
2368 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2369 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2370 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2371 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2372 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2373 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2374 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2375 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2376 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2377 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2378 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2379 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2380 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2381 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2382 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2383 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2384 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2385 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2386 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2387 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2388 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2389 // CHECK5: cond.true:
2390 // CHECK5-NEXT: br label [[COND_END:%.*]]
2391 // CHECK5: cond.false:
2392 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2393 // CHECK5-NEXT: br label [[COND_END]]
2394 // CHECK5: cond.end:
2395 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2396 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2397 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2398 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2399 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2400 // CHECK5: omp.inner.for.cond:
2401 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
2402 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
2403 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2404 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2405 // CHECK5: omp.inner.for.body:
2406 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group [[ACC_GRP24]]
2407 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]]
2408 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2409 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
2410 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2411 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]]
2412 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2413 // CHECK5: omp.inner.for.inc:
2414 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
2415 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]]
2416 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2417 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
2418 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
2419 // CHECK5: omp.inner.for.end:
2420 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2421 // CHECK5: omp.loop.exit:
2422 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2423 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2424 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2425 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2426 // CHECK5: .omp.final.then:
2427 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2428 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2429 // CHECK5: .omp.final.done:
2430 // CHECK5-NEXT: ret void
2431 //
2432 //
2433 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5
2434 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2435 // CHECK5-NEXT: entry:
2436 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2437 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2438 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2439 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2440 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2441 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2442 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2443 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2444 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2445 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2446 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2447 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2448 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2449 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2450 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2451 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2452 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2453 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2454 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2455 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2456 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2457 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2458 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2459 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2460 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2461 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2462 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2463 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2464 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2465 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2466 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2467 // CHECK5: cond.true:
2468 // CHECK5-NEXT: br label [[COND_END:%.*]]
2469 // CHECK5: cond.false:
2470 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2471 // CHECK5-NEXT: br label [[COND_END]]
2472 // CHECK5: cond.end:
2473 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2474 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2475 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2476 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2477 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2478 // CHECK5: omp.inner.for.cond:
2479 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]
2480 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]
2481 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2482 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2483 // CHECK5: omp.inner.for.body:
2484 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
2485 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2486 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2487 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
2488 // CHECK5-NEXT: invoke void @_Z3foov()
2489 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP27]]
2490 // CHECK5: invoke.cont:
2491 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2492 // CHECK5: omp.body.continue:
2493 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2494 // CHECK5: omp.inner.for.inc:
2495 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
2496 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2497 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
2498 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
2499 // CHECK5: omp.inner.for.end:
2500 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2501 // CHECK5: omp.loop.exit:
2502 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2503 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2504 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2505 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2506 // CHECK5: .omp.final.then:
2507 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2508 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2509 // CHECK5: .omp.final.done:
2510 // CHECK5-NEXT: ret void
2511 // CHECK5: terminate.lpad:
2512 // CHECK5-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
2513 // CHECK5-NEXT: catch i8* null
2514 // CHECK5-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2515 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP27]]
2516 // CHECK5-NEXT: unreachable
2517 //
2518 //
2519 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
2520 // CHECK5-SAME: () #[[ATTR3]] {
2521 // CHECK5-NEXT: entry:
2522 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
2523 // CHECK5-NEXT: ret void
2524 //
2525 //
2526 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
2527 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2528 // CHECK5-NEXT: entry:
2529 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2530 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2531 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2532 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2533 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2534 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2535 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2536 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2537 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2538 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2539 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2540 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2541 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2542 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2543 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2544 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2545 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2546 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2547 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2548 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2549 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2550 // CHECK5: cond.true:
2551 // CHECK5-NEXT: br label [[COND_END:%.*]]
2552 // CHECK5: cond.false:
2553 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2554 // CHECK5-NEXT: br label [[COND_END]]
2555 // CHECK5: cond.end:
2556 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2557 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2558 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2559 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2560 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2561 // CHECK5: omp.inner.for.cond:
2562 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]]
2563 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
2564 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2565 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2566 // CHECK5: omp.inner.for.body:
2567 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group [[ACC_GRP30]]
2568 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]]
2569 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2570 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
2571 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2572 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP30]]
2573 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2574 // CHECK5: omp.inner.for.inc:
2575 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
2576 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]]
2577 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2578 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
2579 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
2580 // CHECK5: omp.inner.for.end:
2581 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2582 // CHECK5: omp.loop.exit:
2583 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2584 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2585 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2586 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2587 // CHECK5: .omp.final.then:
2588 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2589 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2590 // CHECK5: .omp.final.done:
2591 // CHECK5-NEXT: ret void
2592 //
2593 //
2594 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
2595 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2596 // CHECK5-NEXT: entry:
2597 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2598 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2599 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2600 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2601 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2602 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2603 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2604 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2605 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2606 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2607 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2608 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2609 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2610 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2611 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2612 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2613 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2614 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2615 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2616 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2617 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2618 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2619 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2620 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2621 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2622 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2623 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2624 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2625 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2626 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2627 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2628 // CHECK5: cond.true:
2629 // CHECK5-NEXT: br label [[COND_END:%.*]]
2630 // CHECK5: cond.false:
2631 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2632 // CHECK5-NEXT: br label [[COND_END]]
2633 // CHECK5: cond.end:
2634 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2635 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2636 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2637 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2638 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2639 // CHECK5: omp.inner.for.cond:
2640 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]]
2641 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]]
2642 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2643 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2644 // CHECK5: omp.inner.for.body:
2645 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
2646 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2647 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2648 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP33]]
2649 // CHECK5-NEXT: invoke void @_Z3foov()
2650 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP33]]
2651 // CHECK5: invoke.cont:
2652 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2653 // CHECK5: omp.body.continue:
2654 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2655 // CHECK5: omp.inner.for.inc:
2656 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
2657 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2658 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
2659 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2660 // CHECK5: omp.inner.for.end:
2661 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2662 // CHECK5: omp.loop.exit:
2663 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2664 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2665 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2666 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2667 // CHECK5: .omp.final.then:
2668 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2669 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2670 // CHECK5: .omp.final.done:
2671 // CHECK5-NEXT: ret void
2672 // CHECK5: terminate.lpad:
2673 // CHECK5-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
2674 // CHECK5-NEXT: catch i8* null
2675 // CHECK5-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2676 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP33]]
2677 // CHECK5-NEXT: unreachable
2678 //
2679 //
2680 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
2681 // CHECK5-SAME: () #[[ATTR3]] {
2682 // CHECK5-NEXT: entry:
2683 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
2684 // CHECK5-NEXT: ret void
2685 //
2686 //
2687 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8
2688 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2689 // CHECK5-NEXT: entry:
2690 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2691 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2692 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2693 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2694 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2695 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2696 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2697 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2698 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2699 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2700 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2701 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2702 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2703 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2704 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2705 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2706 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2707 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2708 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2709 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2710 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2711 // CHECK5: cond.true:
2712 // CHECK5-NEXT: br label [[COND_END:%.*]]
2713 // CHECK5: cond.false:
2714 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2715 // CHECK5-NEXT: br label [[COND_END]]
2716 // CHECK5: cond.end:
2717 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2718 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2719 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2720 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2721 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2722 // CHECK5: omp.inner.for.cond:
2723 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]]
2724 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
2725 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2726 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2727 // CHECK5: omp.inner.for.body:
2728 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group [[ACC_GRP36]]
2729 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]]
2730 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2731 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
2732 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2733 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]]
2734 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2735 // CHECK5: omp.inner.for.inc:
2736 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
2737 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]]
2738 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2739 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
2740 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
2741 // CHECK5: omp.inner.for.end:
2742 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2743 // CHECK5: omp.loop.exit:
2744 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2745 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2746 // CHECK5-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2747 // CHECK5-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2748 // CHECK5: .omp.final.then:
2749 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2750 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2751 // CHECK5: .omp.final.done:
2752 // CHECK5-NEXT: ret void
2753 //
2754 //
2755 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9
2756 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2757 // CHECK5-NEXT: entry:
2758 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2759 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2760 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2761 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2762 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2763 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2764 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2765 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2766 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2767 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2768 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2769 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2770 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2771 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2772 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2773 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2774 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2775 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2776 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2777 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2778 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2779 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2780 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2781 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2782 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2783 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2784 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2785 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2786 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2787 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2788 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2789 // CHECK5: cond.true:
2790 // CHECK5-NEXT: br label [[COND_END:%.*]]
2791 // CHECK5: cond.false:
2792 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2793 // CHECK5-NEXT: br label [[COND_END]]
2794 // CHECK5: cond.end:
2795 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2796 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2797 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2798 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2799 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2800 // CHECK5: omp.inner.for.cond:
2801 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
2802 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
2803 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2804 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2805 // CHECK5: omp.inner.for.body:
2806 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2807 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2808 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2809 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
2810 // CHECK5-NEXT: invoke void @_Z3foov()
2811 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP39]]
2812 // CHECK5: invoke.cont:
2813 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2814 // CHECK5: omp.body.continue:
2815 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2816 // CHECK5: omp.inner.for.inc:
2817 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2818 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2819 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2820 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2821 // CHECK5: omp.inner.for.end:
2822 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2823 // CHECK5: omp.loop.exit:
2824 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2825 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2826 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2827 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2828 // CHECK5: .omp.final.then:
2829 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2830 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2831 // CHECK5: .omp.final.done:
2832 // CHECK5-NEXT: ret void
2833 // CHECK5: terminate.lpad:
2834 // CHECK5-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
2835 // CHECK5-NEXT: catch i8* null
2836 // CHECK5-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
2837 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP39]]
2838 // CHECK5-NEXT: unreachable
2839 //
2840 //
2841 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
2842 // CHECK5-SAME: () #[[ATTR3]] {
2843 // CHECK5-NEXT: entry:
2844 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
2845 // CHECK5-NEXT: ret void
2846 //
2847 //
2848 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
2849 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2850 // CHECK5-NEXT: entry:
2851 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2852 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2853 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2854 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2855 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2856 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2857 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2858 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2859 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2860 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2861 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2862 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2863 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2864 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2865 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2866 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2867 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2868 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2869 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2870 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2871 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2872 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2873 // CHECK5: cond.true:
2874 // CHECK5-NEXT: br label [[COND_END:%.*]]
2875 // CHECK5: cond.false:
2876 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2877 // CHECK5-NEXT: br label [[COND_END]]
2878 // CHECK5: cond.end:
2879 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2880 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2881 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2882 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2883 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2884 // CHECK5: omp.inner.for.cond:
2885 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
2886 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
2887 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2888 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2889 // CHECK5: omp.inner.for.body:
2890 // CHECK5-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
2891 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP42]]
2892 // CHECK5: invoke.cont:
2893 // CHECK5-NEXT: [[CALL:%.*]] = invoke signext i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
2894 // CHECK5-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP42]]
2895 // CHECK5: invoke.cont2:
2896 // CHECK5-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
2897 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group [[ACC_GRP42]]
2898 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group [[ACC_GRP42]]
2899 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]]
2900 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2901 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
2902 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2903 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP42]]
2904 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2905 // CHECK5: omp.inner.for.inc:
2906 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
2907 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]]
2908 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2909 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
2910 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
2911 // CHECK5: omp.inner.for.end:
2912 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2913 // CHECK5: omp.loop.exit:
2914 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2915 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2916 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2917 // CHECK5-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2918 // CHECK5: .omp.final.then:
2919 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
2920 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
2921 // CHECK5: .omp.final.done:
2922 // CHECK5-NEXT: ret void
2923 // CHECK5: terminate.lpad:
2924 // CHECK5-NEXT: [[TMP16:%.*]] = landingpad { i8*, i32 }
2925 // CHECK5-NEXT: catch i8* null
2926 // CHECK5-NEXT: [[TMP17:%.*]] = extractvalue { i8*, i32 } [[TMP16]], 0
2927 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP17]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP42]]
2928 // CHECK5-NEXT: unreachable
2929 //
2930 //
2931 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
2932 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2933 // CHECK5-NEXT: entry:
2934 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2935 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2936 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2937 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2938 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2939 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2940 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2941 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2942 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2943 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2944 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2945 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2946 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2947 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2948 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2949 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2950 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2951 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2952 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2953 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2954 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2955 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2956 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2957 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2958 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2959 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2960 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2961 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2962 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2963 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2964 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2965 // CHECK5: cond.true:
2966 // CHECK5-NEXT: br label [[COND_END:%.*]]
2967 // CHECK5: cond.false:
2968 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2969 // CHECK5-NEXT: br label [[COND_END]]
2970 // CHECK5: cond.end:
2971 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2972 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2973 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2974 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2975 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2976 // CHECK5: omp.inner.for.cond:
2977 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]]
2978 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
2979 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2980 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2981 // CHECK5: omp.inner.for.body:
2982 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
2983 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2984 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2985 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP45]]
2986 // CHECK5-NEXT: invoke void @_Z3foov()
2987 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP45]]
2988 // CHECK5: invoke.cont:
2989 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2990 // CHECK5: omp.body.continue:
2991 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2992 // CHECK5: omp.inner.for.inc:
2993 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
2994 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2995 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
2996 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
2997 // CHECK5: omp.inner.for.end:
2998 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2999 // CHECK5: omp.loop.exit:
3000 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3001 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3002 // CHECK5-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3003 // CHECK5-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3004 // CHECK5: .omp.final.then:
3005 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3006 // CHECK5-NEXT: br label [[DOTOMP_FINAL_DONE]]
3007 // CHECK5: .omp.final.done:
3008 // CHECK5-NEXT: ret void
3009 // CHECK5: terminate.lpad:
3010 // CHECK5-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
3011 // CHECK5-NEXT: catch i8* null
3012 // CHECK5-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3013 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP45]]
3014 // CHECK5-NEXT: unreachable
3015 //
3016 //
3017 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3018 // CHECK5-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
3019 // CHECK5-NEXT: entry:
3020 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3021 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3022 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3023 // CHECK5-NEXT: ret void
3024 //
3025 //
3026 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3027 // CHECK5-SAME: () #[[ATTR9:[0-9]+]] {
3028 // CHECK5-NEXT: entry:
3029 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
3030 // CHECK5-NEXT: ret void
3031 //
3032 //
3033 // CHECK9-LABEL: define {{[^@]+}}@main
3034 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3035 // CHECK9-NEXT: entry:
3036 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3037 // CHECK9-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3038 // CHECK9-NEXT: [[A:%.*]] = alloca i8, align 1
3039 // CHECK9-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
3040 // CHECK9-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
3041 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3042 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
3043 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3044 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3045 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3046 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3047 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
3048 // CHECK9-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
3049 // CHECK9-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
3050 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
3051 // CHECK9: invoke.cont:
3052 // CHECK9-NEXT: store i8 [[CALL]], i8* [[A]], align 1
3053 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3054 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3055 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
3056 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3057 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
3058 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3059 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
3060 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3061 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
3062 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3063 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
3064 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3065 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
3066 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3067 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
3068 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3069 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
3070 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3071 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
3072 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3073 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3074 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3075 // CHECK9: omp_offload.failed:
3076 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
3077 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
3078 // CHECK9: lpad:
3079 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
3080 // CHECK9-NEXT: cleanup
3081 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3082 // CHECK9-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
3083 // CHECK9-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
3084 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
3085 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3086 // CHECK9-NEXT: br label [[EH_RESUME:%.*]]
3087 // CHECK9: omp_offload.cont:
3088 // CHECK9-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
3089 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
3090 // CHECK9-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
3091 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
3092 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3093 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
3094 // CHECK9-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
3095 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3096 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
3097 // CHECK9-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
3098 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3099 // CHECK9-NEXT: store i8* null, i8** [[TMP20]], align 8
3100 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3101 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3102 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3103 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
3104 // CHECK9-NEXT: store i32 1, i32* [[TMP23]], align 4
3105 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
3106 // CHECK9-NEXT: store i32 1, i32* [[TMP24]], align 4
3107 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
3108 // CHECK9-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
3109 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
3110 // CHECK9-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
3111 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
3112 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
3113 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
3114 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
3115 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
3116 // CHECK9-NEXT: store i8** null, i8*** [[TMP29]], align 8
3117 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
3118 // CHECK9-NEXT: store i8** null, i8*** [[TMP30]], align 8
3119 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
3120 // CHECK9-NEXT: store i64 100, i64* [[TMP31]], align 8
3121 // CHECK9-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
3122 // CHECK9-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
3123 // CHECK9-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3124 // CHECK9: omp_offload.failed3:
3125 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
3126 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
3127 // CHECK9: omp_offload.cont4:
3128 // CHECK9-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
3129 // CHECK9-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
3130 // CHECK9-NEXT: [[CALL7:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
3131 // CHECK9-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
3132 // CHECK9: invoke.cont6:
3133 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
3134 // CHECK9-NEXT: [[CALL9:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
3135 // CHECK9-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
3136 // CHECK9: invoke.cont8:
3137 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
3138 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
3139 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3140 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
3141 // CHECK9-NEXT: ret i32 [[TMP35]]
3142 // CHECK9: eh.resume:
3143 // CHECK9-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
3144 // CHECK9-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
3145 // CHECK9-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
3146 // CHECK9-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
3147 // CHECK9-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
3148 //
3149 //
3150 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
3151 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3152 // CHECK9-NEXT: entry:
3153 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3154 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3155 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3156 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3157 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3158 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3159 // CHECK9-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
3160 // CHECK9-NEXT: ret void
3161 //
3162 //
3163 // CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
3164 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
3165 // CHECK9-NEXT: entry:
3166 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3167 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3168 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3169 // CHECK9-NEXT: call void @_Z8mayThrowv()
3170 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3171 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
3172 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
3173 // CHECK9-NEXT: ret i8 [[CONV]]
3174 //
3175 //
3176 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
3177 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
3178 // CHECK9-NEXT: entry:
3179 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3180 // CHECK9-NEXT: ret void
3181 //
3182 //
3183 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
3184 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3185 // CHECK9-NEXT: entry:
3186 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3187 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3188 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3189 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3190 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3191 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3192 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3193 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3194 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3195 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3196 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3197 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3198 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3199 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3200 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3201 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3202 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3203 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3204 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3205 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3206 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3207 // CHECK9: cond.true:
3208 // CHECK9-NEXT: br label [[COND_END:%.*]]
3209 // CHECK9: cond.false:
3210 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3211 // CHECK9-NEXT: br label [[COND_END]]
3212 // CHECK9: cond.end:
3213 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3214 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3215 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3216 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3217 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3218 // CHECK9: omp.inner.for.cond:
3219 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3220 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3221 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3222 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3223 // CHECK9: omp.inner.for.body:
3224 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group [[ACC_GRP9]]
3225 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
3226 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3227 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3228 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3229 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP9]]
3230 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3231 // CHECK9: omp.inner.for.inc:
3232 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3233 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
3234 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3235 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3236 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3237 // CHECK9: omp.inner.for.end:
3238 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3239 // CHECK9: omp.loop.exit:
3240 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3241 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3242 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3243 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3244 // CHECK9: .omp.final.then:
3245 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3246 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3247 // CHECK9: .omp.final.done:
3248 // CHECK9-NEXT: ret void
3249 //
3250 //
3251 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
3252 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3253 // CHECK9-NEXT: entry:
3254 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3255 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3256 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3257 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3258 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3259 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3260 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3261 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3262 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3263 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3264 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3265 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3266 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3267 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3268 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3269 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3270 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3271 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3272 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3273 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3274 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3275 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3276 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3277 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3278 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3279 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3280 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3281 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3282 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3283 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3284 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3285 // CHECK9: cond.true:
3286 // CHECK9-NEXT: br label [[COND_END:%.*]]
3287 // CHECK9: cond.false:
3288 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3289 // CHECK9-NEXT: br label [[COND_END]]
3290 // CHECK9: cond.end:
3291 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3292 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3293 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3294 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3295 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3296 // CHECK9: omp.inner.for.cond:
3297 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
3298 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
3299 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3300 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3301 // CHECK9: omp.inner.for.body:
3302 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3303 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3304 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3305 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
3306 // CHECK9-NEXT: invoke void @_Z3foov()
3307 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP13]]
3308 // CHECK9: invoke.cont:
3309 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3310 // CHECK9: omp.body.continue:
3311 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3312 // CHECK9: omp.inner.for.inc:
3313 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3314 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3315 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3316 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3317 // CHECK9: omp.inner.for.end:
3318 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3319 // CHECK9: omp.loop.exit:
3320 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3321 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3322 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3323 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3324 // CHECK9: .omp.final.then:
3325 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3326 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3327 // CHECK9: .omp.final.done:
3328 // CHECK9-NEXT: ret void
3329 // CHECK9: terminate.lpad:
3330 // CHECK9-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
3331 // CHECK9-NEXT: catch i8* null
3332 // CHECK9-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3333 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group [[ACC_GRP13]]
3334 // CHECK9-NEXT: unreachable
3335 //
3336 //
3337 // CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate
3338 // CHECK9-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
3339 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
3340 // CHECK9-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
3341 // CHECK9-NEXT: unreachable
3342 //
3343 //
3344 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
3345 // CHECK9-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
3346 // CHECK9-NEXT: entry:
3347 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3348 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3349 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
3350 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
3351 // CHECK9-NEXT: ret void
3352 //
3353 //
3354 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
3355 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
3356 // CHECK9-NEXT: entry:
3357 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3358 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3359 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
3360 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3361 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3362 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3363 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3364 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3365 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3366 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3367 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3368 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3369 // CHECK9-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
3370 // CHECK9-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
3371 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3372 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3373 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3374 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3375 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3376 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3377 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3378 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3379 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
3380 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3381 // CHECK9: cond.true:
3382 // CHECK9-NEXT: br label [[COND_END:%.*]]
3383 // CHECK9: cond.false:
3384 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3385 // CHECK9-NEXT: br label [[COND_END]]
3386 // CHECK9: cond.end:
3387 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3388 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3389 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3390 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3391 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3392 // CHECK9: omp.inner.for.cond:
3393 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3394 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3395 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3396 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3397 // CHECK9: omp.inner.for.body:
3398 // CHECK9-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group [[ACC_GRP18]]
3399 // CHECK9-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
3400 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group [[ACC_GRP18]]
3401 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]
3402 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3403 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3404 // CHECK9-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
3405 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP18]]
3406 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3407 // CHECK9: omp.inner.for.inc:
3408 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3409 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]
3410 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3411 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3412 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3413 // CHECK9: omp.inner.for.end:
3414 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3415 // CHECK9: omp.loop.exit:
3416 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3417 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3418 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3419 // CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3420 // CHECK9: .omp.final.then:
3421 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3422 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3423 // CHECK9: .omp.final.done:
3424 // CHECK9-NEXT: ret void
3425 //
3426 //
3427 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
3428 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3429 // CHECK9-NEXT: entry:
3430 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3431 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3432 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3433 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3434 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3435 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3436 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3437 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3438 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3439 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3440 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3441 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3442 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3443 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3444 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3445 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3446 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3447 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3448 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3449 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3450 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3451 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3452 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3453 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3454 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3455 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3456 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3457 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3458 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3459 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3460 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3461 // CHECK9: cond.true:
3462 // CHECK9-NEXT: br label [[COND_END:%.*]]
3463 // CHECK9: cond.false:
3464 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3465 // CHECK9-NEXT: br label [[COND_END]]
3466 // CHECK9: cond.end:
3467 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3468 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3469 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3470 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3471 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3472 // CHECK9: omp.inner.for.cond:
3473 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
3474 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
3475 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3476 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3477 // CHECK9: omp.inner.for.body:
3478 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
3479 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3480 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3481 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
3482 // CHECK9-NEXT: invoke void @_Z3foov()
3483 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP21]]
3484 // CHECK9: invoke.cont:
3485 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3486 // CHECK9: omp.body.continue:
3487 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3488 // CHECK9: omp.inner.for.inc:
3489 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
3490 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3491 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
3492 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
3493 // CHECK9: omp.inner.for.end:
3494 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3495 // CHECK9: omp.loop.exit:
3496 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3497 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3498 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3499 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3500 // CHECK9: .omp.final.then:
3501 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3502 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3503 // CHECK9: .omp.final.done:
3504 // CHECK9-NEXT: ret void
3505 // CHECK9: terminate.lpad:
3506 // CHECK9-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
3507 // CHECK9-NEXT: catch i8* null
3508 // CHECK9-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3509 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP21]]
3510 // CHECK9-NEXT: unreachable
3511 //
3512 //
3513 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
3514 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat {
3515 // CHECK9-NEXT: entry:
3516 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3517 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3518 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3519 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3520 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
3521 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3522 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
3523 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3524 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
3525 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3526 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
3527 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3528 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
3529 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3530 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
3531 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3532 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
3533 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3534 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
3535 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3536 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
3537 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3538 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3539 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3540 // CHECK9: omp_offload.failed:
3541 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
3542 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
3543 // CHECK9: omp_offload.cont:
3544 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3545 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
3546 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
3547 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
3548 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
3549 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
3550 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
3551 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
3552 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
3553 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
3554 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
3555 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
3556 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
3557 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
3558 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
3559 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
3560 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
3561 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
3562 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
3563 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
3564 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
3565 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3566 // CHECK9: omp_offload.failed3:
3567 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
3568 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
3569 // CHECK9: omp_offload.cont4:
3570 // CHECK9-NEXT: ret i32 0
3571 //
3572 //
3573 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
3574 // CHECK9-SAME: () #[[ATTR7]] comdat {
3575 // CHECK9-NEXT: entry:
3576 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3577 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3578 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3579 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3580 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
3581 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3582 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
3583 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3584 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
3585 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3586 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
3587 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3588 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
3589 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3590 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
3591 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3592 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
3593 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3594 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
3595 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3596 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
3597 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3598 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3599 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3600 // CHECK9: omp_offload.failed:
3601 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
3602 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
3603 // CHECK9: omp_offload.cont:
3604 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3605 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
3606 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
3607 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
3608 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
3609 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
3610 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
3611 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
3612 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
3613 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
3614 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
3615 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
3616 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
3617 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
3618 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
3619 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
3620 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
3621 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
3622 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
3623 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
3624 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
3625 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3626 // CHECK9: omp_offload.failed3:
3627 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
3628 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
3629 // CHECK9: omp_offload.cont4:
3630 // CHECK9-NEXT: ret i32 0
3631 //
3632 //
3633 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
3634 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
3635 // CHECK9-NEXT: entry:
3636 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3637 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3638 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3639 // CHECK9-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
3640 // CHECK9-NEXT: ret void
3641 //
3642 //
3643 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
3644 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
3645 // CHECK9-NEXT: entry:
3646 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3647 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3648 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3649 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3650 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3651 // CHECK9-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3652 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3653 // CHECK9-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
3654 // CHECK9-NEXT: ret void
3655 //
3656 //
3657 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3658 // CHECK9-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
3659 // CHECK9-NEXT: entry:
3660 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3661 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3662 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3663 // CHECK9-NEXT: ret void
3664 //
3665 //
3666 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
3667 // CHECK9-SAME: () #[[ATTR3]] {
3668 // CHECK9-NEXT: entry:
3669 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3670 // CHECK9-NEXT: ret void
3671 //
3672 //
3673 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
3674 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3675 // CHECK9-NEXT: entry:
3676 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3677 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3678 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3679 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3680 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3681 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3682 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3683 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3684 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3685 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3686 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3687 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3688 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3689 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3690 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3691 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3692 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3693 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3694 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3695 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3696 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3697 // CHECK9: cond.true:
3698 // CHECK9-NEXT: br label [[COND_END:%.*]]
3699 // CHECK9: cond.false:
3700 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3701 // CHECK9-NEXT: br label [[COND_END]]
3702 // CHECK9: cond.end:
3703 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3704 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3705 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3706 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3707 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3708 // CHECK9: omp.inner.for.cond:
3709 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
3710 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
3711 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3712 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3713 // CHECK9: omp.inner.for.body:
3714 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group [[ACC_GRP24]]
3715 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]]
3716 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3717 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
3718 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3719 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]]
3720 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3721 // CHECK9: omp.inner.for.inc:
3722 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
3723 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]]
3724 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3725 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
3726 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
3727 // CHECK9: omp.inner.for.end:
3728 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3729 // CHECK9: omp.loop.exit:
3730 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3731 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3732 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3733 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3734 // CHECK9: .omp.final.then:
3735 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3736 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3737 // CHECK9: .omp.final.done:
3738 // CHECK9-NEXT: ret void
3739 //
3740 //
3741 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
3742 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3743 // CHECK9-NEXT: entry:
3744 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3745 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3746 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3747 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3748 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3749 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3750 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3751 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3752 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3753 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3754 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3755 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3756 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3757 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3758 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3759 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3760 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3761 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3762 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3763 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3764 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3765 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3766 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3767 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3768 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3769 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3770 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3771 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3772 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3773 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3774 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3775 // CHECK9: cond.true:
3776 // CHECK9-NEXT: br label [[COND_END:%.*]]
3777 // CHECK9: cond.false:
3778 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3779 // CHECK9-NEXT: br label [[COND_END]]
3780 // CHECK9: cond.end:
3781 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3782 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3783 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3784 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3785 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3786 // CHECK9: omp.inner.for.cond:
3787 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]
3788 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]
3789 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3790 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3791 // CHECK9: omp.inner.for.body:
3792 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
3793 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3794 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3795 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
3796 // CHECK9-NEXT: invoke void @_Z3foov()
3797 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP27]]
3798 // CHECK9: invoke.cont:
3799 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3800 // CHECK9: omp.body.continue:
3801 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3802 // CHECK9: omp.inner.for.inc:
3803 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
3804 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3805 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
3806 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
3807 // CHECK9: omp.inner.for.end:
3808 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3809 // CHECK9: omp.loop.exit:
3810 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3811 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3812 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3813 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3814 // CHECK9: .omp.final.then:
3815 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3816 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3817 // CHECK9: .omp.final.done:
3818 // CHECK9-NEXT: ret void
3819 // CHECK9: terminate.lpad:
3820 // CHECK9-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
3821 // CHECK9-NEXT: catch i8* null
3822 // CHECK9-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3823 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP27]]
3824 // CHECK9-NEXT: unreachable
3825 //
3826 //
3827 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
3828 // CHECK9-SAME: () #[[ATTR3]] {
3829 // CHECK9-NEXT: entry:
3830 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
3831 // CHECK9-NEXT: ret void
3832 //
3833 //
3834 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
3835 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3836 // CHECK9-NEXT: entry:
3837 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3838 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3839 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3840 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3841 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3842 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3843 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3844 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3845 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3846 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3847 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3848 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3849 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3850 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3851 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3852 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3853 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3854 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3855 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3856 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3857 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3858 // CHECK9: cond.true:
3859 // CHECK9-NEXT: br label [[COND_END:%.*]]
3860 // CHECK9: cond.false:
3861 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3862 // CHECK9-NEXT: br label [[COND_END]]
3863 // CHECK9: cond.end:
3864 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3865 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3866 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3867 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3868 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3869 // CHECK9: omp.inner.for.cond:
3870 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]]
3871 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
3872 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3873 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3874 // CHECK9: omp.inner.for.body:
3875 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group [[ACC_GRP30]]
3876 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]]
3877 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3878 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
3879 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3880 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP30]]
3881 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3882 // CHECK9: omp.inner.for.inc:
3883 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
3884 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]]
3885 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3886 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
3887 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
3888 // CHECK9: omp.inner.for.end:
3889 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3890 // CHECK9: omp.loop.exit:
3891 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3892 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3893 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3894 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3895 // CHECK9: .omp.final.then:
3896 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3897 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3898 // CHECK9: .omp.final.done:
3899 // CHECK9-NEXT: ret void
3900 //
3901 //
3902 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
3903 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3904 // CHECK9-NEXT: entry:
3905 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3906 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3907 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3908 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3909 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3910 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3911 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3912 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3913 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3914 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3915 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3916 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3917 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3918 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3919 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3920 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3921 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3922 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3923 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3924 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3925 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3926 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3927 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3928 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3929 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3930 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3931 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3932 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3933 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3934 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3935 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3936 // CHECK9: cond.true:
3937 // CHECK9-NEXT: br label [[COND_END:%.*]]
3938 // CHECK9: cond.false:
3939 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3940 // CHECK9-NEXT: br label [[COND_END]]
3941 // CHECK9: cond.end:
3942 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3943 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3944 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3945 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3946 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3947 // CHECK9: omp.inner.for.cond:
3948 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]]
3949 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]]
3950 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3951 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3952 // CHECK9: omp.inner.for.body:
3953 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
3954 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3955 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3956 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP33]]
3957 // CHECK9-NEXT: invoke void @_Z3foov()
3958 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP33]]
3959 // CHECK9: invoke.cont:
3960 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3961 // CHECK9: omp.body.continue:
3962 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3963 // CHECK9: omp.inner.for.inc:
3964 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
3965 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3966 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
3967 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
3968 // CHECK9: omp.inner.for.end:
3969 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3970 // CHECK9: omp.loop.exit:
3971 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3972 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3973 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3974 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3975 // CHECK9: .omp.final.then:
3976 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
3977 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
3978 // CHECK9: .omp.final.done:
3979 // CHECK9-NEXT: ret void
3980 // CHECK9: terminate.lpad:
3981 // CHECK9-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
3982 // CHECK9-NEXT: catch i8* null
3983 // CHECK9-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
3984 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP33]]
3985 // CHECK9-NEXT: unreachable
3986 //
3987 //
3988 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
3989 // CHECK9-SAME: () #[[ATTR3]] {
3990 // CHECK9-NEXT: entry:
3991 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
3992 // CHECK9-NEXT: ret void
3993 //
3994 //
3995 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
3996 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3997 // CHECK9-NEXT: entry:
3998 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3999 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4000 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4001 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4002 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4003 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4004 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4005 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4006 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4007 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4008 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4009 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4010 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4011 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4012 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4013 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4014 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4015 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4016 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4017 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4018 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4019 // CHECK9: cond.true:
4020 // CHECK9-NEXT: br label [[COND_END:%.*]]
4021 // CHECK9: cond.false:
4022 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4023 // CHECK9-NEXT: br label [[COND_END]]
4024 // CHECK9: cond.end:
4025 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4026 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4027 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4028 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4029 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4030 // CHECK9: omp.inner.for.cond:
4031 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]]
4032 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
4033 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4034 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4035 // CHECK9: omp.inner.for.body:
4036 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group [[ACC_GRP36]]
4037 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]]
4038 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4039 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
4040 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4041 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]]
4042 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4043 // CHECK9: omp.inner.for.inc:
4044 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
4045 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]]
4046 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4047 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
4048 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
4049 // CHECK9: omp.inner.for.end:
4050 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4051 // CHECK9: omp.loop.exit:
4052 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4053 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4054 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4055 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4056 // CHECK9: .omp.final.then:
4057 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4058 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4059 // CHECK9: .omp.final.done:
4060 // CHECK9-NEXT: ret void
4061 //
4062 //
4063 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
4064 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4065 // CHECK9-NEXT: entry:
4066 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4067 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4068 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4069 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4070 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4071 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4072 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4073 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4074 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4075 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4076 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4077 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4078 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4079 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4080 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4081 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4082 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4083 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4084 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4085 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4086 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4087 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4088 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4089 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4090 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4091 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4092 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4093 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4094 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4095 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4096 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4097 // CHECK9: cond.true:
4098 // CHECK9-NEXT: br label [[COND_END:%.*]]
4099 // CHECK9: cond.false:
4100 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4101 // CHECK9-NEXT: br label [[COND_END]]
4102 // CHECK9: cond.end:
4103 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4104 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4105 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4106 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4107 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4108 // CHECK9: omp.inner.for.cond:
4109 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
4110 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
4111 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4112 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4113 // CHECK9: omp.inner.for.body:
4114 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
4115 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4116 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4117 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
4118 // CHECK9-NEXT: invoke void @_Z3foov()
4119 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP39]]
4120 // CHECK9: invoke.cont:
4121 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4122 // CHECK9: omp.body.continue:
4123 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4124 // CHECK9: omp.inner.for.inc:
4125 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
4126 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4127 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
4128 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
4129 // CHECK9: omp.inner.for.end:
4130 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4131 // CHECK9: omp.loop.exit:
4132 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4133 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4134 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4135 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4136 // CHECK9: .omp.final.then:
4137 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4138 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4139 // CHECK9: .omp.final.done:
4140 // CHECK9-NEXT: ret void
4141 // CHECK9: terminate.lpad:
4142 // CHECK9-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
4143 // CHECK9-NEXT: catch i8* null
4144 // CHECK9-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4145 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP39]]
4146 // CHECK9-NEXT: unreachable
4147 //
4148 //
4149 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
4150 // CHECK9-SAME: () #[[ATTR3]] {
4151 // CHECK9-NEXT: entry:
4152 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
4153 // CHECK9-NEXT: ret void
4154 //
4155 //
4156 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
4157 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4158 // CHECK9-NEXT: entry:
4159 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4160 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4161 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4162 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4163 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4164 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4165 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4166 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4167 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4168 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4169 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4170 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4171 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4172 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4173 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4174 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4175 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4176 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4177 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4178 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4179 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4180 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4181 // CHECK9: cond.true:
4182 // CHECK9-NEXT: br label [[COND_END:%.*]]
4183 // CHECK9: cond.false:
4184 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4185 // CHECK9-NEXT: br label [[COND_END]]
4186 // CHECK9: cond.end:
4187 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4188 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4189 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4190 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4191 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4192 // CHECK9: omp.inner.for.cond:
4193 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
4194 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
4195 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4196 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4197 // CHECK9: omp.inner.for.body:
4198 // CHECK9-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
4199 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP42]]
4200 // CHECK9: invoke.cont:
4201 // CHECK9-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
4202 // CHECK9-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP42]]
4203 // CHECK9: invoke.cont2:
4204 // CHECK9-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
4205 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group [[ACC_GRP42]]
4206 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group [[ACC_GRP42]]
4207 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]]
4208 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4209 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
4210 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4211 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP42]]
4212 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4213 // CHECK9: omp.inner.for.inc:
4214 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
4215 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]]
4216 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4217 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
4218 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
4219 // CHECK9: omp.inner.for.end:
4220 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4221 // CHECK9: omp.loop.exit:
4222 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4223 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4224 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4225 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4226 // CHECK9: .omp.final.then:
4227 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4228 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4229 // CHECK9: .omp.final.done:
4230 // CHECK9-NEXT: ret void
4231 // CHECK9: terminate.lpad:
4232 // CHECK9-NEXT: [[TMP16:%.*]] = landingpad { i8*, i32 }
4233 // CHECK9-NEXT: catch i8* null
4234 // CHECK9-NEXT: [[TMP17:%.*]] = extractvalue { i8*, i32 } [[TMP16]], 0
4235 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP17]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP42]]
4236 // CHECK9-NEXT: unreachable
4237 //
4238 //
4239 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11
4240 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4241 // CHECK9-NEXT: entry:
4242 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4243 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4244 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4245 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4246 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4247 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4248 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4249 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4250 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4251 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4252 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4253 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4254 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4255 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4256 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4257 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4258 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4259 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4260 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4261 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4262 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4263 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4264 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4265 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4266 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4267 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4268 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4269 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4270 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4271 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4272 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4273 // CHECK9: cond.true:
4274 // CHECK9-NEXT: br label [[COND_END:%.*]]
4275 // CHECK9: cond.false:
4276 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4277 // CHECK9-NEXT: br label [[COND_END]]
4278 // CHECK9: cond.end:
4279 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4280 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4281 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4282 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4283 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4284 // CHECK9: omp.inner.for.cond:
4285 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]]
4286 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
4287 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4288 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4289 // CHECK9: omp.inner.for.body:
4290 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
4291 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4292 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4293 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP45]]
4294 // CHECK9-NEXT: invoke void @_Z3foov()
4295 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP45]]
4296 // CHECK9: invoke.cont:
4297 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4298 // CHECK9: omp.body.continue:
4299 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4300 // CHECK9: omp.inner.for.inc:
4301 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
4302 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4303 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
4304 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
4305 // CHECK9: omp.inner.for.end:
4306 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4307 // CHECK9: omp.loop.exit:
4308 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4309 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4310 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4311 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4312 // CHECK9: .omp.final.then:
4313 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4314 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4315 // CHECK9: .omp.final.done:
4316 // CHECK9-NEXT: ret void
4317 // CHECK9: terminate.lpad:
4318 // CHECK9-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
4319 // CHECK9-NEXT: catch i8* null
4320 // CHECK9-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4321 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP45]]
4322 // CHECK9-NEXT: unreachable
4323 //
4324 //
4325 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4326 // CHECK9-SAME: () #[[ATTR9:[0-9]+]] {
4327 // CHECK9-NEXT: entry:
4328 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
4329 // CHECK9-NEXT: ret void
4330 //
4331 //
4332 // CHECK11-LABEL: define {{[^@]+}}@main
4333 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4334 // CHECK11-NEXT: entry:
4335 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4336 // CHECK11-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4337 // CHECK11-NEXT: [[A:%.*]] = alloca i8, align 1
4338 // CHECK11-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
4339 // CHECK11-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
4340 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4341 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4342 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4343 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4344 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4345 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
4346 // CHECK11-NEXT: [[DOTOMP_LB4:%.*]] = alloca i32, align 4
4347 // CHECK11-NEXT: [[DOTOMP_UB5:%.*]] = alloca i32, align 4
4348 // CHECK11-NEXT: [[DOTOMP_IV6:%.*]] = alloca i32, align 4
4349 // CHECK11-NEXT: [[I7:%.*]] = alloca i32, align 4
4350 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
4351 // CHECK11-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
4352 // CHECK11-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
4353 // CHECK11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
4354 // CHECK11: invoke.cont:
4355 // CHECK11-NEXT: store i8 [[CALL]], i8* [[A]], align 1
4356 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4357 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4358 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4359 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4360 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4361 // CHECK11: omp.inner.for.cond:
4362 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
4363 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
4364 // CHECK11-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4365 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4366 // CHECK11: omp.inner.for.body:
4367 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
4368 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4369 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4370 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
4371 // CHECK11-NEXT: invoke void @_Z3foov()
4372 // CHECK11-NEXT: to label [[INVOKE_CONT1:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP2]]
4373 // CHECK11: invoke.cont1:
4374 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4375 // CHECK11: omp.body.continue:
4376 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4377 // CHECK11: omp.inner.for.inc:
4378 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
4379 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP4]], 1
4380 // CHECK11-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
4381 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4382 // CHECK11: lpad:
4383 // CHECK11-NEXT: [[TMP5:%.*]] = landingpad { i8*, i32 }
4384 // CHECK11-NEXT: cleanup
4385 // CHECK11-NEXT: [[TMP6:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 0
4386 // CHECK11-NEXT: store i8* [[TMP6]], i8** [[EXN_SLOT]], align 8
4387 // CHECK11-NEXT: [[TMP7:%.*]] = extractvalue { i8*, i32 } [[TMP5]], 1
4388 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[EHSELECTOR_SLOT]], align 4
4389 // CHECK11-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7:[0-9]+]]
4390 // CHECK11-NEXT: br label [[EH_RESUME:%.*]]
4391 // CHECK11: omp.inner.for.end:
4392 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
4393 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB4]], align 4
4394 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB5]], align 4
4395 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB4]], align 4
4396 // CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV6]], align 4
4397 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
4398 // CHECK11: omp.inner.for.cond8:
4399 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
4400 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]]
4401 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4402 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
4403 // CHECK11: omp.inner.for.body10:
4404 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
4405 // CHECK11-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP11]], 1
4406 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
4407 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]
4408 // CHECK11-NEXT: invoke void @_Z3foov()
4409 // CHECK11-NEXT: to label [[INVOKE_CONT13:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP6]]
4410 // CHECK11: invoke.cont13:
4411 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE14:%.*]]
4412 // CHECK11: omp.body.continue14:
4413 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC15:%.*]]
4414 // CHECK11: omp.inner.for.inc15:
4415 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
4416 // CHECK11-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP12]], 1
4417 // CHECK11-NEXT: store i32 [[ADD16]], i32* [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
4418 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
4419 // CHECK11: omp.inner.for.end17:
4420 // CHECK11-NEXT: store i32 100, i32* [[I7]], align 4
4421 // CHECK11-NEXT: [[TMP13:%.*]] = load i8, i8* [[A]], align 1
4422 // CHECK11-NEXT: [[CONV:%.*]] = sext i8 [[TMP13]] to i32
4423 // CHECK11-NEXT: [[CALL19:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
4424 // CHECK11-NEXT: to label [[INVOKE_CONT18:%.*]] unwind label [[LPAD]]
4425 // CHECK11: invoke.cont18:
4426 // CHECK11-NEXT: [[ADD20:%.*]] = add nsw i32 [[CONV]], [[CALL19]]
4427 // CHECK11-NEXT: [[CALL22:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
4428 // CHECK11-NEXT: to label [[INVOKE_CONT21:%.*]] unwind label [[LPAD]]
4429 // CHECK11: invoke.cont21:
4430 // CHECK11-NEXT: [[ADD23:%.*]] = add nsw i32 [[ADD20]], [[CALL22]]
4431 // CHECK11-NEXT: store i32 [[ADD23]], i32* [[RETVAL]], align 4
4432 // CHECK11-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR7]]
4433 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4
4434 // CHECK11-NEXT: ret i32 [[TMP14]]
4435 // CHECK11: eh.resume:
4436 // CHECK11-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
4437 // CHECK11-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
4438 // CHECK11-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
4439 // CHECK11-NEXT: [[LPAD_VAL24:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
4440 // CHECK11-NEXT: resume { i8*, i32 } [[LPAD_VAL24]]
4441 // CHECK11: terminate.lpad:
4442 // CHECK11-NEXT: [[TMP15:%.*]] = landingpad { i8*, i32 }
4443 // CHECK11-NEXT: catch i8* null
4444 // CHECK11-NEXT: [[TMP16:%.*]] = extractvalue { i8*, i32 } [[TMP15]], 0
4445 // CHECK11-NEXT: call void @__clang_call_terminate(i8* [[TMP16]]) #[[ATTR8:[0-9]+]], !llvm.access.group [[ACC_GRP2]]
4446 // CHECK11-NEXT: unreachable
4447 //
4448 //
4449 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SC1El
4450 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4451 // CHECK11-NEXT: entry:
4452 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4453 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
4454 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4455 // CHECK11-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
4456 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4457 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
4458 // CHECK11-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
4459 // CHECK11-NEXT: ret void
4460 //
4461 //
4462 // CHECK11-LABEL: define {{[^@]+}}@_ZN1ScvcEv
4463 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
4464 // CHECK11-NEXT: entry:
4465 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4466 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4467 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4468 // CHECK11-NEXT: call void @_Z8mayThrowv()
4469 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4470 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
4471 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
4472 // CHECK11-NEXT: ret i8 [[CONV]]
4473 //
4474 //
4475 // CHECK11-LABEL: define {{[^@]+}}@__clang_call_terminate
4476 // CHECK11-SAME: (i8* [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] comdat {
4477 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR7]]
4478 // CHECK11-NEXT: call void @_ZSt9terminatev() #[[ATTR8]]
4479 // CHECK11-NEXT: unreachable
4480 //
4481 //
4482 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
4483 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4484 // CHECK11-NEXT: entry:
4485 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4486 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4487 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4488 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4489 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4490 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4491 // CHECK11-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
4492 // CHECK11-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
4493 // CHECK11-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
4494 // CHECK11-NEXT: [[I6:%.*]] = alloca i32, align 4
4495 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4496 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4497 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4498 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4499 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4500 // CHECK11: omp.inner.for.cond:
4501 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
4502 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
4503 // CHECK11-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4504 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4505 // CHECK11: omp.inner.for.body:
4506 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4507 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4508 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4509 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
4510 // CHECK11-NEXT: invoke void @_Z3foov()
4511 // CHECK11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP9]]
4512 // CHECK11: invoke.cont:
4513 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4514 // CHECK11: omp.body.continue:
4515 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4516 // CHECK11: omp.inner.for.inc:
4517 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4518 // CHECK11-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
4519 // CHECK11-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4520 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4521 // CHECK11: omp.inner.for.end:
4522 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
4523 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
4524 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
4525 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
4526 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
4527 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
4528 // CHECK11: omp.inner.for.cond7:
4529 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
4530 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
4531 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4532 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
4533 // CHECK11: omp.inner.for.body9:
4534 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
4535 // CHECK11-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
4536 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4537 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
4538 // CHECK11-NEXT: invoke void @_Z3foov()
4539 // CHECK11-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP12]]
4540 // CHECK11: invoke.cont12:
4541 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
4542 // CHECK11: omp.body.continue13:
4543 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
4544 // CHECK11: omp.inner.for.inc14:
4545 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
4546 // CHECK11-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
4547 // CHECK11-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
4548 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
4549 // CHECK11: omp.inner.for.end16:
4550 // CHECK11-NEXT: store i32 100, i32* [[I6]], align 4
4551 // CHECK11-NEXT: ret i32 0
4552 // CHECK11: terminate.lpad:
4553 // CHECK11-NEXT: [[TMP10:%.*]] = landingpad { i8*, i32 }
4554 // CHECK11-NEXT: catch i8* null
4555 // CHECK11-NEXT: [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
4556 // CHECK11-NEXT: call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group [[ACC_GRP9]]
4557 // CHECK11-NEXT: unreachable
4558 //
4559 //
4560 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
4561 // CHECK11-SAME: () #[[ATTR5]] comdat personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4562 // CHECK11-NEXT: entry:
4563 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
4564 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4565 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4566 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4567 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
4568 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4569 // CHECK11-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
4570 // CHECK11-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
4571 // CHECK11-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
4572 // CHECK11-NEXT: [[I6:%.*]] = alloca i32, align 4
4573 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4574 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4575 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4576 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4577 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4578 // CHECK11: omp.inner.for.cond:
4579 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
4580 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
4581 // CHECK11-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4582 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4583 // CHECK11: omp.inner.for.body:
4584 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4585 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4586 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4587 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
4588 // CHECK11-NEXT: invoke void @_Z3foov()
4589 // CHECK11-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP15]]
4590 // CHECK11: invoke.cont:
4591 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4592 // CHECK11: omp.body.continue:
4593 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4594 // CHECK11: omp.inner.for.inc:
4595 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4596 // CHECK11-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
4597 // CHECK11-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4598 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
4599 // CHECK11: omp.inner.for.end:
4600 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
4601 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
4602 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
4603 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
4604 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
4605 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
4606 // CHECK11: omp.inner.for.cond7:
4607 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
4608 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP18]]
4609 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4610 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
4611 // CHECK11: omp.inner.for.body9:
4612 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18]]
4613 // CHECK11-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
4614 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4615 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP18]]
4616 // CHECK11-NEXT: invoke void @_Z3foov()
4617 // CHECK11-NEXT: to label [[INVOKE_CONT12:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP18]]
4618 // CHECK11: invoke.cont12:
4619 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE13:%.*]]
4620 // CHECK11: omp.body.continue13:
4621 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC14:%.*]]
4622 // CHECK11: omp.inner.for.inc14:
4623 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18]]
4624 // CHECK11-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP9]], 1
4625 // CHECK11-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP18]]
4626 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP19:![0-9]+]]
4627 // CHECK11: omp.inner.for.end16:
4628 // CHECK11-NEXT: store i32 100, i32* [[I6]], align 4
4629 // CHECK11-NEXT: ret i32 0
4630 // CHECK11: terminate.lpad:
4631 // CHECK11-NEXT: [[TMP10:%.*]] = landingpad { i8*, i32 }
4632 // CHECK11-NEXT: catch i8* null
4633 // CHECK11-NEXT: [[TMP11:%.*]] = extractvalue { i8*, i32 } [[TMP10]], 0
4634 // CHECK11-NEXT: call void @__clang_call_terminate(i8* [[TMP11]]) #[[ATTR8]], !llvm.access.group [[ACC_GRP15]]
4635 // CHECK11-NEXT: unreachable
4636 //
4637 //
4638 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SD1Ev
4639 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6:[0-9]+]] comdat align 2 {
4640 // CHECK11-NEXT: entry:
4641 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4642 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4643 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4644 // CHECK11-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR7]]
4645 // CHECK11-NEXT: ret void
4646 //
4647 //
4648 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SC2El
4649 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
4650 // CHECK11-NEXT: entry:
4651 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4652 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
4653 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4654 // CHECK11-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
4655 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4656 // CHECK11-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4657 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
4658 // CHECK11-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
4659 // CHECK11-NEXT: ret void
4660 //
4661 //
4662 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SD2Ev
4663 // CHECK11-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
4664 // CHECK11-NEXT: entry:
4665 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4666 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4667 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4668 // CHECK11-NEXT: ret void
4669 //
4670 //
4671 // CHECK13-LABEL: define {{[^@]+}}@main
4672 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4673 // CHECK13-NEXT: entry:
4674 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4675 // CHECK13-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4676 // CHECK13-NEXT: [[A:%.*]] = alloca i8, align 1
4677 // CHECK13-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
4678 // CHECK13-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
4679 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4680 // CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
4681 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4682 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4683 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4684 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4685 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
4686 // CHECK13-NEXT: call void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[S]], i64 0)
4687 // CHECK13-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[S]])
4688 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
4689 // CHECK13: invoke.cont:
4690 // CHECK13-NEXT: store i8 [[CALL]], i8* [[A]], align 1
4691 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4692 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4693 // CHECK13-NEXT: store i32 1, i32* [[TMP0]], align 4
4694 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4695 // CHECK13-NEXT: store i32 0, i32* [[TMP1]], align 4
4696 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4697 // CHECK13-NEXT: store i8** null, i8*** [[TMP2]], align 8
4698 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4699 // CHECK13-NEXT: store i8** null, i8*** [[TMP3]], align 8
4700 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4701 // CHECK13-NEXT: store i64* null, i64** [[TMP4]], align 8
4702 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4703 // CHECK13-NEXT: store i64* null, i64** [[TMP5]], align 8
4704 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4705 // CHECK13-NEXT: store i8** null, i8*** [[TMP6]], align 8
4706 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4707 // CHECK13-NEXT: store i8** null, i8*** [[TMP7]], align 8
4708 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4709 // CHECK13-NEXT: store i64 100, i64* [[TMP8]], align 8
4710 // CHECK13-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4711 // CHECK13-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4712 // CHECK13-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4713 // CHECK13: omp_offload.failed:
4714 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
4715 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
4716 // CHECK13: lpad:
4717 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
4718 // CHECK13-NEXT: cleanup
4719 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4720 // CHECK13-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
4721 // CHECK13-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
4722 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
4723 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
4724 // CHECK13-NEXT: br label [[EH_RESUME:%.*]]
4725 // CHECK13: omp_offload.cont:
4726 // CHECK13-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
4727 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
4728 // CHECK13-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
4729 // CHECK13-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
4730 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4731 // CHECK13-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
4732 // CHECK13-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
4733 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4734 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
4735 // CHECK13-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
4736 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4737 // CHECK13-NEXT: store i8* null, i8** [[TMP20]], align 8
4738 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4739 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4740 // CHECK13-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4741 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4742 // CHECK13-NEXT: store i32 1, i32* [[TMP23]], align 4
4743 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4744 // CHECK13-NEXT: store i32 1, i32* [[TMP24]], align 4
4745 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4746 // CHECK13-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
4747 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4748 // CHECK13-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
4749 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4750 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
4751 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4752 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
4753 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4754 // CHECK13-NEXT: store i8** null, i8*** [[TMP29]], align 8
4755 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4756 // CHECK13-NEXT: store i8** null, i8*** [[TMP30]], align 8
4757 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4758 // CHECK13-NEXT: store i64 100, i64* [[TMP31]], align 8
4759 // CHECK13-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4760 // CHECK13-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
4761 // CHECK13-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4762 // CHECK13: omp_offload.failed3:
4763 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
4764 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4765 // CHECK13: omp_offload.cont4:
4766 // CHECK13-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
4767 // CHECK13-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
4768 // CHECK13-NEXT: [[CALL7:%.*]] = invoke i32 @_Z5tmainIcLi5EEiv()
4769 // CHECK13-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
4770 // CHECK13: invoke.cont6:
4771 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
4772 // CHECK13-NEXT: [[CALL9:%.*]] = invoke i32 @_Z5tmainI1SLi1EEiv()
4773 // CHECK13-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
4774 // CHECK13: invoke.cont8:
4775 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
4776 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
4777 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
4778 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
4779 // CHECK13-NEXT: ret i32 [[TMP35]]
4780 // CHECK13: eh.resume:
4781 // CHECK13-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
4782 // CHECK13-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
4783 // CHECK13-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
4784 // CHECK13-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
4785 // CHECK13-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
4786 //
4787 //
4788 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
4789 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4790 // CHECK13-NEXT: entry:
4791 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4792 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
4793 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4794 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
4795 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4796 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
4797 // CHECK13-NEXT: call void @_ZN1SC2El(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]], i64 [[TMP0]])
4798 // CHECK13-NEXT: ret void
4799 //
4800 //
4801 // CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
4802 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
4803 // CHECK13-NEXT: entry:
4804 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4805 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4806 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4807 // CHECK13-NEXT: call void @_Z8mayThrowv()
4808 // CHECK13-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4809 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
4810 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
4811 // CHECK13-NEXT: ret i8 [[CONV]]
4812 //
4813 //
4814 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
4815 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] {
4816 // CHECK13-NEXT: entry:
4817 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4818 // CHECK13-NEXT: ret void
4819 //
4820 //
4821 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
4822 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4823 // CHECK13-NEXT: entry:
4824 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4825 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4826 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4827 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4828 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4829 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4830 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4831 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4832 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4833 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4834 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4835 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4836 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4837 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4838 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4839 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4840 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4841 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4842 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4843 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4844 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4845 // CHECK13: cond.true:
4846 // CHECK13-NEXT: br label [[COND_END:%.*]]
4847 // CHECK13: cond.false:
4848 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4849 // CHECK13-NEXT: br label [[COND_END]]
4850 // CHECK13: cond.end:
4851 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4852 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4853 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4854 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4855 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4856 // CHECK13: omp.inner.for.cond:
4857 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
4858 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
4859 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4860 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4861 // CHECK13: omp.inner.for.body:
4862 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2), !llvm.access.group [[ACC_GRP9]]
4863 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP9]]
4864 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4865 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
4866 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4867 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP9]]
4868 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4869 // CHECK13: omp.inner.for.inc:
4870 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4871 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP9]]
4872 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4873 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
4874 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4875 // CHECK13: omp.inner.for.end:
4876 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4877 // CHECK13: omp.loop.exit:
4878 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4879 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4880 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4881 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4882 // CHECK13: .omp.final.then:
4883 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
4884 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
4885 // CHECK13: .omp.final.done:
4886 // CHECK13-NEXT: ret void
4887 //
4888 //
4889 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
4890 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4891 // CHECK13-NEXT: entry:
4892 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4893 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4894 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4895 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4896 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4897 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4898 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4899 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4900 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4901 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4902 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4903 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4904 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4905 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4906 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4907 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4908 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4909 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4910 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4911 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4912 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4913 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4914 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4915 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4916 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4917 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4918 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4919 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4920 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4921 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4922 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4923 // CHECK13: cond.true:
4924 // CHECK13-NEXT: br label [[COND_END:%.*]]
4925 // CHECK13: cond.false:
4926 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4927 // CHECK13-NEXT: br label [[COND_END]]
4928 // CHECK13: cond.end:
4929 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4930 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4931 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4932 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4933 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4934 // CHECK13: omp.inner.for.cond:
4935 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
4936 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
4937 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4938 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4939 // CHECK13: omp.inner.for.body:
4940 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
4941 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4942 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4943 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
4944 // CHECK13-NEXT: invoke void @_Z3foov()
4945 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP13]]
4946 // CHECK13: invoke.cont:
4947 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4948 // CHECK13: omp.body.continue:
4949 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4950 // CHECK13: omp.inner.for.inc:
4951 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
4952 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4953 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
4954 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
4955 // CHECK13: omp.inner.for.end:
4956 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4957 // CHECK13: omp.loop.exit:
4958 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4959 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4960 // CHECK13-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4961 // CHECK13-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4962 // CHECK13: .omp.final.then:
4963 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
4964 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
4965 // CHECK13: .omp.final.done:
4966 // CHECK13-NEXT: ret void
4967 // CHECK13: terminate.lpad:
4968 // CHECK13-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
4969 // CHECK13-NEXT: catch i8* null
4970 // CHECK13-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
4971 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10:[0-9]+]], !llvm.access.group [[ACC_GRP13]]
4972 // CHECK13-NEXT: unreachable
4973 //
4974 //
4975 // CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate
4976 // CHECK13-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
4977 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
4978 // CHECK13-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
4979 // CHECK13-NEXT: unreachable
4980 //
4981 //
4982 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
4983 // CHECK13-SAME: (i64 [[A:%.*]]) #[[ATTR3]] {
4984 // CHECK13-NEXT: entry:
4985 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
4986 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
4987 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
4988 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
4989 // CHECK13-NEXT: ret void
4990 //
4991 //
4992 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
4993 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i8* nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
4994 // CHECK13-NEXT: entry:
4995 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4996 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4997 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
4998 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4999 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5000 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5001 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5002 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5003 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5004 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5005 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5006 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5007 // CHECK13-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
5008 // CHECK13-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
5009 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5010 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5011 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5012 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5013 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5014 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5015 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5016 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5017 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
5018 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5019 // CHECK13: cond.true:
5020 // CHECK13-NEXT: br label [[COND_END:%.*]]
5021 // CHECK13: cond.false:
5022 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5023 // CHECK13-NEXT: br label [[COND_END]]
5024 // CHECK13: cond.end:
5025 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5026 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5027 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5028 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5029 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5030 // CHECK13: omp.inner.for.cond:
5031 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
5032 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
5033 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5034 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5035 // CHECK13: omp.inner.for.body:
5036 // CHECK13-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1, !llvm.access.group [[ACC_GRP18]]
5037 // CHECK13-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
5038 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]), !llvm.access.group [[ACC_GRP18]]
5039 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP18]]
5040 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5041 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
5042 // CHECK13-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
5043 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP18]]
5044 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5045 // CHECK13: omp.inner.for.inc:
5046 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5047 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP18]]
5048 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5049 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5050 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
5051 // CHECK13: omp.inner.for.end:
5052 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5053 // CHECK13: omp.loop.exit:
5054 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5055 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5056 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5057 // CHECK13-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5058 // CHECK13: .omp.final.then:
5059 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5060 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5061 // CHECK13: .omp.final.done:
5062 // CHECK13-NEXT: ret void
5063 //
5064 //
5065 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
5066 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5067 // CHECK13-NEXT: entry:
5068 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5069 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5070 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5071 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5072 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5073 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5074 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5075 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5076 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5077 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5078 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5079 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5080 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5081 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5082 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5083 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5084 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5085 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5086 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5087 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5088 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5089 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5090 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5091 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5092 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5093 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5094 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5095 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5096 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5097 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5098 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5099 // CHECK13: cond.true:
5100 // CHECK13-NEXT: br label [[COND_END:%.*]]
5101 // CHECK13: cond.false:
5102 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5103 // CHECK13-NEXT: br label [[COND_END]]
5104 // CHECK13: cond.end:
5105 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5106 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5107 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5108 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5109 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5110 // CHECK13: omp.inner.for.cond:
5111 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
5112 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
5113 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5114 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5115 // CHECK13: omp.inner.for.body:
5116 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
5117 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5118 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5119 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
5120 // CHECK13-NEXT: invoke void @_Z3foov()
5121 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP21]]
5122 // CHECK13: invoke.cont:
5123 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5124 // CHECK13: omp.body.continue:
5125 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5126 // CHECK13: omp.inner.for.inc:
5127 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
5128 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5129 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
5130 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
5131 // CHECK13: omp.inner.for.end:
5132 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5133 // CHECK13: omp.loop.exit:
5134 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5135 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5136 // CHECK13-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5137 // CHECK13-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5138 // CHECK13: .omp.final.then:
5139 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5140 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5141 // CHECK13: .omp.final.done:
5142 // CHECK13-NEXT: ret void
5143 // CHECK13: terminate.lpad:
5144 // CHECK13-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
5145 // CHECK13-NEXT: catch i8* null
5146 // CHECK13-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5147 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP21]]
5148 // CHECK13-NEXT: unreachable
5149 //
5150 //
5151 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
5152 // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat {
5153 // CHECK13-NEXT: entry:
5154 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5155 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5156 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5157 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5158 // CHECK13-NEXT: store i32 1, i32* [[TMP0]], align 4
5159 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5160 // CHECK13-NEXT: store i32 0, i32* [[TMP1]], align 4
5161 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5162 // CHECK13-NEXT: store i8** null, i8*** [[TMP2]], align 8
5163 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5164 // CHECK13-NEXT: store i8** null, i8*** [[TMP3]], align 8
5165 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5166 // CHECK13-NEXT: store i64* null, i64** [[TMP4]], align 8
5167 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5168 // CHECK13-NEXT: store i64* null, i64** [[TMP5]], align 8
5169 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5170 // CHECK13-NEXT: store i8** null, i8*** [[TMP6]], align 8
5171 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5172 // CHECK13-NEXT: store i8** null, i8*** [[TMP7]], align 8
5173 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5174 // CHECK13-NEXT: store i64 100, i64* [[TMP8]], align 8
5175 // CHECK13-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5176 // CHECK13-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5177 // CHECK13-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5178 // CHECK13: omp_offload.failed:
5179 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
5180 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
5181 // CHECK13: omp_offload.cont:
5182 // CHECK13-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5183 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
5184 // CHECK13-NEXT: store i32 1, i32* [[TMP11]], align 4
5185 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
5186 // CHECK13-NEXT: store i32 0, i32* [[TMP12]], align 4
5187 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
5188 // CHECK13-NEXT: store i8** null, i8*** [[TMP13]], align 8
5189 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
5190 // CHECK13-NEXT: store i8** null, i8*** [[TMP14]], align 8
5191 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
5192 // CHECK13-NEXT: store i64* null, i64** [[TMP15]], align 8
5193 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
5194 // CHECK13-NEXT: store i64* null, i64** [[TMP16]], align 8
5195 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
5196 // CHECK13-NEXT: store i8** null, i8*** [[TMP17]], align 8
5197 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
5198 // CHECK13-NEXT: store i8** null, i8*** [[TMP18]], align 8
5199 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
5200 // CHECK13-NEXT: store i64 100, i64* [[TMP19]], align 8
5201 // CHECK13-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
5202 // CHECK13-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5203 // CHECK13-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5204 // CHECK13: omp_offload.failed3:
5205 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
5206 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT4]]
5207 // CHECK13: omp_offload.cont4:
5208 // CHECK13-NEXT: ret i32 0
5209 //
5210 //
5211 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
5212 // CHECK13-SAME: () #[[ATTR7]] comdat {
5213 // CHECK13-NEXT: entry:
5214 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5215 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5216 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5217 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5218 // CHECK13-NEXT: store i32 1, i32* [[TMP0]], align 4
5219 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5220 // CHECK13-NEXT: store i32 0, i32* [[TMP1]], align 4
5221 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5222 // CHECK13-NEXT: store i8** null, i8*** [[TMP2]], align 8
5223 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5224 // CHECK13-NEXT: store i8** null, i8*** [[TMP3]], align 8
5225 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5226 // CHECK13-NEXT: store i64* null, i64** [[TMP4]], align 8
5227 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5228 // CHECK13-NEXT: store i64* null, i64** [[TMP5]], align 8
5229 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5230 // CHECK13-NEXT: store i8** null, i8*** [[TMP6]], align 8
5231 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5232 // CHECK13-NEXT: store i8** null, i8*** [[TMP7]], align 8
5233 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5234 // CHECK13-NEXT: store i64 100, i64* [[TMP8]], align 8
5235 // CHECK13-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5236 // CHECK13-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5237 // CHECK13-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5238 // CHECK13: omp_offload.failed:
5239 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
5240 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
5241 // CHECK13: omp_offload.cont:
5242 // CHECK13-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5243 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
5244 // CHECK13-NEXT: store i32 1, i32* [[TMP11]], align 4
5245 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
5246 // CHECK13-NEXT: store i32 0, i32* [[TMP12]], align 4
5247 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
5248 // CHECK13-NEXT: store i8** null, i8*** [[TMP13]], align 8
5249 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
5250 // CHECK13-NEXT: store i8** null, i8*** [[TMP14]], align 8
5251 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
5252 // CHECK13-NEXT: store i64* null, i64** [[TMP15]], align 8
5253 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
5254 // CHECK13-NEXT: store i64* null, i64** [[TMP16]], align 8
5255 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
5256 // CHECK13-NEXT: store i8** null, i8*** [[TMP17]], align 8
5257 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
5258 // CHECK13-NEXT: store i8** null, i8*** [[TMP18]], align 8
5259 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
5260 // CHECK13-NEXT: store i64 100, i64* [[TMP19]], align 8
5261 // CHECK13-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
5262 // CHECK13-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5263 // CHECK13-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5264 // CHECK13: omp_offload.failed3:
5265 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
5266 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT4]]
5267 // CHECK13: omp_offload.cont4:
5268 // CHECK13-NEXT: ret i32 0
5269 //
5270 //
5271 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
5272 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
5273 // CHECK13-NEXT: entry:
5274 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5275 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5276 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5277 // CHECK13-NEXT: call void @_ZN1SD2Ev(%struct.S* nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
5278 // CHECK13-NEXT: ret void
5279 //
5280 //
5281 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
5282 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
5283 // CHECK13-NEXT: entry:
5284 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5285 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
5286 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5287 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
5288 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5289 // CHECK13-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
5290 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
5291 // CHECK13-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
5292 // CHECK13-NEXT: ret void
5293 //
5294 //
5295 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
5296 // CHECK13-SAME: () #[[ATTR3]] {
5297 // CHECK13-NEXT: entry:
5298 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
5299 // CHECK13-NEXT: ret void
5300 //
5301 //
5302 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4
5303 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5304 // CHECK13-NEXT: entry:
5305 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5306 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5307 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5308 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5309 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5310 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5311 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5312 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5313 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5314 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5315 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5316 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5317 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5318 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5319 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5320 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5321 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5322 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5323 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5324 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5325 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5326 // CHECK13: cond.true:
5327 // CHECK13-NEXT: br label [[COND_END:%.*]]
5328 // CHECK13: cond.false:
5329 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5330 // CHECK13-NEXT: br label [[COND_END]]
5331 // CHECK13: cond.end:
5332 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5333 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5334 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5335 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5336 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5337 // CHECK13: omp.inner.for.cond:
5338 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
5339 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
5340 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5341 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5342 // CHECK13: omp.inner.for.body:
5343 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5), !llvm.access.group [[ACC_GRP24]]
5344 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP24]]
5345 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5346 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
5347 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5348 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP24]]
5349 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5350 // CHECK13: omp.inner.for.inc:
5351 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
5352 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP24]]
5353 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5354 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
5355 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
5356 // CHECK13: omp.inner.for.end:
5357 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5358 // CHECK13: omp.loop.exit:
5359 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5360 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5361 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5362 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5363 // CHECK13: .omp.final.then:
5364 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5365 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5366 // CHECK13: .omp.final.done:
5367 // CHECK13-NEXT: ret void
5368 //
5369 //
5370 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
5371 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5372 // CHECK13-NEXT: entry:
5373 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5374 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5375 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5376 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5377 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5378 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5379 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5380 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5381 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5382 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5383 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5384 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5385 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5386 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5387 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5388 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5389 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5390 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5391 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5392 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5393 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5394 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5395 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5396 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5397 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5398 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5399 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5400 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5401 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5402 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5403 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5404 // CHECK13: cond.true:
5405 // CHECK13-NEXT: br label [[COND_END:%.*]]
5406 // CHECK13: cond.false:
5407 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5408 // CHECK13-NEXT: br label [[COND_END]]
5409 // CHECK13: cond.end:
5410 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5411 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5412 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5413 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5414 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5415 // CHECK13: omp.inner.for.cond:
5416 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]
5417 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]
5418 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5419 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5420 // CHECK13: omp.inner.for.body:
5421 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
5422 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5423 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5424 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
5425 // CHECK13-NEXT: invoke void @_Z3foov()
5426 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP27]]
5427 // CHECK13: invoke.cont:
5428 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5429 // CHECK13: omp.body.continue:
5430 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5431 // CHECK13: omp.inner.for.inc:
5432 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
5433 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5434 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
5435 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
5436 // CHECK13: omp.inner.for.end:
5437 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5438 // CHECK13: omp.loop.exit:
5439 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5440 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5441 // CHECK13-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5442 // CHECK13-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5443 // CHECK13: .omp.final.then:
5444 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5445 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5446 // CHECK13: .omp.final.done:
5447 // CHECK13-NEXT: ret void
5448 // CHECK13: terminate.lpad:
5449 // CHECK13-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
5450 // CHECK13-NEXT: catch i8* null
5451 // CHECK13-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5452 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP27]]
5453 // CHECK13-NEXT: unreachable
5454 //
5455 //
5456 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
5457 // CHECK13-SAME: () #[[ATTR3]] {
5458 // CHECK13-NEXT: entry:
5459 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
5460 // CHECK13-NEXT: ret void
5461 //
5462 //
5463 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
5464 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5465 // CHECK13-NEXT: entry:
5466 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5467 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5468 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5469 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5470 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5471 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5472 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5473 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5474 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5475 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5476 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5477 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5478 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5479 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5480 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5481 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5482 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5483 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5484 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5485 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5486 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5487 // CHECK13: cond.true:
5488 // CHECK13-NEXT: br label [[COND_END:%.*]]
5489 // CHECK13: cond.false:
5490 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5491 // CHECK13-NEXT: br label [[COND_END]]
5492 // CHECK13: cond.end:
5493 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5494 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5495 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5496 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5497 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5498 // CHECK13: omp.inner.for.cond:
5499 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30:![0-9]+]]
5500 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
5501 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5502 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5503 // CHECK13: omp.inner.for.body:
5504 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23), !llvm.access.group [[ACC_GRP30]]
5505 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP30]]
5506 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5507 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP30]]
5508 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5509 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP30]]
5510 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5511 // CHECK13: omp.inner.for.inc:
5512 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
5513 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP30]]
5514 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5515 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP30]]
5516 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP31:![0-9]+]]
5517 // CHECK13: omp.inner.for.end:
5518 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5519 // CHECK13: omp.loop.exit:
5520 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5521 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5522 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5523 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5524 // CHECK13: .omp.final.then:
5525 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5526 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5527 // CHECK13: .omp.final.done:
5528 // CHECK13-NEXT: ret void
5529 //
5530 //
5531 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
5532 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5533 // CHECK13-NEXT: entry:
5534 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5535 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5536 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5537 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5538 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5539 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5540 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5541 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5542 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5543 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5544 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5545 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5546 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5547 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5548 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5549 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5550 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5551 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5552 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5553 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5554 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5555 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5556 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5557 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5558 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5559 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5560 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5561 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5562 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5563 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5564 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5565 // CHECK13: cond.true:
5566 // CHECK13-NEXT: br label [[COND_END:%.*]]
5567 // CHECK13: cond.false:
5568 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5569 // CHECK13-NEXT: br label [[COND_END]]
5570 // CHECK13: cond.end:
5571 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5572 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5573 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5574 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5575 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5576 // CHECK13: omp.inner.for.cond:
5577 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33:![0-9]+]]
5578 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP33]]
5579 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5580 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5581 // CHECK13: omp.inner.for.body:
5582 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
5583 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5584 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5585 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP33]]
5586 // CHECK13-NEXT: invoke void @_Z3foov()
5587 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP33]]
5588 // CHECK13: invoke.cont:
5589 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5590 // CHECK13: omp.body.continue:
5591 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5592 // CHECK13: omp.inner.for.inc:
5593 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
5594 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5595 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP33]]
5596 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
5597 // CHECK13: omp.inner.for.end:
5598 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5599 // CHECK13: omp.loop.exit:
5600 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5601 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5602 // CHECK13-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5603 // CHECK13-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5604 // CHECK13: .omp.final.then:
5605 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5606 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5607 // CHECK13: .omp.final.done:
5608 // CHECK13-NEXT: ret void
5609 // CHECK13: terminate.lpad:
5610 // CHECK13-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
5611 // CHECK13-NEXT: catch i8* null
5612 // CHECK13-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5613 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP33]]
5614 // CHECK13-NEXT: unreachable
5615 //
5616 //
5617 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
5618 // CHECK13-SAME: () #[[ATTR3]] {
5619 // CHECK13-NEXT: entry:
5620 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
5621 // CHECK13-NEXT: ret void
5622 //
5623 //
5624 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
5625 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
5626 // CHECK13-NEXT: entry:
5627 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5628 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5629 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5630 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5631 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5632 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5633 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5634 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5635 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5636 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5637 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5638 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5639 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5640 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5641 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5642 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5643 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5644 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5645 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5646 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5647 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5648 // CHECK13: cond.true:
5649 // CHECK13-NEXT: br label [[COND_END:%.*]]
5650 // CHECK13: cond.false:
5651 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5652 // CHECK13-NEXT: br label [[COND_END]]
5653 // CHECK13: cond.end:
5654 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5655 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5656 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5657 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5658 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5659 // CHECK13: omp.inner.for.cond:
5660 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36:![0-9]+]]
5661 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
5662 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5663 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5664 // CHECK13: omp.inner.for.body:
5665 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1), !llvm.access.group [[ACC_GRP36]]
5666 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP36]]
5667 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5668 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP36]]
5669 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5670 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP36]]
5671 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5672 // CHECK13: omp.inner.for.inc:
5673 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
5674 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP36]]
5675 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5676 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP36]]
5677 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP37:![0-9]+]]
5678 // CHECK13: omp.inner.for.end:
5679 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5680 // CHECK13: omp.loop.exit:
5681 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5682 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5683 // CHECK13-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5684 // CHECK13-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5685 // CHECK13: .omp.final.then:
5686 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5687 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5688 // CHECK13: .omp.final.done:
5689 // CHECK13-NEXT: ret void
5690 //
5691 //
5692 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
5693 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5694 // CHECK13-NEXT: entry:
5695 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5696 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5697 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5698 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5699 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5700 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5701 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5702 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5703 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5704 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5705 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5706 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5707 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5708 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5709 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5710 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5711 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5712 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5713 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5714 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5715 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5716 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5717 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5718 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5719 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5720 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5721 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5722 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5723 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5724 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5725 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5726 // CHECK13: cond.true:
5727 // CHECK13-NEXT: br label [[COND_END:%.*]]
5728 // CHECK13: cond.false:
5729 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5730 // CHECK13-NEXT: br label [[COND_END]]
5731 // CHECK13: cond.end:
5732 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5733 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5734 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5735 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5736 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5737 // CHECK13: omp.inner.for.cond:
5738 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
5739 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
5740 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5741 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5742 // CHECK13: omp.inner.for.body:
5743 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
5744 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5745 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5746 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
5747 // CHECK13-NEXT: invoke void @_Z3foov()
5748 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP39]]
5749 // CHECK13: invoke.cont:
5750 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5751 // CHECK13: omp.body.continue:
5752 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5753 // CHECK13: omp.inner.for.inc:
5754 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
5755 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5756 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
5757 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
5758 // CHECK13: omp.inner.for.end:
5759 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5760 // CHECK13: omp.loop.exit:
5761 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5762 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5763 // CHECK13-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5764 // CHECK13-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5765 // CHECK13: .omp.final.then:
5766 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5767 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5768 // CHECK13: .omp.final.done:
5769 // CHECK13-NEXT: ret void
5770 // CHECK13: terminate.lpad:
5771 // CHECK13-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
5772 // CHECK13-NEXT: catch i8* null
5773 // CHECK13-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5774 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP39]]
5775 // CHECK13-NEXT: unreachable
5776 //
5777 //
5778 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
5779 // CHECK13-SAME: () #[[ATTR3]] {
5780 // CHECK13-NEXT: entry:
5781 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
5782 // CHECK13-NEXT: ret void
5783 //
5784 //
5785 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
5786 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5787 // CHECK13-NEXT: entry:
5788 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5789 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5790 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5791 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5792 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5793 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5794 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5795 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5796 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5797 // CHECK13-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
5798 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5799 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5800 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5801 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5802 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5803 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5804 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5805 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5806 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5807 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5808 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5809 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5810 // CHECK13: cond.true:
5811 // CHECK13-NEXT: br label [[COND_END:%.*]]
5812 // CHECK13: cond.false:
5813 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5814 // CHECK13-NEXT: br label [[COND_END]]
5815 // CHECK13: cond.end:
5816 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5817 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5818 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5819 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5820 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5821 // CHECK13: omp.inner.for.cond:
5822 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42:![0-9]+]]
5823 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
5824 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5825 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5826 // CHECK13: omp.inner.for.body:
5827 // CHECK13-NEXT: invoke void @_ZN1SC1El(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 23)
5828 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP42]]
5829 // CHECK13: invoke.cont:
5830 // CHECK13-NEXT: [[CALL:%.*]] = invoke i8 @_ZN1ScvcEv(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]])
5831 // CHECK13-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]], !llvm.access.group [[ACC_GRP42]]
5832 // CHECK13: invoke.cont2:
5833 // CHECK13-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
5834 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]), !llvm.access.group [[ACC_GRP42]]
5835 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]], !llvm.access.group [[ACC_GRP42]]
5836 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP42]]
5837 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5838 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP42]]
5839 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5840 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP42]]
5841 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5842 // CHECK13: omp.inner.for.inc:
5843 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
5844 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP42]]
5845 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5846 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP42]]
5847 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP43:![0-9]+]]
5848 // CHECK13: omp.inner.for.end:
5849 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5850 // CHECK13: omp.loop.exit:
5851 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5852 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5853 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5854 // CHECK13-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5855 // CHECK13: .omp.final.then:
5856 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5857 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5858 // CHECK13: .omp.final.done:
5859 // CHECK13-NEXT: ret void
5860 // CHECK13: terminate.lpad:
5861 // CHECK13-NEXT: [[TMP16:%.*]] = landingpad { i8*, i32 }
5862 // CHECK13-NEXT: catch i8* null
5863 // CHECK13-NEXT: [[TMP17:%.*]] = extractvalue { i8*, i32 } [[TMP16]], 0
5864 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP17]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP42]]
5865 // CHECK13-NEXT: unreachable
5866 //
5867 //
5868 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
5869 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
5870 // CHECK13-NEXT: entry:
5871 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5872 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5873 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5874 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5875 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5876 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5877 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5878 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5879 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5880 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5881 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5882 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5883 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5884 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5885 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5886 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5887 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5888 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5889 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5890 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5891 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5892 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5893 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5894 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5895 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5896 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5897 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5898 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5899 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5900 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5901 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5902 // CHECK13: cond.true:
5903 // CHECK13-NEXT: br label [[COND_END:%.*]]
5904 // CHECK13: cond.false:
5905 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5906 // CHECK13-NEXT: br label [[COND_END]]
5907 // CHECK13: cond.end:
5908 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5909 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5910 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5911 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5912 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5913 // CHECK13: omp.inner.for.cond:
5914 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45:![0-9]+]]
5915 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP45]]
5916 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5917 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5918 // CHECK13: omp.inner.for.body:
5919 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
5920 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5921 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5922 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP45]]
5923 // CHECK13-NEXT: invoke void @_Z3foov()
5924 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]], !llvm.access.group [[ACC_GRP45]]
5925 // CHECK13: invoke.cont:
5926 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5927 // CHECK13: omp.body.continue:
5928 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5929 // CHECK13: omp.inner.for.inc:
5930 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
5931 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5932 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP45]]
5933 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP46:![0-9]+]]
5934 // CHECK13: omp.inner.for.end:
5935 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5936 // CHECK13: omp.loop.exit:
5937 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5938 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5939 // CHECK13-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5940 // CHECK13-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5941 // CHECK13: .omp.final.then:
5942 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
5943 // CHECK13-NEXT: br label [[DOTOMP_FINAL_DONE]]
5944 // CHECK13: .omp.final.done:
5945 // CHECK13-NEXT: ret void
5946 // CHECK13: terminate.lpad:
5947 // CHECK13-NEXT: [[TMP13:%.*]] = landingpad { i8*, i32 }
5948 // CHECK13-NEXT: catch i8* null
5949 // CHECK13-NEXT: [[TMP14:%.*]] = extractvalue { i8*, i32 } [[TMP13]], 0
5950 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP14]]) #[[ATTR10]], !llvm.access.group [[ACC_GRP45]]
5951 // CHECK13-NEXT: unreachable
5952 //
5953 //
5954 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
5955 // CHECK13-SAME: (%struct.S* nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
5956 // CHECK13-NEXT: entry:
5957 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
5958 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
5959 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
5960 // CHECK13-NEXT: ret void
5961 //
5962 //
5963 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5964 // CHECK13-SAME: () #[[ATTR9:[0-9]+]] {
5965 // CHECK13-NEXT: entry:
5966 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1)
5967 // CHECK13-NEXT: ret void
5968 //
5969