1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
15
16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
22
23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 void fn1();
34 void fn2();
35 void fn3();
36 void fn4();
37 void fn5();
38 void fn6();
39
40 int Arg;
41
gtid_test()42 void gtid_test() {
43 #pragma omp target
44 #pragma omp teams
45 #pragma omp distribute parallel for simd
46 for(int i = 0 ; i < 100; i++) {}
47
48 #pragma omp target
49 #pragma omp teams
50 #pragma omp distribute parallel for simd if (parallel: false)
51 for(int i = 0 ; i < 100; i++) {
52 gtid_test();
53 }
54 }
55
56
57 template <typename T>
tmain(T Arg)58 int tmain(T Arg) {
59 #pragma omp target
60 #pragma omp teams
61 #pragma omp distribute parallel for simd if (true)
62 for(int i = 0 ; i < 100; i++) {
63 fn1();
64 }
65 #pragma omp target
66 #pragma omp teams
67 #pragma omp distribute parallel for simd if (false)
68 for(int i = 0 ; i < 100; i++) {
69 fn2();
70 }
71 #pragma omp target
72 #pragma omp teams
73 #pragma omp distribute parallel for simd if (parallel: Arg)
74 for(int i = 0 ; i < 100; i++) {
75 fn3();
76 }
77 return 0;
78 }
79
main()80 int main() {
81 #pragma omp target
82 #pragma omp teams
83 #pragma omp distribute parallel for simd if (true)
84 for(int i = 0 ; i < 100; i++) {
85
86
87 fn4();
88 }
89
90 #pragma omp target
91 #pragma omp teams
92 #pragma omp distribute parallel for simd if (false)
93 for(int i = 0 ; i < 100; i++) {
94
95
96 fn5();
97 }
98
99 #pragma omp target
100 #pragma omp teams
101 #pragma omp distribute parallel for simd if (Arg)
102 for(int i = 0 ; i < 100; i++) {
103
104
105 fn6();
106 }
107
108 return tmain(Arg);
109 }
110
111
112
113
114
115
116 // call void [[T_OUTLINE_FUN_3:@.+]](
117
118
119 #endif
120 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
121 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
122 // CHECK1-NEXT: entry:
123 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
124 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
125 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
126 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
127 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
128 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
129 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
130 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
131 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
132 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
133 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
134 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
135 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
136 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
137 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
138 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
139 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
140 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
141 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
142 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
143 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
144 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
145 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
146 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
147 // CHECK1: omp_offload.failed:
148 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
149 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
150 // CHECK1: omp_offload.cont:
151 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
152 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
153 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
154 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
155 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
156 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
157 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
158 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
159 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
160 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
161 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
162 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
163 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
164 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
165 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
166 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
167 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
168 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
169 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
170 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
171 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
172 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
173 // CHECK1: omp_offload.failed3:
174 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
175 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
176 // CHECK1: omp_offload.cont4:
177 // CHECK1-NEXT: ret void
178 //
179 //
180 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
181 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
182 // CHECK1-NEXT: entry:
183 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
184 // CHECK1-NEXT: ret void
185 //
186 //
187 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
188 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
189 // CHECK1-NEXT: entry:
190 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
191 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
192 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
193 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
194 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
198 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
199 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
200 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
201 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
202 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
203 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
204 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
205 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
206 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
207 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
208 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
209 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
210 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
211 // CHECK1: cond.true:
212 // CHECK1-NEXT: br label [[COND_END:%.*]]
213 // CHECK1: cond.false:
214 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
215 // CHECK1-NEXT: br label [[COND_END]]
216 // CHECK1: cond.end:
217 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
218 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
219 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
220 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
221 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
222 // CHECK1: omp.inner.for.cond:
223 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
224 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
225 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
226 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
227 // CHECK1: omp.inner.for.body:
228 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
229 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
230 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
231 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
232 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
233 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
234 // CHECK1: omp.inner.for.inc:
235 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
236 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
237 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
238 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
239 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
240 // CHECK1: omp.inner.for.end:
241 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
242 // CHECK1: omp.loop.exit:
243 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
244 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
245 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
246 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
247 // CHECK1: .omp.final.then:
248 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
249 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
250 // CHECK1: .omp.final.done:
251 // CHECK1-NEXT: ret void
252 //
253 //
254 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
255 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
256 // CHECK1-NEXT: entry:
257 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
258 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
259 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
260 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
261 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
262 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
263 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
264 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
265 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
266 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
267 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
269 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
270 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
271 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
272 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
273 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
274 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
275 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
276 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
277 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
278 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
279 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
280 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
281 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
282 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
283 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
284 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
285 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
286 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
287 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
288 // CHECK1: cond.true:
289 // CHECK1-NEXT: br label [[COND_END:%.*]]
290 // CHECK1: cond.false:
291 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
292 // CHECK1-NEXT: br label [[COND_END]]
293 // CHECK1: cond.end:
294 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
295 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
296 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
297 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
298 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
299 // CHECK1: omp.inner.for.cond:
300 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
301 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
302 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
303 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
304 // CHECK1: omp.inner.for.body:
305 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
306 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
307 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
308 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
309 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
310 // CHECK1: omp.body.continue:
311 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
312 // CHECK1: omp.inner.for.inc:
313 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
314 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
315 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
316 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
317 // CHECK1: omp.inner.for.end:
318 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
319 // CHECK1: omp.loop.exit:
320 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
321 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
322 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
323 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
324 // CHECK1: .omp.final.then:
325 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
326 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
327 // CHECK1: .omp.final.done:
328 // CHECK1-NEXT: ret void
329 //
330 //
331 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
332 // CHECK1-SAME: () #[[ATTR1]] {
333 // CHECK1-NEXT: entry:
334 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
335 // CHECK1-NEXT: ret void
336 //
337 //
338 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
339 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
340 // CHECK1-NEXT: entry:
341 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
342 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
343 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
344 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
345 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
346 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
347 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
348 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
349 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
350 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
351 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
352 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
353 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
354 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
355 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
356 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
357 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
358 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
359 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
360 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
361 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
362 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
363 // CHECK1: cond.true:
364 // CHECK1-NEXT: br label [[COND_END:%.*]]
365 // CHECK1: cond.false:
366 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
367 // CHECK1-NEXT: br label [[COND_END]]
368 // CHECK1: cond.end:
369 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
370 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
371 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
372 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
373 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
374 // CHECK1: omp.inner.for.cond:
375 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
376 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
377 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
378 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
379 // CHECK1: omp.inner.for.body:
380 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
381 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
382 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
383 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
384 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
385 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
386 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
387 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
388 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
389 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
390 // CHECK1: omp.inner.for.inc:
391 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
392 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
393 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
394 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
395 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
396 // CHECK1: omp.inner.for.end:
397 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
398 // CHECK1: omp.loop.exit:
399 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
400 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
401 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
402 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
403 // CHECK1: .omp.final.then:
404 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
405 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
406 // CHECK1: .omp.final.done:
407 // CHECK1-NEXT: ret void
408 //
409 //
410 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
411 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
412 // CHECK1-NEXT: entry:
413 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
414 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
415 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
416 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
417 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
418 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
419 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
420 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
421 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
422 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
423 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
424 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
425 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
426 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
427 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
428 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
429 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
430 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
431 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
432 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
433 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
434 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
435 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
436 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
437 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
438 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
439 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
440 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
441 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
442 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
443 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
444 // CHECK1: cond.true:
445 // CHECK1-NEXT: br label [[COND_END:%.*]]
446 // CHECK1: cond.false:
447 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
448 // CHECK1-NEXT: br label [[COND_END]]
449 // CHECK1: cond.end:
450 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
451 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
452 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
453 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
454 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
455 // CHECK1: omp.inner.for.cond:
456 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
457 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
458 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
459 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
460 // CHECK1: omp.inner.for.body:
461 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
462 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
463 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
464 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
465 // CHECK1-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
466 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
467 // CHECK1: omp.body.continue:
468 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
469 // CHECK1: omp.inner.for.inc:
470 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
471 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
472 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
473 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
474 // CHECK1: omp.inner.for.end:
475 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
476 // CHECK1: omp.loop.exit:
477 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
478 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
479 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
480 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
481 // CHECK1: .omp.final.then:
482 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
483 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
484 // CHECK1: .omp.final.done:
485 // CHECK1-NEXT: ret void
486 //
487 //
488 // CHECK1-LABEL: define {{[^@]+}}@main
489 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
490 // CHECK1-NEXT: entry:
491 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
492 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
493 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
494 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
495 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
496 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
497 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
498 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
499 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
500 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
501 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
502 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
503 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
504 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
505 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
506 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
507 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
508 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
509 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
510 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
511 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
512 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
513 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
514 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
515 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
516 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
517 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
518 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
519 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
520 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
521 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
522 // CHECK1: omp_offload.failed:
523 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
524 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
525 // CHECK1: omp_offload.cont:
526 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
527 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
528 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
529 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
530 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
531 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
532 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
533 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
534 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
535 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
536 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
537 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
538 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
539 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
540 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
541 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
542 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
543 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
544 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
545 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
546 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
547 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
548 // CHECK1: omp_offload.failed3:
549 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
550 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
551 // CHECK1: omp_offload.cont4:
552 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
553 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
554 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
555 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
556 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
557 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
558 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
559 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
560 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
561 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
562 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
563 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8
564 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
565 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
566 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
567 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
568 // CHECK1-NEXT: store i32 1, i32* [[TMP31]], align 4
569 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
570 // CHECK1-NEXT: store i32 1, i32* [[TMP32]], align 4
571 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
572 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
573 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
574 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
575 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
576 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP35]], align 8
577 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
578 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP36]], align 8
579 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
580 // CHECK1-NEXT: store i8** null, i8*** [[TMP37]], align 8
581 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
582 // CHECK1-NEXT: store i8** null, i8*** [[TMP38]], align 8
583 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
584 // CHECK1-NEXT: store i64 100, i64* [[TMP39]], align 8
585 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
586 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
587 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
588 // CHECK1: omp_offload.failed7:
589 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP23]]) #[[ATTR2]]
590 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
591 // CHECK1: omp_offload.cont8:
592 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* @Arg, align 4
593 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]])
594 // CHECK1-NEXT: ret i32 [[CALL]]
595 //
596 //
597 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
598 // CHECK1-SAME: () #[[ATTR1]] {
599 // CHECK1-NEXT: entry:
600 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
601 // CHECK1-NEXT: ret void
602 //
603 //
604 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
605 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
606 // CHECK1-NEXT: entry:
607 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
608 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
609 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
610 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
611 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
612 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
613 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
614 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
615 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
616 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
617 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
618 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
619 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
620 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
621 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
622 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
623 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
624 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
625 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
626 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
627 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
628 // CHECK1: cond.true:
629 // CHECK1-NEXT: br label [[COND_END:%.*]]
630 // CHECK1: cond.false:
631 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
632 // CHECK1-NEXT: br label [[COND_END]]
633 // CHECK1: cond.end:
634 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
635 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
636 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
637 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
638 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
639 // CHECK1: omp.inner.for.cond:
640 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
641 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
642 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
643 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
644 // CHECK1: omp.inner.for.body:
645 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
646 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
647 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
648 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
649 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
650 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
651 // CHECK1: omp.inner.for.inc:
652 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
653 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
654 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
655 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
656 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
657 // CHECK1: omp.inner.for.end:
658 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
659 // CHECK1: omp.loop.exit:
660 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
661 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
662 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
663 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
664 // CHECK1: .omp.final.then:
665 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
666 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
667 // CHECK1: .omp.final.done:
668 // CHECK1-NEXT: ret void
669 //
670 //
671 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
672 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
673 // CHECK1-NEXT: entry:
674 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
675 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
676 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
677 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
678 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
679 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
680 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
681 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
682 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
683 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
684 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
685 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
686 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
687 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
688 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
689 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
690 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
691 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
692 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
693 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
694 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
695 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
696 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
697 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
698 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
699 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
700 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
701 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
702 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
703 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
704 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
705 // CHECK1: cond.true:
706 // CHECK1-NEXT: br label [[COND_END:%.*]]
707 // CHECK1: cond.false:
708 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
709 // CHECK1-NEXT: br label [[COND_END]]
710 // CHECK1: cond.end:
711 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
712 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
713 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
714 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
715 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
716 // CHECK1: omp.inner.for.cond:
717 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
718 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
719 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
720 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
721 // CHECK1: omp.inner.for.body:
722 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
723 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
724 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
725 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
726 // CHECK1-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
727 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
728 // CHECK1: omp.body.continue:
729 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
730 // CHECK1: omp.inner.for.inc:
731 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
732 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
733 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
734 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
735 // CHECK1: omp.inner.for.end:
736 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
737 // CHECK1: omp.loop.exit:
738 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
739 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
740 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
741 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
742 // CHECK1: .omp.final.then:
743 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
744 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
745 // CHECK1: .omp.final.done:
746 // CHECK1-NEXT: ret void
747 //
748 //
749 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
750 // CHECK1-SAME: () #[[ATTR1]] {
751 // CHECK1-NEXT: entry:
752 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
753 // CHECK1-NEXT: ret void
754 //
755 //
756 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
757 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
758 // CHECK1-NEXT: entry:
759 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
760 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
761 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
762 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
763 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
764 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
765 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
766 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
767 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
768 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
769 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
770 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
771 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
772 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
773 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
774 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
775 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
776 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
777 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
778 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
779 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
780 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
781 // CHECK1: cond.true:
782 // CHECK1-NEXT: br label [[COND_END:%.*]]
783 // CHECK1: cond.false:
784 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
785 // CHECK1-NEXT: br label [[COND_END]]
786 // CHECK1: cond.end:
787 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
788 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
789 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
790 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
791 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
792 // CHECK1: omp.inner.for.cond:
793 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
794 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
795 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
796 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
797 // CHECK1: omp.inner.for.body:
798 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
799 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
800 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
801 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
802 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
803 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
804 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
805 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
806 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
807 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
808 // CHECK1: omp.inner.for.inc:
809 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
810 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
811 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
812 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
813 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
814 // CHECK1: omp.inner.for.end:
815 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
816 // CHECK1: omp.loop.exit:
817 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
818 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
819 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
820 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
821 // CHECK1: .omp.final.then:
822 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
823 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
824 // CHECK1: .omp.final.done:
825 // CHECK1-NEXT: ret void
826 //
827 //
828 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
829 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
830 // CHECK1-NEXT: entry:
831 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
832 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
833 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
834 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
835 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
836 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
837 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
838 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
839 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
840 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
841 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
842 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
843 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
844 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
845 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
846 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
847 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
848 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
849 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
850 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
851 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
852 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
853 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
854 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
855 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
856 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
857 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
858 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
859 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
860 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
861 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
862 // CHECK1: cond.true:
863 // CHECK1-NEXT: br label [[COND_END:%.*]]
864 // CHECK1: cond.false:
865 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
866 // CHECK1-NEXT: br label [[COND_END]]
867 // CHECK1: cond.end:
868 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
869 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
870 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
871 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
872 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
873 // CHECK1: omp.inner.for.cond:
874 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
875 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
876 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
877 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
878 // CHECK1: omp.inner.for.body:
879 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
880 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
881 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
882 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
883 // CHECK1-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
884 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
885 // CHECK1: omp.body.continue:
886 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
887 // CHECK1: omp.inner.for.inc:
888 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
889 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
890 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
891 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
892 // CHECK1: omp.inner.for.end:
893 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
894 // CHECK1: omp.loop.exit:
895 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
896 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
897 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
898 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
899 // CHECK1: .omp.final.then:
900 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
901 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
902 // CHECK1: .omp.final.done:
903 // CHECK1-NEXT: ret void
904 //
905 //
906 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
907 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
908 // CHECK1-NEXT: entry:
909 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
910 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
911 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
912 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]])
913 // CHECK1-NEXT: ret void
914 //
915 //
916 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
917 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
918 // CHECK1-NEXT: entry:
919 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
920 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
921 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
922 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
923 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
924 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
925 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
926 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
927 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
928 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
929 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
930 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
931 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
932 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
933 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
934 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
935 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
936 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
937 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
938 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
939 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
940 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
941 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
942 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
943 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
944 // CHECK1: cond.true:
945 // CHECK1-NEXT: br label [[COND_END:%.*]]
946 // CHECK1: cond.false:
947 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
948 // CHECK1-NEXT: br label [[COND_END]]
949 // CHECK1: cond.end:
950 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
951 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
952 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
953 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
954 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
955 // CHECK1: omp.inner.for.cond:
956 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
957 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
958 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
959 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
960 // CHECK1: omp.inner.for.body:
961 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
962 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
963 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
964 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
965 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4, !llvm.access.group [[ACC_GRP38]]
966 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
967 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
968 // CHECK1: omp_if.then:
969 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP38]]
970 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
971 // CHECK1: omp_if.else:
972 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
973 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
974 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
975 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
976 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
977 // CHECK1-NEXT: br label [[OMP_IF_END]]
978 // CHECK1: omp_if.end:
979 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
980 // CHECK1: omp.inner.for.inc:
981 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
982 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
983 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
984 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
985 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
986 // CHECK1: omp.inner.for.end:
987 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
988 // CHECK1: omp.loop.exit:
989 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
990 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
991 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
992 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
993 // CHECK1: .omp.final.then:
994 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
995 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
996 // CHECK1: .omp.final.done:
997 // CHECK1-NEXT: ret void
998 //
999 //
1000 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
1001 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1002 // CHECK1-NEXT: entry:
1003 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1004 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1005 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1006 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1007 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1008 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1009 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1010 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1011 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1012 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1013 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1014 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1015 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1016 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1017 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1018 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1019 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1020 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1021 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1022 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1023 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1024 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1025 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1026 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1027 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1028 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1029 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1030 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1031 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1032 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1033 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1034 // CHECK1: cond.true:
1035 // CHECK1-NEXT: br label [[COND_END:%.*]]
1036 // CHECK1: cond.false:
1037 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1038 // CHECK1-NEXT: br label [[COND_END]]
1039 // CHECK1: cond.end:
1040 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1041 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1042 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1043 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1044 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1045 // CHECK1: omp.inner.for.cond:
1046 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
1047 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
1048 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1049 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1050 // CHECK1: omp.inner.for.body:
1051 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1052 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1053 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1054 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
1055 // CHECK1-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
1056 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1057 // CHECK1: omp.body.continue:
1058 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1059 // CHECK1: omp.inner.for.inc:
1060 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1061 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1062 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1063 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
1064 // CHECK1: omp.inner.for.end:
1065 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1066 // CHECK1: omp.loop.exit:
1067 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1068 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1069 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1070 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1071 // CHECK1: .omp.final.then:
1072 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1073 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1074 // CHECK1: .omp.final.done:
1075 // CHECK1-NEXT: ret void
1076 //
1077 //
1078 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
1079 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
1080 // CHECK1-NEXT: entry:
1081 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
1082 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1083 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1084 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1085 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1086 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1087 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1088 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
1089 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
1090 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1091 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1092 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
1093 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1094 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
1095 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1096 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
1097 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1098 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
1099 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1100 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
1101 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1102 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
1103 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1104 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
1105 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1106 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
1107 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1108 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
1109 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1110 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1111 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1112 // CHECK1: omp_offload.failed:
1113 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
1114 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1115 // CHECK1: omp_offload.cont:
1116 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1117 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1118 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
1119 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1120 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
1121 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1122 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
1123 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1124 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
1125 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1126 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
1127 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1128 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
1129 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1130 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
1131 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1132 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
1133 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1134 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
1135 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1136 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1137 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1138 // CHECK1: omp_offload.failed3:
1139 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
1140 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1141 // CHECK1: omp_offload.cont4:
1142 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
1143 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1144 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
1145 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1146 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1147 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
1148 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
1149 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1150 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
1151 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
1152 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1153 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8
1154 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1155 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1156 // CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1157 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
1158 // CHECK1-NEXT: store i32 1, i32* [[TMP31]], align 4
1159 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
1160 // CHECK1-NEXT: store i32 1, i32* [[TMP32]], align 4
1161 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
1162 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
1163 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
1164 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
1165 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
1166 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP35]], align 8
1167 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
1168 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP36]], align 8
1169 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
1170 // CHECK1-NEXT: store i8** null, i8*** [[TMP37]], align 8
1171 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
1172 // CHECK1-NEXT: store i8** null, i8*** [[TMP38]], align 8
1173 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
1174 // CHECK1-NEXT: store i64 100, i64* [[TMP39]], align 8
1175 // CHECK1-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
1176 // CHECK1-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
1177 // CHECK1-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1178 // CHECK1: omp_offload.failed7:
1179 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP23]]) #[[ATTR2]]
1180 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
1181 // CHECK1: omp_offload.cont8:
1182 // CHECK1-NEXT: ret i32 0
1183 //
1184 //
1185 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
1186 // CHECK1-SAME: () #[[ATTR1]] {
1187 // CHECK1-NEXT: entry:
1188 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1189 // CHECK1-NEXT: ret void
1190 //
1191 //
1192 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1193 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1194 // CHECK1-NEXT: entry:
1195 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1196 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1197 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1198 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1199 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1200 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1201 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1202 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1203 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1204 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1205 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1206 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1207 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1208 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1209 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1210 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1211 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1212 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1213 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1214 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1215 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1216 // CHECK1: cond.true:
1217 // CHECK1-NEXT: br label [[COND_END:%.*]]
1218 // CHECK1: cond.false:
1219 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1220 // CHECK1-NEXT: br label [[COND_END]]
1221 // CHECK1: cond.end:
1222 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1223 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1224 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1225 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1226 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1227 // CHECK1: omp.inner.for.cond:
1228 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
1229 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1230 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1231 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1232 // CHECK1: omp.inner.for.body:
1233 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
1234 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1235 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1236 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1237 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
1238 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1239 // CHECK1: omp.inner.for.inc:
1240 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1241 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
1242 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1243 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1244 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
1245 // CHECK1: omp.inner.for.end:
1246 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1247 // CHECK1: omp.loop.exit:
1248 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1249 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1250 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1251 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1252 // CHECK1: .omp.final.then:
1253 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1254 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1255 // CHECK1: .omp.final.done:
1256 // CHECK1-NEXT: ret void
1257 //
1258 //
1259 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1260 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1261 // CHECK1-NEXT: entry:
1262 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1263 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1264 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1265 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1266 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1267 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1268 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1269 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1270 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1271 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1272 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1273 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1274 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1275 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1276 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1277 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1278 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1279 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1280 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1281 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1282 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1283 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1284 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1285 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1286 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1287 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1288 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1289 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1290 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1291 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1292 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1293 // CHECK1: cond.true:
1294 // CHECK1-NEXT: br label [[COND_END:%.*]]
1295 // CHECK1: cond.false:
1296 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1297 // CHECK1-NEXT: br label [[COND_END]]
1298 // CHECK1: cond.end:
1299 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1300 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1301 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1302 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1303 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1304 // CHECK1: omp.inner.for.cond:
1305 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
1306 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
1307 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1308 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1309 // CHECK1: omp.inner.for.body:
1310 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1311 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1312 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1313 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
1314 // CHECK1-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
1315 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1316 // CHECK1: omp.body.continue:
1317 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1318 // CHECK1: omp.inner.for.inc:
1319 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1320 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1321 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1322 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
1323 // CHECK1: omp.inner.for.end:
1324 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1325 // CHECK1: omp.loop.exit:
1326 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1327 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1328 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1329 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1330 // CHECK1: .omp.final.then:
1331 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1332 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1333 // CHECK1: .omp.final.done:
1334 // CHECK1-NEXT: ret void
1335 //
1336 //
1337 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
1338 // CHECK1-SAME: () #[[ATTR1]] {
1339 // CHECK1-NEXT: entry:
1340 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
1341 // CHECK1-NEXT: ret void
1342 //
1343 //
1344 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
1345 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1346 // CHECK1-NEXT: entry:
1347 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1348 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1349 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1350 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1351 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1352 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1353 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1354 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1355 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1356 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1357 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1358 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1359 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1360 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1361 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1362 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1363 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1364 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1365 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1366 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1367 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1368 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1369 // CHECK1: cond.true:
1370 // CHECK1-NEXT: br label [[COND_END:%.*]]
1371 // CHECK1: cond.false:
1372 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1373 // CHECK1-NEXT: br label [[COND_END]]
1374 // CHECK1: cond.end:
1375 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1376 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1377 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1378 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1379 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1380 // CHECK1: omp.inner.for.cond:
1381 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
1382 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1383 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1384 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1385 // CHECK1: omp.inner.for.body:
1386 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
1387 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1388 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1389 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1390 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1391 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
1392 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
1393 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
1394 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1395 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1396 // CHECK1: omp.inner.for.inc:
1397 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1398 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
1399 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1400 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1401 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
1402 // CHECK1: omp.inner.for.end:
1403 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1404 // CHECK1: omp.loop.exit:
1405 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1406 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1407 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1408 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1409 // CHECK1: .omp.final.then:
1410 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1411 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1412 // CHECK1: .omp.final.done:
1413 // CHECK1-NEXT: ret void
1414 //
1415 //
1416 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1417 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1418 // CHECK1-NEXT: entry:
1419 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1420 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1421 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1422 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1423 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1424 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1425 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1426 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1427 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1428 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1429 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1430 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1431 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1432 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1433 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1434 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1435 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1436 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1437 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1438 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1439 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1440 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1441 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1442 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1443 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1444 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1445 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1446 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1447 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1448 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1449 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1450 // CHECK1: cond.true:
1451 // CHECK1-NEXT: br label [[COND_END:%.*]]
1452 // CHECK1: cond.false:
1453 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1454 // CHECK1-NEXT: br label [[COND_END]]
1455 // CHECK1: cond.end:
1456 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1457 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1458 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1459 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1460 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1461 // CHECK1: omp.inner.for.cond:
1462 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
1463 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
1464 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1465 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1466 // CHECK1: omp.inner.for.body:
1467 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1468 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1469 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1470 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
1471 // CHECK1-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
1472 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1473 // CHECK1: omp.body.continue:
1474 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1475 // CHECK1: omp.inner.for.inc:
1476 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1477 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1478 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1479 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
1480 // CHECK1: omp.inner.for.end:
1481 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1482 // CHECK1: omp.loop.exit:
1483 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1484 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1485 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1486 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1487 // CHECK1: .omp.final.then:
1488 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1489 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1490 // CHECK1: .omp.final.done:
1491 // CHECK1-NEXT: ret void
1492 //
1493 //
1494 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
1495 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
1496 // CHECK1-NEXT: entry:
1497 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1498 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1499 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1500 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]])
1501 // CHECK1-NEXT: ret void
1502 //
1503 //
1504 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1505 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
1506 // CHECK1-NEXT: entry:
1507 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1508 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1509 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
1510 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1511 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1512 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1513 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1514 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1515 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1516 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1517 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1518 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1519 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1520 // CHECK1-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
1521 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
1522 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1523 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1524 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1525 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1526 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1527 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1528 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1529 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1530 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
1531 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1532 // CHECK1: cond.true:
1533 // CHECK1-NEXT: br label [[COND_END:%.*]]
1534 // CHECK1: cond.false:
1535 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1536 // CHECK1-NEXT: br label [[COND_END]]
1537 // CHECK1: cond.end:
1538 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1539 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1540 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1541 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1542 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1543 // CHECK1: omp.inner.for.cond:
1544 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
1545 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1546 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1547 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1548 // CHECK1: omp.inner.for.body:
1549 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
1550 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1551 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1552 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1553 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4, !llvm.access.group [[ACC_GRP56]]
1554 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
1555 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1556 // CHECK1: omp_if.then:
1557 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP56]]
1558 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1559 // CHECK1: omp_if.else:
1560 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
1561 // CHECK1-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
1562 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
1563 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
1564 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
1565 // CHECK1-NEXT: br label [[OMP_IF_END]]
1566 // CHECK1: omp_if.end:
1567 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1568 // CHECK1: omp.inner.for.inc:
1569 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1570 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
1571 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1572 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1573 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
1574 // CHECK1: omp.inner.for.end:
1575 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1576 // CHECK1: omp.loop.exit:
1577 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1578 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1579 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1580 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1581 // CHECK1: .omp.final.then:
1582 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1583 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1584 // CHECK1: .omp.final.done:
1585 // CHECK1-NEXT: ret void
1586 //
1587 //
1588 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1589 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1590 // CHECK1-NEXT: entry:
1591 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1592 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1593 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1594 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1595 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1596 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1597 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1598 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1599 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1600 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1601 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1602 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1603 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1604 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1605 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1606 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1607 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1608 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1609 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1610 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1611 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1612 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1613 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1614 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1615 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1616 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1617 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1618 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1619 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1620 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1621 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1622 // CHECK1: cond.true:
1623 // CHECK1-NEXT: br label [[COND_END:%.*]]
1624 // CHECK1: cond.false:
1625 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1626 // CHECK1-NEXT: br label [[COND_END]]
1627 // CHECK1: cond.end:
1628 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1629 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1630 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1631 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1632 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1633 // CHECK1: omp.inner.for.cond:
1634 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
1635 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
1636 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1637 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1638 // CHECK1: omp.inner.for.body:
1639 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1640 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1641 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1642 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
1643 // CHECK1-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
1644 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1645 // CHECK1: omp.body.continue:
1646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1647 // CHECK1: omp.inner.for.inc:
1648 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1649 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1650 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1651 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
1652 // CHECK1: omp.inner.for.end:
1653 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1654 // CHECK1: omp.loop.exit:
1655 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1656 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1657 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1658 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1659 // CHECK1: .omp.final.then:
1660 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1661 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1662 // CHECK1: .omp.final.done:
1663 // CHECK1-NEXT: ret void
1664 //
1665 //
1666 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1667 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
1668 // CHECK1-NEXT: entry:
1669 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1670 // CHECK1-NEXT: ret void
1671 //
1672 //
1673 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv
1674 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1675 // CHECK3-NEXT: entry:
1676 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1677 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1678 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1679 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1680 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
1681 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1682 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
1683 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1684 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
1685 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1686 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
1687 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1688 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
1689 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1690 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
1691 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1692 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
1693 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1694 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
1695 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1696 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
1697 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1698 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1699 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1700 // CHECK3: omp_offload.failed:
1701 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
1702 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1703 // CHECK3: omp_offload.cont:
1704 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1705 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1706 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
1707 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1708 // CHECK3-NEXT: store i32 0, i32* [[TMP12]], align 4
1709 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1710 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 8
1711 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1712 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 8
1713 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1714 // CHECK3-NEXT: store i64* null, i64** [[TMP15]], align 8
1715 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1716 // CHECK3-NEXT: store i64* null, i64** [[TMP16]], align 8
1717 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1718 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 8
1719 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1720 // CHECK3-NEXT: store i8** null, i8*** [[TMP18]], align 8
1721 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1722 // CHECK3-NEXT: store i64 100, i64* [[TMP19]], align 8
1723 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1724 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1725 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1726 // CHECK3: omp_offload.failed3:
1727 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
1728 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1729 // CHECK3: omp_offload.cont4:
1730 // CHECK3-NEXT: ret void
1731 //
1732 //
1733 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
1734 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] {
1735 // CHECK3-NEXT: entry:
1736 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1737 // CHECK3-NEXT: ret void
1738 //
1739 //
1740 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1741 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1742 // CHECK3-NEXT: entry:
1743 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1744 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1745 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1746 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1747 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1748 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1749 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1750 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1751 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1752 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1753 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1754 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1755 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1756 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1757 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1758 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1759 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1760 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1761 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1762 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1763 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1764 // CHECK3: cond.true:
1765 // CHECK3-NEXT: br label [[COND_END:%.*]]
1766 // CHECK3: cond.false:
1767 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1768 // CHECK3-NEXT: br label [[COND_END]]
1769 // CHECK3: cond.end:
1770 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1771 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1772 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1773 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1774 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1775 // CHECK3: omp.inner.for.cond:
1776 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
1777 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1778 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1779 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1780 // CHECK3: omp.inner.for.body:
1781 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
1782 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1783 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1784 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1785 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
1786 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1787 // CHECK3: omp.inner.for.inc:
1788 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1789 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
1790 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1791 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1792 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1793 // CHECK3: omp.inner.for.end:
1794 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1795 // CHECK3: omp.loop.exit:
1796 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1797 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1798 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1799 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1800 // CHECK3: .omp.final.then:
1801 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1802 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1803 // CHECK3: .omp.final.done:
1804 // CHECK3-NEXT: ret void
1805 //
1806 //
1807 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1808 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1809 // CHECK3-NEXT: entry:
1810 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1811 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1812 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1813 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1814 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1815 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1816 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1817 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1818 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1819 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1820 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1821 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1822 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1823 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1824 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1825 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1826 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1827 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1828 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1829 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1830 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1831 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1832 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1833 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1834 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1835 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1836 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1837 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1838 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1839 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1840 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1841 // CHECK3: cond.true:
1842 // CHECK3-NEXT: br label [[COND_END:%.*]]
1843 // CHECK3: cond.false:
1844 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1845 // CHECK3-NEXT: br label [[COND_END]]
1846 // CHECK3: cond.end:
1847 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1848 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1849 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1850 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1851 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1852 // CHECK3: omp.inner.for.cond:
1853 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
1854 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1855 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1856 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1857 // CHECK3: omp.inner.for.body:
1858 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1859 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1860 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1861 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
1862 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1863 // CHECK3: omp.body.continue:
1864 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1865 // CHECK3: omp.inner.for.inc:
1866 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1867 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1868 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1869 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1870 // CHECK3: omp.inner.for.end:
1871 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1872 // CHECK3: omp.loop.exit:
1873 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1874 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1875 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1876 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1877 // CHECK3: .omp.final.then:
1878 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1879 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1880 // CHECK3: .omp.final.done:
1881 // CHECK3-NEXT: ret void
1882 //
1883 //
1884 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
1885 // CHECK3-SAME: () #[[ATTR1]] {
1886 // CHECK3-NEXT: entry:
1887 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1888 // CHECK3-NEXT: ret void
1889 //
1890 //
1891 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1892 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1893 // CHECK3-NEXT: entry:
1894 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1895 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1896 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1897 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1898 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1899 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1900 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1901 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1902 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1903 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1904 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1905 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1906 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1907 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1908 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1909 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1910 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1911 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1912 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1913 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1914 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1915 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1916 // CHECK3: cond.true:
1917 // CHECK3-NEXT: br label [[COND_END:%.*]]
1918 // CHECK3: cond.false:
1919 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1920 // CHECK3-NEXT: br label [[COND_END]]
1921 // CHECK3: cond.end:
1922 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1923 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1924 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1925 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1926 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1927 // CHECK3: omp.inner.for.cond:
1928 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
1929 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
1930 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1931 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1932 // CHECK3: omp.inner.for.body:
1933 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
1934 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1935 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
1936 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1937 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
1938 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
1939 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
1940 // CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
1941 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
1942 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1943 // CHECK3: omp.inner.for.inc:
1944 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
1945 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
1946 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1947 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
1948 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
1949 // CHECK3: omp.inner.for.end:
1950 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1951 // CHECK3: omp.loop.exit:
1952 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1953 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1954 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1955 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1956 // CHECK3: .omp.final.then:
1957 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1958 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1959 // CHECK3: .omp.final.done:
1960 // CHECK3-NEXT: ret void
1961 //
1962 //
1963 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1964 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1965 // CHECK3-NEXT: entry:
1966 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1967 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1968 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1969 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1970 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1971 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1972 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1973 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1974 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1975 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1976 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1977 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1978 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1979 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1980 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1981 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1982 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1983 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1984 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1985 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1986 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1987 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1988 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1989 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1990 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1991 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1992 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1993 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1994 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1995 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1996 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1997 // CHECK3: cond.true:
1998 // CHECK3-NEXT: br label [[COND_END:%.*]]
1999 // CHECK3: cond.false:
2000 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2001 // CHECK3-NEXT: br label [[COND_END]]
2002 // CHECK3: cond.end:
2003 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2004 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2005 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2006 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2007 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2008 // CHECK3: omp.inner.for.cond:
2009 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
2010 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
2011 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2012 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2013 // CHECK3: omp.inner.for.body:
2014 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2015 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2016 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2017 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
2018 // CHECK3-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
2019 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2020 // CHECK3: omp.body.continue:
2021 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2022 // CHECK3: omp.inner.for.inc:
2023 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2024 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2025 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2026 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
2027 // CHECK3: omp.inner.for.end:
2028 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2029 // CHECK3: omp.loop.exit:
2030 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2031 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2032 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2033 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2034 // CHECK3: .omp.final.then:
2035 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2036 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2037 // CHECK3: .omp.final.done:
2038 // CHECK3-NEXT: ret void
2039 //
2040 //
2041 // CHECK3-LABEL: define {{[^@]+}}@main
2042 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2043 // CHECK3-NEXT: entry:
2044 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2045 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2046 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2047 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
2048 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2049 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2050 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2051 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
2052 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
2053 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2054 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2055 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
2056 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2057 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
2058 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2059 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
2060 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2061 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
2062 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2063 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
2064 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2065 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
2066 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2067 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
2068 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2069 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
2070 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2071 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
2072 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2073 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2074 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2075 // CHECK3: omp_offload.failed:
2076 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
2077 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
2078 // CHECK3: omp_offload.cont:
2079 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2080 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
2081 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
2082 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
2083 // CHECK3-NEXT: store i32 0, i32* [[TMP12]], align 4
2084 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
2085 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 8
2086 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
2087 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 8
2088 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
2089 // CHECK3-NEXT: store i64* null, i64** [[TMP15]], align 8
2090 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
2091 // CHECK3-NEXT: store i64* null, i64** [[TMP16]], align 8
2092 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
2093 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 8
2094 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
2095 // CHECK3-NEXT: store i8** null, i8*** [[TMP18]], align 8
2096 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
2097 // CHECK3-NEXT: store i64 100, i64* [[TMP19]], align 8
2098 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
2099 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2100 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2101 // CHECK3: omp_offload.failed3:
2102 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
2103 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]
2104 // CHECK3: omp_offload.cont4:
2105 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
2106 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
2107 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
2108 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
2109 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2110 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
2111 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
2112 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2113 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
2114 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
2115 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2116 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 8
2117 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2118 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2119 // CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2120 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
2121 // CHECK3-NEXT: store i32 1, i32* [[TMP31]], align 4
2122 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
2123 // CHECK3-NEXT: store i32 1, i32* [[TMP32]], align 4
2124 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
2125 // CHECK3-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
2126 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
2127 // CHECK3-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
2128 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
2129 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP35]], align 8
2130 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
2131 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP36]], align 8
2132 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
2133 // CHECK3-NEXT: store i8** null, i8*** [[TMP37]], align 8
2134 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
2135 // CHECK3-NEXT: store i8** null, i8*** [[TMP38]], align 8
2136 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
2137 // CHECK3-NEXT: store i64 100, i64* [[TMP39]], align 8
2138 // CHECK3-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
2139 // CHECK3-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
2140 // CHECK3-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2141 // CHECK3: omp_offload.failed7:
2142 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP23]]) #[[ATTR2]]
2143 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]
2144 // CHECK3: omp_offload.cont8:
2145 // CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* @Arg, align 4
2146 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]])
2147 // CHECK3-NEXT: ret i32 [[CALL]]
2148 //
2149 //
2150 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
2151 // CHECK3-SAME: () #[[ATTR1]] {
2152 // CHECK3-NEXT: entry:
2153 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2154 // CHECK3-NEXT: ret void
2155 //
2156 //
2157 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
2158 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2159 // CHECK3-NEXT: entry:
2160 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2161 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2162 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2163 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2164 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2165 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2166 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2167 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2168 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2169 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2170 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2171 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2172 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2173 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2174 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2175 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2176 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2177 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2178 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2179 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2180 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2181 // CHECK3: cond.true:
2182 // CHECK3-NEXT: br label [[COND_END:%.*]]
2183 // CHECK3: cond.false:
2184 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2185 // CHECK3-NEXT: br label [[COND_END]]
2186 // CHECK3: cond.end:
2187 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2188 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2189 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2190 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2191 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2192 // CHECK3: omp.inner.for.cond:
2193 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
2194 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2195 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2196 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2197 // CHECK3: omp.inner.for.body:
2198 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
2199 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2200 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2201 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2202 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
2203 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2204 // CHECK3: omp.inner.for.inc:
2205 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2206 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
2207 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2208 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2209 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
2210 // CHECK3: omp.inner.for.end:
2211 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2212 // CHECK3: omp.loop.exit:
2213 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2214 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2215 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2216 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2217 // CHECK3: .omp.final.then:
2218 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2219 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2220 // CHECK3: .omp.final.done:
2221 // CHECK3-NEXT: ret void
2222 //
2223 //
2224 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5
2225 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2226 // CHECK3-NEXT: entry:
2227 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2228 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2229 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2230 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2231 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2232 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2233 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2234 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2235 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2236 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2237 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2238 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2239 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2240 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2241 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2242 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2243 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2244 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2245 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2246 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2247 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2248 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2249 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2250 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2251 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2252 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2253 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2254 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2255 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2256 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2257 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2258 // CHECK3: cond.true:
2259 // CHECK3-NEXT: br label [[COND_END:%.*]]
2260 // CHECK3: cond.false:
2261 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2262 // CHECK3-NEXT: br label [[COND_END]]
2263 // CHECK3: cond.end:
2264 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2265 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2266 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2267 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2268 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2269 // CHECK3: omp.inner.for.cond:
2270 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
2271 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
2272 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2273 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2274 // CHECK3: omp.inner.for.body:
2275 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2276 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2277 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2278 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
2279 // CHECK3-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
2280 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2281 // CHECK3: omp.body.continue:
2282 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2283 // CHECK3: omp.inner.for.inc:
2284 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2285 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2286 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2287 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
2288 // CHECK3: omp.inner.for.end:
2289 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2290 // CHECK3: omp.loop.exit:
2291 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2292 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2293 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2294 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2295 // CHECK3: .omp.final.then:
2296 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2297 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2298 // CHECK3: .omp.final.done:
2299 // CHECK3-NEXT: ret void
2300 //
2301 //
2302 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
2303 // CHECK3-SAME: () #[[ATTR1]] {
2304 // CHECK3-NEXT: entry:
2305 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
2306 // CHECK3-NEXT: ret void
2307 //
2308 //
2309 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
2310 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2311 // CHECK3-NEXT: entry:
2312 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2313 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2314 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2315 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2316 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2317 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2318 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2319 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2320 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2321 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2322 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2323 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2324 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2325 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2326 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2327 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2328 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2329 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2330 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2331 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2332 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2333 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2334 // CHECK3: cond.true:
2335 // CHECK3-NEXT: br label [[COND_END:%.*]]
2336 // CHECK3: cond.false:
2337 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2338 // CHECK3-NEXT: br label [[COND_END]]
2339 // CHECK3: cond.end:
2340 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2341 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2342 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2343 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2344 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2345 // CHECK3: omp.inner.for.cond:
2346 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2347 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2348 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2349 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2350 // CHECK3: omp.inner.for.body:
2351 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2352 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2353 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2354 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2355 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2356 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2357 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2358 // CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2359 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2360 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2361 // CHECK3: omp.inner.for.inc:
2362 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2363 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2364 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2365 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2366 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
2367 // CHECK3: omp.inner.for.end:
2368 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2369 // CHECK3: omp.loop.exit:
2370 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2371 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2372 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2373 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2374 // CHECK3: .omp.final.then:
2375 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2376 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2377 // CHECK3: .omp.final.done:
2378 // CHECK3-NEXT: ret void
2379 //
2380 //
2381 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
2382 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2383 // CHECK3-NEXT: entry:
2384 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2385 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2386 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2387 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2388 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2389 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2390 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2391 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2392 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2393 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2394 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2395 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2396 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2397 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2398 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2399 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2400 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2401 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2402 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2403 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2404 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2405 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2406 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2407 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2408 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2409 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2410 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2411 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2412 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2413 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2414 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2415 // CHECK3: cond.true:
2416 // CHECK3-NEXT: br label [[COND_END:%.*]]
2417 // CHECK3: cond.false:
2418 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2419 // CHECK3-NEXT: br label [[COND_END]]
2420 // CHECK3: cond.end:
2421 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2422 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2423 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2424 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2425 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2426 // CHECK3: omp.inner.for.cond:
2427 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2428 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2429 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2430 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2431 // CHECK3: omp.inner.for.body:
2432 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2433 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2434 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2435 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2436 // CHECK3-NEXT: call void @_Z3fn5v()
2437 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2438 // CHECK3: omp.body.continue:
2439 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2440 // CHECK3: omp.inner.for.inc:
2441 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2442 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2443 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2444 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2445 // CHECK3: omp.inner.for.end:
2446 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2447 // CHECK3: omp.loop.exit:
2448 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2449 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2450 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2451 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2452 // CHECK3: .omp.final.then:
2453 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2454 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2455 // CHECK3: .omp.final.done:
2456 // CHECK3-NEXT: ret void
2457 //
2458 //
2459 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
2460 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
2461 // CHECK3-NEXT: entry:
2462 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
2463 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
2464 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
2465 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]])
2466 // CHECK3-NEXT: ret void
2467 //
2468 //
2469 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8
2470 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
2471 // CHECK3-NEXT: entry:
2472 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2473 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2474 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
2475 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2476 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2477 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2478 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2479 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2480 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2481 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2482 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2483 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2484 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2485 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED12:%.*]] = alloca i64, align 8
2486 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR18:%.*]] = alloca i32, align 4
2487 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2488 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2489 // CHECK3-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
2490 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
2491 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2492 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
2493 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2494 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2495 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2496 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2497 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2498 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2499 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2500 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2501 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2502 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2503 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2504 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2505 // CHECK3: cond.true:
2506 // CHECK3-NEXT: br label [[COND_END:%.*]]
2507 // CHECK3: cond.false:
2508 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2509 // CHECK3-NEXT: br label [[COND_END]]
2510 // CHECK3: cond.end:
2511 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2512 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2513 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2514 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2515 // CHECK3-NEXT: [[TMP7:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2516 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP7]] to i1
2517 // CHECK3-NEXT: br i1 [[TOBOOL1]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE7:%.*]]
2518 // CHECK3: omp_if.then:
2519 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2520 // CHECK3: omp.inner.for.cond:
2521 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
2522 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2523 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2524 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2525 // CHECK3: omp.inner.for.body:
2526 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
2527 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2528 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2529 // CHECK3-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
2530 // CHECK3-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
2531 // CHECK3-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP14]] to i1
2532 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2533 // CHECK3-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TOBOOL3]] to i8
2534 // CHECK3-NEXT: store i8 [[FROMBOOL4]], i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP35]]
2535 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
2536 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
2537 // CHECK3-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP16]] to i1
2538 // CHECK3-NEXT: br i1 [[TOBOOL5]], label [[OMP_IF_THEN6:%.*]], label [[OMP_IF_ELSE:%.*]]
2539 // CHECK3: omp_if.then6:
2540 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP35]]
2541 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2542 // CHECK3: omp_if.else:
2543 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
2544 // CHECK3-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
2545 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
2546 // CHECK3-NEXT: call void @.omp_outlined..9(i32* [[TMP17]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
2547 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
2548 // CHECK3-NEXT: br label [[OMP_IF_END]]
2549 // CHECK3: omp_if.end:
2550 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2551 // CHECK3: omp.inner.for.inc:
2552 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2553 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
2554 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2555 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2556 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
2557 // CHECK3: omp.inner.for.end:
2558 // CHECK3-NEXT: br label [[OMP_IF_END23:%.*]]
2559 // CHECK3: omp_if.else7:
2560 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
2561 // CHECK3: omp.inner.for.cond8:
2562 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2563 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2564 // CHECK3-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
2565 // CHECK3-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END22:%.*]]
2566 // CHECK3: omp.inner.for.body10:
2567 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2568 // CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
2569 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2570 // CHECK3-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
2571 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2572 // CHECK3-NEXT: [[TOBOOL11:%.*]] = trunc i8 [[TMP26]] to i1
2573 // CHECK3-NEXT: [[CONV13:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED12]] to i8*
2574 // CHECK3-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[TOBOOL11]] to i8
2575 // CHECK3-NEXT: store i8 [[FROMBOOL14]], i8* [[CONV13]], align 1
2576 // CHECK3-NEXT: [[TMP27:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED12]], align 8
2577 // CHECK3-NEXT: [[TMP28:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2578 // CHECK3-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP28]] to i1
2579 // CHECK3-NEXT: br i1 [[TOBOOL15]], label [[OMP_IF_THEN16:%.*]], label [[OMP_IF_ELSE17:%.*]]
2580 // CHECK3: omp_if.then16:
2581 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])
2582 // CHECK3-NEXT: br label [[OMP_IF_END19:%.*]]
2583 // CHECK3: omp_if.else17:
2584 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]])
2585 // CHECK3-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2586 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR18]], align 4
2587 // CHECK3-NEXT: call void @.omp_outlined..10(i32* [[TMP29]], i32* [[DOTBOUND_ZERO_ADDR18]], i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR2]]
2588 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]])
2589 // CHECK3-NEXT: br label [[OMP_IF_END19]]
2590 // CHECK3: omp_if.end19:
2591 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]
2592 // CHECK3: omp.inner.for.inc20:
2593 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2594 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2595 // CHECK3-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
2596 // CHECK3-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
2597 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP38:![0-9]+]]
2598 // CHECK3: omp.inner.for.end22:
2599 // CHECK3-NEXT: br label [[OMP_IF_END23]]
2600 // CHECK3: omp_if.end23:
2601 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2602 // CHECK3: omp.loop.exit:
2603 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2604 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2605 // CHECK3-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
2606 // CHECK3-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2607 // CHECK3: .omp.final.then:
2608 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2609 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2610 // CHECK3: .omp.final.done:
2611 // CHECK3-NEXT: ret void
2612 //
2613 //
2614 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9
2615 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2616 // CHECK3-NEXT: entry:
2617 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2618 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2619 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2620 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2621 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2622 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2623 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2624 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2625 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2626 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2627 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2628 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2629 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2630 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2631 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2632 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2633 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2634 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2635 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2636 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2637 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2638 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
2639 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2640 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2641 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
2642 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2643 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2644 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2645 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
2646 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2647 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2648 // CHECK3: omp_if.then:
2649 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2650 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2651 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2652 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2653 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2654 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2655 // CHECK3: cond.true:
2656 // CHECK3-NEXT: br label [[COND_END:%.*]]
2657 // CHECK3: cond.false:
2658 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2659 // CHECK3-NEXT: br label [[COND_END]]
2660 // CHECK3: cond.end:
2661 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2662 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2663 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2664 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2665 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2666 // CHECK3: omp.inner.for.cond:
2667 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
2668 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
2669 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2670 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2671 // CHECK3: omp.inner.for.body:
2672 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2673 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2674 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2675 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
2676 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
2677 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2678 // CHECK3: omp.body.continue:
2679 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2680 // CHECK3: omp.inner.for.inc:
2681 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2682 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
2683 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2684 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2685 // CHECK3: omp.inner.for.end:
2686 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2687 // CHECK3: omp_if.else:
2688 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2689 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2690 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2691 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2692 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
2693 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
2694 // CHECK3: cond.true6:
2695 // CHECK3-NEXT: br label [[COND_END8:%.*]]
2696 // CHECK3: cond.false7:
2697 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2698 // CHECK3-NEXT: br label [[COND_END8]]
2699 // CHECK3: cond.end8:
2700 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
2701 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
2702 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2703 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
2704 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
2705 // CHECK3: omp.inner.for.cond10:
2706 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2707 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2708 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2709 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
2710 // CHECK3: omp.inner.for.body12:
2711 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2712 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
2713 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2714 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
2715 // CHECK3-NEXT: call void @_Z3fn6v()
2716 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
2717 // CHECK3: omp.body.continue15:
2718 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
2719 // CHECK3: omp.inner.for.inc16:
2720 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2721 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
2722 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
2723 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
2724 // CHECK3: omp.inner.for.end18:
2725 // CHECK3-NEXT: br label [[OMP_IF_END]]
2726 // CHECK3: omp_if.end:
2727 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2728 // CHECK3: omp.loop.exit:
2729 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2730 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2731 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2732 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2733 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2734 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2735 // CHECK3: .omp.final.then:
2736 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2737 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2738 // CHECK3: .omp.final.done:
2739 // CHECK3-NEXT: ret void
2740 //
2741 //
2742 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2743 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2744 // CHECK3-NEXT: entry:
2745 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2746 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2747 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2748 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2749 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2750 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2751 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2752 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2753 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2754 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2755 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2756 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2757 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2758 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2759 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2760 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2761 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2762 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2763 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2764 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2765 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2766 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
2767 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2768 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2769 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
2770 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2771 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2772 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2773 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
2774 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2775 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2776 // CHECK3: omp_if.then:
2777 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2778 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2779 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2780 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2781 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2782 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2783 // CHECK3: cond.true:
2784 // CHECK3-NEXT: br label [[COND_END:%.*]]
2785 // CHECK3: cond.false:
2786 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2787 // CHECK3-NEXT: br label [[COND_END]]
2788 // CHECK3: cond.end:
2789 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2790 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2791 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2792 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2793 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2794 // CHECK3: omp.inner.for.cond:
2795 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
2796 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
2797 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2798 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2799 // CHECK3: omp.inner.for.body:
2800 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2801 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2802 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2803 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
2804 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
2805 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2806 // CHECK3: omp.body.continue:
2807 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2808 // CHECK3: omp.inner.for.inc:
2809 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2810 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
2811 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2812 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
2813 // CHECK3: omp.inner.for.end:
2814 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2815 // CHECK3: omp_if.else:
2816 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2817 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2818 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2819 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2820 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
2821 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
2822 // CHECK3: cond.true6:
2823 // CHECK3-NEXT: br label [[COND_END8:%.*]]
2824 // CHECK3: cond.false7:
2825 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2826 // CHECK3-NEXT: br label [[COND_END8]]
2827 // CHECK3: cond.end8:
2828 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
2829 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
2830 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2831 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
2832 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
2833 // CHECK3: omp.inner.for.cond10:
2834 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2835 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2836 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2837 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
2838 // CHECK3: omp.inner.for.body12:
2839 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2840 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
2841 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2842 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
2843 // CHECK3-NEXT: call void @_Z3fn6v()
2844 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
2845 // CHECK3: omp.body.continue15:
2846 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
2847 // CHECK3: omp.inner.for.inc16:
2848 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2849 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
2850 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
2851 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
2852 // CHECK3: omp.inner.for.end18:
2853 // CHECK3-NEXT: br label [[OMP_IF_END]]
2854 // CHECK3: omp_if.end:
2855 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2856 // CHECK3: omp.loop.exit:
2857 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2858 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2859 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2860 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2861 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2862 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2863 // CHECK3: .omp.final.then:
2864 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2865 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2866 // CHECK3: .omp.final.done:
2867 // CHECK3-NEXT: ret void
2868 //
2869 //
2870 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2871 // CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
2872 // CHECK3-NEXT: entry:
2873 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
2874 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2875 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2876 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
2877 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2878 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2879 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2880 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
2881 // CHECK3-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
2882 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2883 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2884 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
2885 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2886 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
2887 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2888 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
2889 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2890 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
2891 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2892 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
2893 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2894 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
2895 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2896 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
2897 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2898 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
2899 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2900 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
2901 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2902 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2903 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2904 // CHECK3: omp_offload.failed:
2905 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
2906 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
2907 // CHECK3: omp_offload.cont:
2908 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2909 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
2910 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
2911 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
2912 // CHECK3-NEXT: store i32 0, i32* [[TMP12]], align 4
2913 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
2914 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 8
2915 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
2916 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 8
2917 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
2918 // CHECK3-NEXT: store i64* null, i64** [[TMP15]], align 8
2919 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
2920 // CHECK3-NEXT: store i64* null, i64** [[TMP16]], align 8
2921 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
2922 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 8
2923 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
2924 // CHECK3-NEXT: store i8** null, i8*** [[TMP18]], align 8
2925 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
2926 // CHECK3-NEXT: store i64 100, i64* [[TMP19]], align 8
2927 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
2928 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2929 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2930 // CHECK3: omp_offload.failed3:
2931 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
2932 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]
2933 // CHECK3: omp_offload.cont4:
2934 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2935 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
2936 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
2937 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
2938 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2939 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
2940 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
2941 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2942 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
2943 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
2944 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2945 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 8
2946 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2947 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2948 // CHECK3-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2949 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
2950 // CHECK3-NEXT: store i32 1, i32* [[TMP31]], align 4
2951 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
2952 // CHECK3-NEXT: store i32 1, i32* [[TMP32]], align 4
2953 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
2954 // CHECK3-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
2955 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
2956 // CHECK3-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
2957 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
2958 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.17, i32 0, i32 0), i64** [[TMP35]], align 8
2959 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
2960 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.18, i32 0, i32 0), i64** [[TMP36]], align 8
2961 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
2962 // CHECK3-NEXT: store i8** null, i8*** [[TMP37]], align 8
2963 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
2964 // CHECK3-NEXT: store i8** null, i8*** [[TMP38]], align 8
2965 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
2966 // CHECK3-NEXT: store i64 100, i64* [[TMP39]], align 8
2967 // CHECK3-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
2968 // CHECK3-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
2969 // CHECK3-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2970 // CHECK3: omp_offload.failed7:
2971 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP23]]) #[[ATTR2]]
2972 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]]
2973 // CHECK3: omp_offload.cont8:
2974 // CHECK3-NEXT: ret i32 0
2975 //
2976 //
2977 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
2978 // CHECK3-SAME: () #[[ATTR1]] {
2979 // CHECK3-NEXT: entry:
2980 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*))
2981 // CHECK3-NEXT: ret void
2982 //
2983 //
2984 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
2985 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2986 // CHECK3-NEXT: entry:
2987 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2988 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2989 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2990 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2991 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2992 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2993 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2994 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2995 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2996 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2997 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2998 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2999 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3000 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3001 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3002 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3003 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3004 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3005 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3006 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3007 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3008 // CHECK3: cond.true:
3009 // CHECK3-NEXT: br label [[COND_END:%.*]]
3010 // CHECK3: cond.false:
3011 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3012 // CHECK3-NEXT: br label [[COND_END]]
3013 // CHECK3: cond.end:
3014 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3015 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3016 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3017 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3018 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3019 // CHECK3: omp.inner.for.cond:
3020 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
3021 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3022 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3023 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3024 // CHECK3: omp.inner.for.body:
3025 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
3026 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3027 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3028 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3029 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
3030 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3031 // CHECK3: omp.inner.for.inc:
3032 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3033 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
3034 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3035 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3036 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
3037 // CHECK3: omp.inner.for.end:
3038 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3039 // CHECK3: omp.loop.exit:
3040 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3041 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3042 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3043 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3044 // CHECK3: .omp.final.then:
3045 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3046 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3047 // CHECK3: .omp.final.done:
3048 // CHECK3-NEXT: ret void
3049 //
3050 //
3051 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..12
3052 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3053 // CHECK3-NEXT: entry:
3054 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3055 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3056 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3057 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3058 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3059 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3060 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3061 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3062 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3063 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3064 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3065 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3066 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3067 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3068 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3069 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3070 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3071 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3072 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3073 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3074 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3075 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3076 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3077 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3078 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3079 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3080 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3081 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3082 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3083 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3084 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3085 // CHECK3: cond.true:
3086 // CHECK3-NEXT: br label [[COND_END:%.*]]
3087 // CHECK3: cond.false:
3088 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3089 // CHECK3-NEXT: br label [[COND_END]]
3090 // CHECK3: cond.end:
3091 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3092 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3093 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3094 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3095 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3096 // CHECK3: omp.inner.for.cond:
3097 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
3098 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
3099 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3100 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3101 // CHECK3: omp.inner.for.body:
3102 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3103 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3104 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3105 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
3106 // CHECK3-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
3107 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3108 // CHECK3: omp.body.continue:
3109 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3110 // CHECK3: omp.inner.for.inc:
3111 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3112 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3113 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3114 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
3115 // CHECK3: omp.inner.for.end:
3116 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3117 // CHECK3: omp.loop.exit:
3118 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3119 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3120 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3121 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3122 // CHECK3: .omp.final.then:
3123 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3124 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3125 // CHECK3: .omp.final.done:
3126 // CHECK3-NEXT: ret void
3127 //
3128 //
3129 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
3130 // CHECK3-SAME: () #[[ATTR1]] {
3131 // CHECK3-NEXT: entry:
3132 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
3133 // CHECK3-NEXT: ret void
3134 //
3135 //
3136 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13
3137 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3138 // CHECK3-NEXT: entry:
3139 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3140 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3141 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3142 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3143 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3144 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3145 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3146 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3147 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3148 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3149 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3150 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3151 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3152 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3153 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3154 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3155 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3156 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3157 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3158 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3159 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3160 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3161 // CHECK3: cond.true:
3162 // CHECK3-NEXT: br label [[COND_END:%.*]]
3163 // CHECK3: cond.false:
3164 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3165 // CHECK3-NEXT: br label [[COND_END]]
3166 // CHECK3: cond.end:
3167 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3168 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3169 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3170 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3171 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3172 // CHECK3: omp.inner.for.cond:
3173 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3174 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3175 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3176 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3177 // CHECK3: omp.inner.for.body:
3178 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3179 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3180 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3181 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3182 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3183 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3184 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3185 // CHECK3-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3186 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3187 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3188 // CHECK3: omp.inner.for.inc:
3189 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3190 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3191 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3192 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3193 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
3194 // CHECK3: omp.inner.for.end:
3195 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3196 // CHECK3: omp.loop.exit:
3197 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3198 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3199 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3200 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3201 // CHECK3: .omp.final.then:
3202 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3203 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3204 // CHECK3: .omp.final.done:
3205 // CHECK3-NEXT: ret void
3206 //
3207 //
3208 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
3209 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3210 // CHECK3-NEXT: entry:
3211 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3212 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3213 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3214 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3215 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3216 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3217 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3218 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3219 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3220 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3221 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3222 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3223 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3224 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3225 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3226 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3227 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3228 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3229 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3230 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3231 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3232 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3233 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3234 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3235 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3236 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3237 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3238 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3239 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3240 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3241 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3242 // CHECK3: cond.true:
3243 // CHECK3-NEXT: br label [[COND_END:%.*]]
3244 // CHECK3: cond.false:
3245 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3246 // CHECK3-NEXT: br label [[COND_END]]
3247 // CHECK3: cond.end:
3248 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3249 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3250 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3251 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3252 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3253 // CHECK3: omp.inner.for.cond:
3254 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3255 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3256 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3257 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3258 // CHECK3: omp.inner.for.body:
3259 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3260 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3261 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3262 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3263 // CHECK3-NEXT: call void @_Z3fn2v()
3264 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3265 // CHECK3: omp.body.continue:
3266 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3267 // CHECK3: omp.inner.for.inc:
3268 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3269 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3270 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3271 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
3272 // CHECK3: omp.inner.for.end:
3273 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3274 // CHECK3: omp.loop.exit:
3275 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3276 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3277 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3278 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3279 // CHECK3: .omp.final.then:
3280 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3281 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3282 // CHECK3: .omp.final.done:
3283 // CHECK3-NEXT: ret void
3284 //
3285 //
3286 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
3287 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
3288 // CHECK3-NEXT: entry:
3289 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
3290 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3291 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3292 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32* [[CONV]])
3293 // CHECK3-NEXT: ret void
3294 //
3295 //
3296 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
3297 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
3298 // CHECK3-NEXT: entry:
3299 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3300 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3301 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
3302 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3303 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3304 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3305 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3306 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3307 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3308 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3309 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3310 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3311 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3312 // CHECK3-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
3313 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
3314 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3315 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3316 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3317 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3318 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3319 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3320 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3321 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3322 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
3323 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3324 // CHECK3: cond.true:
3325 // CHECK3-NEXT: br label [[COND_END:%.*]]
3326 // CHECK3: cond.false:
3327 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3328 // CHECK3-NEXT: br label [[COND_END]]
3329 // CHECK3: cond.end:
3330 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3331 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3332 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3333 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3334 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3335 // CHECK3: omp.inner.for.cond:
3336 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
3337 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3338 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3339 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3340 // CHECK3: omp.inner.for.body:
3341 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
3342 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3343 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3344 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3345 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4, !llvm.access.group [[ACC_GRP55]]
3346 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
3347 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3348 // CHECK3: omp_if.then:
3349 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP55]]
3350 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
3351 // CHECK3: omp_if.else:
3352 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
3353 // CHECK3-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
3354 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
3355 // CHECK3-NEXT: call void @.omp_outlined..16(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
3356 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
3357 // CHECK3-NEXT: br label [[OMP_IF_END]]
3358 // CHECK3: omp_if.end:
3359 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3360 // CHECK3: omp.inner.for.inc:
3361 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3362 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
3363 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3364 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3365 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
3366 // CHECK3: omp.inner.for.end:
3367 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3368 // CHECK3: omp.loop.exit:
3369 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3370 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3371 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3372 // CHECK3-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3373 // CHECK3: .omp.final.then:
3374 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3375 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3376 // CHECK3: .omp.final.done:
3377 // CHECK3-NEXT: ret void
3378 //
3379 //
3380 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..16
3381 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3382 // CHECK3-NEXT: entry:
3383 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3384 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3385 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3386 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3387 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3388 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3389 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3390 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3391 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3392 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3393 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3394 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3395 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3396 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3397 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3398 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3399 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3400 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3401 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3402 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3403 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3404 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3405 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3406 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3407 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3408 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3409 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3410 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3411 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3412 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3413 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3414 // CHECK3: cond.true:
3415 // CHECK3-NEXT: br label [[COND_END:%.*]]
3416 // CHECK3: cond.false:
3417 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3418 // CHECK3-NEXT: br label [[COND_END]]
3419 // CHECK3: cond.end:
3420 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3421 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3422 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3423 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3424 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3425 // CHECK3: omp.inner.for.cond:
3426 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
3427 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
3428 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3429 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3430 // CHECK3: omp.inner.for.body:
3431 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3432 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3433 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3434 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
3435 // CHECK3-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
3436 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3437 // CHECK3: omp.body.continue:
3438 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3439 // CHECK3: omp.inner.for.inc:
3440 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3441 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3442 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3443 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
3444 // CHECK3: omp.inner.for.end:
3445 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3446 // CHECK3: omp.loop.exit:
3447 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3448 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3449 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3450 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3451 // CHECK3: .omp.final.then:
3452 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3453 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3454 // CHECK3: .omp.final.done:
3455 // CHECK3-NEXT: ret void
3456 //
3457 //
3458 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3459 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
3460 // CHECK3-NEXT: entry:
3461 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
3462 // CHECK3-NEXT: ret void
3463 //
3464 //
3465 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
3466 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3467 // CHECK5-NEXT: entry:
3468 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3469 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3470 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3471 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3472 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3473 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3474 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3475 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3476 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3477 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3478 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3479 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3480 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3481 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3482 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3483 // CHECK5: omp.inner.for.cond:
3484 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3485 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3486 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3487 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3488 // CHECK5: omp.inner.for.body:
3489 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3490 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3491 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3492 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3493 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3494 // CHECK5: omp.body.continue:
3495 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3496 // CHECK5: omp.inner.for.inc:
3497 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3498 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3499 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3500 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3501 // CHECK5: omp.inner.for.end:
3502 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3503 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3504 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3505 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3506 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3507 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3508 // CHECK5: omp.inner.for.cond7:
3509 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3510 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3511 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3512 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3513 // CHECK5: omp.inner.for.body9:
3514 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3515 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3516 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3517 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3518 // CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3519 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3520 // CHECK5: omp.body.continue12:
3521 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3522 // CHECK5: omp.inner.for.inc13:
3523 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3524 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3525 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3526 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3527 // CHECK5: omp.inner.for.end15:
3528 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3529 // CHECK5-NEXT: ret void
3530 //
3531 //
3532 // CHECK5-LABEL: define {{[^@]+}}@main
3533 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
3534 // CHECK5-NEXT: entry:
3535 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3536 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3537 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3538 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3539 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3540 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3541 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3542 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3543 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3544 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3545 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3546 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3547 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3548 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3549 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3550 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
3551 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
3552 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3553 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3554 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3555 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3556 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3557 // CHECK5: omp.inner.for.cond:
3558 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3559 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3560 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3561 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3562 // CHECK5: omp.inner.for.body:
3563 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3564 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3565 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3566 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3567 // CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3568 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3569 // CHECK5: omp.body.continue:
3570 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3571 // CHECK5: omp.inner.for.inc:
3572 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3573 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3574 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3575 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3576 // CHECK5: omp.inner.for.end:
3577 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3578 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3579 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3580 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3581 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3582 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3583 // CHECK5: omp.inner.for.cond7:
3584 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
3585 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
3586 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3587 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3588 // CHECK5: omp.inner.for.body9:
3589 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3590 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3591 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3592 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
3593 // CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
3594 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3595 // CHECK5: omp.body.continue12:
3596 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3597 // CHECK5: omp.inner.for.inc13:
3598 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3599 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3600 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3601 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
3602 // CHECK5: omp.inner.for.end15:
3603 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3604 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3605 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3606 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3607 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
3608 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
3609 // CHECK5: omp.inner.for.cond21:
3610 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3611 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
3612 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3613 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3614 // CHECK5: omp.inner.for.body23:
3615 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3616 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
3617 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3618 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
3619 // CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
3620 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
3621 // CHECK5: omp.body.continue26:
3622 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
3623 // CHECK5: omp.inner.for.inc27:
3624 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3625 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
3626 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3627 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
3628 // CHECK5: omp.inner.for.end29:
3629 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
3630 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4
3631 // CHECK5-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP15]])
3632 // CHECK5-NEXT: ret i32 [[CALL]]
3633 //
3634 //
3635 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3636 // CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
3637 // CHECK5-NEXT: entry:
3638 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
3639 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3640 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3641 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3642 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3643 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3644 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3645 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3646 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3647 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3648 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3649 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3650 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3651 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3652 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3653 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
3654 // CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
3655 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3656 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3657 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3658 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3659 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3660 // CHECK5: omp.inner.for.cond:
3661 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3662 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3663 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3664 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3665 // CHECK5: omp.inner.for.body:
3666 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3667 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3668 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3669 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
3670 // CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
3671 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3672 // CHECK5: omp.body.continue:
3673 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3674 // CHECK5: omp.inner.for.inc:
3675 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3676 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3677 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3678 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3679 // CHECK5: omp.inner.for.end:
3680 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3681 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3682 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3683 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3684 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3685 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3686 // CHECK5: omp.inner.for.cond7:
3687 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
3688 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
3689 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3690 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3691 // CHECK5: omp.inner.for.body9:
3692 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3693 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3694 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3695 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
3696 // CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
3697 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3698 // CHECK5: omp.body.continue12:
3699 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3700 // CHECK5: omp.inner.for.inc13:
3701 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3702 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3703 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3704 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
3705 // CHECK5: omp.inner.for.end15:
3706 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3707 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3708 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3709 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3710 // CHECK5-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
3711 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
3712 // CHECK5: omp.inner.for.cond21:
3713 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
3714 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
3715 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3716 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3717 // CHECK5: omp.inner.for.body23:
3718 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3719 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
3720 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3721 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
3722 // CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
3723 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
3724 // CHECK5: omp.body.continue26:
3725 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
3726 // CHECK5: omp.inner.for.inc27:
3727 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3728 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
3729 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3730 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
3731 // CHECK5: omp.inner.for.end29:
3732 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
3733 // CHECK5-NEXT: ret i32 0
3734 //
3735 //
3736 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
3737 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3738 // CHECK7-NEXT: entry:
3739 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3740 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3741 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3742 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3743 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3744 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3745 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3746 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3747 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3748 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3749 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3750 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3751 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3752 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3753 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3754 // CHECK7: omp.inner.for.cond:
3755 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3756 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3757 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3758 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3759 // CHECK7: omp.inner.for.body:
3760 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3761 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3762 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3763 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3764 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3765 // CHECK7: omp.body.continue:
3766 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3767 // CHECK7: omp.inner.for.inc:
3768 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3769 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3770 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3771 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3772 // CHECK7: omp.inner.for.end:
3773 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
3774 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3775 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3776 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3777 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3778 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3779 // CHECK7: omp.inner.for.cond7:
3780 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3781 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3782 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3783 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3784 // CHECK7: omp.inner.for.body9:
3785 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3786 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3787 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3788 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3789 // CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3790 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3791 // CHECK7: omp.body.continue12:
3792 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3793 // CHECK7: omp.inner.for.inc13:
3794 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3795 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3796 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3797 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3798 // CHECK7: omp.inner.for.end15:
3799 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
3800 // CHECK7-NEXT: ret void
3801 //
3802 //
3803 // CHECK7-LABEL: define {{[^@]+}}@main
3804 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
3805 // CHECK7-NEXT: entry:
3806 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3807 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3808 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3809 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3810 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3811 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3812 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3813 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3814 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3815 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3816 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3817 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3818 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3819 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3820 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3821 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3822 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
3823 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
3824 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3825 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3826 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3827 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3828 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3829 // CHECK7: omp.inner.for.cond:
3830 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3831 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3832 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3833 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3834 // CHECK7: omp.inner.for.body:
3835 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3836 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3837 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3838 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3839 // CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3840 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3841 // CHECK7: omp.body.continue:
3842 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3843 // CHECK7: omp.inner.for.inc:
3844 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3845 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3846 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3847 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3848 // CHECK7: omp.inner.for.end:
3849 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
3850 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3851 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3852 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3853 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3854 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3855 // CHECK7: omp.inner.for.cond7:
3856 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3857 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
3858 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3859 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3860 // CHECK7: omp.inner.for.body9:
3861 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3862 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3863 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3864 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
3865 // CHECK7-NEXT: call void @_Z3fn5v()
3866 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3867 // CHECK7: omp.body.continue12:
3868 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3869 // CHECK7: omp.inner.for.inc13:
3870 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3871 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3872 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
3873 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
3874 // CHECK7: omp.inner.for.end15:
3875 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
3876 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
3877 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3878 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3879 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3880 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3881 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3882 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3883 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
3884 // CHECK7-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3885 // CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
3886 // CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3887 // CHECK7: omp_if.then:
3888 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
3889 // CHECK7: omp.inner.for.cond22:
3890 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
3891 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
3892 // CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3893 // CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
3894 // CHECK7: omp.inner.for.body24:
3895 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3896 // CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
3897 // CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
3898 // CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
3899 // CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
3900 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
3901 // CHECK7: omp.body.continue27:
3902 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
3903 // CHECK7: omp.inner.for.inc28:
3904 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3905 // CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
3906 // CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3907 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
3908 // CHECK7: omp.inner.for.end30:
3909 // CHECK7-NEXT: br label [[OMP_IF_END:%.*]]
3910 // CHECK7: omp_if.else:
3911 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
3912 // CHECK7: omp.inner.for.cond31:
3913 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3914 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
3915 // CHECK7-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
3916 // CHECK7-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
3917 // CHECK7: omp.inner.for.body33:
3918 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3919 // CHECK7-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
3920 // CHECK7-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
3921 // CHECK7-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
3922 // CHECK7-NEXT: call void @_Z3fn6v()
3923 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
3924 // CHECK7: omp.body.continue36:
3925 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
3926 // CHECK7: omp.inner.for.inc37:
3927 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3928 // CHECK7-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
3929 // CHECK7-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
3930 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP17:![0-9]+]]
3931 // CHECK7: omp.inner.for.end39:
3932 // CHECK7-NEXT: br label [[OMP_IF_END]]
3933 // CHECK7: omp_if.end:
3934 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
3935 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
3936 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
3937 // CHECK7-NEXT: ret i32 [[CALL]]
3938 //
3939 //
3940 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3941 // CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
3942 // CHECK7-NEXT: entry:
3943 // CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
3944 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3945 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3946 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3947 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3948 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3949 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3950 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3951 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3952 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3953 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3954 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3955 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3956 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3957 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3958 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
3959 // CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
3960 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3961 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3962 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3963 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3964 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3965 // CHECK7: omp.inner.for.cond:
3966 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3967 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3968 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3969 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3970 // CHECK7: omp.inner.for.body:
3971 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3972 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3973 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3974 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
3975 // CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
3976 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3977 // CHECK7: omp.body.continue:
3978 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3979 // CHECK7: omp.inner.for.inc:
3980 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3981 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3982 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3983 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3984 // CHECK7: omp.inner.for.end:
3985 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
3986 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3987 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3988 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3989 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3990 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3991 // CHECK7: omp.inner.for.cond7:
3992 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3993 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
3994 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3995 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3996 // CHECK7: omp.inner.for.body9:
3997 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3998 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3999 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4000 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
4001 // CHECK7-NEXT: call void @_Z3fn2v()
4002 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
4003 // CHECK7: omp.body.continue12:
4004 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
4005 // CHECK7: omp.inner.for.inc13:
4006 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
4007 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
4008 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
4009 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
4010 // CHECK7: omp.inner.for.end15:
4011 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
4012 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
4013 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
4014 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
4015 // CHECK7-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
4016 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
4017 // CHECK7: omp.inner.for.cond21:
4018 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
4019 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
4020 // CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
4021 // CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
4022 // CHECK7: omp.inner.for.body23:
4023 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4024 // CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
4025 // CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
4026 // CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
4027 // CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
4028 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
4029 // CHECK7: omp.body.continue26:
4030 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
4031 // CHECK7: omp.inner.for.inc27:
4032 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4033 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
4034 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4035 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
4036 // CHECK7: omp.inner.for.end29:
4037 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
4038 // CHECK7-NEXT: ret i32 0
4039 //
4040 //
4041 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
4042 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
4043 // CHECK9-NEXT: entry:
4044 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4045 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4046 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4047 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4048 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
4049 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4050 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
4051 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4052 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
4053 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4054 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
4055 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4056 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
4057 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4058 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
4059 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4060 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
4061 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4062 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
4063 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4064 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
4065 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4066 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4067 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4068 // CHECK9: omp_offload.failed:
4069 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
4070 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
4071 // CHECK9: omp_offload.cont:
4072 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4073 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4074 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
4075 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4076 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
4077 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4078 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
4079 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4080 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
4081 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4082 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
4083 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4084 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
4085 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4086 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
4087 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4088 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
4089 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4090 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
4091 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4092 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4093 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4094 // CHECK9: omp_offload.failed3:
4095 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
4096 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4097 // CHECK9: omp_offload.cont4:
4098 // CHECK9-NEXT: ret void
4099 //
4100 //
4101 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
4102 // CHECK9-SAME: () #[[ATTR1:[0-9]+]] {
4103 // CHECK9-NEXT: entry:
4104 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4105 // CHECK9-NEXT: ret void
4106 //
4107 //
4108 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
4109 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4110 // CHECK9-NEXT: entry:
4111 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4112 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4113 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4114 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4115 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4116 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4117 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4118 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4119 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4120 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4121 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4122 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4123 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4124 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4125 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4126 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4127 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4128 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4129 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4130 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4131 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4132 // CHECK9: cond.true:
4133 // CHECK9-NEXT: br label [[COND_END:%.*]]
4134 // CHECK9: cond.false:
4135 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4136 // CHECK9-NEXT: br label [[COND_END]]
4137 // CHECK9: cond.end:
4138 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4139 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4140 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4141 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4142 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4143 // CHECK9: omp.inner.for.cond:
4144 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
4145 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4146 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4147 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4148 // CHECK9: omp.inner.for.body:
4149 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
4150 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4151 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4152 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4153 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
4154 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4155 // CHECK9: omp.inner.for.inc:
4156 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4157 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
4158 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4159 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4160 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4161 // CHECK9: omp.inner.for.end:
4162 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4163 // CHECK9: omp.loop.exit:
4164 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4165 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4166 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4167 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4168 // CHECK9: .omp.final.then:
4169 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4170 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4171 // CHECK9: .omp.final.done:
4172 // CHECK9-NEXT: ret void
4173 //
4174 //
4175 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
4176 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4177 // CHECK9-NEXT: entry:
4178 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4179 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4180 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4181 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4182 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4183 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4184 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4185 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4186 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4187 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4188 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4189 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4190 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4191 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4192 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4193 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4194 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4195 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4196 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4197 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4198 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4199 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4200 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4201 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4202 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4203 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4204 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4205 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4206 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4207 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4208 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4209 // CHECK9: cond.true:
4210 // CHECK9-NEXT: br label [[COND_END:%.*]]
4211 // CHECK9: cond.false:
4212 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4213 // CHECK9-NEXT: br label [[COND_END]]
4214 // CHECK9: cond.end:
4215 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4216 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4217 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4218 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4219 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4220 // CHECK9: omp.inner.for.cond:
4221 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
4222 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
4223 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4224 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4225 // CHECK9: omp.inner.for.body:
4226 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4227 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4228 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4229 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
4230 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4231 // CHECK9: omp.body.continue:
4232 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4233 // CHECK9: omp.inner.for.inc:
4234 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4235 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4236 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4237 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
4238 // CHECK9: omp.inner.for.end:
4239 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4240 // CHECK9: omp.loop.exit:
4241 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4242 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4243 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4244 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4245 // CHECK9: .omp.final.then:
4246 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4247 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4248 // CHECK9: .omp.final.done:
4249 // CHECK9-NEXT: ret void
4250 //
4251 //
4252 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
4253 // CHECK9-SAME: () #[[ATTR1]] {
4254 // CHECK9-NEXT: entry:
4255 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
4256 // CHECK9-NEXT: ret void
4257 //
4258 //
4259 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
4260 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4261 // CHECK9-NEXT: entry:
4262 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4263 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4264 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4265 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4266 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4267 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4268 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4269 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4270 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4271 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4272 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4273 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4274 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4275 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4276 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4277 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4278 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4279 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4280 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4281 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4282 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4283 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4284 // CHECK9: cond.true:
4285 // CHECK9-NEXT: br label [[COND_END:%.*]]
4286 // CHECK9: cond.false:
4287 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4288 // CHECK9-NEXT: br label [[COND_END]]
4289 // CHECK9: cond.end:
4290 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4291 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4292 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4293 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4294 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4295 // CHECK9: omp.inner.for.cond:
4296 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
4297 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4298 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4299 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4300 // CHECK9: omp.inner.for.body:
4301 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
4302 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4303 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4304 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4305 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4306 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
4307 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
4308 // CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
4309 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4310 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4311 // CHECK9: omp.inner.for.inc:
4312 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4313 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
4314 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4315 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4316 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
4317 // CHECK9: omp.inner.for.end:
4318 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4319 // CHECK9: omp.loop.exit:
4320 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4321 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4322 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4323 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4324 // CHECK9: .omp.final.then:
4325 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4326 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4327 // CHECK9: .omp.final.done:
4328 // CHECK9-NEXT: ret void
4329 //
4330 //
4331 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
4332 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4333 // CHECK9-NEXT: entry:
4334 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4335 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4336 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4337 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4338 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4339 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4340 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4341 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4342 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4343 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4344 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4345 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4346 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4347 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4348 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4349 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4350 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4351 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4352 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4353 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4354 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4355 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4356 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4357 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4358 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4359 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4360 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4361 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4362 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4363 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4364 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4365 // CHECK9: cond.true:
4366 // CHECK9-NEXT: br label [[COND_END:%.*]]
4367 // CHECK9: cond.false:
4368 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4369 // CHECK9-NEXT: br label [[COND_END]]
4370 // CHECK9: cond.end:
4371 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4372 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4373 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4374 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4375 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4376 // CHECK9: omp.inner.for.cond:
4377 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
4378 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
4379 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4380 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4381 // CHECK9: omp.inner.for.body:
4382 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4383 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4384 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4385 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
4386 // CHECK9-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
4387 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4388 // CHECK9: omp.body.continue:
4389 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4390 // CHECK9: omp.inner.for.inc:
4391 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4392 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4393 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4394 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
4395 // CHECK9: omp.inner.for.end:
4396 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4397 // CHECK9: omp.loop.exit:
4398 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4399 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4400 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4401 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4402 // CHECK9: .omp.final.then:
4403 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4404 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4405 // CHECK9: .omp.final.done:
4406 // CHECK9-NEXT: ret void
4407 //
4408 //
4409 // CHECK9-LABEL: define {{[^@]+}}@main
4410 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
4411 // CHECK9-NEXT: entry:
4412 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4413 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4414 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4415 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4416 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4417 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4418 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4419 // CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
4420 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
4421 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4422 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4423 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
4424 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4425 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
4426 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4427 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
4428 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4429 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
4430 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4431 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
4432 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4433 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
4434 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4435 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
4436 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4437 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
4438 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4439 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
4440 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4441 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4442 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4443 // CHECK9: omp_offload.failed:
4444 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
4445 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
4446 // CHECK9: omp_offload.cont:
4447 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4448 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4449 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
4450 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4451 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
4452 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4453 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
4454 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4455 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
4456 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4457 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
4458 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4459 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
4460 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4461 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
4462 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4463 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
4464 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4465 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
4466 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4467 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4468 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4469 // CHECK9: omp_offload.failed3:
4470 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
4471 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4472 // CHECK9: omp_offload.cont4:
4473 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
4474 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4475 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
4476 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4477 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4478 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
4479 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
4480 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4481 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
4482 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
4483 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4484 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
4485 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4486 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4487 // CHECK9-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4488 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
4489 // CHECK9-NEXT: store i32 1, i32* [[TMP31]], align 4
4490 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
4491 // CHECK9-NEXT: store i32 1, i32* [[TMP32]], align 4
4492 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
4493 // CHECK9-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
4494 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
4495 // CHECK9-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
4496 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
4497 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP35]], align 8
4498 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
4499 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP36]], align 8
4500 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
4501 // CHECK9-NEXT: store i8** null, i8*** [[TMP37]], align 8
4502 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
4503 // CHECK9-NEXT: store i8** null, i8*** [[TMP38]], align 8
4504 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
4505 // CHECK9-NEXT: store i64 100, i64* [[TMP39]], align 8
4506 // CHECK9-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
4507 // CHECK9-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
4508 // CHECK9-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4509 // CHECK9: omp_offload.failed7:
4510 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP23]]) #[[ATTR2]]
4511 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT8]]
4512 // CHECK9: omp_offload.cont8:
4513 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* @Arg, align 4
4514 // CHECK9-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]])
4515 // CHECK9-NEXT: ret i32 [[CALL]]
4516 //
4517 //
4518 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
4519 // CHECK9-SAME: () #[[ATTR1]] {
4520 // CHECK9-NEXT: entry:
4521 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4522 // CHECK9-NEXT: ret void
4523 //
4524 //
4525 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
4526 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4527 // CHECK9-NEXT: entry:
4528 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4529 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4530 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4531 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4532 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4533 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4534 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4535 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4536 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4537 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4538 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4539 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4540 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4541 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4542 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4543 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4544 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4545 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4546 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4547 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4548 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4549 // CHECK9: cond.true:
4550 // CHECK9-NEXT: br label [[COND_END:%.*]]
4551 // CHECK9: cond.false:
4552 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4553 // CHECK9-NEXT: br label [[COND_END]]
4554 // CHECK9: cond.end:
4555 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4556 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4557 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4558 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4559 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4560 // CHECK9: omp.inner.for.cond:
4561 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
4562 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4563 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4564 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4565 // CHECK9: omp.inner.for.body:
4566 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
4567 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4568 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4569 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4570 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
4571 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4572 // CHECK9: omp.inner.for.inc:
4573 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4574 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
4575 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4576 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4577 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
4578 // CHECK9: omp.inner.for.end:
4579 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4580 // CHECK9: omp.loop.exit:
4581 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4582 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4583 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4584 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4585 // CHECK9: .omp.final.then:
4586 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4587 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4588 // CHECK9: .omp.final.done:
4589 // CHECK9-NEXT: ret void
4590 //
4591 //
4592 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
4593 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4594 // CHECK9-NEXT: entry:
4595 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4596 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4597 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4598 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4599 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4600 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4601 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4602 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4603 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4604 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4605 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4606 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4607 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4608 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4609 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4610 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4611 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4612 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4613 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4614 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4615 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4616 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4617 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4618 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4619 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4620 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4621 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4622 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4623 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4624 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4625 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4626 // CHECK9: cond.true:
4627 // CHECK9-NEXT: br label [[COND_END:%.*]]
4628 // CHECK9: cond.false:
4629 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4630 // CHECK9-NEXT: br label [[COND_END]]
4631 // CHECK9: cond.end:
4632 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4633 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4634 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4635 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4636 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4637 // CHECK9: omp.inner.for.cond:
4638 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
4639 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
4640 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4641 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4642 // CHECK9: omp.inner.for.body:
4643 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4644 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4645 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4646 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
4647 // CHECK9-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
4648 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4649 // CHECK9: omp.body.continue:
4650 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4651 // CHECK9: omp.inner.for.inc:
4652 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4653 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4654 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4655 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
4656 // CHECK9: omp.inner.for.end:
4657 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4658 // CHECK9: omp.loop.exit:
4659 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4660 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4661 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4662 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4663 // CHECK9: .omp.final.then:
4664 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4665 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4666 // CHECK9: .omp.final.done:
4667 // CHECK9-NEXT: ret void
4668 //
4669 //
4670 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
4671 // CHECK9-SAME: () #[[ATTR1]] {
4672 // CHECK9-NEXT: entry:
4673 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
4674 // CHECK9-NEXT: ret void
4675 //
4676 //
4677 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
4678 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4679 // CHECK9-NEXT: entry:
4680 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4681 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4682 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4683 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4684 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4685 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4686 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4687 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4688 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4689 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4690 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4691 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4692 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4693 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4694 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4695 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4696 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4697 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4698 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4699 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4700 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4701 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4702 // CHECK9: cond.true:
4703 // CHECK9-NEXT: br label [[COND_END:%.*]]
4704 // CHECK9: cond.false:
4705 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4706 // CHECK9-NEXT: br label [[COND_END]]
4707 // CHECK9: cond.end:
4708 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4709 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4710 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4711 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4712 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4713 // CHECK9: omp.inner.for.cond:
4714 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
4715 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4716 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4717 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4718 // CHECK9: omp.inner.for.body:
4719 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
4720 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4721 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4722 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4723 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4724 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
4725 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
4726 // CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
4727 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4728 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4729 // CHECK9: omp.inner.for.inc:
4730 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4731 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
4732 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4733 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4734 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
4735 // CHECK9: omp.inner.for.end:
4736 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4737 // CHECK9: omp.loop.exit:
4738 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4739 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4740 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4741 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4742 // CHECK9: .omp.final.then:
4743 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4744 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4745 // CHECK9: .omp.final.done:
4746 // CHECK9-NEXT: ret void
4747 //
4748 //
4749 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
4750 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4751 // CHECK9-NEXT: entry:
4752 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4753 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4754 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4755 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4756 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4757 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4758 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4759 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4760 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4761 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4762 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4763 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4764 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4765 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4766 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4767 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4768 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4769 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4770 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4771 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4772 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4773 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4774 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4775 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4776 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4777 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4778 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4779 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4780 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4781 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4782 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4783 // CHECK9: cond.true:
4784 // CHECK9-NEXT: br label [[COND_END:%.*]]
4785 // CHECK9: cond.false:
4786 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4787 // CHECK9-NEXT: br label [[COND_END]]
4788 // CHECK9: cond.end:
4789 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4790 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4791 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4792 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4793 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4794 // CHECK9: omp.inner.for.cond:
4795 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
4796 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
4797 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4798 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4799 // CHECK9: omp.inner.for.body:
4800 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4801 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4802 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4803 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
4804 // CHECK9-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
4805 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4806 // CHECK9: omp.body.continue:
4807 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4808 // CHECK9: omp.inner.for.inc:
4809 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4810 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4811 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4812 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
4813 // CHECK9: omp.inner.for.end:
4814 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4815 // CHECK9: omp.loop.exit:
4816 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4817 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4818 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4819 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4820 // CHECK9: .omp.final.then:
4821 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4822 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4823 // CHECK9: .omp.final.done:
4824 // CHECK9-NEXT: ret void
4825 //
4826 //
4827 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
4828 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
4829 // CHECK9-NEXT: entry:
4830 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4831 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4832 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4833 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]])
4834 // CHECK9-NEXT: ret void
4835 //
4836 //
4837 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
4838 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
4839 // CHECK9-NEXT: entry:
4840 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4841 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4842 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
4843 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4844 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4845 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4846 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4847 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4848 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4849 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4850 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4851 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4852 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4853 // CHECK9-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
4854 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
4855 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4856 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4857 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4858 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4859 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4860 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4861 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4862 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4863 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
4864 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4865 // CHECK9: cond.true:
4866 // CHECK9-NEXT: br label [[COND_END:%.*]]
4867 // CHECK9: cond.false:
4868 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4869 // CHECK9-NEXT: br label [[COND_END]]
4870 // CHECK9: cond.end:
4871 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4872 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4873 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4874 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4875 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4876 // CHECK9: omp.inner.for.cond:
4877 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
4878 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
4879 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4880 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4881 // CHECK9: omp.inner.for.body:
4882 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
4883 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4884 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
4885 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4886 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4, !llvm.access.group [[ACC_GRP38]]
4887 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
4888 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4889 // CHECK9: omp_if.then:
4890 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP38]]
4891 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
4892 // CHECK9: omp_if.else:
4893 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
4894 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
4895 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
4896 // CHECK9-NEXT: call void @.omp_outlined..9(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
4897 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
4898 // CHECK9-NEXT: br label [[OMP_IF_END]]
4899 // CHECK9: omp_if.end:
4900 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4901 // CHECK9: omp.inner.for.inc:
4902 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
4903 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
4904 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4905 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
4906 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
4907 // CHECK9: omp.inner.for.end:
4908 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4909 // CHECK9: omp.loop.exit:
4910 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4911 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4912 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4913 // CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4914 // CHECK9: .omp.final.then:
4915 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4916 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4917 // CHECK9: .omp.final.done:
4918 // CHECK9-NEXT: ret void
4919 //
4920 //
4921 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
4922 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4923 // CHECK9-NEXT: entry:
4924 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4925 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4926 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4927 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4928 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4929 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4930 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4931 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4932 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4933 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4934 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4935 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4936 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4937 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4938 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4939 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4940 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4941 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4942 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4943 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4944 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4945 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4946 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4947 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4948 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4949 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4950 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4951 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4952 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4953 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4954 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4955 // CHECK9: cond.true:
4956 // CHECK9-NEXT: br label [[COND_END:%.*]]
4957 // CHECK9: cond.false:
4958 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4959 // CHECK9-NEXT: br label [[COND_END]]
4960 // CHECK9: cond.end:
4961 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4962 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4963 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4964 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4965 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4966 // CHECK9: omp.inner.for.cond:
4967 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
4968 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
4969 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4970 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4971 // CHECK9: omp.inner.for.body:
4972 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
4973 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4974 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4975 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
4976 // CHECK9-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
4977 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4978 // CHECK9: omp.body.continue:
4979 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4980 // CHECK9: omp.inner.for.inc:
4981 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
4982 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4983 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
4984 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
4985 // CHECK9: omp.inner.for.end:
4986 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4987 // CHECK9: omp.loop.exit:
4988 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4989 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4990 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4991 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4992 // CHECK9: .omp.final.then:
4993 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4994 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4995 // CHECK9: .omp.final.done:
4996 // CHECK9-NEXT: ret void
4997 //
4998 //
4999 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5000 // CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
5001 // CHECK9-NEXT: entry:
5002 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
5003 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5004 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5005 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
5006 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5007 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5008 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5009 // CHECK9-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
5010 // CHECK9-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
5011 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5012 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5013 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
5014 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5015 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
5016 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5017 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
5018 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5019 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
5020 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5021 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
5022 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5023 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
5024 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5025 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
5026 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5027 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
5028 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5029 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
5030 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5031 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5032 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5033 // CHECK9: omp_offload.failed:
5034 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
5035 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
5036 // CHECK9: omp_offload.cont:
5037 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5038 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
5039 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
5040 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
5041 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
5042 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
5043 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
5044 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
5045 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
5046 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
5047 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
5048 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
5049 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
5050 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
5051 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
5052 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
5053 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
5054 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
5055 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
5056 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
5057 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5058 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5059 // CHECK9: omp_offload.failed3:
5060 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
5061 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
5062 // CHECK9: omp_offload.cont4:
5063 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5064 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
5065 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
5066 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
5067 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5068 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
5069 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
5070 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5071 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
5072 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
5073 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5074 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
5075 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5076 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5077 // CHECK9-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5078 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
5079 // CHECK9-NEXT: store i32 1, i32* [[TMP31]], align 4
5080 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
5081 // CHECK9-NEXT: store i32 1, i32* [[TMP32]], align 4
5082 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
5083 // CHECK9-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
5084 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
5085 // CHECK9-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
5086 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
5087 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP35]], align 8
5088 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
5089 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP36]], align 8
5090 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
5091 // CHECK9-NEXT: store i8** null, i8*** [[TMP37]], align 8
5092 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
5093 // CHECK9-NEXT: store i8** null, i8*** [[TMP38]], align 8
5094 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
5095 // CHECK9-NEXT: store i64 100, i64* [[TMP39]], align 8
5096 // CHECK9-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
5097 // CHECK9-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
5098 // CHECK9-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
5099 // CHECK9: omp_offload.failed7:
5100 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP23]]) #[[ATTR2]]
5101 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT8]]
5102 // CHECK9: omp_offload.cont8:
5103 // CHECK9-NEXT: ret i32 0
5104 //
5105 //
5106 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
5107 // CHECK9-SAME: () #[[ATTR1]] {
5108 // CHECK9-NEXT: entry:
5109 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
5110 // CHECK9-NEXT: ret void
5111 //
5112 //
5113 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
5114 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5115 // CHECK9-NEXT: entry:
5116 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5117 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5118 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5119 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5120 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5121 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5122 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5123 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5124 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5125 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5126 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5127 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5128 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5129 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5130 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5131 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5132 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5133 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5134 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5135 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5136 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5137 // CHECK9: cond.true:
5138 // CHECK9-NEXT: br label [[COND_END:%.*]]
5139 // CHECK9: cond.false:
5140 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5141 // CHECK9-NEXT: br label [[COND_END]]
5142 // CHECK9: cond.end:
5143 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5144 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5145 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5146 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5147 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5148 // CHECK9: omp.inner.for.cond:
5149 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
5150 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5151 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5152 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5153 // CHECK9: omp.inner.for.body:
5154 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
5155 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5156 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5157 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5158 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
5159 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5160 // CHECK9: omp.inner.for.inc:
5161 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5162 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
5163 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5164 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5165 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
5166 // CHECK9: omp.inner.for.end:
5167 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5168 // CHECK9: omp.loop.exit:
5169 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5170 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5171 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5172 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5173 // CHECK9: .omp.final.then:
5174 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5175 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5176 // CHECK9: .omp.final.done:
5177 // CHECK9-NEXT: ret void
5178 //
5179 //
5180 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11
5181 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5182 // CHECK9-NEXT: entry:
5183 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5184 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5185 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5186 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5187 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5188 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5189 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5190 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5191 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5192 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5193 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5194 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5195 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5196 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5197 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5198 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5199 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5200 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5201 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5202 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5203 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5204 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5205 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5206 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5207 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5208 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5209 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5210 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5211 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5212 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5213 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5214 // CHECK9: cond.true:
5215 // CHECK9-NEXT: br label [[COND_END:%.*]]
5216 // CHECK9: cond.false:
5217 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5218 // CHECK9-NEXT: br label [[COND_END]]
5219 // CHECK9: cond.end:
5220 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5221 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5222 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5223 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5224 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5225 // CHECK9: omp.inner.for.cond:
5226 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
5227 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
5228 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5229 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5230 // CHECK9: omp.inner.for.body:
5231 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5232 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5233 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5234 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
5235 // CHECK9-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
5236 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5237 // CHECK9: omp.body.continue:
5238 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5239 // CHECK9: omp.inner.for.inc:
5240 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5241 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5242 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5243 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
5244 // CHECK9: omp.inner.for.end:
5245 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5246 // CHECK9: omp.loop.exit:
5247 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5248 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5249 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5250 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5251 // CHECK9: .omp.final.then:
5252 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5253 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5254 // CHECK9: .omp.final.done:
5255 // CHECK9-NEXT: ret void
5256 //
5257 //
5258 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
5259 // CHECK9-SAME: () #[[ATTR1]] {
5260 // CHECK9-NEXT: entry:
5261 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
5262 // CHECK9-NEXT: ret void
5263 //
5264 //
5265 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12
5266 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5267 // CHECK9-NEXT: entry:
5268 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5269 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5270 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5271 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5272 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5273 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5274 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5275 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5276 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5277 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5278 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5279 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5280 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5281 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5282 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5283 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5284 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5285 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5286 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5287 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5288 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5289 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5290 // CHECK9: cond.true:
5291 // CHECK9-NEXT: br label [[COND_END:%.*]]
5292 // CHECK9: cond.false:
5293 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5294 // CHECK9-NEXT: br label [[COND_END]]
5295 // CHECK9: cond.end:
5296 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5297 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5298 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5299 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5300 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5301 // CHECK9: omp.inner.for.cond:
5302 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
5303 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5304 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5305 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5306 // CHECK9: omp.inner.for.body:
5307 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
5308 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5309 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5310 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5311 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5312 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
5313 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
5314 // CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
5315 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5316 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5317 // CHECK9: omp.inner.for.inc:
5318 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5319 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
5320 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5321 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5322 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
5323 // CHECK9: omp.inner.for.end:
5324 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5325 // CHECK9: omp.loop.exit:
5326 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5327 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5328 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5329 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5330 // CHECK9: .omp.final.then:
5331 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5332 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5333 // CHECK9: .omp.final.done:
5334 // CHECK9-NEXT: ret void
5335 //
5336 //
5337 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
5338 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5339 // CHECK9-NEXT: entry:
5340 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5341 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5342 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5343 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5344 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5345 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5346 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5347 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5348 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5349 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5350 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5351 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5352 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5353 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5354 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5355 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5356 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5357 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5358 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5359 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5360 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5361 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5362 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5363 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5364 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5365 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5366 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5367 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5368 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5369 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5370 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5371 // CHECK9: cond.true:
5372 // CHECK9-NEXT: br label [[COND_END:%.*]]
5373 // CHECK9: cond.false:
5374 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5375 // CHECK9-NEXT: br label [[COND_END]]
5376 // CHECK9: cond.end:
5377 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5378 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5379 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5380 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5381 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5382 // CHECK9: omp.inner.for.cond:
5383 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
5384 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
5385 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5386 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5387 // CHECK9: omp.inner.for.body:
5388 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5389 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5390 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5391 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
5392 // CHECK9-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
5393 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5394 // CHECK9: omp.body.continue:
5395 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5396 // CHECK9: omp.inner.for.inc:
5397 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5398 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5399 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5400 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
5401 // CHECK9: omp.inner.for.end:
5402 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5403 // CHECK9: omp.loop.exit:
5404 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5405 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5406 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5407 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5408 // CHECK9: .omp.final.then:
5409 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5410 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5411 // CHECK9: .omp.final.done:
5412 // CHECK9-NEXT: ret void
5413 //
5414 //
5415 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
5416 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
5417 // CHECK9-NEXT: entry:
5418 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
5419 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5420 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5421 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV]])
5422 // CHECK9-NEXT: ret void
5423 //
5424 //
5425 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14
5426 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
5427 // CHECK9-NEXT: entry:
5428 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5429 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5430 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
5431 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5432 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5433 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5434 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5435 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5436 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5437 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5438 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5439 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5440 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5441 // CHECK9-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
5442 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
5443 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5444 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5445 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5446 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5447 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5448 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5449 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5450 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5451 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
5452 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5453 // CHECK9: cond.true:
5454 // CHECK9-NEXT: br label [[COND_END:%.*]]
5455 // CHECK9: cond.false:
5456 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5457 // CHECK9-NEXT: br label [[COND_END]]
5458 // CHECK9: cond.end:
5459 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5460 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5461 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5462 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5463 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5464 // CHECK9: omp.inner.for.cond:
5465 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
5466 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5467 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5468 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5469 // CHECK9: omp.inner.for.body:
5470 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
5471 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5472 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5473 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5474 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4, !llvm.access.group [[ACC_GRP56]]
5475 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
5476 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5477 // CHECK9: omp_if.then:
5478 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP56]]
5479 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
5480 // CHECK9: omp_if.else:
5481 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
5482 // CHECK9-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
5483 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
5484 // CHECK9-NEXT: call void @.omp_outlined..15(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
5485 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
5486 // CHECK9-NEXT: br label [[OMP_IF_END]]
5487 // CHECK9: omp_if.end:
5488 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5489 // CHECK9: omp.inner.for.inc:
5490 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5491 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
5492 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5493 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5494 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
5495 // CHECK9: omp.inner.for.end:
5496 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5497 // CHECK9: omp.loop.exit:
5498 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5499 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5500 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5501 // CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5502 // CHECK9: .omp.final.then:
5503 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5504 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5505 // CHECK9: .omp.final.done:
5506 // CHECK9-NEXT: ret void
5507 //
5508 //
5509 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15
5510 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5511 // CHECK9-NEXT: entry:
5512 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5513 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5514 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5515 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5516 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5517 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5518 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5519 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5520 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5521 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5522 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5523 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5524 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5525 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5526 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5527 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5528 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5529 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5530 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5531 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5532 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5533 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5534 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5535 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5536 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5537 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5538 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5539 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5540 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5541 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5542 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5543 // CHECK9: cond.true:
5544 // CHECK9-NEXT: br label [[COND_END:%.*]]
5545 // CHECK9: cond.false:
5546 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5547 // CHECK9-NEXT: br label [[COND_END]]
5548 // CHECK9: cond.end:
5549 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5550 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5551 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5552 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5553 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5554 // CHECK9: omp.inner.for.cond:
5555 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
5556 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
5557 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5558 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5559 // CHECK9: omp.inner.for.body:
5560 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5561 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5562 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5563 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
5564 // CHECK9-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
5565 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5566 // CHECK9: omp.body.continue:
5567 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5568 // CHECK9: omp.inner.for.inc:
5569 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5570 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5571 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5572 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
5573 // CHECK9: omp.inner.for.end:
5574 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5575 // CHECK9: omp.loop.exit:
5576 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5577 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5578 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5579 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5580 // CHECK9: .omp.final.then:
5581 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5582 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5583 // CHECK9: .omp.final.done:
5584 // CHECK9-NEXT: ret void
5585 //
5586 //
5587 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5588 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
5589 // CHECK9-NEXT: entry:
5590 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
5591 // CHECK9-NEXT: ret void
5592 //
5593 //
5594 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv
5595 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
5596 // CHECK11-NEXT: entry:
5597 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5598 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5599 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5600 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5601 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
5602 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5603 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
5604 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5605 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
5606 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5607 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
5608 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5609 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
5610 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5611 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
5612 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5613 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
5614 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5615 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
5616 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5617 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
5618 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5619 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5620 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5621 // CHECK11: omp_offload.failed:
5622 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
5623 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
5624 // CHECK11: omp_offload.cont:
5625 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5626 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
5627 // CHECK11-NEXT: store i32 1, i32* [[TMP11]], align 4
5628 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
5629 // CHECK11-NEXT: store i32 0, i32* [[TMP12]], align 4
5630 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
5631 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 8
5632 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
5633 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 8
5634 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
5635 // CHECK11-NEXT: store i64* null, i64** [[TMP15]], align 8
5636 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
5637 // CHECK11-NEXT: store i64* null, i64** [[TMP16]], align 8
5638 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
5639 // CHECK11-NEXT: store i8** null, i8*** [[TMP17]], align 8
5640 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
5641 // CHECK11-NEXT: store i8** null, i8*** [[TMP18]], align 8
5642 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
5643 // CHECK11-NEXT: store i64 100, i64* [[TMP19]], align 8
5644 // CHECK11-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
5645 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5646 // CHECK11-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5647 // CHECK11: omp_offload.failed3:
5648 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
5649 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]
5650 // CHECK11: omp_offload.cont4:
5651 // CHECK11-NEXT: ret void
5652 //
5653 //
5654 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
5655 // CHECK11-SAME: () #[[ATTR1:[0-9]+]] {
5656 // CHECK11-NEXT: entry:
5657 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5658 // CHECK11-NEXT: ret void
5659 //
5660 //
5661 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
5662 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5663 // CHECK11-NEXT: entry:
5664 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5665 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5666 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5667 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5668 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5669 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5670 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5671 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5672 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5673 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5674 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5675 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5676 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5677 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5678 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5679 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5680 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5681 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5682 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5683 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5684 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5685 // CHECK11: cond.true:
5686 // CHECK11-NEXT: br label [[COND_END:%.*]]
5687 // CHECK11: cond.false:
5688 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5689 // CHECK11-NEXT: br label [[COND_END]]
5690 // CHECK11: cond.end:
5691 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5692 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5693 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5694 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5695 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5696 // CHECK11: omp.inner.for.cond:
5697 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
5698 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5699 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5700 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5701 // CHECK11: omp.inner.for.body:
5702 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
5703 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5704 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5705 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5706 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
5707 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5708 // CHECK11: omp.inner.for.inc:
5709 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5710 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
5711 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5712 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5713 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
5714 // CHECK11: omp.inner.for.end:
5715 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5716 // CHECK11: omp.loop.exit:
5717 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5718 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5719 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5720 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5721 // CHECK11: .omp.final.then:
5722 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5723 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5724 // CHECK11: .omp.final.done:
5725 // CHECK11-NEXT: ret void
5726 //
5727 //
5728 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
5729 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5730 // CHECK11-NEXT: entry:
5731 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5732 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5733 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5734 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5735 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5736 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5737 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5738 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5739 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5740 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5741 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5742 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5743 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5744 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5745 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5746 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5747 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5748 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5749 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5750 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5751 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5752 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5753 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5754 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5755 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5756 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5757 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5758 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5759 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5760 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5761 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5762 // CHECK11: cond.true:
5763 // CHECK11-NEXT: br label [[COND_END:%.*]]
5764 // CHECK11: cond.false:
5765 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5766 // CHECK11-NEXT: br label [[COND_END]]
5767 // CHECK11: cond.end:
5768 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5769 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5770 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5771 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5772 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5773 // CHECK11: omp.inner.for.cond:
5774 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
5775 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
5776 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5777 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5778 // CHECK11: omp.inner.for.body:
5779 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5780 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5781 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5782 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
5783 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5784 // CHECK11: omp.body.continue:
5785 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5786 // CHECK11: omp.inner.for.inc:
5787 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5788 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5789 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5790 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5791 // CHECK11: omp.inner.for.end:
5792 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5793 // CHECK11: omp.loop.exit:
5794 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5795 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5796 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5797 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5798 // CHECK11: .omp.final.then:
5799 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5800 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5801 // CHECK11: .omp.final.done:
5802 // CHECK11-NEXT: ret void
5803 //
5804 //
5805 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
5806 // CHECK11-SAME: () #[[ATTR1]] {
5807 // CHECK11-NEXT: entry:
5808 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
5809 // CHECK11-NEXT: ret void
5810 //
5811 //
5812 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
5813 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5814 // CHECK11-NEXT: entry:
5815 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5816 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5817 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5818 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5819 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5820 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5821 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5822 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5823 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5824 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5825 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5826 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5827 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5828 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5829 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5830 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5831 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5832 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5833 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5834 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5835 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5836 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5837 // CHECK11: cond.true:
5838 // CHECK11-NEXT: br label [[COND_END:%.*]]
5839 // CHECK11: cond.false:
5840 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5841 // CHECK11-NEXT: br label [[COND_END]]
5842 // CHECK11: cond.end:
5843 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5844 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5845 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5846 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5847 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5848 // CHECK11: omp.inner.for.cond:
5849 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
5850 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
5851 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5852 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5853 // CHECK11: omp.inner.for.body:
5854 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
5855 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5856 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
5857 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5858 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
5859 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
5860 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
5861 // CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
5862 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
5863 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5864 // CHECK11: omp.inner.for.inc:
5865 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
5866 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
5867 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5868 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
5869 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
5870 // CHECK11: omp.inner.for.end:
5871 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5872 // CHECK11: omp.loop.exit:
5873 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5874 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5875 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5876 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5877 // CHECK11: .omp.final.then:
5878 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5879 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5880 // CHECK11: .omp.final.done:
5881 // CHECK11-NEXT: ret void
5882 //
5883 //
5884 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
5885 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5886 // CHECK11-NEXT: entry:
5887 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5888 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5889 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5890 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5891 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5892 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5893 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5894 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5895 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5896 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5897 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5898 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5899 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5900 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5901 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5902 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5903 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5904 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5905 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5906 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5907 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5908 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5909 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5910 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5911 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5912 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5913 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5914 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5915 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5916 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5917 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5918 // CHECK11: cond.true:
5919 // CHECK11-NEXT: br label [[COND_END:%.*]]
5920 // CHECK11: cond.false:
5921 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5922 // CHECK11-NEXT: br label [[COND_END]]
5923 // CHECK11: cond.end:
5924 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5925 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5926 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5927 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5928 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5929 // CHECK11: omp.inner.for.cond:
5930 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
5931 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
5932 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5933 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5934 // CHECK11: omp.inner.for.body:
5935 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
5936 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5937 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5938 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
5939 // CHECK11-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
5940 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5941 // CHECK11: omp.body.continue:
5942 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5943 // CHECK11: omp.inner.for.inc:
5944 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
5945 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5946 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
5947 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
5948 // CHECK11: omp.inner.for.end:
5949 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5950 // CHECK11: omp.loop.exit:
5951 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5952 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5953 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5954 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5955 // CHECK11: .omp.final.then:
5956 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5957 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5958 // CHECK11: .omp.final.done:
5959 // CHECK11-NEXT: ret void
5960 //
5961 //
5962 // CHECK11-LABEL: define {{[^@]+}}@main
5963 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
5964 // CHECK11-NEXT: entry:
5965 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
5966 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5967 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5968 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
5969 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5970 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5971 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5972 // CHECK11-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
5973 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
5974 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5975 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5976 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
5977 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5978 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
5979 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5980 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
5981 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5982 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
5983 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5984 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
5985 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5986 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
5987 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5988 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
5989 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5990 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
5991 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5992 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
5993 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5994 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5995 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5996 // CHECK11: omp_offload.failed:
5997 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
5998 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
5999 // CHECK11: omp_offload.cont:
6000 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6001 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
6002 // CHECK11-NEXT: store i32 1, i32* [[TMP11]], align 4
6003 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
6004 // CHECK11-NEXT: store i32 0, i32* [[TMP12]], align 4
6005 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
6006 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 8
6007 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
6008 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 8
6009 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
6010 // CHECK11-NEXT: store i64* null, i64** [[TMP15]], align 8
6011 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
6012 // CHECK11-NEXT: store i64* null, i64** [[TMP16]], align 8
6013 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
6014 // CHECK11-NEXT: store i8** null, i8*** [[TMP17]], align 8
6015 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
6016 // CHECK11-NEXT: store i8** null, i8*** [[TMP18]], align 8
6017 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
6018 // CHECK11-NEXT: store i64 100, i64* [[TMP19]], align 8
6019 // CHECK11-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
6020 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
6021 // CHECK11-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
6022 // CHECK11: omp_offload.failed3:
6023 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
6024 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]
6025 // CHECK11: omp_offload.cont4:
6026 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
6027 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
6028 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
6029 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
6030 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6031 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
6032 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
6033 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6034 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
6035 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
6036 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6037 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 8
6038 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6039 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6040 // CHECK11-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6041 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
6042 // CHECK11-NEXT: store i32 1, i32* [[TMP31]], align 4
6043 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
6044 // CHECK11-NEXT: store i32 1, i32* [[TMP32]], align 4
6045 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
6046 // CHECK11-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
6047 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
6048 // CHECK11-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
6049 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
6050 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP35]], align 8
6051 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
6052 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP36]], align 8
6053 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
6054 // CHECK11-NEXT: store i8** null, i8*** [[TMP37]], align 8
6055 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
6056 // CHECK11-NEXT: store i8** null, i8*** [[TMP38]], align 8
6057 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
6058 // CHECK11-NEXT: store i64 100, i64* [[TMP39]], align 8
6059 // CHECK11-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
6060 // CHECK11-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
6061 // CHECK11-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6062 // CHECK11: omp_offload.failed7:
6063 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP23]]) #[[ATTR2]]
6064 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT8]]
6065 // CHECK11: omp_offload.cont8:
6066 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* @Arg, align 4
6067 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP42]])
6068 // CHECK11-NEXT: ret i32 [[CALL]]
6069 //
6070 //
6071 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
6072 // CHECK11-SAME: () #[[ATTR1]] {
6073 // CHECK11-NEXT: entry:
6074 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
6075 // CHECK11-NEXT: ret void
6076 //
6077 //
6078 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
6079 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6080 // CHECK11-NEXT: entry:
6081 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6082 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6083 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6084 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6085 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6086 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6087 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6088 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6089 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6090 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6091 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6092 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6093 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6094 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6095 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6096 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6097 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6098 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6099 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6100 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6101 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6102 // CHECK11: cond.true:
6103 // CHECK11-NEXT: br label [[COND_END:%.*]]
6104 // CHECK11: cond.false:
6105 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6106 // CHECK11-NEXT: br label [[COND_END]]
6107 // CHECK11: cond.end:
6108 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6109 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6110 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6111 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6112 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6113 // CHECK11: omp.inner.for.cond:
6114 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
6115 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6116 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6117 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6118 // CHECK11: omp.inner.for.body:
6119 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
6120 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6121 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6122 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6123 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
6124 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6125 // CHECK11: omp.inner.for.inc:
6126 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6127 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
6128 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6129 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6130 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
6131 // CHECK11: omp.inner.for.end:
6132 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6133 // CHECK11: omp.loop.exit:
6134 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6135 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6136 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6137 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6138 // CHECK11: .omp.final.then:
6139 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6140 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6141 // CHECK11: .omp.final.done:
6142 // CHECK11-NEXT: ret void
6143 //
6144 //
6145 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
6146 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6147 // CHECK11-NEXT: entry:
6148 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6149 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6150 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6151 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6152 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6153 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6154 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6155 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6156 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6157 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6158 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6159 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6160 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6161 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6162 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6163 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6164 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6165 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6166 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6167 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6168 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6169 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6170 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6171 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6172 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6173 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6174 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6175 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6176 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6177 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6178 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6179 // CHECK11: cond.true:
6180 // CHECK11-NEXT: br label [[COND_END:%.*]]
6181 // CHECK11: cond.false:
6182 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6183 // CHECK11-NEXT: br label [[COND_END]]
6184 // CHECK11: cond.end:
6185 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6186 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6187 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6188 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6189 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6190 // CHECK11: omp.inner.for.cond:
6191 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
6192 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
6193 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6194 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6195 // CHECK11: omp.inner.for.body:
6196 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6197 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6198 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6199 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
6200 // CHECK11-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
6201 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6202 // CHECK11: omp.body.continue:
6203 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6204 // CHECK11: omp.inner.for.inc:
6205 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6206 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6207 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6208 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
6209 // CHECK11: omp.inner.for.end:
6210 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6211 // CHECK11: omp.loop.exit:
6212 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6213 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6214 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6215 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6216 // CHECK11: .omp.final.then:
6217 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6218 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6219 // CHECK11: .omp.final.done:
6220 // CHECK11-NEXT: ret void
6221 //
6222 //
6223 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
6224 // CHECK11-SAME: () #[[ATTR1]] {
6225 // CHECK11-NEXT: entry:
6226 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
6227 // CHECK11-NEXT: ret void
6228 //
6229 //
6230 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6
6231 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6232 // CHECK11-NEXT: entry:
6233 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6234 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6235 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6236 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6237 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6238 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6239 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6240 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6241 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6242 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6243 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6244 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6245 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6246 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6247 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6248 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6249 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6250 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6251 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6252 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6253 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6254 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6255 // CHECK11: cond.true:
6256 // CHECK11-NEXT: br label [[COND_END:%.*]]
6257 // CHECK11: cond.false:
6258 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6259 // CHECK11-NEXT: br label [[COND_END]]
6260 // CHECK11: cond.end:
6261 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6262 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6263 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6264 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6265 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6266 // CHECK11: omp.inner.for.cond:
6267 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6268 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6269 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6270 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6271 // CHECK11: omp.inner.for.body:
6272 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6273 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6274 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6275 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6276 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6277 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6278 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6279 // CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6280 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6281 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6282 // CHECK11: omp.inner.for.inc:
6283 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6284 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6285 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6286 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6287 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
6288 // CHECK11: omp.inner.for.end:
6289 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6290 // CHECK11: omp.loop.exit:
6291 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6292 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6293 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6294 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6295 // CHECK11: .omp.final.then:
6296 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6297 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6298 // CHECK11: .omp.final.done:
6299 // CHECK11-NEXT: ret void
6300 //
6301 //
6302 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
6303 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6304 // CHECK11-NEXT: entry:
6305 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6306 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6307 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6308 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6309 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6310 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6311 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6312 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6313 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6314 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6315 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6316 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6317 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6318 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6319 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6320 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6321 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6322 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6323 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6324 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6325 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6326 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6327 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6328 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6329 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6330 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6331 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6332 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6333 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6334 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6335 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6336 // CHECK11: cond.true:
6337 // CHECK11-NEXT: br label [[COND_END:%.*]]
6338 // CHECK11: cond.false:
6339 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6340 // CHECK11-NEXT: br label [[COND_END]]
6341 // CHECK11: cond.end:
6342 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6343 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6344 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6345 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6346 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6347 // CHECK11: omp.inner.for.cond:
6348 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6349 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6350 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6351 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6352 // CHECK11: omp.inner.for.body:
6353 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6354 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6355 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6356 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6357 // CHECK11-NEXT: call void @_Z3fn5v()
6358 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6359 // CHECK11: omp.body.continue:
6360 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6361 // CHECK11: omp.inner.for.inc:
6362 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6363 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6364 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6365 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
6366 // CHECK11: omp.inner.for.end:
6367 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6368 // CHECK11: omp.loop.exit:
6369 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6370 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6371 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6372 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6373 // CHECK11: .omp.final.then:
6374 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6375 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6376 // CHECK11: .omp.final.done:
6377 // CHECK11-NEXT: ret void
6378 //
6379 //
6380 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
6381 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
6382 // CHECK11-NEXT: entry:
6383 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
6384 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
6385 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
6386 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]])
6387 // CHECK11-NEXT: ret void
6388 //
6389 //
6390 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..8
6391 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
6392 // CHECK11-NEXT: entry:
6393 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6394 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6395 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
6396 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6397 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6398 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6399 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6400 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6401 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6402 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6403 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6404 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6405 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6406 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED12:%.*]] = alloca i64, align 8
6407 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR18:%.*]] = alloca i32, align 4
6408 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6409 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6410 // CHECK11-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
6411 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
6412 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6413 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
6414 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6415 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6416 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6417 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6418 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6419 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6420 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6421 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6422 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6423 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6424 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6425 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6426 // CHECK11: cond.true:
6427 // CHECK11-NEXT: br label [[COND_END:%.*]]
6428 // CHECK11: cond.false:
6429 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6430 // CHECK11-NEXT: br label [[COND_END]]
6431 // CHECK11: cond.end:
6432 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6433 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6434 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6435 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6436 // CHECK11-NEXT: [[TMP7:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6437 // CHECK11-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP7]] to i1
6438 // CHECK11-NEXT: br i1 [[TOBOOL1]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE7:%.*]]
6439 // CHECK11: omp_if.then:
6440 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6441 // CHECK11: omp.inner.for.cond:
6442 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
6443 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6444 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6445 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6446 // CHECK11: omp.inner.for.body:
6447 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
6448 // CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6449 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6450 // CHECK11-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
6451 // CHECK11-NEXT: [[TMP14:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
6452 // CHECK11-NEXT: [[TOBOOL3:%.*]] = trunc i8 [[TMP14]] to i1
6453 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6454 // CHECK11-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TOBOOL3]] to i8
6455 // CHECK11-NEXT: store i8 [[FROMBOOL4]], i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP35]]
6456 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
6457 // CHECK11-NEXT: [[TMP16:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
6458 // CHECK11-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP16]] to i1
6459 // CHECK11-NEXT: br i1 [[TOBOOL5]], label [[OMP_IF_THEN6:%.*]], label [[OMP_IF_ELSE:%.*]]
6460 // CHECK11: omp_if.then6:
6461 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP35]]
6462 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6463 // CHECK11: omp_if.else:
6464 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
6465 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
6466 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
6467 // CHECK11-NEXT: call void @.omp_outlined..9(i32* [[TMP17]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
6468 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
6469 // CHECK11-NEXT: br label [[OMP_IF_END]]
6470 // CHECK11: omp_if.end:
6471 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6472 // CHECK11: omp.inner.for.inc:
6473 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6474 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
6475 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6476 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6477 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
6478 // CHECK11: omp.inner.for.end:
6479 // CHECK11-NEXT: br label [[OMP_IF_END23:%.*]]
6480 // CHECK11: omp_if.else7:
6481 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8:%.*]]
6482 // CHECK11: omp.inner.for.cond8:
6483 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6484 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6485 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
6486 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END22:%.*]]
6487 // CHECK11: omp.inner.for.body10:
6488 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6489 // CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
6490 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6491 // CHECK11-NEXT: [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
6492 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6493 // CHECK11-NEXT: [[TOBOOL11:%.*]] = trunc i8 [[TMP26]] to i1
6494 // CHECK11-NEXT: [[CONV13:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED12]] to i8*
6495 // CHECK11-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[TOBOOL11]] to i8
6496 // CHECK11-NEXT: store i8 [[FROMBOOL14]], i8* [[CONV13]], align 1
6497 // CHECK11-NEXT: [[TMP27:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED12]], align 8
6498 // CHECK11-NEXT: [[TMP28:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6499 // CHECK11-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP28]] to i1
6500 // CHECK11-NEXT: br i1 [[TOBOOL15]], label [[OMP_IF_THEN16:%.*]], label [[OMP_IF_ELSE17:%.*]]
6501 // CHECK11: omp_if.then16:
6502 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])
6503 // CHECK11-NEXT: br label [[OMP_IF_END19:%.*]]
6504 // CHECK11: omp_if.else17:
6505 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]])
6506 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6507 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR18]], align 4
6508 // CHECK11-NEXT: call void @.omp_outlined..10(i32* [[TMP29]], i32* [[DOTBOUND_ZERO_ADDR18]], i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR2]]
6509 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]])
6510 // CHECK11-NEXT: br label [[OMP_IF_END19]]
6511 // CHECK11: omp_if.end19:
6512 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC20:%.*]]
6513 // CHECK11: omp.inner.for.inc20:
6514 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6515 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6516 // CHECK11-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
6517 // CHECK11-NEXT: store i32 [[ADD21]], i32* [[DOTOMP_IV]], align 4
6518 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP38:![0-9]+]]
6519 // CHECK11: omp.inner.for.end22:
6520 // CHECK11-NEXT: br label [[OMP_IF_END23]]
6521 // CHECK11: omp_if.end23:
6522 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6523 // CHECK11: omp.loop.exit:
6524 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6525 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6526 // CHECK11-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
6527 // CHECK11-NEXT: br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6528 // CHECK11: .omp.final.then:
6529 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6530 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6531 // CHECK11: .omp.final.done:
6532 // CHECK11-NEXT: ret void
6533 //
6534 //
6535 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..9
6536 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6537 // CHECK11-NEXT: entry:
6538 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6539 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6540 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6541 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6542 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6543 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6544 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6545 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6546 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6547 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6548 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6549 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6550 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6551 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6552 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6553 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6554 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6555 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6556 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6557 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6558 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6559 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
6560 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6561 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
6562 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6563 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6564 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6565 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6566 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
6567 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6568 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6569 // CHECK11: omp_if.then:
6570 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6571 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6572 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6573 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6574 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6575 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6576 // CHECK11: cond.true:
6577 // CHECK11-NEXT: br label [[COND_END:%.*]]
6578 // CHECK11: cond.false:
6579 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6580 // CHECK11-NEXT: br label [[COND_END]]
6581 // CHECK11: cond.end:
6582 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6583 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6584 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6585 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6586 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6587 // CHECK11: omp.inner.for.cond:
6588 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
6589 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
6590 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6591 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6592 // CHECK11: omp.inner.for.body:
6593 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6594 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6595 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6596 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
6597 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
6598 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6599 // CHECK11: omp.body.continue:
6600 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6601 // CHECK11: omp.inner.for.inc:
6602 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6603 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
6604 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6605 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
6606 // CHECK11: omp.inner.for.end:
6607 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6608 // CHECK11: omp_if.else:
6609 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6610 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
6611 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6612 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6613 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
6614 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
6615 // CHECK11: cond.true6:
6616 // CHECK11-NEXT: br label [[COND_END8:%.*]]
6617 // CHECK11: cond.false7:
6618 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6619 // CHECK11-NEXT: br label [[COND_END8]]
6620 // CHECK11: cond.end8:
6621 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
6622 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
6623 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6624 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6625 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
6626 // CHECK11: omp.inner.for.cond10:
6627 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6628 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6629 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6630 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
6631 // CHECK11: omp.inner.for.body12:
6632 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6633 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
6634 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6635 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
6636 // CHECK11-NEXT: call void @_Z3fn6v()
6637 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
6638 // CHECK11: omp.body.continue15:
6639 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
6640 // CHECK11: omp.inner.for.inc16:
6641 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6642 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
6643 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
6644 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
6645 // CHECK11: omp.inner.for.end18:
6646 // CHECK11-NEXT: br label [[OMP_IF_END]]
6647 // CHECK11: omp_if.end:
6648 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6649 // CHECK11: omp.loop.exit:
6650 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6651 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
6652 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
6653 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6654 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6655 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6656 // CHECK11: .omp.final.then:
6657 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6658 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6659 // CHECK11: .omp.final.done:
6660 // CHECK11-NEXT: ret void
6661 //
6662 //
6663 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
6664 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6665 // CHECK11-NEXT: entry:
6666 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6667 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6668 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6669 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6670 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6671 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6672 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6673 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6674 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6675 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6676 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6677 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6678 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6679 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6680 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6681 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6682 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6683 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6684 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6685 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6686 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6687 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
6688 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6689 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
6690 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6691 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6692 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6693 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6694 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
6695 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6696 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6697 // CHECK11: omp_if.then:
6698 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6699 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6700 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6701 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6702 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6703 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6704 // CHECK11: cond.true:
6705 // CHECK11-NEXT: br label [[COND_END:%.*]]
6706 // CHECK11: cond.false:
6707 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6708 // CHECK11-NEXT: br label [[COND_END]]
6709 // CHECK11: cond.end:
6710 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6711 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6712 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6713 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6714 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6715 // CHECK11: omp.inner.for.cond:
6716 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
6717 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
6718 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6719 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6720 // CHECK11: omp.inner.for.body:
6721 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6722 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6723 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6724 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
6725 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
6726 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6727 // CHECK11: omp.body.continue:
6728 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6729 // CHECK11: omp.inner.for.inc:
6730 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6731 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
6732 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6733 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
6734 // CHECK11: omp.inner.for.end:
6735 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6736 // CHECK11: omp_if.else:
6737 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6738 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
6739 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6740 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6741 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
6742 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
6743 // CHECK11: cond.true6:
6744 // CHECK11-NEXT: br label [[COND_END8:%.*]]
6745 // CHECK11: cond.false7:
6746 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6747 // CHECK11-NEXT: br label [[COND_END8]]
6748 // CHECK11: cond.end8:
6749 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
6750 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
6751 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6752 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6753 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
6754 // CHECK11: omp.inner.for.cond10:
6755 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6756 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6757 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6758 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
6759 // CHECK11: omp.inner.for.body12:
6760 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6761 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
6762 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6763 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
6764 // CHECK11-NEXT: call void @_Z3fn6v()
6765 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
6766 // CHECK11: omp.body.continue15:
6767 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
6768 // CHECK11: omp.inner.for.inc16:
6769 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6770 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
6771 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
6772 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
6773 // CHECK11: omp.inner.for.end18:
6774 // CHECK11-NEXT: br label [[OMP_IF_END]]
6775 // CHECK11: omp_if.end:
6776 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6777 // CHECK11: omp.loop.exit:
6778 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6779 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
6780 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
6781 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6782 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6783 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6784 // CHECK11: .omp.final.then:
6785 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6786 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6787 // CHECK11: .omp.final.done:
6788 // CHECK11-NEXT: ret void
6789 //
6790 //
6791 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6792 // CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
6793 // CHECK11-NEXT: entry:
6794 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
6795 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6796 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
6797 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
6798 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6799 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6800 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6801 // CHECK11-NEXT: [[_TMP5:%.*]] = alloca i32, align 4
6802 // CHECK11-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6803 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6804 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6805 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
6806 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6807 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
6808 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6809 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
6810 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6811 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
6812 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6813 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
6814 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6815 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
6816 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6817 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
6818 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6819 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
6820 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6821 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
6822 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6823 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
6824 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6825 // CHECK11: omp_offload.failed:
6826 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
6827 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
6828 // CHECK11: omp_offload.cont:
6829 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6830 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
6831 // CHECK11-NEXT: store i32 1, i32* [[TMP11]], align 4
6832 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
6833 // CHECK11-NEXT: store i32 0, i32* [[TMP12]], align 4
6834 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
6835 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 8
6836 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
6837 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 8
6838 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
6839 // CHECK11-NEXT: store i64* null, i64** [[TMP15]], align 8
6840 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
6841 // CHECK11-NEXT: store i64* null, i64** [[TMP16]], align 8
6842 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
6843 // CHECK11-NEXT: store i8** null, i8*** [[TMP17]], align 8
6844 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
6845 // CHECK11-NEXT: store i8** null, i8*** [[TMP18]], align 8
6846 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
6847 // CHECK11-NEXT: store i64 100, i64* [[TMP19]], align 8
6848 // CHECK11-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
6849 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
6850 // CHECK11-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
6851 // CHECK11: omp_offload.failed3:
6852 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
6853 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]
6854 // CHECK11: omp_offload.cont4:
6855 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6856 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
6857 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
6858 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
6859 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6860 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
6861 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
6862 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6863 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
6864 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
6865 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6866 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 8
6867 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6868 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6869 // CHECK11-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6870 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
6871 // CHECK11-NEXT: store i32 1, i32* [[TMP31]], align 4
6872 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
6873 // CHECK11-NEXT: store i32 1, i32* [[TMP32]], align 4
6874 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
6875 // CHECK11-NEXT: store i8** [[TMP29]], i8*** [[TMP33]], align 8
6876 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
6877 // CHECK11-NEXT: store i8** [[TMP30]], i8*** [[TMP34]], align 8
6878 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
6879 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.17, i32 0, i32 0), i64** [[TMP35]], align 8
6880 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
6881 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.18, i32 0, i32 0), i64** [[TMP36]], align 8
6882 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
6883 // CHECK11-NEXT: store i8** null, i8*** [[TMP37]], align 8
6884 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
6885 // CHECK11-NEXT: store i8** null, i8*** [[TMP38]], align 8
6886 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
6887 // CHECK11-NEXT: store i64 100, i64* [[TMP39]], align 8
6888 // CHECK11-NEXT: [[TMP40:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
6889 // CHECK11-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0
6890 // CHECK11-NEXT: br i1 [[TMP41]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6891 // CHECK11: omp_offload.failed7:
6892 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP23]]) #[[ATTR2]]
6893 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT8]]
6894 // CHECK11: omp_offload.cont8:
6895 // CHECK11-NEXT: ret i32 0
6896 //
6897 //
6898 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
6899 // CHECK11-SAME: () #[[ATTR1]] {
6900 // CHECK11-NEXT: entry:
6901 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*))
6902 // CHECK11-NEXT: ret void
6903 //
6904 //
6905 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..11
6906 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6907 // CHECK11-NEXT: entry:
6908 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6909 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6910 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6911 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6912 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6913 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6914 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6915 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6916 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6917 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6918 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6919 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6920 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6921 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6922 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6923 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6924 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6925 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6926 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6927 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6928 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6929 // CHECK11: cond.true:
6930 // CHECK11-NEXT: br label [[COND_END:%.*]]
6931 // CHECK11: cond.false:
6932 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6933 // CHECK11-NEXT: br label [[COND_END]]
6934 // CHECK11: cond.end:
6935 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6936 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6937 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6938 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6939 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6940 // CHECK11: omp.inner.for.cond:
6941 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
6942 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
6943 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6944 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6945 // CHECK11: omp.inner.for.body:
6946 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
6947 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6948 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
6949 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6950 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
6951 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6952 // CHECK11: omp.inner.for.inc:
6953 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
6954 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
6955 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6956 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
6957 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
6958 // CHECK11: omp.inner.for.end:
6959 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6960 // CHECK11: omp.loop.exit:
6961 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6962 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6963 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6964 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6965 // CHECK11: .omp.final.then:
6966 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6967 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6968 // CHECK11: .omp.final.done:
6969 // CHECK11-NEXT: ret void
6970 //
6971 //
6972 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..12
6973 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6974 // CHECK11-NEXT: entry:
6975 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6976 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6977 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6978 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6979 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6980 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6981 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6982 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6983 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6984 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6985 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6986 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6987 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6988 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6989 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6990 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6991 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6992 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6993 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6994 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6995 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6996 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6997 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6998 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6999 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7000 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7001 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7002 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7003 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7004 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7005 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7006 // CHECK11: cond.true:
7007 // CHECK11-NEXT: br label [[COND_END:%.*]]
7008 // CHECK11: cond.false:
7009 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7010 // CHECK11-NEXT: br label [[COND_END]]
7011 // CHECK11: cond.end:
7012 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7013 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7014 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7015 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7016 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7017 // CHECK11: omp.inner.for.cond:
7018 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
7019 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
7020 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7021 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7022 // CHECK11: omp.inner.for.body:
7023 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7024 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7025 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7026 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
7027 // CHECK11-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
7028 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7029 // CHECK11: omp.body.continue:
7030 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7031 // CHECK11: omp.inner.for.inc:
7032 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7033 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7034 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7035 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
7036 // CHECK11: omp.inner.for.end:
7037 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7038 // CHECK11: omp.loop.exit:
7039 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7040 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7041 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7042 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7043 // CHECK11: .omp.final.then:
7044 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7045 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7046 // CHECK11: .omp.final.done:
7047 // CHECK11-NEXT: ret void
7048 //
7049 //
7050 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
7051 // CHECK11-SAME: () #[[ATTR1]] {
7052 // CHECK11-NEXT: entry:
7053 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
7054 // CHECK11-NEXT: ret void
7055 //
7056 //
7057 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13
7058 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7059 // CHECK11-NEXT: entry:
7060 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7061 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7062 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7063 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7064 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7065 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7066 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7067 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7068 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7069 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7070 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7071 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7072 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7073 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7074 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7075 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7076 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7077 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7078 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7079 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7080 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7081 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7082 // CHECK11: cond.true:
7083 // CHECK11-NEXT: br label [[COND_END:%.*]]
7084 // CHECK11: cond.false:
7085 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7086 // CHECK11-NEXT: br label [[COND_END]]
7087 // CHECK11: cond.end:
7088 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7089 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7090 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7091 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7092 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7093 // CHECK11: omp.inner.for.cond:
7094 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7095 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7096 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7097 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7098 // CHECK11: omp.inner.for.body:
7099 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7100 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7101 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7102 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7103 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7104 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7105 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7106 // CHECK11-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7107 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7108 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7109 // CHECK11: omp.inner.for.inc:
7110 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7111 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7112 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7113 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7114 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
7115 // CHECK11: omp.inner.for.end:
7116 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7117 // CHECK11: omp.loop.exit:
7118 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7119 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7120 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7121 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7122 // CHECK11: .omp.final.then:
7123 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7124 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7125 // CHECK11: .omp.final.done:
7126 // CHECK11-NEXT: ret void
7127 //
7128 //
7129 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14
7130 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7131 // CHECK11-NEXT: entry:
7132 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7133 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7134 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7135 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7136 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7137 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7138 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7139 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7140 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7141 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7142 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7143 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7144 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7145 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7146 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7147 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7148 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7149 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7150 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7151 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7152 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7153 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7154 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7155 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7156 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7157 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7158 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7159 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7160 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7161 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7162 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7163 // CHECK11: cond.true:
7164 // CHECK11-NEXT: br label [[COND_END:%.*]]
7165 // CHECK11: cond.false:
7166 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7167 // CHECK11-NEXT: br label [[COND_END]]
7168 // CHECK11: cond.end:
7169 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7170 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7171 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7172 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7173 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7174 // CHECK11: omp.inner.for.cond:
7175 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7176 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7177 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7178 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7179 // CHECK11: omp.inner.for.body:
7180 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7181 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7182 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7183 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7184 // CHECK11-NEXT: call void @_Z3fn2v()
7185 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7186 // CHECK11: omp.body.continue:
7187 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7188 // CHECK11: omp.inner.for.inc:
7189 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7190 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7191 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7192 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
7193 // CHECK11: omp.inner.for.end:
7194 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7195 // CHECK11: omp.loop.exit:
7196 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7197 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7198 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7199 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7200 // CHECK11: .omp.final.then:
7201 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7202 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7203 // CHECK11: .omp.final.done:
7204 // CHECK11-NEXT: ret void
7205 //
7206 //
7207 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
7208 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
7209 // CHECK11-NEXT: entry:
7210 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
7211 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7212 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7213 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32* [[CONV]])
7214 // CHECK11-NEXT: ret void
7215 //
7216 //
7217 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15
7218 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
7219 // CHECK11-NEXT: entry:
7220 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7221 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7222 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32*, align 8
7223 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7224 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7225 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7226 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7227 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7228 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7229 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7230 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7231 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7232 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7233 // CHECK11-NEXT: store i32* [[ARG]], i32** [[ARG_ADDR]], align 8
7234 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARG_ADDR]], align 8
7235 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7236 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7237 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7238 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7239 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7240 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7241 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7242 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7243 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
7244 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7245 // CHECK11: cond.true:
7246 // CHECK11-NEXT: br label [[COND_END:%.*]]
7247 // CHECK11: cond.false:
7248 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7249 // CHECK11-NEXT: br label [[COND_END]]
7250 // CHECK11: cond.end:
7251 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7252 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7253 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7254 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7255 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7256 // CHECK11: omp.inner.for.cond:
7257 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
7258 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7259 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7260 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7261 // CHECK11: omp.inner.for.body:
7262 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
7263 // CHECK11-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7264 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7265 // CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7266 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP0]], align 4, !llvm.access.group [[ACC_GRP55]]
7267 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
7268 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7269 // CHECK11: omp_if.then:
7270 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP55]]
7271 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
7272 // CHECK11: omp_if.else:
7273 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
7274 // CHECK11-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
7275 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
7276 // CHECK11-NEXT: call void @.omp_outlined..16(i32* [[TMP13]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
7277 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
7278 // CHECK11-NEXT: br label [[OMP_IF_END]]
7279 // CHECK11: omp_if.end:
7280 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7281 // CHECK11: omp.inner.for.inc:
7282 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7283 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
7284 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
7285 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7286 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
7287 // CHECK11: omp.inner.for.end:
7288 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7289 // CHECK11: omp.loop.exit:
7290 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7291 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7292 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7293 // CHECK11-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7294 // CHECK11: .omp.final.then:
7295 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7296 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7297 // CHECK11: .omp.final.done:
7298 // CHECK11-NEXT: ret void
7299 //
7300 //
7301 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..16
7302 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7303 // CHECK11-NEXT: entry:
7304 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7305 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7306 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7307 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7308 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7309 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7310 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7311 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7312 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7313 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7314 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7315 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7316 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7317 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7318 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7319 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7320 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7321 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7322 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7323 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7324 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7325 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7326 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7327 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7328 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7329 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7330 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7331 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7332 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7333 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7334 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7335 // CHECK11: cond.true:
7336 // CHECK11-NEXT: br label [[COND_END:%.*]]
7337 // CHECK11: cond.false:
7338 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7339 // CHECK11-NEXT: br label [[COND_END]]
7340 // CHECK11: cond.end:
7341 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7342 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7343 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7344 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7345 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7346 // CHECK11: omp.inner.for.cond:
7347 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
7348 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
7349 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7350 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7351 // CHECK11: omp.inner.for.body:
7352 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7353 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7354 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7355 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
7356 // CHECK11-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
7357 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7358 // CHECK11: omp.body.continue:
7359 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7360 // CHECK11: omp.inner.for.inc:
7361 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7362 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7363 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7364 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
7365 // CHECK11: omp.inner.for.end:
7366 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7367 // CHECK11: omp.loop.exit:
7368 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7369 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7370 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7371 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7372 // CHECK11: .omp.final.then:
7373 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7374 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7375 // CHECK11: .omp.final.done:
7376 // CHECK11-NEXT: ret void
7377 //
7378 //
7379 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7380 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
7381 // CHECK11-NEXT: entry:
7382 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
7383 // CHECK11-NEXT: ret void
7384 //
7385 //
7386 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
7387 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
7388 // CHECK13-NEXT: entry:
7389 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7390 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7391 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7392 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7393 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7394 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7395 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7396 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7397 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7398 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7399 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7400 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7401 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7402 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7403 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7404 // CHECK13: omp.inner.for.cond:
7405 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7406 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7407 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7408 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7409 // CHECK13: omp.inner.for.body:
7410 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7411 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7412 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7413 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7414 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7415 // CHECK13: omp.body.continue:
7416 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7417 // CHECK13: omp.inner.for.inc:
7418 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7419 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7420 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7421 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7422 // CHECK13: omp.inner.for.end:
7423 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7424 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7425 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7426 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7427 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7428 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7429 // CHECK13: omp.inner.for.cond7:
7430 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7431 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7432 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7433 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7434 // CHECK13: omp.inner.for.body9:
7435 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7436 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7437 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7438 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7439 // CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7440 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7441 // CHECK13: omp.body.continue12:
7442 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7443 // CHECK13: omp.inner.for.inc13:
7444 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7445 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7446 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7447 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7448 // CHECK13: omp.inner.for.end15:
7449 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7450 // CHECK13-NEXT: ret void
7451 //
7452 //
7453 // CHECK13-LABEL: define {{[^@]+}}@main
7454 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
7455 // CHECK13-NEXT: entry:
7456 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7457 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7458 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7459 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7460 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7461 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7462 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7463 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7464 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7465 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7466 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7467 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7468 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7469 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7470 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7471 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
7472 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
7473 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7474 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7475 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7476 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7477 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7478 // CHECK13: omp.inner.for.cond:
7479 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7480 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7481 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7482 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7483 // CHECK13: omp.inner.for.body:
7484 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7485 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7486 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7487 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7488 // CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7489 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7490 // CHECK13: omp.body.continue:
7491 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7492 // CHECK13: omp.inner.for.inc:
7493 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7494 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7495 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7496 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7497 // CHECK13: omp.inner.for.end:
7498 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7499 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7500 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7501 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7502 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7503 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7504 // CHECK13: omp.inner.for.cond7:
7505 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
7506 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
7507 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7508 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7509 // CHECK13: omp.inner.for.body9:
7510 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7511 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7512 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7513 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
7514 // CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
7515 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7516 // CHECK13: omp.body.continue12:
7517 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7518 // CHECK13: omp.inner.for.inc13:
7519 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7520 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7521 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7522 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7523 // CHECK13: omp.inner.for.end15:
7524 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7525 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7526 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7527 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7528 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
7529 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7530 // CHECK13: omp.inner.for.cond21:
7531 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
7532 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
7533 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
7534 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7535 // CHECK13: omp.inner.for.body23:
7536 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7537 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
7538 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7539 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
7540 // CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
7541 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7542 // CHECK13: omp.body.continue26:
7543 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7544 // CHECK13: omp.inner.for.inc27:
7545 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7546 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
7547 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7548 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
7549 // CHECK13: omp.inner.for.end29:
7550 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
7551 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* @Arg, align 4
7552 // CHECK13-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP15]])
7553 // CHECK13-NEXT: ret i32 [[CALL]]
7554 //
7555 //
7556 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7557 // CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7558 // CHECK13-NEXT: entry:
7559 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7560 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7561 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7562 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7563 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7564 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7565 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7566 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7567 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7568 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7569 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7570 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7571 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7572 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7573 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7574 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
7575 // CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
7576 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7577 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7578 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7579 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7580 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7581 // CHECK13: omp.inner.for.cond:
7582 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
7583 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
7584 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7585 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7586 // CHECK13: omp.inner.for.body:
7587 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7588 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7589 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7590 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
7591 // CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
7592 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7593 // CHECK13: omp.body.continue:
7594 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7595 // CHECK13: omp.inner.for.inc:
7596 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7597 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7598 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7599 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
7600 // CHECK13: omp.inner.for.end:
7601 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7602 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7603 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7604 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7605 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7606 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7607 // CHECK13: omp.inner.for.cond7:
7608 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
7609 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
7610 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7611 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7612 // CHECK13: omp.inner.for.body9:
7613 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7614 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7615 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7616 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
7617 // CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
7618 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7619 // CHECK13: omp.body.continue12:
7620 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7621 // CHECK13: omp.inner.for.inc13:
7622 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7623 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7624 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7625 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7626 // CHECK13: omp.inner.for.end15:
7627 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7628 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7629 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7630 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7631 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
7632 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7633 // CHECK13: omp.inner.for.cond21:
7634 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
7635 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
7636 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
7637 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7638 // CHECK13: omp.inner.for.body23:
7639 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7640 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
7641 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7642 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
7643 // CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
7644 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7645 // CHECK13: omp.body.continue26:
7646 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7647 // CHECK13: omp.inner.for.inc27:
7648 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7649 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
7650 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7651 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
7652 // CHECK13: omp.inner.for.end29:
7653 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
7654 // CHECK13-NEXT: ret i32 0
7655 //
7656 //
7657 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
7658 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
7659 // CHECK15-NEXT: entry:
7660 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7661 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7662 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7663 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7664 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7665 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7666 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7667 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7668 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7669 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
7670 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7671 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7672 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7673 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7674 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7675 // CHECK15: omp.inner.for.cond:
7676 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7677 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7678 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7679 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7680 // CHECK15: omp.inner.for.body:
7681 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7682 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7683 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7684 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7685 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7686 // CHECK15: omp.body.continue:
7687 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7688 // CHECK15: omp.inner.for.inc:
7689 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7690 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7691 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7692 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7693 // CHECK15: omp.inner.for.end:
7694 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
7695 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7696 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7697 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7698 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7699 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7700 // CHECK15: omp.inner.for.cond7:
7701 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7702 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7703 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7704 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7705 // CHECK15: omp.inner.for.body9:
7706 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7707 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7708 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7709 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7710 // CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7711 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7712 // CHECK15: omp.body.continue12:
7713 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7714 // CHECK15: omp.inner.for.inc13:
7715 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7716 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7717 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7718 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7719 // CHECK15: omp.inner.for.end15:
7720 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
7721 // CHECK15-NEXT: ret void
7722 //
7723 //
7724 // CHECK15-LABEL: define {{[^@]+}}@main
7725 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
7726 // CHECK15-NEXT: entry:
7727 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7728 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7729 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7730 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7731 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7732 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7733 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7734 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7735 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7736 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7737 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
7738 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7739 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7740 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7741 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7742 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7743 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
7744 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
7745 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7746 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7747 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7748 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7749 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7750 // CHECK15: omp.inner.for.cond:
7751 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7752 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7753 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7754 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7755 // CHECK15: omp.inner.for.body:
7756 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7757 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7758 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7759 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7760 // CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7761 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7762 // CHECK15: omp.body.continue:
7763 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7764 // CHECK15: omp.inner.for.inc:
7765 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7766 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7767 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7768 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7769 // CHECK15: omp.inner.for.end:
7770 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
7771 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7772 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7773 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7774 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7775 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7776 // CHECK15: omp.inner.for.cond7:
7777 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7778 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7779 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7780 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7781 // CHECK15: omp.inner.for.body9:
7782 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7783 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7784 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7785 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7786 // CHECK15-NEXT: call void @_Z3fn5v()
7787 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7788 // CHECK15: omp.body.continue12:
7789 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7790 // CHECK15: omp.inner.for.inc13:
7791 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7792 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7793 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7794 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
7795 // CHECK15: omp.inner.for.end15:
7796 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
7797 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
7798 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7799 // CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7800 // CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7801 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7802 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7803 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7804 // CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7805 // CHECK15-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7806 // CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
7807 // CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7808 // CHECK15: omp_if.then:
7809 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
7810 // CHECK15: omp.inner.for.cond22:
7811 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
7812 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
7813 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7814 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
7815 // CHECK15: omp.inner.for.body24:
7816 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
7817 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
7818 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
7819 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
7820 // CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
7821 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
7822 // CHECK15: omp.body.continue27:
7823 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
7824 // CHECK15: omp.inner.for.inc28:
7825 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
7826 // CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
7827 // CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
7828 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
7829 // CHECK15: omp.inner.for.end30:
7830 // CHECK15-NEXT: br label [[OMP_IF_END:%.*]]
7831 // CHECK15: omp_if.else:
7832 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
7833 // CHECK15: omp.inner.for.cond31:
7834 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7835 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
7836 // CHECK15-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
7837 // CHECK15-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
7838 // CHECK15: omp.inner.for.body33:
7839 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7840 // CHECK15-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
7841 // CHECK15-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
7842 // CHECK15-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
7843 // CHECK15-NEXT: call void @_Z3fn6v()
7844 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
7845 // CHECK15: omp.body.continue36:
7846 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
7847 // CHECK15: omp.inner.for.inc37:
7848 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
7849 // CHECK15-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
7850 // CHECK15-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
7851 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP17:![0-9]+]]
7852 // CHECK15: omp.inner.for.end39:
7853 // CHECK15-NEXT: br label [[OMP_IF_END]]
7854 // CHECK15: omp_if.end:
7855 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
7856 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
7857 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
7858 // CHECK15-NEXT: ret i32 [[CALL]]
7859 //
7860 //
7861 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7862 // CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7863 // CHECK15-NEXT: entry:
7864 // CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7865 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7866 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7867 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7868 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7869 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7870 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7871 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7872 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7873 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7874 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
7875 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7876 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7877 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7878 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7879 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
7880 // CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
7881 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7882 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7883 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7884 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7885 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7886 // CHECK15: omp.inner.for.cond:
7887 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
7888 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
7889 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7890 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7891 // CHECK15: omp.inner.for.body:
7892 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7893 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7894 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7895 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
7896 // CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
7897 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7898 // CHECK15: omp.body.continue:
7899 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7900 // CHECK15: omp.inner.for.inc:
7901 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7902 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7903 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7904 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
7905 // CHECK15: omp.inner.for.end:
7906 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
7907 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7908 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7909 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7910 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7911 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7912 // CHECK15: omp.inner.for.cond7:
7913 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7914 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7915 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7916 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7917 // CHECK15: omp.inner.for.body9:
7918 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7919 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7920 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7921 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7922 // CHECK15-NEXT: call void @_Z3fn2v()
7923 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7924 // CHECK15: omp.body.continue12:
7925 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7926 // CHECK15: omp.inner.for.inc13:
7927 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7928 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7929 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7930 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
7931 // CHECK15: omp.inner.for.end15:
7932 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
7933 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7934 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7935 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7936 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV19]], align 4
7937 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7938 // CHECK15: omp.inner.for.cond21:
7939 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
7940 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
7941 // CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
7942 // CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7943 // CHECK15: omp.inner.for.body23:
7944 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
7945 // CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
7946 // CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7947 // CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
7948 // CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
7949 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7950 // CHECK15: omp.body.continue26:
7951 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7952 // CHECK15: omp.inner.for.inc27:
7953 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
7954 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
7955 // CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
7956 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
7957 // CHECK15: omp.inner.for.end29:
7958 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
7959 // CHECK15-NEXT: ret i32 0
7960 //
7961