1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple x86_64-unknown-linux -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple x86_64-unknown-linux -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5
6 // RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux -verify -fopenmp-simd -x c++ -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // expected-no-diagnostics
10 #ifndef HEADER
11 #define HEADER
12
main(int argc,char ** argv)13 int main(int argc, char **argv) {
14 #pragma omp target teams
15 #pragma omp distribute parallel for reduction(task, +: argc, argv[0:10][0:argc])
16 for (long long i = 0; i < 10; ++i) {
17 #pragma omp task in_reduction(+: argc, argv[0:10][0:argc])
18 ;
19 }
20 }
21
22
23
24 // Init firstprivate copy of argc
25
26 // Init firstprivate copy of argv[0:10][0:argc]
27
28 // Register task reduction.
29
30
31
32
33
34
35
36
37
38 #endif
39 // CHECK1-LABEL: define {{[^@]+}}@main
40 // CHECK1-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
41 // CHECK1-NEXT: entry:
42 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
43 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
44 // CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8
45 // CHECK1-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
46 // CHECK1-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
47 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
48 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32*
49 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
50 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8
51 // CHECK1-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
52 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14(i64 [[TMP1]], i8** [[TMP2]]) #[[ATTR5:[0-9]+]]
53 // CHECK1-NEXT: ret i32 0
54 //
55 //
56 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l14
57 // CHECK1-SAME: (i64 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] {
58 // CHECK1-NEXT: entry:
59 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8
60 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
61 // CHECK1-NEXT: [[ARGC_CASTED:%.*]] = alloca i64, align 8
62 // CHECK1-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8
63 // CHECK1-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
64 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32*
65 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
66 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[ARGC_CASTED]] to i32*
67 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV1]], align 4
68 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARGC_CASTED]], align 8
69 // CHECK1-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
70 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i8**)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP1]], i8** [[TMP2]])
71 // CHECK1-NEXT: ret void
72 //
73 //
74 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
75 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR1]] {
76 // CHECK1-NEXT: entry:
77 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
78 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
79 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8
80 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
81 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
82 // CHECK1-NEXT: [[TMP:%.*]] = alloca i64, align 8
83 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
84 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
85 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
86 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
87 // CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8
88 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
89 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
90 // CHECK1-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8
91 // CHECK1-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
92 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32*
93 // CHECK1-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
94 // CHECK1-NEXT: store i64 9, i64* [[DOTOMP_COMB_UB]], align 8
95 // CHECK1-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
96 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
97 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
98 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
99 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
100 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
101 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP2]], 9
102 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
103 // CHECK1: cond.true:
104 // CHECK1-NEXT: br label [[COND_END:%.*]]
105 // CHECK1: cond.false:
106 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
107 // CHECK1-NEXT: br label [[COND_END]]
108 // CHECK1: cond.end:
109 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
110 // CHECK1-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
111 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
112 // CHECK1-NEXT: store i64 [[TMP4]], i64* [[DOTOMP_IV]], align 8
113 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
114 // CHECK1: omp.inner.for.cond:
115 // CHECK1-NEXT: [[TMP5:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
116 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
117 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i64 [[TMP5]], [[TMP6]]
118 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
119 // CHECK1: omp.inner.for.body:
120 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
121 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
122 // CHECK1-NEXT: [[TMP9:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
123 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i8**)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP7]], i64 [[TMP8]], i32* [[CONV]], i8** [[TMP9]])
124 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
125 // CHECK1: omp.inner.for.inc:
126 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
127 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
128 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP10]], [[TMP11]]
129 // CHECK1-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
130 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
131 // CHECK1: omp.inner.for.end:
132 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
133 // CHECK1: omp.loop.exit:
134 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
135 // CHECK1-NEXT: ret void
136 //
137 //
138 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
139 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR1]] {
140 // CHECK1-NEXT: entry:
141 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
142 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
143 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
144 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
145 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8
146 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
147 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
148 // CHECK1-NEXT: [[TMP:%.*]] = alloca i64, align 8
149 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
150 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
151 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
152 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
153 // CHECK1-NEXT: [[ARGC1:%.*]] = alloca i32, align 4
154 // CHECK1-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
155 // CHECK1-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
156 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca i8**, align 8
157 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i8*, align 8
158 // CHECK1-NEXT: [[DOTRD_INPUT_:%.*]] = alloca [2 x %struct.kmp_taskred_input_t], align 8
159 // CHECK1-NEXT: [[DOTTASK_RED_:%.*]] = alloca i8*, align 8
160 // CHECK1-NEXT: [[I:%.*]] = alloca i64, align 8
161 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
162 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x i8*], align 8
163 // CHECK1-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
164 // CHECK1-NEXT: [[_TMP28:%.*]] = alloca i8, align 1
165 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
166 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
167 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
168 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
169 // CHECK1-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8
170 // CHECK1-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
171 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8
172 // CHECK1-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
173 // CHECK1-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8
174 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
175 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
176 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[DOTOMP_LB]], align 8
177 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[DOTOMP_UB]], align 8
178 // CHECK1-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
180 // CHECK1-NEXT: store i32 0, i32* [[ARGC1]], align 4
181 // CHECK1-NEXT: [[TMP3:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
182 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP3]], i64 0
183 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8
184 // CHECK1-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i8, i8* [[TMP4]], i64 0
185 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
186 // CHECK1-NEXT: [[TMP6:%.*]] = sext i32 [[TMP5]] to i64
187 // CHECK1-NEXT: [[LB_ADD_LEN:%.*]] = add nsw i64 -1, [[TMP6]]
188 // CHECK1-NEXT: [[TMP7:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
189 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i8*, i8** [[TMP7]], i64 9
190 // CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[ARRAYIDX3]], align 8
191 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, i8* [[TMP8]], i64 [[LB_ADD_LEN]]
192 // CHECK1-NEXT: [[TMP9:%.*]] = ptrtoint i8* [[ARRAYIDX4]] to i64
193 // CHECK1-NEXT: [[TMP10:%.*]] = ptrtoint i8* [[ARRAYIDX2]] to i64
194 // CHECK1-NEXT: [[TMP11:%.*]] = sub i64 [[TMP9]], [[TMP10]]
195 // CHECK1-NEXT: [[TMP12:%.*]] = sdiv exact i64 [[TMP11]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
196 // CHECK1-NEXT: [[TMP13:%.*]] = add nuw i64 [[TMP12]], 1
197 // CHECK1-NEXT: [[TMP14:%.*]] = mul nuw i64 [[TMP13]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
198 // CHECK1-NEXT: [[TMP15:%.*]] = call i8* @llvm.stacksave()
199 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[SAVED_STACK]], align 8
200 // CHECK1-NEXT: [[VLA:%.*]] = alloca i8, i64 [[TMP13]], align 16
201 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[__VLA_EXPR0]], align 8
202 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr i8, i8* [[VLA]], i64 [[TMP13]]
203 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i8* [[VLA]], [[TMP16]]
204 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
205 // CHECK1: omp.arrayinit.body:
206 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i8* [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
207 // CHECK1-NEXT: store i8 0, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1
208 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
209 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i8* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP16]]
210 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
211 // CHECK1: omp.arrayinit.done:
212 // CHECK1-NEXT: [[TMP17:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
213 // CHECK1-NEXT: [[TMP18:%.*]] = load i8*, i8** [[TMP17]], align 8
214 // CHECK1-NEXT: [[TMP19:%.*]] = ptrtoint i8* [[TMP18]] to i64
215 // CHECK1-NEXT: [[TMP20:%.*]] = ptrtoint i8* [[ARRAYIDX2]] to i64
216 // CHECK1-NEXT: [[TMP21:%.*]] = sub i64 [[TMP19]], [[TMP20]]
217 // CHECK1-NEXT: [[TMP22:%.*]] = sdiv exact i64 [[TMP21]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
218 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr i8, i8* [[VLA]], i64 [[TMP22]]
219 // CHECK1-NEXT: store i8** [[_TMP6]], i8*** [[_TMP5]], align 8
220 // CHECK1-NEXT: store i8* [[TMP23]], i8** [[_TMP6]], align 8
221 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_:%.*]] = getelementptr inbounds [2 x %struct.kmp_taskred_input_t], [2 x %struct.kmp_taskred_input_t]* [[DOTRD_INPUT_]], i64 0, i64 0
222 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T:%.*]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_]], i32 0, i32 0
223 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i32* [[ARGC1]] to i8*
224 // CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8
225 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_]], i32 0, i32 1
226 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i32* [[TMP0]] to i8*
227 // CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8
228 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_]], i32 0, i32 2
229 // CHECK1-NEXT: store i64 4, i64* [[TMP28]], align 8
230 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_]], i32 0, i32 3
231 // CHECK1-NEXT: store i8* bitcast (void (i8*, i8*)* @.red_init. to i8*), i8** [[TMP29]], align 8
232 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_]], i32 0, i32 4
233 // CHECK1-NEXT: store i8* null, i8** [[TMP30]], align 8
234 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_]], i32 0, i32 5
235 // CHECK1-NEXT: store i8* bitcast (void (i8*, i8*)* @.red_comb. to i8*), i8** [[TMP31]], align 8
236 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_]], i32 0, i32 6
237 // CHECK1-NEXT: [[TMP33:%.*]] = bitcast i32* [[TMP32]] to i8*
238 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP33]], i8 0, i64 4, i1 false)
239 // CHECK1-NEXT: [[DOTRD_INPUT_GEP_7:%.*]] = getelementptr inbounds [2 x %struct.kmp_taskred_input_t], [2 x %struct.kmp_taskred_input_t]* [[DOTRD_INPUT_]], i64 0, i64 1
240 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_7]], i32 0, i32 0
241 // CHECK1-NEXT: [[TMP35:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
242 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i8*, i8** [[TMP35]], i64 0
243 // CHECK1-NEXT: [[TMP36:%.*]] = load i8*, i8** [[ARRAYIDX8]], align 8
244 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i8, i8* [[TMP36]], i64 0
245 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[TMP0]], align 4
246 // CHECK1-NEXT: [[TMP38:%.*]] = sext i32 [[TMP37]] to i64
247 // CHECK1-NEXT: [[LB_ADD_LEN10:%.*]] = add nsw i64 -1, [[TMP38]]
248 // CHECK1-NEXT: [[TMP39:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8
249 // CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i8*, i8** [[TMP39]], i64 9
250 // CHECK1-NEXT: [[TMP40:%.*]] = load i8*, i8** [[ARRAYIDX11]], align 8
251 // CHECK1-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i8, i8* [[TMP40]], i64 [[LB_ADD_LEN10]]
252 // CHECK1-NEXT: store i8* [[VLA]], i8** [[TMP34]], align 8
253 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_7]], i32 0, i32 1
254 // CHECK1-NEXT: store i8* [[ARRAYIDX9]], i8** [[TMP41]], align 8
255 // CHECK1-NEXT: [[TMP42:%.*]] = ptrtoint i8* [[ARRAYIDX12]] to i64
256 // CHECK1-NEXT: [[TMP43:%.*]] = ptrtoint i8* [[ARRAYIDX9]] to i64
257 // CHECK1-NEXT: [[TMP44:%.*]] = sub i64 [[TMP42]], [[TMP43]]
258 // CHECK1-NEXT: [[TMP45:%.*]] = sdiv exact i64 [[TMP44]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
259 // CHECK1-NEXT: [[TMP46:%.*]] = add nuw i64 [[TMP45]], 1
260 // CHECK1-NEXT: [[TMP47:%.*]] = mul nuw i64 [[TMP46]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
261 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_7]], i32 0, i32 2
262 // CHECK1-NEXT: store i64 [[TMP47]], i64* [[TMP48]], align 8
263 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_7]], i32 0, i32 3
264 // CHECK1-NEXT: store i8* bitcast (void (i8*, i8*)* @.red_init..2 to i8*), i8** [[TMP49]], align 8
265 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_7]], i32 0, i32 4
266 // CHECK1-NEXT: store i8* null, i8** [[TMP50]], align 8
267 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_7]], i32 0, i32 5
268 // CHECK1-NEXT: store i8* bitcast (void (i8*, i8*)* @.red_comb..3 to i8*), i8** [[TMP51]], align 8
269 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASKRED_INPUT_T]], %struct.kmp_taskred_input_t* [[DOTRD_INPUT_GEP_7]], i32 0, i32 6
270 // CHECK1-NEXT: store i32 1, i32* [[TMP52]], align 8
271 // CHECK1-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
272 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4
273 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast [2 x %struct.kmp_taskred_input_t]* [[DOTRD_INPUT_]] to i8*
274 // CHECK1-NEXT: [[TMP56:%.*]] = call i8* @__kmpc_taskred_modifier_init(%struct.ident_t* @[[GLOB2]], i32 [[TMP54]], i32 1, i32 2, i8* [[TMP55]])
275 // CHECK1-NEXT: store i8* [[TMP56]], i8** [[DOTTASK_RED_]], align 8
276 // CHECK1-NEXT: [[TMP57:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
277 // CHECK1-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP57]], align 4
278 // CHECK1-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP58]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
279 // CHECK1-NEXT: [[TMP59:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
280 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i64 [[TMP59]], 9
281 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
282 // CHECK1: cond.true:
283 // CHECK1-NEXT: br label [[COND_END:%.*]]
284 // CHECK1: cond.false:
285 // CHECK1-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
286 // CHECK1-NEXT: br label [[COND_END]]
287 // CHECK1: cond.end:
288 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ 9, [[COND_TRUE]] ], [ [[TMP60]], [[COND_FALSE]] ]
289 // CHECK1-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
290 // CHECK1-NEXT: [[TMP61:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
291 // CHECK1-NEXT: store i64 [[TMP61]], i64* [[DOTOMP_IV]], align 8
292 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
293 // CHECK1: omp.inner.for.cond:
294 // CHECK1-NEXT: [[TMP62:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
295 // CHECK1-NEXT: [[TMP63:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
296 // CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i64 [[TMP62]], [[TMP63]]
297 // CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
298 // CHECK1: omp.inner.for.cond.cleanup:
299 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
300 // CHECK1: omp.inner.for.body:
301 // CHECK1-NEXT: [[TMP64:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
302 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[TMP64]], 1
303 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL]]
304 // CHECK1-NEXT: store i64 [[ADD]], i64* [[I]], align 8
305 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
306 // CHECK1-NEXT: store i8** [[DOTTASK_RED_]], i8*** [[TMP65]], align 8
307 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 1
308 // CHECK1-NEXT: store i32* [[ARGC1]], i32** [[TMP66]], align 8
309 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 2
310 // CHECK1-NEXT: [[TMP68:%.*]] = load i8**, i8*** [[_TMP5]], align 8
311 // CHECK1-NEXT: store i8** [[TMP68]], i8*** [[TMP67]], align 8
312 // CHECK1-NEXT: [[TMP69:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
313 // CHECK1-NEXT: [[TMP70:%.*]] = load i32, i32* [[TMP69]], align 4
314 // CHECK1-NEXT: [[TMP71:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB2]], i32 [[TMP70]], i32 1, i64 48, i64 24, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*))
315 // CHECK1-NEXT: [[TMP72:%.*]] = bitcast i8* [[TMP71]] to %struct.kmp_task_t_with_privates*
316 // CHECK1-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP72]], i32 0, i32 0
317 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP73]], i32 0, i32 0
318 // CHECK1-NEXT: [[TMP75:%.*]] = load i8*, i8** [[TMP74]], align 8
319 // CHECK1-NEXT: [[TMP76:%.*]] = bitcast %struct.anon* [[AGG_CAPTURED]] to i8*
320 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP75]], i8* align 8 [[TMP76]], i64 24, i1 false)
321 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP72]], i32 0, i32 1
322 // CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP77]], i32 0, i32 0
323 // CHECK1-NEXT: [[TMP79:%.*]] = load i8*, i8** [[DOTTASK_RED_]], align 8
324 // CHECK1-NEXT: store i8* [[TMP79]], i8** [[TMP78]], align 8
325 // CHECK1-NEXT: [[TMP80:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
326 // CHECK1-NEXT: [[TMP81:%.*]] = load i32, i32* [[TMP80]], align 4
327 // CHECK1-NEXT: [[TMP82:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB2]], i32 [[TMP81]], i8* [[TMP71]])
328 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
329 // CHECK1: omp.body.continue:
330 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
331 // CHECK1: omp.inner.for.inc:
332 // CHECK1-NEXT: [[TMP83:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
333 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i64 [[TMP83]], 1
334 // CHECK1-NEXT: store i64 [[ADD14]], i64* [[DOTOMP_IV]], align 8
335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
336 // CHECK1: omp.inner.for.end:
337 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
338 // CHECK1: omp.loop.exit:
339 // CHECK1-NEXT: [[TMP84:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
340 // CHECK1-NEXT: [[TMP85:%.*]] = load i32, i32* [[TMP84]], align 4
341 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP85]])
342 // CHECK1-NEXT: [[TMP86:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
343 // CHECK1-NEXT: [[TMP87:%.*]] = load i32, i32* [[TMP86]], align 4
344 // CHECK1-NEXT: call void @__kmpc_task_reduction_modifier_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP87]], i32 1)
345 // CHECK1-NEXT: [[TMP88:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
346 // CHECK1-NEXT: [[TMP89:%.*]] = bitcast i32* [[ARGC1]] to i8*
347 // CHECK1-NEXT: store i8* [[TMP89]], i8** [[TMP88]], align 8
348 // CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
349 // CHECK1-NEXT: store i8* [[VLA]], i8** [[TMP90]], align 8
350 // CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
351 // CHECK1-NEXT: [[TMP92:%.*]] = inttoptr i64 [[TMP13]] to i8*
352 // CHECK1-NEXT: store i8* [[TMP92]], i8** [[TMP91]], align 8
353 // CHECK1-NEXT: [[TMP93:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
354 // CHECK1-NEXT: [[TMP94:%.*]] = load i32, i32* [[TMP93]], align 4
355 // CHECK1-NEXT: [[TMP95:%.*]] = bitcast [3 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
356 // CHECK1-NEXT: [[TMP96:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP94]], i32 2, i64 24, i8* [[TMP95]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
357 // CHECK1-NEXT: switch i32 [[TMP96]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
358 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
359 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
360 // CHECK1-NEXT: ]
361 // CHECK1: .omp.reduction.case1:
362 // CHECK1-NEXT: [[TMP97:%.*]] = load i32, i32* [[TMP0]], align 4
363 // CHECK1-NEXT: [[TMP98:%.*]] = load i32, i32* [[ARGC1]], align 4
364 // CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP97]], [[TMP98]]
365 // CHECK1-NEXT: store i32 [[ADD15]], i32* [[TMP0]], align 4
366 // CHECK1-NEXT: [[TMP99:%.*]] = getelementptr i8, i8* [[ARRAYIDX2]], i64 [[TMP13]]
367 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i8* [[ARRAYIDX2]], [[TMP99]]
368 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE22:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
369 // CHECK1: omp.arraycpy.body:
370 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i8* [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
371 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST16:%.*]] = phi i8* [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY]] ]
372 // CHECK1-NEXT: [[TMP100:%.*]] = load i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1
373 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP100]] to i32
374 // CHECK1-NEXT: [[TMP101:%.*]] = load i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1
375 // CHECK1-NEXT: [[CONV17:%.*]] = sext i8 [[TMP101]] to i32
376 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[CONV]], [[CONV17]]
377 // CHECK1-NEXT: [[CONV19:%.*]] = trunc i32 [[ADD18]] to i8
378 // CHECK1-NEXT: store i8 [[CONV19]], i8* [[OMP_ARRAYCPY_DESTELEMENTPAST16]], align 1
379 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST16]], i32 1
380 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
381 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE21:%.*]] = icmp eq i8* [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP99]]
382 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_BODY]]
383 // CHECK1: omp.arraycpy.done22:
384 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB4]], i32 [[TMP94]], [8 x i32]* @.gomp_critical_user_.reduction.var)
385 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
386 // CHECK1: .omp.reduction.case2:
387 // CHECK1-NEXT: [[TMP102:%.*]] = load i32, i32* [[ARGC1]], align 4
388 // CHECK1-NEXT: [[TMP103:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP102]] monotonic, align 4
389 // CHECK1-NEXT: [[TMP104:%.*]] = getelementptr i8, i8* [[ARRAYIDX2]], i64 [[TMP13]]
390 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY23:%.*]] = icmp eq i8* [[ARRAYIDX2]], [[TMP104]]
391 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY23]], label [[OMP_ARRAYCPY_DONE36:%.*]], label [[OMP_ARRAYCPY_BODY24:%.*]]
392 // CHECK1: omp.arraycpy.body24:
393 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST25:%.*]] = phi i8* [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT34:%.*]], [[ATOMIC_EXIT:%.*]] ]
394 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST26:%.*]] = phi i8* [ [[ARRAYIDX2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT33:%.*]], [[ATOMIC_EXIT]] ]
395 // CHECK1-NEXT: [[TMP105:%.*]] = load i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1
396 // CHECK1-NEXT: [[CONV27:%.*]] = sext i8 [[TMP105]] to i32
397 // CHECK1-NEXT: [[ATOMIC_LOAD:%.*]] = load atomic i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST26]] monotonic, align 1
398 // CHECK1-NEXT: br label [[ATOMIC_CONT:%.*]]
399 // CHECK1: atomic_cont:
400 // CHECK1-NEXT: [[TMP106:%.*]] = phi i8 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY24]] ], [ [[TMP111:%.*]], [[ATOMIC_CONT]] ]
401 // CHECK1-NEXT: store i8 [[TMP106]], i8* [[_TMP28]], align 1
402 // CHECK1-NEXT: [[TMP107:%.*]] = load i8, i8* [[_TMP28]], align 1
403 // CHECK1-NEXT: [[CONV29:%.*]] = sext i8 [[TMP107]] to i32
404 // CHECK1-NEXT: [[TMP108:%.*]] = load i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST25]], align 1
405 // CHECK1-NEXT: [[CONV30:%.*]] = sext i8 [[TMP108]] to i32
406 // CHECK1-NEXT: [[ADD31:%.*]] = add nsw i32 [[CONV29]], [[CONV30]]
407 // CHECK1-NEXT: [[CONV32:%.*]] = trunc i32 [[ADD31]] to i8
408 // CHECK1-NEXT: store i8 [[CONV32]], i8* [[ATOMIC_TEMP]], align 1
409 // CHECK1-NEXT: [[TMP109:%.*]] = load i8, i8* [[ATOMIC_TEMP]], align 1
410 // CHECK1-NEXT: [[TMP110:%.*]] = cmpxchg i8* [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i8 [[TMP106]], i8 [[TMP109]] monotonic monotonic, align 1
411 // CHECK1-NEXT: [[TMP111]] = extractvalue { i8, i1 } [[TMP110]], 0
412 // CHECK1-NEXT: [[TMP112:%.*]] = extractvalue { i8, i1 } [[TMP110]], 1
413 // CHECK1-NEXT: br i1 [[TMP112]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]
414 // CHECK1: atomic_exit:
415 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT33]] = getelementptr i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i32 1
416 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT34]] = getelementptr i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST25]], i32 1
417 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE35:%.*]] = icmp eq i8* [[OMP_ARRAYCPY_DEST_ELEMENT33]], [[TMP104]]
418 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE35]], label [[OMP_ARRAYCPY_DONE36]], label [[OMP_ARRAYCPY_BODY24]]
419 // CHECK1: omp.arraycpy.done36:
420 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
421 // CHECK1: .omp.reduction.default:
422 // CHECK1-NEXT: [[TMP113:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
423 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP113]])
424 // CHECK1-NEXT: ret void
425 //
426 //
427 // CHECK1-LABEL: define {{[^@]+}}@.red_init.
428 // CHECK1-SAME: (i8* noalias noundef [[TMP0:%.*]], i8* noalias noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
429 // CHECK1-NEXT: entry:
430 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
431 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
432 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
433 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
434 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8** [[DOTADDR]] to i32**
435 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
436 // CHECK1-NEXT: store i32 0, i32* [[TMP3]], align 4
437 // CHECK1-NEXT: ret void
438 //
439 //
440 // CHECK1-LABEL: define {{[^@]+}}@.red_comb.
441 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
442 // CHECK1-NEXT: entry:
443 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
444 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
445 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
446 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
447 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8** [[DOTADDR]] to i32**
448 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
449 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[DOTADDR1]] to i32**
450 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP4]], align 8
451 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP3]], align 4
452 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP5]], align 4
453 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP6]], [[TMP7]]
454 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP3]], align 4
455 // CHECK1-NEXT: ret void
456 //
457 //
458 // CHECK1-LABEL: define {{[^@]+}}@.red_init..2
459 // CHECK1-SAME: (i8* noalias noundef [[TMP0:%.*]], i8* noalias noundef [[TMP1:%.*]]) #[[ATTR3]] {
460 // CHECK1-NEXT: entry:
461 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
462 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
463 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
464 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
465 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
466 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* @{{reduction_size[.].+[.]}}, align 8
467 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr i8, i8* [[TMP2]], i64 [[TMP3]]
468 // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq i8* [[TMP2]], [[TMP4]]
469 // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
470 // CHECK1: omp.arrayinit.body:
471 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i8* [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
472 // CHECK1-NEXT: store i8 0, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1
473 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
474 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i8* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP4]]
475 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
476 // CHECK1: omp.arrayinit.done:
477 // CHECK1-NEXT: ret void
478 //
479 //
480 // CHECK1-LABEL: define {{[^@]+}}@.red_comb..3
481 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
482 // CHECK1-NEXT: entry:
483 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
484 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
485 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
486 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
487 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* @{{reduction_size[.].+[.]}}, align 8
488 // CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
489 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
490 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[TMP3]], i64 [[TMP2]]
491 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i8* [[TMP3]], [[TMP5]]
492 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
493 // CHECK1: omp.arraycpy.body:
494 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i8* [ [[TMP4]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
495 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i8* [ [[TMP3]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
496 // CHECK1-NEXT: [[TMP6:%.*]] = load i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1
497 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP6]] to i32
498 // CHECK1-NEXT: [[TMP7:%.*]] = load i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1
499 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP7]] to i32
500 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
501 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i32 [[ADD]] to i8
502 // CHECK1-NEXT: store i8 [[CONV3]], i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1
503 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
504 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
505 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i8* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
506 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
507 // CHECK1: omp.arraycpy.done4:
508 // CHECK1-NEXT: ret void
509 //
510 //
511 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map.
512 // CHECK1-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i8*** noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
513 // CHECK1-NEXT: entry:
514 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8
515 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8***, align 8
516 // CHECK1-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8
517 // CHECK1-NEXT: store i8*** [[TMP1]], i8**** [[DOTADDR1]], align 8
518 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8
519 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0
520 // CHECK1-NEXT: [[TMP4:%.*]] = load i8***, i8**** [[DOTADDR1]], align 8
521 // CHECK1-NEXT: store i8** [[TMP3]], i8*** [[TMP4]], align 8
522 // CHECK1-NEXT: ret void
523 //
524 //
525 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry.
526 // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR3]] {
527 // CHECK1-NEXT: entry:
528 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
529 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8
530 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8
531 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8
532 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8
533 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8
534 // CHECK1-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca i8**, align 8
535 // CHECK1-NEXT: [[TMP_I:%.*]] = alloca i8**, align 8
536 // CHECK1-NEXT: [[TMP4_I:%.*]] = alloca i8*, align 8
537 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
538 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8
539 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4
540 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
541 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4
542 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8
543 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0
544 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2
545 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0
546 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
547 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon*
548 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 1
549 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8*
550 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8*
551 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
552 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
553 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
554 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
555 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !12
556 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !12
557 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !12
558 // CHECK1-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i8***)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !12
559 // CHECK1-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !12
560 // CHECK1-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
561 // CHECK1-NEXT: [[TMP12:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !12
562 // CHECK1-NEXT: [[TMP13:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !12
563 // CHECK1-NEXT: [[TMP14:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !12
564 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast void (i8*, ...)* [[TMP13]] to void (i8*, i8***)*
565 // CHECK1-NEXT: call void [[TMP15]](i8* [[TMP14]], i8*** [[DOTFIRSTPRIV_PTR_ADDR_I]]) #[[ATTR5]]
566 // CHECK1-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !12
567 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP12]], i32 0, i32 1
568 // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[TMP17]], align 8
569 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP16]], align 8
570 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !12
571 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i32* [[TMP18]] to i8*
572 // CHECK1-NEXT: [[TMP22:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP19]], i8* [[TMP21]])
573 // CHECK1-NEXT: [[CONV_I:%.*]] = bitcast i8* [[TMP22]] to i32*
574 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
575 // CHECK1-NEXT: [[TMP24:%.*]] = load i8**, i8*** [[TMP23]], align 8
576 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8
577 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 1
578 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8
579 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
580 // CHECK1-NEXT: [[TMP29:%.*]] = sext i32 [[TMP28]] to i64
581 // CHECK1-NEXT: [[LB_ADD_LEN_I:%.*]] = add nsw i64 -1, [[TMP29]]
582 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
583 // CHECK1-NEXT: [[TMP31:%.*]] = load i8**, i8*** [[TMP30]], align 8
584 // CHECK1-NEXT: [[ARRAYIDX2_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP31]], i64 9
585 // CHECK1-NEXT: [[TMP32:%.*]] = load i8*, i8** [[ARRAYIDX2_I]], align 8
586 // CHECK1-NEXT: [[ARRAYIDX3_I:%.*]] = getelementptr inbounds i8, i8* [[TMP32]], i64 [[LB_ADD_LEN_I]]
587 // CHECK1-NEXT: [[TMP33:%.*]] = ptrtoint i8* [[ARRAYIDX3_I]] to i64
588 // CHECK1-NEXT: [[TMP34:%.*]] = ptrtoint i8* [[TMP25]] to i64
589 // CHECK1-NEXT: [[TMP35:%.*]] = sub i64 [[TMP33]], [[TMP34]]
590 // CHECK1-NEXT: [[TMP36:%.*]] = sdiv exact i64 [[TMP35]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
591 // CHECK1-NEXT: [[TMP37:%.*]] = add nuw i64 [[TMP36]], 1
592 // CHECK1-NEXT: [[TMP38:%.*]] = mul nuw i64 [[TMP37]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
593 // CHECK1-NEXT: store i64 [[TMP37]], i64* @{{reduction_size[.].+[.]}}, align 8, !noalias !12
594 // CHECK1-NEXT: [[TMP39:%.*]] = load i8*, i8** [[TMP16]], align 8
595 // CHECK1-NEXT: [[TMP40:%.*]] = call i8* @__kmpc_task_reduction_get_th_data(i32 [[TMP20]], i8* [[TMP39]], i8* [[TMP25]])
596 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP12]], i32 0, i32 2
597 // CHECK1-NEXT: [[TMP42:%.*]] = load i8**, i8*** [[TMP41]], align 8
598 // CHECK1-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8
599 // CHECK1-NEXT: [[TMP44:%.*]] = ptrtoint i8* [[TMP43]] to i64
600 // CHECK1-NEXT: [[TMP45:%.*]] = ptrtoint i8* [[TMP25]] to i64
601 // CHECK1-NEXT: [[TMP46:%.*]] = sub i64 [[TMP44]], [[TMP45]]
602 // CHECK1-NEXT: [[TMP47:%.*]] = sdiv exact i64 [[TMP46]], ptrtoint (i8* getelementptr (i8, i8* null, i32 1) to i64)
603 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr i8, i8* [[TMP40]], i64 [[TMP47]]
604 // CHECK1-NEXT: store i8** [[TMP4_I]], i8*** [[TMP_I]], align 8, !noalias !12
605 // CHECK1-NEXT: store i8* [[TMP48]], i8** [[TMP4_I]], align 8, !noalias !12
606 // CHECK1-NEXT: ret i32 0
607 //
608 //
609 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
610 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
611 // CHECK1-NEXT: entry:
612 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
613 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
614 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
615 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
616 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
617 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [3 x i8*]*
618 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
619 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [3 x i8*]*
620 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 0
621 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
622 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
623 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 0
624 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
625 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
626 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP5]], i64 0, i64 1
627 // CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
628 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 1
629 // CHECK1-NEXT: [[TMP15:%.*]] = load i8*, i8** [[TMP14]], align 8
630 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[TMP3]], i64 0, i64 2
631 // CHECK1-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8
632 // CHECK1-NEXT: [[TMP18:%.*]] = ptrtoint i8* [[TMP17]] to i64
633 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP11]], align 4
634 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP8]], align 4
635 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
636 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
637 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i8, i8* [[TMP15]], i64 [[TMP18]]
638 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i8* [[TMP15]], [[TMP21]]
639 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE5:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
640 // CHECK1: omp.arraycpy.body:
641 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi i8* [ [[TMP13]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
642 // CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi i8* [ [[TMP15]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
643 // CHECK1-NEXT: [[TMP22:%.*]] = load i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1
644 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP22]] to i32
645 // CHECK1-NEXT: [[TMP23:%.*]] = load i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 1
646 // CHECK1-NEXT: [[CONV2:%.*]] = sext i8 [[TMP23]] to i32
647 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
648 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i32 [[ADD3]] to i8
649 // CHECK1-NEXT: store i8 [[CONV4]], i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 1
650 // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i8, i8* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
651 // CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i8, i8* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
652 // CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq i8* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP21]]
653 // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_BODY]]
654 // CHECK1: omp.arraycpy.done5:
655 // CHECK1-NEXT: ret void
656 //
657