1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 13 14 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 17 18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9 19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9 21 22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13 27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 29 30 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 31 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 32 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 33 34 // expected-no-diagnostics 35 #ifndef HEADER 36 #define HEADER 37 38 typedef __INTPTR_TYPE__ intptr_t; 39 40 41 void foo(); 42 43 struct S { 44 intptr_t a, b, c; 45 S(intptr_t a) : a(a) {} 46 operator char() { extern void mayThrow(); mayThrow(); return a; } 47 ~S() {} 48 }; 49 50 template <typename T, int C> 51 int tmain() { 52 #pragma omp target 53 #pragma omp teams 54 #pragma omp distribute parallel for num_threads(C) 55 for (int i = 0; i < 100; i++) 56 foo(); 57 #pragma omp target 58 #pragma omp teams 59 #pragma omp distribute parallel for num_threads(T(23)) 60 for (int i = 0; i < 100; i++) 61 foo(); 62 return 0; 63 } 64 65 int main() { 66 S s(0); 67 char a = s; 68 #pragma omp target 69 #pragma omp teams 70 #pragma omp distribute parallel for num_threads(2) 71 for (int i = 0; i < 100; i++) { 72 foo(); 73 } 74 #pragma omp target 75 #pragma omp teams 76 77 #pragma omp distribute parallel for num_threads(a) 78 for (int i = 0; i < 100; i++) { 79 foo(); 80 } 81 return a + tmain<char, 5>() + tmain<S, 1>(); 82 } 83 84 // tmain 5 85 86 // tmain 1 87 88 89 90 91 92 93 94 95 #endif 96 // CHECK1-LABEL: define {{[^@]+}}@main 97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 98 // CHECK1-NEXT: entry: 99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 100 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 101 // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1 102 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 103 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 105 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 106 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 107 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 108 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 109 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 110 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 111 // CHECK1-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0) 112 // CHECK1-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) 113 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 114 // CHECK1: invoke.cont: 115 // CHECK1-NEXT: store i8 [[CALL]], i8* [[A]], align 1 116 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 117 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 118 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 119 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 120 // CHECK1: omp_offload.failed: 121 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 122 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 123 // CHECK1: lpad: 124 // CHECK1-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 125 // CHECK1-NEXT: cleanup 126 // CHECK1-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 127 // CHECK1-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 128 // CHECK1-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 129 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 130 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 131 // CHECK1-NEXT: br label [[EH_RESUME:%.*]] 132 // CHECK1: omp_offload.cont: 133 // CHECK1-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 134 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 135 // CHECK1-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 136 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 137 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 138 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 139 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 140 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 141 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 142 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 143 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 144 // CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8 145 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 146 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 147 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 148 // CHECK1-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 149 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 150 // CHECK1-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 151 // CHECK1: omp_offload.failed2: 152 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 153 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 154 // CHECK1: omp_offload.cont3: 155 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 156 // CHECK1-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 157 // CHECK1-NEXT: [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv() 158 // CHECK1-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 159 // CHECK1: invoke.cont5: 160 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 161 // CHECK1-NEXT: [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv() 162 // CHECK1-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 163 // CHECK1: invoke.cont7: 164 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 165 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 166 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 167 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 168 // CHECK1-NEXT: ret i32 [[TMP17]] 169 // CHECK1: eh.resume: 170 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 171 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 172 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 173 // CHECK1-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 174 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 175 // 176 // 177 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El 178 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 179 // CHECK1-NEXT: entry: 180 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 181 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 182 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 183 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 184 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 185 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 186 // CHECK1-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]]) 187 // CHECK1-NEXT: ret void 188 // 189 // 190 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv 191 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 192 // CHECK1-NEXT: entry: 193 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 194 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 195 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 196 // CHECK1-NEXT: call void @_Z8mayThrowv() 197 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 198 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 199 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 200 // CHECK1-NEXT: ret i8 [[CONV]] 201 // 202 // 203 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 204 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 205 // CHECK1-NEXT: entry: 206 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 207 // CHECK1-NEXT: ret void 208 // 209 // 210 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 211 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 212 // CHECK1-NEXT: entry: 213 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 214 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 215 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 216 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 217 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 218 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 219 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 220 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 221 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 222 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 223 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 224 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 225 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 226 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 227 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 228 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 229 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 230 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 231 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 232 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 233 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 234 // CHECK1: cond.true: 235 // CHECK1-NEXT: br label [[COND_END:%.*]] 236 // CHECK1: cond.false: 237 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 238 // CHECK1-NEXT: br label [[COND_END]] 239 // CHECK1: cond.end: 240 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 241 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 242 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 243 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 244 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 245 // CHECK1: omp.inner.for.cond: 246 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 247 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 248 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 249 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 250 // CHECK1: omp.inner.for.body: 251 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 252 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 253 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 254 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 255 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 256 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 257 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 258 // CHECK1: omp.inner.for.inc: 259 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 260 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 261 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 262 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 263 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 264 // CHECK1: omp.inner.for.end: 265 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 266 // CHECK1: omp.loop.exit: 267 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 268 // CHECK1-NEXT: ret void 269 // 270 // 271 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 272 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 275 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 276 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 277 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 278 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 279 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 280 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 281 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 282 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 283 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 284 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 285 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 286 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 287 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 288 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 289 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 290 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 291 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 292 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 293 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 294 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 295 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 296 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 297 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 298 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 299 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 300 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 301 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 302 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 303 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 304 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 305 // CHECK1: cond.true: 306 // CHECK1-NEXT: br label [[COND_END:%.*]] 307 // CHECK1: cond.false: 308 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 309 // CHECK1-NEXT: br label [[COND_END]] 310 // CHECK1: cond.end: 311 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 312 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 313 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 314 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 315 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 316 // CHECK1: omp.inner.for.cond: 317 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 318 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 319 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 320 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 321 // CHECK1: omp.inner.for.body: 322 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 323 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 324 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 325 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 326 // CHECK1-NEXT: invoke void @_Z3foov() 327 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 328 // CHECK1: invoke.cont: 329 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 330 // CHECK1: omp.body.continue: 331 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 332 // CHECK1: omp.inner.for.inc: 333 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 334 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 335 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 336 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 337 // CHECK1: omp.inner.for.end: 338 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 339 // CHECK1: omp.loop.exit: 340 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 341 // CHECK1-NEXT: ret void 342 // CHECK1: terminate.lpad: 343 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 344 // CHECK1-NEXT: catch i8* null 345 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 346 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 347 // CHECK1-NEXT: unreachable 348 // 349 // 350 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate 351 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 352 // CHECK1-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 353 // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 354 // CHECK1-NEXT: unreachable 355 // 356 // 357 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 358 // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { 359 // CHECK1-NEXT: entry: 360 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 361 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 362 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 363 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 364 // CHECK1-NEXT: ret void 365 // 366 // 367 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 368 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 369 // CHECK1-NEXT: entry: 370 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 371 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 372 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 373 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 374 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 375 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 376 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 377 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 378 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 379 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 380 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 381 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 382 // CHECK1-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 383 // CHECK1-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 384 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 385 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 386 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 387 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 388 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 389 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 390 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 391 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 392 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 393 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 394 // CHECK1: cond.true: 395 // CHECK1-NEXT: br label [[COND_END:%.*]] 396 // CHECK1: cond.false: 397 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 398 // CHECK1-NEXT: br label [[COND_END]] 399 // CHECK1: cond.end: 400 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 401 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 402 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 403 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 404 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 405 // CHECK1: omp.inner.for.cond: 406 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 407 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 408 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 409 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 410 // CHECK1: omp.inner.for.body: 411 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 412 // CHECK1-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 413 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 414 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 415 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 416 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 417 // CHECK1-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 418 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 419 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 420 // CHECK1: omp.inner.for.inc: 421 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 422 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 423 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 424 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 425 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 426 // CHECK1: omp.inner.for.end: 427 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 428 // CHECK1: omp.loop.exit: 429 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 430 // CHECK1-NEXT: ret void 431 // 432 // 433 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 434 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 435 // CHECK1-NEXT: entry: 436 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 437 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 438 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 439 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 440 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 441 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 442 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 443 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 444 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 445 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 446 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 447 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 448 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 449 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 450 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 451 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 452 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 453 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 454 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 455 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 456 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 457 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 458 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 459 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 460 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 461 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 462 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 463 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 464 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 465 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 466 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 467 // CHECK1: cond.true: 468 // CHECK1-NEXT: br label [[COND_END:%.*]] 469 // CHECK1: cond.false: 470 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 471 // CHECK1-NEXT: br label [[COND_END]] 472 // CHECK1: cond.end: 473 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 474 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 475 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 476 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 477 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 478 // CHECK1: omp.inner.for.cond: 479 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 480 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 481 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 482 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 483 // CHECK1: omp.inner.for.body: 484 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 485 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 486 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 487 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 488 // CHECK1-NEXT: invoke void @_Z3foov() 489 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 490 // CHECK1: invoke.cont: 491 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 492 // CHECK1: omp.body.continue: 493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 494 // CHECK1: omp.inner.for.inc: 495 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 496 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 497 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 498 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 499 // CHECK1: omp.inner.for.end: 500 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 501 // CHECK1: omp.loop.exit: 502 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 503 // CHECK1-NEXT: ret void 504 // CHECK1: terminate.lpad: 505 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 506 // CHECK1-NEXT: catch i8* null 507 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 508 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 509 // CHECK1-NEXT: unreachable 510 // 511 // 512 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 513 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat { 514 // CHECK1-NEXT: entry: 515 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 517 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 518 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 519 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 520 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 521 // CHECK1: omp_offload.failed: 522 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 523 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 524 // CHECK1: omp_offload.cont: 525 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 526 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 527 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 528 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 529 // CHECK1: omp_offload.failed2: 530 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 531 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 532 // CHECK1: omp_offload.cont3: 533 // CHECK1-NEXT: ret i32 0 534 // 535 // 536 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 537 // CHECK1-SAME: () #[[ATTR7]] comdat { 538 // CHECK1-NEXT: entry: 539 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 540 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 541 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 542 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 543 // CHECK1-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 544 // CHECK1-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 545 // CHECK1: omp_offload.failed: 546 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 547 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 548 // CHECK1: omp_offload.cont: 549 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 550 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 551 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 552 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 553 // CHECK1: omp_offload.failed2: 554 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 555 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT3]] 556 // CHECK1: omp_offload.cont3: 557 // CHECK1-NEXT: ret i32 0 558 // 559 // 560 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev 561 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 562 // CHECK1-NEXT: entry: 563 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 564 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 565 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 566 // CHECK1-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 567 // CHECK1-NEXT: ret void 568 // 569 // 570 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El 571 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 572 // CHECK1-NEXT: entry: 573 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 574 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 575 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 576 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 577 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 578 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 579 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 580 // CHECK1-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 581 // CHECK1-NEXT: ret void 582 // 583 // 584 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev 585 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 586 // CHECK1-NEXT: entry: 587 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 588 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 589 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 590 // CHECK1-NEXT: ret void 591 // 592 // 593 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 594 // CHECK1-SAME: () #[[ATTR3]] { 595 // CHECK1-NEXT: entry: 596 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 597 // CHECK1-NEXT: ret void 598 // 599 // 600 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 601 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 602 // CHECK1-NEXT: entry: 603 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 604 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 605 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 606 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 607 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 608 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 609 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 610 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 611 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 612 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 613 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 614 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 615 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 616 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 617 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 618 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 619 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 620 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 621 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 622 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 623 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 624 // CHECK1: cond.true: 625 // CHECK1-NEXT: br label [[COND_END:%.*]] 626 // CHECK1: cond.false: 627 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 628 // CHECK1-NEXT: br label [[COND_END]] 629 // CHECK1: cond.end: 630 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 631 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 632 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 633 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 634 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 635 // CHECK1: omp.inner.for.cond: 636 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 637 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 638 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 639 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 640 // CHECK1: omp.inner.for.body: 641 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 642 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 643 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 644 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 645 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 646 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 647 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 648 // CHECK1: omp.inner.for.inc: 649 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 650 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 651 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 652 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 653 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 654 // CHECK1: omp.inner.for.end: 655 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 656 // CHECK1: omp.loop.exit: 657 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 658 // CHECK1-NEXT: ret void 659 // 660 // 661 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 662 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 663 // CHECK1-NEXT: entry: 664 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 665 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 666 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 667 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 668 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 669 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 670 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 671 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 672 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 673 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 674 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 675 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 676 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 677 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 678 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 679 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 680 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 681 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 682 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 683 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 684 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 685 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 686 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 687 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 688 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 689 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 690 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 691 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 692 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 693 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 694 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 695 // CHECK1: cond.true: 696 // CHECK1-NEXT: br label [[COND_END:%.*]] 697 // CHECK1: cond.false: 698 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 699 // CHECK1-NEXT: br label [[COND_END]] 700 // CHECK1: cond.end: 701 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 702 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 703 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 704 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 705 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 706 // CHECK1: omp.inner.for.cond: 707 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 708 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 709 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 710 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 711 // CHECK1: omp.inner.for.body: 712 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 713 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 714 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 715 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 716 // CHECK1-NEXT: invoke void @_Z3foov() 717 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 718 // CHECK1: invoke.cont: 719 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 720 // CHECK1: omp.body.continue: 721 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 722 // CHECK1: omp.inner.for.inc: 723 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 724 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 725 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 726 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 727 // CHECK1: omp.inner.for.end: 728 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 729 // CHECK1: omp.loop.exit: 730 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 731 // CHECK1-NEXT: ret void 732 // CHECK1: terminate.lpad: 733 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 734 // CHECK1-NEXT: catch i8* null 735 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 736 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 737 // CHECK1-NEXT: unreachable 738 // 739 // 740 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 741 // CHECK1-SAME: () #[[ATTR3]] { 742 // CHECK1-NEXT: entry: 743 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 744 // CHECK1-NEXT: ret void 745 // 746 // 747 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 748 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 749 // CHECK1-NEXT: entry: 750 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 751 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 752 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 753 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 754 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 755 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 756 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 757 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 758 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 759 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 760 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 761 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 762 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 763 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 764 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 765 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 766 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 767 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 768 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 769 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 770 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 771 // CHECK1: cond.true: 772 // CHECK1-NEXT: br label [[COND_END:%.*]] 773 // CHECK1: cond.false: 774 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 775 // CHECK1-NEXT: br label [[COND_END]] 776 // CHECK1: cond.end: 777 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 778 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 779 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 780 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 781 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 782 // CHECK1: omp.inner.for.cond: 783 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 784 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 785 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 786 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 787 // CHECK1: omp.inner.for.body: 788 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 789 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 790 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 791 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 792 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 793 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 794 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 795 // CHECK1: omp.inner.for.inc: 796 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 797 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 798 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 799 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 800 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 801 // CHECK1: omp.inner.for.end: 802 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 803 // CHECK1: omp.loop.exit: 804 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 805 // CHECK1-NEXT: ret void 806 // 807 // 808 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 809 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 810 // CHECK1-NEXT: entry: 811 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 812 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 813 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 814 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 815 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 816 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 817 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 818 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 819 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 820 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 821 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 822 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 823 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 824 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 825 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 826 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 827 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 828 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 829 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 830 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 831 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 832 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 833 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 834 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 835 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 836 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 837 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 838 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 839 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 840 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 841 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 842 // CHECK1: cond.true: 843 // CHECK1-NEXT: br label [[COND_END:%.*]] 844 // CHECK1: cond.false: 845 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 846 // CHECK1-NEXT: br label [[COND_END]] 847 // CHECK1: cond.end: 848 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 849 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 850 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 851 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 852 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 853 // CHECK1: omp.inner.for.cond: 854 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 855 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 856 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 857 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 858 // CHECK1: omp.inner.for.body: 859 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 860 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 861 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 862 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 863 // CHECK1-NEXT: invoke void @_Z3foov() 864 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 865 // CHECK1: invoke.cont: 866 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 867 // CHECK1: omp.body.continue: 868 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 869 // CHECK1: omp.inner.for.inc: 870 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 871 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 872 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 873 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 874 // CHECK1: omp.inner.for.end: 875 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 876 // CHECK1: omp.loop.exit: 877 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 878 // CHECK1-NEXT: ret void 879 // CHECK1: terminate.lpad: 880 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 881 // CHECK1-NEXT: catch i8* null 882 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 883 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 884 // CHECK1-NEXT: unreachable 885 // 886 // 887 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 888 // CHECK1-SAME: () #[[ATTR3]] { 889 // CHECK1-NEXT: entry: 890 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 891 // CHECK1-NEXT: ret void 892 // 893 // 894 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 895 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 896 // CHECK1-NEXT: entry: 897 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 898 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 899 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 900 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 901 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 902 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 903 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 904 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 905 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 906 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 907 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 908 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 909 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 910 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 911 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 912 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 913 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 914 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 915 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 916 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 917 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 918 // CHECK1: cond.true: 919 // CHECK1-NEXT: br label [[COND_END:%.*]] 920 // CHECK1: cond.false: 921 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 922 // CHECK1-NEXT: br label [[COND_END]] 923 // CHECK1: cond.end: 924 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 925 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 926 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 927 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 928 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 929 // CHECK1: omp.inner.for.cond: 930 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 931 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 932 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 933 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 934 // CHECK1: omp.inner.for.body: 935 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 936 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 937 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 938 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 939 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 940 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 941 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 942 // CHECK1: omp.inner.for.inc: 943 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 944 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 945 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 946 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 947 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 948 // CHECK1: omp.inner.for.end: 949 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 950 // CHECK1: omp.loop.exit: 951 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 952 // CHECK1-NEXT: ret void 953 // 954 // 955 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9 956 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 957 // CHECK1-NEXT: entry: 958 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 959 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 960 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 961 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 962 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 963 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 964 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 965 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 966 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 967 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 968 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 969 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 970 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 971 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 972 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 973 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 974 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 975 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 976 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 977 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 978 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 979 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 980 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 981 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 982 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 983 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 984 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 985 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 986 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 987 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 988 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 989 // CHECK1: cond.true: 990 // CHECK1-NEXT: br label [[COND_END:%.*]] 991 // CHECK1: cond.false: 992 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 993 // CHECK1-NEXT: br label [[COND_END]] 994 // CHECK1: cond.end: 995 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 996 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 997 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 998 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 999 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1000 // CHECK1: omp.inner.for.cond: 1001 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1002 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1003 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1004 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1005 // CHECK1: omp.inner.for.body: 1006 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1007 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1008 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1009 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1010 // CHECK1-NEXT: invoke void @_Z3foov() 1011 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1012 // CHECK1: invoke.cont: 1013 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1014 // CHECK1: omp.body.continue: 1015 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1016 // CHECK1: omp.inner.for.inc: 1017 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1018 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1019 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1020 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1021 // CHECK1: omp.inner.for.end: 1022 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1023 // CHECK1: omp.loop.exit: 1024 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1025 // CHECK1-NEXT: ret void 1026 // CHECK1: terminate.lpad: 1027 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1028 // CHECK1-NEXT: catch i8* null 1029 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1030 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1031 // CHECK1-NEXT: unreachable 1032 // 1033 // 1034 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 1035 // CHECK1-SAME: () #[[ATTR3]] { 1036 // CHECK1-NEXT: entry: 1037 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 1038 // CHECK1-NEXT: ret void 1039 // 1040 // 1041 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 1042 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1043 // CHECK1-NEXT: entry: 1044 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1045 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1046 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1047 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1048 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1049 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1050 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 1054 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1055 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1056 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1057 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1058 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1059 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1060 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1061 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1062 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1063 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1064 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1065 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1066 // CHECK1: cond.true: 1067 // CHECK1-NEXT: br label [[COND_END:%.*]] 1068 // CHECK1: cond.false: 1069 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1070 // CHECK1-NEXT: br label [[COND_END]] 1071 // CHECK1: cond.end: 1072 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1073 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1074 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1075 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1076 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1077 // CHECK1: omp.inner.for.cond: 1078 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1079 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1080 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1081 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1082 // CHECK1: omp.inner.for.body: 1083 // CHECK1-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23) 1084 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1085 // CHECK1: invoke.cont: 1086 // CHECK1-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 1087 // CHECK1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]] 1088 // CHECK1: invoke.cont2: 1089 // CHECK1-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 1090 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 1091 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 1092 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1093 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1094 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1095 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1096 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 1097 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1098 // CHECK1: omp.inner.for.inc: 1099 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1100 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1101 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1102 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1103 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1104 // CHECK1: omp.inner.for.end: 1105 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1106 // CHECK1: omp.loop.exit: 1107 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1108 // CHECK1-NEXT: ret void 1109 // CHECK1: terminate.lpad: 1110 // CHECK1-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 1111 // CHECK1-NEXT: catch i8* null 1112 // CHECK1-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 1113 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]] 1114 // CHECK1-NEXT: unreachable 1115 // 1116 // 1117 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 1118 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1119 // CHECK1-NEXT: entry: 1120 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1121 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1122 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1123 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1124 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1125 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1126 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1127 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1128 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1129 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1130 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1131 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1132 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1133 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1134 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1135 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1136 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1137 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1138 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1139 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1140 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1141 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1142 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1143 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1144 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1145 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1146 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1147 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1148 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1149 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1150 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1151 // CHECK1: cond.true: 1152 // CHECK1-NEXT: br label [[COND_END:%.*]] 1153 // CHECK1: cond.false: 1154 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1155 // CHECK1-NEXT: br label [[COND_END]] 1156 // CHECK1: cond.end: 1157 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1158 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1159 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1160 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1161 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1162 // CHECK1: omp.inner.for.cond: 1163 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1164 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1165 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1166 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1167 // CHECK1: omp.inner.for.body: 1168 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1169 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1170 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1171 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1172 // CHECK1-NEXT: invoke void @_Z3foov() 1173 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1174 // CHECK1: invoke.cont: 1175 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1176 // CHECK1: omp.body.continue: 1177 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1178 // CHECK1: omp.inner.for.inc: 1179 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1180 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1181 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1182 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1183 // CHECK1: omp.inner.for.end: 1184 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1185 // CHECK1: omp.loop.exit: 1186 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1187 // CHECK1-NEXT: ret void 1188 // CHECK1: terminate.lpad: 1189 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1190 // CHECK1-NEXT: catch i8* null 1191 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1192 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1193 // CHECK1-NEXT: unreachable 1194 // 1195 // 1196 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1197 // CHECK1-SAME: () #[[ATTR9:[0-9]+]] { 1198 // CHECK1-NEXT: entry: 1199 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1200 // CHECK1-NEXT: ret void 1201 // 1202 // 1203 // CHECK5-LABEL: define {{[^@]+}}@main 1204 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1205 // CHECK5-NEXT: entry: 1206 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1207 // CHECK5-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 1208 // CHECK5-NEXT: [[A:%.*]] = alloca i8, align 1 1209 // CHECK5-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 1210 // CHECK5-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 1211 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1212 // CHECK5-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 1213 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1214 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1215 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1216 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1217 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 1218 // CHECK5-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0) 1219 // CHECK5-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) 1220 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 1221 // CHECK5: invoke.cont: 1222 // CHECK5-NEXT: store i8 [[CALL]], i8* [[A]], align 1 1223 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 1224 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1225 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1226 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1227 // CHECK5: omp_offload.failed: 1228 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 1229 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 1230 // CHECK5: lpad: 1231 // CHECK5-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 1232 // CHECK5-NEXT: cleanup 1233 // CHECK5-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 1234 // CHECK5-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 1235 // CHECK5-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 1236 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 1237 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 1238 // CHECK5-NEXT: br label [[EH_RESUME:%.*]] 1239 // CHECK5: omp_offload.cont: 1240 // CHECK5-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 1241 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 1242 // CHECK5-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 1243 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 1244 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1245 // CHECK5-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 1246 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 1247 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1248 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 1249 // CHECK5-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 1250 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1251 // CHECK5-NEXT: store i8* null, i8** [[TMP11]], align 8 1252 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1253 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1254 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1255 // CHECK5-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1256 // CHECK5-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 1257 // CHECK5-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1258 // CHECK5: omp_offload.failed2: 1259 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 1260 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1261 // CHECK5: omp_offload.cont3: 1262 // CHECK5-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 1263 // CHECK5-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 1264 // CHECK5-NEXT: [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv() 1265 // CHECK5-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 1266 // CHECK5: invoke.cont5: 1267 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 1268 // CHECK5-NEXT: [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv() 1269 // CHECK5-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 1270 // CHECK5: invoke.cont7: 1271 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 1272 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 1273 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 1274 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 1275 // CHECK5-NEXT: ret i32 [[TMP17]] 1276 // CHECK5: eh.resume: 1277 // CHECK5-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 1278 // CHECK5-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 1279 // CHECK5-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 1280 // CHECK5-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 1281 // CHECK5-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 1282 // 1283 // 1284 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El 1285 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 1286 // CHECK5-NEXT: entry: 1287 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1288 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1289 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1290 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1291 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1292 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 1293 // CHECK5-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]]) 1294 // CHECK5-NEXT: ret void 1295 // 1296 // 1297 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv 1298 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 1299 // CHECK5-NEXT: entry: 1300 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1301 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1302 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1303 // CHECK5-NEXT: call void @_Z8mayThrowv() 1304 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1305 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 1306 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 1307 // CHECK5-NEXT: ret i8 [[CONV]] 1308 // 1309 // 1310 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 1311 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 1312 // CHECK5-NEXT: entry: 1313 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 1314 // CHECK5-NEXT: ret void 1315 // 1316 // 1317 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 1318 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1319 // CHECK5-NEXT: entry: 1320 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1321 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1322 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1323 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1324 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1325 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1326 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1327 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1328 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1329 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1330 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1331 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1332 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1333 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1334 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1335 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1336 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1337 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1338 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1339 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1340 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1341 // CHECK5: cond.true: 1342 // CHECK5-NEXT: br label [[COND_END:%.*]] 1343 // CHECK5: cond.false: 1344 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1345 // CHECK5-NEXT: br label [[COND_END]] 1346 // CHECK5: cond.end: 1347 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1348 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1349 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1350 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1351 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1352 // CHECK5: omp.inner.for.cond: 1353 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1354 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1355 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1356 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1357 // CHECK5: omp.inner.for.body: 1358 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 1359 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1360 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1361 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1362 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1363 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1364 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1365 // CHECK5: omp.inner.for.inc: 1366 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1367 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1368 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1369 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1370 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1371 // CHECK5: omp.inner.for.end: 1372 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1373 // CHECK5: omp.loop.exit: 1374 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1375 // CHECK5-NEXT: ret void 1376 // 1377 // 1378 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 1379 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1380 // CHECK5-NEXT: entry: 1381 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1382 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1383 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1384 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1385 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1386 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1387 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1388 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1389 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1390 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1391 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1392 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1393 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1394 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1395 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1396 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1397 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1398 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1399 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1400 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1401 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1402 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1403 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1404 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1405 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1406 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1407 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1408 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1409 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1410 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1411 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1412 // CHECK5: cond.true: 1413 // CHECK5-NEXT: br label [[COND_END:%.*]] 1414 // CHECK5: cond.false: 1415 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1416 // CHECK5-NEXT: br label [[COND_END]] 1417 // CHECK5: cond.end: 1418 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1419 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1420 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1421 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1422 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1423 // CHECK5: omp.inner.for.cond: 1424 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1425 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1426 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1427 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1428 // CHECK5: omp.inner.for.body: 1429 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1430 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1431 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1432 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1433 // CHECK5-NEXT: invoke void @_Z3foov() 1434 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1435 // CHECK5: invoke.cont: 1436 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1437 // CHECK5: omp.body.continue: 1438 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1439 // CHECK5: omp.inner.for.inc: 1440 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1441 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1442 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1443 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1444 // CHECK5: omp.inner.for.end: 1445 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1446 // CHECK5: omp.loop.exit: 1447 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1448 // CHECK5-NEXT: ret void 1449 // CHECK5: terminate.lpad: 1450 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1451 // CHECK5-NEXT: catch i8* null 1452 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1453 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 1454 // CHECK5-NEXT: unreachable 1455 // 1456 // 1457 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate 1458 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 1459 // CHECK5-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 1460 // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 1461 // CHECK5-NEXT: unreachable 1462 // 1463 // 1464 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 1465 // CHECK5-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { 1466 // CHECK5-NEXT: entry: 1467 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1468 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1469 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 1470 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 1471 // CHECK5-NEXT: ret void 1472 // 1473 // 1474 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 1475 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 1476 // CHECK5-NEXT: entry: 1477 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1478 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1479 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 1480 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1481 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1482 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1483 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1484 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1485 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1486 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1487 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1488 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1489 // CHECK5-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 1490 // CHECK5-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 1491 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1492 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1493 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1494 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1495 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1496 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1497 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1498 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1499 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 1500 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1501 // CHECK5: cond.true: 1502 // CHECK5-NEXT: br label [[COND_END:%.*]] 1503 // CHECK5: cond.false: 1504 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1505 // CHECK5-NEXT: br label [[COND_END]] 1506 // CHECK5: cond.end: 1507 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1508 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1509 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1510 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1511 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1512 // CHECK5: omp.inner.for.cond: 1513 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1514 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1515 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1516 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1517 // CHECK5: omp.inner.for.body: 1518 // CHECK5-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 1519 // CHECK5-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 1520 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 1521 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1522 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1523 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1524 // CHECK5-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 1525 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 1526 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1527 // CHECK5: omp.inner.for.inc: 1528 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1529 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1530 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 1531 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1532 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1533 // CHECK5: omp.inner.for.end: 1534 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1535 // CHECK5: omp.loop.exit: 1536 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1537 // CHECK5-NEXT: ret void 1538 // 1539 // 1540 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 1541 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1542 // CHECK5-NEXT: entry: 1543 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1544 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1545 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1546 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1547 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1548 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1549 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1550 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1551 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1552 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1553 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1554 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1555 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1556 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1557 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1558 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1559 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1560 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1561 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1562 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1563 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1564 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1565 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1566 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1567 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1568 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1569 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1570 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1571 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1572 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1573 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1574 // CHECK5: cond.true: 1575 // CHECK5-NEXT: br label [[COND_END:%.*]] 1576 // CHECK5: cond.false: 1577 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1578 // CHECK5-NEXT: br label [[COND_END]] 1579 // CHECK5: cond.end: 1580 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1581 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1582 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1583 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1584 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1585 // CHECK5: omp.inner.for.cond: 1586 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1587 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1588 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1589 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1590 // CHECK5: omp.inner.for.body: 1591 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1592 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1593 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1594 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1595 // CHECK5-NEXT: invoke void @_Z3foov() 1596 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1597 // CHECK5: invoke.cont: 1598 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1599 // CHECK5: omp.body.continue: 1600 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1601 // CHECK5: omp.inner.for.inc: 1602 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1603 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1604 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1605 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1606 // CHECK5: omp.inner.for.end: 1607 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1608 // CHECK5: omp.loop.exit: 1609 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1610 // CHECK5-NEXT: ret void 1611 // CHECK5: terminate.lpad: 1612 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1613 // CHECK5-NEXT: catch i8* null 1614 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1615 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1616 // CHECK5-NEXT: unreachable 1617 // 1618 // 1619 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 1620 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat { 1621 // CHECK5-NEXT: entry: 1622 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1623 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1624 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1625 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1626 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1627 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1628 // CHECK5: omp_offload.failed: 1629 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 1630 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 1631 // CHECK5: omp_offload.cont: 1632 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1633 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1634 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1635 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1636 // CHECK5: omp_offload.failed2: 1637 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 1638 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1639 // CHECK5: omp_offload.cont3: 1640 // CHECK5-NEXT: ret i32 0 1641 // 1642 // 1643 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 1644 // CHECK5-SAME: () #[[ATTR7]] comdat { 1645 // CHECK5-NEXT: entry: 1646 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1647 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 1648 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1649 // CHECK5-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1650 // CHECK5-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 1651 // CHECK5-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1652 // CHECK5: omp_offload.failed: 1653 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 1654 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 1655 // CHECK5: omp_offload.cont: 1656 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 1657 // CHECK5-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 1658 // CHECK5-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1659 // CHECK5-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 1660 // CHECK5: omp_offload.failed2: 1661 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 1662 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT3]] 1663 // CHECK5: omp_offload.cont3: 1664 // CHECK5-NEXT: ret i32 0 1665 // 1666 // 1667 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev 1668 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 1669 // CHECK5-NEXT: entry: 1670 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1671 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1672 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1673 // CHECK5-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 1674 // CHECK5-NEXT: ret void 1675 // 1676 // 1677 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El 1678 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 1679 // CHECK5-NEXT: entry: 1680 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1681 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 1682 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1683 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 1684 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1685 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 1686 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 1687 // CHECK5-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 1688 // CHECK5-NEXT: ret void 1689 // 1690 // 1691 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 1692 // CHECK5-SAME: () #[[ATTR3]] { 1693 // CHECK5-NEXT: entry: 1694 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 1695 // CHECK5-NEXT: ret void 1696 // 1697 // 1698 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4 1699 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1700 // CHECK5-NEXT: entry: 1701 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1702 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1703 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1704 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1705 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1706 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1707 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1708 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1709 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1710 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1711 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1712 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1713 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1714 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1715 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1716 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1717 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1718 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1719 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1720 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1721 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1722 // CHECK5: cond.true: 1723 // CHECK5-NEXT: br label [[COND_END:%.*]] 1724 // CHECK5: cond.false: 1725 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1726 // CHECK5-NEXT: br label [[COND_END]] 1727 // CHECK5: cond.end: 1728 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1729 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1730 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1731 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1732 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1733 // CHECK5: omp.inner.for.cond: 1734 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1735 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1736 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1737 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1738 // CHECK5: omp.inner.for.body: 1739 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 1740 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1741 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1742 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1743 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1744 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1745 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1746 // CHECK5: omp.inner.for.inc: 1747 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1748 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1749 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1750 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1751 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1752 // CHECK5: omp.inner.for.end: 1753 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1754 // CHECK5: omp.loop.exit: 1755 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1756 // CHECK5-NEXT: ret void 1757 // 1758 // 1759 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5 1760 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1761 // CHECK5-NEXT: entry: 1762 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1763 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1764 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1765 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1766 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1767 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1768 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1769 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1770 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1771 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1772 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1773 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1774 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1775 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1776 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1777 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1778 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1779 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1780 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1781 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1782 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1783 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1784 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1785 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1786 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1787 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1788 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1789 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1790 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1791 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1792 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1793 // CHECK5: cond.true: 1794 // CHECK5-NEXT: br label [[COND_END:%.*]] 1795 // CHECK5: cond.false: 1796 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1797 // CHECK5-NEXT: br label [[COND_END]] 1798 // CHECK5: cond.end: 1799 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1800 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1801 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1802 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1803 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1804 // CHECK5: omp.inner.for.cond: 1805 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1806 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1807 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1808 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1809 // CHECK5: omp.inner.for.body: 1810 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1811 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1812 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1813 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1814 // CHECK5-NEXT: invoke void @_Z3foov() 1815 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1816 // CHECK5: invoke.cont: 1817 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1818 // CHECK5: omp.body.continue: 1819 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1820 // CHECK5: omp.inner.for.inc: 1821 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1822 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1823 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1824 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1825 // CHECK5: omp.inner.for.end: 1826 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1827 // CHECK5: omp.loop.exit: 1828 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1829 // CHECK5-NEXT: ret void 1830 // CHECK5: terminate.lpad: 1831 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1832 // CHECK5-NEXT: catch i8* null 1833 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1834 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1835 // CHECK5-NEXT: unreachable 1836 // 1837 // 1838 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 1839 // CHECK5-SAME: () #[[ATTR3]] { 1840 // CHECK5-NEXT: entry: 1841 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 1842 // CHECK5-NEXT: ret void 1843 // 1844 // 1845 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 1846 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1847 // CHECK5-NEXT: entry: 1848 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1849 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1850 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1851 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1852 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1853 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1854 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1855 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1856 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1857 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1858 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1859 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1860 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 1861 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1862 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1863 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1864 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1865 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1866 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1867 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 1868 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1869 // CHECK5: cond.true: 1870 // CHECK5-NEXT: br label [[COND_END:%.*]] 1871 // CHECK5: cond.false: 1872 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1873 // CHECK5-NEXT: br label [[COND_END]] 1874 // CHECK5: cond.end: 1875 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 1876 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1877 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1878 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 1879 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1880 // CHECK5: omp.inner.for.cond: 1881 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1882 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1883 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 1884 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1885 // CHECK5: omp.inner.for.body: 1886 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 1887 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1888 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 1889 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1890 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 1891 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 1892 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1893 // CHECK5: omp.inner.for.inc: 1894 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1895 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1896 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 1897 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1898 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1899 // CHECK5: omp.inner.for.end: 1900 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1901 // CHECK5: omp.loop.exit: 1902 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1903 // CHECK5-NEXT: ret void 1904 // 1905 // 1906 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 1907 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 1908 // CHECK5-NEXT: entry: 1909 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1910 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1911 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1912 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1913 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1914 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1915 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1916 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1917 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1918 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1919 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 1920 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1921 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1922 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1923 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1924 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1925 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 1926 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1927 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 1928 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1929 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 1930 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1931 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1932 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1933 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1934 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1935 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1936 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1937 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1938 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 1939 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1940 // CHECK5: cond.true: 1941 // CHECK5-NEXT: br label [[COND_END:%.*]] 1942 // CHECK5: cond.false: 1943 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1944 // CHECK5-NEXT: br label [[COND_END]] 1945 // CHECK5: cond.end: 1946 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 1947 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1948 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1949 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 1950 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1951 // CHECK5: omp.inner.for.cond: 1952 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1953 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1954 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 1955 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1956 // CHECK5: omp.inner.for.body: 1957 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1958 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 1959 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1960 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1961 // CHECK5-NEXT: invoke void @_Z3foov() 1962 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 1963 // CHECK5: invoke.cont: 1964 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1965 // CHECK5: omp.body.continue: 1966 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1967 // CHECK5: omp.inner.for.inc: 1968 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1969 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 1970 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1971 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 1972 // CHECK5: omp.inner.for.end: 1973 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1974 // CHECK5: omp.loop.exit: 1975 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1976 // CHECK5-NEXT: ret void 1977 // CHECK5: terminate.lpad: 1978 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 1979 // CHECK5-NEXT: catch i8* null 1980 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 1981 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 1982 // CHECK5-NEXT: unreachable 1983 // 1984 // 1985 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 1986 // CHECK5-SAME: () #[[ATTR3]] { 1987 // CHECK5-NEXT: entry: 1988 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 1989 // CHECK5-NEXT: ret void 1990 // 1991 // 1992 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8 1993 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 1994 // CHECK5-NEXT: entry: 1995 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1996 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1997 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1998 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 1999 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2000 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2001 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2002 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2003 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2004 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2005 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2006 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2007 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2008 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2009 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2010 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2011 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2012 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2013 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2014 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2015 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2016 // CHECK5: cond.true: 2017 // CHECK5-NEXT: br label [[COND_END:%.*]] 2018 // CHECK5: cond.false: 2019 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2020 // CHECK5-NEXT: br label [[COND_END]] 2021 // CHECK5: cond.end: 2022 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2023 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2024 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2025 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2026 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2027 // CHECK5: omp.inner.for.cond: 2028 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2029 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2030 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2031 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2032 // CHECK5: omp.inner.for.body: 2033 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 2034 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2035 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2036 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2037 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2038 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2039 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2040 // CHECK5: omp.inner.for.inc: 2041 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2042 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2043 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2044 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2045 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2046 // CHECK5: omp.inner.for.end: 2047 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2048 // CHECK5: omp.loop.exit: 2049 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2050 // CHECK5-NEXT: ret void 2051 // 2052 // 2053 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9 2054 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2055 // CHECK5-NEXT: entry: 2056 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2057 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2058 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2059 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2060 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2061 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2062 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2063 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2064 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2065 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2066 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2067 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2068 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2069 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2070 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2071 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2072 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2073 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2074 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2075 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2076 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2077 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2078 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2079 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2080 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2081 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2082 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2083 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2084 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2085 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2086 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2087 // CHECK5: cond.true: 2088 // CHECK5-NEXT: br label [[COND_END:%.*]] 2089 // CHECK5: cond.false: 2090 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2091 // CHECK5-NEXT: br label [[COND_END]] 2092 // CHECK5: cond.end: 2093 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2094 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2095 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2096 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2097 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2098 // CHECK5: omp.inner.for.cond: 2099 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2100 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2101 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2102 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2103 // CHECK5: omp.inner.for.body: 2104 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2105 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2106 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2107 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2108 // CHECK5-NEXT: invoke void @_Z3foov() 2109 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2110 // CHECK5: invoke.cont: 2111 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2112 // CHECK5: omp.body.continue: 2113 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2114 // CHECK5: omp.inner.for.inc: 2115 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2116 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2117 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2118 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2119 // CHECK5: omp.inner.for.end: 2120 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2121 // CHECK5: omp.loop.exit: 2122 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2123 // CHECK5-NEXT: ret void 2124 // CHECK5: terminate.lpad: 2125 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2126 // CHECK5-NEXT: catch i8* null 2127 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2128 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2129 // CHECK5-NEXT: unreachable 2130 // 2131 // 2132 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 2133 // CHECK5-SAME: () #[[ATTR3]] { 2134 // CHECK5-NEXT: entry: 2135 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 2136 // CHECK5-NEXT: ret void 2137 // 2138 // 2139 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 2140 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2141 // CHECK5-NEXT: entry: 2142 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2143 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2144 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2145 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2146 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2147 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2148 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2149 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2150 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2151 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2152 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2153 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2154 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2155 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2156 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2157 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2158 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2159 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2160 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2161 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2162 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2163 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2164 // CHECK5: cond.true: 2165 // CHECK5-NEXT: br label [[COND_END:%.*]] 2166 // CHECK5: cond.false: 2167 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2168 // CHECK5-NEXT: br label [[COND_END]] 2169 // CHECK5: cond.end: 2170 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2171 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2172 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2173 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2174 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2175 // CHECK5: omp.inner.for.cond: 2176 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2177 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2178 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2179 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2180 // CHECK5: omp.inner.for.body: 2181 // CHECK5-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23) 2182 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2183 // CHECK5: invoke.cont: 2184 // CHECK5-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 2185 // CHECK5-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]] 2186 // CHECK5: invoke.cont2: 2187 // CHECK5-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 2188 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 2189 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 2190 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2191 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2192 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2193 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2194 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 2195 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2196 // CHECK5: omp.inner.for.inc: 2197 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2198 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2199 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2200 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2201 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2202 // CHECK5: omp.inner.for.end: 2203 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2204 // CHECK5: omp.loop.exit: 2205 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2206 // CHECK5-NEXT: ret void 2207 // CHECK5: terminate.lpad: 2208 // CHECK5-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 2209 // CHECK5-NEXT: catch i8* null 2210 // CHECK5-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 2211 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]] 2212 // CHECK5-NEXT: unreachable 2213 // 2214 // 2215 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 2216 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2217 // CHECK5-NEXT: entry: 2218 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2219 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2220 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2221 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2222 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2223 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2224 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2225 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2226 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2227 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2228 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2229 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2230 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2231 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2232 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2233 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2234 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2235 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2236 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2237 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2238 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2239 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2240 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2241 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2242 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2243 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2244 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2245 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2246 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2247 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2248 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2249 // CHECK5: cond.true: 2250 // CHECK5-NEXT: br label [[COND_END:%.*]] 2251 // CHECK5: cond.false: 2252 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2253 // CHECK5-NEXT: br label [[COND_END]] 2254 // CHECK5: cond.end: 2255 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2256 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2257 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2258 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2259 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2260 // CHECK5: omp.inner.for.cond: 2261 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2262 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2263 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2264 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2265 // CHECK5: omp.inner.for.body: 2266 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2267 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2268 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2269 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2270 // CHECK5-NEXT: invoke void @_Z3foov() 2271 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2272 // CHECK5: invoke.cont: 2273 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2274 // CHECK5: omp.body.continue: 2275 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2276 // CHECK5: omp.inner.for.inc: 2277 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2278 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2279 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2280 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2281 // CHECK5: omp.inner.for.end: 2282 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2283 // CHECK5: omp.loop.exit: 2284 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2285 // CHECK5-NEXT: ret void 2286 // CHECK5: terminate.lpad: 2287 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2288 // CHECK5-NEXT: catch i8* null 2289 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2290 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2291 // CHECK5-NEXT: unreachable 2292 // 2293 // 2294 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev 2295 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 2296 // CHECK5-NEXT: entry: 2297 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2298 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2299 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2300 // CHECK5-NEXT: ret void 2301 // 2302 // 2303 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2304 // CHECK5-SAME: () #[[ATTR9:[0-9]+]] { 2305 // CHECK5-NEXT: entry: 2306 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) 2307 // CHECK5-NEXT: ret void 2308 // 2309 // 2310 // CHECK9-LABEL: define {{[^@]+}}@main 2311 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2312 // CHECK9-NEXT: entry: 2313 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2314 // CHECK9-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 2315 // CHECK9-NEXT: [[A:%.*]] = alloca i8, align 1 2316 // CHECK9-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 2317 // CHECK9-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 2318 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2319 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 2320 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2321 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2322 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2323 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2324 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2325 // CHECK9-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0) 2326 // CHECK9-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) 2327 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 2328 // CHECK9: invoke.cont: 2329 // CHECK9-NEXT: store i8 [[CALL]], i8* [[A]], align 1 2330 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 2331 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2332 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2333 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2334 // CHECK9: omp_offload.failed: 2335 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 2336 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2337 // CHECK9: lpad: 2338 // CHECK9-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 2339 // CHECK9-NEXT: cleanup 2340 // CHECK9-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 2341 // CHECK9-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 2342 // CHECK9-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 2343 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 2344 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 2345 // CHECK9-NEXT: br label [[EH_RESUME:%.*]] 2346 // CHECK9: omp_offload.cont: 2347 // CHECK9-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 2348 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 2349 // CHECK9-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 2350 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 2351 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2352 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 2353 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 2354 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2355 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 2356 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 2357 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2358 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8 2359 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2360 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2361 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2362 // CHECK9-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2363 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 2364 // CHECK9-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2365 // CHECK9: omp_offload.failed2: 2366 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 2367 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2368 // CHECK9: omp_offload.cont3: 2369 // CHECK9-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 2370 // CHECK9-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 2371 // CHECK9-NEXT: [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv() 2372 // CHECK9-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 2373 // CHECK9: invoke.cont5: 2374 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 2375 // CHECK9-NEXT: [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv() 2376 // CHECK9-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 2377 // CHECK9: invoke.cont7: 2378 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 2379 // CHECK9-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 2380 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 2381 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 2382 // CHECK9-NEXT: ret i32 [[TMP17]] 2383 // CHECK9: eh.resume: 2384 // CHECK9-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 2385 // CHECK9-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 2386 // CHECK9-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 2387 // CHECK9-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 2388 // CHECK9-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 2389 // 2390 // 2391 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El 2392 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 2393 // CHECK9-NEXT: entry: 2394 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2395 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2396 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2397 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2398 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2399 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2400 // CHECK9-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]]) 2401 // CHECK9-NEXT: ret void 2402 // 2403 // 2404 // CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv 2405 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 2406 // CHECK9-NEXT: entry: 2407 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2408 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2409 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2410 // CHECK9-NEXT: call void @_Z8mayThrowv() 2411 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2412 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 2413 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 2414 // CHECK9-NEXT: ret i8 [[CONV]] 2415 // 2416 // 2417 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 2418 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] { 2419 // CHECK9-NEXT: entry: 2420 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 2421 // CHECK9-NEXT: ret void 2422 // 2423 // 2424 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 2425 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2426 // CHECK9-NEXT: entry: 2427 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2428 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2429 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2430 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2431 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2432 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2433 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2434 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2435 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2436 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2437 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2438 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2439 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2440 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2441 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2442 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2443 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2444 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2445 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2446 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2447 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2448 // CHECK9: cond.true: 2449 // CHECK9-NEXT: br label [[COND_END:%.*]] 2450 // CHECK9: cond.false: 2451 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2452 // CHECK9-NEXT: br label [[COND_END]] 2453 // CHECK9: cond.end: 2454 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2455 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2456 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2457 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2458 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2459 // CHECK9: omp.inner.for.cond: 2460 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2461 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2462 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2463 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2464 // CHECK9: omp.inner.for.body: 2465 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 2466 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2467 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2468 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2469 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2470 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2471 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2472 // CHECK9: omp.inner.for.inc: 2473 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2474 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2475 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2476 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2477 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2478 // CHECK9: omp.inner.for.end: 2479 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2480 // CHECK9: omp.loop.exit: 2481 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2482 // CHECK9-NEXT: ret void 2483 // 2484 // 2485 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2486 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2487 // CHECK9-NEXT: entry: 2488 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2489 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2490 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2491 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2492 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2493 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2494 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2495 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2496 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2497 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2498 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2499 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2500 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2501 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2502 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2503 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2504 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2505 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2506 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2507 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2508 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2509 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2510 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2511 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2512 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2513 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2514 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2515 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2516 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2517 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2518 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2519 // CHECK9: cond.true: 2520 // CHECK9-NEXT: br label [[COND_END:%.*]] 2521 // CHECK9: cond.false: 2522 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2523 // CHECK9-NEXT: br label [[COND_END]] 2524 // CHECK9: cond.end: 2525 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2526 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2527 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2528 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2529 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2530 // CHECK9: omp.inner.for.cond: 2531 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2532 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2533 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2534 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2535 // CHECK9: omp.inner.for.body: 2536 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2537 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2538 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2539 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2540 // CHECK9-NEXT: invoke void @_Z3foov() 2541 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2542 // CHECK9: invoke.cont: 2543 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2544 // CHECK9: omp.body.continue: 2545 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2546 // CHECK9: omp.inner.for.inc: 2547 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2548 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2549 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2550 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2551 // CHECK9: omp.inner.for.end: 2552 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2553 // CHECK9: omp.loop.exit: 2554 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2555 // CHECK9-NEXT: ret void 2556 // CHECK9: terminate.lpad: 2557 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2558 // CHECK9-NEXT: catch i8* null 2559 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2560 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 2561 // CHECK9-NEXT: unreachable 2562 // 2563 // 2564 // CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate 2565 // CHECK9-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 2566 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 2567 // CHECK9-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 2568 // CHECK9-NEXT: unreachable 2569 // 2570 // 2571 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 2572 // CHECK9-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { 2573 // CHECK9-NEXT: entry: 2574 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2575 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2576 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 2577 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 2578 // CHECK9-NEXT: ret void 2579 // 2580 // 2581 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2 2582 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 2583 // CHECK9-NEXT: entry: 2584 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2585 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2586 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 2587 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2588 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2589 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2590 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2591 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2592 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2593 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2594 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2595 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2596 // CHECK9-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 2597 // CHECK9-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 2598 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2599 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2600 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2601 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2602 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2603 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2604 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2605 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2606 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 2607 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2608 // CHECK9: cond.true: 2609 // CHECK9-NEXT: br label [[COND_END:%.*]] 2610 // CHECK9: cond.false: 2611 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2612 // CHECK9-NEXT: br label [[COND_END]] 2613 // CHECK9: cond.end: 2614 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2615 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2616 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2617 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2618 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2619 // CHECK9: omp.inner.for.cond: 2620 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2621 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2622 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2623 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2624 // CHECK9: omp.inner.for.body: 2625 // CHECK9-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 2626 // CHECK9-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 2627 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 2628 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2629 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2630 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2631 // CHECK9-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 2632 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 2633 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2634 // CHECK9: omp.inner.for.inc: 2635 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2636 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2637 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 2638 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2639 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2640 // CHECK9: omp.inner.for.end: 2641 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2642 // CHECK9: omp.loop.exit: 2643 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2644 // CHECK9-NEXT: ret void 2645 // 2646 // 2647 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3 2648 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2649 // CHECK9-NEXT: entry: 2650 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2651 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2652 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2653 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2654 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2655 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2656 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2657 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2658 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2659 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2660 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2661 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2662 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2663 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2664 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2665 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2666 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2667 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2668 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2669 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2670 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2671 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2672 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2673 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2674 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2675 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2676 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2677 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2678 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2679 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2680 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2681 // CHECK9: cond.true: 2682 // CHECK9-NEXT: br label [[COND_END:%.*]] 2683 // CHECK9: cond.false: 2684 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2685 // CHECK9-NEXT: br label [[COND_END]] 2686 // CHECK9: cond.end: 2687 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2688 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2689 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2690 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2691 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2692 // CHECK9: omp.inner.for.cond: 2693 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2694 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2695 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2696 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2697 // CHECK9: omp.inner.for.body: 2698 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2699 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2700 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2701 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2702 // CHECK9-NEXT: invoke void @_Z3foov() 2703 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2704 // CHECK9: invoke.cont: 2705 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2706 // CHECK9: omp.body.continue: 2707 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2708 // CHECK9: omp.inner.for.inc: 2709 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2710 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2711 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2712 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2713 // CHECK9: omp.inner.for.end: 2714 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2715 // CHECK9: omp.loop.exit: 2716 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2717 // CHECK9-NEXT: ret void 2718 // CHECK9: terminate.lpad: 2719 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2720 // CHECK9-NEXT: catch i8* null 2721 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2722 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2723 // CHECK9-NEXT: unreachable 2724 // 2725 // 2726 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 2727 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat { 2728 // CHECK9-NEXT: entry: 2729 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2730 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2731 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2732 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2733 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2734 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2735 // CHECK9: omp_offload.failed: 2736 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 2737 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2738 // CHECK9: omp_offload.cont: 2739 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2740 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2741 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 2742 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2743 // CHECK9: omp_offload.failed2: 2744 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 2745 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2746 // CHECK9: omp_offload.cont3: 2747 // CHECK9-NEXT: ret i32 0 2748 // 2749 // 2750 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 2751 // CHECK9-SAME: () #[[ATTR7]] comdat { 2752 // CHECK9-NEXT: entry: 2753 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2754 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 2755 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2756 // CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2757 // CHECK9-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 2758 // CHECK9-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2759 // CHECK9: omp_offload.failed: 2760 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 2761 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]] 2762 // CHECK9: omp_offload.cont: 2763 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 2764 // CHECK9-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 2765 // CHECK9-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 2766 // CHECK9-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 2767 // CHECK9: omp_offload.failed2: 2768 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 2769 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT3]] 2770 // CHECK9: omp_offload.cont3: 2771 // CHECK9-NEXT: ret i32 0 2772 // 2773 // 2774 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev 2775 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 2776 // CHECK9-NEXT: entry: 2777 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2778 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2779 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2780 // CHECK9-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 2781 // CHECK9-NEXT: ret void 2782 // 2783 // 2784 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El 2785 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 2786 // CHECK9-NEXT: entry: 2787 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2788 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 2789 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2790 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 2791 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2792 // CHECK9-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 2793 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 2794 // CHECK9-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 2795 // CHECK9-NEXT: ret void 2796 // 2797 // 2798 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev 2799 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 2800 // CHECK9-NEXT: entry: 2801 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2802 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2803 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2804 // CHECK9-NEXT: ret void 2805 // 2806 // 2807 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 2808 // CHECK9-SAME: () #[[ATTR3]] { 2809 // CHECK9-NEXT: entry: 2810 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 2811 // CHECK9-NEXT: ret void 2812 // 2813 // 2814 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4 2815 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2816 // CHECK9-NEXT: entry: 2817 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2818 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2819 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2820 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2821 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2822 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2823 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2824 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2825 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2826 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2827 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2828 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2829 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2830 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2831 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2832 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2833 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2834 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2835 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2836 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2837 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2838 // CHECK9: cond.true: 2839 // CHECK9-NEXT: br label [[COND_END:%.*]] 2840 // CHECK9: cond.false: 2841 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2842 // CHECK9-NEXT: br label [[COND_END]] 2843 // CHECK9: cond.end: 2844 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2845 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2846 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2847 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2848 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2849 // CHECK9: omp.inner.for.cond: 2850 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2851 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2852 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 2853 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2854 // CHECK9: omp.inner.for.body: 2855 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 2856 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2857 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 2858 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2859 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 2860 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 2861 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2862 // CHECK9: omp.inner.for.inc: 2863 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2864 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2865 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 2866 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2867 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2868 // CHECK9: omp.inner.for.end: 2869 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2870 // CHECK9: omp.loop.exit: 2871 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2872 // CHECK9-NEXT: ret void 2873 // 2874 // 2875 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5 2876 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 2877 // CHECK9-NEXT: entry: 2878 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2879 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2880 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2881 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2882 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2883 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2884 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2885 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2886 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2887 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2888 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2889 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2890 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2891 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2892 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2893 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2894 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 2895 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2896 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 2897 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2898 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 2899 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2900 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2901 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2902 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2903 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2904 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2905 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2906 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2907 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 2908 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2909 // CHECK9: cond.true: 2910 // CHECK9-NEXT: br label [[COND_END:%.*]] 2911 // CHECK9: cond.false: 2912 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2913 // CHECK9-NEXT: br label [[COND_END]] 2914 // CHECK9: cond.end: 2915 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 2916 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2917 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2918 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 2919 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2920 // CHECK9: omp.inner.for.cond: 2921 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2922 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2923 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 2924 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2925 // CHECK9: omp.inner.for.body: 2926 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2927 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 2928 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2929 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2930 // CHECK9-NEXT: invoke void @_Z3foov() 2931 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 2932 // CHECK9: invoke.cont: 2933 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2934 // CHECK9: omp.body.continue: 2935 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2936 // CHECK9: omp.inner.for.inc: 2937 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2938 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 2939 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2940 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2941 // CHECK9: omp.inner.for.end: 2942 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2943 // CHECK9: omp.loop.exit: 2944 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2945 // CHECK9-NEXT: ret void 2946 // CHECK9: terminate.lpad: 2947 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 2948 // CHECK9-NEXT: catch i8* null 2949 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 2950 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 2951 // CHECK9-NEXT: unreachable 2952 // 2953 // 2954 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 2955 // CHECK9-SAME: () #[[ATTR3]] { 2956 // CHECK9-NEXT: entry: 2957 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 2958 // CHECK9-NEXT: ret void 2959 // 2960 // 2961 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6 2962 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 2963 // CHECK9-NEXT: entry: 2964 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2965 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2966 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2967 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2968 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2969 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2970 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2971 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2972 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2973 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2974 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2975 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2976 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 2977 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2978 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2979 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2980 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2981 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2982 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2983 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 2984 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2985 // CHECK9: cond.true: 2986 // CHECK9-NEXT: br label [[COND_END:%.*]] 2987 // CHECK9: cond.false: 2988 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2989 // CHECK9-NEXT: br label [[COND_END]] 2990 // CHECK9: cond.end: 2991 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 2992 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2993 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2994 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 2995 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2996 // CHECK9: omp.inner.for.cond: 2997 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2998 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2999 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3000 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3001 // CHECK9: omp.inner.for.body: 3002 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 3003 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3004 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3005 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3006 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3007 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3008 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3009 // CHECK9: omp.inner.for.inc: 3010 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3011 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3012 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3013 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3014 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3015 // CHECK9: omp.inner.for.end: 3016 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3017 // CHECK9: omp.loop.exit: 3018 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3019 // CHECK9-NEXT: ret void 3020 // 3021 // 3022 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7 3023 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3024 // CHECK9-NEXT: entry: 3025 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3026 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3027 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3028 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3029 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3030 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3031 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3032 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3033 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3034 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3035 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3036 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3037 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3038 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3039 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3040 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3041 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3042 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3043 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3044 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3045 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3046 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3047 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3048 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3049 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3050 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3051 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3052 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3053 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3054 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3055 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3056 // CHECK9: cond.true: 3057 // CHECK9-NEXT: br label [[COND_END:%.*]] 3058 // CHECK9: cond.false: 3059 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3060 // CHECK9-NEXT: br label [[COND_END]] 3061 // CHECK9: cond.end: 3062 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3063 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3064 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3065 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3066 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3067 // CHECK9: omp.inner.for.cond: 3068 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3069 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3070 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3071 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3072 // CHECK9: omp.inner.for.body: 3073 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3074 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3075 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3076 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3077 // CHECK9-NEXT: invoke void @_Z3foov() 3078 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3079 // CHECK9: invoke.cont: 3080 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3081 // CHECK9: omp.body.continue: 3082 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3083 // CHECK9: omp.inner.for.inc: 3084 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3085 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3086 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3087 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3088 // CHECK9: omp.inner.for.end: 3089 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3090 // CHECK9: omp.loop.exit: 3091 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3092 // CHECK9-NEXT: ret void 3093 // CHECK9: terminate.lpad: 3094 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3095 // CHECK9-NEXT: catch i8* null 3096 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3097 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3098 // CHECK9-NEXT: unreachable 3099 // 3100 // 3101 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 3102 // CHECK9-SAME: () #[[ATTR3]] { 3103 // CHECK9-NEXT: entry: 3104 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 3105 // CHECK9-NEXT: ret void 3106 // 3107 // 3108 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8 3109 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3110 // CHECK9-NEXT: entry: 3111 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3112 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3113 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3114 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3115 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3116 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3117 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3118 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3119 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3120 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3121 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3122 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3123 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3124 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3125 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3126 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3127 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3128 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3129 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3130 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3131 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3132 // CHECK9: cond.true: 3133 // CHECK9-NEXT: br label [[COND_END:%.*]] 3134 // CHECK9: cond.false: 3135 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3136 // CHECK9-NEXT: br label [[COND_END]] 3137 // CHECK9: cond.end: 3138 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3139 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3140 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3141 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3142 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3143 // CHECK9: omp.inner.for.cond: 3144 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3145 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3146 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3147 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3148 // CHECK9: omp.inner.for.body: 3149 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 3150 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3151 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3152 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3153 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3154 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3155 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3156 // CHECK9: omp.inner.for.inc: 3157 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3158 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3159 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3160 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3161 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3162 // CHECK9: omp.inner.for.end: 3163 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3164 // CHECK9: omp.loop.exit: 3165 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3166 // CHECK9-NEXT: ret void 3167 // 3168 // 3169 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9 3170 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3171 // CHECK9-NEXT: entry: 3172 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3173 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3174 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3175 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3176 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3177 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3178 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3179 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3180 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3181 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3182 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3183 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3184 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3185 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3186 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3187 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3188 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3189 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3190 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3191 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3192 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3193 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3194 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3195 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3196 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3197 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3198 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3199 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3200 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3201 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3202 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3203 // CHECK9: cond.true: 3204 // CHECK9-NEXT: br label [[COND_END:%.*]] 3205 // CHECK9: cond.false: 3206 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3207 // CHECK9-NEXT: br label [[COND_END]] 3208 // CHECK9: cond.end: 3209 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3210 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3211 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3212 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3213 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3214 // CHECK9: omp.inner.for.cond: 3215 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3216 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3217 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3218 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3219 // CHECK9: omp.inner.for.body: 3220 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3221 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3222 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3223 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3224 // CHECK9-NEXT: invoke void @_Z3foov() 3225 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3226 // CHECK9: invoke.cont: 3227 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3228 // CHECK9: omp.body.continue: 3229 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3230 // CHECK9: omp.inner.for.inc: 3231 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3232 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3233 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3234 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3235 // CHECK9: omp.inner.for.end: 3236 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3237 // CHECK9: omp.loop.exit: 3238 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3239 // CHECK9-NEXT: ret void 3240 // CHECK9: terminate.lpad: 3241 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3242 // CHECK9-NEXT: catch i8* null 3243 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3244 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3245 // CHECK9-NEXT: unreachable 3246 // 3247 // 3248 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 3249 // CHECK9-SAME: () #[[ATTR3]] { 3250 // CHECK9-NEXT: entry: 3251 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 3252 // CHECK9-NEXT: ret void 3253 // 3254 // 3255 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10 3256 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3257 // CHECK9-NEXT: entry: 3258 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3259 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3260 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3261 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3262 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3263 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3264 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3265 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3266 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3267 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 3268 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3269 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3270 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3271 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3272 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3273 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3274 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3275 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3276 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3277 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3278 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3279 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3280 // CHECK9: cond.true: 3281 // CHECK9-NEXT: br label [[COND_END:%.*]] 3282 // CHECK9: cond.false: 3283 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3284 // CHECK9-NEXT: br label [[COND_END]] 3285 // CHECK9: cond.end: 3286 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3287 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3288 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3289 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3290 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3291 // CHECK9: omp.inner.for.cond: 3292 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3293 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3294 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3295 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3296 // CHECK9: omp.inner.for.body: 3297 // CHECK9-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23) 3298 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3299 // CHECK9: invoke.cont: 3300 // CHECK9-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 3301 // CHECK9-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]] 3302 // CHECK9: invoke.cont2: 3303 // CHECK9-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 3304 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 3305 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 3306 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3307 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 3308 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3309 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3310 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 3311 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3312 // CHECK9: omp.inner.for.inc: 3313 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3314 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3315 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3316 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3317 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3318 // CHECK9: omp.inner.for.end: 3319 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3320 // CHECK9: omp.loop.exit: 3321 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3322 // CHECK9-NEXT: ret void 3323 // CHECK9: terminate.lpad: 3324 // CHECK9-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 3325 // CHECK9-NEXT: catch i8* null 3326 // CHECK9-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 3327 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]] 3328 // CHECK9-NEXT: unreachable 3329 // 3330 // 3331 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11 3332 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3333 // CHECK9-NEXT: entry: 3334 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3335 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3336 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3337 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3338 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3339 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 3340 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3341 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3342 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3343 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3344 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 3345 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3346 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3347 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3348 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3349 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3350 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3351 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3352 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3353 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3354 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3355 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3356 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3357 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3358 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3359 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3360 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3361 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3362 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3363 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3364 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3365 // CHECK9: cond.true: 3366 // CHECK9-NEXT: br label [[COND_END:%.*]] 3367 // CHECK9: cond.false: 3368 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3369 // CHECK9-NEXT: br label [[COND_END]] 3370 // CHECK9: cond.end: 3371 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3372 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3373 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3374 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3375 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3376 // CHECK9: omp.inner.for.cond: 3377 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3378 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3379 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3380 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3381 // CHECK9: omp.inner.for.body: 3382 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3383 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3384 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3385 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3386 // CHECK9-NEXT: invoke void @_Z3foov() 3387 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3388 // CHECK9: invoke.cont: 3389 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3390 // CHECK9: omp.body.continue: 3391 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3392 // CHECK9: omp.inner.for.inc: 3393 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3394 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3395 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3396 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 3397 // CHECK9: omp.inner.for.end: 3398 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3399 // CHECK9: omp.loop.exit: 3400 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3401 // CHECK9-NEXT: ret void 3402 // CHECK9: terminate.lpad: 3403 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3404 // CHECK9-NEXT: catch i8* null 3405 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3406 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3407 // CHECK9-NEXT: unreachable 3408 // 3409 // 3410 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3411 // CHECK9-SAME: () #[[ATTR9:[0-9]+]] { 3412 // CHECK9-NEXT: entry: 3413 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 3414 // CHECK9-NEXT: ret void 3415 // 3416 // 3417 // CHECK13-LABEL: define {{[^@]+}}@main 3418 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3419 // CHECK13-NEXT: entry: 3420 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3421 // CHECK13-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8 3422 // CHECK13-NEXT: [[A:%.*]] = alloca i8, align 1 3423 // CHECK13-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8 3424 // CHECK13-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 3425 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3426 // CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 3427 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3428 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3429 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3430 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3431 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3432 // CHECK13-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0) 3433 // CHECK13-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) 3434 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] 3435 // CHECK13: invoke.cont: 3436 // CHECK13-NEXT: store i8 [[CALL]], i8* [[A]], align 1 3437 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 100) 3438 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3439 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3440 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3441 // CHECK13: omp_offload.failed: 3442 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]] 3443 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 3444 // CHECK13: lpad: 3445 // CHECK13-NEXT: [[TMP2:%.*]] = landingpad { i8*, i32 } 3446 // CHECK13-NEXT: cleanup 3447 // CHECK13-NEXT: [[TMP3:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 0 3448 // CHECK13-NEXT: store i8* [[TMP3]], i8** [[EXN_SLOT]], align 8 3449 // CHECK13-NEXT: [[TMP4:%.*]] = extractvalue { i8*, i32 } [[TMP2]], 1 3450 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[EHSELECTOR_SLOT]], align 4 3451 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 3452 // CHECK13-NEXT: br label [[EH_RESUME:%.*]] 3453 // CHECK13: omp_offload.cont: 3454 // CHECK13-NEXT: [[TMP5:%.*]] = load i8, i8* [[A]], align 1 3455 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8* 3456 // CHECK13-NEXT: store i8 [[TMP5]], i8* [[CONV]], align 1 3457 // CHECK13-NEXT: [[TMP6:%.*]] = load i64, i64* [[A_CASTED]], align 8 3458 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3459 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 3460 // CHECK13-NEXT: store i64 [[TMP6]], i64* [[TMP8]], align 8 3461 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3462 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3463 // CHECK13-NEXT: store i64 [[TMP6]], i64* [[TMP10]], align 8 3464 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3465 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8 3466 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3467 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3468 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3469 // CHECK13-NEXT: [[TMP14:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, i32 1, i8** [[TMP12]], i8** [[TMP13]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3470 // CHECK13-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0 3471 // CHECK13-NEXT: br i1 [[TMP15]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3472 // CHECK13: omp_offload.failed2: 3473 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP6]]) #[[ATTR6]] 3474 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3475 // CHECK13: omp_offload.cont3: 3476 // CHECK13-NEXT: [[TMP16:%.*]] = load i8, i8* [[A]], align 1 3477 // CHECK13-NEXT: [[CONV4:%.*]] = sext i8 [[TMP16]] to i32 3478 // CHECK13-NEXT: [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv() 3479 // CHECK13-NEXT: to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]] 3480 // CHECK13: invoke.cont5: 3481 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV4]], [[CALL6]] 3482 // CHECK13-NEXT: [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv() 3483 // CHECK13-NEXT: to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]] 3484 // CHECK13: invoke.cont7: 3485 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]] 3486 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[RETVAL]], align 4 3487 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]] 3488 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 3489 // CHECK13-NEXT: ret i32 [[TMP17]] 3490 // CHECK13: eh.resume: 3491 // CHECK13-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8 3492 // CHECK13-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4 3493 // CHECK13-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0 3494 // CHECK13-NEXT: [[LPAD_VAL10:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 3495 // CHECK13-NEXT: resume { i8*, i32 } [[LPAD_VAL10]] 3496 // 3497 // 3498 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El 3499 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 { 3500 // CHECK13-NEXT: entry: 3501 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3502 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3503 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3504 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3505 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3506 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 3507 // CHECK13-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]]) 3508 // CHECK13-NEXT: ret void 3509 // 3510 // 3511 // CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv 3512 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 { 3513 // CHECK13-NEXT: entry: 3514 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3515 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3516 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3517 // CHECK13-NEXT: call void @_Z8mayThrowv() 3518 // CHECK13-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3519 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8 3520 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8 3521 // CHECK13-NEXT: ret i8 [[CONV]] 3522 // 3523 // 3524 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 3525 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] { 3526 // CHECK13-NEXT: entry: 3527 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*)) 3528 // CHECK13-NEXT: ret void 3529 // 3530 // 3531 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 3532 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3533 // CHECK13-NEXT: entry: 3534 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3535 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3536 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3537 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3538 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3539 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3540 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3541 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3542 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3543 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3544 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3545 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3546 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3547 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3548 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3549 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3550 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3551 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3552 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3553 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3554 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3555 // CHECK13: cond.true: 3556 // CHECK13-NEXT: br label [[COND_END:%.*]] 3557 // CHECK13: cond.false: 3558 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3559 // CHECK13-NEXT: br label [[COND_END]] 3560 // CHECK13: cond.end: 3561 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3562 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3563 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3564 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3565 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3566 // CHECK13: omp.inner.for.cond: 3567 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3568 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3569 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3570 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3571 // CHECK13: omp.inner.for.body: 3572 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2) 3573 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3574 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3575 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3576 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3577 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3578 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3579 // CHECK13: omp.inner.for.inc: 3580 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3581 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3582 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3583 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3584 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 3585 // CHECK13: omp.inner.for.end: 3586 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3587 // CHECK13: omp.loop.exit: 3588 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3589 // CHECK13-NEXT: ret void 3590 // 3591 // 3592 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 3593 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3594 // CHECK13-NEXT: entry: 3595 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3596 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3597 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3598 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3599 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3600 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3601 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3602 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3603 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3604 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3605 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3606 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3607 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3608 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3609 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3610 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3611 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3612 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3613 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3614 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3615 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3616 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3617 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3618 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3619 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3620 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3621 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3622 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3623 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3624 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3625 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3626 // CHECK13: cond.true: 3627 // CHECK13-NEXT: br label [[COND_END:%.*]] 3628 // CHECK13: cond.false: 3629 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3630 // CHECK13-NEXT: br label [[COND_END]] 3631 // CHECK13: cond.end: 3632 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3633 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3634 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3635 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3636 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3637 // CHECK13: omp.inner.for.cond: 3638 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3639 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3640 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3641 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3642 // CHECK13: omp.inner.for.body: 3643 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3644 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3645 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3646 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3647 // CHECK13-NEXT: invoke void @_Z3foov() 3648 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3649 // CHECK13: invoke.cont: 3650 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3651 // CHECK13: omp.body.continue: 3652 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3653 // CHECK13: omp.inner.for.inc: 3654 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3655 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3656 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3657 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 3658 // CHECK13: omp.inner.for.end: 3659 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3660 // CHECK13: omp.loop.exit: 3661 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3662 // CHECK13-NEXT: ret void 3663 // CHECK13: terminate.lpad: 3664 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3665 // CHECK13-NEXT: catch i8* null 3666 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3667 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]] 3668 // CHECK13-NEXT: unreachable 3669 // 3670 // 3671 // CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate 3672 // CHECK13-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat { 3673 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]] 3674 // CHECK13-NEXT: call void @_ZSt9terminatev() #[[ATTR10]] 3675 // CHECK13-NEXT: unreachable 3676 // 3677 // 3678 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74 3679 // CHECK13-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] { 3680 // CHECK13-NEXT: entry: 3681 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3682 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3683 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8* 3684 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]]) 3685 // CHECK13-NEXT: ret void 3686 // 3687 // 3688 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 3689 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] { 3690 // CHECK13-NEXT: entry: 3691 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3692 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3693 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8 3694 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3695 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3696 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3697 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3698 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3699 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3700 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3701 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3702 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3703 // CHECK13-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8 3704 // CHECK13-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8 3705 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3706 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3707 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3708 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3709 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3710 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3711 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3712 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3713 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99 3714 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3715 // CHECK13: cond.true: 3716 // CHECK13-NEXT: br label [[COND_END:%.*]] 3717 // CHECK13: cond.false: 3718 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3719 // CHECK13-NEXT: br label [[COND_END]] 3720 // CHECK13: cond.end: 3721 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3722 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3723 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3724 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3725 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3726 // CHECK13: omp.inner.for.cond: 3727 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3728 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3729 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3730 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3731 // CHECK13: omp.inner.for.body: 3732 // CHECK13-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1 3733 // CHECK13-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32 3734 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]]) 3735 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3736 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 3737 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3738 // CHECK13-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64 3739 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]]) 3740 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3741 // CHECK13: omp.inner.for.inc: 3742 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3743 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3744 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 3745 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3746 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 3747 // CHECK13: omp.inner.for.end: 3748 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3749 // CHECK13: omp.loop.exit: 3750 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3751 // CHECK13-NEXT: ret void 3752 // 3753 // 3754 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 3755 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3756 // CHECK13-NEXT: entry: 3757 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3758 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3759 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3760 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3761 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3762 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3763 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3764 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3765 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3766 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3767 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3768 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3769 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3770 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3771 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3772 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3773 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3774 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3775 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3776 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3777 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3778 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3779 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3780 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3781 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3782 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3783 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3784 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3785 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3786 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 3787 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3788 // CHECK13: cond.true: 3789 // CHECK13-NEXT: br label [[COND_END:%.*]] 3790 // CHECK13: cond.false: 3791 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3792 // CHECK13-NEXT: br label [[COND_END]] 3793 // CHECK13: cond.end: 3794 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 3795 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3796 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3797 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 3798 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3799 // CHECK13: omp.inner.for.cond: 3800 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3801 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3802 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 3803 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3804 // CHECK13: omp.inner.for.body: 3805 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3806 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3807 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3808 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3809 // CHECK13-NEXT: invoke void @_Z3foov() 3810 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 3811 // CHECK13: invoke.cont: 3812 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3813 // CHECK13: omp.body.continue: 3814 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3815 // CHECK13: omp.inner.for.inc: 3816 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3817 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 3818 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3819 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 3820 // CHECK13: omp.inner.for.end: 3821 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3822 // CHECK13: omp.loop.exit: 3823 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3824 // CHECK13-NEXT: ret void 3825 // CHECK13: terminate.lpad: 3826 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 3827 // CHECK13-NEXT: catch i8* null 3828 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 3829 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 3830 // CHECK13-NEXT: unreachable 3831 // 3832 // 3833 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv 3834 // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat { 3835 // CHECK13-NEXT: entry: 3836 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3837 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3838 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3839 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3840 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3841 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3842 // CHECK13: omp_offload.failed: 3843 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]] 3844 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 3845 // CHECK13: omp_offload.cont: 3846 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3847 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3848 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3849 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3850 // CHECK13: omp_offload.failed2: 3851 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]] 3852 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3853 // CHECK13: omp_offload.cont3: 3854 // CHECK13-NEXT: ret i32 0 3855 // 3856 // 3857 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv 3858 // CHECK13-SAME: () #[[ATTR7]] comdat { 3859 // CHECK13-NEXT: entry: 3860 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3861 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4 3862 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3863 // CHECK13-NEXT: [[TMP0:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3864 // CHECK13-NEXT: [[TMP1:%.*]] = icmp ne i32 [[TMP0]], 0 3865 // CHECK13-NEXT: br i1 [[TMP1]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3866 // CHECK13: omp_offload.failed: 3867 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]] 3868 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 3869 // CHECK13: omp_offload.cont: 3870 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 100) 3871 // CHECK13-NEXT: [[TMP2:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, i32 0, i8** null, i8** null, i64* null, i64* null, i8** null, i8** null, i32 0, i32 0) 3872 // CHECK13-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 3873 // CHECK13-NEXT: br i1 [[TMP3]], label [[OMP_OFFLOAD_FAILED2:%.*]], label [[OMP_OFFLOAD_CONT3:%.*]] 3874 // CHECK13: omp_offload.failed2: 3875 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]] 3876 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT3]] 3877 // CHECK13: omp_offload.cont3: 3878 // CHECK13-NEXT: ret i32 0 3879 // 3880 // 3881 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev 3882 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 { 3883 // CHECK13-NEXT: entry: 3884 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3885 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3886 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3887 // CHECK13-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]] 3888 // CHECK13-NEXT: ret void 3889 // 3890 // 3891 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El 3892 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 3893 // CHECK13-NEXT: entry: 3894 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3895 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 3896 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3897 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 3898 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3899 // CHECK13-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3900 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8 3901 // CHECK13-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8 3902 // CHECK13-NEXT: ret void 3903 // 3904 // 3905 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52 3906 // CHECK13-SAME: () #[[ATTR3]] { 3907 // CHECK13-NEXT: entry: 3908 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*)) 3909 // CHECK13-NEXT: ret void 3910 // 3911 // 3912 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4 3913 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 3914 // CHECK13-NEXT: entry: 3915 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3916 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3917 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3918 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3919 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3920 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3921 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3922 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3923 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3924 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3925 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3926 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3927 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 3928 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3929 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3930 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3931 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 3932 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3933 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3934 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 3935 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3936 // CHECK13: cond.true: 3937 // CHECK13-NEXT: br label [[COND_END:%.*]] 3938 // CHECK13: cond.false: 3939 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3940 // CHECK13-NEXT: br label [[COND_END]] 3941 // CHECK13: cond.end: 3942 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 3943 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3944 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3945 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 3946 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3947 // CHECK13: omp.inner.for.cond: 3948 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3949 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3950 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 3951 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3952 // CHECK13: omp.inner.for.body: 3953 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5) 3954 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3955 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 3956 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3957 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 3958 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 3959 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3960 // CHECK13: omp.inner.for.inc: 3961 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3962 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3963 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 3964 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3965 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 3966 // CHECK13: omp.inner.for.end: 3967 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3968 // CHECK13: omp.loop.exit: 3969 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 3970 // CHECK13-NEXT: ret void 3971 // 3972 // 3973 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 3974 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 3975 // CHECK13-NEXT: entry: 3976 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3977 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3978 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 3979 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 3980 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3981 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3982 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3983 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3984 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3985 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3986 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 3987 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3988 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3989 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3990 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3991 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3992 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 3993 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 3994 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 3995 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 3996 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 3997 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3998 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3999 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4000 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4001 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4002 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4003 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4004 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4005 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4006 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4007 // CHECK13: cond.true: 4008 // CHECK13-NEXT: br label [[COND_END:%.*]] 4009 // CHECK13: cond.false: 4010 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4011 // CHECK13-NEXT: br label [[COND_END]] 4012 // CHECK13: cond.end: 4013 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4014 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4015 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4016 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4017 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4018 // CHECK13: omp.inner.for.cond: 4019 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4020 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4021 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4022 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4023 // CHECK13: omp.inner.for.body: 4024 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4025 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4026 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4027 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4028 // CHECK13-NEXT: invoke void @_Z3foov() 4029 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4030 // CHECK13: invoke.cont: 4031 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4032 // CHECK13: omp.body.continue: 4033 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4034 // CHECK13: omp.inner.for.inc: 4035 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4036 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4037 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4038 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4039 // CHECK13: omp.inner.for.end: 4040 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4041 // CHECK13: omp.loop.exit: 4042 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4043 // CHECK13-NEXT: ret void 4044 // CHECK13: terminate.lpad: 4045 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4046 // CHECK13-NEXT: catch i8* null 4047 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4048 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4049 // CHECK13-NEXT: unreachable 4050 // 4051 // 4052 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57 4053 // CHECK13-SAME: () #[[ATTR3]] { 4054 // CHECK13-NEXT: entry: 4055 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*)) 4056 // CHECK13-NEXT: ret void 4057 // 4058 // 4059 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 4060 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4061 // CHECK13-NEXT: entry: 4062 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4063 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4064 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4065 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4066 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4067 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4068 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4069 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4070 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4071 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4072 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4073 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4074 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4075 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4076 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4077 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4078 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4079 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4080 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4081 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4082 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4083 // CHECK13: cond.true: 4084 // CHECK13-NEXT: br label [[COND_END:%.*]] 4085 // CHECK13: cond.false: 4086 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4087 // CHECK13-NEXT: br label [[COND_END]] 4088 // CHECK13: cond.end: 4089 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4090 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4091 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4092 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4093 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4094 // CHECK13: omp.inner.for.cond: 4095 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4096 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4097 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4098 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4099 // CHECK13: omp.inner.for.body: 4100 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23) 4101 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4102 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4103 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4104 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4105 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4106 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4107 // CHECK13: omp.inner.for.inc: 4108 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4109 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4110 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4111 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4112 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4113 // CHECK13: omp.inner.for.end: 4114 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4115 // CHECK13: omp.loop.exit: 4116 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4117 // CHECK13-NEXT: ret void 4118 // 4119 // 4120 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 4121 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4122 // CHECK13-NEXT: entry: 4123 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4124 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4125 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4126 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4127 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4128 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4129 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4130 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4131 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4132 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4133 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4134 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4135 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4136 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4137 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4138 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4139 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4140 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4141 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4142 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4143 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4144 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4145 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4146 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4147 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4148 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4149 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4150 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4151 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4152 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4153 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4154 // CHECK13: cond.true: 4155 // CHECK13-NEXT: br label [[COND_END:%.*]] 4156 // CHECK13: cond.false: 4157 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4158 // CHECK13-NEXT: br label [[COND_END]] 4159 // CHECK13: cond.end: 4160 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4161 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4162 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4163 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4164 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4165 // CHECK13: omp.inner.for.cond: 4166 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4167 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4168 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4169 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4170 // CHECK13: omp.inner.for.body: 4171 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4172 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4173 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4174 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4175 // CHECK13-NEXT: invoke void @_Z3foov() 4176 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4177 // CHECK13: invoke.cont: 4178 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4179 // CHECK13: omp.body.continue: 4180 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4181 // CHECK13: omp.inner.for.inc: 4182 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4183 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4184 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4185 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4186 // CHECK13: omp.inner.for.end: 4187 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4188 // CHECK13: omp.loop.exit: 4189 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4190 // CHECK13-NEXT: ret void 4191 // CHECK13: terminate.lpad: 4192 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4193 // CHECK13-NEXT: catch i8* null 4194 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4195 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4196 // CHECK13-NEXT: unreachable 4197 // 4198 // 4199 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52 4200 // CHECK13-SAME: () #[[ATTR3]] { 4201 // CHECK13-NEXT: entry: 4202 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*)) 4203 // CHECK13-NEXT: ret void 4204 // 4205 // 4206 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 4207 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] { 4208 // CHECK13-NEXT: entry: 4209 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4210 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4211 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4212 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4213 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4214 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4215 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4216 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4217 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4218 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4219 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4220 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4221 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4222 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4223 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4224 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4225 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4226 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4227 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4228 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4229 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4230 // CHECK13: cond.true: 4231 // CHECK13-NEXT: br label [[COND_END:%.*]] 4232 // CHECK13: cond.false: 4233 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4234 // CHECK13-NEXT: br label [[COND_END]] 4235 // CHECK13: cond.end: 4236 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4237 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4238 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4239 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4240 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4241 // CHECK13: omp.inner.for.cond: 4242 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4243 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4244 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4245 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4246 // CHECK13: omp.inner.for.body: 4247 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1) 4248 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4249 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 4250 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4251 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 4252 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]) 4253 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4254 // CHECK13: omp.inner.for.inc: 4255 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4256 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4257 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] 4258 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4259 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4260 // CHECK13: omp.inner.for.end: 4261 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4262 // CHECK13: omp.loop.exit: 4263 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4264 // CHECK13-NEXT: ret void 4265 // 4266 // 4267 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 4268 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4269 // CHECK13-NEXT: entry: 4270 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4271 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4272 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4273 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4274 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4275 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4276 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4277 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4278 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4279 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4280 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4281 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4282 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4283 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4284 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4285 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4286 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4287 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4288 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4289 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4290 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4291 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4292 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4293 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4294 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4295 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4296 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4297 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4298 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4299 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4300 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4301 // CHECK13: cond.true: 4302 // CHECK13-NEXT: br label [[COND_END:%.*]] 4303 // CHECK13: cond.false: 4304 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4305 // CHECK13-NEXT: br label [[COND_END]] 4306 // CHECK13: cond.end: 4307 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4308 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4309 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4310 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4311 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4312 // CHECK13: omp.inner.for.cond: 4313 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4314 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4315 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4316 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4317 // CHECK13: omp.inner.for.body: 4318 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4319 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4320 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4321 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4322 // CHECK13-NEXT: invoke void @_Z3foov() 4323 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4324 // CHECK13: invoke.cont: 4325 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4326 // CHECK13: omp.body.continue: 4327 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4328 // CHECK13: omp.inner.for.inc: 4329 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4330 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4331 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4332 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4333 // CHECK13: omp.inner.for.end: 4334 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4335 // CHECK13: omp.loop.exit: 4336 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4337 // CHECK13-NEXT: ret void 4338 // CHECK13: terminate.lpad: 4339 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4340 // CHECK13-NEXT: catch i8* null 4341 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4342 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4343 // CHECK13-NEXT: unreachable 4344 // 4345 // 4346 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57 4347 // CHECK13-SAME: () #[[ATTR3]] { 4348 // CHECK13-NEXT: entry: 4349 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*)) 4350 // CHECK13-NEXT: ret void 4351 // 4352 // 4353 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 4354 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4355 // CHECK13-NEXT: entry: 4356 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4357 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4358 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4359 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4360 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4361 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4362 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4363 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4364 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4365 // CHECK13-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8 4366 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4367 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4368 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4369 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4 4370 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4371 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4372 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4373 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 4374 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4375 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4376 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99 4377 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4378 // CHECK13: cond.true: 4379 // CHECK13-NEXT: br label [[COND_END:%.*]] 4380 // CHECK13: cond.false: 4381 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4382 // CHECK13-NEXT: br label [[COND_END]] 4383 // CHECK13: cond.end: 4384 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] 4385 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4386 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4387 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 4388 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4389 // CHECK13: omp.inner.for.cond: 4390 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4391 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4392 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] 4393 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4394 // CHECK13: omp.inner.for.body: 4395 // CHECK13-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23) 4396 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4397 // CHECK13: invoke.cont: 4398 // CHECK13-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) 4399 // CHECK13-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]] 4400 // CHECK13: invoke.cont2: 4401 // CHECK13-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32 4402 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]]) 4403 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]] 4404 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4405 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4406 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4407 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4408 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]]) 4409 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4410 // CHECK13: omp.inner.for.inc: 4411 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4412 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4413 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4414 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4415 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4416 // CHECK13: omp.inner.for.end: 4417 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4418 // CHECK13: omp.loop.exit: 4419 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 4420 // CHECK13-NEXT: ret void 4421 // CHECK13: terminate.lpad: 4422 // CHECK13-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 } 4423 // CHECK13-NEXT: catch i8* null 4424 // CHECK13-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0 4425 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]] 4426 // CHECK13-NEXT: unreachable 4427 // 4428 // 4429 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 4430 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { 4431 // CHECK13-NEXT: entry: 4432 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4433 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4434 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4435 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4436 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4437 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4438 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4439 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4440 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4441 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4442 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4443 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4444 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4445 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4446 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4447 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4448 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4 4449 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4450 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 4451 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4452 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 4453 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4454 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4455 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4456 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4457 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4458 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 4459 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4460 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4461 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99 4462 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4463 // CHECK13: cond.true: 4464 // CHECK13-NEXT: br label [[COND_END:%.*]] 4465 // CHECK13: cond.false: 4466 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4467 // CHECK13-NEXT: br label [[COND_END]] 4468 // CHECK13: cond.end: 4469 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] 4470 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4471 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4472 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 4473 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4474 // CHECK13: omp.inner.for.cond: 4475 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4476 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4477 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] 4478 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4479 // CHECK13: omp.inner.for.body: 4480 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4481 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4482 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4483 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4484 // CHECK13-NEXT: invoke void @_Z3foov() 4485 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]] 4486 // CHECK13: invoke.cont: 4487 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4488 // CHECK13: omp.body.continue: 4489 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4490 // CHECK13: omp.inner.for.inc: 4491 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4492 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 4493 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4494 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4495 // CHECK13: omp.inner.for.end: 4496 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4497 // CHECK13: omp.loop.exit: 4498 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 4499 // CHECK13-NEXT: ret void 4500 // CHECK13: terminate.lpad: 4501 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 } 4502 // CHECK13-NEXT: catch i8* null 4503 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0 4504 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]] 4505 // CHECK13-NEXT: unreachable 4506 // 4507 // 4508 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev 4509 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 { 4510 // CHECK13-NEXT: entry: 4511 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4512 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4513 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4514 // CHECK13-NEXT: ret void 4515 // 4516 // 4517 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4518 // CHECK13-SAME: () #[[ATTR9:[0-9]+]] { 4519 // CHECK13-NEXT: entry: 4520 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) 4521 // CHECK13-NEXT: ret void 4522 // 4523