1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5
6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9
10 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5
11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
13
14 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17
18 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
21
22 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
29
30 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
31 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
32 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
33
34 // expected-no-diagnostics
35 #ifndef HEADER
36 #define HEADER
37
38 typedef __INTPTR_TYPE__ intptr_t;
39
40
41 void foo();
42
43 struct S {
44 intptr_t a, b, c;
SS45 S(intptr_t a) : a(a) {}
operator charS46 operator char() { extern void mayThrow(); mayThrow(); return a; }
~SS47 ~S() {}
48 };
49
50 template <typename T, int C>
tmain()51 int tmain() {
52 #pragma omp target
53 #pragma omp teams
54 #pragma omp distribute parallel for num_threads(C)
55 for (int i = 0; i < 100; i++)
56 foo();
57 #pragma omp target
58 #pragma omp teams
59 #pragma omp distribute parallel for num_threads(T(23))
60 for (int i = 0; i < 100; i++)
61 foo();
62 return 0;
63 }
64
main()65 int main() {
66 S s(0);
67 char a = s;
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute parallel for num_threads(2)
71 for (int i = 0; i < 100; i++) {
72 foo();
73 }
74 #pragma omp target
75 #pragma omp teams
76
77 #pragma omp distribute parallel for num_threads(a)
78 for (int i = 0; i < 100; i++) {
79 foo();
80 }
81 return a + tmain<char, 5>() + tmain<S, 1>();
82 }
83
84 // tmain 5
85
86 // tmain 1
87
88
89
90
91
92
93
94
95 #endif
96 // CHECK1-LABEL: define {{[^@]+}}@main
97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
98 // CHECK1-NEXT: entry:
99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
100 // CHECK1-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
101 // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1
102 // CHECK1-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
103 // CHECK1-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
105 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
106 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
107 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
108 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
109 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
110 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
111 // CHECK1-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
112 // CHECK1-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]])
113 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
114 // CHECK1: invoke.cont:
115 // CHECK1-NEXT: store i8 [[CALL]], i8* [[A]], align 1
116 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
117 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
118 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
119 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
120 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
121 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
122 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
123 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
124 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
125 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
126 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
127 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
128 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
129 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
130 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
131 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
132 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
133 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
134 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
135 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
136 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
137 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
138 // CHECK1: omp_offload.failed:
139 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
140 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
141 // CHECK1: lpad:
142 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
143 // CHECK1-NEXT: cleanup
144 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
145 // CHECK1-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
146 // CHECK1-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
147 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
148 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
149 // CHECK1-NEXT: br label [[EH_RESUME:%.*]]
150 // CHECK1: omp_offload.cont:
151 // CHECK1-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
152 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
153 // CHECK1-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
154 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
155 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
156 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
157 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
158 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
159 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
160 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
161 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
162 // CHECK1-NEXT: store i8* null, i8** [[TMP20]], align 8
163 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
164 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
165 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
166 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
167 // CHECK1-NEXT: store i32 1, i32* [[TMP23]], align 4
168 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
169 // CHECK1-NEXT: store i32 1, i32* [[TMP24]], align 4
170 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
171 // CHECK1-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
172 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
173 // CHECK1-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
174 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
175 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
176 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
177 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
178 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
179 // CHECK1-NEXT: store i8** null, i8*** [[TMP29]], align 8
180 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
181 // CHECK1-NEXT: store i8** null, i8*** [[TMP30]], align 8
182 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
183 // CHECK1-NEXT: store i64 100, i64* [[TMP31]], align 8
184 // CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
185 // CHECK1-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
186 // CHECK1-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
187 // CHECK1: omp_offload.failed3:
188 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
189 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
190 // CHECK1: omp_offload.cont4:
191 // CHECK1-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
192 // CHECK1-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
193 // CHECK1-NEXT: [[CALL7:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
194 // CHECK1-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
195 // CHECK1: invoke.cont6:
196 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
197 // CHECK1-NEXT: [[CALL9:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
198 // CHECK1-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
199 // CHECK1: invoke.cont8:
200 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
201 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
202 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
203 // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
204 // CHECK1-NEXT: ret i32 [[TMP35]]
205 // CHECK1: eh.resume:
206 // CHECK1-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
207 // CHECK1-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
208 // CHECK1-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
209 // CHECK1-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
210 // CHECK1-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
211 //
212 //
213 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El
214 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
215 // CHECK1-NEXT: entry:
216 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
217 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
218 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
219 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
220 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
221 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
222 // CHECK1-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
223 // CHECK1-NEXT: ret void
224 //
225 //
226 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv
227 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
228 // CHECK1-NEXT: entry:
229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
230 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
231 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
232 // CHECK1-NEXT: call void @_Z8mayThrowv()
233 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
234 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
235 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
236 // CHECK1-NEXT: ret i8 [[CONV]]
237 //
238 //
239 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
240 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
241 // CHECK1-NEXT: entry:
242 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
243 // CHECK1-NEXT: ret void
244 //
245 //
246 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
247 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
248 // CHECK1-NEXT: entry:
249 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
250 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
251 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
253 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
254 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
255 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
256 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
258 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
259 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
260 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
261 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
262 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
263 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
264 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
265 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
266 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
267 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
268 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
269 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
270 // CHECK1: cond.true:
271 // CHECK1-NEXT: br label [[COND_END:%.*]]
272 // CHECK1: cond.false:
273 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
274 // CHECK1-NEXT: br label [[COND_END]]
275 // CHECK1: cond.end:
276 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
277 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
278 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
279 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
280 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
281 // CHECK1: omp.inner.for.cond:
282 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
283 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
284 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
285 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
286 // CHECK1: omp.inner.for.body:
287 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
288 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
289 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
290 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
291 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
292 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
293 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
294 // CHECK1: omp.inner.for.inc:
295 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
296 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
297 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
298 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
299 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
300 // CHECK1: omp.inner.for.end:
301 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
302 // CHECK1: omp.loop.exit:
303 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
304 // CHECK1-NEXT: ret void
305 //
306 //
307 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
308 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
309 // CHECK1-NEXT: entry:
310 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
311 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
312 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
313 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
314 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
315 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
316 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
317 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
318 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
319 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
320 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
321 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
322 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
323 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
324 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
325 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
326 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
327 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
328 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
329 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
330 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
331 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
332 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
333 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
334 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
335 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
336 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
337 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
338 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
339 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
340 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
341 // CHECK1: cond.true:
342 // CHECK1-NEXT: br label [[COND_END:%.*]]
343 // CHECK1: cond.false:
344 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
345 // CHECK1-NEXT: br label [[COND_END]]
346 // CHECK1: cond.end:
347 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
348 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
349 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
350 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
351 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
352 // CHECK1: omp.inner.for.cond:
353 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
354 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
355 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
356 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
357 // CHECK1: omp.inner.for.body:
358 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
359 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
360 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
361 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
362 // CHECK1-NEXT: invoke void @_Z3foov()
363 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
364 // CHECK1: invoke.cont:
365 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
366 // CHECK1: omp.body.continue:
367 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
368 // CHECK1: omp.inner.for.inc:
369 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
370 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
371 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
372 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
373 // CHECK1: omp.inner.for.end:
374 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
375 // CHECK1: omp.loop.exit:
376 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
377 // CHECK1-NEXT: ret void
378 // CHECK1: terminate.lpad:
379 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
380 // CHECK1-NEXT: catch i8* null
381 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
382 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]]
383 // CHECK1-NEXT: unreachable
384 //
385 //
386 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate
387 // CHECK1-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
388 // CHECK1-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
389 // CHECK1-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
390 // CHECK1-NEXT: unreachable
391 //
392 //
393 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
394 // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
395 // CHECK1-NEXT: entry:
396 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
397 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
398 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
399 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
400 // CHECK1-NEXT: ret void
401 //
402 //
403 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
404 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
405 // CHECK1-NEXT: entry:
406 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
407 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
408 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
409 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
410 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
411 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
412 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
413 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
414 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
415 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
416 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
417 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
418 // CHECK1-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
419 // CHECK1-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
420 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
421 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
422 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
423 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
424 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
425 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
426 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
427 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
428 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
429 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
430 // CHECK1: cond.true:
431 // CHECK1-NEXT: br label [[COND_END:%.*]]
432 // CHECK1: cond.false:
433 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
434 // CHECK1-NEXT: br label [[COND_END]]
435 // CHECK1: cond.end:
436 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
437 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
438 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
439 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
440 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
441 // CHECK1: omp.inner.for.cond:
442 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
443 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
444 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
445 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
446 // CHECK1: omp.inner.for.body:
447 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1
448 // CHECK1-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
449 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
450 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
451 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
452 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
453 // CHECK1-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
454 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]])
455 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
456 // CHECK1: omp.inner.for.inc:
457 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
458 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
459 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
460 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
461 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
462 // CHECK1: omp.inner.for.end:
463 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
464 // CHECK1: omp.loop.exit:
465 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
466 // CHECK1-NEXT: ret void
467 //
468 //
469 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
470 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
471 // CHECK1-NEXT: entry:
472 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
473 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
474 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
475 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
476 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
477 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
478 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
479 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
480 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
481 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
482 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
483 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
484 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
485 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
486 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
487 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
488 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
489 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
490 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
491 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
492 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
493 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
494 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
495 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
496 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
497 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
498 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
499 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
500 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
501 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
502 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
503 // CHECK1: cond.true:
504 // CHECK1-NEXT: br label [[COND_END:%.*]]
505 // CHECK1: cond.false:
506 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
507 // CHECK1-NEXT: br label [[COND_END]]
508 // CHECK1: cond.end:
509 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
510 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
511 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
512 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
513 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
514 // CHECK1: omp.inner.for.cond:
515 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
516 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
517 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
518 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
519 // CHECK1: omp.inner.for.body:
520 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
521 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
522 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
523 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
524 // CHECK1-NEXT: invoke void @_Z3foov()
525 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
526 // CHECK1: invoke.cont:
527 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
528 // CHECK1: omp.body.continue:
529 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
530 // CHECK1: omp.inner.for.inc:
531 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
532 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
533 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
534 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
535 // CHECK1: omp.inner.for.end:
536 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
537 // CHECK1: omp.loop.exit:
538 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
539 // CHECK1-NEXT: ret void
540 // CHECK1: terminate.lpad:
541 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
542 // CHECK1-NEXT: catch i8* null
543 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
544 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
545 // CHECK1-NEXT: unreachable
546 //
547 //
548 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
549 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] comdat {
550 // CHECK1-NEXT: entry:
551 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
552 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
553 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
554 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
555 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
556 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
557 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
558 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
559 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
560 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
561 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
562 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
563 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
564 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
565 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
566 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
567 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
568 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
569 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
570 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
571 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
572 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
573 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
574 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
575 // CHECK1: omp_offload.failed:
576 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
577 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
578 // CHECK1: omp_offload.cont:
579 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
580 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
581 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
582 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
583 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
584 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
585 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
586 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
587 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
588 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
589 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
590 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
591 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
592 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
593 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
594 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
595 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
596 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
597 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
598 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
599 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
600 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
601 // CHECK1: omp_offload.failed3:
602 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
603 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
604 // CHECK1: omp_offload.cont4:
605 // CHECK1-NEXT: ret i32 0
606 //
607 //
608 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
609 // CHECK1-SAME: () #[[ATTR7]] comdat {
610 // CHECK1-NEXT: entry:
611 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
612 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
613 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
614 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
615 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
616 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
617 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
618 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
619 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
620 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
621 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
622 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
623 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
624 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
625 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
626 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
627 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
628 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
629 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
630 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
631 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
632 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
633 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
634 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
635 // CHECK1: omp_offload.failed:
636 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
637 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
638 // CHECK1: omp_offload.cont:
639 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
640 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
641 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
642 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
643 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
644 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
645 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
646 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
647 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
648 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
649 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
650 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
651 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
652 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
653 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
654 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
655 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
656 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
657 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
658 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
659 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
660 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
661 // CHECK1: omp_offload.failed3:
662 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
663 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
664 // CHECK1: omp_offload.cont4:
665 // CHECK1-NEXT: ret i32 0
666 //
667 //
668 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev
669 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
670 // CHECK1-NEXT: entry:
671 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
672 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
673 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
674 // CHECK1-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
675 // CHECK1-NEXT: ret void
676 //
677 //
678 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El
679 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
680 // CHECK1-NEXT: entry:
681 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
682 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
683 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
684 // CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
685 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
686 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
687 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
688 // CHECK1-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
689 // CHECK1-NEXT: ret void
690 //
691 //
692 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev
693 // CHECK1-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
694 // CHECK1-NEXT: entry:
695 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
696 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
697 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
698 // CHECK1-NEXT: ret void
699 //
700 //
701 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
702 // CHECK1-SAME: () #[[ATTR3]] {
703 // CHECK1-NEXT: entry:
704 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
705 // CHECK1-NEXT: ret void
706 //
707 //
708 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
709 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
710 // CHECK1-NEXT: entry:
711 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
712 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
713 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
714 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
715 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
716 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
717 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
718 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
719 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
720 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
721 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
722 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
723 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
724 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
725 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
726 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
727 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
728 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
729 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
730 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
731 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
732 // CHECK1: cond.true:
733 // CHECK1-NEXT: br label [[COND_END:%.*]]
734 // CHECK1: cond.false:
735 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
736 // CHECK1-NEXT: br label [[COND_END]]
737 // CHECK1: cond.end:
738 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
739 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
740 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
741 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
742 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
743 // CHECK1: omp.inner.for.cond:
744 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
745 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
746 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
747 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
748 // CHECK1: omp.inner.for.body:
749 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
750 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
751 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
752 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
753 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
754 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
755 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
756 // CHECK1: omp.inner.for.inc:
757 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
758 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
759 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
760 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
761 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
762 // CHECK1: omp.inner.for.end:
763 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
764 // CHECK1: omp.loop.exit:
765 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
766 // CHECK1-NEXT: ret void
767 //
768 //
769 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
770 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
771 // CHECK1-NEXT: entry:
772 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
773 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
774 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
775 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
776 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
777 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
778 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
779 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
780 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
781 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
782 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
783 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
784 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
785 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
786 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
787 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
788 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
789 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
790 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
791 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
792 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
793 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
794 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
795 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
796 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
797 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
798 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
799 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
800 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
801 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
802 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
803 // CHECK1: cond.true:
804 // CHECK1-NEXT: br label [[COND_END:%.*]]
805 // CHECK1: cond.false:
806 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
807 // CHECK1-NEXT: br label [[COND_END]]
808 // CHECK1: cond.end:
809 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
810 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
811 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
812 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
813 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
814 // CHECK1: omp.inner.for.cond:
815 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
816 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
817 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
818 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
819 // CHECK1: omp.inner.for.body:
820 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
821 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
822 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
823 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
824 // CHECK1-NEXT: invoke void @_Z3foov()
825 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
826 // CHECK1: invoke.cont:
827 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
828 // CHECK1: omp.body.continue:
829 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
830 // CHECK1: omp.inner.for.inc:
831 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
832 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
833 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
834 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
835 // CHECK1: omp.inner.for.end:
836 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
837 // CHECK1: omp.loop.exit:
838 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
839 // CHECK1-NEXT: ret void
840 // CHECK1: terminate.lpad:
841 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
842 // CHECK1-NEXT: catch i8* null
843 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
844 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
845 // CHECK1-NEXT: unreachable
846 //
847 //
848 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
849 // CHECK1-SAME: () #[[ATTR3]] {
850 // CHECK1-NEXT: entry:
851 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
852 // CHECK1-NEXT: ret void
853 //
854 //
855 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
856 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
857 // CHECK1-NEXT: entry:
858 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
859 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
860 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
861 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
862 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
863 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
864 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
865 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
866 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
867 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
868 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
869 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
870 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
871 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
872 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
873 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
874 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
875 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
876 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
877 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
878 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
879 // CHECK1: cond.true:
880 // CHECK1-NEXT: br label [[COND_END:%.*]]
881 // CHECK1: cond.false:
882 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
883 // CHECK1-NEXT: br label [[COND_END]]
884 // CHECK1: cond.end:
885 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
886 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
887 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
888 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
889 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
890 // CHECK1: omp.inner.for.cond:
891 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
892 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
893 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
894 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
895 // CHECK1: omp.inner.for.body:
896 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
897 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
898 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
899 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
900 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
901 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
902 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
903 // CHECK1: omp.inner.for.inc:
904 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
905 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
906 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
907 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
908 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
909 // CHECK1: omp.inner.for.end:
910 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
911 // CHECK1: omp.loop.exit:
912 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
913 // CHECK1-NEXT: ret void
914 //
915 //
916 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
917 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
918 // CHECK1-NEXT: entry:
919 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
920 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
921 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
922 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
923 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
924 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
925 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
926 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
927 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
928 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
929 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
930 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
931 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
932 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
933 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
934 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
935 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
936 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
937 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
938 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
939 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
940 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
941 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
942 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
943 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
944 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
945 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
946 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
947 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
948 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
949 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
950 // CHECK1: cond.true:
951 // CHECK1-NEXT: br label [[COND_END:%.*]]
952 // CHECK1: cond.false:
953 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
954 // CHECK1-NEXT: br label [[COND_END]]
955 // CHECK1: cond.end:
956 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
957 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
958 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
959 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
960 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
961 // CHECK1: omp.inner.for.cond:
962 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
963 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
964 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
965 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
966 // CHECK1: omp.inner.for.body:
967 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
968 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
969 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
970 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
971 // CHECK1-NEXT: invoke void @_Z3foov()
972 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
973 // CHECK1: invoke.cont:
974 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
975 // CHECK1: omp.body.continue:
976 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
977 // CHECK1: omp.inner.for.inc:
978 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
979 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
980 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
981 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
982 // CHECK1: omp.inner.for.end:
983 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
984 // CHECK1: omp.loop.exit:
985 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
986 // CHECK1-NEXT: ret void
987 // CHECK1: terminate.lpad:
988 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
989 // CHECK1-NEXT: catch i8* null
990 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
991 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
992 // CHECK1-NEXT: unreachable
993 //
994 //
995 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
996 // CHECK1-SAME: () #[[ATTR3]] {
997 // CHECK1-NEXT: entry:
998 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
999 // CHECK1-NEXT: ret void
1000 //
1001 //
1002 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
1003 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1004 // CHECK1-NEXT: entry:
1005 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1006 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1007 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1008 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1009 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1010 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1011 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1012 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1013 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1014 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1015 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1016 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1017 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1018 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1019 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1020 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1021 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1022 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1023 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1024 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1025 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1026 // CHECK1: cond.true:
1027 // CHECK1-NEXT: br label [[COND_END:%.*]]
1028 // CHECK1: cond.false:
1029 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1030 // CHECK1-NEXT: br label [[COND_END]]
1031 // CHECK1: cond.end:
1032 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1033 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1034 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1035 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1036 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1037 // CHECK1: omp.inner.for.cond:
1038 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1039 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1040 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1041 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1042 // CHECK1: omp.inner.for.body:
1043 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
1044 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1045 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1046 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1047 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1048 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1049 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1050 // CHECK1: omp.inner.for.inc:
1051 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1052 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1053 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1054 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1055 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1056 // CHECK1: omp.inner.for.end:
1057 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1058 // CHECK1: omp.loop.exit:
1059 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1060 // CHECK1-NEXT: ret void
1061 //
1062 //
1063 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
1064 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1065 // CHECK1-NEXT: entry:
1066 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1067 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1068 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1069 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1070 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1071 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1072 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1073 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1074 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1075 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1076 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1077 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1078 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1079 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1080 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1081 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1082 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1083 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1084 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1085 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1086 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1087 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1088 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1089 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1090 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1091 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1092 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1093 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1094 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1095 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1096 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1097 // CHECK1: cond.true:
1098 // CHECK1-NEXT: br label [[COND_END:%.*]]
1099 // CHECK1: cond.false:
1100 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1101 // CHECK1-NEXT: br label [[COND_END]]
1102 // CHECK1: cond.end:
1103 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1104 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1105 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1106 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1107 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1108 // CHECK1: omp.inner.for.cond:
1109 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1110 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1111 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1112 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1113 // CHECK1: omp.inner.for.body:
1114 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1115 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1116 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1117 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1118 // CHECK1-NEXT: invoke void @_Z3foov()
1119 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1120 // CHECK1: invoke.cont:
1121 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1122 // CHECK1: omp.body.continue:
1123 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1124 // CHECK1: omp.inner.for.inc:
1125 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1126 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1127 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1128 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1129 // CHECK1: omp.inner.for.end:
1130 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1131 // CHECK1: omp.loop.exit:
1132 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1133 // CHECK1-NEXT: ret void
1134 // CHECK1: terminate.lpad:
1135 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
1136 // CHECK1-NEXT: catch i8* null
1137 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1138 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
1139 // CHECK1-NEXT: unreachable
1140 //
1141 //
1142 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
1143 // CHECK1-SAME: () #[[ATTR3]] {
1144 // CHECK1-NEXT: entry:
1145 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1146 // CHECK1-NEXT: ret void
1147 //
1148 //
1149 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1150 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1151 // CHECK1-NEXT: entry:
1152 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1153 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1154 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1155 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1156 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1157 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1158 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1159 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1160 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1161 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1162 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1163 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1164 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1165 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1166 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1167 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1168 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1169 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1170 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1171 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1172 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1173 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1174 // CHECK1: cond.true:
1175 // CHECK1-NEXT: br label [[COND_END:%.*]]
1176 // CHECK1: cond.false:
1177 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1178 // CHECK1-NEXT: br label [[COND_END]]
1179 // CHECK1: cond.end:
1180 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1181 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1182 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1183 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1184 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1185 // CHECK1: omp.inner.for.cond:
1186 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1187 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1188 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1189 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1190 // CHECK1: omp.inner.for.body:
1191 // CHECK1-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
1192 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1193 // CHECK1: invoke.cont:
1194 // CHECK1-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
1195 // CHECK1-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
1196 // CHECK1: invoke.cont2:
1197 // CHECK1-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
1198 // CHECK1-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
1199 // CHECK1-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
1200 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1201 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1202 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1203 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1204 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]])
1205 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1206 // CHECK1: omp.inner.for.inc:
1207 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1208 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1209 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1210 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1211 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1212 // CHECK1: omp.inner.for.end:
1213 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1214 // CHECK1: omp.loop.exit:
1215 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1216 // CHECK1-NEXT: ret void
1217 // CHECK1: terminate.lpad:
1218 // CHECK1-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 }
1219 // CHECK1-NEXT: catch i8* null
1220 // CHECK1-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
1221 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]]
1222 // CHECK1-NEXT: unreachable
1223 //
1224 //
1225 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1226 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1227 // CHECK1-NEXT: entry:
1228 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1229 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1230 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1231 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1232 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1233 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1234 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1235 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1236 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1237 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1238 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1239 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1240 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1241 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1242 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1243 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1244 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1245 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1246 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1247 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1248 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1249 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1250 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1251 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1252 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1253 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1254 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1255 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1256 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1257 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1258 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1259 // CHECK1: cond.true:
1260 // CHECK1-NEXT: br label [[COND_END:%.*]]
1261 // CHECK1: cond.false:
1262 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1263 // CHECK1-NEXT: br label [[COND_END]]
1264 // CHECK1: cond.end:
1265 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1266 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1267 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1268 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1270 // CHECK1: omp.inner.for.cond:
1271 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1272 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1273 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1274 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1275 // CHECK1: omp.inner.for.body:
1276 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1277 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1278 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1279 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1280 // CHECK1-NEXT: invoke void @_Z3foov()
1281 // CHECK1-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1282 // CHECK1: invoke.cont:
1283 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1284 // CHECK1: omp.body.continue:
1285 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1286 // CHECK1: omp.inner.for.inc:
1287 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1288 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1289 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1290 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1291 // CHECK1: omp.inner.for.end:
1292 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1293 // CHECK1: omp.loop.exit:
1294 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1295 // CHECK1-NEXT: ret void
1296 // CHECK1: terminate.lpad:
1297 // CHECK1-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
1298 // CHECK1-NEXT: catch i8* null
1299 // CHECK1-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1300 // CHECK1-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
1301 // CHECK1-NEXT: unreachable
1302 //
1303 //
1304 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1305 // CHECK1-SAME: () #[[ATTR9:[0-9]+]] {
1306 // CHECK1-NEXT: entry:
1307 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1308 // CHECK1-NEXT: ret void
1309 //
1310 //
1311 // CHECK5-LABEL: define {{[^@]+}}@main
1312 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1313 // CHECK5-NEXT: entry:
1314 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1315 // CHECK5-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1316 // CHECK5-NEXT: [[A:%.*]] = alloca i8, align 1
1317 // CHECK5-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
1318 // CHECK5-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1319 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1320 // CHECK5-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
1321 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1322 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1323 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1324 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1325 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
1326 // CHECK5-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
1327 // CHECK5-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]])
1328 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1329 // CHECK5: invoke.cont:
1330 // CHECK5-NEXT: store i8 [[CALL]], i8* [[A]], align 1
1331 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1332 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1333 // CHECK5-NEXT: store i32 1, i32* [[TMP0]], align 4
1334 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1335 // CHECK5-NEXT: store i32 0, i32* [[TMP1]], align 4
1336 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1337 // CHECK5-NEXT: store i8** null, i8*** [[TMP2]], align 8
1338 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1339 // CHECK5-NEXT: store i8** null, i8*** [[TMP3]], align 8
1340 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1341 // CHECK5-NEXT: store i64* null, i64** [[TMP4]], align 8
1342 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1343 // CHECK5-NEXT: store i64* null, i64** [[TMP5]], align 8
1344 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1345 // CHECK5-NEXT: store i8** null, i8*** [[TMP6]], align 8
1346 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1347 // CHECK5-NEXT: store i8** null, i8*** [[TMP7]], align 8
1348 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1349 // CHECK5-NEXT: store i64 100, i64* [[TMP8]], align 8
1350 // CHECK5-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1351 // CHECK5-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1352 // CHECK5-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1353 // CHECK5: omp_offload.failed:
1354 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
1355 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
1356 // CHECK5: lpad:
1357 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
1358 // CHECK5-NEXT: cleanup
1359 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1360 // CHECK5-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
1361 // CHECK5-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
1362 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
1363 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1364 // CHECK5-NEXT: br label [[EH_RESUME:%.*]]
1365 // CHECK5: omp_offload.cont:
1366 // CHECK5-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
1367 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
1368 // CHECK5-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
1369 // CHECK5-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
1370 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1371 // CHECK5-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
1372 // CHECK5-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
1373 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1374 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
1375 // CHECK5-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
1376 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1377 // CHECK5-NEXT: store i8* null, i8** [[TMP20]], align 8
1378 // CHECK5-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1379 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1380 // CHECK5-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1381 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1382 // CHECK5-NEXT: store i32 1, i32* [[TMP23]], align 4
1383 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1384 // CHECK5-NEXT: store i32 1, i32* [[TMP24]], align 4
1385 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1386 // CHECK5-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
1387 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1388 // CHECK5-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
1389 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1390 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
1391 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1392 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
1393 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1394 // CHECK5-NEXT: store i8** null, i8*** [[TMP29]], align 8
1395 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1396 // CHECK5-NEXT: store i8** null, i8*** [[TMP30]], align 8
1397 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1398 // CHECK5-NEXT: store i64 100, i64* [[TMP31]], align 8
1399 // CHECK5-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1400 // CHECK5-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
1401 // CHECK5-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1402 // CHECK5: omp_offload.failed3:
1403 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
1404 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1405 // CHECK5: omp_offload.cont4:
1406 // CHECK5-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
1407 // CHECK5-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
1408 // CHECK5-NEXT: [[CALL7:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
1409 // CHECK5-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
1410 // CHECK5: invoke.cont6:
1411 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
1412 // CHECK5-NEXT: [[CALL9:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
1413 // CHECK5-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
1414 // CHECK5: invoke.cont8:
1415 // CHECK5-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
1416 // CHECK5-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
1417 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
1418 // CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
1419 // CHECK5-NEXT: ret i32 [[TMP35]]
1420 // CHECK5: eh.resume:
1421 // CHECK5-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
1422 // CHECK5-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
1423 // CHECK5-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
1424 // CHECK5-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1425 // CHECK5-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
1426 //
1427 //
1428 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El
1429 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1430 // CHECK5-NEXT: entry:
1431 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1432 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1433 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1434 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1435 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1436 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1437 // CHECK5-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
1438 // CHECK5-NEXT: ret void
1439 //
1440 //
1441 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv
1442 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
1443 // CHECK5-NEXT: entry:
1444 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1445 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1446 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1447 // CHECK5-NEXT: call void @_Z8mayThrowv()
1448 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1449 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
1450 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
1451 // CHECK5-NEXT: ret i8 [[CONV]]
1452 //
1453 //
1454 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
1455 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
1456 // CHECK5-NEXT: entry:
1457 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1458 // CHECK5-NEXT: ret void
1459 //
1460 //
1461 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
1462 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1463 // CHECK5-NEXT: entry:
1464 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1465 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1466 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1467 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1468 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1469 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1470 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1471 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1472 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1473 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1474 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1475 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1476 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1477 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1478 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1479 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1480 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1481 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1482 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1483 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1484 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1485 // CHECK5: cond.true:
1486 // CHECK5-NEXT: br label [[COND_END:%.*]]
1487 // CHECK5: cond.false:
1488 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1489 // CHECK5-NEXT: br label [[COND_END]]
1490 // CHECK5: cond.end:
1491 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1492 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1493 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1494 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1495 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1496 // CHECK5: omp.inner.for.cond:
1497 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1498 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1499 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1500 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1501 // CHECK5: omp.inner.for.body:
1502 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
1503 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1504 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1505 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1506 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1507 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1508 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1509 // CHECK5: omp.inner.for.inc:
1510 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1511 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1512 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1513 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1514 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1515 // CHECK5: omp.inner.for.end:
1516 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1517 // CHECK5: omp.loop.exit:
1518 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1519 // CHECK5-NEXT: ret void
1520 //
1521 //
1522 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
1523 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1524 // CHECK5-NEXT: entry:
1525 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1526 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1527 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1528 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1529 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1530 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1531 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1532 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1533 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1534 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1535 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1536 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1537 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1538 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1539 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1540 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1541 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1542 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1543 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1544 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1545 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1546 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1547 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1548 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1549 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1550 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1551 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1552 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1553 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1554 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1555 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1556 // CHECK5: cond.true:
1557 // CHECK5-NEXT: br label [[COND_END:%.*]]
1558 // CHECK5: cond.false:
1559 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1560 // CHECK5-NEXT: br label [[COND_END]]
1561 // CHECK5: cond.end:
1562 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1563 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1564 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1565 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1566 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1567 // CHECK5: omp.inner.for.cond:
1568 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1569 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1570 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1571 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1572 // CHECK5: omp.inner.for.body:
1573 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1574 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1575 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1576 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1577 // CHECK5-NEXT: invoke void @_Z3foov()
1578 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1579 // CHECK5: invoke.cont:
1580 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1581 // CHECK5: omp.body.continue:
1582 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1583 // CHECK5: omp.inner.for.inc:
1584 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1585 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1586 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1587 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1588 // CHECK5: omp.inner.for.end:
1589 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1590 // CHECK5: omp.loop.exit:
1591 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1592 // CHECK5-NEXT: ret void
1593 // CHECK5: terminate.lpad:
1594 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
1595 // CHECK5-NEXT: catch i8* null
1596 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1597 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]]
1598 // CHECK5-NEXT: unreachable
1599 //
1600 //
1601 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate
1602 // CHECK5-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1603 // CHECK5-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
1604 // CHECK5-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
1605 // CHECK5-NEXT: unreachable
1606 //
1607 //
1608 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
1609 // CHECK5-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
1610 // CHECK5-NEXT: entry:
1611 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1612 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1613 // CHECK5-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
1614 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
1615 // CHECK5-NEXT: ret void
1616 //
1617 //
1618 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
1619 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
1620 // CHECK5-NEXT: entry:
1621 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1622 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1623 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
1624 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1625 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1626 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1627 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1628 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1629 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1630 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1631 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1632 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1633 // CHECK5-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
1634 // CHECK5-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
1635 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1636 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1637 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1638 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1639 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1640 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1641 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1642 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1643 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
1644 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1645 // CHECK5: cond.true:
1646 // CHECK5-NEXT: br label [[COND_END:%.*]]
1647 // CHECK5: cond.false:
1648 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1649 // CHECK5-NEXT: br label [[COND_END]]
1650 // CHECK5: cond.end:
1651 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1652 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1653 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1654 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1655 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1656 // CHECK5: omp.inner.for.cond:
1657 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1658 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1659 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1660 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1661 // CHECK5: omp.inner.for.body:
1662 // CHECK5-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1
1663 // CHECK5-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
1664 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
1665 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1666 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1667 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1668 // CHECK5-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
1669 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]])
1670 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1671 // CHECK5: omp.inner.for.inc:
1672 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1673 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1674 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1675 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1676 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1677 // CHECK5: omp.inner.for.end:
1678 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1679 // CHECK5: omp.loop.exit:
1680 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1681 // CHECK5-NEXT: ret void
1682 //
1683 //
1684 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
1685 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1686 // CHECK5-NEXT: entry:
1687 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1688 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1689 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1690 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1691 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1692 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1693 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1694 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1695 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1696 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1697 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1698 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1699 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1700 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1701 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1702 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1703 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1704 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1705 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1706 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1707 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1708 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1709 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1710 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1711 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1712 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1713 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1714 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1715 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1716 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1717 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1718 // CHECK5: cond.true:
1719 // CHECK5-NEXT: br label [[COND_END:%.*]]
1720 // CHECK5: cond.false:
1721 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1722 // CHECK5-NEXT: br label [[COND_END]]
1723 // CHECK5: cond.end:
1724 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1725 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1726 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1727 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1728 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1729 // CHECK5: omp.inner.for.cond:
1730 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1731 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1732 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1733 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1734 // CHECK5: omp.inner.for.body:
1735 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1736 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1737 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1738 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1739 // CHECK5-NEXT: invoke void @_Z3foov()
1740 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1741 // CHECK5: invoke.cont:
1742 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1743 // CHECK5: omp.body.continue:
1744 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1745 // CHECK5: omp.inner.for.inc:
1746 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1747 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1748 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1749 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1750 // CHECK5: omp.inner.for.end:
1751 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1752 // CHECK5: omp.loop.exit:
1753 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1754 // CHECK5-NEXT: ret void
1755 // CHECK5: terminate.lpad:
1756 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
1757 // CHECK5-NEXT: catch i8* null
1758 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
1759 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
1760 // CHECK5-NEXT: unreachable
1761 //
1762 //
1763 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
1764 // CHECK5-SAME: () #[[ATTR7:[0-9]+]] comdat {
1765 // CHECK5-NEXT: entry:
1766 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1767 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1768 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1769 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1770 // CHECK5-NEXT: store i32 1, i32* [[TMP0]], align 4
1771 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1772 // CHECK5-NEXT: store i32 0, i32* [[TMP1]], align 4
1773 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1774 // CHECK5-NEXT: store i8** null, i8*** [[TMP2]], align 8
1775 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1776 // CHECK5-NEXT: store i8** null, i8*** [[TMP3]], align 8
1777 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1778 // CHECK5-NEXT: store i64* null, i64** [[TMP4]], align 8
1779 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1780 // CHECK5-NEXT: store i64* null, i64** [[TMP5]], align 8
1781 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1782 // CHECK5-NEXT: store i8** null, i8*** [[TMP6]], align 8
1783 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1784 // CHECK5-NEXT: store i8** null, i8*** [[TMP7]], align 8
1785 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1786 // CHECK5-NEXT: store i64 100, i64* [[TMP8]], align 8
1787 // CHECK5-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1788 // CHECK5-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1789 // CHECK5-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1790 // CHECK5: omp_offload.failed:
1791 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
1792 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
1793 // CHECK5: omp_offload.cont:
1794 // CHECK5-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1795 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1796 // CHECK5-NEXT: store i32 1, i32* [[TMP11]], align 4
1797 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1798 // CHECK5-NEXT: store i32 0, i32* [[TMP12]], align 4
1799 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1800 // CHECK5-NEXT: store i8** null, i8*** [[TMP13]], align 8
1801 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1802 // CHECK5-NEXT: store i8** null, i8*** [[TMP14]], align 8
1803 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1804 // CHECK5-NEXT: store i64* null, i64** [[TMP15]], align 8
1805 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1806 // CHECK5-NEXT: store i64* null, i64** [[TMP16]], align 8
1807 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1808 // CHECK5-NEXT: store i8** null, i8*** [[TMP17]], align 8
1809 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1810 // CHECK5-NEXT: store i8** null, i8*** [[TMP18]], align 8
1811 // CHECK5-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1812 // CHECK5-NEXT: store i64 100, i64* [[TMP19]], align 8
1813 // CHECK5-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1814 // CHECK5-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1815 // CHECK5-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1816 // CHECK5: omp_offload.failed3:
1817 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
1818 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1819 // CHECK5: omp_offload.cont4:
1820 // CHECK5-NEXT: ret i32 0
1821 //
1822 //
1823 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
1824 // CHECK5-SAME: () #[[ATTR7]] comdat {
1825 // CHECK5-NEXT: entry:
1826 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1827 // CHECK5-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1828 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1829 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1830 // CHECK5-NEXT: store i32 1, i32* [[TMP0]], align 4
1831 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1832 // CHECK5-NEXT: store i32 0, i32* [[TMP1]], align 4
1833 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1834 // CHECK5-NEXT: store i8** null, i8*** [[TMP2]], align 8
1835 // CHECK5-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1836 // CHECK5-NEXT: store i8** null, i8*** [[TMP3]], align 8
1837 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1838 // CHECK5-NEXT: store i64* null, i64** [[TMP4]], align 8
1839 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1840 // CHECK5-NEXT: store i64* null, i64** [[TMP5]], align 8
1841 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1842 // CHECK5-NEXT: store i8** null, i8*** [[TMP6]], align 8
1843 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1844 // CHECK5-NEXT: store i8** null, i8*** [[TMP7]], align 8
1845 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1846 // CHECK5-NEXT: store i64 100, i64* [[TMP8]], align 8
1847 // CHECK5-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1848 // CHECK5-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1849 // CHECK5-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1850 // CHECK5: omp_offload.failed:
1851 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
1852 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
1853 // CHECK5: omp_offload.cont:
1854 // CHECK5-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1855 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1856 // CHECK5-NEXT: store i32 1, i32* [[TMP11]], align 4
1857 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1858 // CHECK5-NEXT: store i32 0, i32* [[TMP12]], align 4
1859 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1860 // CHECK5-NEXT: store i8** null, i8*** [[TMP13]], align 8
1861 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1862 // CHECK5-NEXT: store i8** null, i8*** [[TMP14]], align 8
1863 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1864 // CHECK5-NEXT: store i64* null, i64** [[TMP15]], align 8
1865 // CHECK5-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1866 // CHECK5-NEXT: store i64* null, i64** [[TMP16]], align 8
1867 // CHECK5-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1868 // CHECK5-NEXT: store i8** null, i8*** [[TMP17]], align 8
1869 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1870 // CHECK5-NEXT: store i8** null, i8*** [[TMP18]], align 8
1871 // CHECK5-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1872 // CHECK5-NEXT: store i64 100, i64* [[TMP19]], align 8
1873 // CHECK5-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1874 // CHECK5-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1875 // CHECK5-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1876 // CHECK5: omp_offload.failed3:
1877 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
1878 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1879 // CHECK5: omp_offload.cont4:
1880 // CHECK5-NEXT: ret i32 0
1881 //
1882 //
1883 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev
1884 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
1885 // CHECK5-NEXT: entry:
1886 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1887 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1888 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1889 // CHECK5-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
1890 // CHECK5-NEXT: ret void
1891 //
1892 //
1893 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El
1894 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
1895 // CHECK5-NEXT: entry:
1896 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1897 // CHECK5-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
1898 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1899 // CHECK5-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
1900 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1901 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1902 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
1903 // CHECK5-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
1904 // CHECK5-NEXT: ret void
1905 //
1906 //
1907 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
1908 // CHECK5-SAME: () #[[ATTR3]] {
1909 // CHECK5-NEXT: entry:
1910 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
1911 // CHECK5-NEXT: ret void
1912 //
1913 //
1914 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..4
1915 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1916 // CHECK5-NEXT: entry:
1917 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1918 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1919 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1920 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1921 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1922 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1923 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1924 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1925 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1926 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1927 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1928 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1929 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1930 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1931 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1932 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1933 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1934 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1935 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1936 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1937 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1938 // CHECK5: cond.true:
1939 // CHECK5-NEXT: br label [[COND_END:%.*]]
1940 // CHECK5: cond.false:
1941 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1942 // CHECK5-NEXT: br label [[COND_END]]
1943 // CHECK5: cond.end:
1944 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1945 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1946 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1947 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1948 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1949 // CHECK5: omp.inner.for.cond:
1950 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1951 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1952 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1953 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1954 // CHECK5: omp.inner.for.body:
1955 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
1956 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1957 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1958 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1959 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1960 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
1961 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1962 // CHECK5: omp.inner.for.inc:
1963 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1964 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1965 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1966 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1967 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
1968 // CHECK5: omp.inner.for.end:
1969 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1970 // CHECK5: omp.loop.exit:
1971 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1972 // CHECK5-NEXT: ret void
1973 //
1974 //
1975 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..5
1976 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
1977 // CHECK5-NEXT: entry:
1978 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1979 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1980 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1981 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1982 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1983 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1984 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1985 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1986 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1987 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1988 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1989 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1990 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1991 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1992 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1993 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1994 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1995 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1996 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1997 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1998 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1999 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2000 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2001 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2002 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2003 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2004 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2005 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2006 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2007 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2008 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2009 // CHECK5: cond.true:
2010 // CHECK5-NEXT: br label [[COND_END:%.*]]
2011 // CHECK5: cond.false:
2012 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2013 // CHECK5-NEXT: br label [[COND_END]]
2014 // CHECK5: cond.end:
2015 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2016 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2017 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2018 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2019 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2020 // CHECK5: omp.inner.for.cond:
2021 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2022 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2023 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2024 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2025 // CHECK5: omp.inner.for.body:
2026 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2027 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2028 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2029 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2030 // CHECK5-NEXT: invoke void @_Z3foov()
2031 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2032 // CHECK5: invoke.cont:
2033 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2034 // CHECK5: omp.body.continue:
2035 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2036 // CHECK5: omp.inner.for.inc:
2037 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2038 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2039 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2040 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2041 // CHECK5: omp.inner.for.end:
2042 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2043 // CHECK5: omp.loop.exit:
2044 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2045 // CHECK5-NEXT: ret void
2046 // CHECK5: terminate.lpad:
2047 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
2048 // CHECK5-NEXT: catch i8* null
2049 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2050 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
2051 // CHECK5-NEXT: unreachable
2052 //
2053 //
2054 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
2055 // CHECK5-SAME: () #[[ATTR3]] {
2056 // CHECK5-NEXT: entry:
2057 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
2058 // CHECK5-NEXT: ret void
2059 //
2060 //
2061 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
2062 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2063 // CHECK5-NEXT: entry:
2064 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2065 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2066 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2067 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2068 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2069 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2070 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2071 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2072 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2073 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2074 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2075 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2076 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2077 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2078 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2079 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2080 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2081 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2082 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2083 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2084 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2085 // CHECK5: cond.true:
2086 // CHECK5-NEXT: br label [[COND_END:%.*]]
2087 // CHECK5: cond.false:
2088 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2089 // CHECK5-NEXT: br label [[COND_END]]
2090 // CHECK5: cond.end:
2091 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2092 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2093 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2094 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2095 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2096 // CHECK5: omp.inner.for.cond:
2097 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2098 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2099 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2100 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2101 // CHECK5: omp.inner.for.body:
2102 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
2103 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2104 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2105 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2106 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2107 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2108 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2109 // CHECK5: omp.inner.for.inc:
2110 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2111 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2112 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2113 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2114 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2115 // CHECK5: omp.inner.for.end:
2116 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2117 // CHECK5: omp.loop.exit:
2118 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2119 // CHECK5-NEXT: ret void
2120 //
2121 //
2122 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
2123 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2124 // CHECK5-NEXT: entry:
2125 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2126 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2127 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2128 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2129 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2130 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2131 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2132 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2133 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2134 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2135 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2136 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2137 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2138 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2139 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2140 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2141 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2142 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2143 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2144 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2145 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2146 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2147 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2148 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2149 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2150 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2151 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2152 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2153 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2154 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2155 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2156 // CHECK5: cond.true:
2157 // CHECK5-NEXT: br label [[COND_END:%.*]]
2158 // CHECK5: cond.false:
2159 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2160 // CHECK5-NEXT: br label [[COND_END]]
2161 // CHECK5: cond.end:
2162 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2163 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2164 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2165 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2166 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2167 // CHECK5: omp.inner.for.cond:
2168 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2169 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2170 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2171 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2172 // CHECK5: omp.inner.for.body:
2173 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2174 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2175 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2176 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2177 // CHECK5-NEXT: invoke void @_Z3foov()
2178 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2179 // CHECK5: invoke.cont:
2180 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2181 // CHECK5: omp.body.continue:
2182 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2183 // CHECK5: omp.inner.for.inc:
2184 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2185 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2186 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2187 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2188 // CHECK5: omp.inner.for.end:
2189 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2190 // CHECK5: omp.loop.exit:
2191 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2192 // CHECK5-NEXT: ret void
2193 // CHECK5: terminate.lpad:
2194 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
2195 // CHECK5-NEXT: catch i8* null
2196 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2197 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
2198 // CHECK5-NEXT: unreachable
2199 //
2200 //
2201 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
2202 // CHECK5-SAME: () #[[ATTR3]] {
2203 // CHECK5-NEXT: entry:
2204 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
2205 // CHECK5-NEXT: ret void
2206 //
2207 //
2208 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..8
2209 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2210 // CHECK5-NEXT: entry:
2211 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2212 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2213 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2214 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2215 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2216 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2217 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2218 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2219 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2220 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2221 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2222 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2223 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2224 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2225 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2226 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2227 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2228 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2229 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2230 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2231 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2232 // CHECK5: cond.true:
2233 // CHECK5-NEXT: br label [[COND_END:%.*]]
2234 // CHECK5: cond.false:
2235 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2236 // CHECK5-NEXT: br label [[COND_END]]
2237 // CHECK5: cond.end:
2238 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2239 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2240 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2241 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2242 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2243 // CHECK5: omp.inner.for.cond:
2244 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2245 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2246 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2247 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2248 // CHECK5: omp.inner.for.body:
2249 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
2250 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2251 // CHECK5-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2252 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2253 // CHECK5-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2254 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2255 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2256 // CHECK5: omp.inner.for.inc:
2257 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2258 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2259 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2260 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2261 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2262 // CHECK5: omp.inner.for.end:
2263 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2264 // CHECK5: omp.loop.exit:
2265 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2266 // CHECK5-NEXT: ret void
2267 //
2268 //
2269 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..9
2270 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2271 // CHECK5-NEXT: entry:
2272 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2273 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2274 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2275 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2276 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2277 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2278 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2279 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2280 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2281 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2282 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2283 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2284 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2285 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2286 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2287 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2288 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2289 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2290 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2291 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2292 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2293 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2294 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2295 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2296 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2297 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2298 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2299 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2300 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2301 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2302 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2303 // CHECK5: cond.true:
2304 // CHECK5-NEXT: br label [[COND_END:%.*]]
2305 // CHECK5: cond.false:
2306 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2307 // CHECK5-NEXT: br label [[COND_END]]
2308 // CHECK5: cond.end:
2309 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2310 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2311 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2312 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2313 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2314 // CHECK5: omp.inner.for.cond:
2315 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2316 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2317 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2318 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2319 // CHECK5: omp.inner.for.body:
2320 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2321 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2322 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2323 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2324 // CHECK5-NEXT: invoke void @_Z3foov()
2325 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2326 // CHECK5: invoke.cont:
2327 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2328 // CHECK5: omp.body.continue:
2329 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2330 // CHECK5: omp.inner.for.inc:
2331 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2332 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2333 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2334 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2335 // CHECK5: omp.inner.for.end:
2336 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2337 // CHECK5: omp.loop.exit:
2338 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2339 // CHECK5-NEXT: ret void
2340 // CHECK5: terminate.lpad:
2341 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
2342 // CHECK5-NEXT: catch i8* null
2343 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2344 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
2345 // CHECK5-NEXT: unreachable
2346 //
2347 //
2348 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
2349 // CHECK5-SAME: () #[[ATTR3]] {
2350 // CHECK5-NEXT: entry:
2351 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
2352 // CHECK5-NEXT: ret void
2353 //
2354 //
2355 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
2356 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2357 // CHECK5-NEXT: entry:
2358 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2359 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2360 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2361 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2362 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2363 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2364 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2365 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2366 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2367 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2368 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2369 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2370 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2371 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2372 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2373 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2374 // CHECK5-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2375 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2376 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2377 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2378 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2379 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2380 // CHECK5: cond.true:
2381 // CHECK5-NEXT: br label [[COND_END:%.*]]
2382 // CHECK5: cond.false:
2383 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2384 // CHECK5-NEXT: br label [[COND_END]]
2385 // CHECK5: cond.end:
2386 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2387 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2388 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2389 // CHECK5-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2390 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2391 // CHECK5: omp.inner.for.cond:
2392 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2393 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2394 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2395 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2396 // CHECK5: omp.inner.for.body:
2397 // CHECK5-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
2398 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2399 // CHECK5: invoke.cont:
2400 // CHECK5-NEXT: [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
2401 // CHECK5-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
2402 // CHECK5: invoke.cont2:
2403 // CHECK5-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
2404 // CHECK5-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
2405 // CHECK5-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
2406 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2407 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2408 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2409 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2410 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]])
2411 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2412 // CHECK5: omp.inner.for.inc:
2413 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2414 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2415 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2416 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2417 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2418 // CHECK5: omp.inner.for.end:
2419 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2420 // CHECK5: omp.loop.exit:
2421 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2422 // CHECK5-NEXT: ret void
2423 // CHECK5: terminate.lpad:
2424 // CHECK5-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 }
2425 // CHECK5-NEXT: catch i8* null
2426 // CHECK5-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
2427 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]]
2428 // CHECK5-NEXT: unreachable
2429 //
2430 //
2431 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
2432 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2433 // CHECK5-NEXT: entry:
2434 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2435 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2436 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2437 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2438 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2439 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2440 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2441 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2442 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2443 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2444 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2445 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2446 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2447 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2448 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2449 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2450 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2451 // CHECK5-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2452 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2453 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2454 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2455 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2456 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2457 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2458 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2459 // CHECK5-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2460 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2461 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2462 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2463 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2464 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2465 // CHECK5: cond.true:
2466 // CHECK5-NEXT: br label [[COND_END:%.*]]
2467 // CHECK5: cond.false:
2468 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2469 // CHECK5-NEXT: br label [[COND_END]]
2470 // CHECK5: cond.end:
2471 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2472 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2473 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2474 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2475 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2476 // CHECK5: omp.inner.for.cond:
2477 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2478 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2479 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2480 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2481 // CHECK5: omp.inner.for.body:
2482 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2483 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2484 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2485 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2486 // CHECK5-NEXT: invoke void @_Z3foov()
2487 // CHECK5-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2488 // CHECK5: invoke.cont:
2489 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2490 // CHECK5: omp.body.continue:
2491 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2492 // CHECK5: omp.inner.for.inc:
2493 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2494 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2495 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2496 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2497 // CHECK5: omp.inner.for.end:
2498 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2499 // CHECK5: omp.loop.exit:
2500 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2501 // CHECK5-NEXT: ret void
2502 // CHECK5: terminate.lpad:
2503 // CHECK5-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
2504 // CHECK5-NEXT: catch i8* null
2505 // CHECK5-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2506 // CHECK5-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
2507 // CHECK5-NEXT: unreachable
2508 //
2509 //
2510 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev
2511 // CHECK5-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
2512 // CHECK5-NEXT: entry:
2513 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2514 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2515 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2516 // CHECK5-NEXT: ret void
2517 //
2518 //
2519 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2520 // CHECK5-SAME: () #[[ATTR9:[0-9]+]] {
2521 // CHECK5-NEXT: entry:
2522 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
2523 // CHECK5-NEXT: ret void
2524 //
2525 //
2526 // CHECK9-LABEL: define {{[^@]+}}@main
2527 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2528 // CHECK9-NEXT: entry:
2529 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2530 // CHECK9-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2531 // CHECK9-NEXT: [[A:%.*]] = alloca i8, align 1
2532 // CHECK9-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
2533 // CHECK9-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2534 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2535 // CHECK9-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
2536 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2537 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2538 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2539 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2540 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
2541 // CHECK9-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
2542 // CHECK9-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]])
2543 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2544 // CHECK9: invoke.cont:
2545 // CHECK9-NEXT: store i8 [[CALL]], i8* [[A]], align 1
2546 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2547 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2548 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
2549 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2550 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
2551 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2552 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
2553 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2554 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
2555 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2556 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
2557 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2558 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
2559 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2560 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
2561 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2562 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
2563 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2564 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
2565 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2566 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2567 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2568 // CHECK9: omp_offload.failed:
2569 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
2570 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
2571 // CHECK9: lpad:
2572 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
2573 // CHECK9-NEXT: cleanup
2574 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2575 // CHECK9-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
2576 // CHECK9-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
2577 // CHECK9-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
2578 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
2579 // CHECK9-NEXT: br label [[EH_RESUME:%.*]]
2580 // CHECK9: omp_offload.cont:
2581 // CHECK9-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
2582 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
2583 // CHECK9-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
2584 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
2585 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2586 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
2587 // CHECK9-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
2588 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2589 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
2590 // CHECK9-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
2591 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2592 // CHECK9-NEXT: store i8* null, i8** [[TMP20]], align 8
2593 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2594 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2595 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2596 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
2597 // CHECK9-NEXT: store i32 1, i32* [[TMP23]], align 4
2598 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
2599 // CHECK9-NEXT: store i32 1, i32* [[TMP24]], align 4
2600 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
2601 // CHECK9-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
2602 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
2603 // CHECK9-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
2604 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
2605 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
2606 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
2607 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
2608 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
2609 // CHECK9-NEXT: store i8** null, i8*** [[TMP29]], align 8
2610 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
2611 // CHECK9-NEXT: store i8** null, i8*** [[TMP30]], align 8
2612 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
2613 // CHECK9-NEXT: store i64 100, i64* [[TMP31]], align 8
2614 // CHECK9-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
2615 // CHECK9-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
2616 // CHECK9-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2617 // CHECK9: omp_offload.failed3:
2618 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
2619 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
2620 // CHECK9: omp_offload.cont4:
2621 // CHECK9-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
2622 // CHECK9-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
2623 // CHECK9-NEXT: [[CALL7:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
2624 // CHECK9-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
2625 // CHECK9: invoke.cont6:
2626 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
2627 // CHECK9-NEXT: [[CALL9:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
2628 // CHECK9-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
2629 // CHECK9: invoke.cont8:
2630 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
2631 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
2632 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
2633 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
2634 // CHECK9-NEXT: ret i32 [[TMP35]]
2635 // CHECK9: eh.resume:
2636 // CHECK9-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
2637 // CHECK9-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
2638 // CHECK9-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
2639 // CHECK9-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2640 // CHECK9-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
2641 //
2642 //
2643 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
2644 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2645 // CHECK9-NEXT: entry:
2646 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2647 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2648 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2649 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2650 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2651 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
2652 // CHECK9-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
2653 // CHECK9-NEXT: ret void
2654 //
2655 //
2656 // CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
2657 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
2658 // CHECK9-NEXT: entry:
2659 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
2660 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
2661 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
2662 // CHECK9-NEXT: call void @_Z8mayThrowv()
2663 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2664 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
2665 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
2666 // CHECK9-NEXT: ret i8 [[CONV]]
2667 //
2668 //
2669 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
2670 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
2671 // CHECK9-NEXT: entry:
2672 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
2673 // CHECK9-NEXT: ret void
2674 //
2675 //
2676 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
2677 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
2678 // CHECK9-NEXT: entry:
2679 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2680 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2681 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2682 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2683 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2684 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2685 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2686 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2687 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2688 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2689 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2690 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2691 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2692 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2693 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2694 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2695 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2696 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2697 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2698 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2699 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2700 // CHECK9: cond.true:
2701 // CHECK9-NEXT: br label [[COND_END:%.*]]
2702 // CHECK9: cond.false:
2703 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2704 // CHECK9-NEXT: br label [[COND_END]]
2705 // CHECK9: cond.end:
2706 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2707 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2708 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2709 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2710 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2711 // CHECK9: omp.inner.for.cond:
2712 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2713 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2714 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2715 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2716 // CHECK9: omp.inner.for.body:
2717 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
2718 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2719 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2720 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2721 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2722 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
2723 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2724 // CHECK9: omp.inner.for.inc:
2725 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2726 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2727 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2728 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2729 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2730 // CHECK9: omp.inner.for.end:
2731 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2732 // CHECK9: omp.loop.exit:
2733 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2734 // CHECK9-NEXT: ret void
2735 //
2736 //
2737 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
2738 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2739 // CHECK9-NEXT: entry:
2740 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2741 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2742 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2743 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2744 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2745 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2746 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2747 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2748 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2749 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2750 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2751 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2752 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2753 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2754 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2755 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2756 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2757 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2758 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2759 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2760 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2761 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2762 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2763 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2764 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2765 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2766 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2767 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2768 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2769 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2770 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2771 // CHECK9: cond.true:
2772 // CHECK9-NEXT: br label [[COND_END:%.*]]
2773 // CHECK9: cond.false:
2774 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2775 // CHECK9-NEXT: br label [[COND_END]]
2776 // CHECK9: cond.end:
2777 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2778 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2779 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2780 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2781 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2782 // CHECK9: omp.inner.for.cond:
2783 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2784 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2785 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2786 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2787 // CHECK9: omp.inner.for.body:
2788 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2789 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2790 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2791 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2792 // CHECK9-NEXT: invoke void @_Z3foov()
2793 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2794 // CHECK9: invoke.cont:
2795 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2796 // CHECK9: omp.body.continue:
2797 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2798 // CHECK9: omp.inner.for.inc:
2799 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2800 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2801 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2802 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2803 // CHECK9: omp.inner.for.end:
2804 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2805 // CHECK9: omp.loop.exit:
2806 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2807 // CHECK9-NEXT: ret void
2808 // CHECK9: terminate.lpad:
2809 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
2810 // CHECK9-NEXT: catch i8* null
2811 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2812 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]]
2813 // CHECK9-NEXT: unreachable
2814 //
2815 //
2816 // CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate
2817 // CHECK9-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2818 // CHECK9-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
2819 // CHECK9-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
2820 // CHECK9-NEXT: unreachable
2821 //
2822 //
2823 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
2824 // CHECK9-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
2825 // CHECK9-NEXT: entry:
2826 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2827 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
2828 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
2829 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
2830 // CHECK9-NEXT: ret void
2831 //
2832 //
2833 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
2834 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
2835 // CHECK9-NEXT: entry:
2836 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2837 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2838 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
2839 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2840 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2841 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2842 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2843 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2844 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2845 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2846 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2847 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2848 // CHECK9-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
2849 // CHECK9-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
2850 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2851 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2852 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2853 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2854 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2855 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2856 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2857 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2858 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
2859 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2860 // CHECK9: cond.true:
2861 // CHECK9-NEXT: br label [[COND_END:%.*]]
2862 // CHECK9: cond.false:
2863 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2864 // CHECK9-NEXT: br label [[COND_END]]
2865 // CHECK9: cond.end:
2866 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2867 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2868 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2869 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2870 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2871 // CHECK9: omp.inner.for.cond:
2872 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2873 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2874 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2875 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2876 // CHECK9: omp.inner.for.body:
2877 // CHECK9-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1
2878 // CHECK9-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
2879 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
2880 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2881 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2882 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2883 // CHECK9-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
2884 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]])
2885 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2886 // CHECK9: omp.inner.for.inc:
2887 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2888 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2889 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2890 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2891 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2892 // CHECK9: omp.inner.for.end:
2893 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2894 // CHECK9: omp.loop.exit:
2895 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2896 // CHECK9-NEXT: ret void
2897 //
2898 //
2899 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
2900 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
2901 // CHECK9-NEXT: entry:
2902 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2903 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2904 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2905 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2906 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2907 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2908 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2909 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2910 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2911 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2912 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
2913 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2914 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2915 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2916 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2917 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2918 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2919 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2920 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2921 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2922 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2923 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2924 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2925 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2926 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2927 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2928 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2929 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2930 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2931 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2932 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2933 // CHECK9: cond.true:
2934 // CHECK9-NEXT: br label [[COND_END:%.*]]
2935 // CHECK9: cond.false:
2936 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2937 // CHECK9-NEXT: br label [[COND_END]]
2938 // CHECK9: cond.end:
2939 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2940 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2941 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2942 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2943 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2944 // CHECK9: omp.inner.for.cond:
2945 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2946 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2947 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2948 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2949 // CHECK9: omp.inner.for.body:
2950 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2951 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2952 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2953 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2954 // CHECK9-NEXT: invoke void @_Z3foov()
2955 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2956 // CHECK9: invoke.cont:
2957 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2958 // CHECK9: omp.body.continue:
2959 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2960 // CHECK9: omp.inner.for.inc:
2961 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2962 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2963 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2964 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
2965 // CHECK9: omp.inner.for.end:
2966 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2967 // CHECK9: omp.loop.exit:
2968 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2969 // CHECK9-NEXT: ret void
2970 // CHECK9: terminate.lpad:
2971 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
2972 // CHECK9-NEXT: catch i8* null
2973 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
2974 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
2975 // CHECK9-NEXT: unreachable
2976 //
2977 //
2978 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
2979 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] comdat {
2980 // CHECK9-NEXT: entry:
2981 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
2982 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2983 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2984 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2985 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
2986 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2987 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
2988 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2989 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
2990 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2991 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
2992 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2993 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
2994 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2995 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
2996 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2997 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
2998 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2999 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
3000 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3001 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
3002 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3003 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3004 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3005 // CHECK9: omp_offload.failed:
3006 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
3007 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
3008 // CHECK9: omp_offload.cont:
3009 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3010 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
3011 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
3012 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
3013 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
3014 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
3015 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
3016 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
3017 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
3018 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
3019 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
3020 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
3021 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
3022 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
3023 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
3024 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
3025 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
3026 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
3027 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
3028 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
3029 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
3030 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3031 // CHECK9: omp_offload.failed3:
3032 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
3033 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
3034 // CHECK9: omp_offload.cont4:
3035 // CHECK9-NEXT: ret i32 0
3036 //
3037 //
3038 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
3039 // CHECK9-SAME: () #[[ATTR7]] comdat {
3040 // CHECK9-NEXT: entry:
3041 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3042 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3043 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3044 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3045 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
3046 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3047 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
3048 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3049 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
3050 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3051 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
3052 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3053 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
3054 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3055 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
3056 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3057 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
3058 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3059 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
3060 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3061 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
3062 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3063 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3064 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3065 // CHECK9: omp_offload.failed:
3066 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
3067 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
3068 // CHECK9: omp_offload.cont:
3069 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3070 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
3071 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
3072 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
3073 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
3074 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
3075 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
3076 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
3077 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
3078 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
3079 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
3080 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
3081 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
3082 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
3083 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
3084 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
3085 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
3086 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
3087 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
3088 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
3089 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
3090 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3091 // CHECK9: omp_offload.failed3:
3092 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
3093 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
3094 // CHECK9: omp_offload.cont4:
3095 // CHECK9-NEXT: ret i32 0
3096 //
3097 //
3098 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
3099 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
3100 // CHECK9-NEXT: entry:
3101 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3102 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3103 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3104 // CHECK9-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
3105 // CHECK9-NEXT: ret void
3106 //
3107 //
3108 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
3109 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
3110 // CHECK9-NEXT: entry:
3111 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3112 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3113 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3114 // CHECK9-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3115 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3116 // CHECK9-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3117 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3118 // CHECK9-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
3119 // CHECK9-NEXT: ret void
3120 //
3121 //
3122 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3123 // CHECK9-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
3124 // CHECK9-NEXT: entry:
3125 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3126 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3127 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3128 // CHECK9-NEXT: ret void
3129 //
3130 //
3131 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
3132 // CHECK9-SAME: () #[[ATTR3]] {
3133 // CHECK9-NEXT: entry:
3134 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
3135 // CHECK9-NEXT: ret void
3136 //
3137 //
3138 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
3139 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3140 // CHECK9-NEXT: entry:
3141 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3142 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3143 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3144 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3145 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3146 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3147 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3148 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3149 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3150 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3151 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3152 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3153 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3154 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3155 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3156 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3157 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3158 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3159 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3160 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3161 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3162 // CHECK9: cond.true:
3163 // CHECK9-NEXT: br label [[COND_END:%.*]]
3164 // CHECK9: cond.false:
3165 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3166 // CHECK9-NEXT: br label [[COND_END]]
3167 // CHECK9: cond.end:
3168 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3169 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3170 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3171 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3172 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3173 // CHECK9: omp.inner.for.cond:
3174 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3175 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3176 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3177 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3178 // CHECK9: omp.inner.for.body:
3179 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
3180 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3181 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3182 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3183 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3184 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3185 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3186 // CHECK9: omp.inner.for.inc:
3187 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3188 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3189 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3190 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3191 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3192 // CHECK9: omp.inner.for.end:
3193 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3194 // CHECK9: omp.loop.exit:
3195 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3196 // CHECK9-NEXT: ret void
3197 //
3198 //
3199 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
3200 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3201 // CHECK9-NEXT: entry:
3202 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3203 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3204 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3205 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3206 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3207 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3208 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3209 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3210 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3211 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3212 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3213 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3214 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3215 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3216 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3217 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3218 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3219 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3220 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3221 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3222 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3223 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3224 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3225 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3226 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3227 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3228 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3229 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3230 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3231 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3232 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3233 // CHECK9: cond.true:
3234 // CHECK9-NEXT: br label [[COND_END:%.*]]
3235 // CHECK9: cond.false:
3236 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3237 // CHECK9-NEXT: br label [[COND_END]]
3238 // CHECK9: cond.end:
3239 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3240 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3241 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3242 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3243 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3244 // CHECK9: omp.inner.for.cond:
3245 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3246 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3247 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3248 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3249 // CHECK9: omp.inner.for.body:
3250 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3251 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3252 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3253 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3254 // CHECK9-NEXT: invoke void @_Z3foov()
3255 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3256 // CHECK9: invoke.cont:
3257 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3258 // CHECK9: omp.body.continue:
3259 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3260 // CHECK9: omp.inner.for.inc:
3261 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3262 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3263 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3264 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3265 // CHECK9: omp.inner.for.end:
3266 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3267 // CHECK9: omp.loop.exit:
3268 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3269 // CHECK9-NEXT: ret void
3270 // CHECK9: terminate.lpad:
3271 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
3272 // CHECK9-NEXT: catch i8* null
3273 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3274 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
3275 // CHECK9-NEXT: unreachable
3276 //
3277 //
3278 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
3279 // CHECK9-SAME: () #[[ATTR3]] {
3280 // CHECK9-NEXT: entry:
3281 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
3282 // CHECK9-NEXT: ret void
3283 //
3284 //
3285 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
3286 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3287 // CHECK9-NEXT: entry:
3288 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3289 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3290 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3291 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3292 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3293 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3294 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3295 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3296 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3297 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3298 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3299 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3300 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3301 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3302 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3303 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3304 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3305 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3306 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3307 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3308 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3309 // CHECK9: cond.true:
3310 // CHECK9-NEXT: br label [[COND_END:%.*]]
3311 // CHECK9: cond.false:
3312 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3313 // CHECK9-NEXT: br label [[COND_END]]
3314 // CHECK9: cond.end:
3315 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3316 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3317 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3318 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3319 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3320 // CHECK9: omp.inner.for.cond:
3321 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3322 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3323 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3324 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3325 // CHECK9: omp.inner.for.body:
3326 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
3327 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3328 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3329 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3330 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3331 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3332 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3333 // CHECK9: omp.inner.for.inc:
3334 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3335 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3336 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3337 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3338 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3339 // CHECK9: omp.inner.for.end:
3340 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3341 // CHECK9: omp.loop.exit:
3342 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3343 // CHECK9-NEXT: ret void
3344 //
3345 //
3346 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
3347 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3348 // CHECK9-NEXT: entry:
3349 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3350 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3351 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3352 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3353 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3354 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3355 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3356 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3357 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3358 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3359 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3360 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3361 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3362 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3363 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3364 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3365 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3366 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3367 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3368 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3369 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3370 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3371 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3372 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3373 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3374 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3375 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3376 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3377 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3378 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3379 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3380 // CHECK9: cond.true:
3381 // CHECK9-NEXT: br label [[COND_END:%.*]]
3382 // CHECK9: cond.false:
3383 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3384 // CHECK9-NEXT: br label [[COND_END]]
3385 // CHECK9: cond.end:
3386 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3387 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3388 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3389 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3390 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3391 // CHECK9: omp.inner.for.cond:
3392 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3393 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3394 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3395 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3396 // CHECK9: omp.inner.for.body:
3397 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3398 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3399 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3400 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3401 // CHECK9-NEXT: invoke void @_Z3foov()
3402 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3403 // CHECK9: invoke.cont:
3404 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3405 // CHECK9: omp.body.continue:
3406 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3407 // CHECK9: omp.inner.for.inc:
3408 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3409 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3410 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3411 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3412 // CHECK9: omp.inner.for.end:
3413 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3414 // CHECK9: omp.loop.exit:
3415 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3416 // CHECK9-NEXT: ret void
3417 // CHECK9: terminate.lpad:
3418 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
3419 // CHECK9-NEXT: catch i8* null
3420 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3421 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
3422 // CHECK9-NEXT: unreachable
3423 //
3424 //
3425 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
3426 // CHECK9-SAME: () #[[ATTR3]] {
3427 // CHECK9-NEXT: entry:
3428 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
3429 // CHECK9-NEXT: ret void
3430 //
3431 //
3432 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
3433 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3434 // CHECK9-NEXT: entry:
3435 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3436 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3437 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3438 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3439 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3440 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3441 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3442 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3443 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3444 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3445 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3446 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3447 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3448 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3449 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3450 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3451 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3452 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3453 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3454 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3455 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3456 // CHECK9: cond.true:
3457 // CHECK9-NEXT: br label [[COND_END:%.*]]
3458 // CHECK9: cond.false:
3459 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3460 // CHECK9-NEXT: br label [[COND_END]]
3461 // CHECK9: cond.end:
3462 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3463 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3464 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3465 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3466 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3467 // CHECK9: omp.inner.for.cond:
3468 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3469 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3470 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3471 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3472 // CHECK9: omp.inner.for.body:
3473 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
3474 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3475 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3476 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3477 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3478 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3479 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3480 // CHECK9: omp.inner.for.inc:
3481 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3482 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3483 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3484 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3485 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3486 // CHECK9: omp.inner.for.end:
3487 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3488 // CHECK9: omp.loop.exit:
3489 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3490 // CHECK9-NEXT: ret void
3491 //
3492 //
3493 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
3494 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3495 // CHECK9-NEXT: entry:
3496 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3497 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3498 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3499 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3500 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3501 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3502 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3503 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3504 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3505 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3506 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3507 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3508 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3509 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3510 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3511 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3512 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3513 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3514 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3515 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3516 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3517 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3518 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3519 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3520 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3521 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3522 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3523 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3524 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3525 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3526 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3527 // CHECK9: cond.true:
3528 // CHECK9-NEXT: br label [[COND_END:%.*]]
3529 // CHECK9: cond.false:
3530 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3531 // CHECK9-NEXT: br label [[COND_END]]
3532 // CHECK9: cond.end:
3533 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3534 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3535 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3536 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3537 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3538 // CHECK9: omp.inner.for.cond:
3539 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3540 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3541 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3542 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3543 // CHECK9: omp.inner.for.body:
3544 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3545 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3546 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3547 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3548 // CHECK9-NEXT: invoke void @_Z3foov()
3549 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3550 // CHECK9: invoke.cont:
3551 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3552 // CHECK9: omp.body.continue:
3553 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3554 // CHECK9: omp.inner.for.inc:
3555 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3556 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3557 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3558 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3559 // CHECK9: omp.inner.for.end:
3560 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3561 // CHECK9: omp.loop.exit:
3562 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3563 // CHECK9-NEXT: ret void
3564 // CHECK9: terminate.lpad:
3565 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
3566 // CHECK9-NEXT: catch i8* null
3567 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3568 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
3569 // CHECK9-NEXT: unreachable
3570 //
3571 //
3572 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
3573 // CHECK9-SAME: () #[[ATTR3]] {
3574 // CHECK9-NEXT: entry:
3575 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
3576 // CHECK9-NEXT: ret void
3577 //
3578 //
3579 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
3580 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3581 // CHECK9-NEXT: entry:
3582 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3583 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3584 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3585 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3586 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3587 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3588 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3589 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3590 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3591 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3592 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3593 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3594 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3595 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3596 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3597 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3598 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3599 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3600 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3601 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3602 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3603 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3604 // CHECK9: cond.true:
3605 // CHECK9-NEXT: br label [[COND_END:%.*]]
3606 // CHECK9: cond.false:
3607 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3608 // CHECK9-NEXT: br label [[COND_END]]
3609 // CHECK9: cond.end:
3610 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3611 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3612 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3613 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3614 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3615 // CHECK9: omp.inner.for.cond:
3616 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3617 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3618 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3619 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3620 // CHECK9: omp.inner.for.body:
3621 // CHECK9-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
3622 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3623 // CHECK9: invoke.cont:
3624 // CHECK9-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
3625 // CHECK9-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
3626 // CHECK9: invoke.cont2:
3627 // CHECK9-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
3628 // CHECK9-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
3629 // CHECK9-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
3630 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3631 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3632 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3633 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3634 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]])
3635 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3636 // CHECK9: omp.inner.for.inc:
3637 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3638 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3639 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3640 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3641 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3642 // CHECK9: omp.inner.for.end:
3643 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3644 // CHECK9: omp.loop.exit:
3645 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3646 // CHECK9-NEXT: ret void
3647 // CHECK9: terminate.lpad:
3648 // CHECK9-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 }
3649 // CHECK9-NEXT: catch i8* null
3650 // CHECK9-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
3651 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]]
3652 // CHECK9-NEXT: unreachable
3653 //
3654 //
3655 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11
3656 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3657 // CHECK9-NEXT: entry:
3658 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3659 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3660 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3661 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3662 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3663 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
3664 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3665 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3666 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3667 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3668 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
3669 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3670 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3671 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3672 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3673 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3674 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3675 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3676 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3677 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3678 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3679 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3680 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3681 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3682 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3683 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3684 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3685 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3686 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3687 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3688 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3689 // CHECK9: cond.true:
3690 // CHECK9-NEXT: br label [[COND_END:%.*]]
3691 // CHECK9: cond.false:
3692 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3693 // CHECK9-NEXT: br label [[COND_END]]
3694 // CHECK9: cond.end:
3695 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3696 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3697 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3698 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3699 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3700 // CHECK9: omp.inner.for.cond:
3701 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3702 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3703 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3704 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3705 // CHECK9: omp.inner.for.body:
3706 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3707 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3708 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3709 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3710 // CHECK9-NEXT: invoke void @_Z3foov()
3711 // CHECK9-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3712 // CHECK9: invoke.cont:
3713 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3714 // CHECK9: omp.body.continue:
3715 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3716 // CHECK9: omp.inner.for.inc:
3717 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3718 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3719 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3720 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
3721 // CHECK9: omp.inner.for.end:
3722 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3723 // CHECK9: omp.loop.exit:
3724 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3725 // CHECK9-NEXT: ret void
3726 // CHECK9: terminate.lpad:
3727 // CHECK9-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
3728 // CHECK9-NEXT: catch i8* null
3729 // CHECK9-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3730 // CHECK9-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
3731 // CHECK9-NEXT: unreachable
3732 //
3733 //
3734 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3735 // CHECK9-SAME: () #[[ATTR9:[0-9]+]] {
3736 // CHECK9-NEXT: entry:
3737 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
3738 // CHECK9-NEXT: ret void
3739 //
3740 //
3741 // CHECK13-LABEL: define {{[^@]+}}@main
3742 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3743 // CHECK13-NEXT: entry:
3744 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3745 // CHECK13-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3746 // CHECK13-NEXT: [[A:%.*]] = alloca i8, align 1
3747 // CHECK13-NEXT: [[EXN_SLOT:%.*]] = alloca i8*, align 8
3748 // CHECK13-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
3749 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
3750 // CHECK13-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
3751 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3752 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3753 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3754 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3755 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
3756 // CHECK13-NEXT: call void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
3757 // CHECK13-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]])
3758 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
3759 // CHECK13: invoke.cont:
3760 // CHECK13-NEXT: store i8 [[CALL]], i8* [[A]], align 1
3761 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3762 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3763 // CHECK13-NEXT: store i32 1, i32* [[TMP0]], align 4
3764 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3765 // CHECK13-NEXT: store i32 0, i32* [[TMP1]], align 4
3766 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3767 // CHECK13-NEXT: store i8** null, i8*** [[TMP2]], align 8
3768 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3769 // CHECK13-NEXT: store i8** null, i8*** [[TMP3]], align 8
3770 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3771 // CHECK13-NEXT: store i64* null, i64** [[TMP4]], align 8
3772 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3773 // CHECK13-NEXT: store i64* null, i64** [[TMP5]], align 8
3774 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3775 // CHECK13-NEXT: store i8** null, i8*** [[TMP6]], align 8
3776 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3777 // CHECK13-NEXT: store i8** null, i8*** [[TMP7]], align 8
3778 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3779 // CHECK13-NEXT: store i64 100, i64* [[TMP8]], align 8
3780 // CHECK13-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3781 // CHECK13-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
3782 // CHECK13-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3783 // CHECK13: omp_offload.failed:
3784 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR6:[0-9]+]]
3785 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
3786 // CHECK13: lpad:
3787 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
3788 // CHECK13-NEXT: cleanup
3789 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
3790 // CHECK13-NEXT: store i8* [[TMP12]], i8** [[EXN_SLOT]], align 8
3791 // CHECK13-NEXT: [[TMP13:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 1
3792 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[EHSELECTOR_SLOT]], align 4
3793 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3794 // CHECK13-NEXT: br label [[EH_RESUME:%.*]]
3795 // CHECK13: omp_offload.cont:
3796 // CHECK13-NEXT: [[TMP14:%.*]] = load i8, i8* [[A]], align 1
3797 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_CASTED]] to i8*
3798 // CHECK13-NEXT: store i8 [[TMP14]], i8* [[CONV]], align 1
3799 // CHECK13-NEXT: [[TMP15:%.*]] = load i64, i64* [[A_CASTED]], align 8
3800 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3801 // CHECK13-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i64*
3802 // CHECK13-NEXT: store i64 [[TMP15]], i64* [[TMP17]], align 8
3803 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3804 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
3805 // CHECK13-NEXT: store i64 [[TMP15]], i64* [[TMP19]], align 8
3806 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3807 // CHECK13-NEXT: store i8* null, i8** [[TMP20]], align 8
3808 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3809 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3810 // CHECK13-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3811 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
3812 // CHECK13-NEXT: store i32 1, i32* [[TMP23]], align 4
3813 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
3814 // CHECK13-NEXT: store i32 1, i32* [[TMP24]], align 4
3815 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
3816 // CHECK13-NEXT: store i8** [[TMP21]], i8*** [[TMP25]], align 8
3817 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
3818 // CHECK13-NEXT: store i8** [[TMP22]], i8*** [[TMP26]], align 8
3819 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
3820 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP27]], align 8
3821 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
3822 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP28]], align 8
3823 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
3824 // CHECK13-NEXT: store i8** null, i8*** [[TMP29]], align 8
3825 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
3826 // CHECK13-NEXT: store i8** null, i8*** [[TMP30]], align 8
3827 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
3828 // CHECK13-NEXT: store i64 100, i64* [[TMP31]], align 8
3829 // CHECK13-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
3830 // CHECK13-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
3831 // CHECK13-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3832 // CHECK13: omp_offload.failed3:
3833 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP15]]) #[[ATTR6]]
3834 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT4]]
3835 // CHECK13: omp_offload.cont4:
3836 // CHECK13-NEXT: [[TMP34:%.*]] = load i8, i8* [[A]], align 1
3837 // CHECK13-NEXT: [[CONV5:%.*]] = sext i8 [[TMP34]] to i32
3838 // CHECK13-NEXT: [[CALL7:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
3839 // CHECK13-NEXT: to label [[INVOKE_CONT6:%.*]] unwind label [[LPAD]]
3840 // CHECK13: invoke.cont6:
3841 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV5]], [[CALL7]]
3842 // CHECK13-NEXT: [[CALL9:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
3843 // CHECK13-NEXT: to label [[INVOKE_CONT8:%.*]] unwind label [[LPAD]]
3844 // CHECK13: invoke.cont8:
3845 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[ADD]], [[CALL9]]
3846 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[RETVAL]], align 4
3847 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR6]]
3848 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[RETVAL]], align 4
3849 // CHECK13-NEXT: ret i32 [[TMP35]]
3850 // CHECK13: eh.resume:
3851 // CHECK13-NEXT: [[EXN:%.*]] = load i8*, i8** [[EXN_SLOT]], align 8
3852 // CHECK13-NEXT: [[SEL:%.*]] = load i32, i32* [[EHSELECTOR_SLOT]], align 4
3853 // CHECK13-NEXT: [[LPAD_VAL:%.*]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
3854 // CHECK13-NEXT: [[LPAD_VAL11:%.*]] = insertvalue { i8*, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
3855 // CHECK13-NEXT: resume { i8*, i32 } [[LPAD_VAL11]]
3856 //
3857 //
3858 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
3859 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3860 // CHECK13-NEXT: entry:
3861 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3862 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
3863 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3864 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
3865 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3866 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
3867 // CHECK13-NEXT: call void @_ZN1SC2El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
3868 // CHECK13-NEXT: ret void
3869 //
3870 //
3871 // CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
3872 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] comdat align 2 {
3873 // CHECK13-NEXT: entry:
3874 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
3875 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
3876 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
3877 // CHECK13-NEXT: call void @_Z8mayThrowv()
3878 // CHECK13-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3879 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A]], align 8
3880 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
3881 // CHECK13-NEXT: ret i8 [[CONV]]
3882 //
3883 //
3884 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
3885 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] {
3886 // CHECK13-NEXT: entry:
3887 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
3888 // CHECK13-NEXT: ret void
3889 //
3890 //
3891 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
3892 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3893 // CHECK13-NEXT: entry:
3894 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3895 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3896 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3897 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
3898 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3899 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3900 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3901 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3902 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
3903 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3904 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3905 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3906 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3907 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3908 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3909 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3910 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3911 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3912 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3913 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3914 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3915 // CHECK13: cond.true:
3916 // CHECK13-NEXT: br label [[COND_END:%.*]]
3917 // CHECK13: cond.false:
3918 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3919 // CHECK13-NEXT: br label [[COND_END]]
3920 // CHECK13: cond.end:
3921 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3922 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3923 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3924 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3925 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3926 // CHECK13: omp.inner.for.cond:
3927 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3928 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3929 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3930 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3931 // CHECK13: omp.inner.for.body:
3932 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 2)
3933 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3934 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3935 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3936 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3937 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
3938 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3939 // CHECK13: omp.inner.for.inc:
3940 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3941 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3942 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3943 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3944 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
3945 // CHECK13: omp.inner.for.end:
3946 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3947 // CHECK13: omp.loop.exit:
3948 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3949 // CHECK13-NEXT: ret void
3950 //
3951 //
3952 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
3953 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
3954 // CHECK13-NEXT: entry:
3955 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3956 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3957 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3958 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3959 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3960 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
3961 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3962 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3963 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3964 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3965 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
3966 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3967 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3968 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3969 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3970 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3971 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3972 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3973 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3974 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3975 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3976 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3977 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3978 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3979 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3980 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3981 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3982 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3983 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3984 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3985 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3986 // CHECK13: cond.true:
3987 // CHECK13-NEXT: br label [[COND_END:%.*]]
3988 // CHECK13: cond.false:
3989 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3990 // CHECK13-NEXT: br label [[COND_END]]
3991 // CHECK13: cond.end:
3992 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3993 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3994 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3995 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3996 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3997 // CHECK13: omp.inner.for.cond:
3998 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3999 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4000 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4001 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4002 // CHECK13: omp.inner.for.body:
4003 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4004 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4005 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4006 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4007 // CHECK13-NEXT: invoke void @_Z3foov()
4008 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4009 // CHECK13: invoke.cont:
4010 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4011 // CHECK13: omp.body.continue:
4012 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4013 // CHECK13: omp.inner.for.inc:
4014 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4015 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4016 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4017 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4018 // CHECK13: omp.inner.for.end:
4019 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4020 // CHECK13: omp.loop.exit:
4021 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4022 // CHECK13-NEXT: ret void
4023 // CHECK13: terminate.lpad:
4024 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
4025 // CHECK13-NEXT: catch i8* null
4026 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4027 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10:[0-9]+]]
4028 // CHECK13-NEXT: unreachable
4029 //
4030 //
4031 // CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate
4032 // CHECK13-SAME: (i8* [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
4033 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @__cxa_begin_catch(i8* [[TMP0]]) #[[ATTR6]]
4034 // CHECK13-NEXT: call void @_ZSt9terminatev() #[[ATTR10]]
4035 // CHECK13-NEXT: unreachable
4036 //
4037 //
4038 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
4039 // CHECK13-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
4040 // CHECK13-NEXT: entry:
4041 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
4042 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
4043 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i8*
4044 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i8* [[CONV]])
4045 // CHECK13-NEXT: ret void
4046 //
4047 //
4048 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
4049 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8* noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR3]] {
4050 // CHECK13-NEXT: entry:
4051 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4052 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4053 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i8*, align 8
4054 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4055 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4056 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4057 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4058 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4059 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4060 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4061 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4062 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4063 // CHECK13-NEXT: store i8* [[A]], i8** [[A_ADDR]], align 8
4064 // CHECK13-NEXT: [[TMP0:%.*]] = load i8*, i8** [[A_ADDR]], align 8
4065 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4066 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4067 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4068 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4069 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4070 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4071 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4072 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4073 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
4074 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4075 // CHECK13: cond.true:
4076 // CHECK13-NEXT: br label [[COND_END:%.*]]
4077 // CHECK13: cond.false:
4078 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4079 // CHECK13-NEXT: br label [[COND_END]]
4080 // CHECK13: cond.end:
4081 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4082 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4083 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4084 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4085 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4086 // CHECK13: omp.inner.for.cond:
4087 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4088 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4089 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4090 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4091 // CHECK13: omp.inner.for.body:
4092 // CHECK13-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP0]], align 1
4093 // CHECK13-NEXT: [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
4094 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
4095 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4096 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4097 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4098 // CHECK13-NEXT: [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
4099 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP11]], i64 [[TMP13]])
4100 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4101 // CHECK13: omp.inner.for.inc:
4102 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4103 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4104 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4105 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4106 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4107 // CHECK13: omp.inner.for.end:
4108 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4109 // CHECK13: omp.loop.exit:
4110 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4111 // CHECK13-NEXT: ret void
4112 //
4113 //
4114 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
4115 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4116 // CHECK13-NEXT: entry:
4117 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4118 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4119 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4120 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4121 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4122 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4123 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4124 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4125 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4126 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4127 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4128 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4129 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4130 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4131 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4132 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4133 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4134 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4135 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4136 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4137 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4138 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4139 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4140 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4141 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4142 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4143 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4144 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4145 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4146 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4147 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4148 // CHECK13: cond.true:
4149 // CHECK13-NEXT: br label [[COND_END:%.*]]
4150 // CHECK13: cond.false:
4151 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4152 // CHECK13-NEXT: br label [[COND_END]]
4153 // CHECK13: cond.end:
4154 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4155 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4156 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4157 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4158 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4159 // CHECK13: omp.inner.for.cond:
4160 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4161 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4162 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4163 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4164 // CHECK13: omp.inner.for.body:
4165 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4166 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4167 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4168 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4169 // CHECK13-NEXT: invoke void @_Z3foov()
4170 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4171 // CHECK13: invoke.cont:
4172 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4173 // CHECK13: omp.body.continue:
4174 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4175 // CHECK13: omp.inner.for.inc:
4176 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4177 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4178 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4179 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4180 // CHECK13: omp.inner.for.end:
4181 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4182 // CHECK13: omp.loop.exit:
4183 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4184 // CHECK13-NEXT: ret void
4185 // CHECK13: terminate.lpad:
4186 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
4187 // CHECK13-NEXT: catch i8* null
4188 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4189 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
4190 // CHECK13-NEXT: unreachable
4191 //
4192 //
4193 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
4194 // CHECK13-SAME: () #[[ATTR7:[0-9]+]] comdat {
4195 // CHECK13-NEXT: entry:
4196 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4197 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4198 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4199 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4200 // CHECK13-NEXT: store i32 1, i32* [[TMP0]], align 4
4201 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4202 // CHECK13-NEXT: store i32 0, i32* [[TMP1]], align 4
4203 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4204 // CHECK13-NEXT: store i8** null, i8*** [[TMP2]], align 8
4205 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4206 // CHECK13-NEXT: store i8** null, i8*** [[TMP3]], align 8
4207 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4208 // CHECK13-NEXT: store i64* null, i64** [[TMP4]], align 8
4209 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4210 // CHECK13-NEXT: store i64* null, i64** [[TMP5]], align 8
4211 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4212 // CHECK13-NEXT: store i8** null, i8*** [[TMP6]], align 8
4213 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4214 // CHECK13-NEXT: store i8** null, i8*** [[TMP7]], align 8
4215 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4216 // CHECK13-NEXT: store i64 100, i64* [[TMP8]], align 8
4217 // CHECK13-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4218 // CHECK13-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4219 // CHECK13-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4220 // CHECK13: omp_offload.failed:
4221 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR6]]
4222 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
4223 // CHECK13: omp_offload.cont:
4224 // CHECK13-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4225 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4226 // CHECK13-NEXT: store i32 1, i32* [[TMP11]], align 4
4227 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4228 // CHECK13-NEXT: store i32 0, i32* [[TMP12]], align 4
4229 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4230 // CHECK13-NEXT: store i8** null, i8*** [[TMP13]], align 8
4231 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4232 // CHECK13-NEXT: store i8** null, i8*** [[TMP14]], align 8
4233 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4234 // CHECK13-NEXT: store i64* null, i64** [[TMP15]], align 8
4235 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4236 // CHECK13-NEXT: store i64* null, i64** [[TMP16]], align 8
4237 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4238 // CHECK13-NEXT: store i8** null, i8*** [[TMP17]], align 8
4239 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4240 // CHECK13-NEXT: store i8** null, i8*** [[TMP18]], align 8
4241 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4242 // CHECK13-NEXT: store i64 100, i64* [[TMP19]], align 8
4243 // CHECK13-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4244 // CHECK13-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4245 // CHECK13-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4246 // CHECK13: omp_offload.failed3:
4247 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR6]]
4248 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4249 // CHECK13: omp_offload.cont4:
4250 // CHECK13-NEXT: ret i32 0
4251 //
4252 //
4253 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
4254 // CHECK13-SAME: () #[[ATTR7]] comdat {
4255 // CHECK13-NEXT: entry:
4256 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4257 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4258 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4259 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4260 // CHECK13-NEXT: store i32 1, i32* [[TMP0]], align 4
4261 // CHECK13-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4262 // CHECK13-NEXT: store i32 0, i32* [[TMP1]], align 4
4263 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4264 // CHECK13-NEXT: store i8** null, i8*** [[TMP2]], align 8
4265 // CHECK13-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4266 // CHECK13-NEXT: store i8** null, i8*** [[TMP3]], align 8
4267 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4268 // CHECK13-NEXT: store i64* null, i64** [[TMP4]], align 8
4269 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4270 // CHECK13-NEXT: store i64* null, i64** [[TMP5]], align 8
4271 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4272 // CHECK13-NEXT: store i8** null, i8*** [[TMP6]], align 8
4273 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4274 // CHECK13-NEXT: store i8** null, i8*** [[TMP7]], align 8
4275 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4276 // CHECK13-NEXT: store i64 100, i64* [[TMP8]], align 8
4277 // CHECK13-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4278 // CHECK13-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4279 // CHECK13-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4280 // CHECK13: omp_offload.failed:
4281 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR6]]
4282 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
4283 // CHECK13: omp_offload.cont:
4284 // CHECK13-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4285 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4286 // CHECK13-NEXT: store i32 1, i32* [[TMP11]], align 4
4287 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4288 // CHECK13-NEXT: store i32 0, i32* [[TMP12]], align 4
4289 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4290 // CHECK13-NEXT: store i8** null, i8*** [[TMP13]], align 8
4291 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4292 // CHECK13-NEXT: store i8** null, i8*** [[TMP14]], align 8
4293 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4294 // CHECK13-NEXT: store i64* null, i64** [[TMP15]], align 8
4295 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4296 // CHECK13-NEXT: store i64* null, i64** [[TMP16]], align 8
4297 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4298 // CHECK13-NEXT: store i8** null, i8*** [[TMP17]], align 8
4299 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4300 // CHECK13-NEXT: store i8** null, i8*** [[TMP18]], align 8
4301 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4302 // CHECK13-NEXT: store i64 100, i64* [[TMP19]], align 8
4303 // CHECK13-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4304 // CHECK13-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4305 // CHECK13-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4306 // CHECK13: omp_offload.failed3:
4307 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR6]]
4308 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4309 // CHECK13: omp_offload.cont4:
4310 // CHECK13-NEXT: ret i32 0
4311 //
4312 //
4313 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
4314 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] comdat align 2 {
4315 // CHECK13-NEXT: entry:
4316 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4317 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4318 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4319 // CHECK13-NEXT: call void @_ZN1SD2Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR6]]
4320 // CHECK13-NEXT: ret void
4321 //
4322 //
4323 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
4324 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
4325 // CHECK13-NEXT: entry:
4326 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4327 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
4328 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4329 // CHECK13-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
4330 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4331 // CHECK13-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
4332 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[A_ADDR]], align 8
4333 // CHECK13-NEXT: store i64 [[TMP0]], i64* [[A2]], align 8
4334 // CHECK13-NEXT: ret void
4335 //
4336 //
4337 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
4338 // CHECK13-SAME: () #[[ATTR3]] {
4339 // CHECK13-NEXT: entry:
4340 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4341 // CHECK13-NEXT: ret void
4342 //
4343 //
4344 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..4
4345 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4346 // CHECK13-NEXT: entry:
4347 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4348 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4349 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4350 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4351 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4352 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4353 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4354 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4355 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4356 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4357 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4358 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4359 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4360 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4361 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4362 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4363 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4364 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4365 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4366 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4367 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4368 // CHECK13: cond.true:
4369 // CHECK13-NEXT: br label [[COND_END:%.*]]
4370 // CHECK13: cond.false:
4371 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4372 // CHECK13-NEXT: br label [[COND_END]]
4373 // CHECK13: cond.end:
4374 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4375 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4376 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4377 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4378 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4379 // CHECK13: omp.inner.for.cond:
4380 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4381 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4382 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4383 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4384 // CHECK13: omp.inner.for.body:
4385 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 5)
4386 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4387 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4388 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4389 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4390 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4391 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4392 // CHECK13: omp.inner.for.inc:
4393 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4394 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4395 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4396 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4397 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4398 // CHECK13: omp.inner.for.end:
4399 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4400 // CHECK13: omp.loop.exit:
4401 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4402 // CHECK13-NEXT: ret void
4403 //
4404 //
4405 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
4406 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4407 // CHECK13-NEXT: entry:
4408 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4409 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4410 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4411 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4412 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4413 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4414 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4415 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4416 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4417 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4418 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4419 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4420 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4421 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4422 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4423 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4424 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4425 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4426 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4427 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4428 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4429 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4430 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4431 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4432 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4433 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4434 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4435 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4436 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4437 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4438 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4439 // CHECK13: cond.true:
4440 // CHECK13-NEXT: br label [[COND_END:%.*]]
4441 // CHECK13: cond.false:
4442 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4443 // CHECK13-NEXT: br label [[COND_END]]
4444 // CHECK13: cond.end:
4445 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4446 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4447 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4448 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4449 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4450 // CHECK13: omp.inner.for.cond:
4451 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4452 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4453 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4454 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4455 // CHECK13: omp.inner.for.body:
4456 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4457 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4458 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4459 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4460 // CHECK13-NEXT: invoke void @_Z3foov()
4461 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4462 // CHECK13: invoke.cont:
4463 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4464 // CHECK13: omp.body.continue:
4465 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4466 // CHECK13: omp.inner.for.inc:
4467 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4468 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4469 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4470 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4471 // CHECK13: omp.inner.for.end:
4472 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4473 // CHECK13: omp.loop.exit:
4474 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4475 // CHECK13-NEXT: ret void
4476 // CHECK13: terminate.lpad:
4477 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
4478 // CHECK13-NEXT: catch i8* null
4479 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4480 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
4481 // CHECK13-NEXT: unreachable
4482 //
4483 //
4484 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
4485 // CHECK13-SAME: () #[[ATTR3]] {
4486 // CHECK13-NEXT: entry:
4487 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
4488 // CHECK13-NEXT: ret void
4489 //
4490 //
4491 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
4492 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4493 // CHECK13-NEXT: entry:
4494 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4495 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4496 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4497 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4498 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4499 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4500 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4501 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4502 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4503 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4504 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4505 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4506 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4507 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4508 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4509 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4510 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4511 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4512 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4513 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4514 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4515 // CHECK13: cond.true:
4516 // CHECK13-NEXT: br label [[COND_END:%.*]]
4517 // CHECK13: cond.false:
4518 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4519 // CHECK13-NEXT: br label [[COND_END]]
4520 // CHECK13: cond.end:
4521 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4522 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4523 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4524 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4525 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4526 // CHECK13: omp.inner.for.cond:
4527 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4528 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4529 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4530 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4531 // CHECK13: omp.inner.for.body:
4532 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 23)
4533 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4534 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4535 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4536 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4537 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4538 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4539 // CHECK13: omp.inner.for.inc:
4540 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4541 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4542 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4543 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4544 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4545 // CHECK13: omp.inner.for.end:
4546 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4547 // CHECK13: omp.loop.exit:
4548 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4549 // CHECK13-NEXT: ret void
4550 //
4551 //
4552 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
4553 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4554 // CHECK13-NEXT: entry:
4555 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4556 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4557 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4558 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4559 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4560 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4561 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4562 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4563 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4564 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4565 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4566 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4567 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4568 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4569 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4570 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4571 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4572 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4573 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4574 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4575 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4576 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4577 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4578 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4579 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4580 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4581 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4582 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4583 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4584 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4585 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4586 // CHECK13: cond.true:
4587 // CHECK13-NEXT: br label [[COND_END:%.*]]
4588 // CHECK13: cond.false:
4589 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4590 // CHECK13-NEXT: br label [[COND_END]]
4591 // CHECK13: cond.end:
4592 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4593 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4594 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4595 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4596 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4597 // CHECK13: omp.inner.for.cond:
4598 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4599 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4600 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4601 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4602 // CHECK13: omp.inner.for.body:
4603 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4604 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4605 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4606 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4607 // CHECK13-NEXT: invoke void @_Z3foov()
4608 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4609 // CHECK13: invoke.cont:
4610 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4611 // CHECK13: omp.body.continue:
4612 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4613 // CHECK13: omp.inner.for.inc:
4614 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4615 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4616 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4617 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4618 // CHECK13: omp.inner.for.end:
4619 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4620 // CHECK13: omp.loop.exit:
4621 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4622 // CHECK13-NEXT: ret void
4623 // CHECK13: terminate.lpad:
4624 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
4625 // CHECK13-NEXT: catch i8* null
4626 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4627 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
4628 // CHECK13-NEXT: unreachable
4629 //
4630 //
4631 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
4632 // CHECK13-SAME: () #[[ATTR3]] {
4633 // CHECK13-NEXT: entry:
4634 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*))
4635 // CHECK13-NEXT: ret void
4636 //
4637 //
4638 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
4639 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
4640 // CHECK13-NEXT: entry:
4641 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4642 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4643 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4644 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4645 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4646 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4647 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4648 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4649 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4650 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4651 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4652 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4653 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4654 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4655 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4656 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4657 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4658 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4659 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4660 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4661 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4662 // CHECK13: cond.true:
4663 // CHECK13-NEXT: br label [[COND_END:%.*]]
4664 // CHECK13: cond.false:
4665 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4666 // CHECK13-NEXT: br label [[COND_END]]
4667 // CHECK13: cond.end:
4668 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4669 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4670 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4671 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4672 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4673 // CHECK13: omp.inner.for.cond:
4674 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4675 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4676 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4677 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4678 // CHECK13: omp.inner.for.body:
4679 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 1)
4680 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4681 // CHECK13-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4682 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4683 // CHECK13-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4684 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]])
4685 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4686 // CHECK13: omp.inner.for.inc:
4687 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4688 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4689 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4690 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4691 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4692 // CHECK13: omp.inner.for.end:
4693 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4694 // CHECK13: omp.loop.exit:
4695 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4696 // CHECK13-NEXT: ret void
4697 //
4698 //
4699 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
4700 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4701 // CHECK13-NEXT: entry:
4702 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4703 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4704 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4705 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4706 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4707 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4708 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4709 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4710 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4711 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4712 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4713 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4714 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4715 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4716 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4717 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4718 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4719 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4720 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4721 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4722 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4723 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4724 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4725 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4726 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4727 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4728 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4729 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4730 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4731 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4732 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4733 // CHECK13: cond.true:
4734 // CHECK13-NEXT: br label [[COND_END:%.*]]
4735 // CHECK13: cond.false:
4736 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4737 // CHECK13-NEXT: br label [[COND_END]]
4738 // CHECK13: cond.end:
4739 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4740 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4741 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4742 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4743 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4744 // CHECK13: omp.inner.for.cond:
4745 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4746 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4747 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4748 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4749 // CHECK13: omp.inner.for.body:
4750 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4751 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4752 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4753 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4754 // CHECK13-NEXT: invoke void @_Z3foov()
4755 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4756 // CHECK13: invoke.cont:
4757 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4758 // CHECK13: omp.body.continue:
4759 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4760 // CHECK13: omp.inner.for.inc:
4761 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4762 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4763 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4764 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4765 // CHECK13: omp.inner.for.end:
4766 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4767 // CHECK13: omp.loop.exit:
4768 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4769 // CHECK13-NEXT: ret void
4770 // CHECK13: terminate.lpad:
4771 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
4772 // CHECK13-NEXT: catch i8* null
4773 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4774 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
4775 // CHECK13-NEXT: unreachable
4776 //
4777 //
4778 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
4779 // CHECK13-SAME: () #[[ATTR3]] {
4780 // CHECK13-NEXT: entry:
4781 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
4782 // CHECK13-NEXT: ret void
4783 //
4784 //
4785 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
4786 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4787 // CHECK13-NEXT: entry:
4788 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4789 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4790 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4791 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4792 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4793 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4794 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4795 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4796 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4797 // CHECK13-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4798 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4799 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4800 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4801 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4802 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4803 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4804 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4805 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4806 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4807 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4808 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4809 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4810 // CHECK13: cond.true:
4811 // CHECK13-NEXT: br label [[COND_END:%.*]]
4812 // CHECK13: cond.false:
4813 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4814 // CHECK13-NEXT: br label [[COND_END]]
4815 // CHECK13: cond.end:
4816 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4817 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4818 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4819 // CHECK13-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4820 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4821 // CHECK13: omp.inner.for.cond:
4822 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4823 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4824 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4825 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4826 // CHECK13: omp.inner.for.body:
4827 // CHECK13-NEXT: invoke void @_ZN1SC1El(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
4828 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4829 // CHECK13: invoke.cont:
4830 // CHECK13-NEXT: [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
4831 // CHECK13-NEXT: to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
4832 // CHECK13: invoke.cont2:
4833 // CHECK13-NEXT: [[TMP7:%.*]] = sext i8 [[CALL]] to i32
4834 // CHECK13-NEXT: call void @__kmpc_push_num_threads(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
4835 // CHECK13-NEXT: call void @_ZN1SD1Ev(%struct.S* noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR6]]
4836 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4837 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4838 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4839 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4840 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]])
4841 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4842 // CHECK13: omp.inner.for.inc:
4843 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4844 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4845 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4846 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4847 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4848 // CHECK13: omp.inner.for.end:
4849 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4850 // CHECK13: omp.loop.exit:
4851 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4852 // CHECK13-NEXT: ret void
4853 // CHECK13: terminate.lpad:
4854 // CHECK13-NEXT: [[TMP14:%.*]] = landingpad { i8*, i32 }
4855 // CHECK13-NEXT: catch i8* null
4856 // CHECK13-NEXT: [[TMP15:%.*]] = extractvalue { i8*, i32 } [[TMP14]], 0
4857 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP15]]) #[[ATTR10]]
4858 // CHECK13-NEXT: unreachable
4859 //
4860 //
4861 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
4862 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
4863 // CHECK13-NEXT: entry:
4864 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4865 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4866 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4867 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4868 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4869 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4870 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4871 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4872 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4873 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4874 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4875 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4876 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4877 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4878 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4879 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4880 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4881 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4882 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4883 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4884 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4885 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4886 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4887 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4888 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4889 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4890 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4891 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4892 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4893 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4894 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4895 // CHECK13: cond.true:
4896 // CHECK13-NEXT: br label [[COND_END:%.*]]
4897 // CHECK13: cond.false:
4898 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4899 // CHECK13-NEXT: br label [[COND_END]]
4900 // CHECK13: cond.end:
4901 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4902 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4903 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4904 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4905 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4906 // CHECK13: omp.inner.for.cond:
4907 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4908 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4909 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4910 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4911 // CHECK13: omp.inner.for.body:
4912 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4913 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4914 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4915 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
4916 // CHECK13-NEXT: invoke void @_Z3foov()
4917 // CHECK13-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4918 // CHECK13: invoke.cont:
4919 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4920 // CHECK13: omp.body.continue:
4921 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4922 // CHECK13: omp.inner.for.inc:
4923 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4924 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4925 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4926 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4927 // CHECK13: omp.inner.for.end:
4928 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4929 // CHECK13: omp.loop.exit:
4930 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4931 // CHECK13-NEXT: ret void
4932 // CHECK13: terminate.lpad:
4933 // CHECK13-NEXT: [[TMP11:%.*]] = landingpad { i8*, i32 }
4934 // CHECK13-NEXT: catch i8* null
4935 // CHECK13-NEXT: [[TMP12:%.*]] = extractvalue { i8*, i32 } [[TMP11]], 0
4936 // CHECK13-NEXT: call void @__clang_call_terminate(i8* [[TMP12]]) #[[ATTR10]]
4937 // CHECK13-NEXT: unreachable
4938 //
4939 //
4940 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
4941 // CHECK13-SAME: (%struct.S* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR8]] comdat align 2 {
4942 // CHECK13-NEXT: entry:
4943 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
4944 // CHECK13-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
4945 // CHECK13-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
4946 // CHECK13-NEXT: ret void
4947 //
4948 //
4949 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4950 // CHECK13-SAME: () #[[ATTR9:[0-9]+]] {
4951 // CHECK13-NEXT: entry:
4952 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1)
4953 // CHECK13-NEXT: ret void
4954 //
4955